2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
8 * Configuration for the MX35pdk Freescale board.
10 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/imx-regs.h>
18 /* High Level Configuration Options */
21 #define CONFIG_DISPLAY_CPUINFO
22 #define CONFIG_SYS_FSL_CLK
24 /* Set TEXT at the beginning of the NOR flash */
25 #define CONFIG_SYS_TEXT_BASE 0xA0000000
27 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_BOARD_LATE_INIT
30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
31 #define CONFIG_REVISION_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG
36 * Size of malloc() pool
38 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
43 #define CONFIG_SYS_I2C
44 #define CONFIG_SYS_I2C_MXC
45 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
46 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
47 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
48 #define CONFIG_MXC_SPI
49 #define CONFIG_MXC_GPIO
55 #define CONFIG_POWER_I2C
56 #define CONFIG_POWER_FSL
57 #define CONFIG_POWER_FSL_MC13892
58 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
59 #define CONFIG_RTC_MC13XXX
64 #define CONFIG_FSL_MC9SDZ60
65 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
70 #define CONFIG_MXC_UART
71 #define CONFIG_MXC_UART_BASE UART1_BASE
73 /* allow to overwrite serial and ethaddr */
74 #define CONFIG_ENV_OVERWRITE
75 #define CONFIG_CONS_INDEX 1
76 #define CONFIG_BAUDRATE 115200
81 #define CONFIG_BOOTP_SUBNETMASK
82 #define CONFIG_BOOTP_GATEWAY
83 #define CONFIG_BOOTP_DNS
85 #define CONFIG_CMD_NAND
87 #define CONFIG_NET_RETRY_COUNT 100
88 #define CONFIG_CMD_DATE
90 #define CONFIG_DOS_PARTITION
91 #define CONFIG_EFI_PARTITION
94 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
97 * Ethernet on the debug board (SMC911)
99 #define CONFIG_SMC911X
100 #define CONFIG_SMC911X_16_BIT 1
101 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
103 #define CONFIG_HAS_ETH1
104 #define CONFIG_ETHPRIME
107 * Ethernet on SOC (FEC)
109 #define CONFIG_FEC_MXC
110 #define IMX_FEC_BASE FEC_BASE_ADDR
111 #define CONFIG_FEC_MXC_PHYADDR 0x1F
115 #define CONFIG_ARP_TIMEOUT 200UL
118 * Miscellaneous configurable options
120 #define CONFIG_SYS_LONGHELP /* undef to save memory */
121 #define CONFIG_CMDLINE_EDITING
123 #define CONFIG_AUTO_COMPLETE
124 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
125 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
126 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
128 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
129 #define CONFIG_SYS_MEMTEST_END 0x10000
131 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
134 * Physical Memory Map
136 #define CONFIG_NR_DRAM_BANKS 2
137 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
138 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
139 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
140 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
142 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
143 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
144 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
145 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
146 GENERATED_GBL_DATA_SIZE)
147 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
148 CONFIG_SYS_GBL_DATA_OFFSET)
151 * MTD Command for mtdparts
153 #define CONFIG_CMD_MTDPARTS
154 #define CONFIG_MTD_DEVICE
155 #define CONFIG_FLASH_CFI_MTD
156 #define CONFIG_MTD_PARTITIONS
157 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
158 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
159 "96m(root),8m(cfg),1938m(user);" \
160 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
163 * FLASH and environment organization
165 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
166 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
167 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
168 /* Monitor at beginning of flash */
169 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
170 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
172 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
173 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
175 /* Address and size of Redundant Environment Sector */
176 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
177 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
179 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
180 CONFIG_SYS_MONITOR_LEN)
182 #define CONFIG_ENV_IS_IN_FLASH
184 #if defined(CONFIG_FSL_ENV_IN_NAND)
185 #define CONFIG_ENV_IS_IN_NAND
186 #define CONFIG_ENV_OFFSET (1024 * 1024)
190 * CFI FLASH driver setup
192 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
193 #define CONFIG_FLASH_CFI_DRIVER
195 /* A non-standard buffered write algorithm */
196 #define CONFIG_FLASH_SPANSION_S29WS_N
197 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
198 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
201 * NAND FLASH driver setup
203 #define CONFIG_NAND_MXC
204 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
205 #define CONFIG_SYS_MAX_NAND_DEVICE 1
206 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
207 #define CONFIG_MXC_NAND_HWECC
208 #define CONFIG_SYS_NAND_LARGEPAGE
211 #define CONFIG_USB_EHCI
212 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
213 #define CONFIG_EHCI_IS_TDI
214 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
215 #define CONFIG_USB_EHCI_MXC
216 #define CONFIG_MXC_USB_PORT 0
217 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
218 MXC_EHCI_POWER_PINS_ENABLED | \
219 MXC_EHCI_OC_PIN_ACTIVE_LOW)
220 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
224 #define CONFIG_GENERIC_MMC
225 #define CONFIG_FSL_ESDHC
226 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
227 #define CONFIG_SYS_FSL_ESDHC_NUM 1
230 * Default environment and default scripts
231 * to update uboot and load kernel
234 #define CONFIG_HOSTNAME "mx35pdk"
235 #define CONFIG_EXTRA_ENV_SETTINGS \
237 "ethprime=smc911x\0" \
238 "nfsargs=setenv bootargs root=/dev/nfs rw " \
239 "nfsroot=${serverip}:${rootpath}\0" \
240 "ramargs=setenv bootargs root=/dev/ram rw\0" \
241 "addip_sta=setenv bootargs ${bootargs} " \
242 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
243 ":${hostname}:${netdev}:off panic=1\0" \
244 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
245 "addip=if test -n ${ipdyn};then run addip_dyn;" \
246 "else run addip_sta;fi\0" \
247 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
248 "addtty=setenv bootargs ${bootargs}" \
249 " console=ttymxc0,${baudrate}\0" \
250 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
251 "loadaddr=80800000\0" \
252 "kernel_addr_r=80800000\0" \
253 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
254 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
255 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
256 "flash_self=run ramargs addip addtty addmtd addmisc;" \
257 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
258 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
259 "bootm ${kernel_addr}\0" \
260 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
261 "run nfsargs addip addtty addmtd addmisc;" \
262 "bootm ${kernel_addr_r}\0" \
263 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
264 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
265 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
266 "load=tftp ${loadaddr} ${u-boot}\0" \
267 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
268 "update=protect off ${uboot_addr} +80000;" \
269 "erase ${uboot_addr} +80000;" \
270 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
271 "upd=if run load;then echo Updating u-boot;if run update;" \
272 "then echo U-Boot updated;" \
273 "else echo Error updating u-boot !;" \
274 "echo Board without bootloader !!;" \
276 "else echo U-Boot not downloaded..exiting;fi\0" \
277 "bootcmd=run net_nfs\0"
279 #endif /* __CONFIG_H */