]> git.sur5r.net Git - u-boot/commitdiff
rockchip: Add basic support for firefly-rk3288
authorSimon Glass <sjg@chromium.org>
Sun, 30 Aug 2015 22:55:41 +0000 (16:55 -0600)
committerSimon Glass <sjg@chromium.org>
Thu, 3 Sep 2015 03:28:24 +0000 (21:28 -0600)
The Firefly RK3288 is a suitable target board for initial mainline Rockchip
support. It includes a good set of peripherals, a recent SoC and it is
readily available.

This adds only some basic files required to allow the baord to display a
serial message in SPL and hang.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/Makefile
arch/arm/dts/rk3288-firefly.dts [new file with mode: 0644]
arch/arm/dts/rk3288-firefly.dtsi [new file with mode: 0644]
arch/arm/mach-rockchip/rk3288/Kconfig
board/firefly/firefly-rk3288/Kconfig [new file with mode: 0644]
board/firefly/firefly-rk3288/MAINTAINERS [new file with mode: 0644]
board/firefly/firefly-rk3288/Makefile [new file with mode: 0644]
board/firefly/firefly-rk3288/firefly-rk3288.c [new file with mode: 0644]
configs/firefly-rk3288_defconfig [new file with mode: 0644]
include/configs/firefly-rk3288.h [new file with mode: 0644]
include/configs/rk3288_common.h [new file with mode: 0644]

index c97f39dc6b442103ebfff76e9b792cbf62c805ba..ba3b71dd0abfd327fb0cc7b28bb2deb7a104ed49 100644 (file)
@@ -15,6 +15,8 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
        exynos5420-peach-pit.dtb \
        exynos5800-peach-pi.dtb \
        exynos5422-odroidxu3.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += \
+       rk3288-firefly.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
        tegra20-medcom-wide.dtb \
        tegra20-paz00.dtb \
diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts
new file mode 100644 (file)
index 0000000..aed8d3a
--- /dev/null
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include "rk3288-firefly.dtsi"
+
+/ {
+       model = "Firefly-RK3288";
+       compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
+
+       chosen {
+               stdout-path = &uart2;
+       };
+
+       config {
+               u-boot,dm-pre-reloc;
+               u-boot,boot-led = "firefly:green:power";
+       };
+};
+
+&dmc {
+       rockchip,num-channels = <2>;
+       rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+               0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+               0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+               0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+               0x5 0x0>;
+       rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+               0xa60 0x40 0x10 0x0>;
+       rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>;
+       rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+};
+
+&ir {
+       gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+};
+
+&pinctrl {
+       u-boot,dm-pre-reloc;
+       act8846 {
+               pmic_vsel: pmic-vsel {
+                       rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
+               };
+       };
+
+       ir {
+               ir_int: ir-int {
+                       rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+};
+
+&pwm1 {
+       status = "okay";
+};
+
+&uart2 {
+       u-boot,dm-pre-reloc;
+       reg-shift = <2>;
+};
+
+&sdmmc {
+       u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+       u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+       u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
new file mode 100644 (file)
index 0000000..8a083f0
--- /dev/null
@@ -0,0 +1,457 @@
+/*
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+#include "rk3288.dtsi"
+
+/ {
+       memory {
+               reg = <0 0x80000000>;
+       };
+
+       ext_gmac: external-gmac-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <125000000>;
+               clock-output-names = "ext_gmac";
+       };
+
+       ir: ir-receiver {
+               compatible = "gpio-ir-receiver";
+               pinctrl-names = "default";
+               pinctrl-0 = <&ir_int>;
+       };
+
+       keys: gpio-keys {
+               compatible = "gpio-keys";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               button@0 {
+                       gpio-key,wakeup = <1>;
+                       gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+                       label = "GPIO Power";
+                       linux,code = <116>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pwr_key>;
+               };
+       };
+
+       leds {
+               u-boot,dm-pre-reloc;
+               compatible = "gpio-leds";
+
+               work {
+                       u-boot,dm-pre-reloc;
+                       gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+                       label = "firefly:blue:user";
+                       linux,default-trigger = "rc-feedback";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&work_led>;
+               };
+
+               power {
+                       u-boot,dm-pre-reloc;
+                       gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
+                       label = "firefly:green:power";
+                       linux,default-trigger = "default-on";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&power_led>;
+               };
+       };
+
+       vcc_sys: vsys-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc_sys";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vcc_sd: sdmmc-regulator {
+               compatible = "regulator-fixed";
+               gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&sdmmc_pwr>;
+               regulator-name = "vcc_sd";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               startup-delay-us = <100000>;
+               vin-supply = <&vcc_io>;
+       };
+
+       vcc_flash: flash-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc_flash";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               vin-supply = <&vcc_io>;
+       };
+
+       vcc_5v: usb-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc_5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&vcc_sys>;
+       };
+
+       vcc_host_5v: usb-host-regulator {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&host_vbus_drv>;
+               regulator-name = "vcc_host_5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               vin-supply = <&vcc_5v>;
+       };
+
+       vcc_otg_5v: usb-otg-regulator {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&otg_vbus_drv>;
+               regulator-name = "vcc_otg_5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               vin-supply = <&vcc_5v>;
+       };
+};
+
+&cpu0 {
+       cpu0-supply = <&vdd_cpu>;
+};
+
+&emmc {
+       broken-cd;
+       bus-width = <8>;
+       cap-mmc-highspeed;
+       disable-wp;
+       non-removable;
+       num-slots = <1>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
+       vmmc-supply = <&vcc_io>;
+       vqmmc-supply = <&vcc_flash>;
+       status = "okay";
+};
+
+&hdmi {
+       ddc-i2c-bus = <&i2c5>;
+       status = "okay";
+};
+
+&i2c0 {
+       clock-frequency = <400000>;
+       status = "okay";
+
+       vdd_cpu: syr827@40 {
+               compatible = "silergy,syr827";
+               fcs,suspend-voltage-selector = <1>;
+               reg = <0x40>;
+               regulator-name = "vdd_cpu";
+               regulator-min-microvolt = <850000>;
+               regulator-max-microvolt = <1350000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&vcc_sys>;
+       };
+
+       vdd_gpu: syr828@41 {
+               compatible = "silergy,syr828";
+               fcs,suspend-voltage-selector = <1>;
+               reg = <0x41>;
+               regulator-name = "vdd_gpu";
+               regulator-min-microvolt = <850000>;
+               regulator-max-microvolt = <1350000>;
+               regulator-always-on;
+               vin-supply = <&vcc_sys>;
+       };
+
+       hym8563: hym8563@51 {
+               compatible = "haoyu,hym8563";
+               reg = <0x51>;
+               #clock-cells = <0>;
+               clock-frequency = <32768>;
+               clock-output-names = "xin32k";
+               interrupt-parent = <&gpio7>;
+               interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&rtc_int>;
+       };
+
+       act8846: act8846@5a {
+               compatible = "active-semi,act8846";
+               reg = <0x5a>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
+               system-power-controller;
+
+               regulators {
+                       vcc_ddr: REG1 {
+                               regulator-name = "vcc_ddr";
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <1200000>;
+                               regulator-always-on;
+                       };
+
+                       vcc_io: REG2 {
+                               regulator-name = "vcc_io";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_log: REG3 {
+                               regulator-name = "vdd_log";
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-always-on;
+                       };
+
+                       vcc_20: REG4 {
+                               regulator-name = "vcc_20";
+                               regulator-min-microvolt = <2000000>;
+                               regulator-max-microvolt = <2000000>;
+                               regulator-always-on;
+                       };
+
+                       vccio_sd: REG5 {
+                               regulator-name = "vccio_sd";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vdd10_lcd: REG6 {
+                               regulator-name = "vdd10_lcd";
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-always-on;
+                       };
+
+                       vcca_18: REG7 {
+                               regulator-name = "vcca_18";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
+
+                       vcca_33: REG8 {
+                               regulator-name = "vcca_33";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       vcc_lan: REG9 {
+                               regulator-name = "vcc_lan";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       vdd_10: REG10 {
+                               regulator-name = "vdd_10";
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-always-on;
+                       };
+
+                       vcc_18: REG11 {
+                               regulator-name = "vcc_18";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-always-on;
+                       };
+
+                       vcc18_lcd: REG12 {
+                               regulator-name = "vcc18_lcd";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+};
+
+&i2c5 {
+       status = "okay";
+};
+
+&pinctrl {
+       pcfg_output_high: pcfg-output-high {
+               output-high;
+       };
+
+       pcfg_output_low: pcfg-output-low {
+               output-low;
+       };
+
+       act8846 {
+               pwr_hold: pwr-hold {
+                       rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
+               };
+       };
+
+       gmac {
+               phy_int: phy-int {
+                       rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+
+               phy_pmeb: phy-pmeb {
+                       rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+
+               phy_rst: phy-rst {
+                       rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+               };
+       };
+
+       hym8563 {
+               rtc_int: rtc-int {
+                       rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+
+       keys {
+               pwr_key: pwr-key {
+                       rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+
+       leds {
+               power_led: power-led {
+                       rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               work_led: work-led {
+                       rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       sdmmc {
+               sdmmc_pwr: sdmmc-pwr {
+                       rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       usb_host {
+               host_vbus_drv: host-vbus-drv {
+                       rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               usbhub_rst: usbhub-rst {
+                       rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
+               };
+       };
+
+       usb_otg {
+               otg_vbus_drv: otg-vbus-drv {
+                       rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+};
+
+&saradc {
+       vref-supply = <&vcc_18>;
+       status = "okay";
+};
+
+&sdio0 {
+       broken-cd;
+       bus-width = <4>;
+       disable-wp;
+       non-removable;
+       num-slots = <1>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
+       vmmc-supply = <&vcc_18>;
+       status = "okay";
+};
+
+&sdmmc {
+       bus-width = <4>;
+       cap-mmc-highspeed;
+       cap-sd-highspeed;
+       card-detect-delay = <200>;
+       disable-wp;
+       num-slots = <1>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+       vmmc-supply = <&vcc_sd>;
+       status = "okay";
+};
+
+&spi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};
+
+&uart3 {
+       status = "okay";
+};
+
+&usb_host1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&usbhub_rst>;
+       status = "okay";
+};
+
+&usb_otg {
+       status = "okay";
+};
+
+&vopb {
+       status = "okay";
+};
+
+&vopb_mmu {
+       status = "okay";
+};
+
+&vopl {
+       status = "okay";
+};
+
+&vopl_mmu {
+       status = "okay";
+};
+
+&wdt {
+       status = "okay";
+};
index 26d5951543e2280a3da9f58c4a4bb79c4d2bbbed..7a77615291a0c31b4fa2aee1c751de39df9ebda6 100644 (file)
@@ -1,6 +1,16 @@
 if ROCKCHIP_RK3288
 
+config TARGET_FIREFLY_RK3288
+       bool "Firefly-RK3288"
+       help
+         Firefly is a RK3288-based development board with 2 USB ports,
+         HDMI, VGA, micro-SD card, audio, WiFi  and Gigabit Ethernet, It
+         also includes on-board eMMC and 1GB of SDRAM. Expansion connectors
+         provide access to display pins, I2C, SPI, UART and GPIOs.
+
 config SYS_SOC
        default "rockchip"
 
+source "board/firefly/firefly-rk3288/Kconfig"
+
 endif
diff --git a/board/firefly/firefly-rk3288/Kconfig b/board/firefly/firefly-rk3288/Kconfig
new file mode 100644 (file)
index 0000000..1c2bca8
--- /dev/null
@@ -0,0 +1,15 @@
+if TARGET_FIREFLY_RK3288
+
+config SYS_BOARD
+       default "firefly-rk3288"
+
+config SYS_VENDOR
+       default "firefly"
+
+config SYS_CONFIG_NAME
+       default "firefly-rk3288"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
+
+endif
diff --git a/board/firefly/firefly-rk3288/MAINTAINERS b/board/firefly/firefly-rk3288/MAINTAINERS
new file mode 100644 (file)
index 0000000..42db0bd
--- /dev/null
@@ -0,0 +1,6 @@
+FIREFLY
+M:     Simon Glass <sjg@chromium.org>
+S:     Maintained
+F:     board/firefly/firefly-rk3288
+F:     include/configs/firefly-rk3288.h
+F:     configs/firefly-rk3288_defconfig
diff --git a/board/firefly/firefly-rk3288/Makefile b/board/firefly/firefly-rk3288/Makefile
new file mode 100644 (file)
index 0000000..6716845
--- /dev/null
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Google, Inc
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y  += firefly-rk3288.o
diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c
new file mode 100644 (file)
index 0000000..5119e95
--- /dev/null
@@ -0,0 +1,7 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
new file mode 100644 (file)
index 0000000..2411957
--- /dev/null
@@ -0,0 +1,43 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_FIREFLY_RK3288=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_RESET=y
+CONFIG_LED=y
+CONFIG_SPL_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_MMC=y
+CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
new file mode 100644 (file)
index 0000000..a82adc8
--- /dev/null
@@ -0,0 +1,14 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/rk3288_common.h>
+
+#define CONFIG_SPL_MMC_SUPPORT
+
+#endif
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
new file mode 100644 (file)
index 0000000..ce7fa75
--- /dev/null
@@ -0,0 +1,97 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3288_COMMON_H
+#define __CONFIG_RK3288_COMMON_H
+
+#include <asm/arch/hardware.h>
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE                        0x2000
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_SYS_MAXARGS             16
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_MALLOC_LEN          (32 << 20)
+#define CONFIG_SYS_CBSIZE              1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_THUMB_BUILD
+#define CONFIG_OF_LIBFDT
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_SYS_TIMER_RATE          (24 * 1000 * 1000)
+#define CONFIG_SYS_TIMER_COUNTER       (TIMER7_BASE + 8)
+
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SPL_BOARD_INIT
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MALLOC_SIMPLE
+#endif
+
+#define CONFIG_SYS_TEXT_BASE           0x00100000
+#define CONFIG_SYS_INIT_SP_ADDR                0x00100000
+#define CONFIG_SYS_LOAD_ADDR           0x00800800
+#define CONFIG_SPL_STACK               0xff718000
+#define CONFIG_SPL_TEXT_BASE           0xff704004
+
+/* MMC/SD IP block */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
+/* RAW SD card / eMMC locations. */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        256
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     (128 << 10)
+
+/* FAT sd card locations. */
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME                "u-boot.img"
+
+#define CONFIG_SPL_PINCTRL_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_RAM_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_TIME
+
+#define CONFIG_SYS_SDRAM_BASE          0
+#define CONFIG_NR_DRAM_BANKS           1
+#define SDRAM_BANK_SIZE                        (2UL << 30)
+
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SPI_FLASH_GIGADEVICE
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+
+#define CONFIG_CMD_I2C
+
+#ifndef CONFIG_SPL_BUILD
+#include <config_distro_defaults.h>
+#endif
+
+#endif