]> git.sur5r.net Git - u-boot/commitdiff
board: stm32f429-disco: switch to DM STM32 serial driver
authorPatrice Chotard <patrice.chotard@st.com>
Tue, 12 Dec 2017 08:49:37 +0000 (09:49 +0100)
committerTom Rini <trini@konsulko.com>
Wed, 10 Jan 2018 13:05:46 +0000 (08:05 -0500)
Remove serial_stm32.c driver and uart init from board file,
use available DM serial_stm32x7.c driver compatible for
STM32F4/F7 and H7 SoCs.

The serial_stm32x7.c driver will be renamed later with a more
generic name as it's shared with all STM32 Socs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
arch/arm/include/asm/arch-stm32f4/stm32.h
board/st/stm32f429-discovery/stm32f429-discovery.c
configs/stm32f429-discovery_defconfig
drivers/serial/serial_stm32.c [deleted file]
include/configs/stm32f429-discovery.h

index e9f3aabb6fcb00c62cfd4782e87becc6b112412e..bd5c2ecdcb8c870dfceedd5c532d967eb65c102b 100644 (file)
@@ -59,14 +59,6 @@ struct stm32_pwr_regs {
 #define STM32_PWR_BASE         (STM32_APB1PERIPH_BASE + 0x7000)
 #define STM32_PWR              ((struct stm32_pwr_regs *)STM32_PWR_BASE)
 
-/*
- * Peripheral base addresses
- */
-#define STM32_USART1_BASE      (STM32_APB2PERIPH_BASE + 0x1000)
-#define STM32_USART2_BASE      (STM32_APB1PERIPH_BASE + 0x4400)
-#define STM32_USART3_BASE      (STM32_APB1PERIPH_BASE + 0x4800)
-#define STM32_USART6_BASE      (STM32_APB2PERIPH_BASE + 0x1400)
-
 #define FLASH_CNTL_BASE                (STM32_AHB1PERIPH_BASE + 0x3C00)
 
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
index 7e8df8eaef4e2ec1b066bf9cf31b935b92c9b29d..7e62bd2aa2631e0d1f91e99cbf1fb65ea9a7cb10 100644 (file)
@@ -17,7 +17,6 @@
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
 #include <asm/arch/gpio.h>
-#include <dm/platform_data/serial_stm32.h>
 #include <asm/arch/stm32_periph.h>
 #include <asm/arch/stm32_defs.h>
 
@@ -168,15 +167,6 @@ int dram_init_banksize(void)
        return 0;
 }
 
-static const struct stm32_serial_platdata serial_platdata = {
-       .base = (struct stm32_usart *)STM32_USART1_BASE,
-};
-
-U_BOOT_DEVICE(stm32_serials) = {
-       .name = "serial_stm32",
-       .platdata = &serial_platdata,
-};
-
 u32 get_board_rev(void)
 {
        return 0;
index 15ff64645e6fb6cabb22badc5c62888100f5dc0b..ae106ff8187e4c7942d7b1077e6a8727f76accc3 100644 (file)
@@ -27,3 +27,4 @@ CONFIG_RAM=y
 CONFIG_STM32_SDRAM=y
 CONFIG_DM_RESET=y
 CONFIG_STM32_RESET=y
+CONFIG_STM32X7_SERIAL=y
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
deleted file mode 100644 (file)
index c793ba6..0000000
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <asm/io.h>
-#include <serial.h>
-#include <asm/arch/stm32.h>
-#include <dm/platform_data/serial_stm32.h>
-
-struct stm32_usart {
-       u32 sr;
-       u32 dr;
-       u32 brr;
-       u32 cr1;
-       u32 cr2;
-       u32 cr3;
-       u32 gtpr;
-};
-
-#define USART_CR1_RE                   (1 << 2)
-#define USART_CR1_TE                   (1 << 3)
-#define USART_CR1_UE                   (1 << 13)
-
-#define USART_SR_FLAG_RXNE     (1 << 5)
-#define USART_SR_FLAG_TXE              (1 << 7)
-
-#define USART_BRR_F_MASK               0xF
-#define USART_BRR_M_SHIFT      4
-#define USART_BRR_M_MASK       0xFFF0
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
-{
-       struct stm32_serial_platdata *plat = dev->platdata;
-       struct stm32_usart *const usart = plat->base;
-       u32  clock, int_div, frac_div, tmp;
-
-       if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)
-               clock = clock_get(CLOCK_APB1);
-       else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)
-               clock = clock_get(CLOCK_APB2);
-       else
-               return -EINVAL;
-
-       int_div = (25 * clock) / (4 * baudrate);
-       tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
-       frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
-       tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
-       writel(tmp, &usart->brr);
-
-       return 0;
-}
-
-static int stm32_serial_getc(struct udevice *dev)
-{
-       struct stm32_serial_platdata *plat = dev->platdata;
-       struct stm32_usart *const usart = plat->base;
-
-       if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
-               return -EAGAIN;
-
-       return readl(&usart->dr);
-}
-
-static int stm32_serial_putc(struct udevice *dev, const char c)
-{
-       struct stm32_serial_platdata *plat = dev->platdata;
-       struct stm32_usart *const usart = plat->base;
-
-       if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
-               return -EAGAIN;
-
-       writel(c, &usart->dr);
-
-       return 0;
-}
-
-static int stm32_serial_pending(struct udevice *dev, bool input)
-{
-       struct stm32_serial_platdata *plat = dev->platdata;
-       struct stm32_usart *const usart = plat->base;
-
-       if (input)
-               return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
-       else
-               return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
-}
-
-static int stm32_serial_probe(struct udevice *dev)
-{
-       struct stm32_serial_platdata *plat = dev->platdata;
-       struct stm32_usart *const usart = plat->base;
-       setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
-
-       return 0;
-}
-
-static const struct dm_serial_ops stm32_serial_ops = {
-       .putc = stm32_serial_putc,
-       .pending = stm32_serial_pending,
-       .getc = stm32_serial_getc,
-       .setbrg = stm32_serial_setbrg,
-};
-
-U_BOOT_DRIVER(serial_stm32) = {
-       .name = "serial_stm32",
-       .id = UCLASS_SERIAL,
-       .ops = &stm32_serial_ops,
-       .probe = stm32_serial_probe,
-       .flags = DM_FLAG_PRE_RELOC,
-};
index 317b9344a1f4ae37ca19033dc186e5422bb04a79..934acbcf9872f2ca40e562f6c49ade460c79ec32 100644 (file)
@@ -43,7 +43,6 @@
 
 #define CONFIG_STM32_GPIO
 #define CONFIG_STM32_FLASH
-#define CONFIG_STM32_SERIAL
 
 #define CONFIG_STM32_HSE_HZ            8000000