]> git.sur5r.net Git - u-boot/commitdiff
zynq: Enable axi ethernet and emaclite driver initialization
authorMichal Simek <michal.simek@xilinx.com>
Thu, 25 Jul 2013 13:47:16 +0000 (15:47 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 12 Aug 2013 06:59:56 +0000 (08:59 +0200)
Zynq can have axi ethernet and emaclite IPs in programmable
logic.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
board/xilinx/zynq/board.c

index ca159b0cd31529c27c2cb57a0f24a6929da39035..decdce549ecceb431f177cf4d6600193af4a8565 100644 (file)
@@ -61,6 +61,23 @@ int board_eth_init(bd_t *bis)
 {
        u32 ret = 0;
 
+#ifdef CONFIG_XILINX_AXIEMAC
+       ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
+                                               XILINX_AXIDMA_BASEADDR);
+#endif
+#ifdef CONFIG_XILINX_EMACLITE
+       u32 txpp = 0;
+       u32 rxpp = 0;
+# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
+       txpp = 1;
+# endif
+# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
+       rxpp = 1;
+# endif
+       ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
+                       txpp, rxpp);
+#endif
+
 #if defined(CONFIG_ZYNQ_GEM)
 # if defined(CONFIG_ZYNQ_GEM0)
        ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,