T: git git://git.denx.de/u-boot-arc.git
F: arch/arc/
-ARC HSDK CREG GPIO
-M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
-S: Maintained
-L: uboot-snps-arc@synopsys.com
-F: drivers/gpio/hsdk-creg-gpio.c
-
ARC HSDK CGU CLOCK
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
F: include/dt-bindings/clock/snps,hsdk-cgu.h
F: doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
+ARC HSDK CREG GPIO
+M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
+S: Maintained
+L: uboot-snps-arc@synopsys.com
+F: drivers/gpio/hsdk-creg-gpio.c
+
ARM
M: Albert Aribaud <albert.u.boot@aribaud.net>
S: Maintained
S: Maintained
F: arch/arm/mach-snapdragon/
+ARM STI
+M: Patrice Chotard <patrice.chotard@st.com>
+S: Maintained
+F: arch/arm/mach-sti/
+F: arch/arm/include/asm/arch-sti*/
+
ARM STM SPEAR
#M: Vipin Kumar <vipin.kumar@st.com>
S: Orphaned (Since 2016-02)
F: arch/arm/cpu/armv7/stv0991/
F: arch/arm/include/asm/arch-stv0991/
-ARM STI
-M: Patrice Chotard <patrice.chotard@st.com>
-S: Maintained
-F: arch/arm/mach-sti/
-F: arch/arm/include/asm/arch-sti*/
-
ARM SUNXI
M: Jagan Teki <jagan@openedev.com>
M: Maxime Ripard <maxime.ripard@bootlin.com>
T: git git://git.denx.de/u-boot-mmc.git
F: drivers/mmc/
-NETWORK
-M: Joe Hershberger <joe.hershberger@ni.com>
-S: Maintained
-T: git git://git.denx.de/u-boot-net.git
-F: drivers/net/
-F: net/
-
NAND FLASH
M: Scott Wood <oss@buserror.net>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
+NETWORK
+M: Joe Hershberger <joe.hershberger@ni.com>
+S: Maintained
+T: git git://git.denx.de/u-boot-net.git
+F: drivers/net/
+F: net/
+
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
A38X BOARD
-M: Dirk Eibach <eibach@gdsys.cc>
-M: Mario Six <six@gdsys.de>
+M: Dirk Eibach <dirk.eibach@gdsys.cc>
+M: Mario Six <mario.six@gdsys.cc>
S: Maintained
F: board/gdsys/a38x/
F: include/configs/controlcenterdc.h
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2015
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2013
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2010
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2010
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2010
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
MPC8308 BOARD
-M: Dirk Eibach <eibach@gdsys.de>
+M: Dirk Eibach <dirk.eibach@gdsys.cc>
S: Maintained
F: board/gdsys/mpc8308/
F: include/configs/hrcon.h
#
# (C) Copyright 2014
-# Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+# Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
#
# SPDX-License-Identifier: GPL-2.0+
#
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
P1022 BOARD
-M: Dirk Eibach <eibach@gdsys.de>
+M: Dirk Eibach <dirk.eibach@gdsys.cc>
S: Maintained
F: board/gdsys/p1022/
F: include/configs/controlcenterd.h
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
-CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-mipi> "
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
-CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:2m(spl),2m(uboot),1m(env),8m(kernel),1m(dtb),-(rootfs)"
CONFIG_CMD_UBI=y
-CONFIG_OF_LIST="imx6q-icore imx6dl-icore"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_I2C_MXC=y
CONFIG_NAND=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SPL=y
-CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-rqs> "
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
-CONFIG_OF_LIBFDT=y
# CONFIG_REGEX is not set
+CONFIG_OF_LIBFDT=y
CONFIG_DEBUG_UART_BASE=0x87e024000000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SKIP_INIT=y
-CONFIG_REGEX=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_CMD_ONENAND=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_JFFS2=y
CONFIG_MTDIDS_DEFAULT="onenand0=onenand"
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
-CONFIG_REGEX=y
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
-CONFIG_REGEX=y
/*
* (C) Copyright 2016
- * Mario Six, Guntermann & Drunck GmbH, six@gdsys.de
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*
* based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
*
/*
* (C) Copyright 2011
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2013
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
struct bcm283x_mu_regs *regs;
};
+static int bcm283x_mu_serial_getc(struct udevice *dev);
+
static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
{
struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
u32 divider;
if (plat->skip_init)
- return 0;
+ goto out;
divider = plat->clock / (baudrate * 8);
writel(BCM283X_MU_LCR_DATA_SIZE_8, ®s->lcr);
writel(divider - 1, ®s->baud);
+out:
+ /* Flush the RX queue - all data in there is bogus */
+ while (bcm283x_mu_serial_getc(dev) != -EAGAIN) ;
+
return 0;
}
#include <asm/gpio.h>
#include <dm/pinctrl.h>
#include <dm/platform_data/serial_pl01x.h>
+#include <serial.h>
#include "serial_pl01x_internal.h"
/*
return 0;
}
+static int bcm283x_pl011_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ int r;
+
+ r = pl01x_serial_setbrg(dev, baudrate);
+
+ /*
+ * We may have been muxed to a bogus line before. Drain the RX
+ * queue so we start at a clean slate.
+ */
+ while (pl01x_serial_getc(dev) != -EAGAIN) ;
+
+ return r;
+}
+
+static const struct dm_serial_ops bcm283x_pl011_serial_ops = {
+ .putc = pl01x_serial_putc,
+ .pending = pl01x_serial_pending,
+ .getc = pl01x_serial_getc,
+ .setbrg = bcm283x_pl011_serial_setbrg,
+};
+
static const struct udevice_id bcm283x_pl011_serial_id[] = {
{.compatible = "brcm,bcm2835-pl011", .data = TYPE_PL011},
{}
.ofdata_to_platdata = of_match_ptr(bcm283x_pl011_serial_ofdata_to_platdata),
.platdata_auto_alloc_size = sizeof(struct pl01x_serial_platdata),
.probe = pl01x_serial_probe,
- .ops = &pl01x_serial_ops,
+ .ops = &bcm283x_pl011_serial_ops,
.flags = DM_FLAG_PRE_RELOC,
.priv_auto_alloc_size = sizeof(struct pl01x_priv),
};
#ifdef CONFIG_DM_SERIAL
-static int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
+int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
{
struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
struct pl01x_priv *priv = dev_get_priv(dev);
return 0;
}
-static int pl01x_serial_getc(struct udevice *dev)
+int pl01x_serial_getc(struct udevice *dev)
{
struct pl01x_priv *priv = dev_get_priv(dev);
return pl01x_getc(priv->regs);
}
-static int pl01x_serial_putc(struct udevice *dev, const char ch)
+int pl01x_serial_putc(struct udevice *dev, const char ch)
{
struct pl01x_priv *priv = dev_get_priv(dev);
return pl01x_putc(priv->regs, ch);
}
-static int pl01x_serial_pending(struct udevice *dev, bool input)
+int pl01x_serial_pending(struct udevice *dev, bool input)
{
struct pl01x_priv *priv = dev_get_priv(dev);
unsigned int fr = readl(&priv->regs->fr);
return fr & UART_PL01x_FR_TXFF ? 0 : 1;
}
-const struct dm_serial_ops pl01x_serial_ops = {
+static const struct dm_serial_ops pl01x_serial_ops = {
.putc = pl01x_serial_putc,
.pending = pl01x_serial_pending,
.getc = pl01x_serial_getc,
int pl01x_serial_ofdata_to_platdata(struct udevice *dev);
int pl01x_serial_probe(struct udevice *dev);
-extern const struct dm_serial_ops pl01x_serial_ops;
+
+/* Needed for external pl01x_serial_ops drivers */
+int pl01x_serial_putc(struct udevice *dev, const char ch);
+int pl01x_serial_pending(struct udevice *dev, bool input);
+int pl01x_serial_getc(struct udevice *dev);
+int pl01x_serial_setbrg(struct udevice *dev, int baudrate);
struct pl01x_priv {
struct pl01x_regs *regs;
/*
* Copyright (C) 2013 Guntermann & Drunck, GmbH
*
- * Written by Dirk Eibach <eibach@gdsys.de>
+ * Written by Dirk Eibach <dirk.eibach@gdsys.cc>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* Make sure this is an ext2 filesystem. */
if (le16_to_cpu(data->sblock.magic) != EXT2_MAGIC)
- goto fail;
+ goto fail_noerr;
if (le32_to_cpu(data->sblock.revision_level) == 0) {
return 1;
fail:
printf("Failed to mount ext2 filesystem...\n");
+fail_noerr:
free(data);
ext4fs_root = NULL;
n += YAFFS_NOBJECT_BUCKETS;
list_for_each(i, &dev->obj_bucket[bucket].list) {
/* If there is already one in the list */
- if (i && list_entry(i, struct yaffs_obj,
- hash_link)->obj_id == n) {
+ if (list_entry(i, struct yaffs_obj,
+ hash_link)->obj_id == n) {
found = 0;
break;
}
* the next one to prevent a hanging ptr.
*/
list_for_each(i, &search_contexts) {
- if (i) {
- dsc = list_entry(i, struct yaffsfs_DirSearchContxt,
- others);
- if (dsc->nextReturn == obj)
- yaffsfs_DirAdvance(dsc);
- }
+ dsc = list_entry(i, struct yaffsfs_DirSearchContxt, others);
+ if (dsc->nextReturn == obj)
+ yaffsfs_DirAdvance(dsc);
}
}
/* CPU configuration */
#define CONFIG_AT91RM9200
#define CONFIG_AT91RM9200EK
-#define CONFIG_CPUAT91
#define USE_920T_MMU
#include <asm/hardware.h> /* needed for port definitions */
#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_AT91SAM9263EK 1 /* It's an AT91SAM9263EK Board */
-
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
-#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
-
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_DBAU1X00 1
#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
#ifdef CONFIG_DBAU1000
#ifndef __CONFIG_DRACO_H
#define __CONFIG_DRACO_H
-#define CONFIG_SIEMENS_DRACO
#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_DRACO
#include "siemens-am33x-common.h"
#define CONFIG_SYS_LDSCRIPT "board/cirrus/edb93xx/u-boot.lds"
#ifdef CONFIG_EDB9301
-#define CONFIG_EP9301
#define CONFIG_MACH_TYPE MACH_TYPE_EDB9301
#define CONFIG_ENV_SECT_SIZE 0x00020000
#elif defined(CONFIG_EDB9302)
#define __CONFIG_EXYNOS5420_H
#define CONFIG_EXYNOS5420
-/* A variant of Exynos5420 (Exynos5 Family) */
-#define CONFIG_EXYNOS5800
#define CONFIG_EXYNOS5_DT
#define CONFIG_MACH_TYPE MACH_TYPE_H2200
#define CONFIG_CPU_PXA25X 1
-#define CONFIG_BOARD_H2200
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
*
* SPDX-License-Identifier: GPL-2.0+
* Board
*/
#define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_BARIX_IPAM390
/*
* SoC Configuration
#undef DEBUG
#define CONFIG_SH73A0
-#define CONFIG_KZM_A9_GT
#define CONFIG_ARCH_RMOBILE_BOARD_STRING "KMC KZM-A9-GT"
#define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
* SoC Configuration
*/
#define CONFIG_MACH_OMAPL138_LCDK
-#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_PB1X00 1
#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
#ifdef CONFIG_PB1000
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_PICOSAM
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#ifndef __PLATINUM_PICON_CONFIG_H__
#define __PLATINUM_PICON_CONFIG_H__
-#define CONFIG_PLATINUM_PICON
#define CONFIG_PLATINUM_BOARD "Barco Picon"
#define CONFIG_PLATINUM_PROJECT "picon"
#define CONFIG_PLATINUM_CPU "imx6dl"
#ifndef __PLATINUM_TITANIUM_CONFIG_H__
#define __PLATINUM_TITANIUM_CONFIG_H__
-#define CONFIG_PLATINUM_TITANIUM
#define CONFIG_PLATINUM_BOARD "Barco Titanium"
#define CONFIG_PLATINUM_PROJECT "titanium"
#define CONFIG_PLATINUM_CPU "imx6q"
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
-#define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MACH_TYPE MACH_TYPE_PM9261
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263"
-#define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MACH_TYPE MACH_TYPE_PM9263
*/
#include <asm/hardware.h>
-#define CONFIG_PM9G45 1 /* It's an Ronetix PM9G45 */
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45"
#define CONFIG_MACH_TYPE MACH_TYPE_PM9G45
#ifndef __CONFIG_PXM2_H
#define __CONFIG_PXM2_H
-#define CONFIG_SIEMENS_PXM2
#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_PXM2
#include "siemens-am33x-common.h"
"ramdisk_addr_r=0x44000000\0" \
BOOTENV
+#define CONFIG_SYS_CBSIZE 512
+
#endif /* __CONFIG_H */
#ifndef __CONFIG_RUT_H
#define __CONFIG_RUT_H
-#define CONFIG_SIEMENS_RUT
#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT
#include "siemens-am33x-common.h"
#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
#define CONFIG_S5P 1 /* which is in a S5P Family */
#define CONFIG_S5PC100 1 /* which is in a S5PC100 */
-#define CONFIG_SMDKC100 1 /* working with SMDKC100 */
#include <asm/arch/cpu.h> /* get chip and board defs */
/* High Level Configuration Options */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
-#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
/* Mach Type */
#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_STM32F4DISCOVERY
-
#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_FLASH_BASE 0x08000000
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_STM32F4DISCOVERY
-
#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_FLASH_BASE 0x08000000
/*
* (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
*
* SPDX-License-Identifier: GPL-2.0+
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
-#define CONFIG_SYS_CORTEX_R4
-
/* ram memory-related information */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x00000000
/*
* (C) Copyright 2010
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* (C) Copyright 2011
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*
* SPDX-License-Identifier: GPL-2.0+
*/
--- /dev/null
+/// Compare pointer-typed values to NULL rather than 0
+///
+//# This makes an effort to choose between !x and x == NULL. !x is used
+//# if it has previously been used with the function used to initialize x.
+//# This relies on type information. More type information can be obtained
+//# using the option -all_includes and the option -I to specify an
+//# include path.
+//
+// Confidence: High
+// Copyright: (C) 2012 Julia Lawall, INRIA/LIP6. GPLv2.
+// Copyright: (C) 2012 Gilles Muller, INRIA/LiP6. GPLv2.
+// URL: http://coccinelle.lip6.fr/
+// Requires: 1.0.0
+// Options:
+//
+// SPDX-License-Identifier: GPL-2.0
+//
+
+virtual patch
+virtual context
+virtual org
+virtual report
+
+@initialize:ocaml@
+@@
+let negtable = Hashtbl.create 101
+
+@depends on patch@
+expression *E;
+identifier f;
+@@
+
+(
+ (E = f(...)) ==
+- 0
++ NULL
+|
+ (E = f(...)) !=
+- 0
++ NULL
+|
+- 0
++ NULL
+ == (E = f(...))
+|
+- 0
++ NULL
+ != (E = f(...))
+)
+
+
+@t1 depends on !patch@
+expression *E;
+identifier f;
+position p;
+@@
+
+(
+ (E = f(...)) ==
+* 0@p
+|
+ (E = f(...)) !=
+* 0@p
+|
+* 0@p
+ == (E = f(...))
+|
+* 0@p
+ != (E = f(...))
+)
+
+@script:python depends on org@
+p << t1.p;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0")
+
+@script:python depends on report@
+p << t1.p;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0")
+
+// Tests of returned values
+
+@s@
+identifier f;
+expression E,E1;
+@@
+
+ E = f(...)
+ ... when != E = E1
+ !E
+
+@script:ocaml depends on s@
+f << s.f;
+@@
+
+try let _ = Hashtbl.find negtable f in ()
+with Not_found -> Hashtbl.add negtable f ()
+
+@ r disable is_zero,isnt_zero exists @
+expression *E;
+identifier f;
+@@
+
+E = f(...)
+...
+(E == 0
+|E != 0
+|0 == E
+|0 != E
+)
+
+@script:ocaml@
+f << r.f;
+@@
+
+try let _ = Hashtbl.find negtable f in ()
+with Not_found -> include_match false
+
+// This rule may lead to inconsistent path problems, if E is defined in two
+// places
+@ depends on patch disable is_zero,isnt_zero @
+expression *E;
+expression E1;
+identifier r.f;
+@@
+
+E = f(...)
+<...
+(
+- E == 0
++ !E
+|
+- E != 0
++ E
+|
+- 0 == E
++ !E
+|
+- 0 != E
++ E
+)
+...>
+?E = E1
+
+@t2 depends on !patch disable is_zero,isnt_zero @
+expression *E;
+expression E1;
+identifier r.f;
+position p1;
+position p2;
+@@
+
+E = f(...)
+<...
+(
+* E == 0@p1
+|
+* E != 0@p2
+|
+* 0@p1 == E
+|
+* 0@p1 != E
+)
+...>
+?E = E1
+
+@script:python depends on org@
+p << t2.p1;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0, suggest !E")
+
+@script:python depends on org@
+p << t2.p2;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0")
+
+@script:python depends on report@
+p << t2.p1;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0, suggest !E")
+
+@script:python depends on report@
+p << t2.p2;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0")
+
+@ depends on patch disable is_zero,isnt_zero @
+expression *E;
+@@
+
+(
+ E ==
+- 0
++ NULL
+|
+ E !=
+- 0
++ NULL
+|
+- 0
++ NULL
+ == E
+|
+- 0
++ NULL
+ != E
+)
+
+@ t3 depends on !patch disable is_zero,isnt_zero @
+expression *E;
+position p;
+@@
+
+(
+* E == 0@p
+|
+* E != 0@p
+|
+* 0@p == E
+|
+* 0@p != E
+)
+
+@script:python depends on org@
+p << t3.p;
+@@
+
+coccilib.org.print_todo(p[0], "WARNING comparing pointer to 0")
+
+@script:python depends on report@
+p << t3.p;
+@@
+
+coccilib.report.print_report(p[0], "WARNING comparing pointer to 0")
--- /dev/null
+/// This semantic patch looks for malloc etc that are not followed by a
+/// NULL check. It only gives a report in the case where there is some
+/// error handling code later in the function, which may be helpful
+/// in determining what the error handling code for the call to malloc etc
+/// should be.
+///
+// Confidence: High
+// Copyright: (C) 2010 Nicolas Palix, DIKU. GPLv2.
+// Copyright: (C) 2010 Julia Lawall, DIKU. GPLv2.
+// Copyright: (C) 2010 Gilles Muller, INRIA/LiP6. GPLv2.
+// URL: http://coccinelle.lip6.fr/
+// Comments:
+// Options: --no-includes --include-headers
+//
+// SPDX-License-Identifier: GPL-2.0
+//
+
+virtual context
+virtual org
+virtual report
+
+@withtest@
+expression x;
+position p;
+identifier f,fld;
+@@
+
+x@p = f(...);
+... when != x->fld
+\(x == NULL \| x != NULL\)
+
+@fixed depends on context && !org && !report@
+expression x,x1;
+position p1 != withtest.p;
+statement S;
+position any withtest.p;
+identifier f;
+@@
+
+*x@p1 = \(malloc\|calloc\)(...);
+...
+*x1@p = f(...);
+if (!x1) S
+
+// ------------------------------------------------------------------------
+
+@rfixed depends on (org || report) && !context exists@
+expression x,x1;
+position p1 != withtest.p;
+position p2;
+statement S;
+position any withtest.p;
+identifier f;
+@@
+
+x@p1 = \(malloc\|calloc\)(...);
+...
+x1@p = f@p2(...);
+if (!x1) S
+
+@script:python depends on org@
+p1 << rfixed.p1;
+p2 << rfixed.p2;
+@@
+
+cocci.print_main("alloc call",p1)
+cocci.print_secs("possible model",p2)
+
+@script:python depends on report@
+p1 << rfixed.p1;
+p2 << rfixed.p2;
+@@
+
+msg = "alloc with no test, possible model on line %s" % (p2[0].line)
+coccilib.report.print_report(p1[0],msg)
CONFIG_ARC_MMU_VER
CONFIG_ARC_SERIAL
CONFIG_ARIES_M28_V10
-CONFIG_ARM926EJS
CONFIG_ARMADA100
CONFIG_ARMADA100_FEC
CONFIG_ARMADA168
CONFIG_AT91RM9200EK
CONFIG_AT91SAM9260EK
CONFIG_AT91SAM9261EK
-CONFIG_AT91SAM9263EK
CONFIG_AT91SAM9G10
CONFIG_AT91SAM9G10EK
CONFIG_AT91SAM9G20EK
CONFIG_AT91SAM9G45EKES
CONFIG_AT91SAM9G45_LCD_BASE
CONFIG_AT91SAM9M10G45EK
-CONFIG_AT91SAM9RLEK
CONFIG_AT91SAM9_WATCHDOG
CONFIG_AT91_CAN
CONFIG_AT91_EFLASH
CONFIG_AT_TRANS
CONFIG_AUTO_ZRELADDR
CONFIG_BACKSIDE_L2_CACHE
-CONFIG_BARIX_IPAM390
CONFIG_BAT_PAIR
CONFIG_BAT_RW
CONFIG_BCH_CONST_M
CONFIG_BOARD_COMMON
CONFIG_BOARD_EARLY_INIT_R
CONFIG_BOARD_ECC_SUPPORT
-CONFIG_BOARD_H2200
CONFIG_BOARD_IS_OPENRD_BASE
CONFIG_BOARD_IS_OPENRD_CLIENT
CONFIG_BOARD_IS_OPENRD_ULTIMATE
CONFIG_CPLD_BR_PRELIM
CONFIG_CPLD_OR_PRELIM
CONFIG_CPM2
-CONFIG_CPUAT91
CONFIG_CPU_ARCHS34
CONFIG_CPU_ARMV8
CONFIG_CPU_CAVIUM_OCTEON
CONFIG_DA850_EVM_MAX_CPU_CLK
CONFIG_DA8XX_GPIO
CONFIG_DBAU1000
-CONFIG_DBAU1X00
CONFIG_DBGU
CONFIG_DBG_MONITOR
CONFIG_DB_784MP_GP
CONFIG_ENV_UBI_VOLUME_REDUND
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
CONFIG_ENV_VERSION
-CONFIG_EP9301
CONFIG_EP9302
CONFIG_EP9307
CONFIG_EP9312
CONFIG_EXYNOS5
CONFIG_EXYNOS5250
CONFIG_EXYNOS5420
-CONFIG_EXYNOS5800
CONFIG_EXYNOS5_DT
CONFIG_EXYNOS7420
CONFIG_EXYNOS_ACE_SHA
CONFIG_FORMIKE
CONFIG_FPGA_COUNT
CONFIG_FPGA_DELAY
-CONFIG_FPGA_SPARTAN3
CONFIG_FPGA_STRATIX_V
-CONFIG_FPGA_ZYNQPL
CONFIG_FSLDMAFEC
CONFIG_FSL_CADMUS
CONFIG_FSL_CORENET
CONFIG_KW88F6192
CONFIG_KW88F6281
CONFIG_KW88F6702
-CONFIG_KZM_A9_GT
CONFIG_L1_INIT_RAM
CONFIG_L2_CACHE
CONFIG_LAN91C96_USE_32_BIT
CONFIG_PB1000
CONFIG_PB1100
CONFIG_PB1500
-CONFIG_PB1X00
CONFIG_PCA953X
CONFIG_PCA9698
CONFIG_PCI1
CONFIG_PHY_MODE_NEED_CHANGE
CONFIG_PHY_RESET
CONFIG_PHY_RESET_DELAY
-CONFIG_PICOSAM
CONFIG_PIGGY_MAC_ADRESS_OFFSET
CONFIG_PIXIS_BRDCFG0_SPI
CONFIG_PIXIS_BRDCFG0_USB2
CONFIG_PLATFORM_ENV_SETTINGS
CONFIG_PLATINUM_BOARD
CONFIG_PLATINUM_CPU
-CONFIG_PLATINUM_PICON
CONFIG_PLATINUM_PROJECT
-CONFIG_PLATINUM_TITANIUM
CONFIG_PLL1_CLK_FREQ
CONFIG_PLL1_DIV2_CLK_FREQ
CONFIG_PM
-CONFIG_PM9261
-CONFIG_PM9263
-CONFIG_PM9G45
CONFIG_PMC_BR_PRELIM
CONFIG_PMC_OR_PRELIM
CONFIG_PMECC_CAP
CONFIG_SH_SDRAM_OFFSET
CONFIG_SH_SPI_BASE
CONFIG_SH_TMU_CLK_FREQ
-CONFIG_SIEMENS_DRACO
CONFIG_SIEMENS_MACH_TYPE
-CONFIG_SIEMENS_PXM2
-CONFIG_SIEMENS_RUT
CONFIG_SIMU
CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SMC_USE_32_BIT
CONFIG_SMC_USE_IOFUNCS
CONFIG_SMDK5420
-CONFIG_SMDKC100
-CONFIG_SMDKV310
CONFIG_SMP_PEN_ADDR
CONFIG_SMSC_LPC47M
CONFIG_SMSC_SIO1007
CONFIG_STANDALONE_LOAD_ADDR
CONFIG_STATIC_BOARD_REV
CONFIG_STD_DEVICES_SETTINGS
-CONFIG_STM32F4DISCOVERY
CONFIG_STM32_FLASH
CONFIG_STM32_HZ
CONFIG_STRIDER
CONFIG_SYS_CMXFCR_VALUE3
CONFIG_SYS_CORE_SRAM
CONFIG_SYS_CORE_SRAM_SIZE
-CONFIG_SYS_CORTEX_R4
CONFIG_SYS_CORTINA_FW_IN_MMC
CONFIG_SYS_CORTINA_FW_IN_NAND
CONFIG_SYS_CORTINA_FW_IN_NOR
CONFIG_SYS_I2C_TCA642X_BUS_NUM
CONFIG_SYS_I2C_TEGRA
CONFIG_SYS_I2C_W83782G_ADDR
-CONFIG_SYS_I2C_ZYNQ
-CONFIG_SYS_I2C_ZYNQ_SLAVE
-CONFIG_SYS_I2C_ZYNQ_SPEED
CONFIG_SYS_IBAT
CONFIG_SYS_IBAT0L
CONFIG_SYS_IBAT0U
CONFIG_SYS_MEMAC_LITTLE_ENDIAN
CONFIG_SYS_MEMORY_BASE
CONFIG_SYS_MEMORY_SIZE
-CONFIG_SYS_MEMORY_TOP
CONFIG_SYS_MEMTEST_END
CONFIG_SYS_MEMTEST_SCRATCH
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_SXCNFG_VAL
CONFIG_SYS_TBIPA_VALUE
CONFIG_SYS_TCLK
-CONFIG_SYS_TEXT_ADDR
CONFIG_SYS_TEXT_BASE_NOR
CONFIG_SYS_TEXT_BASE_SPL
CONFIG_SYS_TIMERBASE
CONFIG_X86_REFCODE_ADDR
CONFIG_X86_REFCODE_RUN_ADDR
CONFIG_XGI_XG22_BASE
-CONFIG_XILINX_GPIO
CONFIG_XILINX_SPI_IDLE_VAL
CONFIG_XILINX_TB_WATCHDOG
CONFIG_XR16L2751
CONFIG_ZYNQ_EEPROM
CONFIG_ZYNQ_EEPROM_BUS
CONFIG_ZYNQ_GEM_EEPROM_ADDR
-CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
CONFIG_ZYNQ_HISPD_BROKEN
-CONFIG_ZYNQ_I2C0
-CONFIG_ZYNQ_I2C1
CONFIG_ZYNQ_SDHCI0
CONFIG_ZYNQ_SDHCI1
-CONFIG_ZYNQ_SDHCI_MAX_FREQ
-CONFIG_ZYNQ_SDHCI_MIN_FREQ
CONFIG_eTSEC_MDIO_BUS
}
*cmd = '\0';
} else if (params->datafile) {
- /* dtc -I dts -O dtb -p 500 datafile > tmpfile */
- snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"",
- MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
+ /* dtc -I dts -O dtb -p 500 -o tmpfile datafile */
+ snprintf(cmd, sizeof(cmd), "%s %s -o \"%s\" \"%s\"",
+ MKIMAGE_DTC, params->dtc, tmpfile, params->datafile);
debug("Trying to execute \"%s\"\n", cmd);
} else {
snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"",