- TEST_PY_BD="sandbox"
BUILDMAN="^sandbox$"
TOOLCHAIN="x86_64"
+ - env:
+ - TEST_PY_BD="sandbox_spl"
+ TEST_PY_TEST_SPEC="test_ofplatdata"
+ BUILDMAN="^sandbox$"
+ TOOLCHAIN="x86_64"
+ - env:
+ - TEST_PY_BD="sandbox_flattree"
+ BUILDMAN="^sandbox_flattree$"
+ TOOLCHAIN="x86_64"
- env:
- TEST_PY_BD="vexpress_ca15_tc2"
TEST_PY_ID="--id qemu"
initial serial device and any others that are needed.
config SPL_SYS_MALLOC_F_LEN
- hex "Size of malloc() pool in spl before relocation"
+ hex "Size of malloc() pool in SPL before relocation"
+ depends on SYS_MALLOC_F
+ default SYS_MALLOC_F_LEN
+ help
+ Before relocation, memory is very limited on many platforms. Still,
+ we can provide a small malloc() pool if needed. Driver model in
+ particular needs this to operate, so that it can allocate the
+ initial serial device and any others that are needed.
+
+config TPL_SYS_MALLOC_F_LEN
+ hex "Size of malloc() pool in TPL before relocation"
depends on SYS_MALLOC_F
default SYS_MALLOC_F_LEN
help
source "dts/Kconfig"
+source "env/Kconfig"
+
source "net/Kconfig"
source "drivers/Kconfig"
VERSION = 2017
PATCHLEVEL = 09
SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
libs-y += drivers/usb/ulpi/
libs-y += cmd/
libs-y += common/
+libs-y += env/
libs-$(CONFIG_API) += api/
libs-$(CONFIG_HAS_POST) += post/
libs-y += test/
spl/u-boot-spl.bin: spl/u-boot-spl
@:
spl/u-boot-spl: tools prepare \
- $(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
+ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
+ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
$(Q)$(MAKE) obj=spl -f $(srctree)/scripts/Makefile.spl all
spl/sunxi-spl.bin: spl/u-boot-spl
false; \
fi
-env: scripts_basic
+environ: scripts_basic
$(Q)$(MAKE) $(build)=tools/$@
tools-only: scripts_basic $(version_h) $(timestamp_h)
$(Q)$(MAKE) $(build)=tools
tools-all: export HOST_TOOLS_ALL=y
-tools-all: env tools ;
+tools-all: environ tools ;
cross_tools: export CROSS_BUILD_TOOLS=y
cross_tools: tools ;
when no character is read on the console interface
within "Boot Delay" after reset.
- CONFIG_BOOTARGS
- This can be used to pass arguments to the bootm
- command. The value of CONFIG_BOOTARGS goes into the
- environment value "bootargs".
-
CONFIG_RAMBOOT and CONFIG_NFSBOOT
The value of these goes into the environment as
"ramboot" and "nfsboot" respectively, and can be used
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
-- Monitor Functions:
- Monitor commands can be included or excluded
- from the build by using the #include files
- <config_cmd_all.h> and #undef'ing unwanted
- commands, or adding #define's for wanted commands.
-
- The default command configuration includes all commands
- except those marked below with a "*".
-
- CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
- CONFIG_CMD_ASKENV * ask for env variable
- CONFIG_CMD_BDI bdinfo
- CONFIG_CMD_BOOTD bootd
- CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
- CONFIG_CMD_CACHE * icache, dcache
- CONFIG_CMD_CONSOLE coninfo
- CONFIG_CMD_DHCP * DHCP support
- CONFIG_CMD_DIAG * Diagnostics
- CONFIG_CMD_ECHO echo arguments
- CONFIG_CMD_EDITENV edit env variable
- CONFIG_CMD_ELF * bootelf, bootvx
- CONFIG_CMD_ENV_EXISTS * check existence of env variable
- CONFIG_CMD_EXPORTENV * export the environment
- CONFIG_CMD_EXT2 * ext2 command support
- CONFIG_CMD_EXT4 * ext4 command support
- CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
- that work for multiple fs types
- CONFIG_CMD_FS_UUID * Look up a filesystem UUID
- CONFIG_CMD_SAVEENV saveenv
- CONFIG_CMD_FLASH flinfo, erase, protect
- CONFIG_CMD_FPGA FPGA device initialization support
- CONFIG_CMD_GO * the 'go' command (exec code)
- CONFIG_CMD_GREPENV * search environment
- CONFIG_CMD_I2C * I2C serial bus support
- CONFIG_CMD_IMI iminfo
- CONFIG_CMD_IMLS List all images found in NOR flash
- CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
- CONFIG_CMD_IMPORTENV * import an environment
- CONFIG_CMD_INI * import data from an ini file into the env
- CONFIG_CMD_ITEST Integer/string test of 2 values
- CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
- CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
- (169.254.*.*)
- CONFIG_CMD_LOADB loadb
- CONFIG_CMD_LOADS loads
- CONFIG_CMD_MD5SUM * print md5 message digest
- (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
- CONFIG_CMD_MEMINFO * Display detailed memory information
- CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
- loop, loopw
- CONFIG_CMD_MEMTEST * mtest
- CONFIG_CMD_MISC Misc functions like sleep etc
- CONFIG_CMD_MMC * MMC memory mapped support
- CONFIG_CMD_MII * MII utility commands
- CONFIG_CMD_NET bootp, tftpboot, rarpboot
- CONFIG_CMD_NFS NFS support
- CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
- CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
- CONFIG_CMD_PCI * pciinfo
- CONFIG_CMD_PCMCIA * PCMCIA support
- CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
- host
- CONFIG_CMD_PORTIO * Port I/O
- CONFIG_CMD_READ * Read raw data from partition
- CONFIG_CMD_REGINFO * Register dump
- CONFIG_CMD_RUN run command in env variable
- CONFIG_CMD_SANDBOX * sb command to access sandbox features
- CONFIG_CMD_SAVES * save S record dump
- CONFIG_CMD_SDRAM * print SDRAM configuration information
- (requires CONFIG_CMD_I2C)
- CONFIG_CMD_SF * Read/write/erase SPI NOR flash
- CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
- CONFIG_CMD_SOURCE "source" command Support
- CONFIG_CMD_SPI * SPI serial bus support
- CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
- CONFIG_CMD_TFTPPUT * TFTP put command (upload)
- CONFIG_CMD_TIME * run command and report execution time (ARM specific)
- CONFIG_CMD_TIMER * access to the system tick timer
- CONFIG_CMD_USB * USB support
- CONFIG_CMD_CDP * Cisco Discover Protocol support
- CONFIG_CMD_MFSL * Microblaze FSL support
- CONFIG_CMD_XIMG Load part of Multi Image
- CONFIG_CMD_UUID * Generate random UUID or GUID string
-
- EXAMPLE: If you want all functions except of network
- support you can write:
-
- #include "config_cmd_all.h"
- #undef CONFIG_CMD_NET
-
- Other Commands:
- fdt (flattened device tree) command: CONFIG_OF_LIBFDT
-
- Note: Don't enable the "icache" and "dcache" commands
- (configuration option CONFIG_CMD_CACHE) unless you know
- what you (and your U-Boot users) are doing. Data
- cache cannot be enabled on systems like the
- 8xx (where accesses to the IMMR region must be
- uncached), and it cannot be disabled on all other
- systems where we (mis-) use the data cache to hold an
- initial stack and some data.
-
-
- XXX - this list needs to get updated!
-
- Removal of commands
If no commands are needed to boot, you can disable
CONFIG_CMDLINE to remove them. In this case, the command line
Allow generic access to the SPI bus on the Intel 8257x, for
example with the "sspi" command.
- CONFIG_CMD_E1000
- Management command for E1000 devices. When used on devices
- with SPI support you can reprogram the EEPROM from U-Boot.
-
CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
to. Contemporary x86 systems usually map it at
0xfed40000.
- CONFIG_CMD_TPM
- Add tpm monitor functions.
- Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
- provides monitor access to authorized functions.
-
CONFIG_TPM
Define this to enable the TPM support library which provides
functional interfaces to some TPM commands.
CONFIG_USB_FUNCTION_DFU
This enables the USB portion of the DFU USB class
- CONFIG_CMD_DFU
- This enables the command "dfu" which is used to have
- U-Boot create a DFU class device via USB. This command
- requires that the "dfu_alt_info" environment variable be
- set and define the alt settings to expose to the host.
-
CONFIG_DFU_MMC
This enables support for exposing (e)MMC devices via DFU.
CONFIG_USB_FUNCTION_FASTBOOT
This enables the USB part of the fastboot gadget
- CONFIG_CMD_FASTBOOT
- This enables the command "fastboot" which enables the Android
- fastboot mode for the platform's USB device. Fastboot is a USB
- protocol for downloading images, flashing and device control
- used on Android devices.
- See doc/README.android-fastboot for more information.
-
CONFIG_ANDROID_BOOT_IMAGE
This enables support for booting images which use the Android
image format header.
commands cp, md...
- Serial Flash support
- CONFIG_CMD_SF
-
- Defining this option enables SPI flash commands
- 'sf probe/read/write/erase/update'.
-
- Usage requires an initial 'probe' to define the serial
+ Usage requires an initial 'sf probe' to define the serial
flash parameters, followed by read/write/erase/update
commands.
CONFIG_SF_DEFAULT_MODE (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED in Hz
- CONFIG_CMD_SF_TEST
-
- Define this option to include a destructive SPI flash
- test ('sf test').
-
-- SystemACE Support:
CONFIG_SYSTEMACE
Adding this option adds support for Xilinx SystemACE
Please note that the environment is read-only until the monitor
has been relocated to RAM and a RAM copy of the environment has been
-created; also, when using EEPROM you will have to use getenv_f()
+created; also, when using EEPROM you will have to use env_get_f()
until then to read environment variables.
The environment is protected by a CRC32 checksum. Before the monitor
- CONFIG_LOOPW
Add the "loopw" memory command. This only takes effect if
- the memory commands are activated globally (CONFIG_CMD_MEM).
+ the memory commands are activated globally (CONFIG_CMD_MEMORY).
- CONFIG_MX_CYCLIC
Add the "mdc" and "mwc" memory commands. These are cyclic
This command will write 12345678 to address 100 all 10 ms.
This only takes effect if the memory commands are activated
- globally (CONFIG_CMD_MEM).
+ globally (CONFIG_CMD_MEMORY).
- CONFIG_SKIP_LOWLEVEL_INIT
[ARM, NDS32, MIPS only] If this variable is defined, then certain
if ((value = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
- *value = getenv(name);
+ *value = env_get(name);
return 0;
}
if ((value = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
- setenv(name, value);
+ env_set(name, value);
return 0;
}
void api_init(void)
{
- struct api_signature *sig = NULL;
+ struct api_signature *sig;
/* TODO put this into linker set one day... */
calls_table[API_RSVD] = NULL;
return;
}
- setenv_hex("api_address", (unsigned long)sig);
+ env_set_hex("api_address", (unsigned long)sig);
debugf("API sig @ 0x%lX\n", (unsigned long)sig);
memcpy(sig->magic, API_SIG_MAGIC, 8);
sig->version = API_SIG_VERSION;
imply LZMA
imply SCSI
imply CMD_SATA
+ imply CMD_SF_TEST
config SH
bool "SuperH architecture"
imply CMD_GETTIME
imply CMD_IO
imply CMD_IRQ
+ imply CMD_SF_TEST
+ imply CMD_ZBOOT
config XTENSA
bool "Xtensa architecture"
r2 = (unsigned int)images->ft_addr;
} else {
r0 = 1;
- r2 = (unsigned int)getenv("bootargs");
+ r2 = (unsigned int)env_get("bootargs");
}
smp_set_core_boot_addr((unsigned long)kernel_entry, -1);
config ARM_ERRATA_833471
bool
+config ARM_ERRATA_845369
+ bool
+
config ARM_ERRATA_852421
bool
config ARCH_DAVINCI
bool "TI DaVinci"
select CPU_ARM926EJS
+ imply CMD_SAVES
help
Support for TI's DaVinci platform.
bool "Support spear300"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_SPEAR310
bool "Support spear310"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_SPEAR320
bool "Support spear320"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_SPEAR600
bool "Support spear600"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_STV0991
bool "Support stv0991"
select DM_GPIO
select OF_CONTROL
imply FAT_WRITE
- imply ENV_IS_IN_FAT
config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
select CMD_POWEROFF
imply CMD_MTDPARTS
imply FIT
+ imply CMD_SAVES
config ARCH_OMAP2PLUS
bool "TI OMAP2+"
select SYS_FSL_SEC_LE
select SYS_THUMB_BUILD if SPL
+if ARCH_MX6
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+endif
+
config ARCH_MX5
bool "Freescale MX5"
select CPU_V7
select CPU_V7
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
+ imply NAND
config ARCH_ZYNQ
bool "Xilinx Zynq Platform"
select DM_GPIO
select SPL_DM if SPL
select DM_MMC
- select DM_MMC_OPS
select DM_SPI
select DM_SERIAL
select DM_SPI_FLASH
select CLK_ZYNQ
imply CMD_CLK
imply FAT_WRITE
+ imply CMD_SPL
config ARCH_ZYNQMP
bool "Support Xilinx ZynqMP Platform"
select SPL_PINCTRL if SPL
select SUPPORT_SPL
imply FAT_WRITE
- imply ENV_IS_IN_MMC
help
Support for UniPhier SoC family developed by Socionext Inc.
(formerly, System LSI Business Division of Panasonic Corporation)
select DM_GPIO
select DM_I2C
select DM_MMC
- select DM_MMC_OPS
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
source "arch/arm/Kconfig.debug"
endmenu
+
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if TARGET_APX4DEVKIT || TARGET_BG0900 || TARGET_M28EVK || TARGET_MX23_OLINUXINO || TARGET_MX23EVK || TARGET_MX28EVK || TARGET_SANSA_FUZE_PLUS || TARGET_SC_SPS_1 || TARGET_TS4600 || TARGET_XFI3
+ default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
+ default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
+
+
u32 spl_boot_device(void)
{
- u32 mode;
+ u32 mode = 0;
/* Currently only SNOR is supported as the only */
if (snor_boot_selected()) {
{
unsigned long rate;
- debug("%s: %s\n", __func__, c->name);
if (!c || !c->ops || !c->ops->get_rate)
return 0;
+ debug("%s: %s\n", __func__, c->name);
rate = c->ops->get_rate(c);
debug("%s: rate = %ld\n", __func__, rate);
{
int ret;
- debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (!c || !c->ops || !c->ops->set_rate)
return -EINVAL;
+ debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (c->use_cnt)
return -EINVAL;
{
unsigned long rate;
- debug("%s: %s\n", __func__, c->name);
if (!c || !c->ops || !c->ops->get_rate)
return 0;
+ debug("%s: %s\n", __func__, c->name);
rate = c->ops->get_rate(c);
debug("%s: rate = %ld\n", __func__, rate);
{
int ret;
- debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (!c || !c->ops || !c->ops->set_rate)
return -EINVAL;
+ debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (c->use_cnt)
return -EINVAL;
select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE
imply SCSI
+ imply CMD_PCI
menu "LS102xA architecture"
depends on ARCH_LS1021A
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
+#ifdef CONFIG_ARM_ERRATA_845369
+ mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
+ orr r0, r0, #1 << 22 @ set bit #22
+ mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
+#endif
+
mov r5, lr @ Store my Caller
mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR)
mov r3, r1, lsr #20 @ get variant field
strcpy(soc, "vf");
strcat(soc, soc_type);
- setenv("soc", soc);
+ env_set("soc", soc);
return 0;
}
break;
case DEVICE_NON_SHARED:
attr = (2 << TEX_SHIFT) | BUFFERABLE;
+ break;
default:
attr = 0; /* strongly ordered */
break;
extra-y := start.o
obj-y += cpu.o
+ifndef CONFIG_$(SPL_TPL_)TIMER
obj-y += generic_timer.o
+endif
obj-y += cache_v8.o
obj-y += exceptions.o
obj-y += cache.o
* x1: 0 clean & invalidate, 1 invalidate only
* x2~x9: clobbered
*/
+.pushsection .text.__asm_dcache_level, "ax"
ENTRY(__asm_dcache_level)
lsl x12, x0, #1
msr csselr_el1, x12 /* select cache level */
ret
ENDPROC(__asm_dcache_level)
+.popsection
/*
* void __asm_flush_dcache_all(int invalidate_only)
*
* flush or invalidate all data cache by SET/WAY.
*/
+.pushsection .text.__asm_dcache_all, "ax"
ENTRY(__asm_dcache_all)
mov x1, x0
dsb sy
finished:
ret
ENDPROC(__asm_dcache_all)
+.popsection
+.pushsection .text.__asm_flush_dcache_all, "ax"
ENTRY(__asm_flush_dcache_all)
mov x0, #0
b __asm_dcache_all
ENDPROC(__asm_flush_dcache_all)
+.popsection
+.pushsection .text.__asm_invalidate_dcache_all, "ax"
ENTRY(__asm_invalidate_dcache_all)
mov x0, #0x1
b __asm_dcache_all
ENDPROC(__asm_invalidate_dcache_all)
+.popsection
/*
* void __asm_flush_dcache_range(start, end)
* x0: start address
* x1: end address
*/
+.pushsection .text.__asm_flush_dcache_range, "ax"
ENTRY(__asm_flush_dcache_range)
mrs x3, ctr_el0
lsr x3, x3, #16
dsb sy
ret
ENDPROC(__asm_flush_dcache_range)
+.popsection
/*
* void __asm_invalidate_dcache_range(start, end)
*
* x0: start address
* x1: end address
*/
+.pushsection .text.__asm_invalidate_dcache_range, "ax"
ENTRY(__asm_invalidate_dcache_range)
mrs x3, ctr_el0
ubfm x3, x3, #16, #19
dsb sy
ret
ENDPROC(__asm_invalidate_dcache_range)
+.popsection
/*
* void __asm_invalidate_icache_all(void)
*
* invalidate all tlb entries.
*/
+.pushsection .text.__asm_invalidate_icache_all, "ax"
ENTRY(__asm_invalidate_icache_all)
ic ialluis
isb sy
ret
ENDPROC(__asm_invalidate_icache_all)
+.popsection
+.pushsection .text.__asm_invalidate_l3_dcache, "ax"
ENTRY(__asm_invalidate_l3_dcache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_invalidate_l3_dcache)
.weak __asm_invalidate_l3_dcache
+.popsection
+.pushsection .text.__asm_flush_l3_dcache, "ax"
ENTRY(__asm_flush_l3_dcache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_flush_l3_dcache)
.weak __asm_flush_l3_dcache
+.popsection
+.pushsection .text.__asm_invalidate_l3_icache, "ax"
ENTRY(__asm_invalidate_l3_icache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_invalidate_l3_icache)
.weak __asm_invalidate_l3_icache
+.popsection
/*
* void __asm_switch_ttbr(ulong new_ttbr)
*
* Safely switches to a new page table.
*/
+.pushsection .text.__asm_switch_ttbr, "ax"
ENTRY(__asm_switch_ttbr)
/* x2 = SCTLR (alive throghout the function) */
switch_el x4, 3f, 2f, 1f
ret x3
ENDPROC(__asm_switch_ttbr)
+.popsection
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
imply SCSI
+ imply CMD_PCI
config ARCH_LS1046A
bool
default 2
help
This is the divider that is used to derive DSPI clock from Platform
- PLL, in another word DSPI_clk = Platform_PLL_freq / this_divider.
+ clock, in another word DSPI_clk = Platform_clk / this_divider.
config SYS_FSL_DUART_CLK_DIV
int "DUART clock divider"
help
Reserved memory needs to be aligned for MC to use. Default value
is 512MB.
+
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
static unsigned long get_internval_val_mhz(void)
{
- char *interval = getenv(PLATFORM_CYCLE_ENV_VAR);
+ char *interval = env_get(PLATFORM_CYCLE_ENV_VAR);
/*
* interval is the number of platform cycles(MHz) between
* wake up events generated by EPU.
* void __asm_invalidate_tlb_all(void)
*
* invalidate all tlb entries.
- */
+*/
+.pushsection .text.__asm_invalidate_tlb_all, "ax"
ENTRY(__asm_invalidate_tlb_all)
switch_el x9, 3f, 2f, 1f
3: tlbi alle3
0:
ret
ENDPROC(__asm_invalidate_tlb_all)
+.popsection
#include <linux/linkage.h>
#include <asm/macro.h>
+.pushsection .text.armv8_switch_to_el2, "ax"
ENTRY(armv8_switch_to_el2)
switch_el x6, 1f, 0f, 0f
0:
br x4
1: armv8_switch_to_el2_m x4, x5, x6
ENDPROC(armv8_switch_to_el2)
+.popsection
+.pushsection .text.armv8_switch_to_el1, "ax"
ENTRY(armv8_switch_to_el1)
switch_el x6, 0f, 1f, 0f
0:
br x4
1: armv8_switch_to_el1_m x4, x5, x6
ENDPROC(armv8_switch_to_el1)
+.popsection
+.pushsection .text.armv8_el2_to_aarch32, "ax"
WEAK(armv8_el2_to_aarch32)
ret
ENDPROC(armv8_el2_to_aarch32)
+.popsection
rk3288-veyron-mickey.dtb \
rk3288-veyron-minnie.dtb \
rk3328-evb.dtb \
+ rk3368-lion.dtb \
rk3368-sheep.dtb \
rk3368-geekbox.dtb \
rk3368-px5-evb.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-bananapi-m64.dtb \
+ sun50i-a64-nanopi-a64.dtb \
+ sun50i-a64-olinuxino.dtb \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb
imx6sll-evk.dtb \
imx6dl-icore.dtb \
imx6dl-icore-rqs.dtb \
+ imx6q-cm-fx6.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
imx6q-logicpd.dtb \
--- /dev/null
+/*
+ * Copyright 2013 CompuLab Ltd.
+ *
+ * Author: Valentin Raevsky <valentin@compulab.co.il>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6q.dtsi"
+
+/ {
+ model = "CompuLab CM-FX6";
+ compatible = "compulab,cm-fx6", "fsl,imx6q";
+
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ heartbeat-led {
+ label = "Heartbeat";
+ gpios = <&gpio2 31 0>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+};
+
+&iomuxc {
+ imx6q-cm-fx6 {
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+ };
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&usdhc3 {
+ status = "okay";
+};
status = "okay";
};
+&sdmmc {
+ status = "okay";
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ disable-wp;
+ num-slots = <1>;
+ supports-sd;
+};
+
&uart2 {
status = "okay";
};
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
+ mmc0 = &emmc;
+ mmc1 = &sdmmc;
};
cpus {
status = "disabled";
};
+ sdmmc: dwmmc@30000000 {
+ compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x30000000 0x4000>;
+ max-frequency = <150000000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+ fifo-depth = <0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ status = "disabled";
+ };
+
+ sdio: dwmmc@30010000 {
+ compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x30010000 0x4000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+ <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+ fifo-depth = <0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+ status = "disabled";
+ };
+
emmc: dwmmc@30020000 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x30020000 0x4000>;
+ max-frequency = <150000000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <37500000>;
- max-frequency = <37500000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
drive-strength = <12>;
};
+ sdmmc {
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <1 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <1 20 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <1 21 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+ };
+
+ sdio {
+ sdio_clk: sdio-clk {
+ rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdio_cmd: sdio-cmd {
+ rockchip,pins = <3 1 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdio_bus4: sdio-bus4 {
+ rockchip,pins = <3 2 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <3 3 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <3 4 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <3 5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+ };
+
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/ {
+ config {
+ u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
+ u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ u-boot,spl-boot-order = &emmc, &sdmmc;
+ };
+
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+
+ /*
+ * Validation of throughput using SPEC2000 shows the following
+ * relative performance for the different memory schedules:
+ * - CBDR: 30.1
+ * - CBRD: 29.8
+ * - CRBD: 29.9
+ * Note that the best performance for any given application workload
+ * may vary from the default configured here (e.g. 164.gzip is fastest
+ * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD).
+ *
+ * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
+ * details on the 'rockchip,memory-schedule' property and how it
+ * affects the physical-address to device-address mapping.
+ */
+ rockchip,memory-schedule = <DMC_MSCH_CBDR>;
+ rockchip,ddr-frequency = <800000000>;
+ rockchip,ddr-speed-bin = <DDR3_1600K>;
+
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&sgrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+};
+
+&emmc {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+ u-boot,dm-pre-reloc;
+};
+
+&spi1 {
+ u-boot,dm-pre-reloc;
+
+ spiflash: w25q32dw@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&timer0 {
+ u-boot,dm-pre-reloc;
+ clock-frequency = <24000000>;
+};
+
+
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include "rk3368.dtsi"
+#include "rk3368-lion-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Theobroma Systems RK3368-uQ7 SoM";
+ compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368";
+
+ aliases {
+ mmc0 = &emmc;
+ mmc1 = &sdmmc;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ ext_gmac: gmac-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ #clock-cells = <0>;
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&emmc {
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ clock-frequency = <150000000>;
+ disable-wp;
+ keep-power-in-suspend;
+ non-removable;
+ num-slots = <1>;
+ vmmc-supply = <&vcc33_io>;
+ vqmmc-supply = <&vcc18_io>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+};
+
+&sdmmc {
+ status = "okay";
+};
+
+&gmac {
+ status = "okay";
+ phy-supply = <&vcc33_io>;
+ phy-mode = "rgmii";
+ clock_in_out = "input";
+ snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <2 10000 50000>;
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ tx_delay = <0x10>;
+ rx_delay = <0x10>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ rockchip,system-power-controller;
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_sys>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc_sys>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ #clock-cells = <1>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_cpu";
+ };
+
+ vdd_log: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_log";
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ };
+
+ vcc33_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_io";
+ };
+
+ vcc33_video: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_video";
+ };
+
+ vdd10_pll: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_pll";
+ };
+
+ vcc18_io: LDO_REG4 {
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_io";
+ };
+
+ vdd10_video: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_video";
+ };
+
+ vcc18_video: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_video";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spiflash: w25q32dw@0 {
+ compatible = "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <49500000>;
+ spi-cpol;
+ spi-cpha;
+ };
+};
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart4 {
+ u-boot,dm-pre-reloc;
+};
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/memory/rk3368-dmc.h>
/ {
compatible = "rockchip,rk3368";
#clock-cells = <0>;
};
+ dmc: dmc@ff610000 {
+ compatible = "rockchip,rk3368-dmc", "syscon";
+ rockchip,cru = <&cru>;
+ rockchip,grf = <&grf>;
+ rockchip,msch = <&service_msch>;
+ reg = <0 0xff610000 0 0x400
+ 0 0xff620000 0 0x400>;
+ };
+
+ service_msch: syscon@ffac0000 {
+ compatible = "rockchip,rk3368-msch", "syscon";
+ reg = <0x0 0xffac0000 0x0 0x2000>;
+ status = "okay";
+ };
+
sdmmc: dwmmc@ff0c0000 {
compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff0c0000 0x0 0x4000>;
status = "disabled";
};
- dmc: dmc@ff610000 {
- u-boot,dm-pre-reloc;
- compatible = "rockchip,rk3368-dmc", "syscon";
- reg = <0x0 0xff610000 0x0 0x1000>;
- };
-
i2c0: i2c@ff650000 {
compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
reg = <0x0 0xff650000 0x0 0x1000>;
};
pmugrf: syscon@ff738000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3368-pmugrf", "syscon";
reg = <0x0 0xff738000 0x0 0x1000>;
};
+ sgrf: syscon@ff740000 {
+ compatible = "rockchip,rk3368-sgrf", "syscon";
+ reg = <0x0 0xff740000 0x0 0x1000>;
+ };
+
cru: clock-controller@ff760000 {
compatible = "rockchip,rk3368-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
status = "disabled";
};
- timer@ff810000 {
+ timer0: timer@ff810000 {
compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
reg = <0x0 0xff810000 0x0 0x20>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
rx_delay = <0x10>;
status = "okay";
};
-
-&gmac {
- phy-supply = <&vcc_phy>;
- phy-mode = "rgmii";
- clock_in_out = "input";
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- tx_delay = <0x10>;
- rx_delay = <0x10>;
- status = "okay";
-};
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
+ tx_delay = <0x33>;
+ rx_delay = <0x45>;
status = "okay";
};
--- /dev/null
+/*
+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "FriendlyARM NanoPi A64";
+ compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+/* i2c1 connected with gpio headers like pine64, bananapi */
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+};
+
+&i2c1_pins {
+ bias-pull-up;
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
--- /dev/null
+/*
+ * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Olimex A64-Olinuxino";
+ compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
#phy-cells = <1>;
};
+ ehci0: usb@01c1a000 {
+ compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
+ reg = <0x01c1a000 0x100>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI0>,
+ <&ccu CLK_BUS_EHCI0>,
+ <&ccu CLK_USB_OHCI0>;
+ resets = <&ccu RST_BUS_OHCI0>,
+ <&ccu RST_BUS_EHCI0>;
+ status = "disabled";
+ };
+
+ ohci0: usb@01c1a400 {
+ compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
+ reg = <0x01c1a400 0x100>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI0>,
+ <&ccu CLK_USB_OHCI0>;
+ resets = <&ccu RST_BUS_OHCI0>;
+ status = "disabled";
+ };
+
ehci1: usb@01c1b000 {
compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
reg = <0x01c1b000 0x100>;
};
&pio {
- mmc2_pins_nrst: mmc2@0 {
+ mmc2_pins_nrst: mmc2-rst-pin {
allwinner,pins = "PC16";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
status = "okay";
};
- hdmi_ddc: i2c@7000c400 {
- clock-frequency = <100000>;
- };
-
/*
* GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
* board)
*/
i2c@7000c000 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
pcie-switch@58 {
compatible = "plx,pex8605";
*/
hdmi_ddc: i2c@7000c400 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <10000>;
};
/*
*/
i2c@7000c500 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
};
/* I2C4 (DDC): unused */
*/
i2c@7000c000 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
};
/* GEN2_I2C: unused */
/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
i2c@7000c400 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <10000>;
};
/*
*/
i2c@7000c000 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
};
/* GEN2_I2C: unused */
*/
i2c@7000c500 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
};
/* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
i2c@7000c700 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <10000>;
};
/*
*/
i2c@7000c000 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
};
/* GEN2_I2C: unused */
/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
i2c@7000c700 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <10000>;
};
/*
#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000)
#define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000)
#define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000)
+#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000)
#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000)
#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000)
#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000)
MX6_PAD_DECL(SD3_DAT4__UART2_TX_DATA, 0x069C, 0x02B4, 1, 0x0000, 0, 0)
MX6_PAD_DECL(SD3_DAT4__UART2_RX_DATA, 0x069C, 0x02B4, 1, 0x0928, 5, 0)
MX6_PAD_DECL(SD3_DAT4__GPIO7_IO01, 0x069C, 0x02B4, 5, 0x0000, 0, 0)
-MX6_PAD_DECL(SD3_CMD__SD3_CMD, 0x06A0, 0x02B8, 16, 0x0000, 0, 0)
+MX6_PAD_DECL(SD3_CMD__SD3_CMD, 0x06A0, 0x02B8, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(SD3_CMD__UART2_CTS_B, 0x06A0, 0x02B8, 1, 0x0000, 0, 0)
MX6_PAD_DECL(SD3_CMD__UART2_RTS_B, 0x06A0, 0x02B8, 1, 0x0924, 2, 0)
MX6_PAD_DECL(SD3_CMD__FLEXCAN1_TX, 0x06A0, 0x02B8, 2, 0x0000, 0, 0)
MX6_PAD_DECL(NANDF_CS3__EIM_ADDR26, 0x06D8, 0x02F0, 3, 0x0000, 0, 0)
MX6_PAD_DECL(NANDF_CS3__GPIO6_IO16, 0x06D8, 0x02F0, 5, 0x0000, 0, 0)
MX6_PAD_DECL(NANDF_CS3__IPU2_SISG1, 0x06D8, 0x02F0, 6, 0x0000, 0, 0)
-MX6_PAD_DECL(SD4_CMD__SD4_CMD, 0x06DC, 0x02F4, 16, 0x0000, 0, 0)
+MX6_PAD_DECL(SD4_CMD__SD4_CMD, 0x06DC, 0x02F4, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(SD4_CMD__NAND_RE_B, 0x06DC, 0x02F4, 1, 0x0000, 0, 0)
MX6_PAD_DECL(SD4_CMD__UART3_TX_DATA, 0x06DC, 0x02F4, 2, 0x0000, 0, 0)
MX6_PAD_DECL(SD4_CMD__UART3_RX_DATA, 0x06DC, 0x02F4, 2, 0x0930, 2, 0)
MX6_PAD_DECL(SD1_DAT3__WDOG2_B, 0x072C, 0x0344, 4, 0x0000, 0, 0)
MX6_PAD_DECL(SD1_DAT3__GPIO1_IO21, 0x072C, 0x0344, 5, 0x0000, 0, 0)
MX6_PAD_DECL(SD1_DAT3__WDOG2_RESET_B_DEB, 0x072C, 0x0344, 6, 0x0000, 0, 0)
-MX6_PAD_DECL(SD1_CMD__SD1_CMD, 0x0730, 0x0348, 16, 0x0000, 0, 0)
+MX6_PAD_DECL(SD1_CMD__SD1_CMD, 0x0730, 0x0348, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(SD1_CMD__ECSPI5_MOSI, 0x0730, 0x0348, 1, 0x0830, 0, 0)
MX6_PAD_DECL(SD1_CMD__PWM4_OUT, 0x0730, 0x0348, 2, 0x0000, 0, 0)
MX6_PAD_DECL(SD1_CMD__GPT_COMPARE1, 0x0730, 0x0348, 3, 0x0000, 0, 0)
MX6_PAD_DECL(SD2_CLK__KEY_COL5, 0x073C, 0x0354, 2, 0x08E8, 3, 0)
MX6_PAD_DECL(SD2_CLK__AUD4_RXFS, 0x073C, 0x0354, 3, 0x07C0, 1, 0)
MX6_PAD_DECL(SD2_CLK__GPIO1_IO10, 0x073C, 0x0354, 5, 0x0000, 0, 0)
-MX6_PAD_DECL(SD2_CMD__SD2_CMD, 0x0740, 0x0358, 16, 0x0000, 0, 0)
+MX6_PAD_DECL(SD2_CMD__SD2_CMD, 0x0740, 0x0358, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(SD2_CMD__ECSPI5_MOSI, 0x0740, 0x0358, 1, 0x0830, 1, 0)
MX6_PAD_DECL(SD2_CMD__KEY_ROW5, 0x0740, 0x0358, 2, 0x08F4, 2, 0)
MX6_PAD_DECL(SD2_CMD__AUD4_RXC, 0x0740, 0x0358, 3, 0x07BC, 1, 0)
#define VDD_MPU_ES2_HIGH 1250
#define VDD_MM_ES2_OD 1120
-#define VDD_MPU_ES2_LOW 880
-#define VDD_MM_ES2_LOW 880
+/* Efuse register offsets for OMAP5 platform */
+#define OMAP5_ES2_EFUSE_BASE 0x4A002000
+#define OMAP5_ES2_PROD_REGBITS 16
+
+/* CONTROL_STD_FUSE_OPP_VDD_CORE_3 */
+#define OMAP5_ES2_PROD_CORE_OPNO_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1D8)
+
+/* CONTROL_STD_FUSE_OPP_VDD_MM_4 */
+#define OMAP5_ES2_PROD_MM_OPNO_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1A4)
+/* CONTROL_STD_FUSE_OPP_VDD_MM_5 */
+#define OMAP5_ES2_PROD_MM_OPOD_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1A8)
+/* CONTROL_STD_FUSE_OPP_VDD_MPU_6 */
+#define OMAP5_ES2_PROD_MPU_OPNO_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1C4)
+/* CONTROL_STD_FUSE_OPP_VDD_MPU_7 */
+#define OMAP5_ES2_PROD_MPU_OPHI_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1C8)
/* DRA74x/75x/72x voltage settings in mv for OPP_NOM per DM */
#define VDD_MPU_DRA7_NOM 1150
#define OMAP_ABB_GPU_TXDONE_MASK (0x1 << 28)
/* ABB efuse masks */
-#define OMAP5_ABB_FUSE_VSET_MASK (0x1F << 24)
-#define OMAP5_ABB_FUSE_ENABLE_MASK (0x1 << 29)
+#define OMAP5_PROD_ABB_FUSE_VSET_MASK (0x1F << 20)
+#define OMAP5_PROD_ABB_FUSE_ENABLE_MASK (0x1 << 25)
#define DRA7_ABB_FUSE_VSET_MASK (0x1F << 20)
#define DRA7_ABB_FUSE_ENABLE_MASK (0x1 << 25)
#define OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK (0x1 << 10)
/* CRU_CLKSEL11_CON */
EMMC_PLL_SHIFT = 12,
EMMC_PLL_MASK = 3 << EMMC_PLL_SHIFT,
- EMMC_SEL_APLL = 0,
- EMMC_SEL_DPLL,
+ EMMC_SEL_CPLL = 0,
EMMC_SEL_GPLL,
EMMC_SEL_24M,
SDIO_PLL_SHIFT = 10,
SDIO_PLL_MASK = 3 << SDIO_PLL_SHIFT,
- SDIO_SEL_APLL = 0,
- SDIO_SEL_DPLL,
+ SDIO_SEL_CPLL = 0,
SDIO_SEL_GPLL,
SDIO_SEL_24M,
MMC0_PLL_SHIFT = 8,
MMC0_PLL_MASK = 3 << MMC0_PLL_SHIFT,
- MMC0_SEL_APLL = 0,
- MMC0_SEL_DPLL,
+ MMC0_SEL_CPLL = 0,
MMC0_SEL_GPLL,
MMC0_SEL_24M,
MMC0_DIV_SHIFT = 0,
EMMC_PLL_SELECT_24MHZ,
EMMC_DIV_SHIFT = 8,
- EMMC_DIV_MASK = 0x3f < EMMC_DIV_SHIFT,
+ EMMC_DIV_MASK = 0x3f << EMMC_DIV_SHIFT,
SDIO0_PLL_SHIFT = 6,
SDIO0_PLL_MASK = 3 << SDIO0_PLL_SHIFT,
MCU_CLK_DIV_SHIFT = 0,
MCU_CLK_DIV_MASK = GENMASK(4, 0),
+ /* CLKSEL43_CON */
+ GMAC_MUX_SEL_EXTCLK = BIT(8),
+
/* CLKSEL51_CON */
MMC_PLL_SEL_SHIFT = 8,
MMC_PLL_SEL_MASK = GENMASK(9, 8),
- MMC_PLL_SEL_CPLL = 0,
- MMC_PLL_SEL_GPLL,
- MMC_PLL_SEL_USBPHY_480M,
- MMC_PLL_SEL_24M,
+ MMC_PLL_SEL_CPLL = (0 << MMC_PLL_SEL_SHIFT),
+ MMC_PLL_SEL_GPLL = (1 << MMC_PLL_SEL_SHIFT),
+ MMC_PLL_SEL_USBPHY_480M = (2 << MMC_PLL_SEL_SHIFT),
+ MMC_PLL_SEL_24M = (3 << MMC_PLL_SEL_SHIFT),
MMC_CLK_DIV_SHIFT = 0,
MMC_CLK_DIV_MASK = GENMASK(6, 0),
/* SOFTRST1_CON */
MCU_PO_SRST_MASK = BIT(13),
MCU_SYS_SRST_MASK = BIT(12),
+ DMA1_SRST_REQ = BIT(2),
+
+ /* SOFTRST4_CON */
+ DMA2_SRST_REQ = BIT(0),
/* GLB_RST_CON */
PMU_GLB_SRST_CTRL_SHIFT = 2,
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __ASM_ARCH_DDR_RK3368_H__
+#define __ASM_ARCH_DDR_RK3368_H__
+
+/*
+ * The RK3368 DDR PCTL differs from the incarnation in the RK3288 only
+ * in a few details. Most notably, it has an additional field to track
+ * tREFI in controller cycles (i.e. trefi_mem_ddr3).
+ */
+struct rk3368_ddr_pctl {
+ u32 scfg;
+ u32 sctl;
+ u32 stat;
+ u32 intrstat;
+ u32 reserved0[12];
+ u32 mcmd;
+ u32 powctl;
+ u32 powstat;
+ u32 cmdtstat;
+ u32 cmdtstaten;
+ u32 reserved1[3];
+ u32 mrrcfg0;
+ u32 mrrstat0;
+ u32 mrrstat1;
+ u32 reserved2[4];
+ u32 mcfg1;
+ u32 mcfg;
+ u32 ppcfg;
+ u32 mstat;
+ u32 lpddr2zqcfg;
+ u32 reserved3;
+ u32 dtupdes;
+ u32 dtuna;
+ u32 dtune;
+ u32 dtuprd0;
+ u32 dtuprd1;
+ u32 dtuprd2;
+ u32 dtuprd3;
+ u32 dtuawdt;
+ u32 reserved4[3];
+ u32 togcnt1u;
+ u32 tinit;
+ u32 trsth;
+ u32 togcnt100n;
+ u32 trefi;
+ u32 tmrd;
+ u32 trfc;
+ u32 trp;
+ u32 trtw;
+ u32 tal;
+ u32 tcl;
+ u32 tcwl;
+ u32 tras;
+ u32 trc;
+ u32 trcd;
+ u32 trrd;
+ u32 trtp;
+ u32 twr;
+ u32 twtr;
+ u32 texsr;
+ u32 txp;
+ u32 txpdll;
+ u32 tzqcs;
+ u32 tzqcsi;
+ u32 tdqs;
+ u32 tcksre;
+ u32 tcksrx;
+ u32 tcke;
+ u32 tmod;
+ u32 trstl;
+ u32 tzqcl;
+ u32 tmrr;
+ u32 tckesr;
+ u32 tdpd;
+ u32 trefi_mem_ddr3;
+ u32 reserved5[45];
+ u32 dtuwactl;
+ u32 dturactl;
+ u32 dtucfg;
+ u32 dtuectl;
+ u32 dtuwd0;
+ u32 dtuwd1;
+ u32 dtuwd2;
+ u32 dtuwd3;
+ u32 dtuwdm;
+ u32 dturd0;
+ u32 dturd1;
+ u32 dturd2;
+ u32 dturd3;
+ u32 dtulfsrwd;
+ u32 dtulfsrrd;
+ u32 dtueaf;
+ u32 dfitctrldelay;
+ u32 dfiodtcfg;
+ u32 dfiodtcfg1;
+ u32 dfiodtrankmap;
+ u32 dfitphywrdata;
+ u32 dfitphywrlat;
+ u32 reserved7[2];
+ u32 dfitrddataen;
+ u32 dfitphyrdlat;
+ u32 reserved8[2];
+ u32 dfitphyupdtype0;
+ u32 dfitphyupdtype1;
+ u32 dfitphyupdtype2;
+ u32 dfitphyupdtype3;
+ u32 dfitctrlupdmin;
+ u32 dfitctrlupdmax;
+ u32 dfitctrlupddly;
+ u32 reserved9;
+ u32 dfiupdcfg;
+ u32 dfitrefmski;
+ u32 dfitctrlupdi;
+ u32 reserved10[4];
+ u32 dfitrcfg0;
+ u32 dfitrstat0;
+ u32 dfitrwrlvlen;
+ u32 dfitrrdlvlen;
+ u32 dfitrrdlvlgateen;
+ u32 dfiststat0;
+ u32 dfistcfg0;
+ u32 dfistcfg1;
+ u32 reserved11;
+ u32 dfitdramclken;
+ u32 dfitdramclkdis;
+ u32 dfistcfg2;
+ u32 dfistparclr;
+ u32 dfistparlog;
+ u32 reserved12[3];
+ u32 dfilpcfg0;
+ u32 reserved13[3];
+ u32 dfitrwrlvlresp0;
+ u32 dfitrwrlvlresp1;
+ u32 dfitrwrlvlresp2;
+ u32 dfitrrdlvlresp0;
+ u32 dfitrrdlvlresp1;
+ u32 dfitrrdlvlresp2;
+ u32 dfitrwrlvldelay0;
+ u32 dfitrwrlvldelay1;
+ u32 dfitrwrlvldelay2;
+ u32 dfitrrdlvldelay0;
+ u32 dfitrrdlvldelay1;
+ u32 dfitrrdlvldelay2;
+ u32 dfitrrdlvlgatedelay0;
+ u32 dfitrrdlvlgatedelay1;
+ u32 dfitrrdlvlgatedelay2;
+ u32 dfitrcmd;
+ u32 reserved14[46];
+ u32 ipvr;
+ u32 iptr;
+};
+check_member(rk3368_ddr_pctl, iptr, 0x03fc);
+
+struct rk3368_ddrphy {
+ u32 reg[0x100];
+};
+check_member(rk3368_ddrphy, reg[0xff], 0x03fc);
+
+struct rk3368_msch {
+ u32 coreid;
+ u32 revisionid;
+ u32 ddrconf;
+ u32 ddrtiming;
+ u32 ddrmode;
+ u32 readlatency;
+ u32 reserved1[8];
+ u32 activate;
+ u32 devtodev;
+};
+check_member(rk3368_msch, devtodev, 0x003c);
+
+/* GRF_SOC_CON0 */
+enum {
+ NOC_RSP_ERR_STALL = BIT(9),
+ MOBILE_DDR_SEL = BIT(4),
+ DDR0_16BIT_EN = BIT(3),
+ MSCH0_MAINDDR3_DDR3 = BIT(2),
+ MSCH0_MAINPARTIALPOP = BIT(1),
+ UPCTL_C_ACTIVE = BIT(0),
+};
+
+#endif
-/* (C) Copyright 2016 Rockchip Electronics Co., Ltd
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
u32 soc_con15;
u32 soc_con16;
u32 soc_con17;
+ u32 reserved5[0x6e];
+ u32 ddrc0_con0;
};
check_member(rk3368_grf, soc_con17, 0x444);
+check_member(rk3368_grf, ddrc0_con0, 0x600);
struct rk3368_pmu_grf {
u32 gpio0a_iomux;
u32 gpio0d_drv;
u32 gpio0l_sr;
u32 gpio0h_sr;
- u32 reserved[(0x200 - 0x34) / 4 - 1];
+ u32 reserved[0x72];
u32 os_reg[4];
};
-check_member(rk3368_pmu_grf, os_reg[3], 0x20c);
-
-/*GRF_GPIO0C_IOMUX*/
-enum {
- GPIO0C7_SHIFT = 14,
- GPIO0C7_MASK = 3 << GPIO0C7_SHIFT,
- GPIO0C7_GPIO = 0,
- GPIO0C7_LCDC_D19,
- GPIO0C7_TRACE_D9,
- GPIO0C7_UART1_RTSN,
-
- GPIO0C6_SHIFT = 12,
- GPIO0C6_MASK = 3 << GPIO0C6_SHIFT,
- GPIO0C6_GPIO = 0,
- GPIO0C6_LCDC_D18,
- GPIO0C6_TRACE_D8,
- GPIO0C6_UART1_CTSN,
-
- GPIO0C5_SHIFT = 10,
- GPIO0C5_MASK = 3 << GPIO0C5_SHIFT,
- GPIO0C5_GPIO = 0,
- GPIO0C5_LCDC_D17,
- GPIO0C5_TRACE_D7,
- GPIO0C5_UART1_SOUT,
-
- GPIO0C4_SHIFT = 8,
- GPIO0C4_MASK = 3 << GPIO0C4_SHIFT,
- GPIO0C4_GPIO = 0,
- GPIO0C4_LCDC_D16,
- GPIO0C4_TRACE_D6,
- GPIO0C4_UART1_SIN,
-
- GPIO0C3_SHIFT = 6,
- GPIO0C3_MASK = 3 << GPIO0C3_SHIFT,
- GPIO0C3_GPIO = 0,
- GPIO0C3_LCDC_D15,
- GPIO0C3_TRACE_D5,
- GPIO0C3_MCU_JTAG_TDO,
-
- GPIO0C2_SHIFT = 4,
- GPIO0C2_MASK = 3 << GPIO0C2_SHIFT,
- GPIO0C2_GPIO = 0,
- GPIO0C2_LCDC_D14,
- GPIO0C2_TRACE_D4,
- GPIO0C2_MCU_JTAG_TDI,
-
- GPIO0C1_SHIFT = 2,
- GPIO0C1_MASK = 3 << GPIO0C1_SHIFT,
- GPIO0C1_GPIO = 0,
- GPIO0C1_LCDC_D13,
- GPIO0C1_TRACE_D3,
- GPIO0C1_MCU_JTAG_TRTSN,
-
- GPIO0C0_SHIFT = 0,
- GPIO0C0_MASK = 3 << GPIO0C0_SHIFT,
- GPIO0C0_GPIO = 0,
- GPIO0C0_LCDC_D12,
- GPIO0C0_TRACE_D2,
- GPIO0C0_MCU_JTAG_TDO,
-};
-
-/*GRF_GPIO0D_IOMUX*/
-enum {
- GPIO0D7_SHIFT = 14,
- GPIO0D7_MASK = 3 << GPIO0D7_SHIFT,
- GPIO0D7_GPIO = 0,
- GPIO0D7_LCDC_DCLK,
- GPIO0D7_TRACE_CTL,
- GPIO0D7_PMU_DEBUG5,
-
- GPIO0D6_SHIFT = 12,
- GPIO0D6_MASK = 3 << GPIO0D6_SHIFT,
- GPIO0D6_GPIO = 0,
- GPIO0D6_LCDC_DEN,
- GPIO0D6_TRACE_CLK,
- GPIO0D6_PMU_DEBUG4,
-
- GPIO0D5_SHIFT = 10,
- GPIO0D5_MASK = 3 << GPIO0D5_SHIFT,
- GPIO0D5_GPIO = 0,
- GPIO0D5_LCDC_VSYNC,
- GPIO0D5_TRACE_D15,
- GPIO0D5_PMU_DEBUG3,
-
- GPIO0D4_SHIFT = 8,
- GPIO0D4_MASK = 3 << GPIO0D4_SHIFT,
- GPIO0D4_GPIO = 0,
- GPIO0D4_LCDC_HSYNC,
- GPIO0D4_TRACE_D14,
- GPIO0D4_PMU_DEBUG2,
-
- GPIO0D3_SHIFT = 6,
- GPIO0D3_MASK = 3 << GPIO0D3_SHIFT,
- GPIO0D3_GPIO = 0,
- GPIO0D3_LCDC_D23,
- GPIO0D3_TRACE_D13,
- GPIO0D3_UART4_SIN,
-
- GPIO0D2_SHIFT = 4,
- GPIO0D2_MASK = 3 << GPIO0D2_SHIFT,
- GPIO0D2_GPIO = 0,
- GPIO0D2_LCDC_D22,
- GPIO0D2_TRACE_D12,
- GPIO0D2_UART4_SOUT,
-
- GPIO0D1_SHIFT = 2,
- GPIO0D1_MASK = 3 << GPIO0D1_SHIFT,
- GPIO0D1_GPIO = 0,
- GPIO0D1_LCDC_D21,
- GPIO0D1_TRACE_D11,
- GPIO0D1_UART4_RTSN,
-
- GPIO0D0_SHIFT = 0,
- GPIO0D0_MASK = 3 << GPIO0D0_SHIFT,
- GPIO0D0_GPIO = 0,
- GPIO0D0_LCDC_D20,
- GPIO0D0_TRACE_D10,
- GPIO0D0_UART4_CTSN,
-};
-
-/*GRF_GPIO2A_IOMUX*/
-enum {
- GPIO2A7_SHIFT = 14,
- GPIO2A7_MASK = 3 << GPIO2A7_SHIFT,
- GPIO2A7_GPIO = 0,
- GPIO2A7_SDMMC0_D2,
- GPIO2A7_JTAG_TCK,
-
- GPIO2A6_SHIFT = 12,
- GPIO2A6_MASK = 3 << GPIO2A6_SHIFT,
- GPIO2A6_GPIO = 0,
- GPIO2A6_SDMMC0_D1,
- GPIO2A6_UART2_SIN,
-
- GPIO2A5_SHIFT = 10,
- GPIO2A5_MASK = 3 << GPIO2A5_SHIFT,
- GPIO2A5_GPIO = 0,
- GPIO2A5_SDMMC0_D0,
- GPIO2A5_UART2_SOUT,
-
- GPIO2A4_SHIFT = 8,
- GPIO2A4_MASK = 3 << GPIO2A4_SHIFT,
- GPIO2A4_GPIO = 0,
- GPIO2A4_FLASH_DQS,
- GPIO2A4_EMMC_CLKO,
-
- GPIO2A3_SHIFT = 6,
- GPIO2A3_MASK = 3 << GPIO2A3_SHIFT,
- GPIO2A3_GPIO = 0,
- GPIO2A3_FLASH_CSN3,
- GPIO2A3_EMMC_RSTNO,
-
- GPIO2A2_SHIFT = 4,
- GPIO2A2_MASK = 3 << GPIO2A2_SHIFT,
- GPIO2A2_GPIO = 0,
- GPIO2A2_FLASH_CSN2,
-
- GPIO2A1_SHIFT = 2,
- GPIO2A1_MASK = 3 << GPIO2A1_SHIFT,
- GPIO2A1_GPIO = 0,
- GPIO2A1_FLASH_CSN1,
-
- GPIO2A0_SHIFT = 0,
- GPIO2A0_MASK = 3 << GPIO2A0_SHIFT,
- GPIO2A0_GPIO = 0,
- GPIO2A0_FLASH_CSN0,
-};
-
-/*GRF_GPIO2D_IOMUX*/
-enum {
- GPIO2D7_SHIFT = 14,
- GPIO2D7_MASK = 3 << GPIO2D7_SHIFT,
- GPIO2D7_GPIO = 0,
- GPIO2D7_SDIO0_D3,
-
- GPIO2D6_SHIFT = 12,
- GPIO2D6_MASK = 3 << GPIO2D6_SHIFT,
- GPIO2D6_GPIO = 0,
- GPIO2D6_SDIO0_D2,
-
- GPIO2D5_SHIFT = 10,
- GPIO2D5_MASK = 3 << GPIO2D5_SHIFT,
- GPIO2D5_GPIO = 0,
- GPIO2D5_SDIO0_D1,
-
- GPIO2D4_SHIFT = 8,
- GPIO2D4_MASK = 3 << GPIO2D4_SHIFT,
- GPIO2D4_GPIO = 0,
- GPIO2D4_SDIO0_D0,
-
- GPIO2D3_SHIFT = 6,
- GPIO2D3_MASK = 3 << GPIO2D3_SHIFT,
- GPIO2D3_GPIO = 0,
- GPIO2D3_UART0_RTS0,
-
- GPIO2D2_SHIFT = 4,
- GPIO2D2_MASK = 3 << GPIO2D2_SHIFT,
- GPIO2D2_GPIO = 0,
- GPIO2D2_UART0_CTS0,
-
- GPIO2D1_SHIFT = 2,
- GPIO2D1_MASK = 3 << GPIO2D1_SHIFT,
- GPIO2D1_GPIO = 0,
- GPIO2D1_UART0_SOUT,
-
- GPIO2D0_SHIFT = 0,
- GPIO2D0_MASK = 3 << GPIO2D0_SHIFT,
- GPIO2D0_GPIO = 0,
- GPIO2D0_UART0_SIN,
-};
-
-/*GRF_GPIO3C_IOMUX*/
-enum {
- GPIO3C7_SHIFT = 14,
- GPIO3C7_MASK = 3 << GPIO3C7_SHIFT,
- GPIO3C7_GPIO = 0,
- GPIO3C7_EDPHDMI_CECINOUT,
- GPIO3C7_ISP_FLASHTRIGIN,
-
- GPIO3C6_SHIFT = 12,
- GPIO3C6_MASK = 3 << GPIO3C6_SHIFT,
- GPIO3C6_GPIO = 0,
- GPIO3C6_MAC_CLK,
- GPIO3C6_ISP_SHUTTERTRIG,
-
- GPIO3C5_SHIFT = 10,
- GPIO3C5_MASK = 3 << GPIO3C5_SHIFT,
- GPIO3C5_GPIO = 0,
- GPIO3C5_MAC_RXER,
- GPIO3C5_ISP_PRELIGHTTRIG,
-
- GPIO3C4_SHIFT = 8,
- GPIO3C4_MASK = 3 << GPIO3C4_SHIFT,
- GPIO3C4_GPIO = 0,
- GPIO3C4_MAC_RXDV,
- GPIO3C4_ISP_FLASHTRIGOUT,
-
- GPIO3C3_SHIFT = 6,
- GPIO3C3_MASK = 3 << GPIO3C3_SHIFT,
- GPIO3C3_GPIO = 0,
- GPIO3C3_MAC_RXDV,
- GPIO3C3_EMMC_RSTNO,
-
- GPIO3C2_SHIFT = 4,
- GPIO3C2_MASK = 3 << GPIO3C2_SHIFT,
- GPIO3C2_MAC_MDC = 0,
- GPIO3C2_ISP_SHUTTEREN,
-
- GPIO3C1_SHIFT = 2,
- GPIO3C1_MASK = 3 << GPIO3C1_SHIFT,
- GPIO3C1_GPIO = 0,
- GPIO3C1_MAC_RXD2,
- GPIO3C1_UART3_RTSN,
-
- GPIO3C0_SHIFT = 0,
- GPIO3C0_MASK = 3 << GPIO3C0_SHIFT,
- GPIO3C0_GPIO = 0,
- GPIO3C0_MAC_RXD1,
- GPIO3C0_UART3_CTSN,
- GPIO3C0_GPS_RFCLK,
-};
-
-/*GRF_GPIO3D_IOMUX*/
-enum {
- GPIO3D7_SHIFT = 14,
- GPIO3D7_MASK = 3 << GPIO3D7_SHIFT,
- GPIO3D7_GPIO = 0,
- GPIO3D7_SC_VCC18V,
- GPIO3D7_I2C2_SDA,
- GPIO3D7_GPUJTAG_TCK,
-
- GPIO3D6_SHIFT = 12,
- GPIO3D6_MASK = 3 << GPIO3D6_SHIFT,
- GPIO3D6_GPIO = 0,
- GPIO3D6_IR_TX,
- GPIO3D6_UART3_SOUT,
- GPIO3D6_PWM3,
-
- GPIO3D5_SHIFT = 10,
- GPIO3D5_MASK = 3 << GPIO3D5_SHIFT,
- GPIO3D5_GPIO = 0,
- GPIO3D5_IR_RX,
- GPIO3D5_UART3_SIN,
-
- GPIO3D4_SHIFT = 8,
- GPIO3D4_MASK = 3 << GPIO3D4_SHIFT,
- GPIO3D4_GPIO = 0,
- GPIO3D4_MAC_TXCLKOUT,
- GPIO3D4_SPI1_CSN1,
-
- GPIO3D3_SHIFT = 6,
- GPIO3D3_MASK = 3 << GPIO3D3_SHIFT,
- GPIO3D3_GPIO = 0,
- GPIO3D3_HDMII2C_SCL,
- GPIO3D3_I2C5_SCL,
-
- GPIO3D2_SHIFT = 4,
- GPIO3D2_MASK = 3 << GPIO3D2_SHIFT,
- GPIO3D2_GPIO = 0,
- GPIO3D2_HDMII2C_SDA,
- GPIO3D2_I2C5_SDA,
-
- GPIO3D1_SHIFT = 2,
- GPIO3D1_MASK = 3 << GPIO3D1_SHIFT,
- GPIO3D1_GPIO = 0,
- GPIO3D1_MAC_RXCLKIN,
- GPIO3D1_I2C4_SCL,
-
- GPIO3D0_SHIFT = 0,
- GPIO3D0_MASK = 3 << GPIO3D0_SHIFT,
- GPIO3D0_GPIO = 0,
- GPIO3D0_MAC_MDIO,
- GPIO3D0_I2C4_SDA,
-};
+check_member(rk3368_pmu_grf, gpio0h_sr, 0x34);
+check_member(rk3368_pmu_grf, os_reg[0], 0x200);
/*GRF_SOC_CON11/12/13*/
enum {
MCU_CODE_BASE_BIT31_BIT28_SHIFT = 0,
MCU_CODE_BASE_BIT31_BIT28_MASK = GENMASK(3, 0),
};
+
#endif
+++ /dev/null
-/*
- * (C) Copyright 2011
- * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
- *
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _STM32_GPIO_H_
-#define _STM32_GPIO_H_
-
-enum stm32_gpio_port {
- STM32_GPIO_PORT_A = 0,
- STM32_GPIO_PORT_B,
- STM32_GPIO_PORT_C,
- STM32_GPIO_PORT_D,
- STM32_GPIO_PORT_E,
- STM32_GPIO_PORT_F,
- STM32_GPIO_PORT_G,
-};
-
-enum stm32_gpio_pin {
- STM32_GPIO_PIN_0 = 0,
- STM32_GPIO_PIN_1,
- STM32_GPIO_PIN_2,
- STM32_GPIO_PIN_3,
- STM32_GPIO_PIN_4,
- STM32_GPIO_PIN_5,
- STM32_GPIO_PIN_6,
- STM32_GPIO_PIN_7,
- STM32_GPIO_PIN_8,
- STM32_GPIO_PIN_9,
- STM32_GPIO_PIN_10,
- STM32_GPIO_PIN_11,
- STM32_GPIO_PIN_12,
- STM32_GPIO_PIN_13,
- STM32_GPIO_PIN_14,
- STM32_GPIO_PIN_15
-};
-
-enum stm32_gpio_icnf {
- STM32_GPIO_ICNF_AN = 0,
- STM32_GPIO_ICNF_IN_FLT,
- STM32_GPIO_ICNF_IN_PUD,
- STM32_GPIO_ICNF_RSVD
-};
-
-enum stm32_gpio_ocnf {
- STM32_GPIO_OCNF_GP_PP = 0,
- STM32_GPIO_OCNF_GP_OD,
- STM32_GPIO_OCNF_AF_PP,
- STM32_GPIO_OCNF_AF_OD
-};
-
-enum stm32_gpio_pupd {
- STM32_GPIO_PUPD_DOWN = 0,
- STM32_GPIO_PUPD_UP,
-};
-
-enum stm32_gpio_mode {
- STM32_GPIO_MODE_IN = 0,
- STM32_GPIO_MODE_OUT_10M,
- STM32_GPIO_MODE_OUT_2M,
- STM32_GPIO_MODE_OUT_50M
-};
-
-enum stm32_gpio_af {
- STM32_GPIO_AF0 = 0,
- STM32_GPIO_AF1,
- STM32_GPIO_AF2,
- STM32_GPIO_AF3,
- STM32_GPIO_AF4,
- STM32_GPIO_AF5,
- STM32_GPIO_AF6,
- STM32_GPIO_AF7,
- STM32_GPIO_AF8,
- STM32_GPIO_AF9,
- STM32_GPIO_AF10,
- STM32_GPIO_AF11,
- STM32_GPIO_AF12,
- STM32_GPIO_AF13,
- STM32_GPIO_AF14,
- STM32_GPIO_AF15
-};
-
-struct stm32_gpio_dsc {
- enum stm32_gpio_port port;
- enum stm32_gpio_pin pin;
-};
-
-struct stm32_gpio_ctl {
- enum stm32_gpio_icnf icnf;
- enum stm32_gpio_ocnf ocnf;
- enum stm32_gpio_mode mode;
- enum stm32_gpio_pupd pupd;
- enum stm32_gpio_af af;
-};
-
-static inline unsigned stm32_gpio_to_port(unsigned gpio)
-{
- return gpio / 16;
-}
-
-static inline unsigned stm32_gpio_to_pin(unsigned gpio)
-{
- return gpio % 16;
-}
-
-int stm32_gpio_config(const struct stm32_gpio_dsc *gpio_dsc,
- const struct stm32_gpio_ctl *gpio_ctl);
-int stm32_gpout_set(const struct stm32_gpio_dsc *gpio_dsc, int state);
-
-#endif /* _STM32_GPIO_H_ */
+++ /dev/null
-/*
- * (C) Copyright 2011
- * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
- *
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _MACH_STM32_H_
-#define _MACH_STM32_H_
-
-/*
- * Peripheral memory map
- */
-#define STM32_PERIPH_BASE 0x40000000
-#define STM32_APB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00000000)
-#define STM32_APB2PERIPH_BASE (STM32_PERIPH_BASE + 0x00010000)
-#define STM32_AHB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00018000)
-
-#define STM32_BUS_MASK 0xFFFF0000
-
-#define STM32_GPIOA_BASE (STM32_APB2PERIPH_BASE + 0x0800)
-#define STM32_GPIOB_BASE (STM32_APB2PERIPH_BASE + 0x0C00)
-#define STM32_GPIOC_BASE (STM32_APB2PERIPH_BASE + 0x1000)
-#define STM32_GPIOD_BASE (STM32_APB2PERIPH_BASE + 0x1400)
-#define STM32_GPIOE_BASE (STM32_APB2PERIPH_BASE + 0x1800)
-#define STM32_GPIOF_BASE (STM32_APB2PERIPH_BASE + 0x1C00)
-#define STM32_GPIOG_BASE (STM32_APB2PERIPH_BASE + 0x2000)
-
-/*
- * Register maps
- */
-struct stm32_des_regs {
- u16 flash_size;
- u16 pad1;
- u32 pad2;
- u32 uid0;
- u32 uid1;
- u32 uid2;
-};
-
-struct stm32_rcc_regs {
- u32 cr; /* RCC clock control */
- u32 cfgr; /* RCC clock configuration */
- u32 cir; /* RCC clock interrupt */
- u32 apb2rstr; /* RCC APB2 peripheral reset */
- u32 apb1rstr; /* RCC APB1 peripheral reset */
- u32 ahbenr; /* RCC AHB peripheral clock enable */
- u32 apb2enr; /* RCC APB2 peripheral clock enable */
- u32 apb1enr; /* RCC APB1 peripheral clock enable */
- u32 bdcr; /* RCC Backup domain control */
- u32 csr; /* RCC clock control & status */
-};
-
-struct stm32_pwr_regs {
- u32 cr;
- u32 csr;
-};
-
-struct stm32_flash_regs {
- u32 acr;
- u32 keyr;
- u32 optkeyr;
- u32 sr;
- u32 cr;
- u32 ar;
- u32 rsvd1; /* Reserved */
- u32 obr;
- u32 wrpr;
- u32 rsvd2[8]; /* Reserved */
- u32 keyr2;
- u32 rsvd3;
- u32 sr2;
- u32 cr2;
- u32 ar2;
-};
-
-/* Per bank register set for XL devices */
-struct stm32_flash_bank_regs {
- u32 keyr;
- u32 rsvd; /* Reserved */
- u32 sr;
- u32 cr;
- u32 ar;
-};
-
-/*
- * Registers access macros
- */
-#define STM32_DES_BASE (0x1ffff7e0)
-#define STM32_DES ((struct stm32_des_regs *)STM32_DES_BASE)
-
-#define STM32_RCC_BASE (STM32_AHB1PERIPH_BASE + 0x9000)
-#define STM32_RCC ((struct stm32_rcc_regs *)STM32_RCC_BASE)
-
-#define STM32_PWR_BASE (STM32_APB1PERIPH_BASE + 0x7000)
-#define STM32_PWR ((struct stm32_pwr_regs *)STM32_PWR_BASE)
-
-#define STM32_FLASH_BASE (STM32_AHB1PERIPH_BASE + 0xa000)
-#define STM32_FLASH ((struct stm32_flash_regs *)STM32_FLASH_BASE)
-
-#define STM32_FLASH_SR_BSY (1 << 0)
-
-#define STM32_FLASH_CR_PG (1 << 0)
-#define STM32_FLASH_CR_PER (1 << 1)
-#define STM32_FLASH_CR_STRT (1 << 6)
-#define STM32_FLASH_CR_LOCK (1 << 7)
-
-enum clock {
- CLOCK_CORE,
- CLOCK_AHB,
- CLOCK_APB1,
- CLOCK_APB2
-};
-
-int configure_clocks(void);
-unsigned long clock_get(enum clock clck);
-
-#endif /* _MACH_STM32_H_ */
#define PRCM_CPU3_PWR_CLAMP(n) (((n) & 0xff) << 0)
#define PRCM_CPU3_PWR_CLAMP_MASK PRCM_CPU3_PWR_CLAMP(0xff)
+#define PRCM_SEC_SWITCH_APB0_CLK_NONSEC (0x1 << 0)
+#define PRCM_SEC_SWITCH_PLL_CFG_NONSEC (0x1 << 1)
+#define PRCM_SEC_SWITCH_PWR_GATE_NONSEC (0x1 << 2)
+
#ifndef __ASSEMBLY__
#include <linux/compiler.h>
u32 dram_pwr; /* 0x180 */
u8 res12[0xc]; /* 0x184 */
u32 dram_tst; /* 0x190 */
+ u8 res13[0x3c]; /* 0x194 */
+ u32 prcm_sec_switch; /* 0x1d0 */
};
void prcm_apb0_enable(u32 flags);
BOOT_DEVICE_BOARD,
BOOT_DEVICE_DFU,
BOOT_DEVICE_XIP,
+ BOOT_DEVICE_BOOTROM,
BOOT_DEVICE_NONE
};
#endif
/* Subcommand: PREP */
static void boot_prep_linux(bootm_headers_t *images)
{
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
#ifdef CONFIG_OF_LIBFDT
#ifdef CONFIG_ARMV7_NONSEC
bool armv7_boot_nonsec(void)
{
- char *s = getenv("bootm_boot_mode");
+ char *s = env_get("bootm_boot_mode");
bool nonsec = armv7_boot_nonsec_default();
if (s && !strcmp(s, "sec"))
ulong addr = (ulong)kernel_entry | 1;
kernel_entry = (void *)addr;
#endif
- s = getenv("machid");
+ s = env_get("machid");
if (s) {
if (strict_strtoul(s, 16, &machid) < 0) {
debug("strict_strtoul failed!\n");
/*
* Set up initial C runtime environment and call board_init_f(0).
*/
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+#if defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_NEEDS_SEPARATE_STACK)
+ ldr x0, =(CONFIG_TPL_STACK)
+#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr x0, =(CONFIG_SPL_STACK)
#else
ldr x0, =(CONFIG_SYS_INIT_SP_ADDR)
/* Optionally save returned end to the environment */
if (argc == 4) {
sprintf(end_str, "0x%08lx", end_addr);
- setenv(argv[3], end_str);
+ env_set(argv[3], end_str);
}
} else {
return CMD_RET_USAGE;
source "board/siemens/taurus/Kconfig"
source "board/siemens/smartweb/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if CPU_ARM926EJS
+ default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7
+
endif
source "board/omicron/calimain/Kconfig"
source "board/lego/ev3/Kconfig"
+config SPL_LDSCRIPT
+ default "board/$(BOARDDIR)/u-boot-spl-ipam390.lds" if TARGET_IPAM390
+ default "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
+
endif
uint8_t env_enetaddr[6];
int ret;
- ret = eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr);
+ ret = eth_env_get_enetaddr_by_index("eth", 0, env_enetaddr);
if (!ret) {
/*
* There is no MAC address in the environment, so we
debug("### Setting environment from EEPROM MAC address = "
"\"%pM\"\n",
env_enetaddr);
- ret = !eth_setenv_enetaddr("ethaddr", rom_enetaddr);
+ ret = !eth_env_set_enetaddr("ethaddr", rom_enetaddr);
}
if (!ret)
printf("Failed to set mac address from EEPROM: %d\n", ret);
bool "Exynos4 SoC family"
select CPU_V7
select BOARD_EARLY_INIT_F
- imply ENV_IS_IN_MMC
help
Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
are multiple SoCs in this family including Exynos4210, Exynos4412,
source "board/samsung/smdk5420/Kconfig"
source "board/samsung/espresso7420/Kconfig"
+config SPL_LDSCRIPT
+ default "board/samsung/common/exynos-uboot-spl.lds" if ARCH_EXYNOS5 || ARCH_EXYNOS4
+
endif
imx_pcie_remove();
#endif
#if defined(CONFIG_SATA)
- sata_stop();
+ sata_remove(0);
#if defined(CONFIG_MX6)
disable_sata_clock();
#endif
if ARCH_MX6
+config MX6_SMP
+ select ARM_ERRATA_751472
+ select ARM_ERRATA_761320
+ select ARM_ERRATA_794072
+ select ARM_ERRATA_845369
+ bool
+
config MX6
+ select ARM_ERRATA_743622 if !MX6UL
bool
default y
- select ARM_ERRATA_743622 if !MX6UL
- select ARM_ERRATA_751472 if !MX6UL
- select ARM_ERRATA_761320 if !MX6UL
- select ARM_ERRATA_794072 if !MX6UL
imply CMD_FUSE
config MX6D
+ select MX6_SMP
bool
config MX6DL
+ select MX6_SMP
bool
config MX6Q
+ select MX6_SMP
bool
config MX6QDL
+ select MX6_SMP
bool
config MX6S
config MX6SX
select ROM_UNIFIED_SECTIONS
bool
- imply ENV_IS_IN_MMC
config MX6SLL
select ROM_UNIFIED_SECTIONS
bool "gw_ventana"
select SUPPORT_SPL
imply CMD_SATA
+ imply CMD_SPL
config TARGET_KOSAGI_NOVENA
bool "Kosagi Novena"
select BOARD_LATE_INIT
select SUPPORT_SPL
+config TARGET_PFLA02
+ bool "Phytec PFLA02 (PhyFlex) i.MX6 Quad"
+ select BOARD_LATE_INIT
+ select SUPPORT_SPL
+
config TARGET_SECOMX6
bool "secomx6 boards"
source "board/freescale/mx6ullevk/Kconfig"
source "board/grinn/liteboard/Kconfig"
source "board/phytec/pcm058/Kconfig"
+source "board/phytec/pfla02/Kconfig"
source "board/gateworks/gw_ventana/Kconfig"
source "board/kosagi/novena/Kconfig"
source "board/samtec/vining_2000/Kconfig"
PLL_USBOTG, /* OTG USB PLL */
PLL_ENET, /* ENET PLL */
PLL_AUDIO, /* AUDIO PLL */
- PLL_VIDEO, /* AUDIO PLL */
+ PLL_VIDEO, /* VIDEO PLL */
};
struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
/* In bootstrap don't use the env vars */
if (((reg & 0x3000000) >> 24) == 0x1) {
set_default_env(NULL);
- setenv("preboot", "");
+ env_set("preboot", "");
}
return opos6ul_board_late_init();
#define OCOTP_CFG3_SPEED_528MHZ 1
#define OCOTP_CFG3_SPEED_696MHZ 2
+/*
+ * For i.MX6ULL
+ */
+#define OCOTP_CFG3_SPEED_792MHZ 2
+#define OCOTP_CFG3_SPEED_900MHZ 3
+
u32 get_cpu_speed_grade_hz(void)
{
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
- if (is_mx6ul() || is_mx6ull()) {
+ if (is_mx6ul()) {
if (val == OCOTP_CFG3_SPEED_528MHZ)
return 528000000;
else if (val == OCOTP_CFG3_SPEED_696MHZ)
- return 69600000;
+ return 696000000;
+ else
+ return 0;
+ }
+
+ if (is_mx6ull()) {
+ if (val == OCOTP_CFG3_SPEED_528MHZ)
+ return 528000000;
+ else if (val == OCOTP_CFG3_SPEED_792MHZ)
+ return 792000000;
+ else if (val == OCOTP_CFG3_SPEED_900MHZ)
+ return 900000000;
else
return 0;
}
u32 val, step, old, reg = readl(&anatop->reg_core);
u8 shift;
+ /* No LDO_SOC/PU/ARM */
+ if (is_mx6sll())
+ return 0;
+
if (mv < 725)
val = 0x00; /* Power gated off */
else if (mv > 1450)
reg = readl(&mxc_ccm->ccdr);
/* Clear MMDC channel mask */
- if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sl())
+ if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sl() || is_mx6sll())
reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK);
else
reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK | MXC_CCM_CCDR_MMDC_CH0_HS_MASK);
}
}
-#ifdef CONFIG_MX6SL
-static void set_preclk_from_osc(void)
-{
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- u32 reg;
-
- reg = readl(&mxc_ccm->cscmr1);
- reg |= MXC_CCM_CSCMR1_PER_CLK_SEL_MASK;
- writel(reg, &mxc_ccm->cscmr1);
-}
-#endif
-
int arch_cpu_init(void)
{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
init_aips();
/* Need to clear MMDC_CHx_MASK to make warm reset work. */
}
/* Set perclk to source from OSC 24MHz */
-#if defined(CONFIG_MX6SL)
- set_preclk_from_osc();
-#endif
+ if (is_mx6sl())
+ setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK);
imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
+ if (is_mx6sx())
+ setbits_le32(&ccm->cscdr1, MXC_CCM_CSCDR1_UART_CLK_SEL);
+
init_src();
return 0;
int board_postclk_init(void)
{
+ /* NO LDO SOC on i.MX6SLL */
+ if (is_mx6sll())
+ return 0;
+
set_ldo_voltage(LDO_SOC, 1175); /* Set VDDSOC to 1.175V */
return 0;
u32 mask528;
u32 reg, periph1, periph2;
- if (is_mx6sx() || is_mx6ul() || is_mx6ull())
+ if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sll())
return;
/* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
bool
- imply ENV_IS_IN_MMC
choice
prompt "MX7 board select"
};
#endif
-#ifdef CONFIG_IMX_RDC
+#if CONFIG_IS_ENABLED(IMX_RDC)
/*
* In current design, if any peripheral was assigned to both A7 and M4,
* it will receive ipg_stop or ipg_wait when any of the 2 platforms enter
mxs_dma_init();
#endif
- if (IS_ENABLED(CONFIG_IMX_RDC))
- isolate_resource();
+#if CONFIG_IS_ENABLED(IMX_RDC)
+ isolate_resource();
+#endif
return 0;
}
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_mx7d())
- setenv("soc", "imx7d");
+ env_set("soc", "imx7d");
else
- setenv("soc", "imx7s");
+ env_set("soc", "imx7s");
#endif
return 0;
{
int i;
int ret;
- char const *panel = getenv("panel");
+ char const *panel = env_get("panel");
if (!panel) {
for (i = 0; i < display_count; i++) {
config ARCH_INTEGRATOR_CP
bool "Support Integrator/CP platform"
select ARCH_CINTEGRATOR
- imply ENV_IS_IN_FLASH
endchoice
config ARCH_CINTEGRATOR
bool
- imply ENV_IS_IN_FLASH
choice
prompt "Integrator core module select"
int ecc_test = 0;
u32 value = __raw_readl(base + KS2_DDR3_ECC_INT_STATUS_OFFSET);
- env = getenv("ecc_test");
+ env = env_get("ecc_test");
if (env)
ecc_test = simple_strtol(env, NULL, 0);
char *env;
long ks2_debug = 0;
- env = getenv("ks2_debug");
+ env = env_get("ks2_debug");
if (env)
ks2_debug = simple_strtol(env, NULL, 0);
static void kw_sysrst_action(void)
{
int ret;
- char *s = getenv("sysrstcmd");
+ char *s = env_get("sysrstcmd");
if (!s) {
debug("Error.. %s failed, check sysrstcmd\n",
/*
* no action if sysrstdelay environment variable is not defined
*/
- s = getenv("sysrstdelay");
+ s = env_get("sysrstdelay");
if (s == NULL)
return;
config ARMADA_XP
bool
select ARMADA_32BIT
- imply ENV_IS_IN_SPI_FLASH
# ARMv8 SoCs...
config ARMADA_3700
}
info = board_serdes_cfg_get(PEX_MODE_GET(satr11));
- DEBUG_INIT_FULL_S("info->line0_7= 0x");
- DEBUG_INIT_FULL_D(info->line0_7, 8);
- DEBUG_INIT_FULL_S(" info->line8_15= 0x");
- DEBUG_INIT_FULL_D(info->line8_15, 8);
- DEBUG_INIT_FULL_S("\n");
if (info == NULL) {
DEBUG_INIT_S("Hight speed PHY Error #1\n");
return MV_ERROR;
}
+ DEBUG_INIT_FULL_S("info->line0_7= 0x");
+ DEBUG_INIT_FULL_D(info->line0_7, 8);
+ DEBUG_INIT_FULL_S(" info->line8_15= 0x");
+ DEBUG_INIT_FULL_D(info->line8_15, 8);
+ DEBUG_INIT_FULL_S("\n");
if (config_module & ETM_MODULE_DETECT) { /* step 0.9 ETM */
DEBUG_INIT_FULL_S("ETM module detect Step 0.9:\n");
source "board/compulab/cm_t335/Kconfig"
source "board/compulab/cm_t43/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
endif
select DM
select DM_SERIAL
select DM_GPIO
+ imply CMD_SPL
config TARGET_AM335X_SL50
bool "Support am335x_sl50"
#include <common.h>
#include <ahci.h>
+#include <environment.h>
#include <spl.h>
#include <asm/omap_common.h>
#include <asm/arch/omap.h>
int fb_set_reboot_flag(void)
{
printf("Setting reboot to fastboot flag ...\n");
- setenv("dofastboot", "1");
- saveenv();
+ env_set("dofastboot", "1");
+ env_save();
return 0;
}
#endif
regval |= (1<<10);
writel(regval, &emif4_base->sdram_iodft_tlgc);
/*Wait till that bit clears*/
- while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x1);
+ while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) != 0x0);
/*Re-verify the DDR PHY status*/
while ((readl(&emif4_base->sdram_sts) & (1<<2)) == 0x0);
s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
{
u32 vset;
- u32 fuse_enable_mask = OMAP5_ABB_FUSE_ENABLE_MASK;
- u32 fuse_vset_mask = OMAP5_ABB_FUSE_VSET_MASK;
+ u32 fuse_enable_mask = OMAP5_PROD_ABB_FUSE_ENABLE_MASK;
+ u32 fuse_vset_mask = OMAP5_PROD_ABB_FUSE_VSET_MASK;
if (!is_omap54xx()) {
/* DRA7 */
.mm.addr = SMPS_REG_ADDR_45_IVA,
.mm.pmic = &palmas,
.mm.abb_tx_done_mask = OMAP_ABB_MM_TXDONE_MASK,
+
+ .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN,
+ .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
+
+ .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN,
+ .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
+
+ .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN,
+ .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
};
/*
*/
u32 get_device_type(void)
{
+#if defined(CONFIG_OMAP34XX)
+ /*
+ * On OMAP3 systems we call this early enough that we must just
+ * use the direct offset for safety.
+ */
+ return (readl(OMAP34XX_CTRL_BASE + 0x2f0) & DEVICE_TYPE_MASK) >>
+ DEVICE_TYPE_SHIFT;
+#else
return (readl((*ctrl)->control_status) & DEVICE_TYPE_MASK) >>
DEVICE_TYPE_SHIFT;
+#endif
}
printf("Warning: fastboot.cpu: unknown CPU rev: %u\n", cpu_rev);
}
- setenv("fastboot.cpu", cpu);
+ env_set("fastboot.cpu", cpu);
}
static void omap_set_fastboot_secure(void)
printf("Warning: fastboot.secure: unknown CPU sec: %u\n", dev);
}
- setenv("fastboot.secure", secure);
+ env_set("fastboot.secure", secure);
}
static void omap_set_fastboot_board_rev(void)
{
const char *board_rev;
- board_rev = getenv("board_rev");
+ board_rev = env_get("board_rev");
if (board_rev == NULL)
printf("Warning: fastboot.board_rev: unknown board revision\n");
- setenv("fastboot.board_rev", board_rev);
+ env_set("fastboot.board_rev", board_rev);
}
#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
sprintf(buf, "%u", sz_kb);
}
- setenv("fastboot.userdata_size", buf);
+ env_set("fastboot.userdata_size", buf);
}
#else
static inline void omap_set_fastboot_userdata_size(void)
omap_die_id((unsigned int *)&die_id);
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
snprintf(serial_string, sizeof(serial_string),
"%08x%08x", die_id[0], die_id[3]);
- setenv("serial#", serial_string);
+ env_set("serial#", serial_string);
}
}
char *serial_string;
unsigned long long serial;
- serial_string = getenv("serial#");
+ serial_string = env_get("serial#");
if (serial_string) {
serial = simple_strtoull(serial_string, NULL, 16);
omap_die_id((unsigned int *)&die_id);
- if (!getenv("usbethaddr")) {
+ if (!env_get("usbethaddr")) {
/*
* Create a fake MAC address from the processor ID code.
* First byte is 0x02 to signify locally administered.
mac[4] = die_id[0] & 0xff;
mac[5] = (die_id[0] >> 8) & 0xff;
- eth_setenv_enetaddr("usbethaddr", mac);
+ eth_env_set_enetaddr("usbethaddr", mac);
}
}
source "board/LaCie/edminiv2/Kconfig"
+config SPL_LDSCRIPT
+ default "$(CPUDIR)/orion5x/u-boot-spl.lds" if ORION5X
+
endif
/* SDHI CMD VALUE */
#define CMD_MASK 0x0000ffff
-#define SDHI_APP 0x0040
-#define SDHI_MMC_SEND_OP_COND 0x0701
-#define SDHI_SD_APP_SEND_SCR 0x0073
-#define SDHI_SD_SWITCH 0x1C06
-#define SDHI_MMC_SEND_EXT_CSD 0x1C08
/* SDHI_PORTSEL */
#define USE_1PORT (1 << 8) /* 1 port */
config ROCKCHIP_RK3368
bool "Support Rockchip RK3368"
select ARM64
+ select SUPPORT_SPL
+ select SUPPORT_TPL
+ select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
+ select TPL_NEEDS_SEPARATE_STACK if TPL
+ imply SPL_SEPARATE_BSS
+ imply SPL_SERIAL_SUPPORT
+ imply TPL_SERIAL_SUPPORT
+ select ENABLE_ARM_SOC_BOOT0_HOOK
+ select DEBUG_UART_BOARD_INIT
select SYS_NS16550
help
- The Rockchip RK3328 is a ARM-based SoC with a octa-core Cortex-A53.
- including NEON and GPU, 512KB L2 cache for big cluster and 256 KB
- L2 cache for little cluser, PowerVR G6110 based graphics, one video
- output processor supporting LVDS、HDMI、eDP, several DDR3 options
- and video codec support. Peripherals include Gigabit Ethernet,
- USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
+ The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
+ into a big and little cluster with 4 cores each) Cortex-A53 including
+ AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
+ (for the little cluster), PowerVR G6110 based graphics, one video
+ output processor supporting LVDS/HDMI/eDP, several DDR3 options and
+ video codec support.
+
+ On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
+ I2S, UARTs, SPI, I2C and PWMs.
+
+if ROCKCHIP_RK3368
+
+config TPL_LDSCRIPT
+ default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+ default 0xff8c1000
+
+config TPL_MAX_SIZE
+ default 28672
+
+config TPL_STACK
+ default 0xff8cffff
+
+endif
config ROCKCHIP_RK3399
bool "Support Rockchip RK3399"
The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
and a DSP.
-config ROCKCHIP_SPL_BACK_TO_BROM
+config SPL_ROCKCHIP_BACK_TO_BROM
bool "SPL returns to bootrom"
default y if ROCKCHIP_RK3036
select ROCKCHIP_BROM_HELPER
+ depends on SPL
+ help
+ Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
+ SPL will return to the boot rom, which will then load the U-Boot
+ binary to keep going on.
+
+config TPL_ROCKCHIP_BACK_TO_BROM
+ bool "TPL returns to bootrom"
+ default y if ROCKCHIP_RK3368
+ select ROCKCHIP_BROM_HELPER
+ depends on TPL
help
Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
SPL will return to the boot rom, which will then load the U-Boot
bool
config SPL_MMC_SUPPORT
- default y if !ROCKCHIP_SPL_BACK_TO_BROM
+ default y if !SPL_ROCKCHIP_BACK_TO_BROM
source "arch/arm/mach-rockchip/rk3036/Kconfig"
source "arch/arm/mach-rockchip/rk3188/Kconfig"
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
-
-ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
-obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
-else ifdef CONFIG_SPL_BUILD
-obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o
-obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
-else
+# We don't want the bootrom-helper present in a full U-Boot build, as
+# this may have entered from ATF with the stack-pointer pointing to
+# inaccessible/protected memory (and the bootrom-helper assumes that
+# the stack-pointer is valid before switching to the U-Boot stack).
+obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
+obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
+
+obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
+
+obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
-ifdef CONFIG_RAM
-obj-y += sdram_common.o
-endif
endif
+
+obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
+
ifndef CONFIG_ARM64
obj-y += rk_timer.o
endif
-obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
+obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
ifndef CONFIG_TPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
endif
-
obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x/
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
+
+# Clear out SPL objects, in case this is a TPL build
+obj-spl-$(CONFIG_TPL_BUILD) =
+
+# Now add SPL/TPL objects back into the main build
+obj-$(CONFIG_SPL_BUILD) += $(obj-spl-y)
+obj-$(CONFIG_TPL_BUILD) += $(obj-tpl-y)
void back_to_bootrom(void)
{
-#if defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && !defined(CONFIG_TPL_BUILD)
- puts("Returning to boot ROM...");
+#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
+ puts("Returning to boot ROM...\n");
#endif
_back_to_bootrom_s();
}
switch (boot_mode) {
case BOOT_FASTBOOT:
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
break;
case BOOT_UMS:
printf("enter UMS!\n");
- setenv("preboot", "setenv preboot; ums mmc 0");
+ env_set("preboot", "setenv preboot; ums mmc 0");
break;
}
}
}
setup_arm_clock();
-
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
}
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
return;
int board_init(void)
{
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
struct udevice *pinctrl;
int ret;
config TPL_LIBGENERIC_SUPPORT
default y
-config TPL_SERIAL_SUPPORT
- default y
-
source "board/radxa/rock/Kconfig"
endif
CON_IOMUX_UART2SEL_MASK,
CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
}
+
+#define SGRF_DDR_CON0 0x10150000
void board_init_f(ulong dummy)
{
struct udevice *dev;
return;
}
+ /* Disable the ddr secure region setting to make it non-secure */
+ rk_clrreg(SGRF_DDR_CON0, 0x4000);
#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
switch (boot_mode) {
case BOOT_FASTBOOT:
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
break;
case BOOT_UMS:
printf("enter UMS!\n");
- setenv("preboot", "setenv preboot; ums mmc 0");
+ env_set("preboot", "setenv preboot; ums mmc 0");
break;
}
}
int dram_init_banksize(void)
{
- /* Reserve 0x200000 for OPTEE */
- gd->bd->bi_dram[0].start = 0x60000000;
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x8400000;
- gd->bd->bi_dram[1].start = 0x6a400000;
- gd->bd->bi_dram[1].size = gd->ram_size - gd->bd->bi_dram[1].start;
+ /* Reserve 0x200000 for OPTEE */
+ gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+ + gd->bd->bi_dram[0].size + 0x200000;
+ gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+ + gd->ram_size - gd->bd->bi_dram[1].start;
return 0;
}
debug("DRAM init failed: %d\n", ret);
return;
}
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
}
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
return;
switch (boot_mode) {
case BOOT_FASTBOOT:
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
break;
case BOOT_UMS:
printf("enter UMS!\n");
- setenv("preboot", "setenv preboot; if mmc dev 0;"
+ env_set("preboot", "setenv preboot; if mmc dev 0;"
"then ums mmc 0; else ums mmc 1;fi");
break;
}
return rk_board_late_init();
}
-#ifndef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
static int veyron_init(void)
{
struct udevice *dev;
int board_init(void)
{
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
struct udevice *pinctrl;
int ret;
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_debug_uart_init(void)
+{
+}
+
+void board_init_f(ulong dummy)
+{
+ struct udevice *pinctrl;
+ struct udevice *dev;
+ int ret;
+
+ ret = spl_early_init();
+ if (ret) {
+ debug("spl_early_init() failed: %d\n", ret);
+ hang();
+ }
+
+ /* Set up our preloader console */
+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+ if (ret) {
+ error("%s: pinctrl init failed: %d\n", __func__, ret);
+ hang();
+ }
+
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
+ if (ret) {
+ error("%s: failed to set up console UART\n", __func__);
+ hang();
+ }
+
+ preloader_console_init();
+
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ return;
+ }
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+ return MMCSD_MODE_RAW;
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_MMC1;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+ /* Just empty function now - can't decide what to choose */
+ debug("%s: %s\n", __func__, name);
+
+ return 0;
+}
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/clock.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/timer.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * The SPL (and also the full U-Boot stage on the RK3368) will run in
+ * secure mode (i.e. EL3) and an ATF will eventually be booted before
+ * starting up the operating system... so we can initialize the SGRF
+ * here and rely on the ATF installing the final (secure) policy
+ * later.
+ */
+static inline uintptr_t sgrf_soc_con_addr(unsigned no)
+{
+ const uintptr_t SGRF_BASE =
+ (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+
+ return SGRF_BASE + sizeof(u32) * no;
+}
+
+static inline uintptr_t sgrf_busdmac_addr(unsigned no)
+{
+ const uintptr_t SGRF_BASE =
+ (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+ const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
+ const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
+
+ return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
+}
+
+static void sgrf_init(void)
+{
+ struct rk3368_cru * const cru =
+ (struct rk3368_cru * const)rockchip_get_cru();
+ const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
+ const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
+ const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
+
+ /* Set all configurable IP to 'non secure'-mode */
+ rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
+ rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
+ rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
+
+ /*
+ * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
+ * Original comment: "ddr space set no secure mode"
+ */
+ rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
+ rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
+ rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
+
+ /* Set 'secure dma' to 'non secure'-mode */
+ rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
+ rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
+
+ dsb(); /* barrier */
+
+ rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+ rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+
+ dsb(); /* barrier */
+ udelay(10);
+
+ rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+ rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+}
+
+void board_debug_uart_init(void)
+{
+ /*
+ * N.B.: This is called before the device-model has been
+ * initialised. For this reason, we can not access
+ * the GRF address range using the syscon API.
+ */
+ struct rk3368_grf * const grf =
+ (struct rk3368_grf * const)0xff770000;
+
+ enum {
+ GPIO2D1_MASK = GENMASK(3, 2),
+ GPIO2D1_GPIO = 0,
+ GPIO2D1_UART0_SOUT = (1 << 2),
+
+ GPIO2D0_MASK = GENMASK(1, 0),
+ GPIO2D0_GPIO = 0,
+ GPIO2D0_UART0_SIN = (1 << 0),
+ };
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+ /* Enable early UART0 on the RK3368 */
+ rk_clrsetreg(&grf->gpio2d_iomux,
+ GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+ rk_clrsetreg(&grf->gpio2d_iomux,
+ GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#endif
+}
+
+void board_init_f(ulong dummy)
+{
+ struct udevice *dev;
+ int ret;
+
+#define EARLY_UART
+#ifdef EARLY_UART
+ /*
+ * Debug UART can be used from here if required:
+ *
+ * debug_uart_init();
+ * printch('a');
+ * printhex8(0x1234);
+ * printascii("string");
+ */
+ debug_uart_init();
+ printascii("U-Boot TPL board init\n");
+#endif
+
+ ret = spl_early_init();
+ if (ret) {
+ debug("spl_early_init() failed: %d\n", ret);
+ hang();
+ }
+
+ /* Reset security, so we can use DMA in the MMC drivers */
+ sgrf_init();
+
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ return;
+ }
+}
+
+void board_return_to_bootrom(void)
+{
+ back_to_bootrom();
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
choice
prompt "RK3368 board"
+config TARGET_LION_RK3368
+ bool "Theobroma Systems RK3368-uQ7 (Lion) module"
+ help
+ The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm,
+ MXM-230 connector) system-on-module designed by Theobroma
+ Systems for industrial applications.
+
+ It provides the following features:
+ - 8x Cortex-A53 (in 2 clusters of 4 cores each)
+ - (on-module) up to 4GB of DDR3 memory
+ - (on-module) SPI-NOR flash
+ - (on-module) eMMC
+ - Gigabit Ethernet (with an on-module KSZ9031 PHY)
+ - USB
+ - HDMI
+ - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
+ - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...)
+ - on-module STM32 providing CAN, RTC and fan-control
+ - (optional on-module) EAL4+-certified security module
+
config TARGET_SHEEP
bool "Sheep board"
help
config SYS_SOC
default "rockchip"
+source "board/theobroma-systems/lion_rk3368/Kconfig"
source "board/rockchip/sheep_rk3368/Kconfig"
source "board/geekbuying/geekbox/Kconfig"
source "board/rockchip/evb_px5/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/armv8/u-boot-spl.lds"
+
endif
#
obj-y += clk_rk3368.o
obj-y += rk3368.o
-obj-y += sdram_rk3368.o
obj-y += syscon_rk3368.o
+++ /dev/null
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-struct dram_info {
- struct ram_info info;
- struct rk3368_pmu_grf *pmugrf;
-};
-
-static int rk3368_dmc_probe(struct udevice *dev)
-{
- struct dram_info *priv = dev_get_priv(dev);
-
- priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
- debug("%s: grf=%p\n", __func__, priv->pmugrf);
- priv->info.base = CONFIG_SYS_SDRAM_BASE;
- priv->info.size = rockchip_sdram_size(
- (phys_addr_t)&priv->pmugrf->os_reg[2]);
-
- return 0;
-}
-
-static int rk3368_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
- struct dram_info *priv = dev_get_priv(dev);
-
- *info = priv->info;
-
- return 0;
-}
-
-static struct ram_ops rk3368_dmc_ops = {
- .get_info = rk3368_dmc_get_info,
-};
-
-
-static const struct udevice_id rk3368_dmc_ids[] = {
- { .compatible = "rockchip,rk3368-dmc" },
- { }
-};
-
-U_BOOT_DRIVER(dmc_rk3368) = {
- .name = "rockchip_rk3368_dmc",
- .id = UCLASS_RAM,
- .of_match = rk3368_dmc_ids,
- .ops = &rk3368_dmc_ops,
- .probe = rk3368_dmc_probe,
- .priv_auto_alloc_size = sizeof(struct dram_info),
-};
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
* Author: Andy Yan <andy.yan@rock-chips.com>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
* SPDX-License-Identifier: GPL-2.0+
*/
.data = ROCKCHIP_SYSCON_GRF },
{ .compatible = "rockchip,rk3368-pmugrf",
.data = ROCKCHIP_SYSCON_PMUGRF },
+ { .compatible = "rockchip,rk3368-msch",
+ .data = ROCKCHIP_SYSCON_MSCH },
+ { .compatible = "rockchip,rk3368-sgrf",
+ .data = ROCKCHIP_SYSCON_SGRF },
{ }
};
.id = UCLASS_SYSCON,
.of_match = rk3368_syscon_ids,
};
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk3368_syscon_bind_of_platdata(struct udevice *dev)
+{
+ dev->driver_data = dev->driver->of_match->data;
+ debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
+
+ return 0;
+}
+
+U_BOOT_DRIVER(rockchip_rk3368_grf) = {
+ .name = "rockchip_rk3368_grf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3368_pmugrf) = {
+ .name = "rockchip_rk3368_pmugrf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids + 1,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3368_msch) = {
+ .name = "rockchip_rk3368_msch",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids + 2,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3368_sgrf) = {
+ .name = "rockchip_rk3368_sgrf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids + 3,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+
+#undef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
+
+#include "../../cpu/armv8/u-boot-spl.lds"
#include <common.h>
#include <debug_uart.h>
#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <mmc.h>
#include <ram.h>
#include <spl.h>
#include <asm/gpio.h>
#include <asm/arch/sdram.h>
#include <asm/arch/timer.h>
#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
#include <power/regulator.h>
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OF_CONTROL)
-static int spl_node_to_boot_device(int node)
-{
- struct udevice *parent;
-
- /*
- * This should eventually move into the SPL code, once SPL becomes
- * aware of the block-device layer. Until then (and to avoid unneeded
- * delays in getting this feature out, it lives at the board-level).
- */
- if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) {
- struct udevice *dev;
- struct blk_desc *desc = NULL;
-
- for (device_find_first_child(parent, &dev);
- dev;
- device_find_next_child(&dev)) {
- if (device_get_uclass_id(dev) == UCLASS_BLK) {
- desc = dev_get_uclass_platdata(dev);
- break;
- }
- }
-
- if (!desc)
- return -ENOENT;
-
- switch (desc->devnum) {
- case 0:
- return BOOT_DEVICE_MMC1;
- case 1:
- return BOOT_DEVICE_MMC2;
- default:
- return -ENOSYS;
- }
- }
-
- /*
- * SPL doesn't differentiate SPI flashes, so we keep the detection
- * brief and inaccurate... hopefully, the common SPL layer can be
- * extended with awareness of the BLK layer (and matching OF_CONTROL)
- * soon.
- */
- if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
- return BOOT_DEVICE_SPI;
-
- return -1;
-}
-
-void board_boot_order(u32 *spl_boot_list)
-{
- const void *blob = gd->fdt_blob;
- int chosen_node = fdt_path_offset(blob, "/chosen");
- int idx = 0;
- int elem;
- int boot_device;
- int node;
- const char *conf;
-
- if (chosen_node < 0) {
- debug("%s: /chosen not found, using spl_boot_device()\n",
- __func__);
- spl_boot_list[0] = spl_boot_device();
- return;
- }
-
- for (elem = 0;
- (conf = fdt_stringlist_get(blob, chosen_node,
- "u-boot,spl-boot-order", elem, NULL));
- elem++) {
- /* First check if the list element is an alias */
- const char *alias = fdt_get_alias(blob, conf);
- if (alias)
- conf = alias;
-
- /* Try to resolve the config item (or alias) as a path */
- node = fdt_path_offset(blob, conf);
- if (node < 0) {
- debug("%s: could not find %s in FDT", __func__, conf);
- continue;
- }
-
- /* Try to map this back onto SPL boot devices */
- boot_device = spl_node_to_boot_device(node);
- if (boot_device < 0) {
- debug("%s: could not map node @%x to a boot-device\n",
- __func__, node);
- continue;
- }
-
- spl_boot_list[idx++] = boot_device;
- }
-
- /* If we had no matches, fall back to spl_boot_device */
- if (idx == 0)
- spl_boot_list[0] = spl_boot_device();
-}
-#endif
-
u32 spl_boot_device(void)
{
return BOOT_DEVICE_MMC1;
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
+#if defined(CONFIG_ARM64)
+.globl SAVE_SP_ADDR
+SAVE_SP_ADDR:
+ .quad 0
+
+ENTRY(save_boot_params)
+ sub sp, sp, #0x60
+ stp x29, x30, [sp, #0x50]
+ stp x27, x28, [sp, #0x40]
+ stp x25, x26, [sp, #0x30]
+ stp x23, x24, [sp, #0x20]
+ stp x21, x22, [sp, #0x10]
+ stp x19, x20, [sp, #0]
+ ldr x8, =SAVE_SP_ADDR
+ mov x9, sp
+ str x9, [x8]
+ b save_boot_params_ret /* back to my caller */
+ENDPROC(save_boot_params)
+
+.globl _back_to_bootrom_s
+ENTRY(_back_to_bootrom_s)
+ ldr x0, =SAVE_SP_ADDR
+ ldr x0, [x0]
+ mov sp, x0
+ ldp x29, x30, [sp, #0x50]
+ ldp x27, x28, [sp, #0x40]
+ ldp x25, x26, [sp, #0x30]
+ ldp x23, x24, [sp, #0x20]
+ ldp x21, x22, [sp, #0x10]
+ ldp x19, x20, [sp]
+ add sp, sp, #0x60
+ mov x0, xzr
+ ret
+ENDPROC(_back_to_bootrom_s)
+#else
.globl SAVE_SP_ADDR
SAVE_SP_ADDR:
.word 0
mov r0, #0
pop {r1-r12, pc}
ENDPROC(_back_to_bootrom_s)
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <mmc.h>
+#include <spl.h>
+
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static int spl_node_to_boot_device(int node)
+{
+ struct udevice *parent;
+
+ /*
+ * This should eventually move into the SPL code, once SPL becomes
+ * aware of the block-device layer. Until then (and to avoid unneeded
+ * delays in getting this feature out, it lives at the board-level).
+ */
+ if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) {
+ struct udevice *dev;
+ struct blk_desc *desc = NULL;
+
+ for (device_find_first_child(parent, &dev);
+ dev;
+ device_find_next_child(&dev)) {
+ if (device_get_uclass_id(dev) == UCLASS_BLK) {
+ desc = dev_get_uclass_platdata(dev);
+ break;
+ }
+ }
+
+ if (!desc)
+ return -ENOENT;
+
+ switch (desc->devnum) {
+ case 0:
+ return BOOT_DEVICE_MMC1;
+ case 1:
+ return BOOT_DEVICE_MMC2;
+ default:
+ return -ENOSYS;
+ }
+ }
+
+ /*
+ * SPL doesn't differentiate SPI flashes, so we keep the detection
+ * brief and inaccurate... hopefully, the common SPL layer can be
+ * extended with awareness of the BLK layer (and matching OF_CONTROL)
+ * soon.
+ */
+ if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
+ return BOOT_DEVICE_SPI;
+
+ return -1;
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+ const void *blob = gd->fdt_blob;
+ int chosen_node = fdt_path_offset(blob, "/chosen");
+ int idx = 0;
+ int elem;
+ int boot_device;
+ int node;
+ const char *conf;
+
+ if (chosen_node < 0) {
+ debug("%s: /chosen not found, using spl_boot_device()\n",
+ __func__);
+ spl_boot_list[0] = spl_boot_device();
+ return;
+ }
+
+ for (elem = 0;
+ (conf = fdt_stringlist_get(blob, chosen_node,
+ "u-boot,spl-boot-order", elem, NULL));
+ elem++) {
+ /* First check if the list element is an alias */
+ const char *alias = fdt_get_alias(blob, conf);
+ if (alias)
+ conf = alias;
+
+ /* Try to resolve the config item (or alias) as a path */
+ node = fdt_path_offset(blob, conf);
+ if (node < 0) {
+ debug("%s: could not find %s in FDT", __func__, conf);
+ continue;
+ }
+
+ /* Try to map this back onto SPL boot devices */
+ boot_device = spl_node_to_boot_device(node);
+ if (boot_device < 0) {
+ debug("%s: could not map node @%x to a boot-device\n",
+ __func__, node);
+ continue;
+ }
+
+ spl_boot_list[idx++] = boot_device;
+ }
+
+ /* If we had no matches, fall back to spl_boot_device */
+ if (idx == 0)
+ spl_boot_list[0] = spl_boot_device();
+}
+#endif
{
const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
const int fpga_id = socfpga_fpga_id(0);
- setenv("bootmode", bsel_str[bsel].mode);
+ env_set("bootmode", bsel_str[bsel].mode);
if (fpga_id >= 0)
- setenv("fpgatype", socfpga_fpga_model[fpga_id].var);
+ env_set("fpgatype", socfpga_fpga_model[fpga_id].var);
return socfpga_eth_reset();
}
#endif
config STM32F4
bool "stm32f4 family"
-config STM32F1
- bool "stm32f1 family"
-
config STM32F7
bool "stm32f7 family"
select SUPPORT_SPL
select SPL_XIP_SUPPORT
source "arch/arm/mach-stm32/stm32f4/Kconfig"
-source "arch/arm/mach-stm32/stm32f1/Kconfig"
source "arch/arm/mach-stm32/stm32f7/Kconfig"
endif
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_STM32F1) += stm32f1/
obj-$(CONFIG_STM32F4) += stm32f4/
obj-$(CONFIG_STM32F7) += stm32f7/
+++ /dev/null
-if STM32F1
-
-endif
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2015
-# Kamil Lulko, <kamil.lulko@gmail.com>
-#
-# Copyright 2015 ATS Advanced Telematics Systems GmbH
-# Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += soc.o clock.o timer.o flash.o
+++ /dev/null
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * (C) Copyright 2014
- * STMicroelectronics
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/stm32.h>
-
-#define RCC_CR_HSION (1 << 0)
-#define RCC_CR_HSEON (1 << 16)
-#define RCC_CR_HSERDY (1 << 17)
-#define RCC_CR_HSEBYP (1 << 18)
-#define RCC_CR_CSSON (1 << 19)
-#define RCC_CR_PLLON (1 << 24)
-#define RCC_CR_PLLRDY (1 << 25)
-
-#define RCC_CFGR_PLLMUL_MASK 0x3C0000
-#define RCC_CFGR_PLLMUL_SHIFT 18
-#define RCC_CFGR_PLLSRC_HSE (1 << 16)
-
-#define RCC_CFGR_AHB_PSC_MASK 0xF0
-#define RCC_CFGR_APB1_PSC_MASK 0x700
-#define RCC_CFGR_APB2_PSC_MASK 0x3800
-#define RCC_CFGR_SW0 (1 << 0)
-#define RCC_CFGR_SW1 (1 << 1)
-#define RCC_CFGR_SW_MASK 0x3
-#define RCC_CFGR_SW_HSI 0
-#define RCC_CFGR_SW_HSE RCC_CFGR_SW0
-#define RCC_CFGR_SW_PLL RCC_CFGR_SW1
-#define RCC_CFGR_SWS0 (1 << 2)
-#define RCC_CFGR_SWS1 (1 << 3)
-#define RCC_CFGR_SWS_MASK 0xC
-#define RCC_CFGR_SWS_HSI 0
-#define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
-#define RCC_CFGR_SWS_PLL RCC_CFGR_SWS1
-#define RCC_CFGR_HPRE_SHIFT 4
-#define RCC_CFGR_PPRE1_SHIFT 8
-#define RCC_CFGR_PPRE2_SHIFT 11
-
-#define RCC_APB1ENR_PWREN (1 << 28)
-
-#define PWR_CR_VOS0 (1 << 14)
-#define PWR_CR_VOS1 (1 << 15)
-#define PWR_CR_VOS_MASK 0xC000
-#define PWR_CR_VOS_SCALE_MODE_1 (PWR_CR_VOS0 | PWR_CR_VOS1)
-#define PWR_CR_VOS_SCALE_MODE_2 (PWR_CR_VOS1)
-#define PWR_CR_VOS_SCALE_MODE_3 (PWR_CR_VOS0)
-
-#define FLASH_ACR_WS(n) n
-#define FLASH_ACR_PRFTEN (1 << 8)
-#define FLASH_ACR_ICEN (1 << 9)
-#define FLASH_ACR_DCEN (1 << 10)
-
-struct psc {
- u8 ahb_psc;
- u8 apb1_psc;
- u8 apb2_psc;
-};
-
-#define AHB_PSC_1 0
-#define AHB_PSC_2 0x8
-#define AHB_PSC_4 0x9
-#define AHB_PSC_8 0xA
-#define AHB_PSC_16 0xB
-#define AHB_PSC_64 0xC
-#define AHB_PSC_128 0xD
-#define AHB_PSC_256 0xE
-#define AHB_PSC_512 0xF
-
-#define APB_PSC_1 0
-#define APB_PSC_2 0x4
-#define APB_PSC_4 0x5
-#define APB_PSC_8 0x6
-#define APB_PSC_16 0x7
-
-#if !defined(CONFIG_STM32_HSE_HZ)
-#error "CONFIG_STM32_HSE_HZ not defined!"
-#else
-#if (CONFIG_STM32_HSE_HZ == 8000000)
-#define RCC_CFGR_PLLMUL_CFG 0x7
-struct psc psc_hse = {
- .ahb_psc = AHB_PSC_1,
- .apb1_psc = APB_PSC_2,
- .apb2_psc = APB_PSC_1
-};
-#else
-#error "No PLL/Prescaler configuration for given CONFIG_STM32_HSE_HZ exists"
-#endif
-#endif
-
-int configure_clocks(void)
-{
- /* Reset RCC configuration */
- setbits_le32(&STM32_RCC->cr, RCC_CR_HSION);
- writel(0, &STM32_RCC->cfgr); /* Reset CFGR */
- clrbits_le32(&STM32_RCC->cr, (RCC_CR_HSEON | RCC_CR_CSSON
- | RCC_CR_PLLON));
- clrbits_le32(&STM32_RCC->cr, RCC_CR_HSEBYP);
- writel(0, &STM32_RCC->cir); /* Disable all interrupts */
-
- /* Configure for HSE+PLL operation */
- setbits_le32(&STM32_RCC->cr, RCC_CR_HSEON);
- while (!(readl(&STM32_RCC->cr) & RCC_CR_HSERDY))
- ;
-
- /* Enable high performance mode, System frequency up to 168 MHz */
- setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_PWREN);
- writel(PWR_CR_VOS_SCALE_MODE_1, &STM32_PWR->cr);
-
- setbits_le32(&STM32_RCC->cfgr,
- RCC_CFGR_PLLMUL_CFG << RCC_CFGR_PLLMUL_SHIFT);
- setbits_le32(&STM32_RCC->cfgr, RCC_CFGR_PLLSRC_HSE);
- setbits_le32(&STM32_RCC->cfgr, ((
- psc_hse.ahb_psc << RCC_CFGR_HPRE_SHIFT)
- | (psc_hse.apb1_psc << RCC_CFGR_PPRE1_SHIFT)
- | (psc_hse.apb2_psc << RCC_CFGR_PPRE2_SHIFT)));
-
- setbits_le32(&STM32_RCC->cr, RCC_CR_PLLON);
-
- while (!(readl(&STM32_RCC->cr) & RCC_CR_PLLRDY))
- ;
-
- /* 5 wait states, Prefetch enabled, D-Cache enabled, I-Cache enabled */
- writel(FLASH_ACR_WS(5) | FLASH_ACR_PRFTEN | FLASH_ACR_ICEN
- | FLASH_ACR_DCEN, &STM32_FLASH->acr);
-
- clrbits_le32(&STM32_RCC->cfgr, (RCC_CFGR_SW0 | RCC_CFGR_SW1));
- setbits_le32(&STM32_RCC->cfgr, RCC_CFGR_SW_PLL);
-
- while ((readl(&STM32_RCC->cfgr) & RCC_CFGR_SWS_MASK) !=
- RCC_CFGR_SWS_PLL)
- ;
-
- return 0;
-}
-
-unsigned long clock_get(enum clock clck)
-{
- u32 sysclk = 0;
- u32 shift = 0;
- /* PLL table lookups for clock computation */
- u8 pll_mul_table[16] = {
- 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16
- };
- /* Prescaler table lookups for clock computation */
- u8 ahb_psc_table[16] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9
- };
- u8 apb_psc_table[8] = {
- 0, 0, 0, 0, 1, 2, 3, 4
- };
-
- if ((readl(&STM32_RCC->cfgr) & RCC_CFGR_SWS_MASK) ==
- RCC_CFGR_SWS_PLL) {
- u16 pll;
- pll = ((readl(&STM32_RCC->cfgr) & RCC_CFGR_PLLMUL_MASK)
- >> RCC_CFGR_PLLMUL_SHIFT);
- sysclk = CONFIG_STM32_HSE_HZ * pll_mul_table[pll];
- }
-
- switch (clck) {
- case CLOCK_CORE:
- return sysclk;
- break;
- case CLOCK_AHB:
- shift = ahb_psc_table[(
- (readl(&STM32_RCC->cfgr) & RCC_CFGR_AHB_PSC_MASK)
- >> RCC_CFGR_HPRE_SHIFT)];
- return sysclk >>= shift;
- break;
- case CLOCK_APB1:
- shift = apb_psc_table[(
- (readl(&STM32_RCC->cfgr) & RCC_CFGR_APB1_PSC_MASK)
- >> RCC_CFGR_PPRE1_SHIFT)];
- return sysclk >>= shift;
- break;
- case CLOCK_APB2:
- shift = apb_psc_table[(
- (readl(&STM32_RCC->cfgr) & RCC_CFGR_APB2_PSC_MASK)
- >> RCC_CFGR_PPRE2_SHIFT)];
- return sysclk >>= shift;
- break;
- default:
- return 0;
- break;
- }
-}
+++ /dev/null
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/stm32.h>
-
-#define STM32_FLASH_KEY1 0x45670123
-#define STM32_FLASH_KEY2 0xcdef89ab
-
-#define STM32_NUM_BANKS 2
-#define STM32_MAX_BANK 0x200
-
-flash_info_t flash_info[STM32_NUM_BANKS];
-static struct stm32_flash_bank_regs *flash_bank[STM32_NUM_BANKS];
-
-static void stm32f1_flash_lock(u8 bank, u8 lock)
-{
- if (lock) {
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_LOCK);
- } else {
- writel(STM32_FLASH_KEY1, &flash_bank[bank]->keyr);
- writel(STM32_FLASH_KEY2, &flash_bank[bank]->keyr);
- }
-}
-
-/* Only XL devices are supported (2 KiB sector size) */
-unsigned long flash_init(void)
-{
- u8 i, banks;
- u16 j, size;
-
- /* Set up accessors for XL devices with wonky register layout */
- flash_bank[0] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr;
- flash_bank[1] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr2;
-
- /*
- * Get total flash size (in KiB) and configure number of banks
- * present and sector count per bank.
- */
- size = readw(&STM32_DES->flash_size);
- if (size <= STM32_MAX_BANK) {
- banks = 1;
- flash_info[0].sector_count = size >> 1;
- } else if (size > STM32_MAX_BANK) {
- banks = 2;
- flash_info[0].sector_count = STM32_MAX_BANK >> 1;
- flash_info[1].sector_count = (size - STM32_MAX_BANK) >> 1;
- }
-
- /* Configure start/size for all sectors */
- for (i = 0; i < banks; i++) {
- flash_info[i].flash_id = FLASH_STM32F1;
- flash_info[i].start[0] = CONFIG_SYS_FLASH_BASE + (i << 19);
- flash_info[i].size = 2048;
- for (j = 1; (j < flash_info[i].sector_count); j++) {
- flash_info[i].start[j] = flash_info[i].start[j - 1]
- + 2048;
- flash_info[i].size += 2048;
- }
- }
-
- return size << 10;
-}
-
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("Missing or unknown FLASH type\n");
- return;
- } else if (info->flash_id == FLASH_STM32F1) {
- printf("STM32F1 Embedded Flash\n");
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
- return;
-}
-
-int flash_erase(flash_info_t *info, int first, int last)
-{
- u8 bank = 0xff;
- int i;
-
- for (i = 0; i < STM32_NUM_BANKS; i++) {
- if (info == &flash_info[i]) {
- bank = i;
- break;
- }
- }
- if (bank == 0xff)
- return -1;
-
- stm32f1_flash_lock(bank, 0);
-
- for (i = first; i <= last; i++) {
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
-
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
-
- writel(info->start[i], &flash_bank[bank]->ar);
-
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_STRT);
-
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
- }
-
- clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
-
- stm32f1_flash_lock(bank, 1);
-
- return 0;
-}
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong i;
- u8 bank = 0xff;
-
- if (addr & 1) {
- printf("Flash address must be half word aligned\n");
- return -1;
- }
-
- if (cnt & 1) {
- printf("Flash length must be half word aligned\n");
- return -1;
- }
-
- for (i = 0; i < 2; i++) {
- if (info == &flash_info[i]) {
- bank = i;
- break;
- }
- }
-
- if (bank == 0xff)
- return -1;
-
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
-
- stm32f1_flash_lock(bank, 0);
-
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
-
- /* STM32F1 requires half word writes */
- for (i = 0; i < cnt >> 1; i++) {
- *(u16 *)(addr + i * 2) = ((u16 *)src)[i];
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
- }
-
- clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
-
- stm32f1_flash_lock(bank, 1);
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/armv7m.h>
-#include <asm/arch/stm32.h>
-
-u32 get_cpu_rev(void)
-{
- return 0;
-}
-
-int arch_cpu_init(void)
-{
- configure_clocks();
-
- /*
- * Configure the memory protection unit (MPU) to allow full access to
- * the whole 4GB address space.
- */
- writel(0, &V7M_MPU->rnr);
- writel(0, &V7M_MPU->rbar);
- writel((V7M_MPU_RASR_AP_RW_RW | V7M_MPU_RASR_SIZE_4GB
- | V7M_MPU_RASR_EN), &V7M_MPU->rasr);
- writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, &V7M_MPU->ctrl);
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/armv7m.h>
-#include <asm/arch/stm32.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define STM32_TIM2_BASE (STM32_APB1PERIPH_BASE + 0x0000)
-
-#define RCC_APB1ENR_TIM2EN (1 << 0)
-
-struct stm32_tim2_5 {
- u32 cr1;
- u32 cr2;
- u32 smcr;
- u32 dier;
- u32 sr;
- u32 egr;
- u32 ccmr1;
- u32 ccmr2;
- u32 ccer;
- u32 cnt;
- u32 psc;
- u32 arr;
- u32 reserved1;
- u32 ccr1;
- u32 ccr2;
- u32 ccr3;
- u32 ccr4;
- u32 reserved2;
- u32 dcr;
- u32 dmar;
- u32 or;
-};
-
-#define TIM_CR1_CEN (1 << 0)
-
-#define TIM_EGR_UG (1 << 0)
-
-int timer_init(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
-
- setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
-
- if (clock_get(CLOCK_AHB) == clock_get(CLOCK_APB1))
- writel((clock_get(CLOCK_APB1) / CONFIG_SYS_HZ_CLOCK) - 1,
- &tim->psc);
- else
- writel(((clock_get(CLOCK_APB1) * 2) / CONFIG_SYS_HZ_CLOCK) - 1,
- &tim->psc);
-
- writel(0xFFFFFFFF, &tim->arr);
- writel(TIM_CR1_CEN, &tim->cr1);
- setbits_le32(&tim->egr, TIM_EGR_UG);
-
- gd->arch.tbl = 0;
- gd->arch.tbu = 0;
- gd->arch.lastinc = 0;
-
- return 0;
-}
-
-ulong get_timer(ulong base)
-{
- return (get_ticks() / (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)) - base;
-}
-
-unsigned long long get_ticks(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
- u32 now;
-
- now = readl(&tim->cnt);
-
- if (now >= gd->arch.lastinc)
- gd->arch.tbl += (now - gd->arch.lastinc);
- else
- gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
-
- gd->arch.lastinc = now;
-
- return gd->arch.tbl;
-}
-
-void reset_timer(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
-
- gd->arch.lastinc = readl(&tim->cnt);
- gd->arch.tbl = 0;
-}
-
-/* delay x useconds */
-void __udelay(ulong usec)
-{
- unsigned long long start;
-
- start = get_ticks(); /* get current timestamp */
- while ((get_ticks() - start) < usec)
- ; /* loop till time has passed */
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- return CONFIG_SYS_HZ_CLOCK;
-}
if ARCH_SUNXI
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
+
config IDENT_STRING
default " Allwinner Technology"
select SUNXI_DRAM_DW_32BIT
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
- imply ENV_IS_IN_MMC
choice
prompt "Sunxi SoC Variant"
select ARM_CORTEX_CPU_IS_UP
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
- imply ENV_IS_IN_MMC
config MACH_SUN5I
bool "sun5i (Allwinner A13)"
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN7I
bool "sun7i (Allwinner A20)"
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN8I_A23
bool "sun8i (Allwinner A23)"
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN8I_A33
bool "sun8i (Allwinner A33)"
select ARCH_SUPPORT_PSCI
select MACH_SUNXI_H3_H5
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN8I_R40
bool "sun8i (Allwinner R40)"
#ifdef CONFIG_MACH_SUNXI_H3_H5
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ struct sunxi_prcm_reg * const prcm =
+ (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
setbits_le32(&ccm->ccu_sec_switch,
CCM_SEC_SWITCH_MBUS_NONSEC |
CCM_SEC_SWITCH_BUS_NONSEC |
CCM_SEC_SWITCH_PLL_NONSEC);
+ setbits_le32(&prcm->prcm_sec_switch,
+ PRCM_SEC_SWITCH_APB0_CLK_NONSEC |
+ PRCM_SEC_SWITCH_PLL_CFG_NONSEC |
+ PRCM_SEC_SWITCH_PWR_GATE_NONSEC);
#endif
}
bool "Tegra 64-bit common options"
select ARM64
select TEGRA_COMMON
- imply ENV_IS_IN_MMC
choice
prompt "Tegra SoC select"
select ARM_ERRATA_743622
select ARM_ERRATA_751472
select TEGRA_ARMV7_COMMON
- imply ENV_IS_IN_MMC
config TEGRA114
bool "Tegra114 family"
config TEGRA124
bool "Tegra124 family"
select TEGRA_ARMV7_COMMON
- imply ENV_IS_IN_MMC
imply REGMAP
imply SYSCON
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
if (tegra_cpu_is_non_secure()) {
printf("CPU is in NS mode\n");
- setenv("cpu_ns_mode", "1");
+ env_set("cpu_ns_mode", "1");
} else {
- setenv("cpu_ns_mode", "");
+ env_set("cpu_ns_mode", "");
}
#endif
start_cpu_fan();
{
int ret;
- ret = setenv_hex("fdt_addr", nvtboot_boot_x0);
+ ret = env_set_hex("fdt_addr", nvtboot_boot_x0);
if (ret) {
printf("Failed to set fdt_addr to point at DTB: %d\n", ret);
return ret;
const u32 *prop;
/* Already a valid address in the environment? If so, keep it */
- if (getenv("ethaddr"))
+ if (env_get("ethaddr"))
return 0;
node = fdt_path_offset(nvtboot_blob, "/chosen");
return -ENOENT;
}
- ret = setenv("ethaddr", (void *)prop);
+ ret = env_set("ethaddr", (void *)prop);
if (ret) {
printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret);
return ret;
select CPU_V7_HAS_NONSEC
select ARMV7_NONSEC
select ARCH_SUPPORT_PSCI
+ imply NAND
choice
prompt "UniPhier SoC select"
char dtb_name[256];
int buf_len = sizeof(dtb_name);
- if (getenv("fdt_file"))
+ if (env_get("fdt_file"))
return 0; /* do nothing if it is already set */
compat = fdt_stringlist_get(gd->fdt_blob, 0, "compatible", 0, NULL);
strncat(dtb_name, ".dtb", buf_len);
- return setenv("fdt_file", dtb_name);
+ return env_set("fdt_file", dtb_name);
}
int board_late_init(void)
switch (uniphier_boot_device_raw()) {
case BOOT_DEVICE_MMC1:
printf("eMMC Boot");
- setenv("bootmode", "emmcboot");
+ env_set("bootmode", "emmcboot");
break;
case BOOT_DEVICE_NAND:
printf("NAND Boot");
- setenv("bootmode", "nandboot");
+ env_set("bootmode", "nandboot");
nand_denali_wp_disable();
break;
case BOOT_DEVICE_NOR:
printf("NOR Boot");
- setenv("bootmode", "norboot");
+ env_set("bootmode", "norboot");
break;
case BOOT_DEVICE_USB:
printf("USB Boot");
- setenv("bootmode", "usbboot");
+ env_set("bootmode", "usbboot");
break;
default:
printf("Unknown");
if (dev < 0)
return CMD_RET_FAILURE;
- setenv_ulong("mmc_first_dev", dev);
+ env_set_ulong("mmc_first_dev", dev);
return CMD_RET_SUCCESS;
}
if ARCH_ZYNQ
+config SPL_LDSCRIPT
+ default "arch/arm/mach-zynq/u-boot-spl.lds"
+
config SPL_FAT_SUPPORT
default y
config MCF52x2
bool
- imply ENV_IS_IN_FLASH
config MCF523x
bool
config MCF532x
bool
- imply ENV_IS_IN_FLASH
config MCF537x
bool
config MCF547x_8x
bool
- imply ENV_IS_IN_FLASH
# processor type
config M5208
config M5282
bool
select MCF52x2
- imply ENV_IS_IN_FLASH
config M5307
bool
config M547x
bool
select MCF547x_8x
- imply ENV_IS_IN_FLASH
config M548x
bool
select MCF547x_8x
- imply ENV_IS_IN_FLASH
choice
prompt "Target select"
config TARGET_M5475EVB
bool "Support M5475EVB"
select M547x
- imply ENV_IS_IN_FLASH
config TARGET_M5485EVB
bool "Support M5485EVB"
select M548x
- imply ENV_IS_IN_FLASH
config TARGET_AMCORE
bool "Support AMCORE"
select M5307
+config TARGET_STMARK2
+ bool "Support stmark2"
+ select M54418
+
endchoice
source "board/BuS/eb_cpu5282/Kconfig"
source "board/freescale/m547xevb/Kconfig"
source "board/freescale/m548xevb/Kconfig"
source "board/sysam/amcore/Kconfig"
+source "board/sysam/stmark2/Kconfig"
endmenu
/* FlexBus Chipselect */
init_fbcs();
+#ifdef CONFIG_SYS_CS0_BASE
/*
* now the flash base address is no longer at 0 (Newer ColdFire family
* boot at address 0 instead of 0xFFnn_nnnn). The vector table must
*/
if (CONFIG_SYS_CS0_BASE != 0)
setvbr(CONFIG_SYS_CS0_BASE);
+#endif
icache_enable();
}
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
clr.l %sp@-
+#ifdef CONFIG_SYS_CS0_BASE
/* Must disable global address */
move.l #0xFC008000, %a1
move.l #(CONFIG_SYS_CS0_BASE), (%a1)
move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
move.l #0xFC008004, %a1
move.l #(CONFIG_SYS_CS0_MASK), (%a1)
+#endif
#endif /* CONFIG_CF_SBF */
#ifdef CONFIG_MCF5441x
#if defined(CONFIG_CF_SBF)
move.b #23, (%a1) /* dspi */
#endif
- move.b #46, (%a1) /* DDR */
-
- /* slew settings */
- move.l #0xEC094060, %a1
- move.b #0, (%a1)
-
- /* use vco instead of cpu*2 clock for ddr clock */
- move.l #0xEC09001A, %a1
- move.w #0xE01D, (%a1)
-
- /* DDR settings */
- move.l #0xFC0B8180, %a1
- move.l #0x00000000, (%a1)
- move.l #0x40000000, (%a1)
-
- move.l #0xFC0B81AC, %a1
- move.l #0x01030203, (%a1)
-
- move.l #0xFC0B8000, %a1
- move.l #0x01010101, (%a1)+ /* 0x00 */
- move.l #0x00000101, (%a1)+ /* 0x04 */
- move.l #0x01010100, (%a1)+ /* 0x08 */
- move.l #0x01010000, (%a1)+ /* 0x0C */
- move.l #0x00010101, (%a1)+ /* 0x10 */
- move.l #0xFC0B8018, %a1
- move.l #0x00010100, (%a1)+ /* 0x18 */
- move.l #0x00000001, (%a1)+ /* 0x1C */
- move.l #0x01000001, (%a1)+ /* 0x20 */
- move.l #0x00000100, (%a1)+ /* 0x24 */
- move.l #0x00010001, (%a1)+ /* 0x28 */
- move.l #0x00000200, (%a1)+ /* 0x2C */
- move.l #0x01000002, (%a1)+ /* 0x30 */
- move.l #0x00000000, (%a1)+ /* 0x34 */
- move.l #0x00000100, (%a1)+ /* 0x38 */
- move.l #0x02000100, (%a1)+ /* 0x3C */
- move.l #0x02000407, (%a1)+ /* 0x40 */
- move.l #0x02030007, (%a1)+ /* 0x44 */
- move.l #0x02000100, (%a1)+ /* 0x48 */
- move.l #0x0A030203, (%a1)+ /* 0x4C */
- move.l #0x00020708, (%a1)+ /* 0x50 */
- move.l #0x00050008, (%a1)+ /* 0x54 */
- move.l #0x04030002, (%a1)+ /* 0x58 */
- move.l #0x00000004, (%a1)+ /* 0x5C */
- move.l #0x020A0000, (%a1)+ /* 0x60 */
- move.l #0x0C00000E, (%a1)+ /* 0x64 */
- move.l #0x00002004, (%a1)+ /* 0x68 */
- move.l #0x00000000, (%a1)+ /* 0x6C */
- move.l #0x00100010, (%a1)+ /* 0x70 */
- move.l #0x00100010, (%a1)+ /* 0x74 */
- move.l #0x00000000, (%a1)+ /* 0x78 */
- move.l #0x07990000, (%a1)+ /* 0x7C */
- move.l #0xFC0B80A0, %a1
- move.l #0x00000000, (%a1)+ /* 0xA0 */
- move.l #0x00C80064, (%a1)+ /* 0xA4 */
- move.l #0x44520002, (%a1)+ /* 0xA8 */
- move.l #0x00C80023, (%a1)+ /* 0xAC */
- move.l #0xFC0B80B4, %a1
- move.l #0x0000C350, (%a1) /* 0xB4 */
- move.l #0xFC0B80E0, %a1
- move.l #0x04000000, (%a1)+ /* 0xE0 */
- move.l #0x03000304, (%a1)+ /* 0xE4 */
- move.l #0x40040000, (%a1)+ /* 0xE8 */
- move.l #0xC0004004, (%a1)+ /* 0xEC */
- move.l #0x0642C000, (%a1)+ /* 0xF0 */
- move.l #0x00000642, (%a1)+ /* 0xF4 */
- move.l #0xFC0B8024, %a1
- tpf
- move.l #0x01000100, (%a1) /* 0x24 */
-
- move.l #0x2000, %d1
- jsr asm_delay
-#endif /* CONFIG_MCF5441x */
-
-#ifdef CONFIG_MCF5445x
- /* Dram Initialization a1, a2, and d0 */
- /* mscr sdram */
- move.l #0xFC0A4074, %a1
- move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
- nop
-
- /* SDRAM Chip 0 and 1 */
- move.l #0xFC0B8110, %a1
- move.l #0xFC0B8114, %a2
-
- /* calculate the size */
- move.l #0x13, %d1
- move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
-#ifdef CONFIG_SYS_SDRAM_BASE1
- lsr.l #1, %d2
-#endif
-
-dramsz_loop:
- lsr.l #1, %d2
- add.l #1, %d1
- cmp.l #1, %d2
- bne dramsz_loop
-#ifdef CONFIG_SYS_NAND_BOOT
- beq asm_nand_chk_status
-#endif
- /* SDRAM Chip 0 and 1 */
- move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
- or.l %d1, (%a1)
-#ifdef CONFIG_SYS_SDRAM_BASE1
- move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
- or.l %d1, (%a2)
-#endif
- nop
+#endif /* CONFIG_MCF5441x */
- /* dram cfg1 and cfg2 */
- move.l #0xFC0B8008, %a1
- move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
- nop
- move.l #0xFC0B800C, %a2
- move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
- nop
-
- move.l #0xFC0B8000, %a1 /* Mode */
- move.l #0xFC0B8004, %a2 /* Ctrl */
-
- /* Issue PALL */
- move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
- nop
-
-#ifdef CONFIG_M54455EVB
- /* Issue LEMR */
- move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
- nop
- move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
- nop
-#endif
-
- move.l #1000, %d1
- jsr asm_delay
-
- /* Issue PALL */
- move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
- nop
-
- /* Perform two refresh cycles */
- move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
- nop
- move.l %d0, (%a2)
- move.l %d0, (%a2)
- nop
-
-#ifdef CONFIG_M54455EVB
- move.l #(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
- nop
-#elif defined(CONFIG_M54451EVB)
- /* Issue LEMR */
- move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
- nop
- move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
-#endif
-
- move.l #500, %d1
- jsr asm_delay
-
- move.l #(CONFIG_SYS_SDRAM_CTRL), %d1
- and.l #0x7FFFFFFF, %d1
-#ifdef CONFIG_M54455EVB
- or.l #0x10000C00, %d1
-#elif defined(CONFIG_M54451EVB)
- or.l #0x10000C00, %d1
-#endif
- move.l %d1, (%a2)
- nop
-
- move.l #2000, %d1
- jsr asm_delay
-#endif /* CONFIG_MCF5445x */
+ /* mandatory board level ddr-sdram init,
+ * for both 5441x and 5445x
+ */
+ bsr sbf_dram_init
#ifdef CONFIG_CF_SBF
/*
movec %d0, %ACR2
movec %d0, %ACR3
+#ifdef CONFIG_SYS_CS0_BASE
/* Must disable global address */
move.l #0xFC008000, %a1
move.l #(CONFIG_SYS_CS0_BASE), (%a1)
move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
move.l #0xFC008004, %a1
move.l #(CONFIG_SYS_CS0_MASK), (%a1)
+#endif
/* NAND port configuration */
move.l #0xEC094048, %a1
move.l #0x000e0000, (%a1)
move.l #0x2000, %d1
- jsr asm_delay
+ bsr asm_delay
/* setup nand */
move.l #0xFC0FFF00, %a1
move.l %d0, (%a0)
move.l #0x200, %d1
- jsr asm_delay
+ bsr asm_delay
asm_nand_chk_status:
move.l #0xFC0FFF38, %a4 /* isr */
#endif /* CONFIG_SYS_NAND_BOOT */
+.globl asm_delay
asm_delay:
nop
subq.l #1, %d1
{
char *s;
- if ((s = getenv("clocks_in_mhz")) != NULL) {
+ s = env_get("clocks_in_mhz");
+ if (s) {
/* convert all clock information to MHz */
kbd->bi_intfreq /= 1000000L;
kbd->bi_busfreq /= 1000000L;
*cf_icache_status = 1;
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr2"::"r"(CONFIG_SYS_CACHE_ACR2));
__asm__ __volatile__("movec %0, %%acr3"::"r"(CONFIG_SYS_CACHE_ACR3));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr6"::"r"(CONFIG_SYS_CACHE_ACR6));
__asm__ __volatile__("movec %0, %%acr7"::"r"(CONFIG_SYS_CACHE_ACR7));
+#endif
#else
__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
*cf_icache_status = 0;
icache_invalid();
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr2"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr3"::"r"(temp));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr6"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr7"::"r"(temp));
+#endif
#else
__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
-
#endif
}
dcache_invalid();
*cf_dcache_status = 1;
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr4"::"r"(CONFIG_SYS_CACHE_ACR4));
__asm__ __volatile__("movec %0, %%acr5"::"r"(CONFIG_SYS_CACHE_ACR5));
-
+#endif
#endif
__asm__ __volatile__("movec %0, %%cacr"::"r"(CONFIG_SYS_CACHE_DCACR));
__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr4"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr5"::"r"(temp));
-
+#endif
#endif
}
void dcache_invalid(void)
{
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
u32 temp;
temp = CONFIG_SYS_DCACHE_INV;
source "board/xilinx/microblaze-generic/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/microblaze/cpu/u-boot-spl.lds"
+
endmenu
{
/* First parameter is mapped to $r5 for kernel boot args */
void (*thekernel) (char *, ulong, ulong);
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
ulong rd_data_start, rd_data_end;
/*
select SUPPORTS_CPU_MIPS64_R1
select SUPPORTS_CPU_MIPS64_R2
select ROM_EXCEPTION_VECTORS
- imply ENV_IS_IN_FLASH
config TARGET_MALTA
bool "Support malta"
select SWAP_IO_SPACE
select MIPS_L1_CACHE_SHIFT_6
select ROM_EXCEPTION_VECTORS
- imply ENV_IS_IN_FLASH
config TARGET_VCT
bool "Support vct"
select CPU
select RAM
select SYSRESET
- imply ENV_IS_NOWHERE
config MACH_PIC32
bool "Support Microchip PIC32"
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
select ROM_EXCEPTION_VECTORS
- imply ENV_IS_IN_FLASH
config TARGET_XILFPGA
bool "Support Imagination Xilfpga"
bool "MIPS64 Release 2"
depends on SUPPORTS_CPU_MIPS64_R2
select 64BIT
- imply ENV_IS_IN_FLASH
help
Choose this option to build a kernel for release 2 through 5 of the
MIPS64 architecture.
linux_cmdline_init();
- bootargs = getenv("bootargs");
+ bootargs = env_get("bootargs");
if (!bootargs)
return;
sprintf(env_buf, "0x%X", (uint) (gd->bd->bi_flashsize));
linux_env_set("flash_size", env_buf);
- cp = getenv("ethaddr");
+ cp = env_get("ethaddr");
if (cp)
linux_env_set("ethaddr", cp);
- cp = getenv("eth1addr");
+ cp = env_get("eth1addr");
if (cp)
linux_env_set("eth1addr", cp);
void (*theKernel)(int zero, int arch, uint params);
#ifdef CONFIG_CMDLINE_TAG
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
#endif
/*
theKernel = (void (*)(int, int, uint))images->ep;
- s = getenv("machid");
+ s = env_get("machid");
if (s) {
machid = simple_strtoul(s, NULL, 16);
printf("Using machid 0x%x from environment\n", machid);
int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
void (*kernel)(int, int, int, char *) = (void *)images->ep;
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
ulong initrd_start = images->rd_start;
ulong initrd_end = images->rd_end;
char *of_flat_tree = NULL;
bool "MPC86xx"
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
- imply ENV_IS_IN_FLASH
+ imply CMD_REGINFO
config 8xx
bool "MPC8xx"
+ imply CMD_REGINFO
endchoice
config TARGET_SBC8349
bool "Support sbc8349"
- imply ENV_IS_IN_FLASH
config TARGET_VE8313
bool "Support ve8313"
config TARGET_MPC832XEMDS
bool "Support MPC832XEMDS"
select BOARD_EARLY_INIT_F
- imply ENV_IS_IN_FLASH
config TARGET_MPC8349EMDS
bool "Support MPC8349EMDS"
config TARGET_MPC8349ITX
bool "Support MPC8349ITX"
imply CMD_IRQ
- imply ENV_IS_IN_FLASH
config TARGET_MPC837XEMDS
bool "Support MPC837XEMDS"
bool "Support suvd3"
imply CMD_CRAMFS
imply FS_CRAMFS
- imply ENV_IS_IN_FLASH
config TARGET_TUXX1
bool "Support tuxx1"
imply CMD_CRAMFS
imply FS_CRAMFS
- imply ENV_IS_IN_FLASH
config TARGET_TQM834X
bool "Support TQM834x"
config TARGET_STRIDER
bool "Support strider"
select SYS_FSL_ERRATUM_ESDHC111
- imply ENV_IS_IN_FLASH
+ imply CMD_PCA953X
endchoice
config TARGET_SBC8548
bool "Support sbc8548"
select ARCH_MPC8548
- imply ENV_IS_IN_FLASH
config TARGET_SOCRATES
bool "Support socrates"
config TARGET_MPC8548CDS
bool "Support MPC8548CDS"
select ARCH_MPC8548
- imply ENV_IS_IN_FLASH
config TARGET_MPC8555CDS
bool "Support MPC8555CDS"
select FSL_IFC
imply CMD_EEPROM
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_B4860
bool
select FSL_IFC
imply CMD_EEPROM
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_BSC9131
bool
select FSL_IFC
imply CMD_EEPROM
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_BSC9132
bool
imply CMD_EEPROM
imply CMD_MTDPARTS
imply CMD_NAND
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_C29X
bool
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
imply CMD_NAND
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_MPC8536
bool
select FSL_ELBC
imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_MPC8540
bool
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
- imply ENV_IS_IN_FLASH
+ imply CMD_REGINFO
config ARCH_MPC8555
bool
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
imply CMD_NAND
- imply ENV_IS_IN_FLASH
config ARCH_P1010
bool
imply CMD_MTDPARTS
imply CMD_NAND
imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_P1011
bool
select FSL_ELBC
imply CMD_NAND
imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_P1021
bool
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_REGINFO
imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P1022
bool
imply CMD_EEPROM
imply CMD_NAND
imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_P1025
bool
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P2020
bool
select FSL_ELBC
imply CMD_EEPROM
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_P2041
bool
select FSL_ELBC
imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P4080
bool
select SYS_FSL_SEC_COMPAT_4
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P5020
bool
select SYS_PPC64
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P5040
bool
select SYS_PPC64
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_QEMU_E500
bool
select FSL_IFC
imply CMD_EEPROM
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T1024
bool
imply CMD_EEPROM
imply CMD_NAND
imply CMD_MTDPARTS
+ imply CMD_REGINFO
config ARCH_T1040
bool
imply CMD_MTDPARTS
imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_T1042
bool
imply CMD_MTDPARTS
imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_T2080
bool
select FSL_IFC
imply CMD_SATA
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T2081
bool
select SYS_PPC64
select FSL_IFC
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T4160
bool
select FSL_IFC
imply CMD_SATA
imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T4240
bool
select FSL_IFC
imply CMD_SATA
imply CMD_NAND
+ imply CMD_REGINFO
config BOOKE
bool
config E500MC
bool
+ imply CMD_PCI
help
Enble PowerPC E500MC core
* is not setup properly yet. Search for tdm entry in
* hwconfig.
*/
- ret = getenv_f("hwconfig", buffer, sizeof(buffer));
+ ret = env_get_f("hwconfig", buffer, sizeof(buffer));
if (ret > 0) {
tdm_hwconfig_enabled = hwconfig_f("tdm", buffer);
/* If tdm is defined in hwconfig, set law for tdm workaround */
cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
/* Extract hwconfig from environment */
- ret = getenv_f("hwconfig", buffer, sizeof(buffer));
+ ret = env_get_f("hwconfig", buffer, sizeof(buffer));
if (ret > 0) {
/*
* If "en_cpc" is not defined in hwconfig then by default all
char *buf = NULL;
int n, res;
- n = getenv_f("hwconfig", buffer, sizeof(buffer));
+ n = env_get_f("hwconfig", buffer, sizeof(buffer));
if (n > 0)
buf = buffer;
#endif
#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
- spin = getenv("spin_table_compat");
+ spin = env_get("spin_table_compat");
if (spin && (*spin == 'n'))
spin_table_compat = 0;
else
#ifdef CONFIG_SYS_SRIO
srio_init();
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
if (s) {
if (!strcmp(s, "SRIO1")) {
srio_boot_master(1);
* Extract hwconfig from environment.
* Search for tdm entry in hwconfig.
*/
- ret = getenv_f("hwconfig", buffer, sizeof(buffer));
+ ret = env_get_f("hwconfig", buffer, sizeof(buffer));
if (ret > 0)
tdm_hwconfig_enabled = hwconfig_f("tdm", buffer);
return;
/* Get MAC address for the l2switch from "l2switchaddr"*/
- if (!eth_getenv_enetaddr("l2switchaddr", l2swaddr)) {
+ if (!eth_env_get_enetaddr("l2switchaddr", l2swaddr)) {
printf("Warning: MAC address for l2switch not found\n");
memset(l2swaddr, 0, sizeof(l2swaddr));
}
* Extract hwconfig from environment since we have not properly setup
* the environment but need it for ddr config params
*/
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
#endif
if (serdes_prtcl_map & (1 << NONE))
int hold_cores_in_reset(int verbose)
{
/* Default to no, overridden by 'y', 'yes', 'Y', 'Yes', or '1' */
- if (getenv_yesno("mp_holdoff") == 1) {
+ if (env_get_yesno("mp_holdoff") == 1) {
if (verbose) {
puts("Secondary cores are being held in reset.\n");
puts("See 'mp_holdoff' environment variable\n");
select FSL_LAW
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_DDR2
- imply ENV_IS_IN_FLASH
config FSL_LAW
bool
debug (" Booting using OF flat tree...\n");
WATCHDOG_RESET ();
(*kernel) ((bd_t *)of_flat_tree, 0, 0, EPAPR_MAGIC,
- getenv_bootm_mapsize(), 0, 0);
+ env_get_bootm_mapsize(), 0, 0);
/* does not return */
} else
#endif
phys_size_t bootm_size;
ulong size, sp, bootmap_base;
- bootmap_base = getenv_bootm_low();
- bootm_size = getenv_bootm_size();
+ bootmap_base = env_get_bootm_low();
+ bootm_size = env_get_bootm_size();
#ifdef DEBUG
if (((u64)bootmap_base + bootm_size) >
{
char *s;
- if ((s = getenv ("clocks_in_mhz")) != NULL) {
+ s = env_get("clocks_in_mhz");
+ if (s) {
/* convert all clock information to MHz */
kbd->bi_intfreq /= 1000000L;
kbd->bi_busfreq /= 1000000L;
((void (*)(void *, ulong, ulong, ulong,
ulong, ulong, ulong))images->ep)(images->ft_addr,
- 0, 0, EPAPR_MAGIC, getenv_bootm_mapsize(), 0, 0);
+ 0, 0, EPAPR_MAGIC, env_get_bootm_mapsize(), 0, 0);
}
#endif
config CPU_SH2
bool
- imply ENV_IS_IN_FLASH
config CPU_SH2A
bool
select CPU_SH2
- imply ENV_IS_IN_FLASH
config CPU_SH3
bool
- imply ENV_IS_IN_FLASH
config CPU_SH4
bool
default "sh3" if CPU_SH3
default "sh4" if CPU_SH4
+source "arch/sh/lib/Kconfig"
+
source "board/alphaproject/ap_sh4a_4a/Kconfig"
source "board/espt/Kconfig"
source "board/mpr2/Kconfig"
KEEP(CONFIG_BOARDDIR/lowlevel_init.o (.text .spiboot1.text))
KEEP(*(.spiboot2.text))
. = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
+ env/embedded.o (.ppcenv)
. = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
+ env/embedded.o (.ppcenvr)
. = ALIGN(8192);
*(.text)
. = ALIGN(4);
--- /dev/null
+config CMD_SH_ZIMAGEBOOT
+ bool "zimageboot - Boot a zImage on SH"
+ default y
+ help
+ This is special SH-specific command to boot a zImage (compressed
+ Linux image) on SH-architecture boards.
char *cmdline = (char *)param + COMMAND_LINE;
/* PAGE_SIZE */
unsigned long size = images->ep - (unsigned long)param;
- char *bootargs = getenv("bootargs");
+ char *bootargs = env_get("bootargs");
/*
* allow the PREP bootm subcommand, it is required for bootm to work
/* Linux kernel command line */
cmdline = (char *)param + COMMAND_LINE;
- bootargs = getenv("bootargs");
+ bootargs = env_get("bootargs");
/* Clear zero page */
/* cppcheck-suppress nullPointer */
select ARCH_MISC_INIT if !EFI
imply HAVE_INTEL_ME if !EFI
imply ENABLE_MRC_CACHE
- imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
select ARCH_EARLY_INIT_R
imply HAVE_INTEL_ME
imply ENABLE_MRC_CACHE
- imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_BROADWELL_GPIO
config SYS_COREBOOT
bool
default y
- imply ENV_IS_NOWHERE
imply AHCI_PCI
imply E1000
imply ICH_SPI
select CACHE_MRC_BIN if HAVE_MRC
imply HAVE_INTEL_ME
imply ENABLE_MRC_CACHE
- imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
config QEMU
bool
select ARCH_EARLY_INIT_R
- imply ENV_IS_NOWHERE
imply AHCI_PCI
imply E1000
imply SYS_NS16550
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT
imply ENABLE_MRC_CACHE
- imply ENV_IS_IN_SPI_FLASH
imply ETH_DESIGNWARE
imply ICH_SPI
imply INTEL_ICH6_GPIO
select HAVE_FSP
select HAVE_CMC
select ARCH_EARLY_INIT_R
- imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
command_line[0] = '\0';
- env_command_line = getenv("bootargs");
+ env_command_line = env_get("bootargs");
/* set console= argument if we use a serial console */
if (!strstr(env_command_line, "console=")) {
- if (!strcmp(getenv("stdout"), "serial")) {
+ if (!strcmp(env_get("stdout"), "serial")) {
/* We seem to use serial console */
sprintf(command_line, "console=ttyS0,%s ",
- getenv("baudrate"));
+ env_get("baudrate"));
}
}
/* argv[1] holds the address of the bzImage */
s = argv[1];
} else {
- s = getenv("fileaddr");
+ s = env_get("fileaddr");
}
if (s)
{
struct bp_tag *params, *params_start;
ulong initrd_start, initrd_end;
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
if (!(flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)))
return 0;
printf("\t<not found>\n");
} else {
printf("\t%s\n", smac[3]);
- setenv("SERIAL", smac[3]);
+ env_set("SERIAL", smac[3]);
}
}
if (smac[2][0] == 0xFF) {
printf("\t<not found>\n");
} else {
- char *ret = getenv("ethaddr");
+ char *ret = env_get("ethaddr");
if (strcmp(ret, __stringify(CONFIG_ETHADDR)) == 0) {
- setenv("ethaddr", smac[2]);
+ env_set("ethaddr", smac[2]);
printf("\t%s (factory)\n", smac[2]);
} else {
printf("\t%s\n", ret);
}
if (strcmp(smac[1], "00:00:00:00:00:00") == 0) {
- setenv("eth1addr", smac[2]);
- setenv("eth2addr", smac[2]);
+ env_set("eth1addr", smac[2]);
+ env_set("eth2addr", smac[2]);
return 0;
}
if (smac[1][0] == 0xFF) {
printf("\t<not found>\n");
} else {
- char *ret = getenv("eth1addr");
+ char *ret = env_get("eth1addr");
if (strcmp(ret, __stringify(CONFIG_ETH1ADDR)) == 0) {
- setenv("eth1addr", smac[1]);
+ env_set("eth1addr", smac[1]);
printf("\t%s (factory)\n", smac[1]);
} else {
printf("\t%s\n", ret);
}
if (strcmp(smac[0], "00:00:00:00:00:00") == 0) {
- setenv("eth2addr", smac[1]);
+ env_set("eth2addr", smac[1]);
return 0;
}
if (smac[0][0] == 0xFF) {
printf("\t<not found>\n");
} else {
- char *ret = getenv("eth2addr");
+ char *ret = env_get("eth2addr");
if (strcmp(ret, __stringify(CONFIG_ETH2ADDR)) == 0) {
- setenv("eth2addr", smac[0]);
+ env_set("eth2addr", smac[0]);
printf("\t%s (factory)\n", smac[0]);
} else {
printf("\t%s\n", ret);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
for (i = 0; i < GPIO_MAX_NUM; i++) {
sprintf(envname, "GPIO%d", i);
- val = getenv(envname);
+ val = env_get(envname);
if (val) {
char direction = toupper(val[0]);
char level = toupper(val[1]);
}
}
- val = getenv("PCIE_OFF");
+ val = env_get("PCIE_OFF");
if (val) {
gpio_direction_input(GPIO_PCIE1_EN);
gpio_direction_input(GPIO_PCIE2_EN);
gpio_direction_output(GPIO_PCIE2_EN, 1);
}
- val = getenv("SDHC_CDWP_OFF");
+ val = env_get("SDHC_CDWP_OFF");
if (!val) {
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
else
printf("NCT72(0x%x): ready\n", id2);
- kval = getenv("kernelargs");
+ kval = env_get("kernelargs");
mmc = find_mmc_device(0);
if (mmc)
strcat(newkernelargs, mmckargs);
strcat(newkernelargs, " ");
strcat(newkernelargs, &tmp[n]);
- setenv("kernelargs", newkernelargs);
+ env_set("kernelargs", newkernelargs);
} else {
- setenv("kernelargs", mmckargs);
+ env_set("kernelargs", mmckargs);
}
}
get_arc_info();
if (kval) {
- sval = getenv("SERIAL");
+ sval = env_get("SERIAL");
if (sval) {
strcpy(newkernelargs, "SN=");
strcat(newkernelargs, sval);
strcat(newkernelargs, " ");
strcat(newkernelargs, kval);
- setenv("kernelargs", newkernelargs);
+ env_set("kernelargs", newkernelargs);
}
} else {
printf("Error reading kernelargs env variable!\n");
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
u32 rev = 0;
- s = getenv("maxcpuclk");
+ s = env_get("maxcpuclk");
if (s)
maxcpuclk = simple_strtoul(s, NULL, 10);
lcd_position_cursor(1, 8);
lcd_puts(
"switching to network-console ... ");
- setenv("bootcmd", "run netconsole");
+ env_set("bootcmd", "run netconsole");
}
return 0;
}
lcd_position_cursor(1, 8);
lcd_puts(
"switching to network-console ... ");
- setenv("bootcmd", "run netconsole");
+ env_set("bootcmd", "run netconsole");
cnt = 4;
break;
} else if (!gpio_get_value(ESC_KEY) &&
lcd_position_cursor(1, 8);
lcd_puts(
"starting u-boot script from USB ... ");
- setenv("bootcmd", "run usbscript");
+ env_set("bootcmd", "run usbscript");
cnt = 4;
break;
} else if ((!gpio_get_value(ESC_KEY) &&
lcd_position_cursor(1, 8);
lcd_puts(
"starting script from network ... ");
- setenv("bootcmd", "run netscript");
+ env_set("bootcmd", "run netscript");
cnt = 4;
break;
} else if (!gpio_get_value(ESC_KEY)) {
lcd_position_cursor(1, 8);
lcd_puts(
"starting vxworks from network ... ");
- setenv("bootcmd", "run netboot");
+ env_set("bootcmd", "run netboot");
cnt = 4;
} else if (scratchreg == 0xCD) {
lcd_position_cursor(1, 8);
lcd_puts(
"starting script from network ... ");
- setenv("bootcmd", "run netscript");
+ env_set("bootcmd", "run netscript");
cnt = 4;
} else if (scratchreg == 0xCE) {
lcd_position_cursor(1, 8);
lcd_puts(
"starting AR from eMMC ... ");
- setenv("bootcmd", "run mmcboot");
+ env_set("bootcmd", "run mmcboot");
cnt = 4;
}
switch (cnt) {
case 0:
lcd_puts("entering BOOT-mode. ");
- setenv("bootcmd", "run defaultAR");
+ env_set("bootcmd", "run defaultAR");
buf = 0x0000;
break;
case 1:
snprintf(othbootargs, sizeof(othbootargs),
"u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x",
(unsigned int) gd->fb_base-0x20,
- (u32)getenv_ulong("vx_memtop", 16, gd->fb_base-0x20),
- (u32)getenv_ulong("vx_romfsbase", 16, 0),
- (u32)getenv_ulong("vx_romfssize", 16, 0));
- setenv("othbootargs", othbootargs);
+ (u32)env_get_ulong("vx_memtop", 16, gd->fb_base-0x20),
+ (u32)env_get_ulong("vx_romfsbase", 16, 0),
+ (u32)env_get_ulong("vx_romfssize", 16, 0));
+ env_set("othbootargs", othbootargs);
/*
* reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
* expect that vectors are there, original u-boot moves them to _start
unsigned int bright = FDTPROP(PATHINF, "brightdef");
unsigned int pwmfrq = FDTPROP(PATHINF, "brightfdim");
#else
- unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL);
- unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50);
- unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL);
+ unsigned int driver = env_get_ulong("ds1_bright_drv", 16, 0UL);
+ unsigned int bright = env_get_ulong("ds1_bright_def", 10, 50);
+ unsigned int pwmfrq = env_get_ulong("ds1_pwmfreq", 10, ~0UL);
#endif
unsigned int tmp;
struct gptimer *timerhw;
puts("no 'factory-settings / rotation' in dtb!\n");
}
snprintf(buf, sizeof(buf), "fbcon=rotate:%d", panel_info.vl_rot);
- setenv("optargs_rot", buf);
+ env_set("optargs_rot", buf);
#else
- pnltmp.hactive = getenv_ulong("ds1_hactive", 10, ~0UL);
- pnltmp.vactive = getenv_ulong("ds1_vactive", 10, ~0UL);
- pnltmp.bpp = getenv_ulong("ds1_bpp", 10, ~0UL);
- pnltmp.hfp = getenv_ulong("ds1_hfp", 10, ~0UL);
- pnltmp.hbp = getenv_ulong("ds1_hbp", 10, ~0UL);
- pnltmp.hsw = getenv_ulong("ds1_hsw", 10, ~0UL);
- pnltmp.vfp = getenv_ulong("ds1_vfp", 10, ~0UL);
- pnltmp.vbp = getenv_ulong("ds1_vbp", 10, ~0UL);
- pnltmp.vsw = getenv_ulong("ds1_vsw", 10, ~0UL);
- pnltmp.pxl_clk_div = getenv_ulong("ds1_pxlclkdiv", 10, ~0UL);
- pnltmp.pol = getenv_ulong("ds1_pol", 16, ~0UL);
- pnltmp.pup_delay = getenv_ulong("ds1_pupdelay", 10, ~0UL);
- pnltmp.pon_delay = getenv_ulong("ds1_tondelay", 10, ~0UL);
- panel_info.vl_rot = getenv_ulong("ds1_rotation", 10, 0);
+ pnltmp.hactive = env_get_ulong("ds1_hactive", 10, ~0UL);
+ pnltmp.vactive = env_get_ulong("ds1_vactive", 10, ~0UL);
+ pnltmp.bpp = env_get_ulong("ds1_bpp", 10, ~0UL);
+ pnltmp.hfp = env_get_ulong("ds1_hfp", 10, ~0UL);
+ pnltmp.hbp = env_get_ulong("ds1_hbp", 10, ~0UL);
+ pnltmp.hsw = env_get_ulong("ds1_hsw", 10, ~0UL);
+ pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
+ pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
+ pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
+ pnltmp.pxl_clk_div = env_get_ulong("ds1_pxlclkdiv", 10, ~0UL);
+ pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
+ pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
+ pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
+ panel_info.vl_rot = env_get_ulong("ds1_rotation", 10, 0);
#endif
if (
~0UL == (pnltmp.hactive) ||
{
int rc;
loff_t dtbsize;
- u32 dtbaddr = getenv_ulong("dtbaddr", 16, 0UL);
+ u32 dtbaddr = env_get_ulong("dtbaddr", 16, 0UL);
if (dtbaddr == 0) {
printf("%s: don't have a valid <dtbaddr> in env!\n", __func__);
(size_t *)&dtbsize,
NULL, 0x20000, (u_char *)dtbaddr);
#else
- char *dtbname = getenv("dtb");
- char *dtbdev = getenv("dtbdev");
- char *dtbpart = getenv("dtbpart");
+ char *dtbname = env_get("dtb");
+ char *dtbdev = env_get("dtbdev");
+ char *dtbpart = env_get("dtbpart");
if (!dtbdev || !dtbpart || !dtbname) {
printf("%s: <dtbdev>/<dtbpart>/<dtb> missing.\n", __func__);
return -1;
* if no simplefb is requested through environment, we don't set up
* one, instead we turn off backlight.
*/
- if (getenv_ulong("simplefb", 10, 0) == 0) {
+ if (env_get_ulong("simplefb", 10, 0) == 0) {
lcdbacklight(0);
return 0;
}
char *name, char *altname,
char *suffix)
{
- char *envval = getenv(name);
+ char *envval = env_get(name);
if (0 != envval) {
lcd_printf("%s %s %s", prefix, envval, suffix);
} else if (0 != altname) {
- envval = getenv(altname);
+ envval = env_get(altname);
if (0 != envval)
lcd_printf("%s %s %s", prefix, envval, suffix);
} else {
}
pin = FDTPROP(PATHINF, "pwrpin");
#else
- pin = getenv_ulong("ds1_pwr", 16, ~0UL);
+ pin = env_get_ulong("ds1_pwr", 16, ~0UL);
#endif
if (pin == ~0UL) {
puts("no pwrpin in dtb/env, cannot powerup display!\n");
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT)
printf("<ethaddr> not set. trying DTB ... ");
mac = dtbmacaddr(0);
if (mac) {
printf("using: %pM on ", mac);
- eth_setenv_enetaddr("ethaddr", (const u8 *)mac);
+ eth_env_set_enetaddr("ethaddr", (const u8 *)mac);
}
}
writel(MII_MODE_ENABLE, &cdev->miisel);
int enable;
enable = 1;
- s = getenv("watchdog");
+ s = env_get("watchdog");
if (s != NULL)
if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0))
enable = 0;
unsigned long splash;
#endif
printf("Init Video as ");
- s = getenv("displaywidth");
+ s = env_get("displaywidth");
if (s != NULL)
display_width = simple_strtoul(s, NULL, 10);
else
display_width = 256;
- s = getenv("displayheight");
+ s = env_get("displayheight");
if (s != NULL)
display_height = simple_strtoul(s, NULL, 10);
else
vcxk_init(display_width, display_height);
#ifdef CONFIG_SPLASH_SCREEN
- s = getenv("splashimage");
+ s = env_get("splashimage");
if (s != NULL) {
splash = simple_strtoul(s, NULL, 16);
vcxk_acknowledge_wait();
puts("EEPROM regdomain read failed.\n");
printf("Regdomain set to %s\n", rd);
- return setenv("regdomain", rd);
+ return env_set("regdomain", rd);
}
#endif
mac[5] = mac1[3];
if (is_valid_ethaddr(mac))
- eth_setenv_enetaddr("ethaddr", mac);
+ eth_env_set_enetaddr("ethaddr", mac);
increment_mac(mac);
if (is_valid_ethaddr(mac))
- eth_setenv_enetaddr("eth1addr", mac);
+ eth_env_set_enetaddr("eth1addr", mac);
increment_mac(mac);
if (is_valid_ethaddr(mac))
- eth_setenv_enetaddr("eth2addr", mac);
+ eth_env_set_enetaddr("eth2addr", mac);
out:
#endif
{ "mxc_nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
- if (getenv("fdt_noauto")) {
+ if (env_get("fdt_noauto")) {
puts(" Skiping ft_board_setup (fdt_noauto defined)\n");
return 0;
}
{
init_fan();
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
uchar mac[6];
if (lacie_read_mac_address(mac) == 0)
- eth_setenv_enetaddr("ethaddr", mac);
+ eth_env_set_enetaddr("ethaddr", mac);
}
#endif
init_leds();
int misc_init_r(void)
{
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
uchar mac[6];
if (lacie_read_mac_address(mac) == 0)
- eth_setenv_enetaddr("ethaddr", mac);
+ eth_env_set_enetaddr("ethaddr", mac);
}
#endif
return 0;
ethaddr[0], ethaddr[1], ethaddr[2],
ethaddr[3], ethaddr[4], ethaddr[5]);
printf("parsed %s = %s\n", var, val);
- setenv(var, val);
+ env_set(var, val);
}
if (!strncmp(buf + 32, SYNO_SN_TAG, strlen(SYNO_SN_TAG))) {
char *snp, *csump;
goto out_unmap;
}
printf("parsed SN = %s\n", snp);
- setenv("SN", snp);
+ env_set("SN", snp);
} else { /* old style format */
unsigned char csum = 0;
}
bufp[n] = '\0';
printf("parsed SN = %s\n", buf + 32);
- setenv("SN", buf + 32);
+ env_set("SN", buf + 32);
}
out_unmap:
unmap_physmem(buf, len);
}
if (reboot_mode[0] > 0 && isascii(reboot_mode[0])) {
- if (!getenv("reboot-mode"))
- setenv("reboot-mode", (char *)reboot_mode);
+ if (!env_get("reboot-mode"))
+ env_set("reboot-mode", (char *)reboot_mode);
}
omap_reboot_mode_clear();
mdelay(10);
setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
mac_addr, EFUSE_MAC_SIZE);
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
if (len == EFUSE_SN_SIZE)
- setenv("serial#", serial);
+ env_set("serial#", serial);
}
return 0;
int board_late_init(void)
{
- setenv("bootmode", boot_mode_sf ? "sf" : "emmc");
+ env_set("bootmode", boot_mode_sf ? "sf" : "emmc");
return 0;
}
{
char *my_bootdelay;
char bootmode = 0;
- char const *panel = getenv("panel");
+ char const *panel = env_get("panel");
/*
* Check the boot-source. If booting from NOR Flash,
bootmode |= (gpio_get_value(IMX_GPIO_NR(7, 1)) ? 1 : 0) << 2;
if (bootmode == 7) {
- my_bootdelay = getenv("nor_bootdelay");
+ my_bootdelay = env_get("nor_bootdelay");
if (my_bootdelay != NULL)
- setenv("bootdelay", my_bootdelay);
+ env_set("bootdelay", my_bootdelay);
else
- setenv("bootdelay", "-2");
+ env_set("bootdelay", "-2");
}
/* if we have the lg panel, we can initialze it now */
if TARGET_APF27
+config SPL_LDSCRIPT
+ default "arch/$(ARCH)/cpu/u-boot-spl.lds"
+
config SYS_BOARD
default "apf27"
int misc_init_r (void)
{
- setenv("verify", "n");
+ env_set("verify", "n");
return (0);
}
const char *ETHADDR_NAME = "ethaddr";
struct udevice *bus, *dev;
- if (getenv(ETHADDR_NAME))
+ if (env_get(ETHADDR_NAME))
return 0;
if (uclass_get_device_by_seq(UCLASS_I2C, 1, &bus)) {
return -1;
}
- return eth_setenv_enetaddr(ETHADDR_NAME, ethaddr);
+ return eth_env_set_enetaddr(ETHADDR_NAME, ethaddr);
}
#else
static int set_ethaddr_from_eeprom(void)
*p = tolower(*p);
strcat(name, "ek.dtb");
- setenv("dtb_name", name);
+ env_set("dtb_name", name);
#endif
return 0;
}
/* depending on the phy address we can detect our board version */
if (phydev->addr == 0)
- setenv("boardver", "");
+ env_set("boardver", "");
else
- setenv("boardver", "mr");
+ env_set("boardver", "mr");
printf("using phy at %d\n", phydev->addr);
ret = fec_probe(bis, -1, base, bus, phydev);
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "BAV335xB");
- setenv("board_rev", "B"); /* Fix me, but why bother.. */
+ env_set("board_name", "BAV335xB");
+ env_set("board_rev", "B"); /* Fix me, but why bother.. */
#endif
return 0;
}
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
- if (getenv("revision#") != NULL)
- return simple_strtoul(getenv("revision#"), NULL, 10);
+ if (env_get("revision#") != NULL)
+ return simple_strtoul(env_get("revision#"), NULL, 10);
return 0;
}
#endif
at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
/* Select the second timing index for board rev 2 */
- rev_str = getenv("board_rev");
+ rev_str = env_get("board_rev");
if (rev_str && !strncmp(rev_str, "2", 1)) {
struct udevice *dev;
* Set MAC address so we do not need to init Ethernet before Linux
* boot
*/
- env_str = getenv("ethaddr");
+ env_str = env_get("ethaddr");
if (env_str) {
struct at91_emac *emac = (struct at91_emac *)ATMEL_BASE_EMAC;
/* Parse MAC address */
&emac->sa2l);
writel((env_enetaddr[4] | env_enetaddr[5] << 8), &emac->sa2h);
- printf("MAC: %s\n", getenv("ethaddr"));
+ printf("MAC: %s\n", env_get("ethaddr"));
} else {
/* Not set in environment */
printf("MAC: not set\n");
if (value == 0) {
printf("front button activated !\n");
- setenv("harakiri", "1");
+ env_set("harakiri", "1");
}
}
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (shc_eeprom_valid)
if (is_valid_ethaddr(header.mac_addr))
- eth_setenv_enetaddr("ethaddr", header.mac_addr);
+ eth_env_set_enetaddr("ethaddr", header.mac_addr);
#endif
return 0;
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
writel(MII_MODE_ENABLE, &cdev->miisel);
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+ eth_env_set_enetaddr("usbnet_devaddr", mac_addr);
rv = usb_eth_initialize(bis);
if (rv < 0)
int board_cfb_skip(void)
{
- return NULL != getenv("novideo");
+ return NULL != env_get("novideo");
}
static void setup_display(void)
{
char envvalue[ARRAY_SIZE(buttons)+1];
int numpressed = read_keys(envvalue);
- setenv("keybd", envvalue);
+ env_set("keybd", envvalue);
return numpressed == 0;
}
char keypress[ARRAY_SIZE(buttons)+1];
numpressed = read_keys(keypress);
if (numpressed) {
- char *kbd_magic_keys = getenv("magic_keys");
+ char *kbd_magic_keys = env_get("magic_keys");
char *suffix;
/*
* loop over all magic keys
char *keys;
char magic[sizeof(kbd_magic_prefix) + 1];
sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
- keys = getenv(magic);
+ keys = env_get(magic);
if (keys) {
if (!strcmp(keys, keypress))
break;
char cmd_name[sizeof(kbd_command_prefix) + 1];
char *cmd;
sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
- cmd = getenv(cmd_name);
+ cmd = env_get(cmd_name);
if (cmd) {
- setenv("preboot", cmd);
+ env_set("preboot", cmd);
return;
}
}
#ifdef CONFIG_CMD_BMODE
add_board_boot_modes(board_boot_modes);
#endif
- setenv_hex("reset_cause", get_imx_reset_cause());
+ env_set_hex("reset_cause", get_imx_reset_cause());
return 0;
}
int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
{
debug("%s\n", __func__);
- if (!getenv("serial#"))
+ if (!env_get("serial#"))
g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
return 0;
}
int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
{
debug("%s\n", __func__);
- if (!getenv("serial#"))
+ if (!env_get("serial#"))
g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
return 0;
}
{
uchar enetaddr[6];
- if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
/* signal unset/invalid ethaddr to user */
set_led(LED_INFO_BLINKING);
}
static void rescue_mode(void)
{
printf("Entering rescue mode..\n");
- setenv("bootsource", "rescue");
+ env_set("bootsource", "rescue");
}
static void check_push_button(void)
* Default MAC address comes from CONFIG_ETHADDR + DIP switches 1-6.
*/
- char *s = getenv("ethaddr");
+ char *s = env_get("ethaddr");
if (s == 0) {
unsigned int x;
char s[] = __stringify(CONFIG_ETHBASE);
x = (*(volatile u32 *)CONFIG_SYS_FPGAREG_DIPSW)
& FPGAREG_MAC_MASK;
sprintf(&s[15], "%02x", x);
- setenv("ethaddr", s);
+ env_set("ethaddr", s);
}
#endif /* CONFIG_CMD_NET */
int board_late_init(void)
{
add_board_boot_modes(board_boot_modes);
- setenv("board_name", "xpress");
+ env_set("board_name", "xpress");
return 0;
}
int ret;
uint8_t enetaddr[6];
- ret = eth_getenv_enetaddr(env_name, enetaddr);
+ ret = eth_env_get_enetaddr(env_name, enetaddr);
if (ret)
return 0;
if (!is_valid_ethaddr(enetaddr))
return -1;
- ret = eth_setenv_enetaddr(env_name, enetaddr);
+ ret = eth_env_set_enetaddr(env_name, enetaddr);
if (ret)
printf("cl-som-am57x: Failed to set Eth port %d MAC address\n",
port_num);
gpio_set_value(CL_SOM_AM57X_GPIO_PHY1_RST, 1);
mdelay(20);
- cpsw_phy_envval = getenv("cpsw_phy");
+ cpsw_phy_envval = env_get("cpsw_phy");
if (cpsw_phy_envval != NULL)
cpsw_act_phy = simple_strtoul(cpsw_phy_envval, NULL, 0);
*/
#include <common.h>
+#include <ahci.h>
#include <dm.h>
+#include <dwc_ahsata.h>
#include <fsl_esdhc.h>
#include <miiphy.h>
#include <mtd_node.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <dm/platform_data/serial_mxc.h>
+#include <dm/device-internal.h>
#include <jffs2/load_kernel.h>
#include "common.h"
#include "../common/eeprom.h"
{
int ret;
struct display_info_t *preset;
- char const *panel = getenv("displaytype");
+ char const *panel = env_get("displaytype");
if (!panel) /* Also accept panel for backward compatibility */
- panel = getenv("panel");
+ panel = env_get("panel");
if (!panel)
return -ENOENT;
}
#define CM_FX6_SATA_INIT_RETRIES 10
+
+# if !CONFIG_IS_ENABLED(AHCI)
int sata_initialize(void)
{
int err, i;
return 0;
}
+# endif
#else
static int cm_fx6_setup_issd(void) { return 0; }
#endif
unsigned char enetaddr[6];
int rc;
- rc = eth_getenv_enetaddr(env_var, enetaddr);
+ rc = eth_env_get_enetaddr(env_var, enetaddr);
if (rc)
return 0;
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr(env_var, enetaddr);
+ return eth_env_set_enetaddr(env_var, enetaddr);
}
#define SB_FX6_I2C_EEPROM_BUS 0
fdt_shrink_to_minimum(blob, 0); /* Make room for new properties */
/* MAC addr */
- if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ if (eth_env_get_enetaddr("ethaddr", enetaddr)) {
fdt_find_and_setprop(blob,
"/soc/aips-bus@02100000/ethernet@02188000",
"local-mac-address", enetaddr, 6, 1);
}
- if (eth_getenv_enetaddr("eth1addr", enetaddr)) {
+ if (eth_env_get_enetaddr("eth1addr", enetaddr)) {
fdt_find_and_setprop(blob, "/eth@pcie", "local-mac-address",
enetaddr, 6, 1);
}
cm_fx6_setup_display();
+ /* This should be done in the MMC driver when MX6 has a clock driver */
+#ifdef CONFIG_FSL_ESDHC
+ if (IS_ENABLED(CONFIG_BLK)) {
+ int i;
+
+ cm_fx6_set_usdhc_iomux();
+ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++)
+ enable_usdhc_clk(1, i);
+ }
+#endif
+
return 0;
}
.name = "serial_mxc",
.platdata = &cm_fx6_mxc_serial_plat,
};
+
+#if CONFIG_IS_ENABLED(AHCI)
+static int sata_imx_probe(struct udevice *dev)
+{
+ int i, err;
+
+ /* Make sure this gpio has logical 0 value */
+ gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
+ udelay(100);
+ cm_fx6_sata_power(1);
+
+ for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) {
+ err = setup_sata();
+ if (err) {
+ printf("SATA setup failed: %d\n", err);
+ return err;
+ }
+
+ udelay(100);
+
+ err = dwc_ahsata_probe(dev);
+ if (!err)
+ break;
+
+ /* There is no device on the SATA port */
+ if (sata_dm_port_status(0, 0) == 0)
+ break;
+
+ /* There's a device, but link not established. Retry */
+ device_remove(dev, DM_REMOVE_NORMAL);
+ }
+
+ return 0;
+}
+
+static int sata_imx_remove(struct udevice *dev)
+{
+ cm_fx6_sata_power(0);
+ mdelay(250);
+
+ return 0;
+}
+
+struct ahci_ops sata_imx_ops = {
+ .port_status = dwc_ahsata_port_status,
+ .reset = dwc_ahsata_bus_reset,
+ .scan = dwc_ahsata_scan,
+};
+
+static const struct udevice_id sata_imx_ids[] = {
+ { .compatible = "fsl,imx6q-ahci" },
+ { }
+};
+
+U_BOOT_DRIVER(sata_imx) = {
+ .name = "dwc_ahci",
+ .id = UCLASS_AHCI,
+ .of_match = sata_imx_ids,
+ .ops = &sata_imx_ops,
+ .probe = sata_imx_probe,
+ .remove = sata_imx_remove, /* reset bus to stop it */
+};
+#endif /* AHCI */
uchar enetaddr[6];
int rv;
- rv = eth_getenv_enetaddr("ethaddr", enetaddr);
+ rv = eth_env_get_enetaddr("ethaddr", enetaddr);
if (rv)
return 0;
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("ethaddr", enetaddr);
+ return eth_env_set_enetaddr("ethaddr", enetaddr);
}
#define AR8051_PHY_DEBUG_ADDR_REG 0x1d
unsigned char enetaddr[6];
int rc;
- rc = eth_getenv_enetaddr("ethaddr", enetaddr);
+ rc = eth_env_get_enetaddr("ethaddr", enetaddr);
if (rc)
return 0;
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("ethaddr", enetaddr);
+ return eth_env_set_enetaddr("ethaddr", enetaddr);
}
/*
unsigned char enetaddr[6];
int ret;
- ret = eth_getenv_enetaddr("ethaddr", enetaddr);
+ ret = eth_env_get_enetaddr("ethaddr", enetaddr);
if (ret)
return 0;
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("ethaddr", enetaddr);
+ return eth_env_set_enetaddr("ethaddr", enetaddr);
}
#define SB_T35_ETH_RST_GPIO 164
uint8_t enetaddr[6];
/* MAC addr */
- if (eth_getenv_enetaddr("usbethaddr", enetaddr)) {
+ if (eth_env_get_enetaddr("usbethaddr", enetaddr)) {
fdt_find_and_setprop(blob, "/smsc95xx@0", "mac-address",
enetaddr, 6, 1);
}
uint8_t enetaddr[6];
int ret;
- ret = eth_getenv_enetaddr("usbethaddr", enetaddr);
+ ret = eth_env_get_enetaddr("usbethaddr", enetaddr);
if (ret)
return 0;
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("usbethaddr", enetaddr);
+ return eth_env_set_enetaddr("usbethaddr", enetaddr);
}
int board_eth_init(bd_t *bis)
{
struct prcm *prcm = (struct prcm *)PRCM_BASE;
char *custom_lcd;
- char *displaytype = getenv("displaytype");
+ char *displaytype = env_get("displaytype");
if (displaytype == NULL)
return;
lcd_def = env_parse_displaytype(displaytype);
/* If we did not recognize the preset, check if it's an env variable */
if (lcd_def == NONE) {
- custom_lcd = getenv(displaytype);
+ custom_lcd = env_get(displaytype);
if (custom_lcd == NULL || parse_customlcd(custom_lcd) < 0)
return;
}
return 0;
/* set level of MIPI if specified */
- lv_mipi = getenv("lv_mipi");
+ lv_mipi = env_get("lv_mipi");
if (lv_mipi)
return 0;
{
int i;
int ret;
- char const *panel = getenv("panel");
+ char const *panel = env_get("panel");
if (!panel) {
for (i = 0; i < ARRAY_SIZE(displays); i++) {
struct display_info_t const *dev = displays + i;
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(&iop->iop_pcdat) & 0x0004) == 0)
- setenv("bootdelay", "60");
+ env_set("bootdelay", "60");
return 0;
}
uchar env_enetaddr[6];
int enetaddr_found;
- enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr);
+ enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
int spi_mac_read;
if (!enetaddr_found) {
if (!spi_mac_read) {
if (is_valid_ethaddr(buff)) {
- if (eth_setenv_enetaddr("ethaddr", buff)) {
+ if (eth_env_set_enetaddr("ethaddr", buff)) {
printf("Warning: Failed to "
"set MAC address from SPI flash\n");
}
u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
u32 rev = 0;
- s = getenv("maxcpuclk");
+ s = env_get("maxcpuclk");
if (s)
maxcpuclk = simple_strtoul(s, NULL, 10);
if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
return;
- if (!strcmp(getenv("dspwake"), "no"))
+ if (!strcmp(env_get("dspwake"), "no"))
return;
*resetvect++ = 0x1E000; /* DSP Idle */
uint8_t tmp[20], addr[10];
- if (getenv("ethaddr") == NULL) {
+ if (env_get("ethaddr") == NULL) {
/* Read Ethernet MAC address from EEPROM */
if (dvevm_read_mac_address(addr)) {
/* Set Ethernet MAC address from EEPROM */
addr[0], addr[1], addr[2], addr[3], addr[4],
addr[5]);
- setenv("ethaddr", (char *)tmp);
+ env_set("ethaddr", (char *)tmp);
} else {
printf("Invalid MAC address read.\n");
}
add_board_boot_modes(board_boot_modes);
#endif
- setenv("board_name", BOARD_NAME);
+ env_set("board_name", BOARD_NAME);
return 0;
}
char mmcblk[32];
u32 dev_no = mmc_get_env_dev();
- setenv_ulong("mmcdev", dev_no);
+ env_set_ulong("mmcdev", dev_no);
/* Set mmcblk env */
sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
- setenv("mmcroot", mmcblk);
+ env_set("mmcroot", mmcblk);
sprintf(cmd, "mmc dev %d", dev_no);
run_command(cmd, 0);
#ifdef CONFIG_ENV_IS_IN_MMC
mmc_late_init();
#endif
- setenv("modeboot", "mmcboot");
+ env_set("modeboot", "mmcboot");
break;
case IMX6_BMODE_NAND:
- setenv("modeboot", "nandboot");
+ env_set("modeboot", "nandboot");
break;
default:
- setenv("modeboot", "");
+ env_set("modeboot", "");
break;
}
if (is_mx6ul())
- setenv("console", "ttymxc0");
+ env_set("console", "ttymxc0");
else
- setenv("console", "ttymxc3");
+ env_set("console", "ttymxc3");
setenv_fdt_file();
void setenv_fdt_file(void)
{
if (is_mx6ul())
- setenv("fdt_file", "imx6ul-geam-kit.dtb");
+ env_set("fdt_file", "imx6ul-geam-kit.dtb");
}
#ifdef CONFIG_SPL_BUILD
void setenv_fdt_file(void)
{
if (is_mx6dq())
- setenv("fdt_file", "imx6q-icore.dtb");
+ env_set("fdt_file", "imx6q-icore.dtb");
else if(is_mx6dl() || is_mx6solo())
- setenv("fdt_file", "imx6dl-icore.dtb");
+ env_set("fdt_file", "imx6dl-icore.dtb");
}
#ifdef CONFIG_SPL_BUILD
void setenv_fdt_file(void)
{
if (is_mx6dq())
- setenv("fdt_file", "imx6q-icore-rqs.dtb");
+ env_set("fdt_file", "imx6q-icore-rqs.dtb");
else if(is_mx6dl() || is_mx6solo())
- setenv("fdt_file", "imx6dl-icore-rqs.dtb");
+ env_set("fdt_file", "imx6dl-icore-rqs.dtb");
}
#ifdef CONFIG_SPL_BUILD
{
if (is_mx6ul()) {
#ifdef CONFIG_ENV_IS_IN_MMC
- setenv("fdt_file", "imx6ul-isiot-emmc.dtb");
+ env_set("fdt_file", "imx6ul-isiot-emmc.dtb");
#else
- setenv("fdt_file", "imx6ul-isiot-nand.dtb");
+ env_set("fdt_file", "imx6ul-isiot-nand.dtb");
#endif
}
}
puts("Board: EtherCAN/2 Gateway");
break;
}
- if (getenv_f("serial#", str, sizeof(str)) > 0) {
+ if (env_get_f("serial#", str, sizeof(str)) > 0) {
puts(", serial# ");
puts(str);
}
{
char *str;
- char *serial = getenv("serial#");
+ char *serial = env_get("serial#");
if (serial) {
str = strchr(serial, '_');
if (str && (strlen(str) >= 4)) {
* In some cases this this needs to be set to 4.
* Check the user has set environment mdiv to 4 to change the divisor.
*/
- if ((str = getenv("mdiv")) && (strcmp(str, "4") == 0)) {
+ str = env_get("mdiv");
+ if (str && (strcmp(str, "4") == 0)) {
writel((readl(&pmc->mckr) & ~AT91_PMC_MDIV) |
AT91SAM9_PMC_MDIV_4, &pmc->mckr);
at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
vid, vdd_target/10);
/* check override variable for overriding VDD */
- vdd_string = getenv("b4qds_vdd_mv");
+ vdd_string = env_get("b4qds_vdd_mv");
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
* Extract hwconfig from environment since environment
* is not setup properly yet
*/
- getenv_f("hwconfig", buffer, sizeof(buffer));
+ env_get_f("hwconfig", buffer, sizeof(buffer));
buf = buffer;
if (hwconfig_subarg_cmp_f("fsl_b4860_serdes2",
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <asm/spl.h>
#include <malloc.h>
#include <ns16550.h>
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#endif
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
#if defined(CONFIG_PCI)
FT_FSL_PCI_SETUP;
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
#if defined(CONFIG_PCI)
FT_FSL_PCI_SETUP;
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
* to continue U-Boot
*/
sprintf(buf, "%lx", img_addr);
- setenv("img_addr", buf);
+ env_set("img_addr", buf);
if (ret)
return 1;
* bootdelay = 0 (To disable Boot Prompt)
* bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)
*/
- setenv("bootdelay", "0");
+ env_set("bootdelay", "0");
#ifdef CONFIG_ARM
- setenv("secureboot", "y");
+ env_set("secureboot", "y");
#else
- setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD);
+ env_set("bootcmd", CONFIG_CHAIN_BOOT_CMD);
#endif
return 0;
#include <asm/arch/ns_access.h>
#include <asm/arch/fsl_serdes.h>
-void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)
+void set_devices_ns_access(unsigned long index, u16 val)
{
u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR;
u32 *reg;
uint32_t tmp;
- reg = base + ns_dev->ind / 2;
+ reg = base + index / 2;
tmp = in_be32(reg);
- if (ns_dev->ind % 2 == 0) {
+ if (index % 2 == 0) {
tmp &= 0x0000ffff;
tmp |= val << 16;
} else {
int i;
for (i = 0; i < num; i++)
- set_devices_ns_access(ns_dev + i, ns_dev[i].val);
+ set_devices_ns_access(ns_dev[i].ind, ns_dev[i].val);
}
void enable_layerscape_ns_access(void)
switch (pcie) {
#ifdef CONFIG_PCIE1
case PCIE1:
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1], val);
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1_IO], val);
+ set_devices_ns_access(CSU_CSLX_PCIE1, val);
+ set_devices_ns_access(CSU_CSLX_PCIE1_IO, val);
return;
#endif
#ifdef CONFIG_PCIE2
case PCIE2:
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2], val);
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2_IO], val);
+ set_devices_ns_access(CSU_CSLX_PCIE2, val);
+ set_devices_ns_access(CSU_CSLX_PCIE2_IO, val);
return;
#endif
#ifdef CONFIG_PCIE3
case PCIE3:
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3], val);
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3_IO], val);
+ set_devices_ns_access(CSU_CSLX_PCIE3, val);
+ set_devices_ns_access(CSU_CSLX_PCIE3_IO, val);
return;
#endif
default:
/* Only initialize environment variables that are blank
* (i.e. have not yet been set)
*/
- if (!getenv(enetvar))
- setenv(enetvar, ethaddr);
+ if (!env_get(enetvar))
+ env_set(enetvar, ethaddr);
}
}
vdd_target = vdd[vid];
/* check override variable for overriding VDD */
- vdd_string = getenv(CONFIG_VID_FLS_ENV);
+ vdd_string = env_get(CONFIG_VID_FLS_ENV);
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
vdd_target = vdd[vid];
/* check override variable for overriding VDD */
- vdd_string = getenv(CONFIG_VID_FLS_ENV);
+ vdd_string = env_get(CONFIG_VID_FLS_ENV);
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
ls102xa_smmu_stream_id_init();
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
- enable_layerscape_ns_access();
-#endif
-
return 0;
}
/* Allow OCRAM access permission as R/W */
#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
- enable_layerscape_ns_access();
#endif
/*
config_serdes_mux();
#endif
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
- enable_layerscape_ns_access();
-#endif
-
if (adjust_vdd(0))
printf("Warning: Adjusting core voltage failed.\n");
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
- enable_layerscape_ns_access();
-#endif
-
#ifdef CONFIG_SECURE_BOOT
/*
* In case of Secure Boot, the IBR configures the SMMU
#PBL preamble and RCW header
aa55aa55 01ee0100
# RCW
-0c150010 0e000000 00000000 00000000
+0c150012 0e000000 00000000 00000000
11335559 40000012 60040000 c1000000
00000000 00000000 00000000 00238800
20124000 00003000 00000096 00000001
#PBL preamble and RCW header
aa55aa55 01ee0100
# RCW
-0c150010 0e000000 00000000 00000000
+0c150012 0e000000 00000000 00000000
11335559 40005012 60040000 c1000000
00000000 00000000 00000000 00238800
20124000 00003101 00000096 00000001
>> FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
char *env_hwconfig;
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
switch (serdes1_prtcl) {
case 0x07:
>> FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
int *riser_phy_addr;
- char *env_hwconfig = getenv("hwconfig");
+ char *env_hwconfig = env_get("hwconfig");
if (hwconfig_f("xqsgmii", env_hwconfig))
riser_phy_addr = &xqsgii_riser_phy_addr[0];
unsigned int i;
char *env_hwconfig;
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
initialize_dpmac_to_slot();
val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
if (hwconfig_f("dspi", env_hwconfig) &&
DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
int board_init(void)
{
- char *env_hwconfig;
- u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
#ifdef CONFIG_FSL_MC_ENET
u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
#endif
- u32 val;
init_final_memctl_regs();
- val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
-
- env_hwconfig = getenv("hwconfig");
-
- if (hwconfig_f("dspi", env_hwconfig) &&
- DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
- config_board_mux(MUX_TYPE_DSPI);
- else
- config_board_mux(MUX_TYPE_SDHC);
-
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif
int misc_init_r(void)
{
-#ifdef CONFIG_FSL_QIXIS
- /*
- * LS2081ARDB has smart voltage translator which needs
- * to be programmed as below
- */
-#ifndef CONFIG_TARGET_LS2081ARDB
- u8 sw;
+ char *env_hwconfig;
+ u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
+ u32 val;
+
+ val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
+
+ env_hwconfig = env_get("hwconfig");
+
+ if (hwconfig_f("dspi", env_hwconfig) &&
+ DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
+ config_board_mux(MUX_TYPE_DSPI);
+ else
+ config_board_mux(MUX_TYPE_SDHC);
- sw = QIXIS_READ(arch);
/*
- * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
+ * LS2081ARDB RevF board has smart voltage translator
* which needs to be programmed to enable high speed SD interface
* by setting GPIO4_10 output to zero
*/
- if ((sw & 0xf) == 0x5) {
-#endif
+#ifdef CONFIG_TARGET_LS2081ARDB
out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
in_le32(GPIO4_GPDIR_ADDR)));
out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
in_le32(GPIO4_GPDAT_ADDR)));
-#ifndef CONFIG_TARGET_LS2081ARDB
- }
#endif
-#endif
-
if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
#endif
#ifdef CONFIG_OF_BOARD_SETUP
+void fsl_fdt_fixup_flash(void *fdt)
+{
+ int offset;
+
+/*
+ * IFC and QSPI are muxed on board.
+ * So disable IFC node in dts if QSPI is enabled or
+ * disable QSPI node in dts in case QSPI is not enabled.
+ */
+#ifdef CONFIG_FSL_QSPI
+ offset = fdt_path_offset(fdt, "/soc/ifc");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/ifc");
+#else
+ offset = fdt_path_offset(fdt, "/soc/quadspi");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/quadspi");
+#endif
+ if (offset < 0)
+ return;
+
+ fdt_status_disabled(fdt, offset);
+}
+
int ft_board_setup(void *blob, bd_t *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
fsl_fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_flash(blob);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
#endif
#
obj-y = m54418twr.o
+extra-y += sbf_dram_init.o
+
--- /dev/null
+/*
+ * Board-specific sbf ddr/sdram init.
+ *
+ * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.global sbf_dram_init
+.text
+
+sbf_dram_init:
+ move.l #0xFC04002D, %a1
+ move.b #46, (%a1) /* DDR */
+
+ /* slew settings */
+ move.l #0xEC094060, %a1
+ move.b #0, (%a1)
+
+ /* use vco instead of cpu*2 clock for ddr clock */
+ move.l #0xEC09001A, %a1
+ move.w #0xE01D, (%a1)
+
+ /* DDR settings */
+ move.l #0xFC0B8180, %a1
+ move.l #0x00000000, (%a1)
+ move.l #0x40000000, (%a1)
+
+ move.l #0xFC0B81AC, %a1
+ move.l #0x01030203, (%a1)
+
+ move.l #0xFC0B8000, %a1
+ move.l #0x01010101, (%a1)+ /* 0x00 */
+ move.l #0x00000101, (%a1)+ /* 0x04 */
+ move.l #0x01010100, (%a1)+ /* 0x08 */
+ move.l #0x01010000, (%a1)+ /* 0x0C */
+ move.l #0x00010101, (%a1)+ /* 0x10 */
+ move.l #0xFC0B8018, %a1
+ move.l #0x00010100, (%a1)+ /* 0x18 */
+ move.l #0x00000001, (%a1)+ /* 0x1C */
+ move.l #0x01000001, (%a1)+ /* 0x20 */
+ move.l #0x00000100, (%a1)+ /* 0x24 */
+ move.l #0x00010001, (%a1)+ /* 0x28 */
+ move.l #0x00000200, (%a1)+ /* 0x2C */
+ move.l #0x01000002, (%a1)+ /* 0x30 */
+ move.l #0x00000000, (%a1)+ /* 0x34 */
+ move.l #0x00000100, (%a1)+ /* 0x38 */
+ move.l #0x02000100, (%a1)+ /* 0x3C */
+ move.l #0x02000407, (%a1)+ /* 0x40 */
+ move.l #0x02030007, (%a1)+ /* 0x44 */
+ move.l #0x02000100, (%a1)+ /* 0x48 */
+ move.l #0x0A030203, (%a1)+ /* 0x4C */
+ move.l #0x00020708, (%a1)+ /* 0x50 */
+ move.l #0x00050008, (%a1)+ /* 0x54 */
+ move.l #0x04030002, (%a1)+ /* 0x58 */
+ move.l #0x00000004, (%a1)+ /* 0x5C */
+ move.l #0x020A0000, (%a1)+ /* 0x60 */
+ move.l #0x0C00000E, (%a1)+ /* 0x64 */
+ move.l #0x00002004, (%a1)+ /* 0x68 */
+ move.l #0x00000000, (%a1)+ /* 0x6C */
+ move.l #0x00100010, (%a1)+ /* 0x70 */
+ move.l #0x00100010, (%a1)+ /* 0x74 */
+ move.l #0x00000000, (%a1)+ /* 0x78 */
+ move.l #0x07990000, (%a1)+ /* 0x7C */
+ move.l #0xFC0B80A0, %a1
+ move.l #0x00000000, (%a1)+ /* 0xA0 */
+ move.l #0x00C80064, (%a1)+ /* 0xA4 */
+ move.l #0x44520002, (%a1)+ /* 0xA8 */
+ move.l #0x00C80023, (%a1)+ /* 0xAC */
+ move.l #0xFC0B80B4, %a1
+ move.l #0x0000C350, (%a1) /* 0xB4 */
+ move.l #0xFC0B80E0, %a1
+ move.l #0x04000000, (%a1)+ /* 0xE0 */
+ move.l #0x03000304, (%a1)+ /* 0xE4 */
+ move.l #0x40040000, (%a1)+ /* 0xE8 */
+ move.l #0xC0004004, (%a1)+ /* 0xEC */
+ move.l #0x0642C000, (%a1)+ /* 0xF0 */
+ move.l #0x00000642, (%a1)+ /* 0xF4 */
+ move.l #0xFC0B8024, %a1
+ tpf
+ move.l #0x01000100, (%a1) /* 0x24 */
+
+ move.l #0x2000, %d1
+ bsr asm_delay
+
+ rts
#
obj-y = m54451evb.o
+extra-y += sbf_dram_init.o
--- /dev/null
+/*
+ * Board-specific sbf ddr/sdram init.
+ *
+ * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+ #include <config.h>
+
+.global sbf_dram_init
+.text
+
+sbf_dram_init:
+ /* Dram Initialization a1, a2, and d0 */
+ /* mscr sdram */
+ move.l #0xFC0A4074, %a1
+ move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
+ nop
+
+ /* SDRAM Chip 0 and 1 */
+ move.l #0xFC0B8110, %a1
+ move.l #0xFC0B8114, %a2
+
+ /* calculate the size */
+ move.l #0x13, %d1
+ move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
+#ifdef CONFIG_SYS_SDRAM_BASE1
+ lsr.l #1, %d2
+#endif
+
+dramsz_loop:
+ lsr.l #1, %d2
+ add.l #1, %d1
+ cmp.l #1, %d2
+ bne dramsz_loop
+#ifdef CONFIG_SYS_NAND_BOOT
+ beq asm_nand_chk_status
+#endif
+ /* SDRAM Chip 0 and 1 */
+ move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
+ or.l %d1, (%a1)
+#ifdef CONFIG_SYS_SDRAM_BASE1
+ move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
+ or.l %d1, (%a2)
+#endif
+ nop
+
+ /* dram cfg1 and cfg2 */
+ move.l #0xFC0B8008, %a1
+ move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
+ nop
+ move.l #0xFC0B800C, %a2
+ move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
+ nop
+
+ move.l #0xFC0B8000, %a1 /* Mode */
+ move.l #0xFC0B8004, %a2 /* Ctrl */
+
+ /* Issue PALL */
+ move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
+ nop
+
+ move.l #1000, %d1
+ bsr asm_delay
+
+ /* Issue PALL */
+ move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
+ nop
+
+ /* Perform two refresh cycles */
+ move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
+ nop
+ move.l %d0, (%a2)
+ move.l %d0, (%a2)
+ nop
+
+ /* Issue LEMR */
+ move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
+ nop
+ move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
+
+ move.l #500, %d1
+ bsr asm_delay
+
+ move.l #(CONFIG_SYS_SDRAM_CTRL), %d1
+ and.l #0x7FFFFFFF, %d1
+
+ or.l #0x10000C00, %d1
+
+ move.l %d1, (%a2)
+ nop
+
+ move.l #2000, %d1
+ bsr asm_delay
+
+ rts
#
obj-y = m54455evb.o
+extra-y += sbf_dram_init.o
--- /dev/null
+/*
+ * Board-specific sbf ddr/sdram init.
+ *
+ * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+ #include <config.h>
+
+.global sbf_dram_init
+.text
+
+sbf_dram_init:
+ /* Dram Initialization a1, a2, and d0 */
+ /* mscr sdram */
+ move.l #0xFC0A4074, %a1
+ move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
+ nop
+
+ /* SDRAM Chip 0 and 1 */
+ move.l #0xFC0B8110, %a1
+ move.l #0xFC0B8114, %a2
+
+ /* calculate the size */
+ move.l #0x13, %d1
+ move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
+#ifdef CONFIG_SYS_SDRAM_BASE1
+ lsr.l #1, %d2
+#endif
+
+dramsz_loop:
+ lsr.l #1, %d2
+ add.l #1, %d1
+ cmp.l #1, %d2
+ bne dramsz_loop
+#ifdef CONFIG_SYS_NAND_BOOT
+ beq asm_nand_chk_status
+#endif
+ /* SDRAM Chip 0 and 1 */
+ move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
+ or.l %d1, (%a1)
+#ifdef CONFIG_SYS_SDRAM_BASE1
+ move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
+ or.l %d1, (%a2)
+#endif
+ nop
+
+ /* dram cfg1 and cfg2 */
+ move.l #0xFC0B8008, %a1
+ move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
+ nop
+ move.l #0xFC0B800C, %a2
+ move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
+ nop
+
+ move.l #0xFC0B8000, %a1 /* Mode */
+ move.l #0xFC0B8004, %a2 /* Ctrl */
+
+ /* Issue PALL */
+ move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
+ nop
+
+ /* Issue LEMR */
+ move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
+ nop
+ move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
+ nop
+
+ move.l #1000, %d1
+ bsr asm_delay
+
+ /* Issue PALL */
+ move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
+ nop
+
+ /* Perform two refresh cycles */
+ move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
+ nop
+ move.l %d0, (%a2)
+ move.l %d0, (%a2)
+ nop
+
+ move.l #(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
+ nop
+
+ move.l #500, %d1
+ bsr asm_delay
+
+ move.l #(CONFIG_SYS_SDRAM_CTRL), %d1
+ and.l #0x7FFFFFFF, %d1
+
+ or.l #0x10000C00, %d1
+
+ move.l %d1, (%a2)
+ nop
+
+ move.l #2000, %d1
+ bsr asm_delay
+
+ rts
buf[i * 6 + 4], buf[i * 6 + 5]);
sprintf((char *)enetvar,
i ? "eth%daddr" : "ethaddr", i);
- setenv((char *)enetvar, str);
+ env_set((char *)enetvar, str);
}
}
}
static int is_pex_x2(void)
{
- const char *pex_x2 = getenv("pex_x2");
+ const char *pex_x2 = env_get("pex_x2");
if (pex_x2 && !strcmp(pex_x2, "yes"))
return 1;
char buffer[HWCONFIG_BUFFER_SIZE] = {0};
int esdhc_hwconfig_enabled = 0;
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
esdhc_hwconfig_enabled = hwconfig_f("esdhc", buffer);
if (esdhc_hwconfig_enabled == 0)
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
drivers/mtd/built-in.o (.text*)
. = DEFINED(env_offset) ? env_offset : .;
- common/env_embedded.o(.text*)
+ env/embedded.o(.text*)
*(.text*)
}
if TARGET_MX31PDK
+config SPL_LDSCRIPT
+ default "arch/$(ARCH)/cpu/u-boot-spl.lds"
+
config SYS_BOARD
default "mx31pdk"
int board_video_skip(void)
{
int ret;
- char const *e = getenv("panel");
+ char const *e = env_get("panel");
if (e) {
if (strcmp(e, "claa") == 0) {
if (!p)
return -ENODEV;
- setenv("fdt_file", "imx53-qsb.dtb");
+ env_set("fdt_file", "imx53-qsb.dtb");
/* Set VDDA to 1.25V */
val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
if (!p)
return -ENODEV;
- setenv("fdt_file", "imx53-qsrb.dtb");
+ env_set("fdt_file", "imx53-qsrb.dtb");
/* Set VDDGP to 1.25V for 1GHz on SW1 */
pmic_reg_read(p, REG_SW_0, &val);
int board_video_skip(void)
{
int ret;
- char const *e = getenv("panel");
+ char const *e = env_get("panel");
if (e) {
if (strcmp(e, "seiko") == 0) {
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "SABREAUTO");
+ env_set("board_name", "SABREAUTO");
if (is_mx6dqp())
- setenv("board_rev", "MX6QP");
+ env_set("board_rev", "MX6QP");
else if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else if (is_mx6sdl())
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
writel(0xF00000CF, &iomux->gpr[4]);
if (is_mx6dqp()) {
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
- writel(0x007F007F, &iomux->gpr[6]);
- writel(0x007F007F, &iomux->gpr[7]);
+ writel(0x77177717, &iomux->gpr[6]);
+ writel(0x77177717, &iomux->gpr[7]);
} else {
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
writel(0x007F007F, &iomux->gpr[6]);
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "SABRESD");
+ env_set("board_name", "SABRESD");
if (is_mx6dqp())
- setenv("board_rev", "MX6QP");
+ env_set("board_rev", "MX6QP");
else if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else if (is_mx6sdl())
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
writel(0xF00000CF, &iomux->gpr[4]);
if (is_mx6dqp()) {
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
- writel(0x007F007F, &iomux->gpr[6]);
- writel(0x007F007F, &iomux->gpr[7]);
+ writel(0x77177717, &iomux->gpr[6]);
+ writel(0x77177717, &iomux->gpr[7]);
} else {
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
writel(0x007F007F, &iomux->gpr[6]);
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "EVK");
+ env_set("board_name", "EVK");
if (is_mx6ul_9x9_evk())
- setenv("board_rev", "9X9");
+ env_set("board_rev", "9X9");
else
- setenv("board_rev", "14X14");
+ env_set("board_rev", "14X14");
#endif
return 0;
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "EVK");
- setenv("board_rev", "14X14");
+ env_set("board_name", "EVK");
+ env_set("board_rev", "14X14");
#endif
return 0;
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
#if defined(CONFIG_PCI)
FT_FSL_PCI_SETUP;
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_VSC7385_ENET
/* If a VSC7385 microcode image is present, then upload it. */
- if ((tmp = getenv("vscfw_addr")) != NULL) {
+ tmp = env_get("vscfw_addr");
+ if (tmp) {
vscfw_addr = simple_strtoul(tmp, NULL, 16);
printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
if (vsc7385_upload_firmware((void *) vscfw_addr,
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
/* -kernel boot */
prop = fdt_getprop(fdt, chosen, "qemu,boot-kernel", &len);
if (prop && (len >= 8))
- setenv_hex("qemu_kernel_addr", *prop);
+ env_set_hex("qemu_kernel_addr", *prop);
/* Give the user a variable for the host fdt */
- setenv_hex("fdt_addr_r", (ulong)fdt);
+ env_set_hex("fdt_addr_r", (ulong)fdt);
return 0;
}
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
(uchar *)CONFIG_ENV_ADDR);
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <asm/spl.h>
#include <malloc.h>
#include <ns16550.h>
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
vdd_target = vdd[vid];
/* check override variable for overriding VDD */
- vdd_string = getenv("t4240qds_vdd_mv");
+ vdd_string = env_get("t4240qds_vdd_mv");
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <asm/spl.h>
#include <malloc.h>
#include <ns16550.h>
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
char arg[10];
size_t len;
int i;
- int quiet = simple_strtol(getenv("quiet"), NULL, 10);
+ int quiet = simple_strtol(env_get("quiet"), NULL, 10);
if (board >= GW_UNKNOWN)
return;
#endif
/* default to the first detected enet dev */
- if (!getenv("ethprime")) {
+ if (!env_get("ethprime")) {
struct eth_device *dev = eth_get_dev_by_index(0);
if (dev) {
- setenv("ethprime", dev->name);
- printf("set ethprime to %s\n", getenv("ethprime"));
+ env_set("ethprime", dev->name);
+ printf("set ethprime to %s\n", env_get("ethprime"));
}
}
*/
void get_board_serial(struct tag_serialnr *serialnr)
{
- char *serial = getenv("serial#");
+ char *serial = env_get("serial#");
if (serial) {
serialnr->high = 0;
int quiet; /* Quiet or minimal output mode */
quiet = 0;
- p = getenv("quiet");
+ p = env_get("quiet");
if (p)
quiet = simple_strtol(p, NULL, 10);
else
- setenv("quiet", "0");
+ env_set("quiet", "0");
puts("\nGateworks Corporation Copyright 2014\n");
if (info->model[0]) {
else if (is_cpu_type(MXC_CPU_MX6DL) ||
is_cpu_type(MXC_CPU_MX6SOLO))
cputype = "imx6dl";
- setenv("soctype", cputype);
+ env_set("soctype", cputype);
if (8 << (ventana_info.nand_flash_size-1) >= 2048)
- setenv("flash_layout", "large");
+ env_set("flash_layout", "large");
else
- setenv("flash_layout", "normal");
+ env_set("flash_layout", "normal");
memset(str, 0, sizeof(str));
for (i = 0; i < (sizeof(str)-1) && info->model[i]; i++)
str[i] = tolower(info->model[i]);
- setenv("model", str);
- if (!getenv("fdt_file")) {
+ env_set("model", str);
+ if (!env_get("fdt_file")) {
sprintf(fdt, "%s-%s.dtb", cputype, str);
- setenv("fdt_file", fdt);
+ env_set("fdt_file", fdt);
}
p = strchr(str, '-');
if (p) {
*p++ = 0;
- setenv("model_base", str);
+ env_set("model_base", str);
sprintf(fdt, "%s-%s.dtb", cputype, str);
- setenv("fdt_file1", fdt);
+ env_set("fdt_file1", fdt);
if (board_type != GW551x &&
board_type != GW552x &&
board_type != GW553x &&
str[5] = 'x';
str[6] = 0;
sprintf(fdt, "%s-%s.dtb", cputype, str);
- setenv("fdt_file2", fdt);
+ env_set("fdt_file2", fdt);
}
/* initialize env from EEPROM */
if (test_bit(EECONFIG_ETH0, info->config) &&
- !getenv("ethaddr")) {
- eth_setenv_enetaddr("ethaddr", info->mac0);
+ !env_get("ethaddr")) {
+ eth_env_set_enetaddr("ethaddr", info->mac0);
}
if (test_bit(EECONFIG_ETH1, info->config) &&
- !getenv("eth1addr")) {
- eth_setenv_enetaddr("eth1addr", info->mac1);
+ !env_get("eth1addr")) {
+ eth_env_set_enetaddr("eth1addr", info->mac1);
}
/* board serial-number */
sprintf(str, "%6d", info->serial);
- setenv("serial#", str);
+ env_set("serial#", str);
/* memory MB */
sprintf(str, "%d", (int) (gd->ram_size >> 20));
- setenv("mem_mb", str);
+ env_set("mem_mb", str);
}
/* Set a non-initialized hwconfig based on board configuration */
- if (!strcmp(getenv("hwconfig"), "_UNKNOWN_")) {
+ if (!strcmp(env_get("hwconfig"), "_UNKNOWN_")) {
buf[0] = 0;
if (gpio_cfg[board_type].rs232_en)
strcat(buf, "rs232;");
if (strlen(buf) + strlen(buf1) < sizeof(buf))
strcat(buf, buf1);
}
- setenv("hwconfig", buf);
+ env_set("hwconfig", buf);
}
/* setup baseboard specific GPIO based on board and env */
int j;
sprintf(mac, "eth1addr");
- tmp = getenv(mac);
+ tmp = env_get(mac);
if (tmp) {
for (j = 0; j < 6; j++) {
mac_addr[j] = tmp ?
{ "sst,w25q256", MTD_DEV_TYPE_NOR, }, /* SPI flash */
{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
- const char *model = getenv("model");
- const char *display = getenv("display");
+ const char *model = env_get("model");
+ const char *display = env_get("display");
int i;
char rev = 0;
}
}
- if (getenv("fdt_noauto")) {
+ if (env_get("fdt_noauto")) {
puts(" Skiping ft_board_setup (fdt_noauto defined)\n");
return 0;
}
printf(" Adjusting FDT per EEPROM for %s...\n", model);
/* board serial number */
- fdt_setprop(blob, 0, "system-serial", getenv("serial#"),
- strlen(getenv("serial#")) + 1);
+ fdt_setprop(blob, 0, "system-serial", env_get("serial#"),
+ strlen(env_get("serial#")) + 1);
/* board (model contains model from device-tree) */
fdt_setprop(blob, 0, "board", info->model,
strlen((const char *)info->model) + 1);
/* set desired digital video capture format */
- ft_sethdmiinfmt(blob, getenv("hdmiinfmt"));
+ ft_sethdmiinfmt(blob, env_get("hdmiinfmt"));
/*
* Board model specific fixups
}
#if defined(CONFIG_CMD_PCI)
- if (!getenv("nopcifixup"))
+ if (!env_get("nopcifixup"))
ft_board_pci_fixup(blob, bd);
#endif
* remove nodes by alias path if EEPROM config tells us the
* peripheral is not loaded on the board.
*/
- if (getenv("fdt_noconfig")) {
+ if (env_get("fdt_noconfig")) {
puts(" Skiping periperhal config (fdt_noconfig defined)\n");
return 0;
}
debug("%s\n", __func__);
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- debug("boot_os=%s\n", getenv("boot_os"));
- if (getenv_yesno("boot_os") == 1)
+ env_load();
+ debug("boot_os=%s\n", env_get("boot_os"));
+ if (env_get_yesno("boot_os") == 1)
ret = 0;
#else
/* use i2c-0:0x50:0x00 for falcon boot mode (0=linux, else uboot) */
char *hexprog;
struct key_program *prog;
- cmd = getenv("loadkeyprogram");
+ cmd = env_get("loadkeyprogram");
if (!cmd || run_command(cmd, 0))
return 1;
- hexprog = getenv("keyprogram");
+ hexprog = env_get("keyprogram");
if (decode_hexstr(hexprog, &binprog))
return 1;
int checkboard(void)
{
- char *s = getenv("serial#");
+ char *s = env_get("serial#");
bool hw_type_cat = pca9698_get_value(0x20, 20);
puts("Board: ");
int checkboard(void)
{
- char *s = getenv("serial#");
+ char *s = env_get("serial#");
bool hw_type_cat = pca9698_get_value(0x20, 18);
puts("Board: ");
{
ulong addr;
#ifdef CCDM_SECOND_STAGE
- addr = getenv_ulong("loadaddr", 16, CONFIG_LOADADDR);
+ addr = env_get_ulong("loadaddr", 16, CONFIG_LOADADDR);
#else
addr = target_addr;
#endif
{
ulong addr;
/* TODO use other area? */
- addr = getenv_ulong("loadaddr", 16, CONFIG_LOADADDR);
+ addr = env_get_ulong("loadaddr", 16, CONFIG_LOADADDR);
return (u8 *)(addr);
}
#endif
goto failure;
/* run "prepboot" from env to get "mmcdev" set */
- cptr = getenv("prepboot");
+ cptr = env_get("prepboot");
if (cptr && !run_command(cptr, 0))
- mmcdev = getenv("mmcdev");
+ mmcdev = env_get("mmcdev");
if (!mmcdev)
goto failure;
- cptr = getenv("ramdiskimage");
+ cptr = env_get("ramdiskimage");
if (cptr)
image_path = cptr;
#ifdef CONFIG_TRAILBLAZER
int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- return run_command(getenv("bootcmd"), flag);
+ return run_command(env_get("bootcmd"), flag);
}
int board_early_init_r(void)
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl(&cdev->macid1l);
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
#endif
static int check_mmc_autodetect(void)
{
- char *autodetect_str = getenv("mmcautodetect");
+ char *autodetect_str = env_get("mmcautodetect");
if ((autodetect_str != NULL) &&
(strcmp(autodetect_str, "yes") == 0)) {
if (!check_mmc_autodetect())
return;
- setenv_ulong("mmcdev", dev_no);
+ env_set_ulong("mmcdev", dev_no);
/* Set mmcblk env */
sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw",
dev_no);
- setenv("mmcroot", mmcblk);
+ env_set("mmcroot", mmcblk);
sprintf(cmd, "mmc dev %d", dev_no);
run_command(cmd, 0);
uint32_t mac_hi, mac_lo;
const char *devname;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
sprintf(envbuffer, "bootcmd%d", boot_choice);
- if (getenv(envbuffer)) {
+ if (env_get(envbuffer)) {
sprintf(envbuffer, "run bootcmd%d", boot_choice);
- setenv("bootcmd", envbuffer);
+ env_set("bootcmd", envbuffer);
} else
- setenv("bootcmd", "");
+ env_set("bootcmd", "");
return 0;
}
static int init_dwmmc(void)
{
- int ret;
+ int ret = 0;
#ifdef CONFIG_MMC_DW
if (gpio_get_value(HOT_WATER_BUTTON))
return 0;
- setenv("bootcmd", "run swupdate");
+ env_set("bootcmd", "run swupdate");
return 0;
}
*/
#include <common.h>
#include <dwc3-uboot.h>
+#include <environment.h>
#include <mmc.h>
#include <u-boot/md5.h>
#include <usb.h>
snprintf(usb0addr, sizeof(usb0addr), "02:00:86:%02x:%02x:%02x",
ssn[13], ssn[14], ssn[15]);
- setenv("usb0addr", usb0addr);
+ env_set("usb0addr", usb0addr);
for (i = 0; i < 16; i++)
snprintf(&serial[2 * i], 3, "%02x", ssn[i]);
- setenv("serial#", serial);
+ env_set("serial#", serial);
#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
- saveenv();
+ env_save();
#endif
}
printf("Can't retrieve hardware revision\n");
snprintf(hardware_id, sizeof(hardware_id), "%02X", v.hardware_id);
- setenv("hardware_id", hardware_id);
+ env_set("hardware_id", hardware_id);
#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
- saveenv();
+ env_save();
#endif
}
int board_late_init(void)
{
- if (!getenv("serial#"))
+ if (!env_get("serial#"))
assign_serial();
- if (!getenv("hardware_id"))
+ if (!env_get("hardware_id"))
assign_hardware_id();
return 0;
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
switch (get_board_revision()) {
case 0:
- setenv("board_name", "igep0034-lite");
+ env_set("board_name", "igep0034-lite");
break;
case 1:
- setenv("board_name", "igep0034");
+ env_set("board_name", "igep0034");
break;
default:
- setenv("board_name", "igep0033");
+ env_set("board_name", "igep0033");
break;
}
#endif
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
writel((GMII1_SEL_RMII | RMII1_IO_CLK_EN),
{
switch (gd->bd->bi_arch_number) {
case MACH_TYPE_IGEP0020:
- setenv("fdtfile", "omap3-igep0020.dtb");
+ env_set("fdtfile", "omap3-igep0020.dtb");
break;
case MACH_TYPE_IGEP0030:
- setenv("fdtfile", "omap3-igep0030.dtb");
+ env_set("fdtfile", "omap3-igep0030.dtb");
break;
}
}
pnvramaddr = gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM
- CONFIG_KM_PNVRAM;
sprintf((char *)buf, "0x%x", pnvramaddr);
- setenv("pnvramaddr", (char *)buf);
+ env_set("pnvramaddr", (char *)buf);
/* try to read rootfssize (ram image) from environment */
- p = getenv("rootfssize");
+ p = env_get("rootfssize");
if (p != NULL)
strict_strtoul(p, 16, &rootfssize);
pram = (rootfssize + CONFIG_KM_RESERVED_PRAM + CONFIG_KM_PHRAM +
CONFIG_KM_PNVRAM) / 0x400;
sprintf((char *)buf, "0x%x", pram);
- setenv("pram", (char *)buf);
+ env_set("pram", (char *)buf);
varaddr = gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM;
sprintf((char *)buf, "0x%x", varaddr);
- setenv("varaddr", (char *)buf);
+ env_set("varaddr", (char *)buf);
kernelmem = gd->ram_size - 0x400 * pram;
sprintf((char *)buf, "0x%x", kernelmem);
- setenv("kernelmem", (char *)buf);
+ env_set("kernelmem", (char *)buf);
return 0;
}
return 1;
}
strcpy((char *)buf, p);
- setenv("boardid", (char *)buf);
+ env_set("boardid", (char *)buf);
printf("set boardid=%s\n", buf);
p = get_local_var("IVM_HWKey");
return 1;
}
strcpy((char *)buf, p);
- setenv("hwkey", (char *)buf);
+ env_set("hwkey", (char *)buf);
printf("set hwkey=%s\n", buf);
printf("Execute manually saveenv for persistent storage.\n");
}
/* now try to read values from environment if available */
- p = getenv("boardid");
+ p = env_get("boardid");
if (p != NULL)
rc = strict_strtoul(p, 16, &envbid);
- p = getenv("hwkey");
+ p = env_get("hwkey");
if (p != NULL)
rc = strict_strtoul(p, 16, &envhwkey);
* BoardId/HWkey not available in the environment, so try the
* environment variable for BoardId/HWkey list
*/
- char *bidhwklist = getenv("boardIdListHex");
+ char *bidhwklist = env_get("boardIdListHex");
if (bidhwklist) {
int found = 0;
envbid = bid;
envhwkey = hwkey;
sprintf(buf, "%lx", bid);
- setenv("boardid", buf);
+ env_set("boardid", buf);
sprintf(buf, "%lx", hwkey);
- setenv("hwkey", buf);
+ env_set("hwkey", buf);
}
} /* end while( ! found ) */
}
#if defined(CONFIG_POST)
testpin = post_hotkeys_pressed();
#endif
- s = getenv("test_bank");
+ s = env_get("test_bank");
/* when test_bank is not set, act as if testpin is not asserted */
testboot = (testpin != 0) && (s);
if (verbose) {
GET_STRING("IVM_Symbol", IVM_POS_SYMBOL_ONLY, 8)
GET_STRING("IVM_DeviceName", IVM_POS_SHORT_TEXT, 64)
- tmp = (unsigned char *) getenv("IVM_DeviceName");
+ tmp = (unsigned char *)env_get("IVM_DeviceName");
if (tmp) {
int len = strlen((char *)tmp);
int i = 0;
#ifndef CONFIG_KMTEGR1
/* if an offset is defined, add it */
process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true);
- setenv((char *)"ethaddr", (char *)valbuf);
+ env_set((char *)"ethaddr", (char *)valbuf);
#ifdef CONFIG_KMVECT1
/* KMVECT1 has two ethernet interfaces */
process_mac(valbuf, page2, 1, true);
- setenv((char *)"eth1addr", (char *)valbuf);
+ env_set((char *)"eth1addr", (char *)valbuf);
#endif
#else
/* KMTEGR1 has a special setup. eth0 has no connection to the outside and
* gets the official MAC address from the IVM
*/
process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, false);
- setenv((char *)"ethaddr", (char *)valbuf);
+ env_set((char *)"ethaddr", (char *)valbuf);
process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true);
- setenv((char *)"eth1addr", (char *)valbuf);
+ env_set((char *)"eth1addr", (char *)valbuf);
#endif
return 0;
mv88e_sw_reset(name, CONFIG_KM_MVEXTSW_ADDR);
if (piggy_present()) {
- setenv("ethact", "UEC2");
- setenv("netdev", "eth1");
+ env_set("ethact", "UEC2");
+ env_set("netdev", "eth1");
puts("using PIGGY for network boot\n");
} else {
- setenv("netdev", "eth0");
+ env_set("netdev", "eth0");
puts("using frontport for network boot\n");
}
#endif
if (dip_switch != 0) {
/* start bootloader */
puts("DIP: Enabled\n");
- setenv("actual_bank", "0");
+ env_set("actual_bank", "0");
}
#endif
set_km_env();
unsigned int bootcountaddr;
bootcountaddr = gd->ram_size - BOOTCOUNT_ADDR;
sprintf((char *)buf, "0x%x", bootcountaddr);
- setenv("bootcountaddr", (char *)buf);
+ env_set("bootcountaddr", (char *)buf);
}
int misc_init_r(void)
#if defined(CONFIG_KM_MGCOGE3UN)
char *wait_for_ne;
u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE);
- wait_for_ne = getenv("waitforne");
+ wait_for_ne = env_get("waitforne");
if ((wait_for_ne != NULL) && (dip_switch == 0)) {
if (strcmp(wait_for_ne, "true") == 0) {
if (dip_switch != 0) {
/* start bootloader */
puts("DIP: Enabled\n");
- setenv("actual_bank", "0");
+ env_set("actual_bank", "0");
}
#endif
if (dip_switch != 0) {
/* start bootloader */
puts("DIP: Enabled\n");
- setenv("actual_bank", "0");
+ env_set("actual_bank", "0");
}
#endif
set_km_env();
unsigned char mac_addr[6];
/* get the mac addr from env */
- tmp = getenv("ethaddr");
+ tmp = env_get("ethaddr");
if (!tmp) {
printf("ethaddr env variable not defined\n");
return;
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
int ret;
/* If 'ethaddr' is already set, do nothing. */
- if (getenv("ethaddr"))
+ if (env_get("ethaddr"))
return 0;
/* EEPROM is at bus 2. */
}
/* Set ethernet address from EEPROM. */
- eth_setenv_enetaddr("ethaddr", data.mac);
+ eth_env_set_enetaddr("ethaddr", data.mac);
return ret;
}
}
if (reboot_mode[0] > 0 && isascii(reboot_mode[0])) {
- if (!getenv("reboot-mode"))
- setenv("reboot-mode", (char *)reboot_mode);
+ if (!env_get("reboot-mode"))
+ env_set("reboot-mode", (char *)reboot_mode);
}
omap_reboot_mode_clear();
int board_late_init(void)
{
- setenv("board_name", "mccmon6");
+ env_set("board_name", "mccmon6");
return 0;
}
return 1;
env_init();
- ret = getenv_f("boot_os", s, sizeof(s));
+ ret = env_get_f("boot_os", s, sizeof(s));
if ((ret != -1) && (strcmp(s, "no") == 0))
return 1;
* recovery_status = <any value> -> start SWUpdate
*
*/
- ret = getenv_f("recovery_status", s, sizeof(s));
+ ret = env_get_f("recovery_status", s, sizeof(s));
if (ret != -1)
return 1;
int board_late_init(void)
{
- setenv("board_name", "imx6logic");
+ env_set("board_name", "imx6logic");
if (is_mx6dq()) {
- setenv("board_rev", "MX6DQ");
- setenv("fdt_file", "imx6q-logicpd.dtb");
+ env_set("board_rev", "MX6DQ");
+ env_set("fdt_file", "imx6q-logicpd.dtb");
}
return 0;
gd->bd->bi_arch_number = board->machine_id;
/* If the user has not set fdtimage, set the default */
- if (!getenv("fdtimage"))
- setenv("fdtimage", board->fdtfile);
+ if (!env_get("fdtimage"))
+ env_set("fdtimage", board->fdtfile);
}
/* restore hsusb0_data5 pin as hsusb0_data5 */
MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); /*SDRC_DQS2*/
MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); /*SDRC_DQS3*/
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); /*SDRC_CKE0*/
- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)); /*SDRC_CKE1*/
+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | DIS | M0)); /*SDRC_CKE1*/
MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/
MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); /*GPMC_A2*/
uchar eth_addr[6];
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+ if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
dev = eth_get_dev_by_index(0);
if (dev) {
- eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+ eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
} else {
printf("zoom1: Couldn't get eth device\n");
rc = -1;
int checkboard(void)
{
char buf[64];
- int i = getenv_f("serial#", buf, sizeof(buf));
+ int i = env_get_f("serial#", buf, sizeof(buf));
u32 config0 = read_c0_prid();
if ((config0 & 0xff0000) == PRID_COMP_LEGACY
params->u.core.rootdev = 0x0;
/* append omap atag only if env setup_omap_atag is set to 1 */
- str = getenv("setup_omap_atag");
+ str = env_get("setup_omap_atag");
if (!str || str[0] != '1')
return;
- str = getenv("setup_console_atag");
+ str = env_get("setup_console_atag");
if (str && str[0] == '1')
setup_console_atag = 1;
else
setup_console_atag = 0;
- setup_boot_reason_atag = getenv("setup_boot_reason_atag");
- setup_boot_mode_atag = getenv("setup_boot_mode_atag");
+ setup_boot_reason_atag = env_get("setup_boot_reason_atag");
+ setup_boot_mode_atag = env_get("setup_boot_mode_atag");
params = *in_params;
t = (struct tag_omap *)¶ms->u;
/* set env variable attkernaddr for relocated kernel */
sprintf(buf, "%#x", KERNEL_ADDRESS);
- setenv("attkernaddr", buf);
+ env_set("attkernaddr", buf);
/* initialize omap tags */
init_omap_tags();
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "dvi");
- setenv("expansionname", "summit");
+ env_set("defaultdisplay", "dvi");
+ env_set("expansionname", "summit");
break;
case GUMSTIX_TOBI:
printf("Recognized Tobi expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "dvi");
- setenv("expansionname", "tobi");
+ env_set("defaultdisplay", "dvi");
+ env_set("expansionname", "tobi");
break;
case GUMSTIX_TOBI_DUO:
printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("expansionname", "tobiduo");
+ env_set("expansionname", "tobiduo");
break;
case GUMSTIX_PALO35:
printf("Recognized Palo35 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd35");
- setenv("expansionname", "palo35");
+ env_set("defaultdisplay", "lcd35");
+ env_set("expansionname", "palo35");
break;
case GUMSTIX_PALO43:
printf("Recognized Palo43 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "palo43");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "palo43");
break;
case GUMSTIX_CHESTNUT43:
printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "chestnut43");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "chestnut43");
break;
case GUMSTIX_PINTO:
printf("Recognized Pinto expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "gallop43");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "gallop43");
break;
case GUMSTIX_ALTO35:
printf("Recognized Alto35 expansion board (rev %d %s)\n",
expansion_config.fab_revision);
MUX_GUMSTIX();
MUX_ALTO35();
- setenv("defaultdisplay", "lcd35");
- setenv("expansionname", "alto35");
+ env_set("defaultdisplay", "lcd35");
+ env_set("expansionname", "alto35");
break;
case GUMSTIX_STAGECOACH:
printf("Recognized Stagecoach expansion board (rev %d %s)\n",
expansion_config.fab_revision);
MUX_GUMSTIX();
MUX_ARBOR43C();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "arbor43c");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "arbor43c");
break;
case ETTUS_USRP_E:
printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
expansion_config.fab_revision);
MUX_GUMSTIX();
MUX_USRP_E();
- setenv("defaultdisplay", "dvi");
+ env_set("defaultdisplay", "dvi");
break;
case GUMSTIX_NO_EEPROM:
case GUMSTIX_EMPTY_EEPROM:
puts("No or empty EEPROM on expansion board\n");
MUX_GUMSTIX();
- setenv("expansionname", "tobi");
+ env_set("expansionname", "tobi");
break;
default:
printf("Unrecognized expansion board 0x%08x\n", expansion_id);
}
if (expansion_config.content == 1)
- setenv(expansion_config.env_var, expansion_config.env_setting);
+ env_set(expansion_config.env_var, expansion_config.env_setting);
omap_die_id_display();
if (get_cpu_family() == CPU_OMAP34XX)
- setenv("boardname", "overo");
+ env_set("boardname", "overo");
else
- setenv("boardname", "overo-storm");
+ env_set("boardname", "overo-storm");
return 0;
}
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
goto try_usbether;
}
--- /dev/null
+if TARGET_PFLA02
+
+config SYS_BOARD
+ default "pfla02"
+
+config SYS_VENDOR
+ default "phytec"
+
+config SYS_CONFIG_NAME
+ default "pfla02"
+
+endif
--- /dev/null
+PHYTEC PHYFLEX
+M: Stefano Babic <sbabic@denx.de>
+S: Maintained
+F: board/phytec/pfla02/
+F: include/configs/pfla02.h
+F: configs/pfla02_defconfig
--- /dev/null
+#
+# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
+#
+# (C) Copyright 2011 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := pfla02.o
--- /dev/null
+Board information
+-----------------
+
+The evaluation board "pbab01" is thought to be used
+together with the SOM.
+
+More information on the board can be found on manufacturer's
+website:
+
+http://www.phytec.de/produkt/system-on-modules/phyflex-imx-6/
+
+Building U-Boot
+-------------------------------
+
+$ make pfla02_defconfig
+$ make
+
+This generates the artifacts SPL and u-boot.img.
+The SOM can boot from NAND or from SD-Card, having the SPI-NOR
+as second option.
+The dip switch "SW3" on the board let choose the boot device.
+
+SW3_1(on), SW3_2(on), SW3_3(off): Boot first from SD, then try SPI
+SW3_1(off), SW3_2(on), SW3_3(off): Boot from SPI
--- /dev/null
+/*
+ * Copyright (C) 2017 Stefano Babic <sbabic@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/mach-imx/spi.h>
+#include <linux/errno.h>
+#include <asm/gpio.h>
+#include <mmc.h>
+#include <i2c.h>
+#include <fsl_esdhc.h>
+#include <nand.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/sections.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
+
+#define ASRC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
+#define NAND_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
+#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(1, 14)
+#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
+#define GREEN_LED IMX_GPIO_NR(2, 31)
+#define RED_LED IMX_GPIO_NR(1, 30)
+#define IMX6Q_DRIVE_STRENGTH 0x30
+
+int dram_init(void)
+{
+ gd->ram_size = imx_ddr_size();
+ return 0;
+}
+
+static iomux_v3_cfg_t const uart4_pads[] = {
+ IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+ IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const enet_pads[] = {
+ IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
+ MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK |
+ MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL |
+ MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const ecspi3_pads[] = {
+ IOMUX_PADS(PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const gpios_pads[] = {
+ IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_DAT4__GPIO2_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_DAT5__GPIO2_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_DAT6__GPIO2_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_DAT7__GPIO2_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_EB3__GPIO2_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+#ifdef CONFIG_CMD_NAND
+/* NAND */
+static iomux_v3_cfg_t const nfc_pads[] = {
+ IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_CS1__NAND_CE1_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_CS2__NAND_CE2_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_CS3__NAND_CE3_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_DAT0__NAND_DQS | MUX_PAD_CTRL(NAND_PAD_CTRL)),
+};
+#endif
+
+static struct i2c_pads_info i2c_pad_info = {
+ .scl = {
+ .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | I2C_PAD,
+ .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | I2C_PAD,
+ .gp = IMX_GPIO_NR(3, 21)
+ },
+ .sda = {
+ .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | I2C_PAD,
+ .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | I2C_PAD,
+ .gp = IMX_GPIO_NR(3, 28)
+ }
+};
+
+static struct fsl_esdhc_cfg usdhc_cfg[] = {
+ {USDHC3_BASE_ADDR,
+ .max_bus_width = 4},
+ {.esdhc_base = USDHC2_BASE_ADDR,
+ .max_bus_width = 4},
+};
+
+#if !defined(CONFIG_SPL_BUILD)
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+ IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+#endif
+
+static iomux_v3_cfg_t const usdhc3_pads[] = {
+ IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
+int board_mmc_get_env_dev(int devno)
+{
+ return devno - 1;
+}
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+ int ret = 0;
+
+ switch (cfg->esdhc_base) {
+ case USDHC2_BASE_ADDR:
+ ret = !gpio_get_value(USDHC2_CD_GPIO);
+ ret = 1;
+ break;
+ case USDHC3_BASE_ADDR:
+ ret = 1;
+ break;
+ }
+
+ return ret;
+}
+
+#ifndef CONFIG_SPL_BUILD
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ int i;
+
+ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+ switch (i) {
+ case 0:
+ SETUP_IOMUX_PADS(usdhc3_pads);
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ break;
+ case 1:
+ SETUP_IOMUX_PADS(usdhc2_pads);
+ gpio_direction_input(USDHC2_CD_GPIO);
+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ break;
+ default:
+ printf("Warning: you configured more USDHC controllers"
+ "(%d) then supported by the board (%d)\n",
+ i + 1, CONFIG_SYS_FSL_USDHC_NUM);
+ return -EINVAL;
+ }
+
+ ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
+static void setup_iomux_uart(void)
+{
+ SETUP_IOMUX_PADS(uart4_pads);
+}
+
+static void setup_iomux_enet(void)
+{
+ SETUP_IOMUX_PADS(enet_pads);
+
+ gpio_direction_output(ENET_PHY_RESET_GPIO, 0);
+ mdelay(10);
+ gpio_set_value(ENET_PHY_RESET_GPIO, 1);
+ mdelay(30);
+}
+
+static void setup_spi(void)
+{
+ gpio_request(IMX_GPIO_NR(4, 24), "spi_cs0");
+ gpio_direction_output(IMX_GPIO_NR(4, 24), 1);
+
+ SETUP_IOMUX_PADS(ecspi3_pads);
+
+ enable_spi_clk(true, 2);
+}
+
+static void setup_gpios(void)
+{
+ SETUP_IOMUX_PADS(gpios_pads);
+}
+
+#ifdef CONFIG_CMD_NAND
+static void setup_gpmi_nand(void)
+{
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ /* config gpmi nand iomux */
+ SETUP_IOMUX_PADS(nfc_pads);
+
+ /* gate ENFC_CLK_ROOT clock first,before clk source switch */
+ clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
+
+ /* config gpmi and bch clock to 100 MHz */
+ clrsetbits_le32(&mxc_ccm->cs2cdr,
+ MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK |
+ MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK |
+ MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK,
+ MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
+ MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
+ MXC_CCM_CS2CDR_ENFC_CLK_SEL(3));
+
+ /* enable ENFC_CLK_ROOT clock */
+ setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
+
+ /* enable gpmi and bch clock gating */
+ setbits_le32(&mxc_ccm->CCGR4,
+ MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
+ MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK |
+ MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK |
+ MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
+ MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET);
+
+ /* enable apbh clock gating */
+ setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
+}
+#endif
+
+/*
+ * Board revision is coded in 4 GPIOs
+ */
+u32 get_board_rev(void)
+{
+ u32 rev;
+ int i;
+
+ for (i = 0, rev = 0; i < 4; i++)
+ rev |= (gpio_get_value(IMX_GPIO_NR(2, 12 + i)) << i);
+
+ return 16 - rev;
+}
+
+int board_spi_cs_gpio(unsigned bus, unsigned cs)
+{
+ if (bus != 2 || (cs != 0))
+ return -EINVAL;
+
+ return IMX_GPIO_NR(4, 24);
+}
+
+int board_eth_init(bd_t *bis)
+{
+ setup_iomux_enet();
+
+ return cpu_eth_init(bis);
+}
+
+int board_early_init_f(void)
+{
+ setup_iomux_uart();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+#ifdef CONFIG_SYS_I2C_MXC
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info);
+#endif
+
+#ifdef CONFIG_MXC_SPI
+ setup_spi();
+#endif
+
+ setup_gpios();
+
+#ifdef CONFIG_CMD_NAND
+ setup_gpmi_nand();
+#endif
+ return 0;
+}
+
+
+#ifdef CONFIG_CMD_BMODE
+/*
+ * BOOT_CFG1, BOOT_CFG2, BOOT_CFG3, BOOT_CFG4
+ * see Table 8-11 and Table 5-9
+ * BOOT_CFG1[7] = 1 (boot from NAND)
+ * BOOT_CFG1[5] = 0 - raw NAND
+ * BOOT_CFG1[4] = 0 - default pad settings
+ * BOOT_CFG1[3:2] = 00 - devices = 1
+ * BOOT_CFG1[1:0] = 00 - Row Address Cycles = 3
+ * BOOT_CFG2[4:3] = 00 - Boot Search Count = 2
+ * BOOT_CFG2[2:1] = 01 - Pages In Block = 64
+ * BOOT_CFG2[0] = 0 - Reset time 12ms
+ */
+static const struct boot_mode board_boot_modes[] = {
+ /* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
+ {"nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00)},
+ {"mmc0", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)},
+ {NULL, 0},
+};
+#endif
+
+int board_late_init(void)
+{
+ char buf[10];
+#ifdef CONFIG_CMD_BMODE
+ add_board_boot_modes(board_boot_modes);
+#endif
+
+ snprintf(buf, sizeof(buf), "%d", get_board_rev());
+ env_set("board_rev", buf);
+
+ return 0;
+}
+
+#ifdef CONFIG_SPL_BUILD
+#include <asm/arch/mx6-ddr.h>
+#include <spl.h>
+#include <libfdt.h>
+
+#define MX6_PHYFLEX_ERR006282 IMX_GPIO_NR(2, 11)
+static void phyflex_err006282_workaround(void)
+{
+ /*
+ * Boards beginning with 1362.2 have the SD4_DAT3 pin connected
+ * to the CMIC. If this pin isn't toggled within 10s the boards
+ * reset. The pin is unconnected on older boards, so we do not
+ * need a check for older boards before applying this fixup.
+ */
+
+ gpio_direction_output(MX6_PHYFLEX_ERR006282, 0);
+ mdelay(2);
+ gpio_direction_output(MX6_PHYFLEX_ERR006282, 1);
+ mdelay(2);
+ gpio_set_value(MX6_PHYFLEX_ERR006282, 0);
+
+ gpio_direction_input(MX6_PHYFLEX_ERR006282);
+}
+
+static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
+ .dram_sdclk_0 = 0x00000030,
+ .dram_sdclk_1 = 0x00000030,
+ .dram_cas = 0x00000030,
+ .dram_ras = 0x00000030,
+ .dram_reset = 0x00000030,
+ .dram_sdcke0 = 0x00003000,
+ .dram_sdcke1 = 0x00003000,
+ .dram_sdba2 = 0x00000030,
+ .dram_sdodt0 = 0x00000030,
+ .dram_sdodt1 = 0x00000030,
+
+ .dram_sdqs0 = 0x00000028,
+ .dram_sdqs1 = 0x00000028,
+ .dram_sdqs2 = 0x00000028,
+ .dram_sdqs3 = 0x00000028,
+ .dram_sdqs4 = 0x00000028,
+ .dram_sdqs5 = 0x00000028,
+ .dram_sdqs6 = 0x00000028,
+ .dram_sdqs7 = 0x00000028,
+ .dram_dqm0 = 0x00000028,
+ .dram_dqm1 = 0x00000028,
+ .dram_dqm2 = 0x00000028,
+ .dram_dqm3 = 0x00000028,
+ .dram_dqm4 = 0x00000028,
+ .dram_dqm5 = 0x00000028,
+ .dram_dqm6 = 0x00000028,
+ .dram_dqm7 = 0x00000028,
+};
+
+static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
+ .grp_ddr_type = 0x000C0000,
+ .grp_ddrmode_ctl = 0x00020000,
+ .grp_ddrpke = 0x00000000,
+ .grp_addds = IMX6Q_DRIVE_STRENGTH,
+ .grp_ctlds = IMX6Q_DRIVE_STRENGTH,
+ .grp_ddrmode = 0x00020000,
+ .grp_b0ds = 0x00000028,
+ .grp_b1ds = 0x00000028,
+ .grp_b2ds = 0x00000028,
+ .grp_b3ds = 0x00000028,
+ .grp_b4ds = 0x00000028,
+ .grp_b5ds = 0x00000028,
+ .grp_b6ds = 0x00000028,
+ .grp_b7ds = 0x00000028,
+};
+
+static const struct mx6_mmdc_calibration mx6_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x00110011,
+ .p0_mpwldectrl1 = 0x00240024,
+ .p1_mpwldectrl0 = 0x00260038,
+ .p1_mpwldectrl1 = 0x002C0038,
+ .p0_mpdgctrl0 = 0x03400350,
+ .p0_mpdgctrl1 = 0x03440340,
+ .p1_mpdgctrl0 = 0x034C0354,
+ .p1_mpdgctrl1 = 0x035C033C,
+ .p0_mprddlctl = 0x322A2A2A,
+ .p1_mprddlctl = 0x302C2834,
+ .p0_mpwrdlctl = 0x34303834,
+ .p1_mpwrdlctl = 0x422A3E36,
+};
+
+/* Index in RAM Chip array */
+enum {
+ RAM_1GB,
+ RAM_2GB,
+ RAM_4GB
+};
+
+static struct mx6_ddr3_cfg mt41k_xx[] = {
+/* MT41K64M16JT-125 (1Gb density) */
+ {
+ .mem_speed = 1600,
+ .density = 1,
+ .width = 16,
+ .banks = 8,
+ .rowaddr = 13,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1375,
+ .trcmin = 4875,
+ .trasmin = 3500,
+ .SRT = 1,
+ },
+
+/* MT41K256M16JT-125 (2Gb density) */
+ {
+ .mem_speed = 1600,
+ .density = 2,
+ .width = 16,
+ .banks = 8,
+ .rowaddr = 14,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1375,
+ .trcmin = 4875,
+ .trasmin = 3500,
+ .SRT = 1,
+ },
+
+/* MT41K256M16JT-125 (4Gb density) */
+ {
+ .mem_speed = 1600,
+ .density = 4,
+ .width = 16,
+ .banks = 8,
+ .rowaddr = 15,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1375,
+ .trcmin = 4875,
+ .trasmin = 3500,
+ .SRT = 1,
+ }
+};
+
+static void ccgr_init(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ writel(0x00C03F3F, &ccm->CCGR0);
+ writel(0x0030FC03, &ccm->CCGR1);
+ writel(0x0FFFC000, &ccm->CCGR2);
+ writel(0x3FF00000, &ccm->CCGR3);
+ writel(0x00FFF300, &ccm->CCGR4);
+ writel(0x0F0000C3, &ccm->CCGR5);
+ writel(0x000003FF, &ccm->CCGR6);
+}
+
+static void gpr_init(void)
+{
+ struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+ /* enable AXI cache for VDOA/VPU/IPU */
+ writel(0xF00000CF, &iomux->gpr[4]);
+ /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+ writel(0x007F007F, &iomux->gpr[6]);
+ writel(0x007F007F, &iomux->gpr[7]);
+}
+
+static void spl_dram_init(struct mx6_ddr3_cfg *mem_ddr)
+{
+ struct mx6_ddr_sysinfo sysinfo = {
+ /* width of data bus:0=16,1=32,2=64 */
+ .dsize = 2,
+ /* config for full 4GB range so that get_mem_size() works */
+ .cs_density = 32, /* 32Gb per CS */
+ /* single chip select */
+ .ncs = 2,
+ .cs1_mirror = 0,
+ .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */
+ .rtt_nom = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Nom = RZQ/4 */
+ .walat = 1, /* Write additional latency */
+ .ralat = 5, /* Read additional latency */
+ .mif3_mode = 3, /* Command prediction working mode */
+ .bi_on = 1, /* Bank interleaving enabled */
+ .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
+ .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
+ .ddr_type = DDR_TYPE_DDR3,
+ .refsel = 1, /* Refresh cycles at 32KHz */
+ .refr = 7, /* 8 refresh commands per refresh cycle */
+ };
+
+ mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs);
+ mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, mem_ddr);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ if (spl_boot_device() == BOOT_DEVICE_SPI)
+ printf("MMC SEtup, Boot SPI");
+
+ SETUP_IOMUX_PADS(usdhc3_pads);
+ usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+ gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
+
+ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+}
+
+
+void board_boot_order(u32 *spl_boot_list)
+{
+ spl_boot_list[0] = spl_boot_device();
+ printf("Boot device %x\n", spl_boot_list[0]);
+ switch (spl_boot_list[0]) {
+ case BOOT_DEVICE_SPI:
+ spl_boot_list[1] = BOOT_DEVICE_UART;
+ break;
+ case BOOT_DEVICE_MMC1:
+ spl_boot_list[1] = BOOT_DEVICE_SPI;
+ spl_boot_list[2] = BOOT_DEVICE_UART;
+ break;
+ default:
+ printf("Boot device %x\n", spl_boot_list[0]);
+ }
+}
+
+/*
+ * This is used because get_ram_size() does not
+ * take care of cache, resulting a wrong size
+ * pfla02 has just 1, 2 or 4 GB option
+ * Function checks for mirrors in the first CS
+ */
+#define RAM_TEST_PATTERN 0xaa5555aa
+static unsigned int pfla02_detect_ramsize(void)
+{
+ u32 *p, *p1;
+ unsigned int offset = 512 * 1024 * 1024;
+ int i;
+
+ for (i = 0; i < 2; i++) {
+ p = (u32 *)PHYS_SDRAM;
+ p1 = (u32 *)(PHYS_SDRAM + (i + 1) * offset);
+
+ *p1 = 0;
+ *p = RAM_TEST_PATTERN;
+
+ /*
+ * This is required to detect mirroring
+ * else we read back values from cache
+ */
+ flush_dcache_all();
+
+ if (*p == *p1)
+ return i;
+ }
+ return RAM_4GB;
+}
+
+void board_init_f(ulong dummy)
+{
+ unsigned int ramchip;
+#ifdef CONFIG_CMD_NAND
+ /* Enable NAND */
+ setup_gpmi_nand();
+#endif
+
+ /* setup clock gating */
+ ccgr_init();
+
+ /* setup AIPS and disable watchdog */
+ arch_cpu_init();
+
+ /* setup AXI */
+ gpr_init();
+
+ board_early_init_f();
+
+ /* setup GP timer */
+ timer_init();
+
+ /* UART clocks enabled and gd valid - init serial console */
+ preloader_console_init();
+
+ setup_spi();
+
+ setup_gpios();
+
+ /* DDR initialization */
+ spl_dram_init(&mt41k_xx[RAM_4GB]);
+ ramchip = pfla02_detect_ramsize();
+ if (ramchip != RAM_4GB)
+ spl_dram_init(&mt41k_xx[ramchip]);
+
+ /* Clear the BSS. */
+ memset(__bss_start, 0, __bss_end - __bss_start);
+
+ phyflex_err006282_workaround();
+
+ /* load/boot image from boot device */
+ board_init_r(NULL, 0);
+}
+#endif
}
if (dm_gpio_get_value(&resin)) {
- setenv("bootdelay", "-1");
+ env_set("bootdelay", "-1");
printf("Power button pressed - dropping to console.\n");
}
{
const char *fdtfile;
- if (getenv("fdtfile"))
+ if (env_get("fdtfile"))
return;
fdtfile = model->fdtfile;
- setenv("fdtfile", fdtfile);
+ env_set("fdtfile", fdtfile);
}
/*
*/
static void set_fdt_addr(void)
{
- if (getenv("fdt_addr"))
+ if (env_get("fdt_addr"))
return;
if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC)
return;
- setenv_hex("fdt_addr", fw_dtb_pointer);
+ env_set_hex("fdt_addr", fw_dtb_pointer);
}
/*
if (!model->has_onboard_eth)
return;
- if (getenv("usbethaddr"))
+ if (env_get("usbethaddr"))
return;
BCM2835_MBOX_INIT_HDR(msg);
return;
}
- eth_setenv_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac);
+ eth_env_set_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac);
- if (!getenv("ethaddr"))
- setenv("ethaddr", getenv("usbethaddr"));
+ if (!env_get("ethaddr"))
+ env_set("ethaddr", env_get("usbethaddr"));
return;
}
char s[11];
snprintf(s, sizeof(s), "0x%X", revision);
- setenv("board_revision", s);
+ env_set("board_revision", s);
snprintf(s, sizeof(s), "%d", rev_scheme);
- setenv("board_rev_scheme", s);
+ env_set("board_rev_scheme", s);
/* Can't rename this to board_rev_type since it's an ABI for scripts */
snprintf(s, sizeof(s), "0x%X", rev_type);
- setenv("board_rev", s);
- setenv("board_name", model->name);
+ env_set("board_rev", s);
+ env_set("board_name", model->name);
}
#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */
int ret;
char serial_string[17] = { 0 };
- if (getenv("serial#"))
+ if (env_get("serial#"))
return;
BCM2835_MBOX_INIT_HDR(msg);
snprintf(serial_string, sizeof(serial_string), "%016" PRIx64,
msg->get_board_serial.body.resp.serial);
- setenv("serial#", serial_string);
+ env_set("serial#", serial_string);
}
int misc_init_r(void)
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+ if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
dev = eth_get_dev_by_index(0);
if (dev) {
- eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+ eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
} else {
printf("blanche: Couldn't get eth device\n");
rc = -1;
/* Set MAC address */
sprintf(env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
- setenv("ethaddr", env_mac);
+ env_set("ethaddr", env_mac);
debug_led(0x0F);
#ifdef CONFIG_SH_ETHER
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
for (i = 0; i < SH7752EVB_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i, mac_string, buf);
if (i == 0)
- setenv("ethaddr", mac_string);
+ env_set("ethaddr", mac_string);
else {
sprintf(env_string, "eth%daddr", i);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
}
set_mac_to_sh_giga_eth_register(i, mac_string);
}
for (i = 0; i < SH7753EVB_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i, mac_string, buf);
if (i == 0)
- setenv("ethaddr", mac_string);
+ env_set("ethaddr", mac_string);
else {
sprintf(env_string, "eth%daddr", i);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
}
set_mac_to_sh_giga_eth_register(i, mac_string);
}
for (i = 0; i < SH7757LCR_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i, mac_string, buf);
if (i == 0)
- setenv("ethaddr", mac_string);
+ env_set("ethaddr", mac_string);
else {
sprintf(env_string, "eth%daddr", i);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
}
set_mac_to_sh_eth_register(i, mac_string);
for (i = 0; i < SH7757LCR_GIGA_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i + SH7757LCR_ETHERNET_NUM_CH, mac_string, buf);
sprintf(env_string, "eth%daddr", i + SH7757LCR_ETHERNET_NUM_CH);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
set_mac_to_sh_giga_eth_register(i, mac_string);
}
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
-#include <fdtdec.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int mach_cpu_init(void)
-{
- struct rk3368_pmu_grf *pmugrf;
- int node;
-
- node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rk3368-pmugrf");
- pmugrf = (struct rk3368_pmu_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
-
- rk_clrsetreg(&pmugrf->gpio0d_iomux,
- GPIO0D0_MASK | GPIO0D1_MASK |
- GPIO0D2_MASK | GPIO0D3_MASK,
- GPIO0D0_GPIO << GPIO0D0_SHIFT |
- GPIO0D1_GPIO << GPIO0D1_SHIFT |
- GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
- GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
- return 0;
-}
int board_init(void)
{
{
if (fastboot_key_pressed()) {
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
}
return 0;
return 0;
if (is_valid_ethaddr(ethaddr))
- eth_setenv_enetaddr("ethaddr", ethaddr);
+ eth_env_set_enetaddr("ethaddr", ethaddr);
return 0;
}
if (board_is_odroidxu4())
return info;
- return getenv("dfu_alt_system");
+ return env_get("dfu_alt_system");
}
char *get_dfu_alt_boot(char *interface, char *devstr)
alt_setting = get_dfu_alt_boot(interface, devstr);
if (alt_setting) {
- setenv("dfu_alt_boot", alt_setting);
+ env_set("dfu_alt_boot", alt_setting);
offset = snprintf(buf, buf_size, "%s", alt_setting);
}
status = "done\n";
}
- setenv("dfu_alt_info", alt_info);
+ env_set("dfu_alt_info", alt_info);
puts(status);
}
#endif
snprintf(info, ARRAY_SIZE(info), "%u.%u", (s5p_cpu_rev & 0xf0) >> 4,
s5p_cpu_rev & 0xf);
- setenv("soc_rev", info);
+ env_set("soc_rev", info);
snprintf(info, ARRAY_SIZE(info), "%x", s5p_cpu_id);
- setenv("soc_id", info);
+ env_set("soc_id", info);
#ifdef CONFIG_REVISION_TAG
snprintf(info, ARRAY_SIZE(info), "%x", get_board_rev());
- setenv("board_rev", info);
+ env_set("board_rev", info);
#endif
#ifdef CONFIG_OF_LIBFDT
const char *bdtype = "";
bdtype = "";
sprintf(info, "%s%s", bdname, bdtype);
- setenv("boardname", info);
+ env_set("boardname", info);
#endif
snprintf(info, ARRAY_SIZE(info), "%s%x-%s%s.dtb",
CONFIG_SYS_SOC, s5p_cpu_id, bdname, bdtype);
- setenv("fdtfile", info);
+ env_set("fdtfile", info);
#endif
}
#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */
#ifdef CONFIG_SET_DFU_ALT_INFO
char *get_dfu_alt_system(char *interface, char *devstr)
{
- return getenv("dfu_alt_system");
+ return env_get("dfu_alt_system");
}
char *get_dfu_alt_boot(char *interface, char *devstr)
#endif
#ifdef CONFIG_S6E8AX0
s6e8ax0_init();
- setenv("lcdinfo", "lcd=s6e8ax0");
+ env_set("lcdinfo", "lcd=s6e8ax0");
#endif
}
#endif
vid->pclk_name = 1; /* MPLL */
vid->sclk_div = 1;
- setenv("lcdinfo", "lcd=ld9040");
+ env_set("lcdinfo", "lcd=ld9040");
}
#endif
/* just to get secound mac address */
imx_get_mac_from_fuse(1, eth1addr);
- if (!getenv("eth1addr") && is_valid_ethaddr(eth1addr))
- eth_setenv_enetaddr("eth1addr", eth1addr);
+ if (!env_get("eth1addr") && is_valid_ethaddr(eth1addr))
+ eth_env_set_enetaddr("eth1addr", eth1addr);
imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
return ret;
if (val >= VAL_UPPER)
- setenv("pin_state", "connected");
+ env_set("pin_state", "connected");
else if (val < VAL_UPPER && val > VAL_LOWER)
- setenv("pin_state", "open");
+ env_set("pin_state", "open");
else
- setenv("pin_state", "button");
+ env_set("pin_state", "button");
return ret;
}
/* Check EEPROM signature. */
if (!(data[0] == 0xa5 && data[1] == 0x5a)) {
puts("Invalid I2C EEPROM signature.\n");
- setenv("unit_serial", "invalid");
- setenv("unit_ident", "VINing-xxxx-STD");
- setenv("hostname", "vining-invalid");
+ env_set("unit_serial", "invalid");
+ env_set("unit_ident", "VINing-xxxx-STD");
+ env_set("hostname", "vining-invalid");
return 0;
}
/* If 'unit_serial' is already set, do nothing. */
- if (!getenv("unit_serial")) {
+ if (!env_get("unit_serial")) {
/* This field is Big Endian ! */
serial = (data[0x54] << 24) | (data[0x55] << 16) |
(data[0x56] << 8) | (data[0x57] << 0);
memset(str, 0, sizeof(str));
sprintf(str, "%07i", serial);
- setenv("unit_serial", str);
+ env_set("unit_serial", str);
}
- if (!getenv("unit_ident")) {
+ if (!env_get("unit_ident")) {
memset(str, 0, sizeof(str));
memcpy(str, &data[0x2e], 18);
- setenv("unit_ident", str);
+ env_set("unit_ident", str);
}
/* Set ethernet address from EEPROM. */
- if (!getenv("ethaddr") && is_valid_ethaddr(&data[0x62]))
- eth_setenv_enetaddr("ethaddr", &data[0x62]);
+ if (!env_get("ethaddr") && is_valid_ethaddr(&data[0x62]))
+ eth_env_set_enetaddr("ethaddr", &data[0x62]);
return 0;
}
char *ptr_env;
/* If button is not found we take default */
- ptr_env = getenv(envname);
+ ptr_env = env_get(envname);
if (NULL == ptr_env) {
gpio = def;
} else {
strcat(str_tmp, num);
/* If env var is not found we stop */
- ptr_env = getenv(str_tmp);
+ ptr_env = env_get(str_tmp);
if (NULL == ptr_env)
break;
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-static int factoryset_mac_setenv(void)
+static int factoryset_mac_env_set(void)
{
uint8_t mac_addr[6];
}
}
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
return 0;
}
-int factoryset_setenv(void)
+int factoryset_env_set(void)
{
int ret = 0;
- if (factoryset_mac_setenv() < 0)
+ if (factoryset_mac_env_set() < 0)
ret = -1;
return ret;
};
int factoryset_read_eeprom(int i2c_addr);
-int factoryset_setenv(void);
+int factoryset_env_set(void);
extern struct factorysetcontainer factory_dat;
#endif /* __FACTORYSET_H */
#ifdef CONFIG_FACTORYSET
/* Set ASN in environment*/
if (factory_dat.asn[0] != 0) {
- setenv("dtb_name", (char *)factory_dat.asn);
+ env_set("dtb_name", (char *)factory_dat.asn);
} else {
/* dtb suffix gets added in load script */
- setenv("dtb_name", "am335x-draco");
+ env_set("dtb_name", "am335x-draco");
}
#else
- setenv("dtb_name", "am335x-draco");
+ env_set("dtb_name", "am335x-draco");
#endif
return 0;
int n = 0;
int rv;
- factoryset_setenv();
+ factoryset_env_set();
/* Set rgmii mode and enable rmii clock to be sourced from chip */
writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel);
if (!is_valid_ethaddr(factory_dat.mac))
printf("Error: no valid mac address\n");
else
- eth_setenv_enetaddr("ethaddr", factory_dat.mac);
+ eth_env_set_enetaddr("ethaddr", factory_dat.mac);
#endif /* #ifdef CONFIG_FACTORYSET */
/* Set rgmii mode and enable rmii clock to be sourced from chip */
factory_dat.pxm50 = 0;
sprintf(tmp, "%s_%s", factory_dat.asn,
factory_dat.comp_version);
- ret = setenv("boardid", tmp);
+ ret = env_set("boardid", tmp);
if (ret)
printf("error setting board id\n");
} else {
factory_dat.pxm50 = 1;
- ret = setenv("boardid", "PXM50_1.0");
+ ret = env_set("boardid", "PXM50_1.0");
if (ret)
printf("error setting board id\n");
}
int rv;
#ifndef CONFIG_SPL_BUILD
- factoryset_setenv();
+ factoryset_env_set();
#endif
/* Set rgmii mode and enable rmii clock to be sourced from chip */
else
strcpy(tmp, "QMX7.E38_4.0");
- ret = setenv("boardid", tmp);
+ ret = env_set("boardid", tmp);
if (ret)
printf("error setting board id\n");
#include <command.h>
#include <common.h>
#include <dm.h>
+#include <environment.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
char *kern_size;
char *kern_size_fb;
- partitionset_active = getenv("partitionset_active");
+ partitionset_active = env_get("partitionset_active");
if (partitionset_active) {
if (partitionset_active[0] == 'A')
- setenv("partitionset_active", "B");
+ env_set("partitionset_active", "B");
else
- setenv("partitionset_active", "A");
+ env_set("partitionset_active", "A");
} else {
printf("partitionset_active missing.\n");
return -ENOENT;
}
- rootfs = getenv("rootfs");
- rootfs_fallback = getenv("rootfs_fallback");
- setenv("rootfs", rootfs_fallback);
- setenv("rootfs_fallback", rootfs);
+ rootfs = env_get("rootfs");
+ rootfs_fallback = env_get("rootfs_fallback");
+ env_set("rootfs", rootfs_fallback);
+ env_set("rootfs_fallback", rootfs);
- kern_size = getenv("kernel_size");
- kern_size_fb = getenv("kernel_size_fallback");
- setenv("kernel_size", kern_size_fb);
- setenv("kernel_size_fallback", kern_size);
+ kern_size = env_get("kernel_size");
+ kern_size_fb = env_get("kernel_size_fallback");
+ env_set("kernel_size", kern_size_fb);
+ env_set("kernel_size_fallback", kern_size);
- kern_off = getenv("kernel_Off");
- kern_off_fb = getenv("kernel_Off_fallback");
- setenv("kernel_Off", kern_off_fb);
- setenv("kernel_Off_fallback", kern_off);
+ kern_off = env_get("kernel_Off");
+ kern_off_fb = env_get("kernel_Off_fallback");
+ env_set("kernel_Off", kern_off_fb);
+ env_set("kernel_Off_fallback", kern_off);
- setenv("bootargs", '\0');
- setenv("upgrade_available", '\0');
- setenv("boot_retries", '\0');
- saveenv();
+ env_set("bootargs", '\0');
+ env_set("upgrade_available", '\0');
+ env_set("boot_retries", '\0');
+ env_save();
return 0;
}
unsigned long boot_retry = 0;
char boot_buf[10];
- upgrade_available = simple_strtoul(getenv("upgrade_available"), NULL,
+ upgrade_available = simple_strtoul(env_get("upgrade_available"), NULL,
10);
if (upgrade_available) {
- boot_retry = simple_strtoul(getenv("boot_retries"), NULL, 10);
+ boot_retry = simple_strtoul(env_get("boot_retries"), NULL, 10);
boot_retry++;
sprintf(boot_buf, "%lx", boot_retry);
- setenv("boot_retries", boot_buf);
- saveenv();
+ env_set("boot_retries", boot_buf);
+ env_save();
/*
* Here the boot_retries count is checked, and if the
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
return n;
}
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
char buf[64];
int f;
- int i = getenv_f("serial#", buf, sizeof(buf));
+ int i = env_get_f("serial#", buf, sizeof(buf));
#ifdef CONFIG_PCI
char *src;
#endif
printf ("hwmon IC init failed\n");
if (flag) {
- param = getenv("brightness");
+ param = env_get("brightness");
rc = param ? simple_strtol(param, NULL, 10) : -1;
if (rc < 0)
rc = DEFAULT_BRIGHTNESS;
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_hummingboard())
- setenv("board_name", "HUMMINGBOARD");
+ env_set("board_name", "HUMMINGBOARD");
else
- setenv("board_name", "CUBOXI");
+ env_set("board_name", "CUBOXI");
if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
#if defined(CONFIG_CMD_NET)
uchar mac_id[6];
- if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
- eth_setenv_enetaddr("ethaddr", mac_id);
+ if (!eth_env_get_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
+ eth_env_set_enetaddr("ethaddr", mac_id);
#endif
- setenv("verify", "n");
+ env_set("verify", "n");
#if defined(CONFIG_SPEAR_USBTTY)
- setenv("stdin", "usbtty");
- setenv("stdout", "usbtty");
- setenv("stderr", "usbtty");
+ env_set("stdin", "usbtty");
+ env_set("stdout", "usbtty");
+ env_set("stderr", "usbtty");
#ifndef CONFIG_SYS_NO_DCACHE
dcache_enable();
if TARGET_X600
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
+
config SYS_BOARD
default "x600"
char serialno[25];
uint32_t u_id_low, u_id_mid, u_id_high;
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
u_id_low = readl(&STM32_U_ID->u_id_low);
u_id_mid = readl(&STM32_U_ID->u_id_mid);
u_id_high = readl(&STM32_U_ID->u_id_high);
sprintf(serialno, "%08x%08x%08x",
u_id_high, u_id_mid, u_id_low);
- setenv("serial#", serialno);
+ env_set("serial#", serialno);
}
return 0;
S: Maintained
F: configs/A20-OLinuXino-Lime2_defconfig
+A20-OLINUXINO-LIME2-EMMC BOARD
+M: Olliver Schinagl <oliver@schinagl.nl>
+S: Maintained
+F: configs/A20-OLinuXino-Lime2-eMMC_defconfig
+
A33-OLINUXINO BOARD
M: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
S: Maintained
F: configs/A33-OLinuXino_defconfig
+A64-OLINUXINO BOARD
+M: Jagan Teki <jagan@amarulasolutions.com>
+S: Maintained
+F: configs/a64-olinuxino_defconfig
+
A80 OPTIMUS BOARD
M: Chen-Yu Tsai <wens@csie.org>
S: Maintained
S: Maintained
F: configs/nanopi_neo_air_defconfig
+NANOPI-A64 BOARD
+M: Jagan Teki <jagan@amarulasolutions.com>
+S: Maintained
+F: configs/nanopi_a64_defconfig
+
NINTENDO NES CLASSIC EDITION BOARD
M: FUKAUMI Naoki <naobsd@gmail.com>
S: Maintained
char *serial_string;
unsigned long long serial;
- serial_string = getenv("serial#");
+ serial_string = env_get("serial#");
if (serial_string) {
serial = simple_strtoull(serial_string, NULL, 16);
return;
}
/* otherwise assume .scr format (mkimage-type script) */
- setenv_hex("fel_scriptaddr", spl->fel_script_address);
+ env_set_hex("fel_scriptaddr", spl->fel_script_address);
}
/*
else
sprintf(ethaddr, "eth%daddr", i);
- if (getenv(ethaddr))
+ if (env_get(ethaddr))
continue;
/* Non OUI / registered MAC address */
mac_addr[4] = (sid[3] >> 8) & 0xff;
mac_addr[5] = (sid[3] >> 0) & 0xff;
- eth_setenv_enetaddr(ethaddr, mac_addr);
+ eth_env_set_enetaddr(ethaddr, mac_addr);
}
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
snprintf(serial_string, sizeof(serial_string),
"%08x%08x", sid[0], sid[3]);
- setenv("serial#", serial_string);
+ env_set("serial#", serial_string);
}
}
}
{
__maybe_unused int ret;
- setenv("fel_booted", NULL);
- setenv("fel_scriptaddr", NULL);
+ env_set("fel_booted", NULL);
+ env_set("fel_scriptaddr", NULL);
/* determine if we are running in FEL mode */
if (!is_boot0_magic(SPL_ADDR + 4)) { /* eGON.BT0 */
- setenv("fel_booted", "1");
+ env_set("fel_booted", "1");
parse_spl_header(SPL_ADDR);
}
--- /dev/null
+if TARGET_STMARK2
+
+config SYS_CPU
+ default "mcf5445x"
+
+config SYS_BOARD
+ default "stmark2"
+
+config SYS_VENDOR
+ default "sysam"
+
+config SYS_CONFIG_NAME
+ default "stmark2"
+
+endif
--- /dev/null
+STMARK2 BOARD
+M: Angelo Dureghello <angelo@sysam.it>
+S: Maintained
+F: board/sysam/stmark2/
+F: include/configs/stmark2.h
+F: configs/stmark2_defconfig
--- /dev/null
+#
+# (C) Copyright 2014 Angelo Dureghello <angelo@sysam.it>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = stmark2.o
+extra-y += sbf_dram_init.o
--- /dev/null
+/*
+ * Board-specific early ddr/sdram init.
+ *
+ * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.equ PPMCR0, 0xfc04002d
+.equ MSCR_SDRAMC, 0xec094060
+.equ MISCCR2, 0xec09001a
+.equ DDR_RCR, 0xfc0b8180
+.equ DDR_PADCR, 0xfc0b81ac
+.equ DDR_CR00, 0xfc0b8000
+.equ DDR_CR06, 0xfc0b8018
+.equ DDR_CR09, 0xfc0b8024
+.equ DDR_CR40, 0xfc0b80a0
+.equ DDR_CR45, 0xfc0b80b4
+.equ DDR_CR56, 0xfc0b80e0
+
+.global sbf_dram_init
+.text
+
+sbf_dram_init:
+ /* CD46 = DDR on */
+ move.l #PPMCR0, %a1
+ move.b #46, (%a1)
+
+ /* stmark 2, max drive strength */
+ move.l #MSCR_SDRAMC, %a1
+ move.b #1, (%a1)
+
+ /*
+ * use cpu clock, seems more realiable
+ *
+ * DDR2 clock is serviced from DDR controller as input clock / 2
+ * so, if clock comes from
+ * vco, i.e. 480(vco) / 2, so ddr clock is 240 Mhz (measured)
+ * cpu, i.e. 250(cpu) / 2, so ddr clock is 125 Mhz (measured)
+ *
+ * .
+ * / \ DDR2 can't be clocked lower than 125Mhz
+ * / ! \ DDR2 init must pass further i/dcache enable test
+ * /_____\
+ * WARNING
+ */
+
+ /* cpu / 2 = 125 Mhz for 480 Mhz pll */
+ move.l #MISCCR2, %a1
+ move.w #0xa01d, (%a1)
+
+ /* DDR force sw reset settings */
+ move.l #DDR_RCR, %a1
+ move.l #0x00000000, (%a1)
+ move.l #0x40000000, (%a1)
+
+ /*
+ * PAD_ODT_CS: for us seems both 1(75 ohm) and 2(150ohm) are good,
+ * 500/700 mV are ok
+ */
+ move.l #DDR_PADCR, %a1
+ move.l #0x01030203, (%a1) /* as freescale tower */
+
+ move.l #DDR_CR00, %a1
+ move.l #0x01010101, (%a1)+ /* 0x00 */
+ move.l #0x00000101, (%a1)+ /* 0x04 */
+ move.l #0x01010100, (%a1)+ /* 0x08 */
+ move.l #0x01010000, (%a1)+ /* 0x0C */
+ move.l #0x00010101, (%a1)+ /* 0x10 */
+ move.l #DDR_CR06, %a1
+ move.l #0x00010100, (%a1)+ /* 0x18 */
+ move.l #0x00000001, (%a1)+ /* 0x1C */
+ move.l #0x01000001, (%a1)+ /* 0x20 */
+ move.l #0x00000100, (%a1)+ /* 0x24 */
+ move.l #0x00010001, (%a1)+ /* 0x28 */
+ move.l #0x00000200, (%a1)+ /* 0x2C */
+ move.l #0x01000002, (%a1)+ /* 0x30 */
+ move.l #0x00000000, (%a1)+ /* 0x34 */
+ move.l #0x00000100, (%a1)+ /* 0x38 */
+ move.l #0x02000100, (%a1)+ /* 0x3C */
+ move.l #0x02000407, (%a1)+ /* 0x40 */
+ move.l #0x02030007, (%a1)+ /* 0x44 */
+ move.l #0x02000100, (%a1)+ /* 0x48 */
+ move.l #0x0A030203, (%a1)+ /* 0x4C */
+ move.l #0x00020708, (%a1)+ /* 0x50 */
+ move.l #0x00050008, (%a1)+ /* 0x54 */
+ move.l #0x04030002, (%a1)+ /* 0x58 */
+ move.l #0x00000004, (%a1)+ /* 0x5C */
+ move.l #0x020A0000, (%a1)+ /* 0x60 */
+ move.l #0x0C00000E, (%a1)+ /* 0x64 */
+ move.l #0x00002004, (%a1)+ /* 0x68 */
+ move.l #0x00000000, (%a1)+ /* 0x6C */
+ move.l #0x00100010, (%a1)+ /* 0x70 */
+ move.l #0x00100010, (%a1)+ /* 0x74 */
+ move.l #0x00000000, (%a1)+ /* 0x78 */
+ move.l #0x07990000, (%a1)+ /* 0x7C */
+ move.l #DDR_CR40, %a1
+ move.l #0x00000000, (%a1)+ /* 0xA0 */
+ move.l #0x00C80064, (%a1)+ /* 0xA4 */
+ move.l #0x44520002, (%a1)+ /* 0xA8 */
+ move.l #0x00C80023, (%a1)+ /* 0xAC */
+ move.l #DDR_CR45, %a1
+ move.l #0x0000C350, (%a1) /* 0xB4 */
+ move.l #DDR_CR56, %a1
+ move.l #0x04000000, (%a1)+ /* 0xE0 */
+ move.l #0x03000304, (%a1)+ /* 0xE4 */
+ move.l #0x40040000, (%a1)+ /* 0xE8 */
+ move.l #0xC0004004, (%a1)+ /* 0xEC */
+ move.l #0x0642C000, (%a1)+ /* 0xF0 */
+ move.l #0x00000642, (%a1)+ /* 0xF4 */
+ move.l #DDR_CR09, %a1
+ tpf
+ move.l #0x01000100, (%a1) /* 0x24 */
+
+ move.l #0x2000, %d1
+ bsr asm_delay
+
+
+ rts
--- /dev/null
+/*
+ * Board-specific init.
+ *
+ * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spi.h>
+#include <asm/io.h>
+#include <asm/immap.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ /*
+ * need to to:
+ * Check serial flash size. if 2mb evb, else 8mb demo
+ */
+ puts("Board: ");
+ puts("Sysam stmark2\n");
+ return 0;
+}
+
+int dram_init(void)
+{
+ u32 dramsize;
+
+ /*
+ * Serial Boot: The dram is already initialized in start.S
+ * only require to return DRAM size
+ */
+ dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+
+ gd->ram_size = dramsize;
+
+ return 0;
+}
+
+int testdram(void)
+{
+ return 0;
+}
udelay(5000);
#endif
- e = getenv("gs_base_board");
+ e = env_get("gs_base_board");
if (e != NULL) {
if (strcmp(e, "G283") == 0) {
int key = gpio_get_value(IMX_GPIO_NR(2, 29));
gpio_set_value(IMX_GPIO_NR(1, 29), 0);
gpio_set_value(IMX_GPIO_NR(4, 21), 0);
- setenv("preboot", "run gs_slow_boot");
+ env_set("preboot", "run gs_slow_boot");
} else
- setenv("preboot", "run gs_fast_boot");
+ env_set("preboot", "run gs_fast_boot");
}
}
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
if (is_valid_ether_addr(mac_addr))
- eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+ eth_env_set_enetaddr("usbnet_devaddr", mac_addr);
rv = usb_eth_initialize(bis);
if (rv < 0)
omap_die_id_display();
- eth_addr = getenv("ethaddr");
+ eth_addr = env_get("ethaddr");
if (eth_addr)
return 0;
ethaddr[i] = (reg_mac[i / 4] >> ((i % 4) * 8)) & 0xFF;
if (is_valid_ethaddr(ethaddr)) {
- eth_setenv_enetaddr("ethaddr", ethaddr);
+ eth_env_set_enetaddr("ethaddr", ethaddr);
return 0;
}
if (ret)
return 0;
- eth_addr = getenv("ethaddr");
+ eth_addr = env_get("ethaddr");
if (!eth_addr)
TAM3517_READ_MAC_FROM_EEPROM(&info);
fb = (void *)0x88000000;
- s = getenv("panel");
+ s = env_get("panel");
if (s) {
index = simple_strtoul(s, NULL, 10);
if (index < ARRAY_SIZE(lcd_cfg))
--- /dev/null
+if TARGET_LION_RK3368
+
+config SYS_BOARD
+ default "lion_rk3368"
+
+config SYS_VENDOR
+ default "theobroma-systems"
+
+config SYS_CONFIG_NAME
+ default "lion_rk3368"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
--- /dev/null
+LION-RK3368 (RK3368-uQ7 system-on-module)
+M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+M: Klaus Goger <klaus.goger@theobroma-systems.com>
+S: Maintained
+F: board/theobroma-systems/lion_rk3368
+F: include/configs/lion_rk3368.h
+F: arch/arm/dts/rk3368-lion.dts
+F: configs/lion-rk3368_defconfig
+W: https://www.theobroma-systems.com/rk3368-uq7/tech-specs
+T: git git://git.theobroma-systems.com/lion-u-boot.git
--- /dev/null
+#
+# Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += lion_rk3368.o
--- /dev/null
+Here is the step-by-step to boot to U-Boot on RK3368-uQ7
+
+Get the Source and build ATF
+============================
+
+ > git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
+ > cd arm-trusted-firmware
+ > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3368 bl31
+ > cp build/rk3368/release/bl31.bin ../u-boot/bl31-rk3368.bin
+
+Configure U-Boot
+================
+
+ > cd ../u-boot
+ > make lion-rk3368_defconfig
+
+Build the TPL/SPL stage
+=======================
+
+ > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm
+ > tools/mkimage -n rk3368 -T rksd -d tpl/u-boot-tpl.bin spl-3368.img
+ > cat spl/u-boot-spl-dtb.bin >> spl-3368.img
+
+Build the full U-Boot and a FIT image including the ATF
+=======================================================
+
+ > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb
+
+Write to a SD-card
+==================
+
+ > dd if=spl-3368.img of=/dev/sdb seek=64
+ > dd if=u-boot.itb of=/dev/sdb seek=512
+
+
+If everything went according to plan, you should see the following
+output on UART0:
+
+<debug_uart> U-Boot TPL board init
+Trying to boot from BOOTROM
+Returning to boot ROM...
+Trying to boot from MMC1
+NOTICE: BL31: v1.3(release):v1.2-1320-gbf43a443
+NOTICE: BL31: Built : 18:04:47, Jul 5 2017
+
+
+U-Boot 2017.07-00158-g2395e99858 (Jul 18 2017 - 21:03:31 +0200)
+
+Model: Theobroma Systems RK3368-uQ7 SoM
+DRAM: 2 GiB
+MMC: dwmmc@ff0c0000: 1, dwmmc@ff0f0000: 0
+Using default environment
+
+In: serial@ff180000
+Out: serial@ff180000
+Err: serial@ff180000
+Net:
+Warning: ethernet@ff290000 (eth0) using random MAC address - d2:69:35:7e:d0:1e
+eth0: ethernet@ff290000
+Hit any key to stop autoboot: 2
--- /dev/null
+/*
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * Minimal dts for a SPL FIT image payload.
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+
+/ {
+ description = "FIT image with U-Boot proper, ATF bl31, DTB";
+ #address-cells = <1>;
+
+ images {
+ uboot {
+ description = "U-Boot (64-bit)";
+ data = /incbin/("../../../u-boot-nodtb.bin");
+ type = "standalone";
+ arch = "arm64";
+ compression = "none";
+ load = <0x00200000>;
+ };
+ atf {
+ description = "ARM Trusted Firmware";
+ data = /incbin/("../../../bl31-rk3368.bin");
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ load = <0x00010000>;
+ entry = <0x00010000>;
+ };
+
+ fdt {
+ description = "RK3368-uQ7 (Lion) flat device-tree";
+ data = /incbin/("../../../u-boot.dtb");
+ type = "flat_dt";
+ compression = "none";
+ };
+ };
+
+ configurations {
+ default = "conf";
+ conf {
+ description = "Theobroma Systems RK3368-uQ7 (Puma) SoM";
+ firmware = "uboot";
+ loadables = "atf";
+ fdt = "fdt";
+ };
+ };
+};
--- /dev/null
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/timer.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mach_cpu_init(void)
+{
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
> cd arm-trusted-firmware
> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
- > cp build/rk3399/release/bl31.bin ../u-boot
+ > cp build/rk3399/release/bl31.bin ../u-boot/bl31-rk3399.bin
Compile the M0 firmware
=======================
#address-cells = <1>;
images {
- uboot@1 {
+ uboot {
description = "U-Boot (64-bit)";
data = /incbin/("../../../u-boot-nodtb.bin");
type = "standalone";
compression = "none";
load = <0x00200000>;
};
- atf@1 {
+ atf {
description = "ARM Trusted Firmware";
- data = /incbin/("../../../bl31.bin");
+ data = /incbin/("../../../bl31-rk3399.bin");
type = "firmware";
arch = "arm64";
compression = "none";
load = <0x00001000>;
entry = <0x00001000>;
};
- pmu@1 {
+ pmu {
description = "Cortex-M0 firmware";
data = /incbin/("../../../rk3399m0.bin");
type = "pmu-firmware";
compression = "none";
load = <0xff8c0000>;
};
- fdt@1 {
+ fdt {
description = "RK3399-Q7 (Puma) flat device-tree";
data = /incbin/("../../../u-boot.dtb");
type = "flat_dt";
};
configurations {
- default = "conf@1";
- conf@1 {
+ default = "conf";
+ conf {
description = "Theobroma Systems RK3399-Q7 (Puma) SoM";
- firmware = "uboot@1";
- loadables = "atf@1";
- fdt = "fdt@1";
+ firmware = "uboot";
+ loadables = "atf";
+ fdt = "fdt";
};
};
};
{
#if CONFIG_IS_ENABLED(CMD_NET)
int ret;
- const char *cpuid = getenv("cpuid#");
+ const char *cpuid = env_get("cpuid#");
u8 hash[SHA256_SUM_LEN];
int size = sizeof(hash);
u8 mac_addr[6];
/* Only generate a MAC address, if none is set in the environment */
- if (getenv("ethaddr"))
+ if (env_get("ethaddr"))
return;
if (!cpuid) {
/* Make this a valid MAC address and set it */
mac_addr[0] &= 0xfe; /* clear multicast bit */
mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
#endif
return;
serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
- setenv("cpuid#", cpuid_str);
- setenv("serial#", serialno_str);
+ env_set("cpuid#", cpuid_str);
+ env_set("serial#", serialno_str);
#endif
return;
char *serial_string;
u64 serial = 0;
- serial_string = getenv("serial#");
+ serial_string = env_get("serial#");
if (serial_string)
serial = simple_strtoull(serial_string, NULL, 16);
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
#endif
#if !defined(CONFIG_SPL_BUILD)
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl(&cdev->macid1l);
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
#endif
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+ eth_env_set_enetaddr("usbnet_devaddr", mac_addr);
rv = usb_eth_initialize(bis);
if (rv < 0)
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
#endif
return 0;
}
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
puts("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl(&cdev->macid1l);
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
if (board_is_eposevm()) {
/* we will let default be "no lcd" */
}
out:
- setenv("idk_lcd", idk_lcd);
+ env_set("idk_lcd", idk_lcd);
return;
}
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
/*
* Set the GPIO7 Pad to POWERHOLD. This has higher priority
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
for (i = 0; i < num_macs; i++) {
u64_to_mac(mac1 + i, mac_addr);
if (is_valid_ethaddr(mac_addr)) {
- eth_setenv_enetaddr_by_index("eth",
- i + 2,
- mac_addr);
+ eth_env_set_enetaddr_by_index("eth",
+ i + 2,
+ mac_addr);
}
}
}
switch (get_board_revision()) {
case REVISION_AXBX:
printf("Beagle Rev Ax/Bx\n");
- setenv("beaglerev", "AxBx");
+ env_set("beaglerev", "AxBx");
break;
case REVISION_CX:
printf("Beagle Rev C1/C2/C3\n");
- setenv("beaglerev", "Cx");
+ env_set("beaglerev", "Cx");
MUX_BEAGLE_C();
break;
case REVISION_C4:
printf("Beagle Rev C4\n");
- setenv("beaglerev", "C4");
+ env_set("beaglerev", "C4");
MUX_BEAGLE_C();
/* Set VAUX2 to 1.8V for EHCI PHY */
twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
break;
case REVISION_XM_AB:
printf("Beagle xM Rev A/B\n");
- setenv("beaglerev", "xMAB");
+ env_set("beaglerev", "xMAB");
MUX_BEAGLE_XM();
/* Set VAUX2 to 1.8V for EHCI PHY */
twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
break;
case REVISION_XM_C:
printf("Beagle xM Rev C\n");
- setenv("beaglerev", "xMC");
+ env_set("beaglerev", "xMC");
MUX_BEAGLE_XM();
/* Set VAUX2 to 1.8V for EHCI PHY */
twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
expansion_config.revision,
expansion_config.fab_revision);
MUX_TINCANTOOLS_ZIPPY();
- setenv("buddy", "zippy");
+ env_set("buddy", "zippy");
break;
case TINCANTOOLS_ZIPPY2:
printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_TINCANTOOLS_ZIPPY();
- setenv("buddy", "zippy2");
+ env_set("buddy", "zippy2");
break;
case TINCANTOOLS_TRAINER:
printf("Recognized Tincantools Trainer board (rev %d %s)\n",
expansion_config.fab_revision);
MUX_TINCANTOOLS_ZIPPY();
MUX_TINCANTOOLS_TRAINER();
- setenv("buddy", "trainer");
+ env_set("buddy", "trainer");
break;
case TINCANTOOLS_SHOWDOG:
printf("Recognized Tincantools Showdow board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
/* Place holder for DSS2 definition for showdog lcd */
- setenv("defaultdisplay", "showdoglcd");
- setenv("buddy", "showdog");
+ env_set("defaultdisplay", "showdoglcd");
+ env_set("buddy", "showdog");
break;
case KBADC_BEAGLEFPGA:
printf("Recognized KBADC Beagle FPGA board\n");
MUX_KBADC_BEAGLEFPGA();
- setenv("buddy", "beaglefpga");
+ env_set("buddy", "beaglefpga");
break;
case LW_BEAGLETOUCH:
printf("Recognized Liquidware BeagleTouch board\n");
- setenv("buddy", "beagletouch");
+ env_set("buddy", "beagletouch");
break;
case BRAINMUX_LCDOG:
printf("Recognized Brainmux LCDog board\n");
- setenv("buddy", "lcdog");
+ env_set("buddy", "lcdog");
break;
case BRAINMUX_LCDOGTOUCH:
printf("Recognized Brainmux LCDog Touch board\n");
- setenv("buddy", "lcdogtouch");
+ env_set("buddy", "lcdogtouch");
break;
case BBTOYS_WIFI:
printf("Recognized BeagleBoardToys WiFi board\n");
MUX_BBTOYS_WIFI()
- setenv("buddy", "bbtoys-wifi");
+ env_set("buddy", "bbtoys-wifi");
break;
case BBTOYS_VGA:
printf("Recognized BeagleBoardToys VGA board\n");
case LSR_COM6L_ADPT:
printf("Recognized LSR COM6L Adapter Board\n");
MUX_BBTOYS_WIFI()
- setenv("buddy", "lsr-com6l-adpt");
+ env_set("buddy", "lsr-com6l-adpt");
break;
case BEAGLE_NO_EEPROM:
printf("No EEPROM on expansion board\n");
- setenv("buddy", "none");
+ env_set("buddy", "none");
break;
default:
printf("Unrecognized expansion board: %x\n",
expansion_config.device_vendor);
- setenv("buddy", "unknown");
+ env_set("buddy", "unknown");
}
if (expansion_config.content == 1)
- setenv(expansion_config.env_var, expansion_config.env_setting);
+ env_set(expansion_config.env_var, expansion_config.env_setting);
twl4030_power_init();
switch (get_board_revision()) {
imply CMD_SPI
imply CMD_TIME
imply CMD_USB if USB
- imply ENV_IS_IN_FAT if MMC_OMAP_HS
struct ti_common_eeprom *ep = TI_EEPROM_DATA;
if (name)
- setenv("board_name", name);
+ env_set("board_name", name);
else if (ep->name)
- setenv("board_name", ep->name);
+ env_set("board_name", ep->name);
else
- setenv("board_name", unknown);
+ env_set("board_name", unknown);
if (ep->version)
- setenv("board_rev", ep->version);
+ env_set("board_rev", ep->version);
else
- setenv("board_rev", unknown);
+ env_set("board_rev", unknown);
if (ep->serial)
- setenv("board_serial", ep->serial);
+ env_set("board_serial", ep->serial);
else
- setenv("board_serial", unknown);
+ env_set("board_serial", unknown);
}
static u64 mac_to_u64(u8 mac[6])
for (i = 0; i < num_macs; i++) {
u64_to_mac(mac1 + i, mac_addr);
if (is_valid_ethaddr(mac_addr)) {
- eth_setenv_enetaddr_by_index("eth", i + index,
- mac_addr);
+ eth_env_set_enetaddr_by_index("eth", i + index,
+ mac_addr);
}
}
}
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
omap_die_id_serial();
omap_set_fastboot_vars();
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
EVM BOARD
-M: Tom Rini <trini@konsulko.com>
+M: Derald D. Woods <woods.technical@gmail.com>
S: Maintained
F: board/ti/evm/
F: include/configs/omap3_evm.h
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <dm.h>
+#include <ns16550.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/arch/mem.h>
#include <i2c.h>
#include <twl4030.h>
#include <asm/mach-types.h>
+#include <asm/omap_musb.h>
#include <linux/mtd/nand.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/musb.h>
#include "evm.h"
-#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
-#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
+#ifdef CONFIG_USB_EHCI_HCD
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
+#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
+#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
DECLARE_GLOBAL_DATA_PTR;
+static const struct ns16550_platdata omap3_evm_serial = {
+ .base = OMAP34XX_UART1,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omap3_evm_uart) = {
+ "ns16550_serial",
+ &omap3_evm_serial
+};
+
static u32 omap3_evm_version;
u32 get_omap3_evm_rev(void)
default:
omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
}
-#else
+#else /* !CONFIG_CMD_NET */
#if defined(CONFIG_STATIC_BOARD_REV)
- /*
- * Look for static defintion of the board revision
- */
+ /* Look for static defintion of the board revision */
omap3_evm_version = CONFIG_STATIC_BOARD_REV;
#else
- /*
- * Fallback to the default above.
- */
+ /* Fallback to the default above */
omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
-#endif
-#endif /* CONFIG_CMD_NET */
+#endif /* CONFIG_STATIC_BOARD_REV */
+#endif /* CONFIG_CMD_NET */
}
-#ifdef CONFIG_USB_OMAP3
-/*
- * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
- */
+#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
+/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
u8 omap3_evm_need_extvbus(void)
{
u8 retval = 0;
return retval;
}
-#endif
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
/*
* Routine: board_init
return 0;
}
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD)
/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
timings->mr = MICRON_V_MR_165;
}
-#endif
+#endif /* CONFIG_SPL_BUILD */
+
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+static struct musb_hdrc_config musb_config = {
+ .multipoint = 1,
+ .dyn_fifo = 1,
+ .num_eps = 16,
+ .ram_bits = 12,
+};
+
+static struct omap_musb_board_data musb_board_data = {
+ .interface_type = MUSB_INTERFACE_ULPI,
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_HOST)
+ .mode = MUSB_HOST,
+#elif defined(CONFIG_USB_MUSB_GADGET)
+ .mode = MUSB_PERIPHERAL,
+#else
+#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
+ .config = &musb_config,
+ .power = 100,
+ .platform_ops = &omap2430_ops,
+ .board_data = &musb_board_data,
+};
+#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
/*
* Routine: misc_init_r
*/
int misc_init_r(void)
{
+ twl4030_power_init();
#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
omap_die_id_display();
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+ musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
+#endif
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
+ omap_die_id_usbethaddr();
+#endif
return 0;
}
MUX_EVM();
}
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET)
/*
* Routine: setup_net_chip
* Description: Setting up the configuration GPMC registers specific to the
int board_eth_init(bd_t *bis)
{
int rc = 0;
-#ifdef CONFIG_SMC911X
+#if defined(CONFIG_SMC911X)
#define STR_ENV_ETHADDR "ethaddr"
struct eth_device *dev;
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+ if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
dev = eth_get_dev_by_index(0);
if (dev) {
- eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+ eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
} else {
printf("omap3evm: Couldn't get eth device\n");
rc = -1;
}
}
-#endif
+#endif /* CONFIG_SMC911X */
return rc;
}
#endif /* CONFIG_CMD_NET */
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
-#endif
-#if defined(CONFIG_MMC)
void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
-#endif
+#endif /* CONFIG_MMC */
+
+#if defined(CONFIG_USB_EHCI_HCD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(int index)
+{
+ return omap_ehci_hcd_stop();
+}
+#endif /* CONFIG_USB_EHCI_HCD */
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
+int board_eth_init(bd_t *bis)
+{
+ return usb_eth_initialize(bis);
+}
+#endif /* CONFIG_USB_ETHER */
/* TS_PEN_IRQ */\
MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176*/\
/* - LAN_INTR*/\
- MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) /*McSPI1_CS3*/\
- MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\
- MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\
- MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\
- MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\
- MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\
+ /* USB EHCI (port 2) */\
+ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)) /*HSUSB2_DATA2*/\
+ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)) /*HSUSB2_DATA7*/\
+ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)) /*HSUSB2_DATA4*/\
+ MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)) /*HSUSB2_DATA5*/\
+ MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)) /*HSUSB2_DATA6*/\
+ MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)) /*HSUSB2_DATA3*/\
+ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
+ MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
+ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DIR*/\
+ MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_NXT*/\
+ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA0*/\
+ MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA1*/\
/*Control and debug */\
MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D7*/\
MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D8*/\
MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D9*/\
- MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)) /*ETK_D10*/\
- MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)) /*ETK_D11*/\
- MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)) /*ETK_D12*/\
- MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)) /*ETK_D13*/\
- MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)) /*ETK_D14*/\
- MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)) /*ETK_D15*/\
/*Die to Die */\
MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\
MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\
Supported boot modes:
- SPI NOR boot
- - AEMIF NAND boot
+ - AEMIF NAND boot (K2E, K2L and K2HK)
- UART boot
- MMC boot (Only on K2G)
- u-boot.bin: for loading and running u-boot.bin through
Texas Instruments code composure studio (CCS) and for UART boot.
- u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
- - MLO: gpimage for programming AEMIF NAND flash for NAND boot, MMC boot.
+ - MLO: gpimage for programming NAND flash for NAND boot, MMC boot.
Build instructions:
===================
char *env;
int res = -1;
- env = getenv(env_name);
+ env = env_get(env_name);
if (env)
res = simple_strtol(env, NULL, 0);
u32 ddr3a_size;
int unitrd_fixup = 0;
- env = getenv("mem_lpae");
+ env = env_get("mem_lpae");
lpae = env && simple_strtol(env, NULL, 0);
- env = getenv("uinitrd_fixup");
+ env = env_get("uinitrd_fixup");
unitrd_fixup = env && simple_strtol(env, NULL, 0);
ddr3a_size = 0;
}
/* reserve memory at start of bank */
- env = getenv("mem_reserve_head");
+ env = env_get("mem_reserve_head");
if (env) {
start[0] += ustrtoul(env, &endp, 0);
size[0] -= ustrtoul(env, &endp, 0);
}
- env = getenv("mem_reserve");
+ env = env_get("mem_reserve");
if (env)
size[0] -= ustrtoul(env, &endp, 0);
char *env;
u64 *reserve_start;
- env = getenv("mem_lpae");
+ env = env_get("mem_lpae");
lpae = env && simple_strtol(env, NULL, 0);
if (lpae) {
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (board_is_k2g_gp())
- setenv("board_name", "66AK2GGP\0");
+ env_set("board_name", "66AK2GGP\0");
else if (board_is_k2g_ice())
- setenv("board_name", "66AK2GIC\0");
+ env_set("board_name", "66AK2GIC\0");
#endif
return 0;
}
board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO);
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "panda-es");
+ env_set("board_name", "panda-es");
#endif
board_id = ((board_id4 << 4) | (board_id3 << 3) |
(board_id2 << 2) | (board_id1 << 1) | (board_id0));
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3))
- setenv("board_name", "panda-a4");
+ env_set("board_name", "panda-a4");
#endif
}
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
printf("Unable to read MAC address. Set <ethaddr>\n");
}
uint32_t mac_hi, mac_lo;
struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
printf("Unable to read MAC address. Set <ethaddr>\n");
}
CONFIG_DM9000_BASE, GPMC_SIZE_16M);
/* Use OMAP DIE_ID as MAC address */
- if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
printf("ethaddr not set, using Die ID\n");
die_id_0 = readl(&id_base->die_id_0);
enetaddr[0] = 0x02; /* locally administered */
enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
enetaddr[5] = (die_id_0 & 0x000000ff);
- eth_setenv_enetaddr("ethaddr", enetaddr);
+ eth_env_set_enetaddr("ethaddr", enetaddr);
}
#endif
#include <common.h>
#include <dm.h>
+#include <environment.h>
#include <asm/arch/clock.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/mxc_hdmi.h>
rev = get_board_rev();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
- setenv("board_rev", env_str);
+ env_set("board_rev", env_str);
#ifndef CONFIG_TDX_APALIS_IMX6_V1_0
if ((rev & 0xfff0) == 0x0100) {
setup_iomux_dce_uart();
/* if using the default device tree, use version for V1.0 HW */
- fdt_env = getenv("fdt_file");
+ fdt_env = env_get("fdt_file");
if ((fdt_env != NULL) && (strcmp(FDT_FILE, fdt_env) == 0)) {
- setenv("fdt_file", FDT_FILE_V1_0);
+ env_set("fdt_file", FDT_FILE_V1_0);
printf("patching fdt_file to " FDT_FILE_V1_0 "\n");
#ifndef CONFIG_ENV_IS_NOWHERE
- saveenv();
+ env_save();
#endif
}
}
I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
/* I2C2 pinmux */
- I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
+ I2C_PINMUX(GEN2_I2C_SCL_PT5, RSVD3, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
+ I2C_PINMUX(GEN2_I2C_SDA_PT6, RSVD3, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
/* I2C3 pinmux */
I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, TRISTATE, INPUT, DISABLE, ENABLE),
rev = get_board_rev();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
- setenv("board_rev", env_str);
+ env_set("board_rev", env_str);
#endif
return 0;
if (((src->sbmr2 & SRC_SBMR2_BMOD_MASK) >> SRC_SBMR2_BMOD_SHIFT)
== SRC_SBMR2_BMOD_SERIAL) {
printf("Serial Downloader recovery mode, disable autoboot\n");
- setenv("bootdelay", "-1");
+ env_set("bootdelay", "-1");
}
return 0;
len = cli_readline(message);
it = console_buffer[0];
- soc = getenv("soc");
+ soc = env_get("soc");
if (!strcmp("mx6", soc)) {
#ifdef CONFIG_MACH_TYPE
if (it == 'y' || it == 'Y')
tdx_hw_tag.ver_minor,
(char)tdx_hw_tag.ver_assembly + 'A');
- setenv("serial#", tdx_serial_str);
+ env_set("serial#", tdx_serial_str);
/*
* Check if environment contains a valid MAC address,
* set the one from config block if not
*/
- if (!eth_getenv_enetaddr("ethaddr", ethaddr))
- eth_setenv_enetaddr("ethaddr", (u8 *)&tdx_eth_addr);
+ if (!eth_env_get_enetaddr("ethaddr", ethaddr))
+ eth_env_set_enetaddr("ethaddr", (u8 *)&tdx_eth_addr);
#ifdef CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR
- if (!eth_getenv_enetaddr("eth1addr", ethaddr)) {
+ if (!eth_env_get_enetaddr("eth1addr", ethaddr)) {
/*
* Secondary MAC address is allocated from block
* 0x100000 higher then the first MAC address
*/
memcpy(ethaddr, &tdx_eth_addr, 6);
ethaddr[3] += 0x10;
- eth_setenv_enetaddr("eth1addr", ethaddr);
+ eth_env_set_enetaddr("eth1addr", ethaddr);
}
#endif
int board_late_init(void)
{
- setenv("board_name", tqma6_get_boardname());
+ env_set("board_name", tqma6_get_boardname());
tqma6_bb_board_late_init();
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", board_string());
+ env_set("board_name", board_string());
#endif
return 0;
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_cpu_type(MXC_CPU_MX6Q))
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
}
mac[5]);
printf("MAC: %s\n", ethaddr);
- setenv(envvar, ethaddr);
+ env_set(envvar, ethaddr);
}
return ret;
/* Only initialize environment variables that are blank
* (i.e. have not yet been set)
*/
- if (!getenv(enetvar))
- setenv(enetvar, ethaddr);
+ if (!env_get(enetvar))
+ env_set(enetvar, ethaddr);
}
}
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
printf("DIPs: 0x%1x\n", (~dips) & 0xf);
if ((dips & 0xf) == 0xe)
- setenv("console", "ttyUSB0,115200n8");
+ env_set("console", "ttyUSB0,115200n8");
return 0;
}
return -ENODEV;
}
- setenv("board_name", model);
+ env_set("board_name", model);
#endif
return 0;
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
if (is_revc1())
- setenv("board_name", "C1");
+ env_set("board_name", "C1");
else
- setenv("board_name", "B1");
+ env_set("board_name", "B1");
#endif
return 0;
}
help
This controls the LCD driver.
+config CMD_MAX6957
+ bool "Enable 'max6957aax' PMIC command"
+ help
+ DEPRECATED: Needs conversion to driver model.
+
+ This allows PMIC registers to be read and written.
+
endif
i2c_write(0x2c, 0x01, 1, &enable_backlight, 1);
/* set display contrast */
- display_contrast_str = getenv("fwopt_dispcontrast");
+ display_contrast_str = env_get("fwopt_dispcontrast");
if (display_contrast_str)
display_contrast = simple_strtoul(display_contrast_str,
NULL, 10);
/* Display board specific information */
puts(" ");
- i = getenv_f("board_rev", buf, sizeof(buf));
+ i = env_get_f("board_rev", buf, sizeof(buf));
if (i > 0)
printf("Rev %s, ", buf);
- i = getenv_f("serial#", buf, sizeof(buf));
+ i = env_get_f("serial#", buf, sizeof(buf));
if (i > 0)
printf("Serial# %s, ", buf);
- i = getenv_f("board_cfg", buf, sizeof(buf));
+ i = env_get_f("board_cfg", buf, sizeof(buf));
if (i > 0)
printf("Cfg %s", buf);
puts("\n");
{
switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
case ZYNQ_BM_QSPI:
- setenv("modeboot", "qspiboot");
+ env_set("modeboot", "qspiboot");
break;
case ZYNQ_BM_NAND:
- setenv("modeboot", "nandboot");
+ env_set("modeboot", "nandboot");
break;
case ZYNQ_BM_NOR:
- setenv("modeboot", "norboot");
+ env_set("modeboot", "norboot");
break;
case ZYNQ_BM_SD:
- setenv("modeboot", "sdboot");
+ env_set("modeboot", "sdboot");
break;
case ZYNQ_BM_JTAG:
- setenv("modeboot", "jtagboot");
+ env_set("modeboot", "jtagboot");
break;
default:
- setenv("modeboot", "");
+ env_set("modeboot", "");
break;
}
* and default boot_targets
*/
new_targets = calloc(1, strlen(mode) +
- strlen(getenv("boot_targets")) + 2);
+ strlen(env_get("boot_targets")) + 2);
- sprintf(new_targets, "%s %s", mode, getenv("boot_targets"));
- setenv("boot_targets", new_targets);
+ sprintf(new_targets, "%s %s", mode, env_get("boot_targets"));
+ env_set("boot_targets", new_targets);
return 0;
}
help
Print GPL license text
+config CMD_REGINFO
+ bool "reginfo"
+ depends on PPC
+ help
+ Register dump
+
endmenu
menu "Boot commands"
help
Poweroff/Shutdown the system
+config CMD_SPL
+ bool "spl export - Export boot information for Falcon boot"
+ depends on SPL
+ help
+ Falcon mode allows booting directly from SPL into an Operating
+ System such as Linux, thus skipping U-Boot proper. See
+ doc/README.falcon for full information about how to use this
+ command.
+
+config CMD_SPL_NAND_OFS
+ hex "Offset of OS command line args for Falcon-mode NAND boot"
+ depends on CMD_SPL
+ default 0
+ help
+ This provides the offset of the command line arguments for Linux
+ when booting from NAND in Falcon mode. See doc/README.falcon
+ for full information about how to use this option (and also see
+ board/gateworks/gw_ventana/README for an example).
+
+config CMD_SPL_WRITE_SIZE
+ hex "Size of argument area"
+ depends on CMD_SPL
+ default 0x2000
+ help
+ This provides the size of the command-line argument area in NAND
+ flash used by Falcon-mode boot. See the documentation until CMD_SPL
+ for detail.
+
+config CMD_THOR_DOWNLOAD
+ bool "thor - TIZEN 'thor' download"
+ help
+ Implements the 'thor' download protocol. This is a way of
+ downloading a software update over USB from an attached host.
+ There is no documentation about this within the U-Boot source code
+ but you should be able to find something on the interwebs.
+
+config CMD_ZBOOT
+ bool "zboot - x86 boot command"
+ help
+ With x86 machines it is common to boot a bzImage file which
+ contains both a kernel and a setup.bin file. The latter includes
+ configuration information from the dark ages which x86 boards still
+ need to pick things out of.
+
+ Consider using FIT in preference to this since it supports directly
+ booting both 32- and 64-bit kernels, as well as secure boot.
+ Documentation is available in doc/uImage.FIT/x86-fit-boot.txt
+
endmenu
menu "Environment commands"
menu "Memory commands"
-config CMD_MEMORY
- bool "md, mm, nm, mw, cp, cmp, base, loop"
- default y
- help
- Memory commands.
- md - memory display
- mm - memory modify (auto-incrementing address)
- nm - memory modify (constant address)
- mw - memory write (fill)
- cp - memory copy
- cmp - memory compare
- base - print or set address offset
- loop - initialize loop on address range
-
config CMD_CRC32
bool "crc32"
select HASH
Help printed with the LAYOUT VERSIONS part of the 'eeprom'
command's help.
+config LOOPW
+ bool "loopw"
+ help
+ Infinite write loop on address range
+
config CMD_MD5SUM
bool "md5sum"
default n
help
Add -v option to verify data against an MD5 checksum.
-config CMD_SHA1SUM
- bool "sha1sum"
- select SHA1
- help
- Compute SHA1 checksum.
-
-config SHA1SUM_VERIFY
- bool "sha1sum -v"
- depends on CMD_SHA1SUM
+config CMD_MEMINFO
+ bool "meminfo"
help
- Add -v option to verify data against a SHA1 checksum.
+ Display memory information.
-config LOOPW
- bool "loopw"
+config CMD_MEMORY
+ bool "md, mm, nm, mw, cp, cmp, base, loop"
+ default y
help
- Infinite write loop on address range
+ Memory commands.
+ md - memory display
+ mm - memory modify (auto-incrementing address)
+ nm - memory modify (constant address)
+ mw - memory write (fill)
+ cp - memory copy
+ cmp - memory compare
+ base - print or set address offset
+ loop - initialize loop on address range
config CMD_MEMTEST
bool "memtest"
mdc - memory display cyclic
mwc - memory write cyclic
-config CMD_MEMINFO
- bool "meminfo"
+config CMD_SHA1SUM
+ bool "sha1sum"
+ select SHA1
help
- Display memory information.
+ Compute SHA1 checksum.
+
+config SHA1SUM_VERIFY
+ bool "sha1sum -v"
+ depends on CMD_SHA1SUM
+ help
+ Add -v option to verify data against a SHA1 checksum.
+
+config CMD_STRINGS
+ bool "strings - display strings in memory"
+ help
+ This works similarly to the Unix 'strings' command except that it
+ works with a memory range. String of printable characters found
+ within the range are displayed. The minimum number of characters
+ for a sequence to be considered a string can be provided.
endmenu
menu "Device access commands"
+config CMD_ARMFLASH
+ #depends on FLASH_CFI_DRIVER
+ bool "armflash"
+ help
+ ARM Ltd reference designs flash partition access
+
config CMD_CLK
bool "clk - Show clock frequencies"
help
clock values from associated drivers. However currently no command
exists for this.
+config CMD_DEMO
+ bool "demo - Demonstration commands for driver model"
+ depends on DM
+ help
+ Provides a 'demo' command which can be used to play around with
+ driver model. To use this properly you will need to enable one or
+ both of the demo devices (DM_DEMO_SHAPE and DM_DEMO_SIMPLE).
+ Otherwise you will always get an empty list of devices. The demo
+ devices are defined in the sandbox device tree, so the easiest
+ option is to use sandbox and pass the -d point to sandbox's
+ u-boot.dtb file.
+
+config CMD_DFU
+ bool "dfu"
+ select USB_FUNCTION_DFU
+ help
+ Enables the command "dfu" which is used to have U-Boot create a DFU
+ class device via USB. This command requires that the "dfu_alt_info"
+ environment variable be set and define the alt settings to expose to
+ the host.
+
config CMD_DM
bool "dm - Access to driver model information"
depends on DM
can be useful to see the state of driver model for debugging or
interest.
-config CMD_DEMO
- bool "demo - Demonstration commands for driver model"
- depends on DM
+config CMD_FDC
+ bool "fdcboot - Boot from floppy device"
help
- Provides a 'demo' command which can be used to play around with
- driver model. To use this properly you will need to enable one or
- both of the demo devices (DM_DEMO_SHAPE and DM_DEMO_SIMPLE).
- Otherwise you will always get an empty list of devices. The demo
- devices are defined in the sandbox device tree, so the easiest
- option is to use sandbox and pass the -d point to sandbox's
- u-boot.dtb file.
+ The 'fdtboot' command allows booting an image from a floppy disk.
+
+config CMD_FLASH
+ bool "flinfo, erase, protect"
+ default y
+ help
+ NOR flash support.
+ flinfo - print FLASH memory information
+ erase - FLASH memory
+ protect - enable or disable FLASH write protection
+
+config CMD_FPGA
+ bool "fpga"
+ default y
+ help
+ FPGA support.
+
+config CMD_FPGA_LOADBP
+ bool "fpga loadbp - load partial bitstream (Xilinx only)"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a bitstream buffer containing
+ a partial bitstream.
+
+config CMD_FPGA_LOADFS
+ bool "fpga loadfs - load bitstream from FAT filesystem (Xilinx only)"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a FAT filesystem.
+
+config CMD_FPGA_LOADMK
+ bool "fpga loadmk - load bitstream from image"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a image generated by mkimage.
+
+config CMD_FPGA_LOADP
+ bool "fpga loadp - load partial bitstream"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a bitstream buffer containing
+ a partial bitstream.
+
+config CMD_FPGAD
+ bool "fpgad - dump FPGA registers"
+ help
+ (legacy, needs conversion to driver model)
+ Provides a way to dump FPGA registers by calling the board-specific
+ fpga_get_reg() function. This functions similarly to the 'md'
+ command.
+
+config CMD_FUSE
+ bool "fuse - support for the fuse subssystem"
+ help
+ (deprecated - needs conversion to driver model)
+ This allows reading, sensing, programming or overriding fuses
+ which control the behaviour of the device. The command uses the
+ fuse_...() API.
+
+config CMD_GPIO
+ bool "gpio"
+ help
+ GPIO support.
+
+config CMD_GPT
+ bool "GPT (GUID Partition Table) command"
+ select PARTITION_UUIDS
+ select EFI_PARTITION
+ help
+ Enable the 'gpt' command to ready and write GPT style partition
+ tables.
+
+config CMD_GPT_RENAME
+ bool "GPT partition renaming commands"
+ depends on CMD_GPT
+ help
+ Enables the 'gpt' command to interchange names on two GPT
+ partitions via the 'gpt swap' command or to rename single
+ partitions via the 'rename' command.
config CMD_IDE
bool "ide - Support for IDE drivers"
might be useful to enhance tracing to only checksum the accesses and
not the data read/written.
+config CMD_I2C
+ bool "i2c"
+ help
+ I2C support.
+
config CMD_LOADB
bool "loadb"
default y
help
Load an S-Record file over serial line
-config CMD_FLASH
- bool "flinfo, erase, protect"
- default y
- help
- NOR flash support.
- flinfo - print FLASH memory information
- erase - FLASH memory
- protect - enable or disable FLASH write protection
-
-config CMD_GPT
- bool "GPT (GUID Partition Table) command"
- select PARTITION_UUIDS
- select EFI_PARTITION
- help
- Enable the 'gpt' command to ready and write GPT style partition
- tables.
-
-config CMD_GPT_RENAME
- bool "GPT partition renaming commands"
- depends on CMD_GPT
- help
- Enables the 'gpt' command to interchange names on two GPT
- partitions via the 'gpt swap' command or to rename single
- partitions via the 'rename' command.
-
-config CMD_ARMFLASH
- #depends on FLASH_CFI_DRIVER
- bool "armflash"
- help
- ARM Ltd reference designs flash partition access
-
config CMD_MMC
bool "mmc"
help
endif # CMD_NAND
-config CMD_PART
- bool "part"
- select PARTITION_UUIDS
+config CMD_NVME
+ bool "nvme"
+ depends on NVME
+ default y if NVME
help
- Read and display information about the partition table on
- various media.
+ NVM Express device support
-config CMD_SF
- bool "sf"
+config CMD_MMC_SPI
+ bool "mmc_spi - Set up MMC SPI device"
help
- SPI Flash support
+ Provides a way to set up an MMC (Multimedia Card) SPI (Serial
+ Peripheral Interface) device. The device provides a means of
+ accessing an MMC device via SPI using a single data line, limited
+ to 20MHz. It is useful since it reduces the amount of protocol code
+ required.
-config CMD_SPI
- bool "sspi"
+config CMD_ONENAND
+ bool "onenand - access to onenand device"
help
- SPI utility command.
+ OneNAND is a brand of NAND ('Not AND' gate) flash which provides
+ various useful features. This command allows reading, writing,
+ and erasing blocks. It allso provides a way to show and change
+ bad blocks, and test the device.
-config CMD_I2C
- bool "i2c"
+config CMD_PART
+ bool "part"
+ select PARTITION_UUIDS
help
- I2C support.
+ Read and display information about the partition table on
+ various media.
-config CMD_USB
- bool "usb"
+config CMD_PCI
+ bool "pci - Access PCI devices"
help
- USB support.
+ Provide access to PCI (Peripheral Interconnect Bus), a type of bus
+ used on some devices to allow the CPU to communicate with its
+ peripherals. Sub-commands allow bus enumeration, displaying and
+ changing configuration space and a few other features.
-config CMD_DFU
- bool "dfu"
- select USB_FUNCTION_DFU
+config CMD_PCMCIA
+ bool "pinit - Set up PCMCIA device"
help
- Enables the command "dfu" which is used to have U-Boot create a DFU
- class device via USB.
+ Provides a means to initialise a PCMCIA (Personal Computer Memory
+ Card International Association) device. This is an old standard from
+ about 1990. These devices are typically removable memory or network
+ cards using a standard 68-pin connector.
-config CMD_USB_MASS_STORAGE
- bool "UMS usb mass storage"
+config CMD_READ
+ bool "read - Read binary data from a partition"
help
- USB mass storage support
+ Provides low-level access to the data in a partition.
-config CMD_FPGA
- bool "fpga"
- default y
+config CMD_REMOTEPROC
+ bool "remoteproc"
+ depends on REMOTEPROC
help
- FPGA support.
+ Support for Remote Processor control
-config CMD_FPGA_LOADBP
- bool "fpga loadbp - load partial bitstream (Xilinx only)"
- depends on CMD_FPGA
+config CMD_SATA
+ bool "sata - Access SATA subsystem"
+ select SATA
help
- Supports loading an FPGA device from a bitstream buffer containing
- a partial bitstream.
+ SATA (Serial Advanced Technology Attachment) is a serial bus
+ standard for connecting to hard drives and other storage devices.
+ This command provides information about attached devices and allows
+ reading, writing and other operations.
-config CMD_FPGA_LOADFS
- bool "fpga loadfs - load bitstream from FAT filesystem (Xilinx only)"
- depends on CMD_FPGA
- help
- Supports loading an FPGA device from a FAT filesystem.
+ SATA replaces PATA (originally just ATA), which stands for Parallel AT
+ Attachment, where AT refers to an IBM AT (Advanced Technology)
+ computer released in 1984.
-config CMD_FPGA_LOADMK
- bool "fpga loadmk - load bitstream from image"
- depends on CMD_FPGA
+config CMD_SAVES
+ bool "saves - Save a file over serial in S-Record format"
help
- Supports loading an FPGA device from a image generated by mkimage.
+ Provides a way to save a binary file using the Motorola S-Record
+ format over the serial line.
-config CMD_FPGA_LOADP
- bool "fpga loadp - load partial bitstream"
- depends on CMD_FPGA
+config CMD_SDRAM
+ bool "sdram - Print SDRAM configuration information"
help
- Supports loading an FPGA device from a bitstream buffer containing
- a partial bitstream.
+ Provides information about attached SDRAM. This assumed that the
+ SDRAM has an EEPROM with information that can be read using the
+ I2C bus. This is only available on some boards.
-config CMD_FPGAD
- bool "fpgad - dump FPGA registers"
+config CMD_SF
+ bool "sf"
help
- (legacy, needs conversion to driver model)
- Provides a way to dump FPGA registers by calling the board-specific
- fpga_get_reg() function. This functions similarly to the 'md'
- command.
+ SPI Flash support
-config CMD_FUSE
- bool "fuse - support for the fuse subssystem"
+config CMD_SF_TEST
+ bool "sf test - Allow testing of SPI flash"
help
- (deprecated - needs conversion to driver model)
- This allows reading, sensing, programming or overriding fuses
- which control the behaviour of the device. The command uses the
- fuse_...() API.
+ Provides a way to test that SPI flash is working correctly. The
+ test is destructive, in that an area of SPI flash must be provided
+ for the test to use. Performance information is also provided,
+ measuring the performance of reading, writing and erasing in
+ Mbps (Million Bits Per Second). This value should approximately
+ equal the SPI bus speed for a single-bit-wide SPI bus, assuming
+ everything is working properly.
-config CMD_REMOTEPROC
- bool "remoteproc"
- depends on REMOTEPROC
+config CMD_SPI
+ bool "sspi"
help
- Support for Remote Processor control
+ SPI utility command.
-config CMD_GPIO
- bool "gpio"
+config CMD_TSI148
+ bool "tsi148 - Command to access tsi148 device"
help
- GPIO support.
+ This provides various sub-commands to initialise and configure the
+ Turndra tsi148 device. See the command help for full details.
-config CMD_FDC
- bool "fdcboot - Boot from floppy device"
+config CMD_UNIVERSE
+ bool "universe - Command to set up the Turndra Universe controller"
help
- The 'fdtboot' command allows booting an image from a floppy disk.
+ This allows setting up the VMEbus provided by this controller.
+ See the command help for full details.
-config CMD_SATA
- bool "sata - Access SATA subsystem"
- select SATA
+config CMD_USB
+ bool "usb"
help
- SATA (Serial Advanced Technology Attachment) is a serial bus
- standard for connecting to hard drives and other storage devices.
- This command provides information about attached devices and allows
- reading, writing and other operations.
+ USB support.
- SATA replaces PATA (originally just ATA), which stands for Parallel AT
- Attachment, where AT refers to an IBM AT (Advanced Technology)
- computer released in 1984.
+config CMD_USB_MASS_STORAGE
+ bool "UMS usb mass storage"
+ help
+ USB mass storage support
endmenu
source "cmd/mvebu/Kconfig"
+config CMD_TERMINAL
+ bool "terminal - provides a way to attach a serial terminal"
+ help
+ Provides a 'cu'-like serial terminal command. This can be used to
+ access other serial ports from the system console. The terminal
+ is very simple with no special processing of characters. As with
+ cu, you can press ~. (tilde followed by period) to exit.
+
+config CMD_UUID
+ bool "uuid, guid - generation of unique IDs"
+ help
+ This enables two commands:
+
+ uuid - generate random Universally Unique Identifier
+ guid - generate Globally Unique Identifier based on random UUID
+
+ The two commands are very similar except for the endianness of the
+ output.
+
endmenu
config CMD_BOOTSTAGE
Defines a default MTD partitioning scheme in the Linux MTD command
line partitions format
+config CMD_MTDPARTS_SPREAD
+ bool "Padd partition size to take account of bad blocks"
+ depends on CMD_MTDPARTS
+ help
+ This enables the 'spread' sub-command of the mtdparts command.
+ This command will modify the existing mtdparts variable by increasing
+ the size of the partitions such that 1) each partition's net size is
+ at least as large as the size specified in the mtdparts variable and
+ 2) each partition starts on a good block.
+
+config CMD_REISER
+ bool "reiser - Access to reiserfs filesystems"
+ help
+ This provides two commands which operate on a resierfs filesystem,
+ commonly used some years ago:
+
+ reiserls - list files
+ reiserload - load a file
+
+config CMD_SCSI
+ bool "scsi - Access to SCSI devices"
+ default y if SCSI
+ help
+ This provides a 'scsi' command which provides access to SCSI (Small
+ Computer System Interface) devices. The command provides a way to
+ scan the bus, reset the bus, read and write data and get information
+ about devices.
+
+config CMD_YAFFS2
+ bool "yaffs2 - Access of YAFFS2 filesystem"
+ depends on YAFFS2
+ default y
+ help
+ This provides commands for accessing a YAFFS2 filesystem. Yet
+ Another Flash Filesystem 2 is a filesystem designed specifically
+ for NAND flash. It incorporates bad-block management and ensures
+ that device writes are sequential regardless of filesystem
+ activity.
+
+config CMD_ZFS
+ bool "zfs - Access of ZFS filesystem"
+ help
+ This provides commands to accessing a ZFS filesystem, commonly used
+ on Solaris systems. Two sub-commands are provided:
+
+ zfsls - list files in a directory
+ zfsload - load a file
+
+ See doc/README.zfs for more details.
+
endmenu
menu "Debug commands"
single-stepping, inspecting variables, etc. This is supported only
on PowerPC at present.
+config CMD_TRACE
+ bool "trace - Support tracing of function calls and timing"
+ help
+ Enables a command to control using of function tracing within
+ U-Boot. This allows recording of call traces including timing
+ information. The command can write data to memory for exporting
+ for analsys (e.g. using bootchart). See doc/README.trace for full
+ details.
+
endmenu
config CMD_UBI
# command
obj-$(CONFIG_CMD_AES) += aes.o
obj-$(CONFIG_CMD_ARMFLASH) += armflash.o
+obj-y += blk_common.o
obj-$(CONFIG_SOURCE) += source.o
obj-$(CONFIG_CMD_SOURCE) += source.o
obj-$(CONFIG_CMD_BDI) += bdinfo.o
obj-$(CONFIG_CMD_PCI) += pci.o
endif
obj-y += pcmcia.o
-obj-$(CONFIG_CMD_PORTIO) += portio.o
obj-$(CONFIG_CMD_PXE) += pxe.o
obj-$(CONFIG_CMD_QFW) += qfw.o
obj-$(CONFIG_CMD_READ) += read.o
obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
obj-$(CONFIG_SANDBOX) += host.o
obj-$(CONFIG_CMD_SATA) += sata.o
+obj-$(CONFIG_CMD_NVME) += nvme.o
obj-$(CONFIG_CMD_SF) += sf.o
-obj-$(CONFIG_SCSI) += scsi.o disk.o
+obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
obj-$(CONFIG_CMD_SPI) += spi.o
obj-$(CONFIG_CMD_USB_MASS_STORAGE) += usb_mass_storage.o
obj-$(CONFIG_CMD_THOR_DOWNLOAD) += thordown.o
obj-$(CONFIG_CMD_XIMG) += ximg.o
-obj-$(CONFIG_YAFFS2) += yaffs2.o
+obj-$(CONFIG_CMD_YAFFS2) += yaffs2.o
obj-$(CONFIG_CMD_SPL) += spl.o
obj-$(CONFIG_CMD_ZIP) += zip.o
obj-$(CONFIG_CMD_ZFS) += zfs.o
sprintf(name, "eth%iaddr", idx);
else
strcpy(name, "ethaddr");
- val = getenv(name);
+ val = env_get(name);
if (!val)
val = "(not set)";
printf("%-12s= %s\n", name, val);
} while (dev);
printf("current eth = %s\n", eth_get_name());
- printf("ip_addr = %s\n", getenv("ipaddr"));
+ printf("ip_addr = %s\n", env_get("ipaddr"));
}
#endif
#if defined(CONFIG_HAS_ETH5)
print_eth(5);
#endif
- printf("IP addr = %s\n", getenv("ipaddr"));
+ printf("IP addr = %s\n", env_get("ipaddr"));
#endif
}
#if defined(CONFIG_PPC)
void __weak board_detail(void)
{
- /* Please define boot_detail() for your platform */
+ /* Please define board_detail() for your platform */
}
int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
--- /dev/null
+/*
+ * Handling of common block commands
+ *
+ * Copyright (c) 2017 Google, Inc
+ *
+ * (C) Copyright 2000-2011
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <blk.h>
+
+#ifdef HAVE_BLOCK_DEVICE
+int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
+ int *cur_devnump)
+{
+ const char *if_name = blk_get_if_type_name(if_type);
+
+ switch (argc) {
+ case 0:
+ case 1:
+ return CMD_RET_USAGE;
+ case 2:
+ if (strncmp(argv[1], "inf", 3) == 0) {
+ blk_list_devices(if_type);
+ return 0;
+ } else if (strncmp(argv[1], "dev", 3) == 0) {
+ if (blk_print_device_num(if_type, *cur_devnump)) {
+ printf("\nno %s devices available\n", if_name);
+ return CMD_RET_FAILURE;
+ }
+ return 0;
+ } else if (strncmp(argv[1], "part", 4) == 0) {
+ if (blk_list_part(if_type))
+ printf("\nno %s devices available\n", if_name);
+ return 0;
+ }
+ return CMD_RET_USAGE;
+ case 3:
+ if (strncmp(argv[1], "dev", 3) == 0) {
+ int dev = (int)simple_strtoul(argv[2], NULL, 10);
+
+ if (!blk_show_device(if_type, dev)) {
+ *cur_devnump = dev;
+ printf("... is now current device\n");
+ } else {
+ return CMD_RET_FAILURE;
+ }
+ return 0;
+ } else if (strncmp(argv[1], "part", 4) == 0) {
+ int dev = (int)simple_strtoul(argv[2], NULL, 10);
+
+ if (blk_print_part_devnum(if_type, dev)) {
+ printf("\n%s device %d not available\n",
+ if_name, dev);
+ return CMD_RET_FAILURE;
+ }
+ return 0;
+ }
+ return CMD_RET_USAGE;
+
+ default: /* at least 4 args */
+ if (strcmp(argv[1], "read") == 0) {
+ ulong addr = simple_strtoul(argv[2], NULL, 16);
+ lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
+ ulong cnt = simple_strtoul(argv[4], NULL, 16);
+ ulong n;
+
+ printf("\n%s read: device %d block # %lld, count %ld ... ",
+ if_name, *cur_devnump, (unsigned long long)blk,
+ cnt);
+
+ n = blk_read_devnum(if_type, *cur_devnump, blk, cnt,
+ (ulong *)addr);
+
+ printf("%ld blocks read: %s\n", n,
+ n == cnt ? "OK" : "ERROR");
+ return n == cnt ? 0 : 1;
+ } else if (strcmp(argv[1], "write") == 0) {
+ ulong addr = simple_strtoul(argv[2], NULL, 16);
+ lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
+ ulong cnt = simple_strtoul(argv[4], NULL, 16);
+ ulong n;
+
+ printf("\n%s write: device %d block # %lld, count %ld ... ",
+ if_name, *cur_devnump, (unsigned long long)blk,
+ cnt);
+
+ n = blk_write_devnum(if_type, *cur_devnump, blk, cnt,
+ (ulong *)addr);
+
+ printf("%ld blocks written: %s\n", n,
+ n == cnt ? "OK" : "ERROR");
+ return n == cnt ? 0 : 1;
+ } else {
+ return CMD_RET_USAGE;
+ }
+
+ return 0;
+ }
+}
+#endif
int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd)
{
- const char *ep = getenv("autostart");
+ const char *ep = env_get("autostart");
if (ep && !strcmp(ep, "yes")) {
char *local_args[2];
#if defined(CONFIG_CMD_BOOTD)
int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- return run_command(getenv("bootcmd"), flag);
+ return run_command(env_get("bootcmd"), flag);
}
U_BOOT_CMD(
return NULL;
sprintf(name, "bootmenu_%d", n);
- return getenv(name);
+ return env_get(name);
}
static void bootmenu_print_entry(void *data)
delay_str = argv[1];
if (!delay_str)
- delay_str = getenv("bootmenu_delay");
+ delay_str = env_get("bootmenu_delay");
if (delay_str)
delay = (int)simple_strtol(delay_str, NULL, 10);
printf("\n%ld bytes read\n", size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return 0;
}
struct mtdids id;
ulong addr;
- addr = simple_strtoul(getenv("cramfsaddr"), NULL, 16);
+ addr = simple_strtoul(env_get("cramfsaddr"), NULL, 16);
/* hack! */
/* cramfs_* only supports NOR flash chips */
part.offset = (u64)(uintptr_t) map_sysmem(addr - OFFSET_ADJUSTMENT, 0);
/* pre-set Boot file name */
- if ((filename = getenv("bootfile")) == NULL) {
+ filename = env_get("bootfile");
+ if (!filename)
filename = "uImage";
- }
if (argc == 2) {
filename = argv[1];
if (size > 0) {
printf("### CRAMFS load complete: %d bytes loaded to 0x%lx\n",
size, offset);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
} else {
printf("### CRAMFS LOAD ERROR<%x> for %s!\n", size, filename);
}
struct mtdids id;
ulong addr;
- addr = simple_strtoul(getenv("cramfsaddr"), NULL, 16);
+ addr = simple_strtoul(env_get("cramfsaddr"), NULL, 16);
/* hack! */
/* cramfs_* only supports NOR flash chips */
unsigned long addr; /* Address of the ELF image */
unsigned long rc; /* Return value from user code */
char *sload = NULL;
- const char *ep = getenv("autostart");
+ const char *ep = env_get("autostart");
int rcode = 0;
/* Consume 'bootelf' */
*/
#if defined(CONFIG_WALNUT)
tmp = (char *)CONFIG_SYS_NVRAM_BASE_ADDR + 0x500;
- eth_getenv_enetaddr("ethaddr", (uchar *)build_buf);
+ eth_env_get_enetaddr("ethaddr", (uchar *)build_buf);
memcpy(tmp, &build_buf[3], 3);
#elif defined(CONFIG_SYS_VXWORKS_MAC_PTR)
tmp = (char *)CONFIG_SYS_VXWORKS_MAC_PTR;
- eth_getenv_enetaddr("ethaddr", (uchar *)build_buf);
+ eth_env_get_enetaddr("ethaddr", (uchar *)build_buf);
memcpy(tmp, build_buf, 6);
#else
puts("## Ethernet MAC address not copied to NV RAM\n");
* (LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET) as defined by
* VxWorks BSP. For example, on PowerPC it defaults to 0x4200.
*/
- tmp = getenv("bootaddr");
+ tmp = env_get("bootaddr");
if (!tmp) {
printf("## VxWorks bootline address not specified\n");
} else {
* parameter. If it is not defined, we may be able to
* construct the info.
*/
- bootline = getenv("bootargs");
+ bootline = env_get("bootargs");
if (bootline) {
memcpy((void *)bootaddr, bootline,
max(strlen(bootline), (size_t)255));
flush_cache(bootaddr, max(strlen(bootline),
(size_t)255));
} else {
- tmp = getenv("bootdev");
+ tmp = env_get("bootdev");
if (tmp) {
strcpy(build_buf, tmp);
ptr = strlen(tmp);
} else
printf("## VxWorks boot device not specified\n");
- tmp = getenv("bootfile");
+ tmp = env_get("bootfile");
if (tmp)
ptr += sprintf(build_buf + ptr,
"host:%s ", tmp);
* The following parameters are only needed if 'bootdev'
* is an ethernet device, otherwise they are optional.
*/
- tmp = getenv("ipaddr");
+ tmp = env_get("ipaddr");
if (tmp) {
ptr += sprintf(build_buf + ptr, "e=%s", tmp);
- tmp = getenv("netmask");
+ tmp = env_get("netmask");
if (tmp) {
- u32 mask = getenv_ip("netmask").s_addr;
+ u32 mask = env_get_ip("netmask").s_addr;
ptr += sprintf(build_buf + ptr,
":%08x ", ntohl(mask));
} else {
}
}
- tmp = getenv("serverip");
+ tmp = env_get("serverip");
if (tmp)
ptr += sprintf(build_buf + ptr, "h=%s ", tmp);
- tmp = getenv("gatewayip");
+ tmp = env_get("gatewayip");
if (tmp)
ptr += sprintf(build_buf + ptr, "g=%s ", tmp);
- tmp = getenv("hostname");
+ tmp = env_get("hostname");
if (tmp)
ptr += sprintf(build_buf + ptr, "tn=%s ", tmp);
- tmp = getenv("othbootargs");
+ tmp = env_get("othbootargs");
if (tmp) {
strcpy(build_buf + ptr, tmp);
ptr += strlen(tmp);
* Since E820 information is critical to the kernel, if we don't
* specify these in the environments, use a default one.
*/
- tmp = getenv("e820data");
+ tmp = env_get("e820data");
if (tmp)
data = (struct e820entry *)simple_strtoul(tmp, NULL, 16);
else
data = (struct e820entry *)VXWORKS_E820_DATA_ADDR;
- tmp = getenv("e820info");
+ tmp = env_get("e820info");
if (tmp)
info = (struct e820info *)simple_strtoul(tmp, NULL, 16);
else
protocol for downloading images, flashing and device control
used on Android devices.
+ See doc/README.android-fastboot for more information.
+
config ANDROID_BOOT_IMAGE
bool "Enable support for Android Boot Images"
help
buf = map_sysmem(addr, 0);
working_fdt = buf;
- setenv_hex("fdtaddr", addr);
+ env_set_hex("fdtaddr", addr);
}
/*
* Get a value from the fdt and format it to be set in the environment
*/
-static int fdt_value_setenv(const void *nodep, int len, const char *var)
+static int fdt_value_env_set(const void *nodep, int len, const char *var)
{
if (is_printable_string(nodep, len))
- setenv(var, (void *)nodep);
+ env_set(var, (void *)nodep);
else if (len == 4) {
char buf[11];
sprintf(buf, "0x%08X", fdt32_to_cpu(*(fdt32_t *)nodep));
- setenv(var, buf);
+ env_set(var, buf);
} else if (len%4 == 0 && len <= 20) {
/* Needed to print things like sha1 hashes. */
char buf[41];
for (i = 0; i < len; i += sizeof(unsigned int))
sprintf(buf + (i * 2), "%08x",
*(unsigned int *)(nodep + i));
- setenv(var, buf);
+ env_set(var, buf);
} else {
printf("error: unprintable value\n");
return 1;
return 1;
printf("The address of the fdt is %#08lx\n",
control ? (ulong)map_to_sysmem(blob) :
- getenv_hex("fdtaddr", 0));
+ env_get_hex("fdtaddr", 0));
return 0;
}
if (curDepth == startDepth + 1)
curIndex++;
if (subcmd[0] == 'n' && curIndex == reqIndex) {
- const char *nodeName = fdt_get_name(
- working_fdt, nextNodeOffset, NULL);
+ const char *node_name;
- setenv(var, (char *)nodeName);
+ node_name = fdt_get_name(working_fdt,
+ nextNodeOffset,
+ NULL);
+ env_set(var, node_name);
return 0;
}
nextNodeOffset = fdt_next_node(
}
if (subcmd[0] == 's') {
/* get the num nodes at this level */
- setenv_ulong(var, curIndex + 1);
+ env_set_ulong(var, curIndex + 1);
} else {
/* node index not found */
printf("libfdt node not found\n");
working_fdt, nodeoffset, prop, &len);
if (len == 0) {
/* no property value */
- setenv(var, "");
+ env_set(var, "");
return 0;
} else if (nodep && len > 0) {
if (subcmd[0] == 'v') {
int ret;
- ret = fdt_value_setenv(nodep, len, var);
+ ret = fdt_value_env_set(nodep, len,
+ var);
if (ret != 0)
return ret;
} else if (subcmd[0] == 'a') {
char buf[11];
sprintf(buf, "0x%p", nodep);
- setenv(var, buf);
+ env_set(var, buf);
} else if (subcmd[0] == 's') {
/* Get size */
char buf[11];
sprintf(buf, "0x%08X", len);
- setenv(var, buf);
+ env_set(var, buf);
} else
return CMD_RET_USAGE;
return 0;
int op, dev = FPGA_INVALID_DEVICE;
size_t data_size = 0;
void *fpga_data = NULL;
- char *devstr = getenv("fpga");
- char *datastr = getenv("fpgadata");
+ char *devstr = env_get("fpga");
+ char *datastr = env_get("fpgadata");
int rc = FPGA_FAIL;
int wrong_parms = 0;
#if defined(CONFIG_FIT)
memset(s + strlen(s) - 1, '\0', 1);
memmove(s, s + 2, strlen(s) - 1);
- e = getenv(s);
+ e = env_get(s);
if (e == NULL) {
#ifdef CONFIG_RANDOM_UUID
debug("%s unset. ", str);
gen_rand_uuid_str(uuid_str, UUID_STR_FORMAT_GUID);
- setenv(s, uuid_str);
+ env_set(s, uuid_str);
- e = getenv(s);
+ e = env_get(s);
if (e) {
debug("Set to random.\n");
ret = 0;
return CMD_RET_FAILURE;
if (namestr)
- setenv(namestr, disk_guid);
+ env_set(namestr, disk_guid);
else
printf("%s\n", disk_guid);
int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
- int rcode = 0;
-
- switch (argc) {
- case 0:
- case 1:
- return CMD_RET_USAGE;
- case 2:
+ if (argc == 2) {
if (strncmp(argv[1], "res", 3) == 0) {
puts("\nReset IDE: ");
ide_init();
return 0;
- } else if (strncmp(argv[1], "inf", 3) == 0) {
- blk_list_devices(IF_TYPE_IDE);
- return 0;
-
- } else if (strncmp(argv[1], "dev", 3) == 0) {
- if (blk_print_device_num(IF_TYPE_IDE, curr_device)) {
- printf("\nno IDE devices available\n");
- return CMD_RET_FAILURE;
- }
-
- return 0;
- } else if (strncmp(argv[1], "part", 4) == 0) {
- if (blk_list_part(IF_TYPE_IDE))
- printf("\nno IDE devices available\n");
- return 1;
}
- return CMD_RET_USAGE;
- case 3:
- if (strncmp(argv[1], "dev", 3) == 0) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
-
- if (!blk_show_device(IF_TYPE_IDE, dev)) {
- curr_device = dev;
- printf("... is now current device\n");
- } else {
- return CMD_RET_FAILURE;
- }
- return 0;
- } else if (strncmp(argv[1], "part", 4) == 0) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
-
- if (blk_print_part_devnum(IF_TYPE_IDE, dev)) {
- printf("\nIDE device %d not available\n", dev);
- return CMD_RET_FAILURE;
- }
- return 1;
- }
-
- return CMD_RET_USAGE;
- default:
- /* at least 4 args */
-
- if (strcmp(argv[1], "read") == 0) {
- ulong addr = simple_strtoul(argv[2], NULL, 16);
- ulong cnt = simple_strtoul(argv[4], NULL, 16);
- ulong n;
-
-#ifdef CONFIG_SYS_64BIT_LBA
- lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
-
- printf("\nIDE read: device %d block # %lld, count %ld...",
- curr_device, blk, cnt);
-#else
- lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
-
- printf("\nIDE read: device %d block # %ld, count %ld...",
- curr_device, blk, cnt);
-#endif
-
- n = blk_read_devnum(IF_TYPE_IDE, curr_device, blk, cnt,
- (ulong *)addr);
-
- printf("%ld blocks read: %s\n",
- n, (n == cnt) ? "OK" : "ERROR");
- if (n == cnt)
- return 0;
- else
- return 1;
- } else if (strcmp(argv[1], "write") == 0) {
- ulong addr = simple_strtoul(argv[2], NULL, 16);
- ulong cnt = simple_strtoul(argv[4], NULL, 16);
- ulong n;
-
-#ifdef CONFIG_SYS_64BIT_LBA
- lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
-
- printf("\nIDE write: device %d block # %lld, count %ld...",
- curr_device, blk, cnt);
-#else
- lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
-
- printf("\nIDE write: device %d block # %ld, count %ld...",
- curr_device, blk, cnt);
-#endif
- n = blk_write_devnum(IF_TYPE_IDE, curr_device, blk, cnt,
- (ulong *)addr);
-
- printf("%ld blocks written: %s\n", n,
- n == cnt ? "OK" : "ERROR");
- if (n == cnt)
- return 0;
- else
- return 1;
- } else {
- return CMD_RET_USAGE;
- }
-
- return rcode;
}
+
+ return blk_common_cmd(argc, argv, IF_TYPE_IDE, &curr_device);
}
int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
for (i = 0; i < strlen(value); i++)
value[i] = tolower(value[i]);
#endif
- setenv(name, value);
+ env_set(name, value);
printf("ini: Imported %s as %s\n", name, value);
}
section = argv[1];
file_address = (char *)simple_strtoul(
- argc < 3 ? getenv("loadaddr") : argv[2], NULL, 16);
+ argc < 3 ? env_get("loadaddr") : argv[2], NULL, 16);
file_size = (size_t)simple_strtoul(
- argc < 4 ? getenv("filesize") : argv[3], NULL, 16);
+ argc < 4 ? env_get("filesize") : argv[3], NULL, 16);
return ini_parse(file_address, file_size, ini_handler, (void *)section);
}
i++;
}
s[i] = 0;
- return getenv((const char *)&s[2]);
+ return env_get((const char *)&s[2]);
} else {
return s;
}
ulong offset = load_addr;
/* pre-set Boot file name */
- if ((filename = getenv("bootfile")) == NULL) {
+ filename = env_get("bootfile");
+ if (!filename)
filename = "uImage";
- }
if (argc == 2) {
filename = argv[1];
if (size > 0) {
printf("### %s load complete: %d bytes loaded to 0x%lx\n",
fsname, size, offset);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
} else {
printf("### %s LOAD ERROR<%x> for %s!\n", fsname, size, filename);
}
load_baudrate = current_baudrate = gd->baudrate;
#endif
- if (((env_echo = getenv("loads_echo")) != NULL) && (*env_echo == '1')) {
+ env_echo = env_get("loads_echo");
+ if (env_echo && *env_echo == '1')
do_echo = 1;
- } else {
+ else
do_echo = 0;
- }
#ifdef CONFIG_SYS_LOADS_BAUD_CHANGE
if (argc >= 2) {
start_addr, end_addr, size, size
);
flush_cache(start_addr, size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return (addr);
case SREC_START:
break;
offset = CONFIG_SYS_LOAD_ADDR;
/* pre-set offset from $loadaddr */
- if ((s = getenv("loadaddr")) != NULL) {
+ s = env_get("loadaddr");
+ if (s)
offset = simple_strtoul(s, NULL, 16);
- }
load_baudrate = current_baudrate = gd->baudrate;
flush_cache(offset, size);
printf("## Total Size = 0x%08x = %d Bytes\n", size, size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return offset;
}
flush_cache(offset, ALIGN(size, ARCH_DMA_MINALIGN));
printf("## Total Size = 0x%08x = %d Bytes\n", size, size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return offset;
}
#endif
/* Set up log version */
- if ((s = getenv ("logversion")) != NULL)
+ s = env_get("logversion");
+ if (s)
log_version = (int)simple_strtoul(s, NULL, 10);
if (log_version == 2)
log->v2.start = log->v2.con;
/* Initialize default loglevel if present */
- if ((s = getenv ("loglevel")) != NULL)
+ s = env_get("loglevel");
+ if (s)
console_loglevel = (int)simple_strtoul(s, NULL, 10);
gd->flags |= GD_FLG_LOGINIT;
return 1;
printf("Uncompressed size: %ld = %#lX\n", (ulong)src_len,
(ulong)src_len);
- setenv_hex("filesize", src_len);
+ env_set_hex("filesize", src_len);
return 0;
}
sprintf(str_ptr, "%02x", sum[i]);
str_ptr += 2;
}
- setenv(dest, str_output);
+ env_set(dest, str_output);
}
}
if (strlen(verify_str) == 32)
vsum_str = verify_str;
else {
- vsum_str = getenv(verify_str);
+ vsum_str = env_get(verify_str);
if (vsum_str == NULL || strlen(vsum_str) != 32)
return 1;
}
printf("EMMC RPMB partition Size %d MB\n", rpmbsize);
return CMD_RET_SUCCESS;
}
+
+static int mmc_partconf_print(struct mmc *mmc)
+{
+ u8 ack, access, part;
+
+ if (mmc->part_config == MMCPART_NOAVAILABLE) {
+ printf("No part_config info for ver. 0x%x\n", mmc->version);
+ return CMD_RET_FAILURE;
+ }
+
+ access = EXT_CSD_EXTRACT_PARTITION_ACCESS(mmc->part_config);
+ ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config);
+ part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
+
+ printf("EXT_CSD[179], PARTITION_CONFIG:\n"
+ "BOOT_ACK: 0x%x\n"
+ "BOOT_PARTITION_ENABLE: 0x%x\n"
+ "PARTITION_ACCESS: 0x%x\n", ack, part, access);
+
+ return CMD_RET_SUCCESS;
+}
+
static int do_mmc_partconf(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
struct mmc *mmc;
u8 ack, part_num, access;
- if (argc != 5)
+ if (argc != 2 && argc != 5)
return CMD_RET_USAGE;
dev = simple_strtoul(argv[1], NULL, 10);
- ack = simple_strtoul(argv[2], NULL, 10);
- part_num = simple_strtoul(argv[3], NULL, 10);
- access = simple_strtoul(argv[4], NULL, 10);
mmc = init_mmc_device(dev, false);
if (!mmc)
return CMD_RET_FAILURE;
}
+ if (argc == 2)
+ return mmc_partconf_print(mmc);
+
+ ack = simple_strtoul(argv[2], NULL, 10);
+ part_num = simple_strtoul(argv[3], NULL, 10);
+ access = simple_strtoul(argv[4], NULL, 10);
+
/* acknowledge to be sent during boot operation */
return mmc_set_part_conf(mmc, ack, part_num, access);
}
" - Set the BOOT_BUS_WIDTH field of the specified device\n"
"mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n"
" - Change sizes of boot and RPMB partitions of specified device\n"
- "mmc partconf dev boot_ack boot_partition partition_access\n"
- " - Change the bits of the PARTITION_CONFIG field of the specified device\n"
+ "mmc partconf dev [boot_ack boot_partition partition_access]\n"
+ " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n"
"mmc rst-function dev value\n"
" - Change the RST_n_FUNCTION field of the specified device\n"
" WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
dev = list_entry(dentry, struct mtd_device, link);
if (dev == current_mtd_dev) {
mtddevnum += current_mtd_partnum;
- setenv_ulong("mtddevnum", mtddevnum);
+ env_set_ulong("mtddevnum", mtddevnum);
break;
}
mtddevnum += dev->num_parts;
}
part = mtd_part_info(current_mtd_dev, current_mtd_partnum);
- setenv("mtddevname", part->name);
+ env_set("mtddevname", part->name);
debug("=> mtddevnum %d,\n=> mtddevname %s\n", mtddevnum, part->name);
} else {
- setenv("mtddevnum", NULL);
- setenv("mtddevname", NULL);
+ env_set("mtddevnum", NULL);
+ env_set("mtddevname", NULL);
debug("=> mtddevnum NULL\n=> mtddevname NULL\n");
}
sprintf(buf, "%s%d,%d", MTD_DEV_TYPE(current_mtd_dev->id->type),
current_mtd_dev->id->num, current_mtd_partnum);
- setenv("partition", buf);
+ env_set("partition", buf);
strncpy(last_partition, buf, 16);
debug("=> partition %s\n", buf);
} else {
- setenv("partition", NULL);
+ env_set("partition", NULL);
last_partition[0] = '\0';
debug("=> partition NULL\n");
ret = generate_mtdparts(buf, buflen);
if ((buf[0] != '\0') && (ret == 0))
- setenv("mtdparts", buf);
+ env_set("mtdparts", buf);
else
- setenv("mtdparts", NULL);
+ env_set("mtdparts", NULL);
return ret;
}
* @param buf temporary buffer pointer MTDPARTS_MAXLEN long
* @return mtdparts variable string, NULL if not found
*/
-static const char *getenv_mtdparts(char *buf)
+static const char *env_get_mtdparts(char *buf)
{
if (gd->flags & GD_FLG_ENV_READY)
- return getenv("mtdparts");
- if (getenv_f("mtdparts", buf, MTDPARTS_MAXLEN) != -1)
+ return env_get("mtdparts");
+ if (env_get_f("mtdparts", buf, MTDPARTS_MAXLEN) != -1)
return buf;
return NULL;
}
}
/* re-read 'mtdparts' variable, mtd_devices_init may be updating env */
- p = getenv_mtdparts(tmp_parts);
+ p = env_get_mtdparts(tmp_parts);
if (!p)
p = mtdparts;
}
/* get variables */
- ids = getenv("mtdids");
- parts = getenv_mtdparts(tmp_parts);
- current_partition = getenv("partition");
+ ids = env_get("mtdids");
+ parts = env_get_mtdparts(tmp_parts);
+ current_partition = env_get("partition");
/* save it for later parsing, cannot rely on current partition pointer
* as 'partition' variable may be updated during init */
if (mtdids_default) {
debug("mtdids variable not defined, using default\n");
ids = mtdids_default;
- setenv("mtdids", (char *)ids);
+ env_set("mtdids", (char *)ids);
} else {
printf("mtdids not defined, no default present\n");
return 1;
if (!parts) {
if (mtdparts_default && use_defaults) {
parts = mtdparts_default;
- if (setenv("mtdparts", (char *)parts) == 0)
+ if (env_set("mtdparts", (char *)parts) == 0)
use_defaults = 0;
} else
printf("mtdparts variable not set, see 'help mtdparts'\n");
current_mtd_partnum = pnum;
current_save();
}
- } else if (getenv("partition") == NULL) {
+ } else if (env_get("partition") == NULL) {
debug("no partition variable set, setting...\n");
current_save();
}
{
if (argc == 2) {
if (strcmp(argv[1], "default") == 0) {
- setenv("mtdids", NULL);
- setenv("mtdparts", NULL);
- setenv("partition", NULL);
+ env_set("mtdids", NULL);
+ env_set("mtdparts", NULL);
+ env_set("partition", NULL);
use_defaults = 1;
mtdparts_init();
/* this may be the first run, initialize lists if needed */
mtdparts_init();
- setenv("mtdparts", NULL);
+ env_set("mtdparts", NULL);
/* mtd_devices_init() calls current_save() */
return mtd_devices_init();
const char *addr_str;
unsigned long addr;
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str)
addr = simple_strtoul(addr_str, NULL, 16);
else
printf(" bbt options 0x%08x\n", chip->bbt_options);
/* Set geometry info */
- setenv_hex("nand_writesize", mtd->writesize);
- setenv_hex("nand_oobsize", mtd->oobsize);
- setenv_hex("nand_erasesize", mtd->erasesize);
+ env_set_hex("nand_writesize", mtd->writesize);
+ env_set_hex("nand_oobsize", mtd->oobsize);
+ env_set_hex("nand_erasesize", mtd->erasesize);
}
static int raw_access(struct mtd_info *mtd, ulong addr, loff_t off,
#else
int quiet = 0;
#endif
- const char *quiet_str = getenv("quiet");
+ const char *quiet_str = env_get("quiet");
int dev = nand_curr_device;
int repeat = flag & CMD_FLAG_REPEAT;
switch (argc) {
case 1:
addr = CONFIG_SYS_LOAD_ADDR;
- boot_device = getenv("bootdevice");
+ boot_device = env_get("bootdevice");
break;
case 2:
addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = getenv("bootdevice");
+ boot_device = env_get("bootdevice");
break;
case 3:
addr = simple_strtoul(argv[1], NULL, 16);
if (net_gateway.s_addr) {
ip_to_string(net_gateway, tmp);
- setenv("gatewayip", tmp);
+ env_set("gatewayip", tmp);
}
if (net_netmask.s_addr) {
ip_to_string(net_netmask, tmp);
- setenv("netmask", tmp);
+ env_set("netmask", tmp);
}
if (net_hostname[0])
- setenv("hostname", net_hostname);
+ env_set("hostname", net_hostname);
if (net_root_path[0])
- setenv("rootpath", net_root_path);
+ env_set("rootpath", net_root_path);
if (net_ip.s_addr) {
ip_to_string(net_ip, tmp);
- setenv("ipaddr", tmp);
+ env_set("ipaddr", tmp);
}
#if !defined(CONFIG_BOOTP_SERVERIP)
/*
*/
if (net_server_ip.s_addr) {
ip_to_string(net_server_ip, tmp);
- setenv("serverip", tmp);
+ env_set("serverip", tmp);
}
#endif
if (net_dns_server.s_addr) {
ip_to_string(net_dns_server, tmp);
- setenv("dnsip", tmp);
+ env_set("dnsip", tmp);
}
#if defined(CONFIG_BOOTP_DNS2)
if (net_dns_server2.s_addr) {
ip_to_string(net_dns_server2, tmp);
- setenv("dnsip2", tmp);
+ env_set("dnsip2", tmp);
}
#endif
if (net_nis_domain[0])
- setenv("domain", net_nis_domain);
+ env_set("domain", net_nis_domain);
#if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_TIMEOFFSET)
if (net_ntp_time_offset) {
sprintf(tmp, "%d", net_ntp_time_offset);
- setenv("timeoffset", tmp);
+ env_set("timeoffset", tmp);
}
#endif
#if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_NTPSERVER)
if (net_ntp_server.s_addr) {
ip_to_string(net_ntp_server, tmp);
- setenv("ntpserverip", tmp);
+ env_set("ntpserverip", tmp);
}
#endif
}
ulong addr;
/* pre-set load_addr */
- s = getenv("loadaddr");
+ s = env_get("loadaddr");
if (s != NULL)
load_addr = simple_strtoul(s, NULL, 16);
printf("CDP offered appliance VLAN %d\n",
ntohs(cdp_appliance_vlan));
vlan_to_string(cdp_appliance_vlan, tmp);
- setenv("vlan", tmp);
+ env_set("vlan", tmp);
net_our_vlan = cdp_appliance_vlan;
}
if (cdp_native_vlan != htons(-1)) {
printf("CDP offered native VLAN %d\n", ntohs(cdp_native_vlan));
vlan_to_string(cdp_native_vlan, tmp);
- setenv("nvlan", tmp);
+ env_set("nvlan", tmp);
net_native_vlan = cdp_native_vlan;
}
}
char *toff;
if (argc < 2) {
- net_ntp_server = getenv_ip("ntpserverip");
+ net_ntp_server = env_get_ip("ntpserverip");
if (net_ntp_server.s_addr == 0) {
printf("ntpserverip not set\n");
return CMD_RET_FAILURE;
}
}
- toff = getenv("timeoffset");
+ toff = env_get("timeoffset");
if (toff == NULL)
net_ntp_time_offset = 0;
else
net_gateway.s_addr = 0;
ip_to_string(net_gateway, tmp);
- setenv("gatewayip", tmp);
+ env_set("gatewayip", tmp);
ip_to_string(net_netmask, tmp);
- setenv("netmask", tmp);
+ env_set("netmask", tmp);
ip_to_string(net_ip, tmp);
- setenv("ipaddr", tmp);
- setenv("llipaddr", tmp); /* store this for next time */
+ env_set("ipaddr", tmp);
+ env_set("llipaddr", tmp); /* store this for next time */
return CMD_RET_SUCCESS;
}
return 0;
}
-int setenv(const char *varname, const char *varvalue)
+int env_set(const char *varname, const char *varvalue)
{
const char * const argv[4] = { "setenv", varname, varvalue, NULL };
* @param value Value to set it to
* @return 0 if ok, 1 on error
*/
-int setenv_ulong(const char *varname, ulong value)
+int env_set_ulong(const char *varname, ulong value)
{
/* TODO: this should be unsigned */
char *str = simple_itoa(value);
- return setenv(varname, str);
+ return env_set(varname, str);
}
/**
* @param value Value to set it to
* @return 0 if ok, 1 on error
*/
-int setenv_hex(const char *varname, ulong value)
+int env_set_hex(const char *varname, ulong value)
{
char str[17];
sprintf(str, "%lx", value);
- return setenv(varname, str);
+ return env_set(varname, str);
}
-ulong getenv_hex(const char *varname, ulong default_val)
+ulong env_get_hex(const char *varname, ulong default_val)
{
const char *s;
ulong value;
char *endp;
- s = getenv(varname);
+ s = env_get(varname);
if (s)
value = simple_strtoul(s, &endp, 16);
if (!s || endp == s)
return 1;
/* Set read buffer to initial value or empty sting */
- init_val = getenv(argv[1]);
+ init_val = env_get(argv[1]);
if (init_val)
snprintf(buffer, CONFIG_SYS_CBSIZE, "%s", init_val);
else
* return address of storage for that variable,
* or NULL if not found
*/
-char *getenv(const char *name)
+char *env_get(const char *name)
{
if (gd->flags & GD_FLG_ENV_READY) { /* after import into hashtable */
ENTRY e, *ep;
}
/* restricted capabilities before import */
- if (getenv_f(name, (char *)(gd->env_buf), sizeof(gd->env_buf)) > 0)
+ if (env_get_f(name, (char *)(gd->env_buf), sizeof(gd->env_buf)) > 0)
return (char *)(gd->env_buf);
return NULL;
/*
* Look up variable from environment for restricted C runtime env.
*/
-int getenv_f(const char *name, char *buf, unsigned len)
+int env_get_f(const char *name, char *buf, unsigned len)
{
int i, nxt;
* found
* @return the decoded value, or default_val if not found
*/
-ulong getenv_ulong(const char *name, int base, ulong default_val)
+ulong env_get_ulong(const char *name, int base, ulong default_val)
{
/*
- * We can use getenv() here, even before relocation, since the
+ * We can use env_get() here, even before relocation, since the
* environment variable value is an integer and thus short.
*/
- const char *str = getenv(name);
+ const char *str = env_get(name);
return str ? simple_strtoul(str, NULL, base) : default_val;
}
static int do_env_save(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
- printf("Saving Environment to %s...\n", env_name_spec);
+ struct env_driver *env = env_driver_lookup_default();
- return saveenv() ? 1 : 0;
+ printf("Saving Environment to %s...\n", env->name);
+
+ return env_save() ? 1 : 0;
}
U_BOOT_CMD(
return 1;
}
sprintf(buf, "%zX", (size_t)len);
- setenv("filesize", buf);
+ env_set("filesize", buf);
return 0;
}
envp->flags = ACTIVE_FLAG;
#endif
}
- setenv_hex("filesize", len + offsetof(env_t, data));
+ env_set_hex("filesize", len + offsetof(env_t, data));
return 0;
--- /dev/null
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <nvme.h>
+#include <part.h>
+#include <linux/math64.h>
+
+static int nvme_curr_device;
+
+static int do_nvme_scan(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ int ret;
+
+ ret = nvme_scan_namespace();
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_list(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ blk_list_devices(IF_TYPE_NVME);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_info(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ int devnum;
+ struct udevice *udev;
+ int ret;
+
+ if (argc > 1)
+ devnum = (int)simple_strtoul(argv[1], NULL, 10);
+ else
+ devnum = nvme_curr_device;
+
+ ret = blk_get_device(IF_TYPE_NVME, devnum, &udev);
+ if (ret < 0)
+ return CMD_RET_FAILURE;
+
+ nvme_print_info(udev);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_device(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ if (argc > 1) {
+ int devnum = (int)simple_strtoul(argv[1], NULL, 10);
+
+ if (!blk_show_device(IF_TYPE_NVME, devnum)) {
+ nvme_curr_device = devnum;
+ printf("... is now current device\n");
+ } else {
+ return CMD_RET_FAILURE;
+ }
+ } else {
+ blk_show_device(IF_TYPE_NVME, nvme_curr_device);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_part(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ if (argc > 1) {
+ int devnum = (int)simple_strtoul(argv[2], NULL, 10);
+
+ if (blk_print_part_devnum(IF_TYPE_NVME, devnum)) {
+ printf("\nNVMe device %d not available\n", devnum);
+ return CMD_RET_FAILURE;
+ }
+ } else {
+ blk_print_part_devnum(IF_TYPE_NVME, nvme_curr_device);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_read(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ unsigned long time;
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ ulong addr = simple_strtoul(argv[1], NULL, 16);
+ ulong cnt = simple_strtoul(argv[3], NULL, 16);
+ ulong n;
+ lbaint_t blk = simple_strtoul(argv[2], NULL, 16);
+
+ printf("\nNVMe read: device %d block # " LBAFU " count %ld ... ",
+ nvme_curr_device, blk, cnt);
+
+ time = get_timer(0);
+ n = blk_read_devnum(IF_TYPE_NVME, nvme_curr_device, blk,
+ cnt, (ulong *)addr);
+ time = get_timer(time);
+
+ printf("read: %s\n", (n == cnt) ? "OK" : "ERROR");
+ printf("%lu bytes read in %lu ms", cnt * 512, time);
+ if (time > 0) {
+ puts(" (");
+ print_size(div_u64(cnt * 512, time) * 1000, "/s");
+ puts(")");
+ }
+ puts("\n");
+
+ return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+}
+
+static int do_nvme_write(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ unsigned long time;
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ ulong addr = simple_strtoul(argv[1], NULL, 16);
+ ulong cnt = simple_strtoul(argv[3], NULL, 16);
+ ulong n;
+ lbaint_t blk = simple_strtoul(argv[2], NULL, 16);
+
+ printf("\nNVMe write: device %d block # " LBAFU " count %ld ... ",
+ nvme_curr_device, blk, cnt);
+
+ time = get_timer(0);
+ n = blk_write_devnum(IF_TYPE_NVME, nvme_curr_device, blk,
+ cnt, (ulong *)addr);
+ time = get_timer(time);
+
+ printf("write: %s\n", (n == cnt) ? "OK" : "ERROR");
+ printf("%lu bytes write in %lu ms", cnt * 512, time);
+ if (time > 0) {
+ puts(" (");
+ print_size(div_u64(cnt * 512, time) * 1000, "/s");
+ puts(")");
+ }
+ puts("\n");
+
+ return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+}
+
+static cmd_tbl_t cmd_nvme[] = {
+ U_BOOT_CMD_MKENT(scan, 1, 1, do_nvme_scan, "", ""),
+ U_BOOT_CMD_MKENT(list, 1, 1, do_nvme_list, "", ""),
+ U_BOOT_CMD_MKENT(info, 2, 1, do_nvme_info, "", ""),
+ U_BOOT_CMD_MKENT(device, 2, 1, do_nvme_device, "", ""),
+ U_BOOT_CMD_MKENT(part, 2, 1, do_nvme_part, "", ""),
+ U_BOOT_CMD_MKENT(write, 4, 0, do_nvme_write, "", ""),
+ U_BOOT_CMD_MKENT(read, 4, 0, do_nvme_read, "", "")
+};
+
+static int do_nvmecops(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ cmd_tbl_t *cp;
+
+ cp = find_cmd_tbl(argv[1], cmd_nvme, ARRAY_SIZE(cmd_nvme));
+
+ argc--;
+ argv++;
+
+ if (cp == NULL || argc > cp->maxargs)
+ return CMD_RET_USAGE;
+
+ if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+ return CMD_RET_SUCCESS;
+
+ return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(
+ nvme, 8, 1, do_nvmecops,
+ "NVM Express sub-system",
+ "\nnvme scan - scan NVMe blk devices\n"
+ "nvme list - show all available NVMe blk devices\n"
+ "nvme info [dev]- show current or a specific NVMe blk device\n"
+ "nvme device [dev] - show or set current device\n"
+ "nvme part [dev] - print partition table\n"
+ "nvme read addr blk# cnt\n"
+ "nvme write addr blk# cnt"
+);
return 1;
if (argc > 2)
- setenv(argv[2], info.uuid);
+ env_set(argv[2], info.uuid);
else
printf("%s\n", info.uuid);
sprintf(t, "%s%x", str[0] ? " " : "", p);
strcat(str, t);
}
- setenv(var, str);
+ env_set(var, str);
return 0;
}
snprintf(buf, sizeof(buf), LBAF, info.start);
if (argc > 3)
- setenv(argv[3], buf);
+ env_set(argv[3], buf);
else
printf("%s\n", buf);
snprintf(buf, sizeof(buf), LBAF, info.size);
if (argc > 3)
- setenv(argv[3], buf);
+ env_set(argv[3], buf);
else
printf("%s\n", buf);
if ((bdf = get_pci_dev(argv[2])) == -1)
return 1;
break;
-#if defined(CONFIG_CMD_PCI_ENUM) || defined(CONFIG_DM_PCI)
+#if defined(CONFIG_DM_PCI)
case 'e':
pci_init();
return 0;
static char pci_help_text[] =
"[bus] [long]\n"
" - short or long list of PCI devices on bus 'bus'\n"
-#if defined(CONFIG_CMD_PCI_ENUM) || defined(CONFIG_DM_PCI)
+#if defined(CONFIG_DM_PCI)
"pci enum\n"
" - Enumerate PCI buses\n"
#endif
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Marc Singer, elf@buici.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * Port I/O Functions
- *
- * Copied from FADS ROM, Dan Malek (dmalek@jlc.net)
- */
-
-#include <common.h>
-#include <command.h>
-
-/* Display values from last command.
- * Memory modify remembered values are different from display memory.
- */
-static uint in_last_addr, in_last_size;
-static uint out_last_addr, out_last_size, out_last_value;
-
-
-int do_portio_out (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- uint addr = out_last_addr;
- uint size = out_last_size;
- uint value = out_last_value;
-
- if (argc != 3)
- return CMD_RET_USAGE;
-
- if ((flag & CMD_FLAG_REPEAT) == 0) {
- /*
- * New command specified. Check for a size specification.
- * Defaults to long if no or incorrect specification.
- */
- size = cmd_get_data_size (argv[0], 1);
- addr = simple_strtoul (argv[1], NULL, 16);
- value = simple_strtoul (argv[2], NULL, 16);
- }
-#if defined (CONFIG_X86)
-
- {
- unsigned short port = addr;
-
- switch (size) {
- default:
- case 1:
- {
- unsigned char ch = value;
- __asm__ volatile ("out %0, %%dx"::"a" (ch), "d" (port));
- }
- break;
- case 2:
- {
- unsigned short w = value;
- __asm__ volatile ("out %0, %%dx"::"a" (w), "d" (port));
- }
- break;
- case 4:
- __asm__ volatile ("out %0, %%dx"::"a" (value), "d" (port));
-
- break;
- }
- }
-
-#endif /* CONFIG_X86 */
-
- out_last_addr = addr;
- out_last_size = size;
- out_last_value = value;
-
- return 0;
-}
-
-U_BOOT_CMD(
- out, 3, 1, do_portio_out,
- "write datum to IO port",
- "[.b, .w, .l] port value\n - output to IO port"
-);
-
-int do_portio_in (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- uint addr = in_last_addr;
- uint size = in_last_size;
-
- if (argc != 2)
- return CMD_RET_USAGE;
-
- if ((flag & CMD_FLAG_REPEAT) == 0) {
- /*
- * New command specified. Check for a size specification.
- * Defaults to long if no or incorrect specification.
- */
- size = cmd_get_data_size (argv[0], 1);
- addr = simple_strtoul (argv[1], NULL, 16);
- }
-#if defined (CONFIG_X86)
-
- {
- unsigned short port = addr;
-
- switch (size) {
- default:
- case 1:
- {
- unsigned char ch;
- __asm__ volatile ("in %%dx, %0":"=a" (ch):"d" (port));
-
- printf (" %02x\n", ch);
- }
- break;
- case 2:
- {
- unsigned short w;
- __asm__ volatile ("in %%dx, %0":"=a" (w):"d" (port));
-
- printf (" %04x\n", w);
- }
- break;
- case 4:
- {
- unsigned long l;
- __asm__ volatile ("in %%dx, %0":"=a" (l):"d" (port));
-
- printf (" %08lx\n", l);
- }
- break;
- }
- }
-#endif /* CONFIG_X86 */
-
- in_last_addr = addr;
- in_last_size = size;
-
- return 0;
-}
-
-U_BOOT_CMD(
- in, 2, 1, do_portio_in,
- "read data from an IO port",
- "[.b, .w, .l] port\n"
- " - read datum from IO port"
-);
static bool is_pxe;
/*
- * Like getenv, but prints an error if envvar isn't defined in the
- * environment. It always returns what getenv does, so it can be used in
- * place of getenv without changing error handling otherwise.
+ * Like env_get, but prints an error if envvar isn't defined in the
+ * environment. It always returns what env_get does, so it can be used in
+ * place of env_get without changing error handling otherwise.
*/
static char *from_env(const char *envvar)
{
char *ret;
- ret = getenv(envvar);
+ ret = env_get(envvar);
if (!ret)
printf("missing environment variable: %s\n", envvar);
return -EINVAL;
}
- if (!eth_getenv_enetaddr_by_index("eth", eth_get_dev_index(),
- ethaddr))
+ if (!eth_env_get_enetaddr_by_index("eth", eth_get_dev_index(), ethaddr))
return -ENOENT;
sprintf(outbuf, "01-%02x-%02x-%02x-%02x-%02x-%02x",
char bootargs[CONFIG_SYS_CBSIZE];
cli_simple_process_macros(label->append, bootargs);
- setenv("bootargs", bootargs);
+ env_set("bootargs", bootargs);
}
debug("running: %s\n", localcmd);
}
bootm_argv[2] = initrd_str;
- strcpy(bootm_argv[2], getenv("ramdisk_addr_r"));
+ strcpy(bootm_argv[2], env_get("ramdisk_addr_r"));
strcat(bootm_argv[2], ":");
- strcat(bootm_argv[2], getenv("filesize"));
+ strcat(bootm_argv[2], env_get("filesize"));
}
if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
if (label->ipappend & 0x1) {
sprintf(ip_str, " ip=%s:%s:%s:%s",
- getenv("ipaddr"), getenv("serverip"),
- getenv("gatewayip"), getenv("netmask"));
+ env_get("ipaddr"), env_get("serverip"),
+ env_get("gatewayip"), env_get("netmask"));
}
#ifdef CONFIG_CMD_NET
strcat(bootargs, mac_str);
cli_simple_process_macros(bootargs, finalbootargs);
- setenv("bootargs", finalbootargs);
+ env_set("bootargs", finalbootargs);
printf("append: %s\n", finalbootargs);
}
- bootm_argv[1] = getenv("kernel_addr_r");
+ bootm_argv[1] = env_get("kernel_addr_r");
/*
* fdt usage is optional:
*
* Scenario 3: fdt blob is not available.
*/
- bootm_argv[3] = getenv("fdt_addr_r");
+ bootm_argv[3] = env_get("fdt_addr_r");
/* if fdt label is defined then get fdt from server */
if (bootm_argv[3]) {
} else if (label->fdtdir) {
char *f1, *f2, *f3, *f4, *slash;
- f1 = getenv("fdtfile");
+ f1 = env_get("fdtfile");
if (f1) {
f2 = "";
f3 = "";
* or the boot scripts should set $fdtfile
* before invoking "pxe" or "sysboot".
*/
- f1 = getenv("soc");
+ f1 = env_get("soc");
f2 = "-";
- f3 = getenv("board");
+ f3 = env_get("board");
f4 = ".dtb";
}
}
if (!bootm_argv[3])
- bootm_argv[3] = getenv("fdt_addr");
+ bootm_argv[3] = env_get("fdt_addr");
if (bootm_argv[3]) {
if (!bootm_argv[2])
}
if (argc < 6)
- filename = getenv("bootfile");
+ filename = env_get("bootfile");
else {
filename = argv[5];
- setenv("bootfile", filename);
+ env_set("bootfile", filename);
}
if (strstr(argv[3], "ext2"))
* when invoking qemu), do not update bootargs
*/
if (*data_addr != '\0') {
- if (setenv("bootargs", data_addr) < 0)
+ if (env_set("bootargs", data_addr) < 0)
printf("warning: unable to change bootargs\n");
}
}
void *load_addr;
void *initrd_addr;
- env = getenv("loadaddr");
+ env = env_get("loadaddr");
load_addr = env ?
(void *)simple_strtoul(env, NULL, 16) :
#ifdef CONFIG_LOADADDR
NULL;
#endif
- env = getenv("ramdiskaddr");
+ env = env_get("ramdiskaddr");
initrd_addr = env ?
(void *)simple_strtoul(env, NULL, 16) :
#ifdef CONFIG_RAMDISK_ADDR
return 1;
}
- if (blk_read(dev_desc, offset + blk, cnt, addr) < 0) {
+ if (blk_dread(dev_desc, offset + blk, cnt, addr) < 0) {
printf("Error reading blocks\n");
return 1;
}
switch (argc) {
case 3:
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str != NULL) {
addr = simple_strtoul (addr_str, NULL, 16);
} else {
addr = CONFIG_SYS_LOAD_ADDR;
}
- filename = getenv ("bootfile");
+ filename = env_get("bootfile");
count = 0;
break;
case 4:
addr = simple_strtoul (argv[3], NULL, 16);
- filename = getenv ("bootfile");
+ filename = env_get("bootfile");
count = 0;
break;
case 5:
load_addr = addr;
printf ("\n%ld bytes read\n", filelen);
- setenv_hex("filesize", filelen);
+ env_set_hex("filesize", filelen);
return filelen;
}
*/
#include <common.h>
+#include <ahci.h>
+#include <dm.h>
#include <command.h>
#include <part.h>
#include <sata.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
static int sata_curr_device = -1;
+int sata_remove(int devnum)
+{
+#ifdef CONFIG_AHCI
+ struct udevice *dev;
+ int rc;
+
+ rc = uclass_find_device(UCLASS_AHCI, devnum, &dev);
+ if (!rc && !dev)
+ rc = uclass_find_first_device(UCLASS_AHCI, &dev);
+ if (rc || !dev) {
+ printf("Cannot find SATA device %d (err=%d)\n", devnum, rc);
+ return CMD_RET_FAILURE;
+ }
+
+ rc = device_remove(dev, DM_REMOVE_NORMAL);
+ if (rc) {
+ printf("Cannot remove SATA device '%s' (err=%d)\n", dev->name,
+ rc);
+ return CMD_RET_FAILURE;
+ }
+
+ return 0;
+#else
+ return sata_stop();
+#endif
+}
+
+int sata_probe(int devnum)
+{
+#ifdef CONFIG_AHCI
+ struct udevice *dev;
+ struct udevice *blk;
+ int rc;
+
+ rc = uclass_get_device(UCLASS_AHCI, devnum, &dev);
+ if (rc)
+ rc = uclass_find_first_device(UCLASS_AHCI, &dev);
+ if (rc) {
+ printf("Cannot probe SATA device %d (err=%d)\n", devnum, rc);
+ return CMD_RET_FAILURE;
+ }
+ rc = sata_scan(dev);
+ if (rc) {
+ printf("Cannot scan SATA device %d (err=%d)\n", devnum, rc);
+ return CMD_RET_FAILURE;
+ }
+
+ rc = blk_get_from_parent(dev, &blk);
+ if (!rc) {
+ struct blk_desc *desc = dev_get_uclass_platdata(blk);
+
+ if (desc->lba > 0 && desc->blksz > 0)
+ part_init(desc);
+ }
+
+ return 0;
+#else
+ return sata_initialize() < 0 ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
+#endif
+}
+
static int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int rc = 0;
- if (argc == 2 && strcmp(argv[1], "stop") == 0)
- return sata_stop();
+ if (argc >= 2) {
+ int devnum = 0;
- if (argc == 2 && strcmp(argv[1], "init") == 0) {
- if (sata_curr_device != -1)
- sata_stop();
+ if (argc == 3)
+ devnum = (int)simple_strtoul(argv[2], NULL, 10);
+ if (!strcmp(argv[1], "stop"))
+ return sata_remove(devnum);
+
+ if (!strcmp(argv[1], "init")) {
+ if (sata_curr_device != -1) {
+ rc = sata_remove(devnum);
+ if (rc)
+ return rc;
+ }
- return (sata_initialize() < 0) ?
- CMD_RET_FAILURE : CMD_RET_SUCCESS;
+ return sata_probe(devnum);
+ }
}
/* If the user has not yet run `sata init`, do it now */
if (sata_curr_device == -1) {
- rc = sata_initialize();
- if (rc == -1)
+ rc = sata_probe(0);
+ if (rc < 0)
return CMD_RET_FAILURE;
- sata_curr_device = rc;
+ sata_curr_device = 0;
}
- switch (argc) {
- case 0:
- case 1:
- return CMD_RET_USAGE;
- case 2:
- if (strncmp(argv[1], "inf", 3) == 0) {
- blk_list_devices(IF_TYPE_SATA);
- return 0;
- } else if (strncmp(argv[1], "dev", 3) == 0) {
- if (blk_print_device_num(IF_TYPE_SATA,
- sata_curr_device)) {
- printf("\nno SATA devices available\n");
- return CMD_RET_FAILURE;
- }
- return 0;
- } else if (strncmp(argv[1], "part", 4) == 0) {
- if (blk_list_part(IF_TYPE_SATA))
- puts("\nno SATA devices available\n");
- return 0;
- }
- return CMD_RET_USAGE;
- case 3:
- if (strncmp(argv[1], "dev", 3) == 0) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
-
- if (!blk_show_device(IF_TYPE_SATA, dev)) {
- sata_curr_device = dev;
- printf("... is now current device\n");
- } else {
- return CMD_RET_FAILURE;
- }
- return 0;
- } else if (strncmp(argv[1], "part", 4) == 0) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
-
- if (blk_print_part_devnum(IF_TYPE_SATA, dev)) {
- printf("\nSATA device %d not available\n",
- dev);
- return CMD_RET_FAILURE;
- }
- return rc;
- }
- return CMD_RET_USAGE;
-
- default: /* at least 4 args */
- if (strcmp(argv[1], "read") == 0) {
- ulong addr = simple_strtoul(argv[2], NULL, 16);
- ulong cnt = simple_strtoul(argv[4], NULL, 16);
- ulong n;
- lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
-
- printf("\nSATA read: device %d block # %ld, count %ld ... ",
- sata_curr_device, blk, cnt);
-
- n = blk_read_devnum(IF_TYPE_SATA, sata_curr_device, blk,
- cnt, (ulong *)addr);
-
- printf("%ld blocks read: %s\n",
- n, (n==cnt) ? "OK" : "ERROR");
- return (n == cnt) ? 0 : 1;
- } else if (strcmp(argv[1], "write") == 0) {
- ulong addr = simple_strtoul(argv[2], NULL, 16);
- ulong cnt = simple_strtoul(argv[4], NULL, 16);
- ulong n;
-
- lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
-
- printf("\nSATA write: device %d block # %ld, count %ld ... ",
- sata_curr_device, blk, cnt);
-
- n = blk_write_devnum(IF_TYPE_SATA, sata_curr_device,
- blk, cnt, (ulong *)addr);
-
- printf("%ld blocks written: %s\n",
- n, (n == cnt) ? "OK" : "ERROR");
- return (n == cnt) ? 0 : 1;
- } else {
- return CMD_RET_USAGE;
- }
-
- return rc;
- }
+ return blk_common_cmd(argc, argv, IF_TYPE_SATA, &sata_curr_device);
}
U_BOOT_CMD(
sata, 5, 1, do_sata,
"SATA sub system",
"init - init SATA sub system\n"
- "sata stop - disable SATA sub system\n"
+ "sata stop [dev] - disable SATA sub system or device\n"
"sata info - show available SATA devices\n"
"sata device [dev] - show or set current device\n"
"sata part [dev] - print partition table\n"
{
int ret;
- switch (argc) {
- case 0:
- case 1:
- return CMD_RET_USAGE;
- case 2:
+ if (argc == 2) {
if (strncmp(argv[1], "res", 3) == 0) {
printf("\nReset SCSI\n");
#ifndef CONFIG_DM_SCSI
return CMD_RET_FAILURE;
return ret;
}
- if (strncmp(argv[1], "inf", 3) == 0) {
- blk_list_devices(IF_TYPE_SCSI);
- return 0;
- }
- if (strncmp(argv[1], "dev", 3) == 0) {
- if (blk_print_device_num(IF_TYPE_SCSI, scsi_curr_dev)) {
- printf("\nno SCSI devices available\n");
- return CMD_RET_FAILURE;
- }
-
- return 0;
- }
if (strncmp(argv[1], "scan", 4) == 0) {
ret = scsi_scan(true);
if (ret)
return CMD_RET_FAILURE;
return ret;
}
- if (strncmp(argv[1], "part", 4) == 0) {
- if (blk_list_part(IF_TYPE_SCSI))
- printf("\nno SCSI devices available\n");
- return 0;
- }
- return CMD_RET_USAGE;
- case 3:
- if (strncmp(argv[1], "dev", 3) == 0) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
+ }
- if (!blk_show_device(IF_TYPE_SCSI, dev)) {
- scsi_curr_dev = dev;
- printf("... is now current device\n");
- } else {
- return CMD_RET_FAILURE;
- }
- return 0;
- }
- if (strncmp(argv[1], "part", 4) == 0) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
-
- if (blk_print_part_devnum(IF_TYPE_SCSI, dev)) {
- printf("\nSCSI device %d not available\n",
- dev);
- return CMD_RET_FAILURE;
- }
- return 0;
- }
- return CMD_RET_USAGE;
- default:
- /* at least 4 args */
- if (strcmp(argv[1], "read") == 0) {
- ulong addr = simple_strtoul(argv[2], NULL, 16);
- ulong blk = simple_strtoul(argv[3], NULL, 16);
- ulong cnt = simple_strtoul(argv[4], NULL, 16);
- ulong n;
-
- printf("\nSCSI read: device %d block # %ld, count %ld ... ",
- scsi_curr_dev, blk, cnt);
- n = blk_read_devnum(IF_TYPE_SCSI, scsi_curr_dev, blk,
- cnt, (ulong *)addr);
- printf("%ld blocks read: %s\n", n,
- n == cnt ? "OK" : "ERROR");
- return 0;
- } else if (strcmp(argv[1], "write") == 0) {
- ulong addr = simple_strtoul(argv[2], NULL, 16);
- ulong blk = simple_strtoul(argv[3], NULL, 16);
- ulong cnt = simple_strtoul(argv[4], NULL, 16);
- ulong n;
-
- printf("\nSCSI write: device %d block # %ld, count %ld ... ",
- scsi_curr_dev, blk, cnt);
- n = blk_write_devnum(IF_TYPE_SCSI, scsi_curr_dev, blk,
- cnt, (ulong *)addr);
- printf("%ld blocks written: %s\n", n,
- n == cnt ? "OK" : "ERROR");
- return 0;
- }
- } /* switch */
- return CMD_RET_USAGE;
+ return blk_common_cmd(argc, argv, IF_TYPE_SCSI, &scsi_curr_dev);
}
U_BOOT_CMD(
}
if (t == NULL) {
- value = getenv(name);
+ value = env_get(name);
if (value == NULL) {
printf("## Error: variable \"%s\" not defined\n", name);
if (!global)
break;
}
- debug("## FINAL (now setenv()) : %s\n", data);
+ debug("## FINAL (now env_set()) : %s\n", data);
printf("%s=%s\n", name, data);
- return setenv(name, data);
+ return env_set(name, data);
}
#endif
/* plain assignment: "setexpr name value" */
if (argc == 3) {
- setenv_hex(argv[1], a);
+ env_set_hex(argv[1], a);
return 0;
}
return 1;
}
- setenv_hex(argv[1], value);
+ env_set_hex(argv[1], value);
return 0;
}
size_t fit_len;
#endif
- verify = getenv_yesno ("verify");
+ verify = env_get_yesno("verify");
buf = map_sysmem(addr, 0);
switch (genimg_get_format(buf)) {
default:
return -1;
}
- if (setenv_ulong(*vars, value))
+ if (env_set_ulong(*vars, value))
return -1;
}
&key_handle);
if (!err) {
printf("Key handle is 0x%x\n", key_handle);
- setenv_hex("key_handle", key_handle);
+ env_set_hex("key_handle", key_handle);
}
return report_return_code(err);
if (argc < 2)
return -1;
if (argc < 4) {
- *buff_size = getenv_ulong("profsize", 16, 0);
- *buff = map_sysmem(getenv_ulong("profbase", 16, 0),
+ *buff_size = env_get_ulong("profsize", 16, 0);
+ *buff = map_sysmem(env_get_ulong("profbase", 16, 0),
*buff_size);
- *buff_ptr = getenv_ulong("profoffset", 16, 0);
+ *buff_ptr = env_get_ulong("profoffset", 16, 0);
} else {
*buff_size = simple_strtoul(argv[3], NULL, 16);
*buff = map_sysmem(simple_strtoul(argv[2], NULL, 16),
used = min(avail, (size_t)needed);
printf("Function trace dumped to %08lx, size %#zx\n",
(ulong)map_to_sysmem(buff + buff_ptr), used);
- setenv_hex("profbase", map_to_sysmem(buff));
- setenv_hex("profsize", buff_size);
- setenv_hex("profoffset", buff_ptr + used);
+ env_set_hex("profbase", map_to_sysmem(buff));
+ env_set_hex("profsize", buff_size);
+ env_set_hex("profoffset", buff_ptr + used);
return 0;
}
printf("Call list dumped to %08lx, size %#zx\n",
(ulong)map_to_sysmem(buff + buff_ptr), used);
- setenv_hex("profbase", map_to_sysmem(buff));
- setenv_hex("profsize", buff_size);
- setenv_hex("profoffset", buff_ptr + used);
+ env_set_hex("profbase", map_to_sysmem(buff));
+ env_set_hex("profsize", buff_size);
+ env_set_hex("profoffset", buff_ptr + used);
return 0;
}
return 1;
printf("Uncompressed size: %ld = 0x%lX\n", src_len, src_len);
- setenv_hex("filesize", src_len);
+ env_set_hex("filesize", src_len);
return 0;
}
struct usb_device *udev = NULL;
int i;
extern char usb_started;
-#ifdef CONFIG_USB_STORAGE
- struct blk_desc *stor_dev;
-#endif
if (argc < 2)
return CMD_RET_USAGE;
if (strncmp(argv[1], "stor", 4) == 0)
return usb_stor_info();
- if (strncmp(argv[1], "part", 4) == 0) {
- int devno, ok = 0;
- if (argc == 2) {
- for (devno = 0; ; ++devno) {
- stor_dev = blk_get_devnum_by_type(IF_TYPE_USB,
- devno);
- if (stor_dev == NULL)
- break;
- if (stor_dev->type != DEV_TYPE_UNKNOWN) {
- ok++;
- if (devno)
- printf("\n");
- debug("print_part of %x\n", devno);
- part_print(stor_dev);
- }
- }
- } else {
- devno = simple_strtoul(argv[2], NULL, 16);
- stor_dev = blk_get_devnum_by_type(IF_TYPE_USB, devno);
- if (stor_dev != NULL &&
- stor_dev->type != DEV_TYPE_UNKNOWN) {
- ok++;
- debug("print_part of %x\n", devno);
- part_print(stor_dev);
- }
- }
- if (!ok) {
- printf("\nno USB devices available\n");
- return 1;
- }
- return 0;
- }
- if (strcmp(argv[1], "read") == 0) {
- if (usb_stor_curr_dev < 0) {
- printf("no current device selected\n");
- return 1;
- }
- if (argc == 5) {
- unsigned long addr = simple_strtoul(argv[2], NULL, 16);
- unsigned long blk = simple_strtoul(argv[3], NULL, 16);
- unsigned long cnt = simple_strtoul(argv[4], NULL, 16);
- unsigned long n;
- printf("\nUSB read: device %d block # %ld, count %ld"
- " ... ", usb_stor_curr_dev, blk, cnt);
- stor_dev = blk_get_devnum_by_type(IF_TYPE_USB,
- usb_stor_curr_dev);
- n = blk_dread(stor_dev, blk, cnt, (ulong *)addr);
- printf("%ld blocks read: %s\n", n,
- (n == cnt) ? "OK" : "ERROR");
- if (n == cnt)
- return 0;
- return 1;
- }
- }
- if (strcmp(argv[1], "write") == 0) {
- if (usb_stor_curr_dev < 0) {
- printf("no current device selected\n");
- return 1;
- }
- if (argc == 5) {
- unsigned long addr = simple_strtoul(argv[2], NULL, 16);
- unsigned long blk = simple_strtoul(argv[3], NULL, 16);
- unsigned long cnt = simple_strtoul(argv[4], NULL, 16);
- unsigned long n;
- printf("\nUSB write: device %d block # %ld, count %ld"
- " ... ", usb_stor_curr_dev, blk, cnt);
- stor_dev = blk_get_devnum_by_type(IF_TYPE_USB,
- usb_stor_curr_dev);
- n = blk_dwrite(stor_dev, blk, cnt, (ulong *)addr);
- printf("%ld blocks write: %s\n", n,
- (n == cnt) ? "OK" : "ERROR");
- if (n == cnt)
- return 0;
- return 1;
- }
- }
- if (strncmp(argv[1], "dev", 3) == 0) {
- if (argc == 3) {
- int dev = (int)simple_strtoul(argv[2], NULL, 10);
- printf("\nUSB device %d: ", dev);
- stor_dev = blk_get_devnum_by_type(IF_TYPE_USB, dev);
- if ((stor_dev == NULL) ||
- (stor_dev->if_type == IF_TYPE_UNKNOWN)) {
- printf("unknown device\n");
- return 1;
- }
- printf("\n Device %d: ", dev);
- dev_print(stor_dev);
- if (stor_dev->type == DEV_TYPE_UNKNOWN)
- return 1;
- usb_stor_curr_dev = dev;
- printf("... is now current device\n");
- return 0;
- } else {
- printf("\nUSB device %d: ", usb_stor_curr_dev);
- stor_dev = blk_get_devnum_by_type(IF_TYPE_USB,
- usb_stor_curr_dev);
- dev_print(stor_dev);
- if (stor_dev->type == DEV_TYPE_UNKNOWN)
- return 1;
- return 0;
- }
- return 0;
- }
-#endif /* CONFIG_USB_STORAGE */
+ return blk_common_cmd(argc, argv, IF_TYPE_USB, &usb_stor_curr_dev);
+#else
return CMD_RET_USAGE;
+#endif /* CONFIG_USB_STORAGE */
}
U_BOOT_CMD(
#endif
uint8_t comp;
- verify = getenv_yesno("verify");
+ verify = env_get_yesno("verify");
if (argc > 1) {
addr = simple_strtoul(argv[1], NULL, 16);
flush_cache(dest, len);
- setenv_hex("fileaddr", data);
- setenv_hex("filesize", len);
+ env_set_hex("fileaddr", data);
+ env_set_hex("filesize", len);
return 0;
}
count = 0;
addr = simple_strtoul(argv[3], NULL, 16);
- filename = getenv("bootfile");
+ filename = env_get("bootfile");
switch (argc) {
case 3:
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str != NULL)
addr = simple_strtoul(addr_str, NULL, 16);
else
load_addr = addr;
printf("%llu bytes read\n", zfile.size);
- setenv_hex("filesize", zfile.size);
+ env_set_hex("filesize", zfile.size);
return 0;
}
return 1;
printf("Compressed size: %ld = 0x%lX\n", dst_len, dst_len);
- setenv_hex("filesize", dst_len);
+ env_set_hex("filesize", dst_len);
return 0;
}
endmenu
-menu "Environment"
-
-config ENV_IS_IN_DATAFLASH
- bool "Environment in dataflash"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a DataFlash memory device which you
- want to use for the environment.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These three #defines specify the offset and size of the
- environment area within the total memory of your DataFlash placed
- at the specified address.
-
-config ENV_IS_IN_EEPROM
- bool "Environment in EEPROM"
- depends on !CHAIN_OF_TRUST
- help
- Use this if you have an EEPROM or similar serial access
- device and a driver for it.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the
- environment area within the total memory of your EEPROM.
-
- - CONFIG_SYS_I2C_EEPROM_ADDR:
- If defined, specified the chip address of the EEPROM device.
- The default address is zero.
-
- - CONFIG_SYS_I2C_EEPROM_BUS:
- If defined, specified the i2c bus of the EEPROM device.
-
- - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
- If defined, the number of bits used to address bytes in a
- single page in the EEPROM device. A 64 byte page, for example
- would require six bits.
-
- - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
- If defined, the number of milliseconds to delay between
- page writes. The default is zero milliseconds.
-
- - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
- The length in bytes of the EEPROM memory array address. Note
- that this is NOT the chip address length!
-
- - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
- EEPROM chips that implement "address overflow" are ones
- like Catalyst 24WC04/08/16 which has 9/10/11 bits of
- address and the extra bits end up in the "chip address" bit
- slots. This makes a 24WC08 (1Kbyte) chip look like four 256
- byte chips.
-
- Note that we consider the length of the address field to
- still be one byte because the extra address bits are hidden
- in the chip address.
-
- - CONFIG_SYS_EEPROM_SIZE:
- The size in bytes of the EEPROM device.
-
- - CONFIG_ENV_EEPROM_IS_ON_I2C
- define this, if you have I2C and SPI activated, and your
- EEPROM, which holds the environment, is on the I2C bus.
-
- - CONFIG_I2C_ENV_EEPROM_BUS
- if you have an Environment on an EEPROM reached over
- I2C muxes, you can define here, how to reach this
- EEPROM. For example:
-
- #define CONFIG_I2C_ENV_EEPROM_BUS 1
-
- EEPROM which holds the environment, is reached over
- a pca9547 i2c mux with address 0x70, channel 3.
-
-config ENV_IS_IN_FAT
- bool "Environment is in a FAT filesystem"
- depends on !CHAIN_OF_TRUST
- select FAT_WRITE
- help
- Define this if you want to use the FAT file system for the environment.
-
-
- - CONFIG_FAT_WRITE:
- This must be enabled. Otherwise it cannot save the environment file.
-
-config ENV_IS_IN_FLASH
- bool "Environment in flash memory"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a flash device which you want to use for the
- environment.
-
- a) The environment occupies one whole flash sector, which is
- "embedded" in the text segment with the U-Boot code. This
- happens usually with "bottom boot sector" or "top boot
- sector" type flash chips, which have several smaller
- sectors at the start or the end. For instance, such a
- layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
- such a case you would place the environment in one of the
- 4 kB sectors - with U-Boot code before and after it. With
- "top boot sector" type flash chips, you would put the
- environment in one of the last sectors, leaving a gap
- between U-Boot and the environment.
-
- CONFIG_ENV_OFFSET:
-
- Offset of environment data (variable area) to the
- beginning of flash memory; for instance, with bottom boot
- type flash chips the second sector can be used: the offset
- for this sector is given here.
-
- CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
-
- CONFIG_ENV_ADDR:
-
- This is just another way to specify the start address of
- the flash sector containing the environment (instead of
- CONFIG_ENV_OFFSET).
-
- CONFIG_ENV_SECT_SIZE:
-
- Size of the sector containing the environment.
-
-
- b) Sometimes flash chips have few, equal sized, BIG sectors.
- In such a case you don't want to spend a whole sector for
- the environment.
-
- CONFIG_ENV_SIZE:
-
- If you use this in combination with CONFIG_ENV_IS_IN_FLASH
- and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
- of this flash sector for the environment. This saves
- memory for the RAM copy of the environment.
-
- It may also save flash memory if you decide to use this
- when your environment is "embedded" within U-Boot code,
- since then the remainder of the flash sector could be used
- for U-Boot code. It should be pointed out that this is
- STRONGLY DISCOURAGED from a robustness point of view:
- updating the environment in flash makes it always
- necessary to erase the WHOLE sector. If something goes
- wrong before the contents has been restored from a copy in
- RAM, your target system will be dead.
-
- CONFIG_ENV_ADDR_REDUND
- CONFIG_ENV_SIZE_REDUND
-
- These settings describe a second storage area used to hold
- a redundant copy of the environment data, so that there is
- a valid backup copy in case there is a power failure during
- a "saveenv" operation.
-
- BE CAREFUL! Any changes to the flash layout, and some changes to the
- source code will make it necessary to adapt <board>/u-boot.lds*
- accordingly!
-
-config ENV_IS_IN_MMC
- bool "Environment in an MMC device"
- depends on !CHAIN_OF_TRUST
- default y if ARCH_SUNXI
- help
- Define this if you have an MMC device which you want to use for the
- environment.
-
- CONFIG_SYS_MMC_ENV_DEV:
-
- Specifies which MMC device the environment is stored in.
-
- CONFIG_SYS_MMC_ENV_PART (optional):
-
- Specifies which MMC partition the environment is stored in. If not
- set, defaults to partition 0, the user area. Common values might be
- 1 (first MMC boot partition), 2 (second MMC boot partition).
-
- CONFIG_ENV_OFFSET:
- CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the environment
- area within the specified MMC device.
-
- If offset is positive (the usual case), it is treated as relative to
- the start of the MMC partition. If offset is negative, it is treated
- as relative to the end of the MMC partition. This can be useful if
- your board may be fitted with different MMC devices, which have
- different sizes for the MMC partitions, and you always want the
- environment placed at the very end of the partition, to leave the
- maximum possible space before it, to store other data.
-
- These two values are in units of bytes, but must be aligned to an
- MMC sector boundary.
-
- CONFIG_ENV_OFFSET_REDUND (optional):
-
- Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
- hold a redundant copy of the environment data. This provides a
- valid backup copy in case the other copy is corrupted, e.g. due
- to a power failure during a "saveenv" operation.
-
- This value may also be positive or negative; this is handled in the
- same way as CONFIG_ENV_OFFSET.
-
- This value is also in units of bytes, but must also be aligned to
- an MMC sector boundary.
-
- CONFIG_ENV_SIZE_REDUND (optional):
-
- This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
- set. If this value is set, it must be set to the same value as
- CONFIG_ENV_SIZE.
-
-config ENV_IS_IN_NAND
- bool "Environment in a NAND device"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a NAND device which you want to use for the
- environment.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the environment
- area within the first NAND device. CONFIG_ENV_OFFSET must be
- aligned to an erase block boundary.
-
- - CONFIG_ENV_OFFSET_REDUND (optional):
-
- This setting describes a second storage area of CONFIG_ENV_SIZE
- size used to hold a redundant copy of the environment data, so
- that there is a valid backup copy in case there is a power failure
- during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
- aligned to an erase block boundary.
-
- - CONFIG_ENV_RANGE (optional):
-
- Specifies the length of the region in which the environment
- can be written. This should be a multiple of the NAND device's
- block size. Specifying a range with more erase blocks than
- are needed to hold CONFIG_ENV_SIZE allows bad blocks within
- the range to be avoided.
-
- - CONFIG_ENV_OFFSET_OOB (optional):
-
- Enables support for dynamically retrieving the offset of the
- environment from block zero's out-of-band data. The
- "nand env.oob" command can be used to record this offset.
- Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
- using CONFIG_ENV_OFFSET_OOB.
-
-config ENV_IS_IN_NVRAM
- bool "Environment in a non-volatile RAM"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have some non-volatile memory device
- (NVRAM, battery buffered SRAM) which you want to use for the
- environment.
-
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These two #defines are used to determine the memory area you
- want to use for environment. It is assumed that this memory
- can just be read and written to, without any special
- provision.
-
-config ENV_IS_IN_ONENAND
- bool "Environment is in OneNAND"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you want to put your local device's environment in
- OneNAND.
-
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These two #defines are used to determine the device range you
- want to use for environment. It is assumed that this memory
- can just be read and written to, without any special
- provision.
-
-config ENV_IS_IN_REMOTE
- bool "Environment is in remove memory space"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a remote memory space which you
- want to use for the local device's environment.
-
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the address and size of the
- environment area within the remote memory space. The
- local device can get the environment from remote memory
- space by SRIO or PCIE links.
-
-config ENV_IS_IN_SPI_FLASH
- bool "Environment is in SPI flash"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a SPI Flash memory device which you
- want to use for the environment.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the
- environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
- aligned to an erase sector boundary.
-
- - CONFIG_ENV_SECT_SIZE:
-
- Define the SPI flash's sector size.
-
- - CONFIG_ENV_OFFSET_REDUND (optional):
-
- This setting describes a second storage area of CONFIG_ENV_SIZE
- size used to hold a redundant copy of the environment data, so
- that there is a valid backup copy in case there is a power failure
- during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
- aligned to an erase sector boundary.
-
- - CONFIG_ENV_SPI_BUS (optional):
- - CONFIG_ENV_SPI_CS (optional):
-
- Define the SPI bus and chip select. If not defined they will be 0.
-
- - CONFIG_ENV_SPI_MAX_HZ (optional):
-
- Define the SPI max work clock. If not defined then use 1MHz.
-
- - CONFIG_ENV_SPI_MODE (optional):
-
- Define the SPI work mode. If not defined then use SPI_MODE_3.
-
-config ENV_IS_IN_UBI
- bool "Environment in a UBI volume"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have an UBI volume that you want to use for the
- environment. This has the benefit of wear-leveling the environment
- accesses, which is important on NAND.
-
- - CONFIG_ENV_UBI_PART:
-
- Define this to a string that is the mtd partition containing the UBI.
-
- - CONFIG_ENV_UBI_VOLUME:
-
- Define this to the name of the volume that you want to store the
- environment in.
-
- - CONFIG_ENV_UBI_VOLUME_REDUND:
-
- Define this to the name of another volume to store a second copy of
- the environment in. This will enable redundant environments in UBI.
- It is assumed that both volumes are in the same MTD partition.
-
- - CONFIG_UBI_SILENCE_MSG
- - CONFIG_UBIFS_SILENCE_MSG
-
- You will probably want to define these to avoid a really noisy system
- when storing the env in UBI.
-
-config ENV_IS_NOWHERE
- bool "Environment is not stored"
- help
- Define this if you don't want to or can't have an environment stored
- on a storage medium
-
-config ENV_FAT_INTERFACE
- string "Name of the block device for the environment"
- depends on ENV_IS_IN_FAT
- default "mmc" if TI_COMMON_CMD_OPTIONS || ARCH_ZYNQMP || ARCH_AT91
- help
- Define this to a string that is the name of the block device.
-
-config ENV_FAT_DEVICE_AND_PART
- string "Device and partition for where to store the environemt in FAT"
- depends on ENV_IS_IN_FAT
- default "0:1" if TI_COMMON_CMD_OPTIONS
- default "0:auto" if ARCH_ZYNQMP
- default "0" if ARCH_AT91
- help
- Define this to a string to specify the partition of the device. It can
- be as following:
-
- "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
- - "D:P": device D partition P. Error occurs if device D has no
- partition table.
- - "D:0": device D.
- - "D" or "D:": device D partition 1 if device D has partition
- table, or the whole device D if has no partition
- table.
- - "D:auto": first partition in device D with bootable flag set.
- If none, first valid partition in device D. If no
- partition table then means device D.
-
-config ENV_FAT_FILE
- string "Name of the FAT file to use for the environemnt"
- depends on ENV_IS_IN_FAT
- default "uboot.env"
- help
- It's a string of the FAT file name. This file use to store the
- environment.
-
-if ARCH_SUNXI
-
-config ENV_OFFSET
- hex "Environment Offset"
- depends on !ENV_IS_IN_UBI
- depends on !ENV_IS_NOWHERE
- default 0x88000 if ARCH_SUNXI
- help
- Offset from the start of the device (or partition)
-
-config ENV_SIZE
- hex "Environment Size"
- depends on !ENV_IS_NOWHERE
- default 0x20000 if ARCH_SUNXI
- help
- Size of the environment storage area
-
-config ENV_UBI_PART
- string "UBI partition name"
- depends on ENV_IS_IN_UBI
- help
- MTD partition containing the UBI device
-
-config ENV_UBI_VOLUME
- string "UBI volume name"
- depends on ENV_IS_IN_UBI
- help
- Name of the volume that you want to store the environment in.
-
-endif
-
-endmenu
-
config BOOTDELAY
int "delay in seconds before automatically booting"
default 2
See doc/README.autoboot for details.
+config USE_BOOTARGS
+ bool "Enable boot arguments"
+ help
+ Provide boot arguments to bootm command. Boot arguments are specified
+ in CONFIG_BOOTARGS option. Enable this option to be able to specify
+ CONFIG_BOOTARGS string. If this option is disabled, CONFIG_BOOTARGS
+ will be undefined and won't take any space in U-Boot image.
+
+config BOOTARGS
+ string "Boot arguments"
+ depends on USE_BOOTARGS
+ help
+ This can be used to pass arguments to the bootm command. The value of
+ CONFIG_BOOTARGS goes into the environment value "bootargs". Note that
+ this value will also override the "chosen" node in FDT blob.
+
menu "Console"
config MENU
obj-y += bootretry.o
endif
-# boards
+# # boards
obj-y += board_f.o
obj-y += board_r.o
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
obj-$(CONFIG_CMD_BOOTZ) += bootm.o bootm_os.o
obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o
-# environment
-obj-y += env_attr.o
-obj-y += env_callback.o
-obj-y += env_flags.o
-obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
-obj-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
-extra-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o
-obj-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o
-extra-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o
-obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o
-obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
-obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
-obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
-obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o
-obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
-obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
-obj-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
-obj-$(CONFIG_ENV_IS_IN_SATA) += env_sata.o
-obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
-obj-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o
-obj-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o
-obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
-
obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
-obj-$(CONFIG_$(SPL_)OF_LIBFDT) += fdt_support.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
obj-$(CONFIG_MII) += miiphyutil.o
obj-$(CONFIG_CMD_MII) += miiphyutil.o
obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o
obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o
obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
-obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
-obj-$(CONFIG_SPL_OF_LIBFDT) += fdt_support.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
ifdef CONFIG_SPL_USB_HOST_SUPPORT
obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o
obj-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
-# environment
-ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_TPL_ENV_SUPPORT) += env_attr.o
-obj-$(CONFIG_TPL_ENV_SUPPORT) += env_flags.o
-obj-$(CONFIG_TPL_ENV_SUPPORT) += env_callback.o
-else
-obj-$(CONFIG_SPL_ENV_SUPPORT) += env_attr.o
-obj-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o
-obj-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o
-endif
-ifneq ($(CONFIG_TPL_ENV_SUPPORT)$(CONFIG_SPL_ENV_SUPPORT),)
-obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
-obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
-obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
-obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o
-obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
-obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
-obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
-endif
endif
-#environment
-obj-y += env_common.o
#others
obj-$(CONFIG_DDR_SPD) += ddr_spd.o
obj-$(CONFIG_SPD_EEPROM) += ddr_spd.o
endif
obj-y += image.o
obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
-obj-$(CONFIG_$(SPL_)OF_LIBFDT) += image-fdt.o
-obj-$(CONFIG_$(SPL_)FIT) += image-fit.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
+obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
-obj-$(CONFIG_$(SPL_)FIT_SIGNATURE) += image-sig.o
+obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
obj-$(CONFIG_IO_TRACE) += iotrace.o
obj-y += memsize.o
obj-y += stdio.o
obj-y += command.o
obj-y += s_record.o
obj-y += xyzModem.o
-
-CFLAGS_env_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools/envcrc 2>/dev/null)
static int passwd_abort(uint64_t etime)
{
- const char *sha_env_str = getenv("bootstopkeysha256");
+ const char *sha_env_str = env_get("bootstopkeysha256");
u8 sha_env[SHA256_SUM_LEN];
u8 sha[SHA256_SUM_LEN];
char presskey[MAX_DELAY_STOP_STR];
int retry;
}
delaykey[] = {
- { .str = getenv("bootdelaykey"), .retry = 1 },
- { .str = getenv("bootstopkey"), .retry = 0 },
+ { .str = env_get("bootdelaykey"), .retry = 1 },
+ { .str = env_get("bootstopkey"), .retry = 0 },
};
char presskey[MAX_DELAY_STOP_STR];
/* Add an env variable to point to a kernel payload, if available */
addr = fdtdec_get_config_int(gd->fdt_blob, "kernel-offset", 0);
if (addr)
- setenv_addr("kernaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
+ env_set_addr("kernaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
/* Add an env variable to point to a root disk, if available */
addr = fdtdec_get_config_int(gd->fdt_blob, "rootdisk-offset", 0);
if (addr)
- setenv_addr("rootaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
+ env_set_addr("rootaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
#endif /* CONFIG_OF_CONTROL && CONFIG_SYS_TEXT_BASE */
}
bootcount = bootcount_load();
bootcount++;
bootcount_store(bootcount);
- setenv_ulong("bootcount", bootcount);
- bootlimit = getenv_ulong("bootlimit", 10, 0);
+ env_set_ulong("bootcount", bootcount);
+ bootlimit = env_get_ulong("bootlimit", 10, 0);
#endif /* CONFIG_BOOTCOUNT_LIMIT */
- s = getenv("bootdelay");
+ s = env_get("bootdelay");
bootdelay = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
#ifdef CONFIG_OF_CONTROL
#ifdef CONFIG_POST
if (gd->flags & GD_FLG_POSTFAIL) {
- s = getenv("failbootcmd");
+ s = env_get("failbootcmd");
} else
#endif /* CONFIG_POST */
#ifdef CONFIG_BOOTCOUNT_LIMIT
if (bootlimit && (bootcount > bootlimit)) {
printf("Warning: Bootlimit (%u) exceeded. Using altbootcmd.\n",
(unsigned)bootlimit);
- s = getenv("altbootcmd");
+ s = env_get("altbootcmd");
} else
#endif /* CONFIG_BOOTCOUNT_LIMIT */
- s = getenv("bootcmd");
+ s = env_get("bootcmd");
process_fdt_options(gd->fdt_blob);
stored_bootdelay = bootdelay;
#ifdef CONFIG_MENUKEY
if (menukey == CONFIG_MENUKEY) {
- s = getenv("menucmd");
+ s = env_get("menucmd");
if (s)
run_command_list(s, -1, 0);
}
static int init_baud_rate(void)
{
- gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
+ gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
return 0;
}
{
ulong reg;
- reg = getenv_ulong("pram", 10, CONFIG_PRAM);
+ reg = env_get_ulong("pram", 10, CONFIG_PRAM);
gd->relocaddr -= (reg << 10); /* size is in kB */
debug("Reserving %ldk for protected RAM at %08lx\n", reg,
gd->relocaddr);
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
- if (getenv_yesno("flashchecksum") == 1) {
+ if (env_get_yesno("flashchecksum") == 1) {
printf(" CRC: %08X", crc32(0,
(const unsigned char *) CONFIG_SYS_FLASH_BASE,
flash_size));
else
set_default_env(NULL);
#ifdef CONFIG_OF_CONTROL
- setenv_addr("fdtcontroladdr", gd->fdt_blob);
+ env_set_addr("fdtcontroladdr", gd->fdt_blob);
#endif
/* Initialize from environment */
- load_addr = getenv_ulong("loadaddr", 16, load_addr);
+ load_addr = env_get_ulong("loadaddr", 16, load_addr);
return 0;
}
bd_t *bd = gd->bd;
/* kept around for legacy kernels only ... ignore the next section */
- eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
+ eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr);
#ifdef CONFIG_HAS_ETH1
- eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
+ eth_env_get_enetaddr("eth1addr", bd->bi_enet1addr);
#endif
#ifdef CONFIG_HAS_ETH2
- eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
+ eth_env_get_enetaddr("eth2addr", bd->bi_enet2addr);
#endif
#ifdef CONFIG_HAS_ETH3
- eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
+ eth_env_get_enetaddr("eth3addr", bd->bi_enet3addr);
#endif
#ifdef CONFIG_HAS_ETH4
- eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
+ eth_env_get_enetaddr("eth4addr", bd->bi_enet4addr);
#endif
#ifdef CONFIG_HAS_ETH5
- eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
+ eth_env_get_enetaddr("eth5addr", bd->bi_enet5addr);
#endif
return 0;
}
char memsz[32];
# ifdef CONFIG_PRAM
- pram = getenv_ulong("pram", 10, CONFIG_PRAM);
+ pram = env_get_ulong("pram", 10, CONFIG_PRAM);
# endif
# if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
# endif
sprintf(memsz, "%ldk", (long int) ((gd->ram_size / 1024) - pram));
- setenv("mem", memsz);
+ env_set("mem", memsz);
return 0;
}
images = fdt_path_offset(fit, FIT_IMAGES_PATH);
if (images < 0) {
debug("%s: Cannot find /images node: %d\n", __func__, images);
- return FDT_ERROR;
+ return -EINVAL;
}
fdt_name = fdt_getprop(fit, node, FIT_FDT_PROP, &fdt_len);
lmb_init(&images->lmb);
- mem_start = getenv_bootm_low();
- mem_size = getenv_bootm_size();
+ mem_start = env_get_bootm_low();
+ mem_size = env_get_bootm_size();
lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
char * const argv[])
{
memset((void *)&images, 0, sizeof(images));
- images.verify = getenv_yesno("verify");
+ images.verify = env_get_yesno("verify");
boot_start_lmb(&images);
{
char *buf;
const char *env_val;
- char *cmdline = getenv("bootargs");
+ char *cmdline = env_get("bootargs");
int want_silent;
/*
* yes - we always fixup
* unset - we rely on the console silent flag
*/
- want_silent = getenv_yesno("silent_linux");
+ want_silent = env_get_yesno("silent_linux");
if (want_silent == 0)
return;
else if (want_silent == -1 && !(gd->flags & GD_FLG_SILENT))
env_val = CONSOLE_ARG;
}
- setenv("bootargs", env_val);
+ env_set("bootargs", env_val);
debug("after silent fix-up: %s\n", env_val);
free(buf);
}
ret = boot_ramdisk_high(&images->lmb, images->rd_start,
rd_len, &images->initrd_start, &images->initrd_end);
if (!ret) {
- setenv_hex("initrd_start", images->initrd_start);
- setenv_hex("initrd_end", images->initrd_end);
+ env_set_hex("initrd_start", images->initrd_start);
+ env_set_hex("initrd_end", images->initrd_end);
}
}
#endif
#ifdef CONFIG_TRACE
/* Pretend to run the OS, then run a user command */
if (!ret && (states & BOOTM_STATE_OS_FAKE_GO)) {
- char *cmd_list = getenv("fakegocmd");
+ char *cmd_list = env_get("fakegocmd");
ret = boot_selected_os(argc, argv, BOOTM_STATE_OS_FAKE_GO,
images, boot_fn);
int (*appl)(int, char *const[]);
/* Don't start if "autostart" is set to "no" */
- s = getenv("autostart");
+ s = env_get("autostart");
if ((s != NULL) && !strcmp(s, "no")) {
- setenv_hex("filesize", images->os.image_len);
+ env_set_hex("filesize", images->os.image_len);
return 0;
}
appl = (int (*)(int, char * const []))images->ep;
cmdline = malloc(len);
copy_args(cmdline, argc, argv, ' ');
} else {
- cmdline = getenv("bootargs");
+ cmdline = env_get("bootargs");
if (cmdline == NULL)
cmdline = "";
}
#endif
/* See README.plan9 */
- s = getenv("confaddr");
+ s = env_get("confaddr");
if (s != NULL) {
char *confaddr = (char *)simple_strtoul(s, NULL, 16);
if (argc > 0) {
copy_args(confaddr, argc, argv, '\n');
} else {
- s = getenv("bootargs");
+ s = env_get("bootargs");
if (s != NULL)
strcpy(confaddr, s);
}
ret = fdt_add_subnode(*of_flat_tree, 0, "chosen");
if ((ret >= 0 || ret == -FDT_ERR_EXISTS)) {
- bootline = getenv("bootargs");
+ bootline = env_get("bootargs");
if (bootline) {
ret = fdt_find_and_setprop(*of_flat_tree,
"/chosen", "bootargs",
*/
void bootretry_init_cmd_timeout(void)
{
- char *s = getenv("bootretry");
+ char *s = env_get("bootretry");
if (s != NULL)
retry_time = (int)simple_strtol(s, NULL, 10);
for (i = 1; i < argc; ++i) {
char *arg;
- arg = getenv(argv[i]);
+ arg = env_get(argv[i]);
if (arg == NULL) {
printf("## Error: \"%s\" not defined\n", argv[i]);
return 1;
{
char *newdir;
if (child->argv[1] == NULL)
- newdir = getenv("HOME");
+ newdir = env_get("HOME");
else
newdir = child->argv[1];
if (chdir(newdir)) {
#ifndef CONFIG_FEATURE_SH_FANCY_PROMPT
PS1 = NULL;
#else
- PS1 = getenv("PS1");
+ PS1 = env_get("PS1");
if(PS1==0)
PS1 = "\\w \\$ ";
#endif
#ifdef CONFIG_CMDLINE_PS_SUPPORT
if (i->promptmode == 1)
- ps_prompt = getenv("PS1");
+ ps_prompt = env_get("PS1");
else
- ps_prompt = getenv("PS2");
+ ps_prompt = env_get("PS2");
if (ps_prompt)
prompt = ps_prompt;
#endif
name=strdup(s);
#ifdef __U_BOOT__
- if (getenv(name) != NULL) {
+ if (env_get(name) != NULL) {
printf ("ERROR: "
"There is a global environment variable with the same name.\n");
free(name);
} else {
#ifndef __U_BOOT__
if(cur->flg_export)
- unsetenv(cur->name);
+ unenv_set(cur->name);
#endif
free(cur->name);
free(cur->value);
}
}
- p = getenv(src);
+ p = env_get(src);
if (!p)
p = get_local_var(src);
static void update_ifs_map(void)
{
/* char *ifs and char map[256] are both globals. */
- ifs = (uchar *)getenv("IFS");
+ ifs = (uchar *)env_get("IFS");
if (ifs == NULL) ifs=(uchar *)" \t\n";
/* Precompute a list of 'flow through' behavior so it can be treated
* quickly up front. Computation is necessary because of IFS.
envname[i] = 0;
/* Get its value */
- envval = getenv(envname);
+ envval = env_get(envname);
/* Copy into the line if it exists */
if (envval != NULL)
* WARNING:
*
* We must create a temporary copy of the command since the command we get
- * may be the result from getenv(), which returns a pointer directly to
+ * may be the result from env_get(), which returns a pointer directly to
* the environment data, which may change magicly when the command we run
* creates or modifies environment variables (like "bootp" does).
*/
static void console_update_silent(void)
{
#ifdef CONFIG_SILENT_CONSOLE
- if (getenv("silent") != NULL)
+ if (env_get("silent") != NULL)
gd->flags |= GD_FLG_SILENT;
else
gd->flags &= ~GD_FLG_SILENT;
/* stdin stdout and stderr are in environment */
/* scan for it */
- stdinname = getenv("stdin");
- stdoutname = getenv("stdout");
- stderrname = getenv("stderr");
+ stdinname = env_get("stdin");
+ stdoutname = env_get("stdout");
+ stderrname = env_get("stderr");
if (OVERWRITE_CONSOLE == 0) { /* if not overwritten by config switch */
inputdev = search_device(DEV_FLAGS_INPUT, stdinname);
#ifdef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
/* set the environment variables (will overwrite previous env settings) */
for (i = 0; i < 3; i++) {
- setenv(stdio_names[i], stdio_devices[i]->name);
+ env_set(stdio_names[i], stdio_devices[i]->name);
}
#endif /* CONFIG_SYS_CONSOLE_ENV_OVERWRITE */
* console to serial console in this case or suppress it if
* "silent" mode was requested.
*/
- if (getenv("splashimage") != NULL) {
+ if (env_get("splashimage") != NULL) {
if (!(gd->flags & GD_FLG_SILENT))
outputdev = search_device (DEV_FLAGS_OUTPUT, "serial");
}
/* Setting environment variables */
for (i = 0; i < 3; i++) {
- setenv(stdio_names[i], stdio_devices[i]->name);
+ env_set(stdio_names[i], stdio_devices[i]->name);
}
gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */
+++ /dev/null
-/*
- * (C) Copyright 2012
- * Joe Hershberger, National Instruments, joe.hershberger@ni.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */
-#include <stdint.h>
-#include <stdio.h>
-#include <linux/linux_string.h>
-#else
-#include <common.h>
-#include <slre.h>
-#endif
-
-#include <env_attr.h>
-#include <errno.h>
-#include <linux/string.h>
-#include <malloc.h>
-
-/*
- * Iterate through the whole list calling the callback for each found element.
- * "attr_list" takes the form:
- * attributes = [^,:\s]*
- * entry = name[:attributes]
- * list = entry[,list]
- */
-int env_attr_walk(const char *attr_list,
- int (*callback)(const char *name, const char *attributes, void *priv),
- void *priv)
-{
- const char *entry, *entry_end;
- char *name, *attributes;
-
- if (!attr_list)
- /* list not found */
- return 1;
-
- entry = attr_list;
- do {
- char *entry_cpy = NULL;
-
- entry_end = strchr(entry, ENV_ATTR_LIST_DELIM);
- /* check if this is the last entry in the list */
- if (entry_end == NULL) {
- int entry_len = strlen(entry);
-
- if (entry_len) {
- /*
- * allocate memory to copy the entry into since
- * we will need to inject '\0' chars and squash
- * white-space before calling the callback
- */
- entry_cpy = malloc(entry_len + 1);
- if (entry_cpy)
- /* copy the rest of the list */
- strcpy(entry_cpy, entry);
- else
- return -ENOMEM;
- }
- } else {
- int entry_len = entry_end - entry;
-
- if (entry_len) {
- /*
- * allocate memory to copy the entry into since
- * we will need to inject '\0' chars and squash
- * white-space before calling the callback
- */
- entry_cpy = malloc(entry_len + 1);
- if (entry_cpy) {
- /* copy just this entry and null term */
- strncpy(entry_cpy, entry, entry_len);
- entry_cpy[entry_len] = '\0';
- } else
- return -ENOMEM;
- }
- }
-
- /* check if there is anything to process (e.g. not ",,,") */
- if (entry_cpy != NULL) {
- attributes = strchr(entry_cpy, ENV_ATTR_SEP);
- /* check if there is a ':' */
- if (attributes != NULL) {
- /* replace the ':' with '\0' to term name */
- *attributes++ = '\0';
- /* remove white-space from attributes */
- attributes = strim(attributes);
- }
- /* remove white-space from name */
- name = strim(entry_cpy);
-
- /* only call the callback if there is a name */
- if (strlen(name) != 0) {
- int retval = 0;
-
- retval = callback(name, attributes, priv);
- if (retval) {
- free(entry_cpy);
- return retval;
- }
- }
- }
-
- free(entry_cpy);
- entry = entry_end + 1;
- } while (entry_end != NULL);
-
- return 0;
-}
-
-#if defined(CONFIG_REGEX)
-struct regex_callback_priv {
- const char *searched_for;
- char *regex;
- char *attributes;
-};
-
-static int regex_callback(const char *name, const char *attributes, void *priv)
-{
- int retval = 0;
- struct regex_callback_priv *cbp = (struct regex_callback_priv *)priv;
- struct slre slre;
- char regex[strlen(name) + 3];
-
- /* Require the whole string to be described by the regex */
- sprintf(regex, "^%s$", name);
- if (slre_compile(&slre, regex)) {
- struct cap caps[slre.num_caps + 2];
-
- if (slre_match(&slre, cbp->searched_for,
- strlen(cbp->searched_for), caps)) {
- free(cbp->regex);
- if (!attributes) {
- retval = -EINVAL;
- goto done;
- }
- cbp->regex = malloc(strlen(regex) + 1);
- if (cbp->regex) {
- strcpy(cbp->regex, regex);
- } else {
- retval = -ENOMEM;
- goto done;
- }
-
- free(cbp->attributes);
- cbp->attributes = malloc(strlen(attributes) + 1);
- if (cbp->attributes) {
- strcpy(cbp->attributes, attributes);
- } else {
- retval = -ENOMEM;
- free(cbp->regex);
- cbp->regex = NULL;
- goto done;
- }
- }
- } else {
- printf("Error compiling regex: %s\n", slre.err_str);
- retval = -EINVAL;
- }
-done:
- return retval;
-}
-
-/*
- * Retrieve the attributes string associated with a single name in the list
- * There is no protection on attributes being too small for the value
- */
-int env_attr_lookup(const char *attr_list, const char *name, char *attributes)
-{
- if (!attributes)
- /* bad parameter */
- return -EINVAL;
- if (!attr_list)
- /* list not found */
- return -EINVAL;
-
- struct regex_callback_priv priv;
- int retval;
-
- priv.searched_for = name;
- priv.regex = NULL;
- priv.attributes = NULL;
- retval = env_attr_walk(attr_list, regex_callback, &priv);
- if (retval)
- return retval; /* error */
-
- if (priv.regex) {
- strcpy(attributes, priv.attributes);
- free(priv.attributes);
- free(priv.regex);
- /* success */
- return 0;
- }
- return -ENOENT; /* not found in list */
-}
-#else
-
-/*
- * Search for the last exactly matching name in an attribute list
- */
-static int reverse_name_search(const char *searched, const char *search_for,
- const char **result)
-{
- int result_size = 0;
- const char *cur_searched = searched;
-
- if (result)
- *result = NULL;
-
- if (*search_for == '\0') {
- if (result)
- *result = searched;
- return strlen(searched);
- }
-
- for (;;) {
- const char *match = strstr(cur_searched, search_for);
- const char *prevch;
- const char *nextch;
-
- /* Stop looking if no new match is found */
- if (match == NULL)
- break;
-
- prevch = match - 1;
- nextch = match + strlen(search_for);
-
- /* Skip spaces */
- while (*prevch == ' ' && prevch >= searched)
- prevch--;
- while (*nextch == ' ')
- nextch++;
-
- /* Start looking past the current match so last is found */
- cur_searched = match + 1;
- /* Check for an exact match */
- if (match != searched &&
- *prevch != ENV_ATTR_LIST_DELIM &&
- prevch != searched - 1)
- continue;
- if (*nextch != ENV_ATTR_SEP &&
- *nextch != ENV_ATTR_LIST_DELIM &&
- *nextch != '\0')
- continue;
-
- if (result)
- *result = match;
- result_size = strlen(search_for);
- }
-
- return result_size;
-}
-
-/*
- * Retrieve the attributes string associated with a single name in the list
- * There is no protection on attributes being too small for the value
- */
-int env_attr_lookup(const char *attr_list, const char *name, char *attributes)
-{
- const char *entry = NULL;
- int entry_len;
-
- if (!attributes)
- /* bad parameter */
- return -EINVAL;
- if (!attr_list)
- /* list not found */
- return -EINVAL;
-
- entry_len = reverse_name_search(attr_list, name, &entry);
- if (entry != NULL) {
- int len;
-
- /* skip the name */
- entry += entry_len;
- /* skip spaces */
- while (*entry == ' ')
- entry++;
- if (*entry != ENV_ATTR_SEP)
- len = 0;
- else {
- const char *delim;
- static const char delims[] = {
- ENV_ATTR_LIST_DELIM, ' ', '\0'};
-
- /* skip the attr sep */
- entry += 1;
- /* skip spaces */
- while (*entry == ' ')
- entry++;
-
- delim = strpbrk(entry, delims);
- if (delim == NULL)
- len = strlen(entry);
- else
- len = delim - entry;
- memcpy(attributes, entry, len);
- }
- attributes[len] = '\0';
-
- /* success */
- return 0;
- }
-
- /* not found in list */
- return -ENOENT;
-}
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2012
- * Joe Hershberger, National Instruments, joe.hershberger@ni.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <environment.h>
-
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
-DECLARE_GLOBAL_DATA_PTR;
-#endif
-
-/*
- * Look up a callback function pointer by name
- */
-static struct env_clbk_tbl *find_env_callback(const char *name)
-{
- struct env_clbk_tbl *clbkp;
- int i;
- int num_callbacks = ll_entry_count(struct env_clbk_tbl, env_clbk);
-
- if (name == NULL)
- return NULL;
-
- /* look up the callback in the linker-list */
- for (i = 0, clbkp = ll_entry_start(struct env_clbk_tbl, env_clbk);
- i < num_callbacks;
- i++, clbkp++) {
- if (strcmp(name, clbkp->name) == 0)
- return clbkp;
- }
-
- return NULL;
-}
-
-static int first_call = 1;
-static const char *callback_list;
-
-/*
- * Look for a possible callback for a newly added variable
- * This is called specifically when the variable did not exist in the hash
- * previously, so the blanket update did not find this variable.
- */
-void env_callback_init(ENTRY *var_entry)
-{
- const char *var_name = var_entry->key;
- char callback_name[256] = "";
- struct env_clbk_tbl *clbkp;
- int ret = 1;
-
- if (first_call) {
- callback_list = getenv(ENV_CALLBACK_VAR);
- first_call = 0;
- }
-
- /* look in the ".callbacks" var for a reference to this variable */
- if (callback_list != NULL)
- ret = env_attr_lookup(callback_list, var_name, callback_name);
-
- /* only if not found there, look in the static list */
- if (ret)
- ret = env_attr_lookup(ENV_CALLBACK_LIST_STATIC, var_name,
- callback_name);
-
- /* if an association was found, set the callback pointer */
- if (!ret && strlen(callback_name)) {
- clbkp = find_env_callback(callback_name);
- if (clbkp != NULL)
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
- var_entry->callback = clbkp->callback + gd->reloc_off;
-#else
- var_entry->callback = clbkp->callback;
-#endif
- }
-}
-
-/*
- * Called on each existing env var prior to the blanket update since removing
- * a callback association should remove its callback.
- */
-static int clear_callback(ENTRY *entry)
-{
- entry->callback = NULL;
-
- return 0;
-}
-
-/*
- * Call for each element in the list that associates variables to callbacks
- */
-static int set_callback(const char *name, const char *value, void *priv)
-{
- ENTRY e, *ep;
- struct env_clbk_tbl *clbkp;
-
- e.key = name;
- e.data = NULL;
- e.callback = NULL;
- hsearch_r(e, FIND, &ep, &env_htab, 0);
-
- /* does the env variable actually exist? */
- if (ep != NULL) {
- /* the assocaition delares no callback, so remove the pointer */
- if (value == NULL || strlen(value) == 0)
- ep->callback = NULL;
- else {
- /* assign the requested callback */
- clbkp = find_env_callback(value);
- if (clbkp != NULL)
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
- ep->callback = clbkp->callback + gd->reloc_off;
-#else
- ep->callback = clbkp->callback;
-#endif
- }
- }
-
- return 0;
-}
-
-static int on_callbacks(const char *name, const char *value, enum env_op op,
- int flags)
-{
- /* remove all callbacks */
- hwalk_r(&env_htab, clear_callback);
-
- /* configure any static callback bindings */
- env_attr_walk(ENV_CALLBACK_LIST_STATIC, set_callback, NULL);
- /* configure any dynamic callback bindings */
- env_attr_walk(value, set_callback, NULL);
-
- return 0;
-}
-U_BOOT_ENV_CALLBACK(callbacks, on_callbacks);
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <search.h>
-#include <errno.h>
-#include <malloc.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/************************************************************************
- * Default settings to be used when no valid environment is found
- */
-#include <env_default.h>
-
-struct hsearch_data env_htab = {
- .change_ok = env_flags_validate,
-};
-
-__weak uchar env_get_char_spec(int index)
-{
- return *((uchar *)(gd->env_addr + index));
-}
-
-static uchar env_get_char_init(int index)
-{
- /* if crc was bad, use the default environment */
- if (gd->env_valid)
- return env_get_char_spec(index);
- else
- return default_environment[index];
-}
-
-uchar env_get_char_memory(int index)
-{
- return *env_get_addr(index);
-}
-
-uchar env_get_char(int index)
-{
- /* if relocated to RAM */
- if (gd->flags & GD_FLG_RELOC)
- return env_get_char_memory(index);
- else
- return env_get_char_init(index);
-}
-
-const uchar *env_get_addr(int index)
-{
- if (gd->env_valid)
- return (uchar *)(gd->env_addr + index);
- else
- return &default_environment[index];
-}
-
-/*
- * Read an environment variable as a boolean
- * Return -1 if variable does not exist (default to true)
- */
-int getenv_yesno(const char *var)
-{
- char *s = getenv(var);
-
- if (s == NULL)
- return -1;
- return (*s == '1' || *s == 'y' || *s == 'Y' || *s == 't' || *s == 'T') ?
- 1 : 0;
-}
-
-/*
- * Look up the variable from the default environment
- */
-char *getenv_default(const char *name)
-{
- char *ret_val;
- unsigned long really_valid = gd->env_valid;
- unsigned long real_gd_flags = gd->flags;
-
- /* Pretend that the image is bad. */
- gd->flags &= ~GD_FLG_ENV_READY;
- gd->env_valid = 0;
- ret_val = getenv(name);
- gd->env_valid = really_valid;
- gd->flags = real_gd_flags;
- return ret_val;
-}
-
-void set_default_env(const char *s)
-{
- int flags = 0;
-
- if (sizeof(default_environment) > ENV_SIZE) {
- puts("*** Error - default environment is too large\n\n");
- return;
- }
-
- if (s) {
- if (*s == '!') {
- printf("*** Warning - %s, "
- "using default environment\n\n",
- s + 1);
- } else {
- flags = H_INTERACTIVE;
- puts(s);
- }
- } else {
- puts("Using default environment\n\n");
- }
-
- if (himport_r(&env_htab, (char *)default_environment,
- sizeof(default_environment), '\0', flags, 0,
- 0, NULL) == 0)
- error("Environment import failed: errno = %d\n", errno);
-
- gd->flags |= GD_FLG_ENV_READY;
- gd->flags |= GD_FLG_ENV_DEFAULT;
-}
-
-
-/* [re]set individual variables to their value in the default environment */
-int set_default_vars(int nvars, char * const vars[])
-{
- /*
- * Special use-case: import from default environment
- * (and use \0 as a separator)
- */
- return himport_r(&env_htab, (const char *)default_environment,
- sizeof(default_environment), '\0',
- H_NOCLEAR | H_INTERACTIVE, 0, nvars, vars);
-}
-
-#ifdef CONFIG_ENV_AES
-#include <uboot_aes.h>
-/**
- * env_aes_cbc_get_key() - Get AES-128-CBC key for the environment
- *
- * This function shall return 16-byte array containing AES-128 key used
- * to encrypt and decrypt the environment. This function must be overridden
- * by the implementer as otherwise the environment encryption will not
- * work.
- */
-__weak uint8_t *env_aes_cbc_get_key(void)
-{
- return NULL;
-}
-
-static int env_aes_cbc_crypt(env_t *env, const int enc)
-{
- unsigned char *data = env->data;
- uint8_t *key;
- uint8_t key_exp[AES_EXPAND_KEY_LENGTH];
- uint32_t aes_blocks;
-
- key = env_aes_cbc_get_key();
- if (!key)
- return -EINVAL;
-
- /* First we expand the key. */
- aes_expand_key(key, key_exp);
-
- /* Calculate the number of AES blocks to encrypt. */
- aes_blocks = ENV_SIZE / AES_KEY_LENGTH;
-
- if (enc)
- aes_cbc_encrypt_blocks(key_exp, data, data, aes_blocks);
- else
- aes_cbc_decrypt_blocks(key_exp, data, data, aes_blocks);
-
- return 0;
-}
-#else
-static inline int env_aes_cbc_crypt(env_t *env, const int enc)
-{
- return 0;
-}
-#endif
-
-/*
- * Check if CRC is valid and (if yes) import the environment.
- * Note that "buf" may or may not be aligned.
- */
-int env_import(const char *buf, int check)
-{
- env_t *ep = (env_t *)buf;
- int ret;
-
- if (check) {
- uint32_t crc;
-
- memcpy(&crc, &ep->crc, sizeof(crc));
-
- if (crc32(0, ep->data, ENV_SIZE) != crc) {
- set_default_env("!bad CRC");
- return 0;
- }
- }
-
- /* Decrypt the env if desired. */
- ret = env_aes_cbc_crypt(ep, 0);
- if (ret) {
- error("Failed to decrypt env!\n");
- set_default_env("!import failed");
- return ret;
- }
-
- if (himport_r(&env_htab, (char *)ep->data, ENV_SIZE, '\0', 0, 0,
- 0, NULL)) {
- gd->flags |= GD_FLG_ENV_READY;
- return 1;
- }
-
- error("Cannot import environment: errno = %d\n", errno);
-
- set_default_env("!import failed");
-
- return 0;
-}
-
-#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
-static unsigned char env_flags;
-
-int env_import_redund(const char *buf1, const char *buf2)
-{
- int crc1_ok, crc2_ok;
- env_t *ep, *tmp_env1, *tmp_env2;
-
- tmp_env1 = (env_t *)buf1;
- tmp_env2 = (env_t *)buf2;
-
- crc1_ok = crc32(0, tmp_env1->data, ENV_SIZE) ==
- tmp_env1->crc;
- crc2_ok = crc32(0, tmp_env2->data, ENV_SIZE) ==
- tmp_env2->crc;
-
- if (!crc1_ok && !crc2_ok) {
- set_default_env("!bad CRC");
- return 0;
- } else if (crc1_ok && !crc2_ok) {
- gd->env_valid = 1;
- } else if (!crc1_ok && crc2_ok) {
- gd->env_valid = 2;
- } else {
- /* both ok - check serial */
- if (tmp_env1->flags == 255 && tmp_env2->flags == 0)
- gd->env_valid = 2;
- else if (tmp_env2->flags == 255 && tmp_env1->flags == 0)
- gd->env_valid = 1;
- else if (tmp_env1->flags > tmp_env2->flags)
- gd->env_valid = 1;
- else if (tmp_env2->flags > tmp_env1->flags)
- gd->env_valid = 2;
- else /* flags are equal - almost impossible */
- gd->env_valid = 1;
- }
-
- if (gd->env_valid == 1)
- ep = tmp_env1;
- else
- ep = tmp_env2;
-
- env_flags = ep->flags;
- return env_import((char *)ep, 0);
-}
-#endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
-
-/* Export the environment and generate CRC for it. */
-int env_export(env_t *env_out)
-{
- char *res;
- ssize_t len;
- int ret;
-
- res = (char *)env_out->data;
- len = hexport_r(&env_htab, '\0', 0, &res, ENV_SIZE, 0, NULL);
- if (len < 0) {
- error("Cannot export environment: errno = %d\n", errno);
- return 1;
- }
-
- /* Encrypt the env if desired. */
- ret = env_aes_cbc_crypt(env_out, 1);
- if (ret)
- return ret;
-
- env_out->crc = crc32(0, env_out->data, ENV_SIZE);
-
-#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
- env_out->flags = ++env_flags; /* increase the serial */
-#endif
-
- return 0;
-}
-
-void env_relocate(void)
-{
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
- env_reloc();
- env_htab.change_ok += gd->reloc_off;
-#endif
- if (gd->env_valid == 0) {
-#if defined(CONFIG_ENV_IS_NOWHERE) || defined(CONFIG_SPL_BUILD)
- /* Environment not changable */
- set_default_env(NULL);
-#else
- bootstage_error(BOOTSTAGE_ID_NET_CHECKSUM);
- set_default_env("!bad CRC");
-#endif
- } else {
- env_relocate_spec();
- }
-}
-
-#if defined(CONFIG_AUTO_COMPLETE) && !defined(CONFIG_SPL_BUILD)
-int env_complete(char *var, int maxv, char *cmdv[], int bufsz, char *buf)
-{
- ENTRY *match;
- int found, idx;
-
- idx = 0;
- found = 0;
- cmdv[0] = NULL;
-
- while ((idx = hmatch_r(var, idx, &match, &env_htab))) {
- int vallen = strlen(match->key) + 1;
-
- if (found >= maxv - 2 || bufsz < vallen)
- break;
-
- cmdv[found++] = buf;
- memcpy(buf, match->key, vallen);
- buf += vallen;
- bufsz -= vallen;
- }
-
- qsort(cmdv, found, sizeof(cmdv[0]), strcmp_compar);
-
- if (idx)
- cmdv[found++] = "...";
-
- cmdv[found] = NULL;
- return found;
-}
-#endif
+++ /dev/null
-/*
- * LowLevel function for DataFlash environment support
- * Author : Gilles Gastaldi (Atmel)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <dataflash.h>
-#include <search.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-env_t *env_ptr;
-
-char *env_name_spec = "dataflash";
-
-uchar env_get_char_spec(int index)
-{
- uchar c;
-
- read_dataflash(CONFIG_ENV_ADDR + index + offsetof(env_t, data),
- 1, (char *)&c);
- return c;
-}
-
-void env_relocate_spec(void)
-{
- ulong crc, new = 0;
- unsigned off;
- char buf[CONFIG_ENV_SIZE];
-
- /* Read old CRC */
- read_dataflash(CONFIG_ENV_ADDR + offsetof(env_t, crc),
- sizeof(ulong), (char *)&crc);
-
- /* Read whole environment */
- read_dataflash(CONFIG_ENV_ADDR, CONFIG_ENV_SIZE, buf);
-
- /* Calculate the CRC */
- off = offsetof(env_t, data);
- new = crc32(new, (unsigned char *)(buf + off), ENV_SIZE);
-
- if (crc == new)
- env_import(buf, 1);
- else
- set_default_env("!bad CRC");
-}
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-#error No support for redundant environment on dataflash yet!
-#endif
-
-int saveenv(void)
-{
- env_t env_new;
- int ret;
-
- ret = env_export(&env_new);
- if (ret)
- return ret;
-
- return write_dataflash(CONFIG_ENV_ADDR,
- (unsigned long)&env_new,
- CONFIG_ENV_SIZE);
-}
-
-/*
- * Initialize environment use
- *
- * We are still running from ROM, so data use is limited.
- * Use a (moderately small) buffer on the stack
- */
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
-#include <i2c.h>
-#endif
-#include <search.h>
-#include <errno.h>
-#include <linux/compiler.h> /* for BUG_ON */
-
-DECLARE_GLOBAL_DATA_PTR;
-
-env_t *env_ptr;
-
-char *env_name_spec = "EEPROM";
-
-static int eeprom_bus_read(unsigned dev_addr, unsigned offset,
- uchar *buffer, unsigned cnt)
-{
- int rcode;
-#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
- int old_bus = i2c_get_bus_num();
-
- if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS)
- i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS);
-#endif
-
- rcode = eeprom_read(dev_addr, offset, buffer, cnt);
-
-#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
- i2c_set_bus_num(old_bus);
-#endif
-
- return rcode;
-}
-
-static int eeprom_bus_write(unsigned dev_addr, unsigned offset,
- uchar *buffer, unsigned cnt)
-{
- int rcode;
-#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
- int old_bus = i2c_get_bus_num();
-
- if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS)
- i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS);
-#endif
-
- rcode = eeprom_write(dev_addr, offset, buffer, cnt);
-
-#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
- i2c_set_bus_num(old_bus);
-#endif
-
- return rcode;
-}
-
-uchar env_get_char_spec(int index)
-{
- uchar c;
- unsigned int off = CONFIG_ENV_OFFSET;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 2)
- off = CONFIG_ENV_OFFSET_REDUND;
-#endif
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
- off + index + offsetof(env_t, data), &c, 1);
-
- return c;
-}
-
-void env_relocate_spec(void)
-{
- char buf_env[CONFIG_ENV_SIZE];
- unsigned int off = CONFIG_ENV_OFFSET;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- ulong len, crc[2], crc_tmp;
- unsigned int off_env[2];
- uchar rdbuf[64], flags[2];
- int i, crc_ok[2] = {0, 0};
-
- eeprom_init(-1); /* prepare for EEPROM read/write */
-
- off_env[0] = CONFIG_ENV_OFFSET;
- off_env[1] = CONFIG_ENV_OFFSET_REDUND;
-
- for (i = 0; i < 2; i++) {
- /* read CRC */
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
- off_env[i] + offsetof(env_t, crc),
- (uchar *)&crc[i], sizeof(ulong));
- /* read FLAGS */
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
- off_env[i] + offsetof(env_t, flags),
- (uchar *)&flags[i], sizeof(uchar));
-
- crc_tmp = 0;
- len = ENV_SIZE;
- off = off_env[i] + offsetof(env_t, data);
- while (len > 0) {
- int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
-
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR, off,
- rdbuf, n);
-
- crc_tmp = crc32(crc_tmp, rdbuf, n);
- len -= n;
- off += n;
- }
-
- if (crc_tmp == crc[i])
- crc_ok[i] = 1;
- }
-
- if (!crc_ok[0] && !crc_ok[1]) {
- gd->env_addr = 0;
- gd->env_valid = 0;
- } else if (crc_ok[0] && !crc_ok[1]) {
- gd->env_valid = 1;
- } else if (!crc_ok[0] && crc_ok[1]) {
- gd->env_valid = 2;
- } else {
- /* both ok - check serial */
- if (flags[0] == ACTIVE_FLAG && flags[1] == OBSOLETE_FLAG)
- gd->env_valid = 1;
- else if (flags[0] == OBSOLETE_FLAG && flags[1] == ACTIVE_FLAG)
- gd->env_valid = 2;
- else if (flags[0] == 0xFF && flags[1] == 0)
- gd->env_valid = 2;
- else if (flags[1] == 0xFF && flags[0] == 0)
- gd->env_valid = 1;
- else /* flags are equal - almost impossible */
- gd->env_valid = 1;
- }
-
-#else /* CONFIG_ENV_OFFSET_REDUND */
- ulong crc, len, new;
- uchar rdbuf[64];
-
- eeprom_init(-1); /* prepare for EEPROM read/write */
-
- /* read old CRC */
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
- CONFIG_ENV_OFFSET + offsetof(env_t, crc),
- (uchar *)&crc, sizeof(ulong));
-
- new = 0;
- len = ENV_SIZE;
- off = offsetof(env_t, data);
- while (len > 0) {
- int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
-
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
- CONFIG_ENV_OFFSET + off, rdbuf, n);
- new = crc32(new, rdbuf, n);
- len -= n;
- off += n;
- }
-
- if (crc == new) {
- gd->env_valid = 1;
- } else {
- gd->env_valid = 0;
- }
-#endif /* CONFIG_ENV_OFFSET_REDUND */
-
- off = CONFIG_ENV_OFFSET;
-#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 2)
- off = CONFIG_ENV_OFFSET_REDUND;
-#endif
-
- eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
- off, (uchar *)buf_env, CONFIG_ENV_SIZE);
-
- env_import(buf_env, 1);
-}
-
-int saveenv(void)
-{
- env_t env_new;
- int rc;
- unsigned int off = CONFIG_ENV_OFFSET;
-#ifdef CONFIG_ENV_OFFSET_REDUND
- unsigned int off_red = CONFIG_ENV_OFFSET_REDUND;
- char flag_obsolete = OBSOLETE_FLAG;
-#endif
-
- BUG_ON(env_ptr != NULL);
-
- rc = env_export(&env_new);
- if (rc)
- return rc;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 1) {
- off = CONFIG_ENV_OFFSET_REDUND;
- off_red = CONFIG_ENV_OFFSET;
- }
-
- env_new.flags = ACTIVE_FLAG;
-#endif
-
- rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
- off, (uchar *)&env_new, CONFIG_ENV_SIZE);
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- if (rc == 0) {
- eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
- off_red + offsetof(env_t, flags),
- (uchar *)&flag_obsolete, 1);
-
- if (gd->env_valid == 1)
- gd->env_valid = 2;
- else
- gd->env_valid = 1;
- }
-#endif
- return rc;
-}
-
-/*
- * Initialize Environment use
- *
- * We are still running from ROM, so data use is limited.
- * Use a (moderately small) buffer on the stack
- */
-int env_init(void)
-{
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/kconfig.h>
-
-#ifndef __ASSEMBLY__
-#define __ASSEMBLY__ /* Dirty trick to get only #defines */
-#endif
-#define __ASM_STUB_PROCESSOR_H__ /* don't include asm/processor. */
-#include <config.h>
-#undef __ASSEMBLY__
-#include <environment.h>
-#include <linux/stringify.h>
-
-/* Handle HOSTS that have prepended crap on symbol names, not TARGETS. */
-#if defined(__APPLE__)
-/* Leading underscore on symbols */
-# define SYM_CHAR "_"
-#else /* No leading character on symbols */
-# define SYM_CHAR
-#endif
-
-/*
- * Generate embedded environment table
- * inside U-Boot image, if needed.
- */
-#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_BUILD_ENVCRC)
-/*
- * Put the environment in the .text section when we are building
- * U-Boot proper. The host based program "tools/envcrc" does not need
- * a seperate section.
- */
-#if defined(USE_HOSTCC) /* Native for 'tools/envcrc' */
-# define __UBOOT_ENV_SECTION__ /*XXX DO_NOT_DEL_THIS_COMMENT*/
-
-#else /* Environment is embedded in U-Boot's .text section */
-/* XXX - This only works with GNU C */
-# define __UBOOT_ENV_SECTION__ __attribute__ ((section(".text")))
-#endif
-
-/*
- * Macros to generate global absolutes.
- */
-#if defined(__bfin__)
-# define GEN_SET_VALUE(name, value) \
- asm(".set " GEN_SYMNAME(name) ", " GEN_VALUE(value))
-#else
-# define GEN_SET_VALUE(name, value) \
- asm(GEN_SYMNAME(name) " = " GEN_VALUE(value))
-#endif
-#define GEN_SYMNAME(str) SYM_CHAR #str
-#define GEN_VALUE(str) #str
-#define GEN_ABS(name, value) \
- asm(".globl " GEN_SYMNAME(name)); \
- GEN_SET_VALUE(name, value)
-
-/*
- * Check to see if we are building with a
- * computed CRC. Otherwise define it as ~0.
- */
-#if !defined(ENV_CRC)
-# define ENV_CRC (~0)
-#endif
-
-#define DEFAULT_ENV_INSTANCE_EMBEDDED
-#include <env_default.h>
-
-#ifdef CONFIG_ENV_ADDR_REDUND
-env_t redundand_environment __UBOOT_ENV_SECTION__ = {
- 0, /* CRC Sum: invalid */
- 0, /* Flags: invalid */
- {
- "\0"
- }
-};
-#endif /* CONFIG_ENV_ADDR_REDUND */
-
-/*
- * These will end up in the .text section
- * if the environment strings are embedded
- * in the image. When this is used for
- * tools/envcrc, they are placed in the
- * .data/.sdata section.
- *
- */
-unsigned long env_size __UBOOT_ENV_SECTION__ = sizeof(env_t);
-
-/*
- * Add in absolutes.
- */
-GEN_ABS(env_offset, CONFIG_ENV_OFFSET);
-
-#endif /* ENV_IS_EMBEDDED */
+++ /dev/null
-/*
- * (c) Copyright 2016 by VRT Technology
- *
- * Author:
- * Stuart Longland <stuartl@vrt.com.au>
- *
- * Based on FAT environment driver
- * (c) Copyright 2011 by Tigris Elektronik GmbH
- *
- * Author:
- * Maximilian Schwerin <mvs@tigris.de>
- *
- * and EXT4 filesystem implementation
- * (C) Copyright 2011 - 2012 Samsung Electronics
- * EXT4 filesystem implementation in Uboot by
- * Uma Shankar <uma.shankar@samsung.com>
- * Manjunatha C Achar <a.manjunatha@samsung.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <search.h>
-#include <errno.h>
-#include <ext4fs.h>
-#include <mmc.h>
-
-char *env_name_spec = "EXT4";
-
-env_t *env_ptr;
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_SAVEENV
-int saveenv(void)
-{
- env_t env_new;
- struct blk_desc *dev_desc = NULL;
- disk_partition_t info;
- int dev, part;
- int err;
-
- err = env_export(&env_new);
- if (err)
- return err;
-
- part = blk_get_device_part_str(EXT4_ENV_INTERFACE,
- EXT4_ENV_DEVICE_AND_PART,
- &dev_desc, &info, 1);
- if (part < 0)
- return 1;
-
- dev = dev_desc->devnum;
- ext4fs_set_blk_dev(dev_desc, &info);
-
- if (!ext4fs_mount(info.size)) {
- printf("\n** Unable to use %s %s for saveenv **\n",
- EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART);
- return 1;
- }
-
- err = ext4fs_write(EXT4_ENV_FILE, (void *)&env_new, sizeof(env_t));
- ext4fs_close();
-
- if (err == -1) {
- printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
- EXT4_ENV_FILE, EXT4_ENV_INTERFACE, dev, part);
- return 1;
- }
-
- puts("done\n");
- return 0;
-}
-#endif /* CONFIG_CMD_SAVEENV */
-
-void env_relocate_spec(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
- struct blk_desc *dev_desc = NULL;
- disk_partition_t info;
- int dev, part;
- int err;
- loff_t off;
-
- part = blk_get_device_part_str(EXT4_ENV_INTERFACE,
- EXT4_ENV_DEVICE_AND_PART,
- &dev_desc, &info, 1);
- if (part < 0)
- goto err_env_relocate;
-
- dev = dev_desc->devnum;
- ext4fs_set_blk_dev(dev_desc, &info);
-
- if (!ext4fs_mount(info.size)) {
- printf("\n** Unable to use %s %s for loading the env **\n",
- EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART);
- goto err_env_relocate;
- }
-
- err = ext4_read_file(EXT4_ENV_FILE, buf, 0, CONFIG_ENV_SIZE, &off);
- ext4fs_close();
-
- if (err == -1) {
- printf("\n** Unable to read \"%s\" from %s%d:%d **\n",
- EXT4_ENV_FILE, EXT4_ENV_INTERFACE, dev, part);
- goto err_env_relocate;
- }
-
- env_import(buf, 1);
- return;
-
-err_env_relocate:
- set_default_env(NULL);
-}
+++ /dev/null
-/*
- * (c) Copyright 2011 by Tigris Elektronik GmbH
- *
- * Author:
- * Maximilian Schwerin <mvs@tigris.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <search.h>
-#include <errno.h>
-#include <fat.h>
-#include <mmc.h>
-
-char *env_name_spec = "FAT";
-
-env_t *env_ptr;
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_SAVEENV
-int saveenv(void)
-{
- env_t env_new;
- struct blk_desc *dev_desc = NULL;
- disk_partition_t info;
- int dev, part;
- int err;
- loff_t size;
-
- err = env_export(&env_new);
- if (err)
- return err;
-
- part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
- CONFIG_ENV_FAT_DEVICE_AND_PART,
- &dev_desc, &info, 1);
- if (part < 0)
- return 1;
-
- dev = dev_desc->devnum;
- if (fat_set_blk_dev(dev_desc, &info) != 0) {
- printf("\n** Unable to use %s %d:%d for saveenv **\n",
- CONFIG_ENV_FAT_INTERFACE, dev, part);
- return 1;
- }
-
- err = file_fat_write(CONFIG_ENV_FAT_FILE, (void *)&env_new, 0, sizeof(env_t),
- &size);
- if (err == -1) {
- printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
- CONFIG_ENV_FAT_FILE, CONFIG_ENV_FAT_INTERFACE, dev, part);
- return 1;
- }
-
- puts("done\n");
- return 0;
-}
-#endif /* CONFIG_CMD_SAVEENV */
-
-void env_relocate_spec(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
- struct blk_desc *dev_desc = NULL;
- disk_partition_t info;
- int dev, part;
- int err;
-
- part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
- CONFIG_ENV_FAT_DEVICE_AND_PART,
- &dev_desc, &info, 1);
- if (part < 0)
- goto err_env_relocate;
-
- dev = dev_desc->devnum;
- if (fat_set_blk_dev(dev_desc, &info) != 0) {
- printf("\n** Unable to use %s %d:%d for loading the env **\n",
- CONFIG_ENV_FAT_INTERFACE, dev, part);
- goto err_env_relocate;
- }
-
- err = file_fat_read(CONFIG_ENV_FAT_FILE, buf, CONFIG_ENV_SIZE);
- if (err == -1) {
- printf("\n** Unable to read \"%s\" from %s%d:%d **\n",
- CONFIG_ENV_FAT_FILE, CONFIG_ENV_FAT_INTERFACE, dev, part);
- goto err_env_relocate;
- }
-
- env_import(buf, 1);
- return;
-
-err_env_relocate:
- set_default_env(NULL);
-}
+++ /dev/null
-/*
- * (C) Copyright 2012
- * Joe Hershberger, National Instruments, joe.hershberger@ni.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/string.h>
-#include <linux/ctype.h>
-
-#ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */
-#include <stdint.h>
-#include <stdio.h>
-#include "fw_env_private.h"
-#include "fw_env.h"
-#include <env_attr.h>
-#include <env_flags.h>
-#define getenv fw_getenv
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-#else
-#include <common.h>
-#include <environment.h>
-#endif
-
-#ifdef CONFIG_CMD_NET
-#define ENV_FLAGS_NET_VARTYPE_REPS "im"
-#else
-#define ENV_FLAGS_NET_VARTYPE_REPS ""
-#endif
-
-static const char env_flags_vartype_rep[] = "sdxb" ENV_FLAGS_NET_VARTYPE_REPS;
-static const char env_flags_varaccess_rep[] = "aroc";
-static const int env_flags_varaccess_mask[] = {
- 0,
- ENV_FLAGS_VARACCESS_PREVENT_DELETE |
- ENV_FLAGS_VARACCESS_PREVENT_CREATE |
- ENV_FLAGS_VARACCESS_PREVENT_OVERWR,
- ENV_FLAGS_VARACCESS_PREVENT_DELETE |
- ENV_FLAGS_VARACCESS_PREVENT_OVERWR,
- ENV_FLAGS_VARACCESS_PREVENT_DELETE |
- ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR};
-
-#ifdef CONFIG_CMD_ENV_FLAGS
-static const char * const env_flags_vartype_names[] = {
- "string",
- "decimal",
- "hexadecimal",
- "boolean",
-#ifdef CONFIG_CMD_NET
- "IP address",
- "MAC address",
-#endif
-};
-static const char * const env_flags_varaccess_names[] = {
- "any",
- "read-only",
- "write-once",
- "change-default",
-};
-
-/*
- * Print the whole list of available type flags.
- */
-void env_flags_print_vartypes(void)
-{
- enum env_flags_vartype curtype = (enum env_flags_vartype)0;
-
- while (curtype != env_flags_vartype_end) {
- printf("\t%c -\t%s\n", env_flags_vartype_rep[curtype],
- env_flags_vartype_names[curtype]);
- curtype++;
- }
-}
-
-/*
- * Print the whole list of available access flags.
- */
-void env_flags_print_varaccess(void)
-{
- enum env_flags_varaccess curaccess = (enum env_flags_varaccess)0;
-
- while (curaccess != env_flags_varaccess_end) {
- printf("\t%c -\t%s\n", env_flags_varaccess_rep[curaccess],
- env_flags_varaccess_names[curaccess]);
- curaccess++;
- }
-}
-
-/*
- * Return the name of the type.
- */
-const char *env_flags_get_vartype_name(enum env_flags_vartype type)
-{
- return env_flags_vartype_names[type];
-}
-
-/*
- * Return the name of the access.
- */
-const char *env_flags_get_varaccess_name(enum env_flags_varaccess access)
-{
- return env_flags_varaccess_names[access];
-}
-#endif /* CONFIG_CMD_ENV_FLAGS */
-
-/*
- * Parse the flags string from a .flags attribute list into the vartype enum.
- */
-enum env_flags_vartype env_flags_parse_vartype(const char *flags)
-{
- char *type;
-
- if (strlen(flags) <= ENV_FLAGS_VARTYPE_LOC)
- return env_flags_vartype_string;
-
- type = strchr(env_flags_vartype_rep,
- flags[ENV_FLAGS_VARTYPE_LOC]);
-
- if (type != NULL)
- return (enum env_flags_vartype)
- (type - &env_flags_vartype_rep[0]);
-
- printf("## Warning: Unknown environment variable type '%c'\n",
- flags[ENV_FLAGS_VARTYPE_LOC]);
- return env_flags_vartype_string;
-}
-
-/*
- * Parse the flags string from a .flags attribute list into the varaccess enum.
- */
-enum env_flags_varaccess env_flags_parse_varaccess(const char *flags)
-{
- char *access;
-
- if (strlen(flags) <= ENV_FLAGS_VARACCESS_LOC)
- return env_flags_varaccess_any;
-
- access = strchr(env_flags_varaccess_rep,
- flags[ENV_FLAGS_VARACCESS_LOC]);
-
- if (access != NULL)
- return (enum env_flags_varaccess)
- (access - &env_flags_varaccess_rep[0]);
-
- printf("## Warning: Unknown environment variable access method '%c'\n",
- flags[ENV_FLAGS_VARACCESS_LOC]);
- return env_flags_varaccess_any;
-}
-
-/*
- * Parse the binary flags from a hash table entry into the varaccess enum.
- */
-enum env_flags_varaccess env_flags_parse_varaccess_from_binflags(int binflags)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(env_flags_varaccess_mask); i++)
- if (env_flags_varaccess_mask[i] ==
- (binflags & ENV_FLAGS_VARACCESS_BIN_MASK))
- return (enum env_flags_varaccess)i;
-
- printf("Warning: Non-standard access flags. (0x%x)\n",
- binflags & ENV_FLAGS_VARACCESS_BIN_MASK);
-
- return env_flags_varaccess_any;
-}
-
-static inline int is_hex_prefix(const char *value)
-{
- return value[0] == '0' && (value[1] == 'x' || value[1] == 'X');
-}
-
-static void skip_num(int hex, const char *value, const char **end,
- int max_digits)
-{
- int i;
-
- if (hex && is_hex_prefix(value))
- value += 2;
-
- for (i = max_digits; i != 0; i--) {
- if (hex && !isxdigit(*value))
- break;
- if (!hex && !isdigit(*value))
- break;
- value++;
- }
- if (end != NULL)
- *end = value;
-}
-
-#ifdef CONFIG_CMD_NET
-int eth_validate_ethaddr_str(const char *addr)
-{
- const char *end;
- const char *cur;
- int i;
-
- cur = addr;
- for (i = 0; i < 6; i++) {
- skip_num(1, cur, &end, 2);
- if (cur == end)
- return -1;
- if (cur + 2 == end && is_hex_prefix(cur))
- return -1;
- if (i != 5 && *end != ':')
- return -1;
- if (i == 5 && *end != '\0')
- return -1;
- cur = end + 1;
- }
-
- return 0;
-}
-#endif
-
-/*
- * Based on the declared type enum, validate that the value string complies
- * with that format
- */
-static int _env_flags_validate_type(const char *value,
- enum env_flags_vartype type)
-{
- const char *end;
-#ifdef CONFIG_CMD_NET
- const char *cur;
- int i;
-#endif
-
- switch (type) {
- case env_flags_vartype_string:
- break;
- case env_flags_vartype_decimal:
- skip_num(0, value, &end, -1);
- if (*end != '\0')
- return -1;
- break;
- case env_flags_vartype_hex:
- skip_num(1, value, &end, -1);
- if (*end != '\0')
- return -1;
- if (value + 2 == end && is_hex_prefix(value))
- return -1;
- break;
- case env_flags_vartype_bool:
- if (value[0] != '1' && value[0] != 'y' && value[0] != 't' &&
- value[0] != 'Y' && value[0] != 'T' &&
- value[0] != '0' && value[0] != 'n' && value[0] != 'f' &&
- value[0] != 'N' && value[0] != 'F')
- return -1;
- if (value[1] != '\0')
- return -1;
- break;
-#ifdef CONFIG_CMD_NET
- case env_flags_vartype_ipaddr:
- cur = value;
- for (i = 0; i < 4; i++) {
- skip_num(0, cur, &end, 3);
- if (cur == end)
- return -1;
- if (i != 3 && *end != '.')
- return -1;
- if (i == 3 && *end != '\0')
- return -1;
- cur = end + 1;
- }
- break;
- case env_flags_vartype_macaddr:
- if (eth_validate_ethaddr_str(value))
- return -1;
- break;
-#endif
- case env_flags_vartype_end:
- return -1;
- }
-
- /* OK */
- return 0;
-}
-
-/*
- * Look for flags in a provided list and failing that the static list
- */
-static inline int env_flags_lookup(const char *flags_list, const char *name,
- char *flags)
-{
- int ret = 1;
-
- if (!flags)
- /* bad parameter */
- return -1;
-
- /* try the env first */
- if (flags_list)
- ret = env_attr_lookup(flags_list, name, flags);
-
- if (ret != 0)
- /* if not found in the env, look in the static list */
- ret = env_attr_lookup(ENV_FLAGS_LIST_STATIC, name, flags);
-
- return ret;
-}
-
-#ifdef USE_HOSTCC /* Functions only used from tools/env */
-/*
- * Look up any flags directly from the .flags variable and the static list
- * and convert them to the vartype enum.
- */
-enum env_flags_vartype env_flags_get_type(const char *name)
-{
- const char *flags_list = getenv(ENV_FLAGS_VAR);
- char flags[ENV_FLAGS_ATTR_MAX_LEN + 1];
-
- if (env_flags_lookup(flags_list, name, flags))
- return env_flags_vartype_string;
-
- if (strlen(flags) <= ENV_FLAGS_VARTYPE_LOC)
- return env_flags_vartype_string;
-
- return env_flags_parse_vartype(flags);
-}
-
-/*
- * Look up the access of a variable directly from the .flags var.
- */
-enum env_flags_varaccess env_flags_get_varaccess(const char *name)
-{
- const char *flags_list = getenv(ENV_FLAGS_VAR);
- char flags[ENV_FLAGS_ATTR_MAX_LEN + 1];
-
- if (env_flags_lookup(flags_list, name, flags))
- return env_flags_varaccess_any;
-
- if (strlen(flags) <= ENV_FLAGS_VARACCESS_LOC)
- return env_flags_varaccess_any;
-
- return env_flags_parse_varaccess(flags);
-}
-
-/*
- * Validate that the proposed new value for "name" is valid according to the
- * defined flags for that variable, if any.
- */
-int env_flags_validate_type(const char *name, const char *value)
-{
- enum env_flags_vartype type;
-
- if (value == NULL)
- return 0;
- type = env_flags_get_type(name);
- if (_env_flags_validate_type(value, type) < 0) {
- printf("## Error: flags type check failure for "
- "\"%s\" <= \"%s\" (type: %c)\n",
- name, value, env_flags_vartype_rep[type]);
- return -1;
- }
- return 0;
-}
-
-/*
- * Validate that the proposed access to variable "name" is valid according to
- * the defined flags for that variable, if any.
- */
-int env_flags_validate_varaccess(const char *name, int check_mask)
-{
- enum env_flags_varaccess access;
- int access_mask;
-
- access = env_flags_get_varaccess(name);
- access_mask = env_flags_varaccess_mask[access];
-
- return (check_mask & access_mask) != 0;
-}
-
-/*
- * Validate the parameters to "env set" directly
- */
-int env_flags_validate_env_set_params(char *name, char * const val[], int count)
-{
- if ((count >= 1) && val[0] != NULL) {
- enum env_flags_vartype type = env_flags_get_type(name);
-
- /*
- * we don't currently check types that need more than
- * one argument
- */
- if (type != env_flags_vartype_string && count > 1) {
- printf("## Error: too many parameters for setting \"%s\"\n",
- name);
- return -1;
- }
- return env_flags_validate_type(name, val[0]);
- }
- /* ok */
- return 0;
-}
-
-#else /* !USE_HOSTCC - Functions only used from lib/hashtable.c */
-
-/*
- * Parse the flag charachters from the .flags attribute list into the binary
- * form to be stored in the environment entry->flags field.
- */
-static int env_parse_flags_to_bin(const char *flags)
-{
- int binflags;
-
- binflags = env_flags_parse_vartype(flags) & ENV_FLAGS_VARTYPE_BIN_MASK;
- binflags |= env_flags_varaccess_mask[env_flags_parse_varaccess(flags)];
-
- return binflags;
-}
-
-static int first_call = 1;
-static const char *flags_list;
-
-/*
- * Look for possible flags for a newly added variable
- * This is called specifically when the variable did not exist in the hash
- * previously, so the blanket update did not find this variable.
- */
-void env_flags_init(ENTRY *var_entry)
-{
- const char *var_name = var_entry->key;
- char flags[ENV_FLAGS_ATTR_MAX_LEN + 1] = "";
- int ret = 1;
-
- if (first_call) {
- flags_list = getenv(ENV_FLAGS_VAR);
- first_call = 0;
- }
- /* look in the ".flags" and static for a reference to this variable */
- ret = env_flags_lookup(flags_list, var_name, flags);
-
- /* if any flags were found, set the binary form to the entry */
- if (!ret && strlen(flags))
- var_entry->flags = env_parse_flags_to_bin(flags);
-}
-
-/*
- * Called on each existing env var prior to the blanket update since removing
- * a flag in the flag list should remove its flags.
- */
-static int clear_flags(ENTRY *entry)
-{
- entry->flags = 0;
-
- return 0;
-}
-
-/*
- * Call for each element in the list that defines flags for a variable
- */
-static int set_flags(const char *name, const char *value, void *priv)
-{
- ENTRY e, *ep;
-
- e.key = name;
- e.data = NULL;
- e.callback = NULL;
- hsearch_r(e, FIND, &ep, &env_htab, 0);
-
- /* does the env variable actually exist? */
- if (ep != NULL) {
- /* the flag list is empty, so clear the flags */
- if (value == NULL || strlen(value) == 0)
- ep->flags = 0;
- else
- /* assign the requested flags */
- ep->flags = env_parse_flags_to_bin(value);
- }
-
- return 0;
-}
-
-static int on_flags(const char *name, const char *value, enum env_op op,
- int flags)
-{
- /* remove all flags */
- hwalk_r(&env_htab, clear_flags);
-
- /* configure any static flags */
- env_attr_walk(ENV_FLAGS_LIST_STATIC, set_flags, NULL);
- /* configure any dynamic flags */
- env_attr_walk(value, set_flags, NULL);
-
- return 0;
-}
-U_BOOT_ENV_CALLBACK(flags, on_flags);
-
-/*
- * Perform consistency checking before creating, overwriting, or deleting an
- * environment variable. Called as a callback function by hsearch_r() and
- * hdelete_r(). Returns 0 in case of success, 1 in case of failure.
- * When (flag & H_FORCE) is set, do not print out any error message and force
- * overwriting of write-once variables.
- */
-
-int env_flags_validate(const ENTRY *item, const char *newval, enum env_op op,
- int flag)
-{
- const char *name;
- const char *oldval = NULL;
-
- if (op != env_op_create)
- oldval = item->data;
-
- name = item->key;
-
- /* Default value for NULL to protect string-manipulating functions */
- newval = newval ? : "";
-
- /* validate the value to match the variable type */
- if (op != env_op_delete) {
- enum env_flags_vartype type = (enum env_flags_vartype)
- (ENV_FLAGS_VARTYPE_BIN_MASK & item->flags);
-
- if (_env_flags_validate_type(newval, type) < 0) {
- printf("## Error: flags type check failure for "
- "\"%s\" <= \"%s\" (type: %c)\n",
- name, newval, env_flags_vartype_rep[type]);
- return -1;
- }
- }
-
- /* check for access permission */
-#ifndef CONFIG_ENV_ACCESS_IGNORE_FORCE
- if (flag & H_FORCE)
- return 0;
-#endif
- switch (op) {
- case env_op_delete:
- if (item->flags & ENV_FLAGS_VARACCESS_PREVENT_DELETE) {
- printf("## Error: Can't delete \"%s\"\n", name);
- return 1;
- }
- break;
- case env_op_overwrite:
- if (item->flags & ENV_FLAGS_VARACCESS_PREVENT_OVERWR) {
- printf("## Error: Can't overwrite \"%s\"\n", name);
- return 1;
- } else if (item->flags &
- ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR) {
- const char *defval = getenv_default(name);
-
- if (defval == NULL)
- defval = "";
- printf("oldval: %s defval: %s\n", oldval, defval);
- if (strcmp(oldval, defval) != 0) {
- printf("## Error: Can't overwrite \"%s\"\n",
- name);
- return 1;
- }
- }
- break;
- case env_op_create:
- if (item->flags & ENV_FLAGS_VARACCESS_PREVENT_CREATE) {
- printf("## Error: Can't create \"%s\"\n", name);
- return 1;
- }
- break;
- }
-
- return 0;
-}
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
-
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <malloc.h>
-#include <search.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_FLASH)
-#define CMD_SAVEENV
-#elif defined(CONFIG_ENV_ADDR_REDUND)
-#error CONFIG_ENV_ADDR_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_FLASH
-#endif
-
-#if defined(CONFIG_ENV_SIZE_REDUND) && \
- (CONFIG_ENV_SIZE_REDUND < CONFIG_ENV_SIZE)
-#error CONFIG_ENV_SIZE_REDUND should not be less then CONFIG_ENV_SIZE
-#endif
-
-char *env_name_spec = "Flash";
-
-#ifdef ENV_IS_EMBEDDED
-env_t *env_ptr = &environment;
-
-static env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
-
-#else /* ! ENV_IS_EMBEDDED */
-
-env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
-static env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
-#endif /* ENV_IS_EMBEDDED */
-
-#if defined(CMD_SAVEENV) || defined(CONFIG_ENV_ADDR_REDUND)
-/* CONFIG_ENV_ADDR is supposed to be on sector boundary */
-static ulong end_addr = CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1;
-#endif
-
-#ifdef CONFIG_ENV_ADDR_REDUND
-static env_t *flash_addr_new = (env_t *)CONFIG_ENV_ADDR_REDUND;
-
-/* CONFIG_ENV_ADDR_REDUND is supposed to be on sector boundary */
-static ulong end_addr_new = CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1;
-#endif /* CONFIG_ENV_ADDR_REDUND */
-
-
-#ifdef CONFIG_ENV_ADDR_REDUND
-int env_init(void)
-{
- int crc1_ok = 0, crc2_ok = 0;
-
- uchar flag1 = flash_addr->flags;
- uchar flag2 = flash_addr_new->flags;
-
- ulong addr_default = (ulong)&default_environment[0];
- ulong addr1 = (ulong)&(flash_addr->data);
- ulong addr2 = (ulong)&(flash_addr_new->data);
-
- crc1_ok = crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc;
- crc2_ok =
- crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc;
-
- if (crc1_ok && !crc2_ok) {
- gd->env_addr = addr1;
- gd->env_valid = 1;
- } else if (!crc1_ok && crc2_ok) {
- gd->env_addr = addr2;
- gd->env_valid = 1;
- } else if (!crc1_ok && !crc2_ok) {
- gd->env_addr = addr_default;
- gd->env_valid = 0;
- } else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
- gd->env_addr = addr1;
- gd->env_valid = 1;
- } else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
- gd->env_addr = addr2;
- gd->env_valid = 1;
- } else if (flag1 == flag2) {
- gd->env_addr = addr1;
- gd->env_valid = 2;
- } else if (flag1 == 0xFF) {
- gd->env_addr = addr1;
- gd->env_valid = 2;
- } else if (flag2 == 0xFF) {
- gd->env_addr = addr2;
- gd->env_valid = 2;
- }
-
- return 0;
-}
-
-#ifdef CMD_SAVEENV
-int saveenv(void)
-{
- env_t env_new;
- char *saved_data = NULL;
- char flag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
- int rc = 1;
-#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
- ulong up_data = 0;
-#endif
-
- debug("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr);
-
- if (flash_sect_protect(0, (ulong)flash_addr, end_addr))
- goto done;
-
- debug("Protect off %08lX ... %08lX\n",
- (ulong)flash_addr_new, end_addr_new);
-
- if (flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new))
- goto done;
-
- rc = env_export(&env_new);
- if (rc)
- return rc;
- env_new.flags = new_flag;
-
-#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
- up_data = end_addr_new + 1 - ((long)flash_addr_new + CONFIG_ENV_SIZE);
- debug("Data to save 0x%lX\n", up_data);
- if (up_data) {
- saved_data = malloc(up_data);
- if (saved_data == NULL) {
- printf("Unable to save the rest of sector (%ld)\n",
- up_data);
- goto done;
- }
- memcpy(saved_data,
- (void *)((long)flash_addr_new + CONFIG_ENV_SIZE),
- up_data);
- debug("Data (start 0x%lX, len 0x%lX) saved at 0x%p\n",
- (long)flash_addr_new + CONFIG_ENV_SIZE,
- up_data, saved_data);
- }
-#endif
- puts("Erasing Flash...");
- debug(" %08lX ... %08lX ...", (ulong)flash_addr_new, end_addr_new);
-
- if (flash_sect_erase((ulong)flash_addr_new, end_addr_new))
- goto done;
-
- puts("Writing to Flash... ");
- debug(" %08lX ... %08lX ...",
- (ulong)&(flash_addr_new->data),
- sizeof(env_ptr->data) + (ulong)&(flash_addr_new->data));
- rc = flash_write((char *)&env_new, (ulong)flash_addr_new,
- sizeof(env_new));
- if (rc)
- goto perror;
-
- rc = flash_write(&flag, (ulong)&(flash_addr->flags),
- sizeof(flash_addr->flags));
- if (rc)
- goto perror;
-
-#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
- if (up_data) { /* restore the rest of sector */
- debug("Restoring the rest of data to 0x%lX len 0x%lX\n",
- (long)flash_addr_new + CONFIG_ENV_SIZE, up_data);
- if (flash_write(saved_data,
- (long)flash_addr_new + CONFIG_ENV_SIZE,
- up_data))
- goto perror;
- }
-#endif
- puts("done\n");
-
- {
- env_t *etmp = flash_addr;
- ulong ltmp = end_addr;
-
- flash_addr = flash_addr_new;
- flash_addr_new = etmp;
-
- end_addr = end_addr_new;
- end_addr_new = ltmp;
- }
-
- rc = 0;
- goto done;
-perror:
- flash_perror(rc);
-done:
- if (saved_data)
- free(saved_data);
- /* try to re-protect */
- flash_sect_protect(1, (ulong)flash_addr, end_addr);
- flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new);
-
- return rc;
-}
-#endif /* CMD_SAVEENV */
-
-#else /* ! CONFIG_ENV_ADDR_REDUND */
-
-int env_init(void)
-{
- if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
- gd->env_addr = (ulong)&(env_ptr->data);
- gd->env_valid = 1;
- return 0;
- }
-
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 0;
- return 0;
-}
-
-#ifdef CMD_SAVEENV
-int saveenv(void)
-{
- env_t env_new;
- int rc = 1;
- char *saved_data = NULL;
-#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
- ulong up_data = 0;
-
- up_data = end_addr + 1 - ((long)flash_addr + CONFIG_ENV_SIZE);
- debug("Data to save 0x%lx\n", up_data);
- if (up_data) {
- saved_data = malloc(up_data);
- if (saved_data == NULL) {
- printf("Unable to save the rest of sector (%ld)\n",
- up_data);
- goto done;
- }
- memcpy(saved_data,
- (void *)((long)flash_addr + CONFIG_ENV_SIZE), up_data);
- debug("Data (start 0x%lx, len 0x%lx) saved at 0x%lx\n",
- (ulong)flash_addr + CONFIG_ENV_SIZE,
- up_data,
- (ulong)saved_data);
- }
-#endif /* CONFIG_ENV_SECT_SIZE */
-
- debug("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr);
-
- if (flash_sect_protect(0, (long)flash_addr, end_addr))
- goto done;
-
- rc = env_export(&env_new);
- if (rc)
- goto done;
-
- puts("Erasing Flash...");
- if (flash_sect_erase((long)flash_addr, end_addr))
- goto done;
-
- puts("Writing to Flash... ");
- rc = flash_write((char *)&env_new, (long)flash_addr, CONFIG_ENV_SIZE);
- if (rc != 0)
- goto perror;
-
-#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
- if (up_data) { /* restore the rest of sector */
- debug("Restoring the rest of data to 0x%lx len 0x%lx\n",
- (ulong)flash_addr + CONFIG_ENV_SIZE, up_data);
- if (flash_write(saved_data,
- (long)flash_addr + CONFIG_ENV_SIZE,
- up_data))
- goto perror;
- }
-#endif
- puts("done\n");
- rc = 0;
- goto done;
-perror:
- flash_perror(rc);
-done:
- if (saved_data)
- free(saved_data);
- /* try to re-protect */
- flash_sect_protect(1, (long)flash_addr, end_addr);
- return rc;
-}
-#endif /* CMD_SAVEENV */
-
-#endif /* CONFIG_ENV_ADDR_REDUND */
-
-void env_relocate_spec(void)
-{
-#ifdef CONFIG_ENV_ADDR_REDUND
- if (gd->env_addr != (ulong)&(flash_addr->data)) {
- env_t *etmp = flash_addr;
- ulong ltmp = end_addr;
-
- flash_addr = flash_addr_new;
- flash_addr_new = etmp;
-
- end_addr = end_addr_new;
- end_addr_new = ltmp;
- }
-
- if (flash_addr_new->flags != OBSOLETE_FLAG &&
- crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc) {
- char flag = OBSOLETE_FLAG;
-
- gd->env_valid = 2;
- flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new);
- flash_write(&flag,
- (ulong)&(flash_addr_new->flags),
- sizeof(flash_addr_new->flags));
- flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new);
- }
-
- if (flash_addr->flags != ACTIVE_FLAG &&
- (flash_addr->flags & ACTIVE_FLAG) == ACTIVE_FLAG) {
- char flag = ACTIVE_FLAG;
-
- gd->env_valid = 2;
- flash_sect_protect(0, (ulong)flash_addr, end_addr);
- flash_write(&flag,
- (ulong)&(flash_addr->flags),
- sizeof(flash_addr->flags));
- flash_sect_protect(1, (ulong)flash_addr, end_addr);
- }
-
- if (gd->env_valid == 2)
- puts("*** Warning - some problems detected "
- "reading environment; recovered successfully\n\n");
-#endif /* CONFIG_ENV_ADDR_REDUND */
-
- env_import((char *)flash_addr, 1);
-}
+++ /dev/null
-/*
- * (C) Copyright 2008-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-
-#include <command.h>
-#include <environment.h>
-#include <fdtdec.h>
-#include <linux/stddef.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <mmc.h>
-#include <search.h>
-#include <errno.h>
-
-#if defined(CONFIG_ENV_SIZE_REDUND) && \
- (CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
-#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
-#endif
-
-char *env_name_spec = "MMC";
-
-#ifdef ENV_IS_EMBEDDED
-env_t *env_ptr = &environment;
-#else /* ! ENV_IS_EMBEDDED */
-env_t *env_ptr;
-#endif /* ENV_IS_EMBEDDED */
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if !defined(CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_OFFSET 0
-#endif
-
-#if CONFIG_IS_ENABLED(OF_CONTROL)
-static inline s64 mmc_offset(int copy)
-{
- const char *propname = "u-boot,mmc-env-offset";
- s64 defvalue = CONFIG_ENV_OFFSET;
-
-#if defined(CONFIG_ENV_OFFSET_REDUND)
- if (copy) {
- propname = "u-boot,mmc-env-offset-redundant";
- defvalue = CONFIG_ENV_OFFSET_REDUND;
- }
-#endif
-
- return fdtdec_get_config_int(gd->fdt_blob, propname, defvalue);
-}
-#else
-static inline s64 mmc_offset(int copy)
-{
- s64 offset = CONFIG_ENV_OFFSET;
-
-#if defined(CONFIG_ENV_OFFSET_REDUND)
- if (copy)
- offset = CONFIG_ENV_OFFSET_REDUND;
-#endif
- return offset;
-}
-#endif
-
-__weak int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
-{
- s64 offset = mmc_offset(copy);
-
- if (offset < 0)
- offset += mmc->capacity;
-
- *env_addr = offset;
-
- return 0;
-}
-
-__weak int mmc_get_env_dev(void)
-{
- return CONFIG_SYS_MMC_ENV_DEV;
-}
-
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
-#ifdef CONFIG_SYS_MMC_ENV_PART
-__weak uint mmc_get_env_part(struct mmc *mmc)
-{
- return CONFIG_SYS_MMC_ENV_PART;
-}
-
-static unsigned char env_mmc_orig_hwpart;
-
-static int mmc_set_env_part(struct mmc *mmc)
-{
- uint part = mmc_get_env_part(mmc);
- int dev = mmc_get_env_dev();
- int ret = 0;
-
- env_mmc_orig_hwpart = mmc_get_blk_desc(mmc)->hwpart;
- ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part);
- if (ret)
- puts("MMC partition switch failed\n");
-
- return ret;
-}
-#else
-static inline int mmc_set_env_part(struct mmc *mmc) {return 0; };
-#endif
-
-static const char *init_mmc_for_env(struct mmc *mmc)
-{
- if (!mmc)
- return "!No MMC card found";
-
-#ifdef CONFIG_BLK
- struct udevice *dev;
-
- if (blk_get_from_parent(mmc->dev, &dev))
- return "!No block device";
-#else
- if (mmc_init(mmc))
- return "!MMC init failed";
-#endif
- if (mmc_set_env_part(mmc))
- return "!MMC partition switch failed";
-
- return NULL;
-}
-
-static void fini_mmc_for_env(struct mmc *mmc)
-{
-#ifdef CONFIG_SYS_MMC_ENV_PART
- int dev = mmc_get_env_dev();
-
- blk_select_hwpart_devnum(IF_TYPE_MMC, dev, env_mmc_orig_hwpart);
-#endif
-}
-
-#ifdef CONFIG_CMD_SAVEENV
-static inline int write_env(struct mmc *mmc, unsigned long size,
- unsigned long offset, const void *buffer)
-{
- uint blk_start, blk_cnt, n;
- struct blk_desc *desc = mmc_get_blk_desc(mmc);
-
- blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len;
- blk_cnt = ALIGN(size, mmc->write_bl_len) / mmc->write_bl_len;
-
- n = blk_dwrite(desc, blk_start, blk_cnt, (u_char *)buffer);
-
- return (n == blk_cnt) ? 0 : -1;
-}
-
-int saveenv(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
- int dev = mmc_get_env_dev();
- struct mmc *mmc = find_mmc_device(dev);
- u32 offset;
- int ret, copy = 0;
- const char *errmsg;
-
- errmsg = init_mmc_for_env(mmc);
- if (errmsg) {
- printf("%s\n", errmsg);
- return 1;
- }
-
- ret = env_export(env_new);
- if (ret)
- goto fini;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 1)
- copy = 1;
-#endif
-
- if (mmc_get_env_addr(mmc, copy, &offset)) {
- ret = 1;
- goto fini;
- }
-
- printf("Writing to %sMMC(%d)... ", copy ? "redundant " : "", dev);
- if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
- puts("failed\n");
- ret = 1;
- goto fini;
- }
-
- puts("done\n");
- ret = 0;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
-#endif
-
-fini:
- fini_mmc_for_env(mmc);
- return ret;
-}
-#endif /* CONFIG_CMD_SAVEENV */
-
-static inline int read_env(struct mmc *mmc, unsigned long size,
- unsigned long offset, const void *buffer)
-{
- uint blk_start, blk_cnt, n;
- struct blk_desc *desc = mmc_get_blk_desc(mmc);
-
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(size, mmc->read_bl_len) / mmc->read_bl_len;
-
- n = blk_dread(desc, blk_start, blk_cnt, (uchar *)buffer);
-
- return (n == blk_cnt) ? 0 : -1;
-}
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-void env_relocate_spec(void)
-{
-#if !defined(ENV_IS_EMBEDDED)
- struct mmc *mmc;
- u32 offset1, offset2;
- int read1_fail = 0, read2_fail = 0;
- int ret;
- int dev = mmc_get_env_dev();
- const char *errmsg = NULL;
-
- ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
- ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
-
- mmc = find_mmc_device(dev);
-
- errmsg = init_mmc_for_env(mmc);
- if (errmsg) {
- ret = 1;
- goto err;
- }
-
- if (mmc_get_env_addr(mmc, 0, &offset1) ||
- mmc_get_env_addr(mmc, 1, &offset2)) {
- ret = 1;
- goto fini;
- }
-
- read1_fail = read_env(mmc, CONFIG_ENV_SIZE, offset1, tmp_env1);
- read2_fail = read_env(mmc, CONFIG_ENV_SIZE, offset2, tmp_env2);
-
- if (read1_fail && read2_fail)
- puts("*** Error - No Valid Environment Area found\n");
- else if (read1_fail || read2_fail)
- puts("*** Warning - some problems detected "
- "reading environment; recovered successfully\n");
-
- if (read1_fail && read2_fail) {
- errmsg = "!bad CRC";
- ret = 1;
- goto fini;
- } else if (!read1_fail && read2_fail) {
- gd->env_valid = 1;
- env_import((char *)tmp_env1, 1);
- } else if (read1_fail && !read2_fail) {
- gd->env_valid = 2;
- env_import((char *)tmp_env2, 1);
- } else {
- env_import_redund((char *)tmp_env1, (char *)tmp_env2);
- }
-
- ret = 0;
-
-fini:
- fini_mmc_for_env(mmc);
-err:
- if (ret)
- set_default_env(errmsg);
-#endif
-}
-#else /* ! CONFIG_ENV_OFFSET_REDUND */
-void env_relocate_spec(void)
-{
-#if !defined(ENV_IS_EMBEDDED)
- ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
- struct mmc *mmc;
- u32 offset;
- int ret;
- int dev = mmc_get_env_dev();
- const char *errmsg;
-
- mmc = find_mmc_device(dev);
-
- errmsg = init_mmc_for_env(mmc);
- if (errmsg) {
- ret = 1;
- goto err;
- }
-
- if (mmc_get_env_addr(mmc, 0, &offset)) {
- ret = 1;
- goto fini;
- }
-
- if (read_env(mmc, CONFIG_ENV_SIZE, offset, buf)) {
- errmsg = "!read failed";
- ret = 1;
- goto fini;
- }
-
- env_import(buf, 1);
- ret = 0;
-
-fini:
- fini_mmc_for_env(mmc);
-err:
- if (ret)
- set_default_env(errmsg);
-#endif
-}
-#endif /* CONFIG_ENV_OFFSET_REDUND */
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2008
- * Stuart Wood, Lab X Technologies <stuart.wood@labxtechnologies.com>
- *
- * (C) Copyright 2004
- * Jian Zhang, Texas Instruments, jzhang@ti.com.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <nand.h>
-#include <search.h>
-#include <errno.h>
-
-#if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_NAND)
-#define CMD_SAVEENV
-#elif defined(CONFIG_ENV_OFFSET_REDUND)
-#error CONFIG_ENV_OFFSET_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_NAND
-#endif
-
-#if defined(CONFIG_ENV_SIZE_REDUND) && \
- (CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
-#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
-#endif
-
-#ifndef CONFIG_ENV_RANGE
-#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE
-#endif
-
-char *env_name_spec = "NAND";
-
-#if defined(ENV_IS_EMBEDDED)
-env_t *env_ptr = &environment;
-#elif defined(CONFIG_NAND_ENV_DST)
-env_t *env_ptr = (env_t *)CONFIG_NAND_ENV_DST;
-#else /* ! ENV_IS_EMBEDDED */
-env_t *env_ptr;
-#endif /* ENV_IS_EMBEDDED */
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * This is called before nand_init() so we can't read NAND to
- * validate env data.
- *
- * Mark it OK for now. env_relocate() in env_common.c will call our
- * relocate function which does the real validation.
- *
- * When using a NAND boot image (like sequoia_nand), the environment
- * can be embedded or attached to the U-Boot image in NAND flash.
- * This way the SPL loads not only the U-Boot image from NAND but
- * also the environment.
- */
-int env_init(void)
-{
-#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_NAND_ENV_DST)
- int crc1_ok = 0, crc2_ok = 0;
- env_t *tmp_env1;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- env_t *tmp_env2;
-
- tmp_env2 = (env_t *)((ulong)env_ptr + CONFIG_ENV_SIZE);
- crc2_ok = crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc;
-#endif
- tmp_env1 = env_ptr;
- crc1_ok = crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc;
-
- if (!crc1_ok && !crc2_ok) {
- gd->env_addr = 0;
- gd->env_valid = 0;
-
- return 0;
- } else if (crc1_ok && !crc2_ok) {
- gd->env_valid = 1;
- }
-#ifdef CONFIG_ENV_OFFSET_REDUND
- else if (!crc1_ok && crc2_ok) {
- gd->env_valid = 2;
- } else {
- /* both ok - check serial */
- if (tmp_env1->flags == 255 && tmp_env2->flags == 0)
- gd->env_valid = 2;
- else if (tmp_env2->flags == 255 && tmp_env1->flags == 0)
- gd->env_valid = 1;
- else if (tmp_env1->flags > tmp_env2->flags)
- gd->env_valid = 1;
- else if (tmp_env2->flags > tmp_env1->flags)
- gd->env_valid = 2;
- else /* flags are equal - almost impossible */
- gd->env_valid = 1;
- }
-
- if (gd->env_valid == 2)
- env_ptr = tmp_env2;
- else
-#endif
- if (gd->env_valid == 1)
- env_ptr = tmp_env1;
-
- gd->env_addr = (ulong)env_ptr->data;
-
-#else /* ENV_IS_EMBEDDED || CONFIG_NAND_ENV_DST */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-#endif /* ENV_IS_EMBEDDED || CONFIG_NAND_ENV_DST */
-
- return 0;
-}
-
-#ifdef CMD_SAVEENV
-/*
- * The legacy NAND code saved the environment in the first NAND device i.e.,
- * nand_dev_desc + 0. This is also the behaviour using the new NAND code.
- */
-static int writeenv(size_t offset, u_char *buf)
-{
- size_t end = offset + CONFIG_ENV_RANGE;
- size_t amount_saved = 0;
- size_t blocksize, len;
- struct mtd_info *mtd;
- u_char *char_ptr;
-
- mtd = get_nand_dev_by_index(0);
- if (!mtd)
- return 1;
-
- blocksize = mtd->erasesize;
- len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
-
- while (amount_saved < CONFIG_ENV_SIZE && offset < end) {
- if (nand_block_isbad(mtd, offset)) {
- offset += blocksize;
- } else {
- char_ptr = &buf[amount_saved];
- if (nand_write(mtd, offset, &len, char_ptr))
- return 1;
-
- offset += blocksize;
- amount_saved += len;
- }
- }
- if (amount_saved != CONFIG_ENV_SIZE)
- return 1;
-
- return 0;
-}
-
-struct env_location {
- const char *name;
- const nand_erase_options_t erase_opts;
-};
-
-static int erase_and_write_env(const struct env_location *location,
- u_char *env_new)
-{
- struct mtd_info *mtd;
- int ret = 0;
-
- mtd = get_nand_dev_by_index(0);
- if (!mtd)
- return 1;
-
- printf("Erasing %s...\n", location->name);
- if (nand_erase_opts(mtd, &location->erase_opts))
- return 1;
-
- printf("Writing to %s... ", location->name);
- ret = writeenv(location->erase_opts.offset, env_new);
- puts(ret ? "FAILED!\n" : "OK\n");
-
- return ret;
-}
-
-int saveenv(void)
-{
- int ret = 0;
- ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
- int env_idx = 0;
- static const struct env_location location[] = {
- {
- .name = "NAND",
- .erase_opts = {
- .length = CONFIG_ENV_RANGE,
- .offset = CONFIG_ENV_OFFSET,
- },
- },
-#ifdef CONFIG_ENV_OFFSET_REDUND
- {
- .name = "redundant NAND",
- .erase_opts = {
- .length = CONFIG_ENV_RANGE,
- .offset = CONFIG_ENV_OFFSET_REDUND,
- },
- },
-#endif
- };
-
-
- if (CONFIG_ENV_RANGE < CONFIG_ENV_SIZE)
- return 1;
-
- ret = env_export(env_new);
- if (ret)
- return ret;
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
- env_idx = (gd->env_valid == 1);
-#endif
-
- ret = erase_and_write_env(&location[env_idx], (u_char *)env_new);
-#ifdef CONFIG_ENV_OFFSET_REDUND
- if (!ret) {
- /* preset other copy for next write */
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
- return ret;
- }
-
- env_idx = (env_idx + 1) & 1;
- ret = erase_and_write_env(&location[env_idx], (u_char *)env_new);
- if (!ret)
- printf("Warning: primary env write failed,"
- " redundancy is lost!\n");
-#endif
-
- return ret;
-}
-#endif /* CMD_SAVEENV */
-
-#if defined(CONFIG_SPL_BUILD)
-static int readenv(size_t offset, u_char *buf)
-{
- return nand_spl_load_image(offset, CONFIG_ENV_SIZE, buf);
-}
-#else
-static int readenv(size_t offset, u_char *buf)
-{
- size_t end = offset + CONFIG_ENV_RANGE;
- size_t amount_loaded = 0;
- size_t blocksize, len;
- struct mtd_info *mtd;
- u_char *char_ptr;
-
- mtd = get_nand_dev_by_index(0);
- if (!mtd)
- return 1;
-
- blocksize = mtd->erasesize;
- len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
-
- while (amount_loaded < CONFIG_ENV_SIZE && offset < end) {
- if (nand_block_isbad(mtd, offset)) {
- offset += blocksize;
- } else {
- char_ptr = &buf[amount_loaded];
- if (nand_read_skip_bad(mtd, offset,
- &len, NULL,
- mtd->size, char_ptr))
- return 1;
-
- offset += blocksize;
- amount_loaded += len;
- }
- }
-
- if (amount_loaded != CONFIG_ENV_SIZE)
- return 1;
-
- return 0;
-}
-#endif /* #if defined(CONFIG_SPL_BUILD) */
-
-#ifdef CONFIG_ENV_OFFSET_OOB
-int get_nand_env_oob(struct mtd_info *mtd, unsigned long *result)
-{
- struct mtd_oob_ops ops;
- uint32_t oob_buf[ENV_OFFSET_SIZE / sizeof(uint32_t)];
- int ret;
-
- ops.datbuf = NULL;
- ops.mode = MTD_OOB_AUTO;
- ops.ooboffs = 0;
- ops.ooblen = ENV_OFFSET_SIZE;
- ops.oobbuf = (void *)oob_buf;
-
- ret = mtd->read_oob(mtd, ENV_OFFSET_SIZE, &ops);
- if (ret) {
- printf("error reading OOB block 0\n");
- return ret;
- }
-
- if (oob_buf[0] == ENV_OOB_MARKER) {
- *result = oob_buf[1] * mtd->erasesize;
- } else if (oob_buf[0] == ENV_OOB_MARKER_OLD) {
- *result = oob_buf[1];
- } else {
- printf("No dynamic environment marker in OOB block 0\n");
- return -ENOENT;
- }
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-void env_relocate_spec(void)
-{
-#if !defined(ENV_IS_EMBEDDED)
- int read1_fail = 0, read2_fail = 0;
- env_t *tmp_env1, *tmp_env2;
-
- tmp_env1 = (env_t *)malloc(CONFIG_ENV_SIZE);
- tmp_env2 = (env_t *)malloc(CONFIG_ENV_SIZE);
- if (tmp_env1 == NULL || tmp_env2 == NULL) {
- puts("Can't allocate buffers for environment\n");
- set_default_env("!malloc() failed");
- goto done;
- }
-
- read1_fail = readenv(CONFIG_ENV_OFFSET, (u_char *) tmp_env1);
- read2_fail = readenv(CONFIG_ENV_OFFSET_REDUND, (u_char *) tmp_env2);
-
- if (read1_fail && read2_fail)
- puts("*** Error - No Valid Environment Area found\n");
- else if (read1_fail || read2_fail)
- puts("*** Warning - some problems detected "
- "reading environment; recovered successfully\n");
-
- if (read1_fail && read2_fail) {
- set_default_env("!bad env area");
- goto done;
- } else if (!read1_fail && read2_fail) {
- gd->env_valid = 1;
- env_import((char *)tmp_env1, 1);
- } else if (read1_fail && !read2_fail) {
- gd->env_valid = 2;
- env_import((char *)tmp_env2, 1);
- } else {
- env_import_redund((char *)tmp_env1, (char *)tmp_env2);
- }
-
-done:
- free(tmp_env1);
- free(tmp_env2);
-
-#endif /* ! ENV_IS_EMBEDDED */
-}
-#else /* ! CONFIG_ENV_OFFSET_REDUND */
-/*
- * The legacy NAND code saved the environment in the first NAND
- * device i.e., nand_dev_desc + 0. This is also the behaviour using
- * the new NAND code.
- */
-void env_relocate_spec(void)
-{
-#if !defined(ENV_IS_EMBEDDED)
- int ret;
- ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
-
-#if defined(CONFIG_ENV_OFFSET_OOB)
- struct mtd_info *mtd = get_nand_dev_by_index(0);
- /*
- * If unable to read environment offset from NAND OOB then fall through
- * to the normal environment reading code below
- */
- if (mtd && !get_nand_env_oob(mtd, &nand_env_oob_offset)) {
- printf("Found Environment offset in OOB..\n");
- } else {
- set_default_env("!no env offset in OOB");
- return;
- }
-#endif
-
- ret = readenv(CONFIG_ENV_OFFSET, (u_char *)buf);
- if (ret) {
- set_default_env("!readenv() failed");
- return;
- }
-
- env_import(buf, 1);
-#endif /* ! ENV_IS_EMBEDDED */
-}
-#endif /* CONFIG_ENV_OFFSET_REDUND */
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
-
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-env_t *env_ptr;
-
-void env_relocate_spec(void)
-{
-}
-
-/*
- * Initialize Environment use
- *
- * We are still running from ROM, so data use is limited
- */
-int env_init(void)
-{
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 0;
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
-
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * 09-18-2001 Andreas Heppel, Sysgo RTS GmbH <aheppel@sysgo.de>
- *
- * It might not be possible in all cases to use 'memcpy()' to copy
- * the environment to NVRAM, as the NVRAM might not be mapped into
- * the memory space. (I.e. this is the case for the BAB750). In those
- * cases it might be possible to access the NVRAM using a different
- * method. For example, the RTC on the BAB750 is accessible in IO
- * space using its address and data registers. To enable usage of
- * NVRAM in those cases I invented the functions 'nvram_read()' and
- * 'nvram_write()', which will be activated upon the configuration
- * #define CONFIG_SYS_NVRAM_ACCESS_ROUTINE. Note, that those functions are
- * strongly dependent on the used HW, and must be redefined for each
- * board that wants to use them.
- */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <search.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
-extern void *nvram_read(void *dest, const long src, size_t count);
-extern void nvram_write(long dest, const void *src, size_t count);
-env_t *env_ptr;
-#else
-env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
-#endif
-
-char *env_name_spec = "NVRAM";
-
-#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
-uchar env_get_char_spec(int index)
-{
- uchar c;
-
- nvram_read(&c, CONFIG_ENV_ADDR + index, 1);
-
- return c;
-}
-#endif
-
-void env_relocate_spec(void)
-{
- char buf[CONFIG_ENV_SIZE];
-
-#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE)
- nvram_read(buf, CONFIG_ENV_ADDR, CONFIG_ENV_SIZE);
-#else
- memcpy(buf, (void *)CONFIG_ENV_ADDR, CONFIG_ENV_SIZE);
-#endif
- env_import(buf, 1);
-}
-
-int saveenv(void)
-{
- env_t env_new;
- int rcode = 0;
-
- rcode = env_export(&env_new);
- if (rcode)
- return rcode;
-
-#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
- nvram_write(CONFIG_ENV_ADDR, &env_new, CONFIG_ENV_SIZE);
-#else
- if (memcpy((char *)CONFIG_ENV_ADDR, &env_new, CONFIG_ENV_SIZE) == NULL)
- rcode = 1;
-#endif
- return rcode;
-}
-
-/*
- * Initialize Environment use
- *
- * We are still running from ROM, so data use is limited
- */
-int env_init(void)
-{
-#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE)
- ulong crc;
- uchar data[ENV_SIZE];
-
- nvram_read(&crc, CONFIG_ENV_ADDR, sizeof(ulong));
- nvram_read(data, CONFIG_ENV_ADDR + sizeof(ulong), ENV_SIZE);
-
- if (crc32(0, data, ENV_SIZE) == crc) {
- gd->env_addr = (ulong)CONFIG_ENV_ADDR + sizeof(long);
-#else
- if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
- gd->env_addr = (ulong)&env_ptr->data;
-#endif
- gd->env_valid = 1;
- } else {
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 0;
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2010 DENX Software Engineering
- * Wolfgang Denk <wd@denx.de>
- *
- * (C) Copyright 2005-2009 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <malloc.h>
-#include <search.h>
-#include <errno.h>
-#include <onenand_uboot.h>
-
-#include <linux/compat.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/onenand.h>
-
-char *env_name_spec = "OneNAND";
-
-#define ONENAND_MAX_ENV_SIZE CONFIG_ENV_SIZE
-#define ONENAND_ENV_SIZE(mtd) (ONENAND_MAX_ENV_SIZE - ENV_HEADER_SIZE)
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void env_relocate_spec(void)
-{
- struct mtd_info *mtd = &onenand_mtd;
-#ifdef CONFIG_ENV_ADDR_FLEX
- struct onenand_chip *this = &onenand_chip;
-#endif
- int rc;
- size_t retlen;
-#ifdef ENV_IS_EMBEDDED
- char *buf = (char *)&environment;
-#else
- loff_t env_addr = CONFIG_ENV_ADDR;
- char onenand_env[ONENAND_MAX_ENV_SIZE];
- char *buf = (char *)&onenand_env[0];
-#endif /* ENV_IS_EMBEDDED */
-
-#ifndef ENV_IS_EMBEDDED
-# ifdef CONFIG_ENV_ADDR_FLEX
- if (FLEXONENAND(this))
- env_addr = CONFIG_ENV_ADDR_FLEX;
-# endif
- /* Check OneNAND exist */
- if (mtd->writesize)
- /* Ignore read fail */
- mtd_read(mtd, env_addr, ONENAND_MAX_ENV_SIZE,
- &retlen, (u_char *)buf);
- else
- mtd->writesize = MAX_ONENAND_PAGESIZE;
-#endif /* !ENV_IS_EMBEDDED */
-
- rc = env_import(buf, 1);
- if (rc)
- gd->env_valid = 1;
-}
-
-int saveenv(void)
-{
- env_t env_new;
- int ret;
- struct mtd_info *mtd = &onenand_mtd;
-#ifdef CONFIG_ENV_ADDR_FLEX
- struct onenand_chip *this = &onenand_chip;
-#endif
- loff_t env_addr = CONFIG_ENV_ADDR;
- size_t retlen;
- struct erase_info instr = {
- .callback = NULL,
- };
-
- ret = env_export(&env_new);
- if (ret)
- return ret;
-
- instr.len = CONFIG_ENV_SIZE;
-#ifdef CONFIG_ENV_ADDR_FLEX
- if (FLEXONENAND(this)) {
- env_addr = CONFIG_ENV_ADDR_FLEX;
- instr.len = CONFIG_ENV_SIZE_FLEX;
- instr.len <<= onenand_mtd.eraseregions[0].numblocks == 1 ?
- 1 : 0;
- }
-#endif
- instr.addr = env_addr;
- instr.mtd = mtd;
- if (mtd_erase(mtd, &instr)) {
- printf("OneNAND: erase failed at 0x%08llx\n", env_addr);
- return 1;
- }
-
- if (mtd_write(mtd, env_addr, ONENAND_MAX_ENV_SIZE, &retlen,
- (u_char *)&env_new)) {
- printf("OneNAND: write failed at 0x%llx\n", instr.addr);
- return 2;
- }
-
- return 0;
-}
-
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2011-2012 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-
-char *env_name_spec = "Remote";
-
-#ifdef ENV_IS_EMBEDDED
-env_t *env_ptr = &environment;
-#else /* ! ENV_IS_EMBEDDED */
-env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
-#endif /* ENV_IS_EMBEDDED */
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if !defined(CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_OFFSET 0
-#endif
-
-int env_init(void)
-{
- if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
- gd->env_addr = (ulong)&(env_ptr->data);
- gd->env_valid = 1;
- return 0;
- }
-
- gd->env_addr = (ulong)default_environment;
- gd->env_valid = 0;
- return 0;
-}
-
-#ifdef CONFIG_CMD_SAVEENV
-int saveenv(void)
-{
-#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
- printf("Can not support the 'saveenv' when boot from SRIO or PCIE!\n");
- return 1;
-#else
- return 0;
-#endif
-}
-#endif /* CONFIG_CMD_SAVEENV */
-
-void env_relocate_spec(void)
-{
-#ifndef ENV_IS_EMBEDDED
- env_import((char *)env_ptr, 1);
-#endif
-}
+++ /dev/null
-/*
- * (C) Copyright 2010-2016 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <errno.h>
-#include <memalign.h>
-#include <sata.h>
-#include <search.h>
-
-#if defined(CONFIG_ENV_SIZE_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND)
-#error ENV REDUND not supported
-#endif
-
-#if !defined(CONFIG_ENV_OFFSET) || !defined(CONFIG_ENV_SIZE)
-#error CONFIG_ENV_OFFSET or CONFIG_ENV_SIZE not defined
-#endif
-
-char *env_name_spec = "SATA";
-
-DECLARE_GLOBAL_DATA_PTR;
-
-__weak int sata_get_env_dev(void)
-{
- return CONFIG_SYS_SATA_ENV_DEV;
-}
-
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_SAVEENV
-static inline int write_env(struct blk_desc *sata, unsigned long size,
- unsigned long offset, void *buffer)
-{
- uint blk_start, blk_cnt, n;
-
- blk_start = ALIGN(offset, sata->blksz) / sata->blksz;
- blk_cnt = ALIGN(size, sata->blksz) / sata->blksz;
-
- n = blk_dwrite(sata, blk_start, blk_cnt, buffer);
-
- return (n == blk_cnt) ? 0 : -1;
-}
-
-int saveenv(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
- struct blk_desc *sata = NULL;
- int env_sata, ret;
-
- if (sata_initialize())
- return 1;
-
- env_sata = sata_get_env_dev();
-
- sata = sata_get_dev(env_sata);
- if (sata == NULL) {
- printf("Unknown SATA(%d) device for environment!\n",
- env_sata);
- return 1;
- }
-
- ret = env_export(env_new);
- if (ret)
- return 1;
-
- printf("Writing to SATA(%d)...", env_sata);
- if (write_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, &env_new)) {
- puts("failed\n");
- return 1;
- }
-
- puts("done\n");
- return 0;
-}
-#endif /* CONFIG_CMD_SAVEENV */
-
-static inline int read_env(struct blk_desc *sata, unsigned long size,
- unsigned long offset, void *buffer)
-{
- uint blk_start, blk_cnt, n;
-
- blk_start = ALIGN(offset, sata->blksz) / sata->blksz;
- blk_cnt = ALIGN(size, sata->blksz) / sata->blksz;
-
- n = blk_dread(sata, blk_start, blk_cnt, buffer);
-
- return (n == blk_cnt) ? 0 : -1;
-}
-
-void env_relocate_spec(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
- struct blk_desc *sata = NULL;
- int env_sata;
-
- if (sata_initialize())
- return;
-
- env_sata = sata_get_env_dev();
-
- sata = sata_get_dev(env_sata);
- if (sata == NULL) {
- printf("Unknown SATA(%d) device for environment!\n",
- env_sata);
- return;
- }
-
- if (read_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf))
- return set_default_env(NULL);
-
- env_import(buf, 1);
-}
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
- *
- * (C) Copyright 2008 Atmel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#include <common.h>
-#include <dm.h>
-#include <environment.h>
-#include <malloc.h>
-#include <spi.h>
-#include <spi_flash.h>
-#include <search.h>
-#include <errno.h>
-#include <dm/device-internal.h>
-
-#ifndef CONFIG_ENV_SPI_BUS
-# define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
-#endif
-#ifndef CONFIG_ENV_SPI_CS
-# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
-#endif
-#ifndef CONFIG_ENV_SPI_MAX_HZ
-# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
-#endif
-#ifndef CONFIG_ENV_SPI_MODE
-# define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
-#endif
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-static ulong env_offset = CONFIG_ENV_OFFSET;
-static ulong env_new_offset = CONFIG_ENV_OFFSET_REDUND;
-
-#define ACTIVE_FLAG 1
-#define OBSOLETE_FLAG 0
-#endif /* CONFIG_ENV_OFFSET_REDUND */
-
-DECLARE_GLOBAL_DATA_PTR;
-
-char *env_name_spec = "SPI Flash";
-
-static struct spi_flash *env_flash;
-
-static int setup_flash_device(void)
-{
-#ifdef CONFIG_DM_SPI_FLASH
- struct udevice *new;
- int ret;
-
- /* speed and mode will be read from DT */
- ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
- 0, 0, &new);
- if (ret) {
- set_default_env("!spi_flash_probe_bus_cs() failed");
- return 1;
- }
-
- env_flash = dev_get_uclass_priv(new);
-#else
-
- if (!env_flash) {
- env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
- CONFIG_ENV_SPI_CS,
- CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
- if (!env_flash) {
- set_default_env("!spi_flash_probe() failed");
- return 1;
- }
- }
-#endif
- return 0;
-}
-
-#if defined(CONFIG_ENV_OFFSET_REDUND)
-int saveenv(void)
-{
- env_t env_new;
- char *saved_buffer = NULL, flag = OBSOLETE_FLAG;
- u32 saved_size, saved_offset, sector;
- int ret;
-
- ret = setup_flash_device();
- if (ret)
- return ret;
-
- ret = env_export(&env_new);
- if (ret)
- return ret;
- env_new.flags = ACTIVE_FLAG;
-
- if (gd->env_valid == 1) {
- env_new_offset = CONFIG_ENV_OFFSET_REDUND;
- env_offset = CONFIG_ENV_OFFSET;
- } else {
- env_new_offset = CONFIG_ENV_OFFSET;
- env_offset = CONFIG_ENV_OFFSET_REDUND;
- }
-
- /* Is the sector larger than the env (i.e. embedded) */
- if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
- saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
- saved_offset = env_new_offset + CONFIG_ENV_SIZE;
- saved_buffer = memalign(ARCH_DMA_MINALIGN, saved_size);
- if (!saved_buffer) {
- ret = 1;
- goto done;
- }
- ret = spi_flash_read(env_flash, saved_offset,
- saved_size, saved_buffer);
- if (ret)
- goto done;
- }
-
- sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
-
- puts("Erasing SPI flash...");
- ret = spi_flash_erase(env_flash, env_new_offset,
- sector * CONFIG_ENV_SECT_SIZE);
- if (ret)
- goto done;
-
- puts("Writing to SPI flash...");
-
- ret = spi_flash_write(env_flash, env_new_offset,
- CONFIG_ENV_SIZE, &env_new);
- if (ret)
- goto done;
-
- if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
- ret = spi_flash_write(env_flash, saved_offset,
- saved_size, saved_buffer);
- if (ret)
- goto done;
- }
-
- ret = spi_flash_write(env_flash, env_offset + offsetof(env_t, flags),
- sizeof(env_new.flags), &flag);
- if (ret)
- goto done;
-
- puts("done\n");
-
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
-
- printf("Valid environment: %d\n", (int)gd->env_valid);
-
- done:
- if (saved_buffer)
- free(saved_buffer);
-
- return ret;
-}
-
-void env_relocate_spec(void)
-{
- int ret;
- int crc1_ok = 0, crc2_ok = 0;
- env_t *tmp_env1 = NULL;
- env_t *tmp_env2 = NULL;
- env_t *ep = NULL;
-
- tmp_env1 = (env_t *)memalign(ARCH_DMA_MINALIGN,
- CONFIG_ENV_SIZE);
- tmp_env2 = (env_t *)memalign(ARCH_DMA_MINALIGN,
- CONFIG_ENV_SIZE);
- if (!tmp_env1 || !tmp_env2) {
- set_default_env("!malloc() failed");
- goto out;
- }
-
- ret = setup_flash_device();
- if (ret)
- goto out;
-
- ret = spi_flash_read(env_flash, CONFIG_ENV_OFFSET,
- CONFIG_ENV_SIZE, tmp_env1);
- if (ret) {
- set_default_env("!spi_flash_read() failed");
- goto err_read;
- }
-
- if (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc)
- crc1_ok = 1;
-
- ret = spi_flash_read(env_flash, CONFIG_ENV_OFFSET_REDUND,
- CONFIG_ENV_SIZE, tmp_env2);
- if (!ret) {
- if (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc)
- crc2_ok = 1;
- }
-
- if (!crc1_ok && !crc2_ok) {
- set_default_env("!bad CRC");
- goto err_read;
- } else if (crc1_ok && !crc2_ok) {
- gd->env_valid = 1;
- } else if (!crc1_ok && crc2_ok) {
- gd->env_valid = 2;
- } else if (tmp_env1->flags == ACTIVE_FLAG &&
- tmp_env2->flags == OBSOLETE_FLAG) {
- gd->env_valid = 1;
- } else if (tmp_env1->flags == OBSOLETE_FLAG &&
- tmp_env2->flags == ACTIVE_FLAG) {
- gd->env_valid = 2;
- } else if (tmp_env1->flags == tmp_env2->flags) {
- gd->env_valid = 1;
- } else if (tmp_env1->flags == 0xFF) {
- gd->env_valid = 1;
- } else if (tmp_env2->flags == 0xFF) {
- gd->env_valid = 2;
- } else {
- /*
- * this differs from code in env_flash.c, but I think a sane
- * default path is desirable.
- */
- gd->env_valid = 1;
- }
-
- if (gd->env_valid == 1)
- ep = tmp_env1;
- else
- ep = tmp_env2;
-
- ret = env_import((char *)ep, 0);
- if (!ret) {
- error("Cannot import environment: errno = %d\n", errno);
- set_default_env("!env_import failed");
- }
-
-err_read:
- spi_flash_free(env_flash);
- env_flash = NULL;
-out:
- free(tmp_env1);
- free(tmp_env2);
-}
-#else
-int saveenv(void)
-{
- u32 saved_size, saved_offset, sector;
- char *saved_buffer = NULL;
- int ret = 1;
- env_t env_new;
-
- ret = setup_flash_device();
- if (ret)
- return ret;
-
- /* Is the sector larger than the env (i.e. embedded) */
- if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
- saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
- saved_offset = CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE;
- saved_buffer = malloc(saved_size);
- if (!saved_buffer)
- goto done;
-
- ret = spi_flash_read(env_flash, saved_offset,
- saved_size, saved_buffer);
- if (ret)
- goto done;
- }
-
- ret = env_export(&env_new);
- if (ret)
- goto done;
-
- sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
-
- puts("Erasing SPI flash...");
- ret = spi_flash_erase(env_flash, CONFIG_ENV_OFFSET,
- sector * CONFIG_ENV_SECT_SIZE);
- if (ret)
- goto done;
-
- puts("Writing to SPI flash...");
- ret = spi_flash_write(env_flash, CONFIG_ENV_OFFSET,
- CONFIG_ENV_SIZE, &env_new);
- if (ret)
- goto done;
-
- if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
- ret = spi_flash_write(env_flash, saved_offset,
- saved_size, saved_buffer);
- if (ret)
- goto done;
- }
-
- ret = 0;
- puts("done\n");
-
- done:
- if (saved_buffer)
- free(saved_buffer);
-
- return ret;
-}
-
-void env_relocate_spec(void)
-{
- int ret;
- char *buf = NULL;
-
- buf = (char *)memalign(ARCH_DMA_MINALIGN, CONFIG_ENV_SIZE);
- if (!buf) {
- set_default_env("!malloc() failed");
- return;
- }
-
- ret = setup_flash_device();
- if (ret)
- goto out;
-
- ret = spi_flash_read(env_flash,
- CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, buf);
- if (ret) {
- set_default_env("!spi_flash_read() failed");
- goto err_read;
- }
-
- ret = env_import(buf, 1);
- if (ret)
- gd->env_valid = 1;
-
-err_read:
- spi_flash_free(env_flash);
- env_flash = NULL;
-out:
- free(buf);
-}
-#endif
-
-int env_init(void)
-{
- /* SPI flash isn't usable before relocation */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
+++ /dev/null
-/*
- * (c) Copyright 2012 by National Instruments,
- * Joe Hershberger <joe.hershberger@ni.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#include <command.h>
-#include <environment.h>
-#include <errno.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <search.h>
-#include <ubi_uboot.h>
-#undef crc32
-
-char *env_name_spec = "UBI";
-
-env_t *env_ptr;
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_SAVEENV
-#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
-int saveenv(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
- int ret;
-
- ret = env_export(env_new);
- if (ret)
- return ret;
-
- if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
- printf("\n** Cannot find mtd partition \"%s\"\n",
- CONFIG_ENV_UBI_PART);
- return 1;
- }
-
- if (gd->env_valid == 1) {
- puts("Writing to redundant UBI... ");
- if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME_REDUND,
- (void *)env_new, CONFIG_ENV_SIZE)) {
- printf("\n** Unable to write env to %s:%s **\n",
- CONFIG_ENV_UBI_PART,
- CONFIG_ENV_UBI_VOLUME_REDUND);
- return 1;
- }
- } else {
- puts("Writing to UBI... ");
- if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME,
- (void *)env_new, CONFIG_ENV_SIZE)) {
- printf("\n** Unable to write env to %s:%s **\n",
- CONFIG_ENV_UBI_PART,
- CONFIG_ENV_UBI_VOLUME);
- return 1;
- }
- }
-
- puts("done\n");
-
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
-
- return 0;
-}
-#else /* ! CONFIG_SYS_REDUNDAND_ENVIRONMENT */
-int saveenv(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
- int ret;
-
- ret = env_export(env_new);
- if (ret)
- return ret;
-
- if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
- printf("\n** Cannot find mtd partition \"%s\"\n",
- CONFIG_ENV_UBI_PART);
- return 1;
- }
-
- if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME, (void *)env_new,
- CONFIG_ENV_SIZE)) {
- printf("\n** Unable to write env to %s:%s **\n",
- CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
- return 1;
- }
-
- puts("done\n");
- return 0;
-}
-#endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
-#endif /* CONFIG_CMD_SAVEENV */
-
-#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
-void env_relocate_spec(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(char, env1_buf, CONFIG_ENV_SIZE);
- ALLOC_CACHE_ALIGN_BUFFER(char, env2_buf, CONFIG_ENV_SIZE);
- env_t *tmp_env1, *tmp_env2;
-
- /*
- * In case we have restarted u-boot there is a chance that buffer
- * contains old environment (from the previous boot).
- * If UBI volume is zero size, ubi_volume_read() doesn't modify the
- * buffer.
- * We need to clear buffer manually here, so the invalid CRC will
- * cause setting default environment as expected.
- */
- memset(env1_buf, 0x0, CONFIG_ENV_SIZE);
- memset(env2_buf, 0x0, CONFIG_ENV_SIZE);
-
- tmp_env1 = (env_t *)env1_buf;
- tmp_env2 = (env_t *)env2_buf;
-
- if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
- printf("\n** Cannot find mtd partition \"%s\"\n",
- CONFIG_ENV_UBI_PART);
- set_default_env(NULL);
- return;
- }
-
- if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, (void *)tmp_env1,
- CONFIG_ENV_SIZE)) {
- printf("\n** Unable to read env from %s:%s **\n",
- CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
- }
-
- if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME_REDUND, (void *)tmp_env2,
- CONFIG_ENV_SIZE)) {
- printf("\n** Unable to read redundant env from %s:%s **\n",
- CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME_REDUND);
- }
-
- env_import_redund((char *)tmp_env1, (char *)tmp_env2);
-}
-#else /* ! CONFIG_SYS_REDUNDAND_ENVIRONMENT */
-void env_relocate_spec(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
-
- /*
- * In case we have restarted u-boot there is a chance that buffer
- * contains old environment (from the previous boot).
- * If UBI volume is zero size, ubi_volume_read() doesn't modify the
- * buffer.
- * We need to clear buffer manually here, so the invalid CRC will
- * cause setting default environment as expected.
- */
- memset(buf, 0x0, CONFIG_ENV_SIZE);
-
- if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
- printf("\n** Cannot find mtd partition \"%s\"\n",
- CONFIG_ENV_UBI_PART);
- set_default_env(NULL);
- return;
- }
-
- if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, buf, CONFIG_ENV_SIZE)) {
- printf("\n** Unable to read env from %s:%s **\n",
- CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
- set_default_env(NULL);
- return;
- }
-
- env_import(buf, 1);
-}
-#endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
/* check for alias */
strcpy(env_alias_name, "fastboot_partition_alias_");
strncat(env_alias_name, name, 32);
- aliased_part_name = getenv(env_alias_name);
+ aliased_part_name = env_get(env_alias_name);
if (aliased_part_name != NULL)
ret = part_get_info_by_name(dev_desc,
aliased_part_name, info);
return err;
}
- serial = getenv("serial#");
+ serial = env_get("serial#");
if (serial) {
err = fdt_setprop(fdt, 0, "serial-number", serial,
strlen(serial) + 1);
if (nodeoffset < 0)
return nodeoffset;
- str = getenv("bootargs");
+ str = env_get("bootargs");
if (str) {
err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
strlen(str) + 1);
} else {
continue;
}
- tmp = getenv(mac);
+ tmp = env_get(mac);
if (!tmp)
continue;
str_ptr += 2;
}
*str_ptr = '\0';
- setenv(dest, str_output);
+ env_set(dest, str_output);
} else {
ulong addr;
void *buf;
if (strlen(verify_str) == digits)
vsum_str = verify_str;
else {
- vsum_str = getenv(verify_str);
+ vsum_str = env_get(verify_str);
if (vsum_str == NULL || strlen(vsum_str) != digits) {
printf("Expected %d hex digits in env var\n",
digits);
"and before environment is ready\n");
return NULL;
}
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
}
if (env_hwconfig) {
const char *ret;
size_t len;
- setenv("hwconfig", "key1:subkey1=value1,subkey2=value2;key2:value3;;;;"
+ env_set("hwconfig", "key1:subkey1=value1,subkey2=value2;key2:value3;;;;"
"key3;:,:=;key4", 1);
ret = hwconfig_arg("key1", &len);
assert(hwconfig_arg("key4", &len) == NULL);
assert(hwconfig_arg("bogus", &len) == NULL);
- unsetenv("hwconfig");
+ unenv_set("hwconfig");
assert(hwconfig(NULL) == 0);
assert(hwconfig("") == 0);
len += strlen(hdr->cmdline);
}
- char *bootargs = getenv("bootargs");
+ char *bootargs = env_get("bootargs");
if (bootargs)
len += strlen(bootargs);
if (*hdr->cmdline)
strcat(newbootargs, hdr->cmdline);
- setenv("bootargs", newbootargs);
+ env_set("bootargs", newbootargs);
if (os_data) {
*os_data = (ulong)hdr;
of_len = *of_size + CONFIG_SYS_FDT_PAD;
/* If fdt_high is set use it to select the relocation address */
- fdt_high = getenv("fdt_high");
+ fdt_high = env_get("fdt_high");
if (fdt_high) {
void *desired_addr = (void *)simple_strtoul(fdt_high, NULL, 16);
} else {
of_start =
(void *)(ulong) lmb_alloc_base(lmb, of_len, 0x1000,
- getenv_bootm_mapsize()
- + getenv_bootm_low());
+ env_get_bootm_mapsize()
+ + env_get_bootm_low());
}
if (of_start == NULL) {
}
U_BOOT_ENV_CALLBACK(loadaddr, on_loadaddr);
-ulong getenv_bootm_low(void)
+ulong env_get_bootm_low(void)
{
- char *s = getenv("bootm_low");
+ char *s = env_get("bootm_low");
if (s) {
ulong tmp = simple_strtoul(s, NULL, 16);
return tmp;
#endif
}
-phys_size_t getenv_bootm_size(void)
+phys_size_t env_get_bootm_size(void)
{
phys_size_t tmp, size;
phys_addr_t start;
- char *s = getenv("bootm_size");
+ char *s = env_get("bootm_size");
if (s) {
tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
return tmp;
size = gd->bd->bi_memsize;
#endif
- s = getenv("bootm_low");
+ s = env_get("bootm_low");
if (s)
tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
else
return size - (tmp - start);
}
-phys_size_t getenv_bootm_mapsize(void)
+phys_size_t env_get_bootm_mapsize(void)
{
phys_size_t tmp;
- char *s = getenv("bootm_mapsize");
+ char *s = env_get("bootm_mapsize");
if (s) {
tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
return tmp;
#if defined(CONFIG_SYS_BOOTMAPSZ)
return CONFIG_SYS_BOOTMAPSZ;
#else
- return getenv_bootm_size();
+ return env_get_bootm_size();
#endif
}
ulong initrd_high;
int initrd_copy_to_ram = 1;
- if ((s = getenv("initrd_high")) != NULL) {
+ s = env_get("initrd_high");
+ if (s) {
/* a value of "no" or a similar string will act like 0,
* turning the "load high" feature off. This is intentional.
*/
if (initrd_high == ~0)
initrd_copy_to_ram = 0;
} else {
- initrd_high = getenv_bootm_mapsize() + getenv_bootm_low();
+ initrd_high = env_get_bootm_mapsize() + env_get_bootm_low();
}
* @cmd_end: pointer to a ulong variable, will hold cmdline end
*
* boot_get_cmdline() allocates space for kernel command line below
- * BOOTMAPSZ + getenv_bootm_low() address. If "bootargs" U-Boot environemnt
+ * BOOTMAPSZ + env_get_bootm_low() address. If "bootargs" U-Boot environemnt
* variable is present its contents is copied to allocated kernel
* command line.
*
char *s;
cmdline = (char *)(ulong)lmb_alloc_base(lmb, CONFIG_SYS_BARGSIZE, 0xf,
- getenv_bootm_mapsize() + getenv_bootm_low());
+ env_get_bootm_mapsize() + env_get_bootm_low());
if (cmdline == NULL)
return -1;
- if ((s = getenv("bootargs")) == NULL)
+ s = env_get("bootargs");
+ if (!s)
s = "";
strcpy(cmdline, s);
* @kbd: double pointer to board info data
*
* boot_get_kbd() allocates space for kernel copy of board info data below
- * BOOTMAPSZ + getenv_bootm_low() address and kernel board info is initialized
+ * BOOTMAPSZ + env_get_bootm_low() address and kernel board info is initialized
* with the current u-boot board info data.
*
* returns:
int boot_get_kbd(struct lmb *lmb, bd_t **kbd)
{
*kbd = (bd_t *)(ulong)lmb_alloc_base(lmb, sizeof(bd_t), 0xf,
- getenv_bootm_mapsize() + getenv_bootm_low());
+ env_get_bootm_mapsize() + env_get_bootm_low());
if (*kbd == NULL)
return -1;
/* Paint the logo and retrieve LCD base address */
debug("[LCD] Drawing the logo...\n");
if (do_splash) {
- s = getenv("splashimage");
+ s = env_get("splashimage");
if (s) {
do_splash = 0;
addr = simple_strtoul(s, NULL, 16);
#ifdef CONFIG_PREBOOT
char *p;
- p = getenv("preboot");
+ p = env_get("preboot");
if (p != NULL) {
# ifdef CONFIG_AUTOBOOT_KEYED
int prev = disable_ctrlc(1); /* disable Control C checking */
bootstage_mark_name(BOOTSTAGE_ID_MAIN_LOOP, "main_loop");
#ifdef CONFIG_VERSION_VARIABLE
- setenv("ver", version_string); /* set version variable */
+ env_set("ver", version_string); /* set version variable */
#endif /* CONFIG_VERSION_VARIABLE */
cli_init();
if SPL
+config SPL_LDSCRIPT
+ string "Linker script for the SPL stage"
+ default "arch/$(ARCH)/cpu/u-boot-spl.lds"
+ depends on SPL
+ help
+ The SPL stage will usually require a different linker-script
+ (as it runs from a different memory region) than the regular
+ U-Boot stage. Set this to the path of the linker-script to
+ be used for SPL.
+
config SPL_BOARD_INIT
bool "Call board-specific initialization in SPL"
help
spl_board_init() from board_init_r(). This function should be
provided by the board.
+config SPL_BOOTROM_SUPPORT
+ bool "Support returning to the BOOTROM"
+ help
+ Some platforms (e.g. the Rockchip RK3368) provide support in their
+ ROM for loading the next boot-stage after performing basic setup
+ from the SPL stage.
+
+ Enable this option, to return to the BOOTROM through the
+ BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the
+ boot device list, if not implemented for a given board)
+
config SPL_RAW_IMAGE_SUPPORT
bool "Support SPL loading and booting of RAW images"
default n if (ARCH_MX6 && (SPL_MMC_SUPPORT || SPL_SATA_SUPPORT))
this will make the SPL binary smaller at the cost of more heap
usage as the *_simple malloc functions do not re-use free-ed mem.
+config TPL_SYS_MALLOC_SIMPLE
+ bool
+ prompt "Only use malloc_simple functions in the TPL"
+ help
+ Say Y here to only use the *_simple malloc functions from
+ malloc_simple.c, rather then using the versions from dlmalloc.c;
+ this will make the TPL binary smaller at the cost of more heap
+ usage as the *_simple malloc functions do not re-use free-ed mem.
+
config SPL_STACK_R
bool "Enable SDRAM location for SPL stack"
help
needed in SPL as it has a much simpler task with less
configuration. But some boards use this to support 'Falcon' boot
on EXT2 and FAT, where SPL boots directly into Linux without
- starting U-Boot first. Enabling this option will make getenv()
- and setenv() available in SPL.
+ starting U-Boot first. Enabling this option will make env_get()
+ and env_set() available in SPL.
config SPL_SAVEENV
bool "Support save environment"
enable SPI drivers that are needed for other purposes also, such
as a SPI PMIC.
-config SPL_TIMER_SUPPORT
- bool "Support timer drivers"
- help
- Enable support for timer drivers in SPL. These can be used to get
- a timer value when in SPL, or perhaps for implementing a delay
- function. This enables the drivers in drivers/timer as part of an
- SPL build.
-
config SPL_USB_HOST_SUPPORT
bool "Support USB host drivers"
help
if TPL
+config TPL_LDSCRIPT
+ string "Linker script for the TPL stage"
+ depends on TPL
+ help
+ The TPL stage will usually require a different linker-script
+ (as it runs from a different memory region) than the regular
+ U-Boot stage. Set this to the path of the linker-script to
+ be used for TPL.
+
+ May be left empty to trigger the Makefile infrastructure to
+ fall back to the linker-script used for the SPL stage.
+
+config TPL_NEEDS_SEPARATE_TEXT_BASE
+ bool "TPL needs a separate text-base"
+ default n
+ depends on TPL
+ help
+ Enable, if the TPL stage should not inherit its text-base
+ from the SPL stage. When enabled, a base address for the
+ .text sections of the TPL stage has to be set below.
+
+config TPL_NEEDS_SEPARATE_STACK
+ bool "TPL needs a separate initial stack-pointer"
+ default n
+ depends on TPL
+ help
+ Enable, if the TPL stage should not inherit its initial
+ stack-pointer from the settings for the SPL stage.
+
+config TPL_TEXT_BASE
+ hex "Base address for the .text section of the TPL stage"
+ depends on TPL_NEEDS_SEPARATE_TEXT_BASE
+ help
+ The base address for the .text section of the TPL stage.
+
+config TPL_MAX_SIZE
+ int "Maximum size (in bytes) for the TPL stage"
+ default 0
+ depends on TPL
+ help
+ The maximum size (in bytes) of the TPL stage.
+
+config TPL_STACK
+ hex "Address of the initial stack-pointer for the TPL stage"
+ depends on TPL_NEEDS_SEPARATE_STACK
+ help
+ The address of the initial stack-pointer for the TPL stage.
+ Usually this will be the (aligned) top-of-stack.
+
+config TPL_BOOTROM_SUPPORT
+ bool "Support returning to the BOOTROM (from TPL)"
+ help
+ Some platforms (e.g. the Rockchip RK3368) provide support in their
+ ROM for loading the next boot-stage after performing basic setup
+ from the TPL stage.
+
+ Enable this option, to return to the BOOTROM through the
+ BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the
+ boot device list, if not implemented for a given board)
+
+config TPL_DRIVERS_MISC_SUPPORT
+ bool "Support misc drivers in TPL"
+ help
+ Enable miscellaneous drivers in TPL. These drivers perform various
+ tasks that don't fall nicely into other categories, Enable this
+ option to build the drivers in drivers/misc as part of an TPL
+ build, for those that support building in TPL (not all drivers do).
+
config TPL_ENV_SUPPORT
bool "Support an environment"
help
config TPL_I2C_SUPPORT
bool "Support I2C"
help
- Enable support for the I2C bus in SPL. See SPL_I2C_SUPPORT for
+ Enable support for the I2C bus in TPL. See SPL_I2C_SUPPORT for
details.
config TPL_LIBCOMMON_SUPPORT
config TPL_NAND_SUPPORT
bool "Support NAND flash"
help
- Enable support for NAND in SPL. See SPL_NAND_SUPPORT for details.
+ Enable support for NAND in TPL. See SPL_NAND_SUPPORT for details.
config TPL_SERIAL_SUPPORT
bool "Support serial"
help
- Enable support for serial in SPL. See SPL_SERIAL_SUPPORT for
+ Enable support for serial in TPL. See SPL_SERIAL_SUPPORT for
details.
config TPL_SPI_FLASH_SUPPORT
bool "Support SPI flash drivers"
help
- Enable support for using SPI flash in SPL. See SPL_SPI_FLASH_SUPPORT
+ Enable support for using SPI flash in TPL. See SPL_SPI_FLASH_SUPPORT
for details.
config TPL_SPI_SUPPORT
bool "Support SPI drivers"
help
- Enable support for using SPI in SPL. See SPL_SPI_SUPPORT for
+ Enable support for using SPI in TPL. See SPL_SPI_SUPPORT for
details.
endif # TPL
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
-obj-$(CONFIG_SPL_LOAD_FIT) += spl_fit.o
-obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
-obj-$(CONFIG_SPL_XIP_SUPPORT) += spl_xip.o
-obj-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
+obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
+obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
+obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o
+obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += spl_ymodem.o
ifndef CONFIG_SPL_UBI
-obj-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
-obj-$(CONFIG_SPL_ONENAND_SUPPORT) += spl_onenand.o
+obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += spl_nand.o
+obj-$(CONFIG_$(SPL_TPL_)ONENAND_SUPPORT) += spl_onenand.o
endif
-obj-$(CONFIG_SPL_UBI) += spl_ubi.o
-obj-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
-obj-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
-obj-$(CONFIG_SPL_ATF_SUPPORT) += spl_atf.o
-obj-$(CONFIG_SPL_USB_SUPPORT) += spl_usb.o
-obj-$(CONFIG_SPL_FAT_SUPPORT) += spl_fat.o
-obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
-obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
-obj-$(CONFIG_SPL_DFU_SUPPORT) += spl_dfu.o
-obj-$(CONFIG_SPL_SPI_LOAD) += spl_spi.o
-obj-$(CONFIG_SPL_RAM_SUPPORT) += spl_ram.o
+obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
+obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
+obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
+obj-$(CONFIG_$(SPL_TPL_)ATF_SUPPORT) += spl_atf.o
+obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
+obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
+obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
+obj-$(CONFIG_$(SPL_TPL_)SATA_SUPPORT) += spl_sata.o
+obj-$(CONFIG_$(SPL_TPL_)DFU_SUPPORT) += spl_dfu.o
+obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
+obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o
endif
*
* SPDX-License-Identifier: GPL-2.0+
*/
+
#include <common.h>
#include <dm.h>
#include <spl.h>
return ret;
}
}
- if (IS_ENABLED(CONFIG_SPL_DM)) {
+ if (CONFIG_IS_ENABLED(DM)) {
bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl");
/* With CONFIG_SPL_OF_PLATDATA, bring in all devices */
ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA));
gd->malloc_ptr / 1024);
#endif
- if (IS_ENABLED(CONFIG_SPL_ATF_SUPPORT)) {
+ if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
debug("loaded - jumping to U-Boot via ATF BL31.\n");
bl31_entry();
}
gd_t *new_gd;
ulong ptr = CONFIG_SPL_STACK_R_ADDR;
-#if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_SPL_SYS_MALLOC_F_LEN
+#if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN)
if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) {
ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN;
gd->malloc_base = ptr;
--- /dev/null
+/*
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+
+__weak void board_return_to_bootrom(void)
+{
+}
+
+static int spl_return_to_bootrom(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+ /*
+ * If the board implements a way to return to its ROM (with
+ * the expectation that the next stage of will be booted by
+ * the ROM), it will implement board_return_to_bootrom() and
+ * should not return from it.
+ */
+ board_return_to_bootrom();
+ return false;
+}
+
+SPL_LOAD_IMAGE_METHOD("BOOTROM", 0, BOOT_DEVICE_BOOTROM, spl_return_to_bootrom);
/* set default environment */
set_default_env(0);
- str_env = getenv(dfu_alt_info);
+ str_env = env_get(dfu_alt_info);
if (!str_env) {
error("\"dfu_alt_info\" env variable not defined!\n");
return -EINVAL;
}
- ret = setenv("dfu_alt_info", str_env);
+ ret = env_set("dfu_alt_info", str_env);
if (ret) {
error("unable to set env variable \"dfu_alt_info\"!\n");
return -EINVAL;
return -1;
}
#if defined(CONFIG_SPL_ENV_SUPPORT)
- file = getenv("falcon_args_file");
+ file = env_get("falcon_args_file");
if (file) {
err = ext4fs_open(file, &filelen);
if (err < 0) {
file, err);
goto defaults;
}
- file = getenv("falcon_image_file");
+ file = env_get("falcon_image_file");
if (file) {
err = spl_load_image_ext(spl_image, block_dev,
partition, file);
return err;
#if defined(CONFIG_SPL_ENV_SUPPORT) && defined(CONFIG_SPL_OS_BOOT)
- file = getenv("falcon_args_file");
+ file = env_get("falcon_args_file");
if (file) {
err = file_fat_read(file, (void *)CONFIG_SYS_SPL_ARGS_ADDR, 0);
if (err <= 0) {
file, err);
goto defaults;
}
- file = getenv("falcon_image_file");
+ file = env_get("falcon_image_file");
if (file) {
err = spl_load_image_fat(spl_image, block_dev,
partition, file);
env_init();
env_relocate();
- setenv("autoload", "yes");
+ env_set("autoload", "yes");
rv = eth_initialize();
if (rv == 0) {
printf("No Ethernet devices found\n");
return -ENODEV;
}
if (bootdev->boot_device_name)
- setenv("ethact", bootdev->boot_device_name);
+ env_set("ethact", bootdev->boot_device_name);
rv = net_loop(BOOTP);
if (rv < 0) {
printf("Problem booting with BOOTP\n");
#ifdef CONFIG_SPLASH_SCREEN_ALIGN
void splash_get_pos(int *x, int *y)
{
- char *s = getenv("splashpos");
+ char *s = env_get("splashpos");
if (!s)
return;
#ifdef CONFIG_SATA
static int splash_init_sata(void)
{
- return sata_initialize();
+ return sata_probe(0);
}
#else
static inline int splash_init_sata(void)
loff_t actread;
char *splash_file;
- splash_file = getenv("splashfile");
+ splash_file = env_get("splashfile");
if (!splash_file)
splash_file = SPLASH_SOURCE_DEFAULT_FILE_NAME;
if (!locations || size == 0)
return NULL;
- env_splashsource = getenv("splashsource");
+ env_splashsource = env_get("splashsource");
if (env_splashsource == NULL)
return &locations[0];
char *env_splashimage_value;
u32 bmp_load_addr;
- env_splashimage_value = getenv("splashimage");
+ env_splashimage_value = env_get("splashimage");
if (env_splashimage_value == NULL)
return -ENOENT;
/* save used globals and env variable */
saved_timeout_msecs = tftp_timeout_ms;
saved_timeout_count = tftp_timeout_count_max;
- saved_netretry = strdup(getenv("netretry"));
+ saved_netretry = strdup(env_get("netretry"));
saved_bootfile = strdup(net_boot_file_name);
/* set timeouts for auto-update */
tftp_timeout_count_max = cnt_max;
/* we don't want to retry the connection if errors occur */
- setenv("netretry", "no");
+ env_set("netretry", "no");
/* download the update file */
load_addr = addr;
tftp_timeout_ms = saved_timeout_msecs;
tftp_timeout_count_max = saved_timeout_count;
- setenv("netretry", saved_netretry);
+ env_set("netretry", saved_netretry);
if (saved_netretry != NULL)
free(saved_netretry);
printf("Auto-update from TFTP: ");
/* get the file name of the update file */
- filename = getenv(UPDATE_FILE_ENV);
+ filename = env_get(UPDATE_FILE_ENV);
if (filename == NULL) {
printf("failed, env. variable '%s' not found\n",
UPDATE_FILE_ENV);
printf("trying update file '%s'\n", filename);
/* get load address of downloaded update file */
- if ((env_addr = getenv("loadaddr")) != NULL)
+ env_addr = env_get("loadaddr");
+ if (env_addr)
addr = simple_strtoul(env_addr, NULL, 16);
else
addr = CONFIG_UPDATE_LOAD_ADDR;
* but allow this time to be increased via env variable as some
* devices break the spec and require longer warm-up times
*/
- env = getenv("usb_pgood_delay");
+ env = env_get("usb_pgood_delay");
if (env)
pgood_delay = max(pgood_delay,
(unsigned)simple_strtol(env, NULL, 0));
if (error)
return error;
- stdinname = getenv("stdin");
+ stdinname = env_get("stdin");
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
error = iomux_doenv(stdin, stdinname);
if (error)
if (stdio_deregister_dev(dev, force) != 0)
return 1;
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
- if (iomux_doenv(stdin, getenv("stdin")) != 0)
+ if (iomux_doenv(stdin, env_get("stdin")) != 0)
return 1;
#endif
#ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
goto err;
}
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
- if (iomux_doenv(stdin, getenv("stdin"))) {
+ if (iomux_doenv(stdin, env_get("stdin"))) {
ret = -ENOLINK;
goto err;
}
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN7I=y
+CONFIG_DRAM_CLK=384
+CONFIG_MMC0_CD_PIN="PH1"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_USB0_VBUS_PIN="PC17"
+CONFIG_USB0_VBUS_DET="PH5"
+CONFIG_I2C1_ENABLE=y
+CONFIG_SATAPWR="PC3"
+CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc"
+CONFIG_AHCI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_DFU_RAM=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
+CONFIG_SUN7I_GMAC=y
+CONFIG_AXP_ALDO3_VOLT=2800
+CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
+CONFIG_G_DNL_VENDOR_NUM=0x1f3a
+CONFIG_G_DNL_PRODUCT_NUM=0x1010
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_SCSI=y
CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND,SYS_CLK_100"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND,SYS_CLK_100_DDR_100"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_100"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND,SYS_CLK_100_DDR_133"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_133"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
-CONFIG_SCSI=y
CONFIG_AXP_DLDO4_VOLT=2500
CONFIG_AXP_ELDO3_VOLT=1200
+CONFIG_SCSI=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO4_VOLT=2500
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=sunxi-nand.0:256k(spl),256k(spl-backup),2m(uboot),2m(uboot-backup),-(UBI)"
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_SUNXI=y
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_SCSI=y
CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-# CONFIG_SPL_BLK is not set
CONFIG_DM_MMC=y
-# CONFIG_SPL_DM_MMC is not set
-# CONFIG_SPL_DM_MMC_OPS is not set
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
CONFIG_SCSI=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_TARGET_M53017EVB=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=25000000"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="ubi.mtd=4 root=ubi0:rootfs rw rootfstype=ubifs rootflags=sync console=ttyCPM0,115200N8 ip=${ipaddr}:::${netmask}:mcr3k:eth0:off"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="S3K> "
CONFIG_AUTOBOOT_KEYED=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=6
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=6
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000"
CONFIG_BOOTDELAY=6
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitxgp:eth0:off console=ttyS0,115200"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="MPC8349E-mITX-GP> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX,SYS_TEXT_BASE=0xFE000000"
CONFIG_BOOTDELAY=6
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="MPC8349E-mITX> "
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX"
CONFIG_BOOTDELAY=6
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="MPC8349E-mITX> "
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_EXT2=y
-CONFIG_SCSI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_RTL8139=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_BMP=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
-CONFIG_SCSI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_KEYBOARD=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
CONFIG_SUNXI_NO_PMIC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_TARGET_MIGOR=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=-1
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
# CONFIG_CMD_EEPROM is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_BOOTDELAY=0
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IRQ is not set
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b"
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
+CONFIG_CMD_MMC_SPI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b"
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
+CONFIG_CMD_MMC_SPI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_DFU_TFTP=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00080000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_NOR=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00080000
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_DFU_RAM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00080000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DFU_NAND=y
CONFIG_DFU_RAM=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MMC_OMAP_HS=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_TEXT_BASE=0x80100000
# CONFIG_SPL_GPIO_SUPPORT is not set
CONFIG_TARGET_AM3517_EVM=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_UBI=y
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHYLIB=y
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM43XX=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHYLIB=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHYLIB=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHYLIB=y
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_PMIC is not set
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="ap121 # "
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="ap143 # "
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_TARGET_AP325RXA=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,38400"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_TARGET_AP_SH4A_4A=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC4,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_SYS_PROMPT="Apalis TK1 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIVE=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_PROMPT="Apalis T30 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIVE=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_IDENT_STRING=" apf27 patch 3.10"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySMX0,115200 mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),512K(firmware),512K(dtb),5M(kernel),-(rootfs) ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_SPL=y
CONFIG_SYS_PROMPT="ARNDALE # "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_M68K=y
CONFIG_TARGET_ASTRO_MCF5373L=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="URMEL > "
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGA_LOADMK=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="\0addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}::off\0addtest=setenv bootargs ${bootargs} loglevel=4 test\0baudrate=115200\0boot_file=setenv bootfile /${project_dir}/kernel/uImage\0boot_retries=0\0bootcmd=run flash_self\0bootdelay=3\0ethact=macb0\0flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;bootm ${kernel_ram};reset\0flash_self=run nand_kernel;run setbootargs;upgrade_available;bootm ${kernel_ram};reset\0flash_self_test=run nand_kernel;run setbootargs addtest; upgrade_available;bootm ${kernel_ram};reset\0hostname=systemone\0kernel_Off=0x00200000\0kernel_Off_fallback=0x03800000\0kernel_ram=0x21500000\0kernel_size=0x00400000\0kernel_size_fallback=0x00400000\0loads_echo=1\0nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} ${kernel_size}\0net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};run nfsargs;run addip;upgrade_available;bootm ${kernel_ram};reset\0netdev=eth0\0nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs rw nfsroot=${serverip}:${rootpath} at91sam9_wdt.wdt_timeout=16\0partitionset_active=A\0preboot=echo;echo Type 'run flash_self' to use kernel and root filesystem on memory;echo Type 'run flash_nfs' to use kernel from memory and root filesystem over NFS;echo Type 'run net_nfs' to get Kernel over TFTP and mount root filesystem over NFS;echo\0project_dir=systemone\0root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0rootfs=/dev/mtdblock5\0rootfs_fallback=/dev/mtdblock7\0setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops root=${rootfs} rootfstype=jffs2 panic=7 at91sam9_wdt.wdt_timeout=16\0stderr=serial\0stdin=serial\0stdout=serial\0upgrade_available=0\0"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS3,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_IMLS is not set
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS3,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_IMLS is not set
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_ARM=y
CONFIG_TARGET_BCM28155_AP=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
CONFIG_G_DNL_VENDOR_NUM=0x18d1
CONFIG_G_DNL_PRODUCT_NUM=0x0d02
-CONFIG_NETDEVICES=y
-CONFIG_BCM_SF2_ETH=y
-CONFIG_BCM_SF2_ETH_GMAC=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
-CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
-CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
-CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
-CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
-CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_CMD_TIME=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
-CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_SYS_PROMPT="Tegra30 (Beaver) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-2
# CONFIG_CONSOLE_MUX is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MTDPARTS=y
CONFIG_NETCONSOLE=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_UNZIP=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_TSI148=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
CONFIG_DM_GPIO=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_CPU_SUPPORT=y
CONFIG_SPL_PCI_SUPPORT=y
CONFIG_SPL_PCH_SUPPORT=y
CONFIG_SPL_RTC_SUPPORT=y
-CONFIG_SPL_TIMER_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_SYS_NS16550=y
+CONFIG_SPL_TIMER=y
CONFIG_TPM_TIS_LPC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
+CONFIG_CMD_PCA953X=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS_GPIO=y
CONFIG_LED_STATUS0=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
# CONFIG_CMD_BMODE is not set
+CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6"
+CONFIG_AHCI=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_REGULATOR=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_MTDPARTS=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_CMD_PCA953X=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS_GPIO=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v1, v2, v3"
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v1, v2, v3"
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MII=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_SCSI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_NAND_TORTURE=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_ARM=y
CONFIG_TARGET_COLIBRI_PXA270=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_PROMPT="Colibri T20 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIVE=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_SYS_PROMPT="Colibri T30 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIVE=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_FUSE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sda2 ro quiet"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sda2 ro quiet"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
# CONFIG_CMD_GO is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_EFI_PARTITION=y
CONFIG_OF_BOARD_FIXUP=y
CONFIG_SPL_OF_TRANSLATE=y
-CONFIG_SCSI=y
CONFIG_DM_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2"
CONFIG_TARGET_COUGARCANYON2=y
# CONFIG_ENABLE_MRC_CACHE is not set
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_FIT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="d2v2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_NAND is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_SPL_OF_TRANSLATE=y
-CONFIG_SCSI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
CONFIG_PCI=y
+CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_SATA=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_SPL_OF_TRANSLATE=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x680000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sda1 ro quiet"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_ISO_PARTITION=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_OF_TRANSLATE=y
-CONFIG_DM_SCSI=y
CONFIG_DWC_AHCI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_DM_REGULATOR_LP873X=y
+CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
-CONFIG_DM_SCSI=y
CONFIG_DWC_AHCI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_DM_REGULATOR_LP873X=y
+CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyMSM0,115200n8"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="dragonboard410c => "
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
CONFIG_CLK=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
CONFIG_DEBUG_UART=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_SYS_PROMPT="Tegra210 (E2220-1170) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="\nEB+CPU5282> "
-# CONFIG_CMD_LOADB is not set
CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=5
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-# CONFIG_CMD_LOADB is not set
CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_TARGET_ECOVEC=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_TARGET_EDB93XX=y
CONFIG_SYS_EXTRA_OPTIONS="MK_edb9315a"
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs console=ttyAM0,115200 ip=dhcp"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="EDB9315A> "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_DFU=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIMER=y
CONFIG_CMD_HASH=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
+CONFIG_ENV_IS_IN_MMC=y
CONFIG_CPU=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
+# CONFIG_CMD_SF_TEST is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_TARGET_ESPT=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_UNZIP=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_SAVES=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_RARP=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
+CONFIG_CMD_REISER=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw"
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_PRE_CON_BUF_ADDR=0x1e720000
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ROCKCHIP_RK3368=y
CONFIG_TARGET_EVB_PX5=y
CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ROCKCHIP_RK322X=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_EVB_RK3229=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_EVB_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SILENT_CONSOLE=y
-CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_FENNEC_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_FIREFLY_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="flea3 U-Boot > "
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ROCKCHIP_RK3368=y
CONFIG_TARGET_GEEKBOX=y
CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="GoFlexHome> "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PART=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_FAT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_FIT=y
# CONFIG_FIT_ENABLE_SHA256_SUPPORT is not set
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/ram0 ro console=ttyS0,115200n8"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_MEMORY is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
-CONFIG_SCSI=y
# CONFIG_MMC is not set
+CONFIG_SCSI=y
CONFIG_OF_LIBFDT=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_K3=y
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="hsdk# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_SYS_PROMPT="ib62x0 => "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n"
CONFIG_AUTOBOOT_DELAY_STR="ids"
CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_CMD_UBIFS is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
-# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_FEC_MXC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_OF_LIST="imx6q-icore imx6dl-icore"
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
CONFIG_SYS_PROMPT="icorem6qdl> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs"
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ9021=y
CONFIG_FEC_MXC=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_UBI=y
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
-# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_BLK is not set
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_UBI=y
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
-# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM720T=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM920T=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM926EJ_S=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM946ES=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM1136=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM920T=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM926EJ_S=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM946ES=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00180000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_FLASH is not set
CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_CMD_REMOTEPROC=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_CMD_REMOTEPROC=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_TARGET_KZM9G=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200"
CONFIG_VERSION_VARIABLE=y
CONFIG_SYS_PROMPT="KZM-A9-GT# "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3368=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion"
+CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
+CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_SPL=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF_TEXT_BASE=0x10000
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MICREL=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3368=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DEBUG_UART_BASE=0xFF180000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_TPL_TIMER=y
+CONFIG_ROCKCHIP_TIMER=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
+CONFIG_SMBIOS_MANUFACTURER="rockchip"
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
-CONFIG_SCSI=y
# CONFIG_BLK is not set
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_DM=y
# CONFIG_BLK is not set
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_SECURE_BOOT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_RSA=y
CONFIG_SPL_RSA=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_TARGET_LS1021ATWR=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO_FSL_DCU_FB=y
# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_BOOTDELAY=0
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_RSA=y
CONFIG_SPL_RSA=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO_FSL_DCU_FB=y
# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO_FSL_DCU_FB=y
# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_SECURE_BOOT=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_TARGET_LS1043ARDB=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_USB_STORAGE=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
-CONFIG_CMD_USB=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_RSA=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SECURE_BOOT=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_CRYPTO_SUPPORT=y
CONFIG_SPL_HASH_SUPPORT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_USB=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="EMU"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_EDITENV is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_SYS_EXTRA_OPTIONS="SIMU"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_EDITENV is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
-CONFIG_SCSI=y
CONFIG_FSL_CAAM=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_API=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_FIT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aries/m53evk/imximage.cfg"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttymxc1,115200"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS3,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
-# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="malta # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="maltael # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="malta # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="maltael # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
-# CONFIG_MMC is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_OF_LIBFDT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=romfs"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_OS_BASE=0x2c060000
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot-mONStR> "
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVES=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
# CONFIG_CMD_UBIFS is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NETCONSOLE=y
CONFIG_SPL_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_MIQI_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SH=y
CONFIG_TARGET_MPR2=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_SH=y
CONFIG_TARGET_MS7720SE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCMCIA=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_SCIF_CONSOLE=y
+CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TARGET_MS7722SE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_TARGET_MS7750SE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,38400"
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_MEMORY is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADMK=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_FPGA_LOADMK=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_FUSE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_FUSE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_PHYLIB=y
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_PHYLIB=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7ULP=y
CONFIG_DM_REGULATOR=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7ULP=y
CONFIG_DM_REGULATOR=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="nas220> "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="2big2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_CFB_CONSOLE_ANSI=y
# CONFIG_VGA_AS_SINGLE_DEVICE is not set
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttymxc1,115200 "
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SYS_PROMPT="nsa310s => "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MMC=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_PROMPT="ODROID-XU3 # "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MII=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_OMAP3_BEAGLE=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_LED_STATUS_GREEN=2
CONFIG_LED_STATUS_CMD=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MPUCLK=720
CONFIG_TARGET_OMAP3_EVM=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
# CONFIG_SPL_EXT_SUPPORT is not set
-CONFIG_HUSH_PARSER=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SYS_PROMPT="OMAP3_EVM # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
+CONFIG_CMD_UBI=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_DM_GPIO=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
+CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
-CONFIG_USB_STORAGE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0x5678
+CONFIG_FAT_WRITE=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_TARGET_OMAP3_LOGIC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit"
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SYS_PROMPT="OMAP Logic # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
# CONFIG_CMD_EEPROM is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_USB is not set
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP36XX_PINS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
# CONFIG_SPL_I2C_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
-CONFIG_SCSI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_CMD_TCA642X=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_DWC3=y
CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_EEPROM is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
# CONFIG_CMD_GPIO is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
CONFIG_SPI_FLASH=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttymxc0,115200"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_PWRSEQ=y
-# CONFIG_DM_MMC_OPS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_MACH_SUN50I_H5=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881977
+CONFIG_MACPWR="PD6"
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_MACH_SUN8I_H3=y
-CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=624
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
# CONFIG_VIDEO_DE2 is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DM=y
+CONFIG_CMD_PCA953X=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DM=y
+CONFIG_CMD_PCA953X=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SYS_PROMPT="Tegra210 (P2571) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL=y
CONFIG_SYS_PROMPT="Peach-Pi # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_SPL=y
CONFIG_SYS_PROMPT="Peach-Pit # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PFLA02=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_CMD_HDMIDETECT=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+# CONFIG_PARTITION_UUIDS is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_DM=y
+CONFIG_MTD=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_DM_THERMAL=y
+CONFIG_OF_LIBFDT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_PHYCORE_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SAVEENV is not set
CONFIG_LOOPW=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_RARP=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_CACHE=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="fbcon=rotate:3 console=tty0 console=ttyS0,115200 root=/dev/mtdblock4 mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,1664k(env),2M(linux)ro,-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_POPMETAL_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_BMP=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ9031=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_CPU_SUPPORT=y
CONFIG_SPL_PCI_SUPPORT=y
CONFIG_SPL_PCH_SUPPORT=y
CONFIG_SPL_RTC_SUPPORT=y
-CONFIG_SPL_TIMER_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CPU=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPL_TIMER=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
+CONFIG_NVME=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_TARGET_R0P7734=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC3,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_TARGET_R2DPLUS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_CMD_IDE=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_TARGET_R7780MP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SALVATOR_X=y
-CONFIG_ENV_IS_IN_MMC=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7795-salvator-x"
CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_OF_CONTROL=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_SH_SDHI=y
CONFIG_TARGET_ULCB=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7795-h3ulcb"
CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_SH_SDHI=y
CONFIG_RCAR_GEN3=y
CONFIG_R8A7796=y
CONFIG_TARGET_SALVATOR_X=y
-CONFIG_ENV_IS_IN_MMC=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7796-salvator-x"
CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
-CONFIG_OF_CONTROL=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_SH_SDHI=y
CONFIG_TARGET_ULCB=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7796-m3ulcb"
CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_SH_SDHI=y
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK2=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3188=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK=y
CONFIG_SPL_STACK_R_ADDR=0x60080000
CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET=y
CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_SH=y
CONFIG_TARGET_RSK7203=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_SH=y
CONFIG_TARGET_RSK7264=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC3,115200"
# CONFIG_CMD_SETEXPR is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SH=y
CONFIG_TARGET_RSK7269=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC7,115200"
# CONFIG_CMD_SETEXPR is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SCIF_CONSOLE=y
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_MALLOC_F=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/s32v234evb/s32v234evb.cfg"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyLF0 root=/dev/ram rw"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_CMD_BOOTZ=y
CONFIG_OF_LIBFDT=y
CONFIG_TARGET_S5P_GONI=y
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Goni # "
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_DFU=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_ARCH_EXYNOS4=y
CONFIG_TARGET_S5PC210_UNIVERSAL=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
-CONFIG_CMD_IDE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
CONFIG_CMD_CBFS=y
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
CONFIG_MAC_PARTITION=y
CONFIG_AMIGA_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_OF_HOSTFILE=y
CONFIG_NETCONSOLE=y
CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
CONFIG_DEVRES=y
CONFIG_DEBUG_DEVRES=y
CONFIG_ADC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
CONFIG_OF_HOSTFILE=y
CONFIG_NETCONSOLE=y
CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
CONFIG_DEVRES=y
CONFIG_DEBUG_DEVRES=y
CONFIG_ADC=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
-CONFIG_CMD_IDE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
CONFIG_OF_HOSTFILE=y
CONFIG_NETCONSOLE=y
CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
CONFIG_DEVRES=y
CONFIG_DEBUG_DEVRES=y
CONFIG_ADC=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
-CONFIG_CMD_IDE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
CONFIG_VIDEO=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_TARGET_SH7752EVB=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MD5SUM=y
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_MMC=y
-CONFIG_PHYLIB=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TARGET_SH7753EVB=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MD5SUM=y
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_MMC=y
-CONFIG_PHYLIB=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TARGET_SH7757LCR=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MD5SUM=y
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_MMC=y
-CONFIG_PHYLIB=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TARGET_SH7763RDP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_TARGET_SH7785LCR=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC1,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_TARGET_SH7785LCR=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC1,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ROCKCHIP_RK3368=y
CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
CONFIG_DEBUG_UART=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
CONFIG_SH=y
CONFIG_TARGET_SHMIN=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_SPL=y
CONFIG_SYS_PROMPT="SMDK5250 # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_SPL=y
CONFIG_SYS_PROMPT="SMDK5420 # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100"
CONFIG_ENV_IS_IN_ONENAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SMDKC100 # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 ip=any"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Snapper> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 ip=any"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_SPL=y
CONFIG_SYS_PROMPT="snow # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_IDENT_STRING="socfpga_arria10"
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
CONFIG_SPL=y
CONFIG_SPL_FPGA_SUPPORT=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
CONFIG_FIT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
CONFIG_FIT=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_FIT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_NAND=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_SYS_EXTRA_OPTIONS="SPEAR300"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR600"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SPL=y
CONFIG_SYS_PROMPT="spring # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="stih410-b2260 => "
# CONFIG_CMD_IMLS is not set
CONFIG_TARGET_STM32F429_DISCOVERY=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
--- /dev/null
+CONFIG_M68K=y
+CONFIG_SYS_TEXT_BASE=0x47E00000
+CONFIG_TARGET_STMARK2=y
+CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000"
+# CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="stmark2 $ "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_CACHE=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_REGEX=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_SYS_PROMPT="[tb100]:~# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug maxcpus=48 rootwait rw root=/dev/sda2 coherent_pool=16M"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm"
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyO2,115200n8 noinitrd earlyprintk"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
# CONFIG_USE_PRIVATE_LIBGCC is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="zynq-uboot> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="zynq-uboot> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="zynq-uboot> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_VERSION_VARIABLE=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="twister => "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00800000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_EXT_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_CONFIG=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock1 mtdparts=mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_ENV_IS_IN_MMC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_FUSE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_FUSE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_PROMPT="Tegra124 (Venice2) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlyprintk=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=31 loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_TSI148=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="woodburn U-Boot > "
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="woodburn U-Boot > "
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_CMD_HD44760=y
+CONFIG_CMD_MAX6957=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS2,115200n8"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_LOOPW=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SAVES=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_VIDEO=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SATA_CEVA=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=25000000
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_SYS_I2C_CADENCE=y
# CONFIG_MMC is not set
CONFIG_DM_MMC=y
+CONFIG_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SATA_CEVA=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
+CONFIG_CMD_PCA953X=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SATA_CEVA=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
+CONFIG_CMD_PCA953X=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_DATE=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_IRQ=y
+CONFIG_CMD_PCA953X=y
CONFIG_DS4510=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_NAND=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_JFFS2=y
# CONFIG_CMD_IRQ is not set
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_JFFS2=y
# CONFIG_CMD_IRQ is not set
CONFIG_SYS_FSL_DDR2=y
+CONFIG_CMD_PCA953X=y
CONFIG_DS4510=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_JFFS2=y
# CONFIG_CMD_IRQ is not set
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_SAVES=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_DIAG=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPI_FLASH=y
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_TARGET_ZIPITZ2=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=tty0 console=ttyS2,115200 fbcon=rotate:3"
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_ZYNQ_GEM=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
case IF_TYPE_SD:
case IF_TYPE_MMC:
case IF_TYPE_USB:
+ case IF_TYPE_NVME:
printf ("Vendor: %s Rev: %s Prod: %s\n",
dev_desc->vendor,
dev_desc->revision,
puts ("MMC");
break;
case IF_TYPE_HOST:
- puts("HOST");
+ puts ("HOST");
+ break;
+ case IF_TYPE_NVME:
+ puts ("NVMe");
break;
default:
puts ("UNKNOWN");
/* If no dev_part_str, use bootdevice environment variable */
if (!dev_part_str || !strlen(dev_part_str) ||
!strcmp(dev_part_str, "-"))
- dev_part_str = getenv("bootdevice");
+ dev_part_str = env_get("bootdevice");
/* If still no dev_part_str, it's an error */
if (!dev_part_str) {
int limit;
char *s;
- s = getenv("amiga_scanlimit");
+ s = env_get("amiga_scanlimit");
if (s)
limit = simple_strtoul(s, NULL, 10);
else
int limit;
char *s;
- s = getenv("amiga_scanlimit");
+ s = env_get("amiga_scanlimit");
if (s)
limit = simple_strtoul(s, NULL, 10);
else
eth_parse_enetaddr(addr, enetaddr);
/* enetaddr now equals { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 } */
- * int eth_getenv_enetaddr(char *name, uchar *enetaddr);
+ * int eth_env_get_enetaddr(char *name, uchar *enetaddr);
Look up an environment variable and convert the stored address. If the address
is valid, then the function returns 1. Otherwise, the function returns 0. In
then it is set to all zeros. The common function is_valid_ethaddr() is used
to determine address validity.
uchar enetaddr[6];
-if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
/* "ethaddr" is not set in the environment */
... try and setup "ethaddr" in the env ...
}
/* enetaddr is now set to the value stored in the ethaddr env var */
- * int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
+ * int eth_env_set_enetaddr(char *name, const uchar *enetaddr);
Store the MAC address into the named environment variable. The return value is
-the same as the setenv() function.
+the same as the env_set() function.
uchar enetaddr[6] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 };
-eth_setenv_enetaddr("ethaddr", enetaddr);
+eth_env_set_enetaddr("ethaddr", enetaddr);
/* the "ethaddr" env var should now be set to "00:11:22:33:44:55" */
* the %pM format modifier
--- /dev/null
+#
+# Copyright (C) 2017 NXP Semiconductors
+# Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+What is NVMe
+============
+
+NVM Express (NVMe) is a register level interface that allows host software to
+communicate with a non-volatile memory subsystem. This interface is optimized
+for enterprise and client solid state drives, typically attached to the PCI
+express interface. It is a scalable host controller interface designed to
+address the needs of enterprise and client systems that utilize PCI express
+based solid state drives (SSD). The interface provides optimized command
+submission and completion paths. It includes support for parallel operation by
+supporting up to 64K I/O queues with up to 64K commands per I/O queue.
+
+The device is comprised of some number of controllers, where each controller
+is comprised of some number of namespaces, where each namespace is comprised
+of some number of logical blocks. A namespace is a quantity of non-volatile
+memory that is formatted into logical blocks. An NVMe namespace is equivalent
+to a SCSI LUN. Each namespace is operated as an independent "device".
+
+How it works
+------------
+There is an NVMe uclass driver (driver name "nvme"), an NVMe host controller
+driver (driver name "nvme") and an NVMe namespace block driver (driver name
+"nvme-blk"). The host controller driver is supposed to probe the hardware and
+do necessary initialization to put the controller into a ready state at which
+it is able to scan all available namespaces attached to it. Scanning namespace
+is triggered by the NVMe uclass driver and the actual work is done in the NVMe
+namespace block driver.
+
+Status
+------
+It only support basic block read/write functions in the NVMe driver.
+
+Config options
+--------------
+CONFIG_NVME Enable NVMe device support
+CONFIG_CMD_NVME Enable basic NVMe commands
+
+Usage in U-Boot
+---------------
+To use an NVMe hard disk from U-Boot shell, a 'nvme scan' command needs to
+be executed for all NVMe hard disks attached to the NVMe controller to be
+identified.
+
+To list all of the NVMe hard disks, try:
+
+ => nvme list
+ Device 0: Vendor: 0x8086 Rev: 8DV10131 Prod: CVFT535600LS400BGN
+ Type: Hard Disk
+ Capacity: 381554.0 MB = 372.6 GB (781422768 x 512)
+
+and print out detailed information for controller and namespaces via:
+
+ => nvme info
+
+Raw block read/write to can be done via the 'nvme read/write' commands:
+
+ => nvme read a0000000 0 11000
+
+ => tftp 80000000 /tftpboot/kernel.itb
+ => nvme write 80000000 0 11000
+
+Of course, file system command can be used on the NVMe hard disk as well:
+
+ => fatls nvme 0:1
+ 32376967 kernel.itb
+ 22929408 100m
+
+ 2 file(s), 0 dir(s)
+
+ => fatload nvme 0:1 a0000000 /kernel.itb
+ => bootm a0000000
+
+Testing NVMe with QEMU x86
+--------------------------
+QEMU supports NVMe emulation and we can test NVMe driver with QEMU x86 running
+U-Boot. Please see README.x86 for how to build u-boot.rom image for QEMU x86.
+
+Example command line to call QEMU x86 below with emulated NVMe device:
+$ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom
Therefore RK3288 has another loading sequence like RK3036. The option of
U-Boot is controlled with this setting in U-Boot:
- #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+ #define CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
You can create the image via the following operations:
You can also bake this behaviour into your build by hard-coding the
environment variables if you add this to minnowmax.h:
-#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sda2 ro"
#define CONFIG_BOOTCOMMAND \
"ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
"ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
+and change CONFIG_BOOTARGS value in configs/minnowmax_defconfig to:
+
+CONFIG_BOOTARGS="root=/dev/sda2 ro"
+
Test with SeaBIOS
-----------------
SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run
--- /dev/null
+RK3368 dynamic memory controller driver
+=======================================
+
+The RK3368 DMC (dynamic memory controller) driver supports setup/initialisation
+during TPL using configuration data from the DTS (i.e. OF_PLATDATA), based on
+the following key configuration data:
+ (a) a target-frequency (i.e. operating point) for the memory operation
+ (b) a speed-bin (as defined in JESD-79) for the DDR3 used in hardware
+ (c) a memory-schedule (i.e. mapping from physical addresses to the address
+ pins of the memory bus)
+
+Required properties
+-------------------
+
+- compatible: "rockchip,rk3368-dmc"
+- reg
+ protocol controller (PCTL) address and PHY controller (DDRPHY) address
+- rockchip,ddr-speed-bin
+ the DDR3 device's speed-bin (as specified according to JESD-79)
+ DDR3_800D (5-5-5)
+ DDR3_800E (6-6-6)
+ DDR3_1066E (6-6-6)
+ DDR3_1066F (7-7-7)
+ DDR3_1066G (8-8-8)
+ DDR3_1333F (7-7-7)
+ DDR3_1333G (8-8-8)
+ DDR3_1333H (9-9-9)
+ DDR3_1333J (10-10-10)
+ DDR3_1600G (8-8-8)
+ DDR3_1600H (9-9-9)
+ DDR3_1600J (10-10-10)
+ DDR3_1600K (11-11-11)
+ DDR3_1866J (10-10-10)
+ DDR3_1866K (11-11-11)
+ DDR3_1866L (12-12-12)
+ DDR3_1866M (13-13-13)
+ DDR3_2133K (11-11-11)
+ DDR3_2133L (12-12-12)
+ DDR3_2133M (13-13-13)
+ DDR3_2133N (14-14-14)
+- rockchip,ddr-frequency:
+ target DDR clock frequency in Hz (not all frequencies may be supported,
+ as there's some cooperation from the clock-driver required)
+- rockchip,memory-schedule:
+ controls the decoding of physical addresses to DRAM addressing (i.e. how
+ the physical address maps onto the address pins/chip-select of the device)
+ DMC_MSCH_CBDR: column -> bank -> device -> row
+ DMC_MSCH_CBRD: column -> band -> row -> device
+ DMC_MSCH_CRBD: column -> row -> band -> device
+
+Example (for DDR3-1600K and 800MHz)
+-----------------------------------
+
+ #include <dt-bindings/memory/rk3368-dmc.h>
+
+ dmc: dmc@ff610000 {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3368-dmc";
+ reg = <0 0xff610000 0 0x400
+ 0 0xff620000 0 0x400>;
+ };
+
+ &dmc {
+ rockchip,ddr-speed-bin = <DDR3_1600K>;
+ rockchip,ddr-frequency = <800000000>;
+ rockchip,memory-schedule = <DMC_MSCH_CBRD>;
+ };
source "drivers/net/Kconfig"
+source "drivers/nvme/Kconfig"
+
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_$(SPL_TPL_)DM) += core/
-obj-$(CONFIG_$(SPL_)CLK) += clk/
-obj-$(CONFIG_$(SPL_)LED) += led/
-obj-$(CONFIG_$(SPL_)PHY) += phy/
-obj-$(CONFIG_$(SPL_)PINCTRL) += pinctrl/
-obj-$(CONFIG_$(SPL_)RAM) += ram/
+obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
+obj-$(CONFIG_$(SPL_TPL_)DM) += core/
+obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
+obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
+obj-$(CONFIG_$(SPL_TPL_)LED) += led/
+obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
+obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/
+obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/
+obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/
+obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/
+obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
+obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
+obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
+obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
+ifndef CONFIG_TPL_BUILD
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_CPU_SUPPORT) += cpu/
obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/
-obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/
obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/
-obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/
obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/
-obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/
-obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
-obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
-obj-$(CONFIG_SPL_NAND_SUPPORT) += mtd/nand/
obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
-obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/
obj-$(CONFIG_SPL_UBI) += mtd/ubispl/
obj-$(CONFIG_SPL_DMA_SUPPORT) += dma/
obj-$(CONFIG_SPL_ETH_SUPPORT) += net/
obj-$(CONFIG_SPL_PCI_SUPPORT) += pci/
obj-$(CONFIG_SPL_PCH_SUPPORT) += pch/
obj-$(CONFIG_SPL_RTC_SUPPORT) += rtc/
-obj-$(CONFIG_SPL_TIMER_SUPPORT) += timer/
obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/
obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/
obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/udc/
obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
+
+endif
endif
ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_TPL_I2C_SUPPORT) += i2c/
-obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
-obj-$(CONFIG_TPL_MMC_SUPPORT) += mmc/
obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
-obj-$(CONFIG_TPL_NAND_SUPPORT) += mtd/nand/
-obj-$(CONFIG_TPL_SERIAL_SUPPORT) += serial/
-obj-$(CONFIG_TPL_SPI_FLASH_SUPPORT) += mtd/spi/
-obj-$(CONFIG_TPL_SPI_SUPPORT) += spi/
endif
obj-$(CONFIG_FPGA) += fpga/
obj-y += misc/
obj-$(CONFIG_MMC) += mmc/
+obj-$(CONFIG_NVME) += nvme/
obj-y += pcmcia/
obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += sound/
obj-y += spmi/
obj-y += sysreset/
-obj-y += timer/
obj-y += tpm/
obj-y += video/
obj-y += watchdog/
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <libata.h>
+#include <common.h>
#include <ahci.h>
+#include <dm.h>
+#include <dwc_ahsata.h>
#include <fis.h>
-#include <sata.h>
-
-#include <common.h>
+#include <libata.h>
#include <malloc.h>
-#include <linux/ctype.h>
-#include <linux/errno.h>
+#include <memalign.h>
+#include <sata.h>
#include <asm/io.h>
-#include <linux/bitops.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
-#include "dwc_ahsata.h"
+#include <linux/bitops.h>
+#include <linux/ctype.h>
+#include <linux/errno.h>
+#include "dwc_ahsata_priv.h"
struct sata_port_regs {
u32 clb;
#define writel_with_flush(a, b) do { writel(a, b); readl(b); } while (0)
-static int is_ready;
-
static inline void __iomem *ahci_port_base(void __iomem *base, u32 port)
{
return base + 0x100 + (port * 0x80);
return (i < timeout_msec) ? 0 : -1;
}
-static int ahci_setup_oobr(struct ahci_uc_priv *probe_ent,
- int clk)
+static int ahci_setup_oobr(struct ahci_uc_priv *uc_priv, int clk)
{
- struct sata_host_regs *host_mmio =
- (struct sata_host_regs *)probe_ent->mmio_base;
+ struct sata_host_regs *host_mmio = uc_priv->mmio_base;
- writel(SATA_HOST_OOBR_WE, &(host_mmio->oobr));
- writel(0x02060b14, &(host_mmio->oobr));
+ writel(SATA_HOST_OOBR_WE, &host_mmio->oobr);
+ writel(0x02060b14, &host_mmio->oobr);
return 0;
}
-static int ahci_host_init(struct ahci_uc_priv *probe_ent)
+static int ahci_host_init(struct ahci_uc_priv *uc_priv)
{
u32 tmp, cap_save, num_ports;
int i, j, timeout = 1000;
struct sata_port_regs *port_mmio = NULL;
- struct sata_host_regs *host_mmio =
- (struct sata_host_regs *)probe_ent->mmio_base;
+ struct sata_host_regs *host_mmio = uc_priv->mmio_base;
int clk = mxc_get_clock(MXC_SATA_CLK);
- cap_save = readl(&(host_mmio->cap));
+ cap_save = readl(&host_mmio->cap);
cap_save |= SATA_HOST_CAP_SSS;
/* global controller reset */
- tmp = readl(&(host_mmio->ghc));
+ tmp = readl(&host_mmio->ghc);
if ((tmp & SATA_HOST_GHC_HR) == 0)
- writel_with_flush(tmp | SATA_HOST_GHC_HR, &(host_mmio->ghc));
+ writel_with_flush(tmp | SATA_HOST_GHC_HR, &host_mmio->ghc);
- while ((readl(&(host_mmio->ghc)) & SATA_HOST_GHC_HR)
- && --timeout)
+ while ((readl(&host_mmio->ghc) & SATA_HOST_GHC_HR) && --timeout)
;
if (timeout <= 0) {
}
/* Set timer 1ms */
- writel(clk / 1000, &(host_mmio->timer1ms));
+ writel(clk / 1000, &host_mmio->timer1ms);
- ahci_setup_oobr(probe_ent, 0);
+ ahci_setup_oobr(uc_priv, 0);
- writel_with_flush(SATA_HOST_GHC_AE, &(host_mmio->ghc));
- writel(cap_save, &(host_mmio->cap));
+ writel_with_flush(SATA_HOST_GHC_AE, &host_mmio->ghc);
+ writel(cap_save, &host_mmio->cap);
num_ports = (cap_save & SATA_HOST_CAP_NP_MASK) + 1;
- writel_with_flush((1 << num_ports) - 1,
- &(host_mmio->pi));
+ writel_with_flush((1 << num_ports) - 1, &host_mmio->pi);
/*
* Determine which Ports are implemented by the DWC_ahsata,
* software to determine how many Ports are available and
* which Port registers need to be initialized.
*/
- probe_ent->cap = readl(&(host_mmio->cap));
- probe_ent->port_map = readl(&(host_mmio->pi));
+ uc_priv->cap = readl(&host_mmio->cap);
+ uc_priv->port_map = readl(&host_mmio->pi);
/* Determine how many command slots the HBA supports */
- probe_ent->n_ports =
- (probe_ent->cap & SATA_HOST_CAP_NP_MASK) + 1;
+ uc_priv->n_ports = (uc_priv->cap & SATA_HOST_CAP_NP_MASK) + 1;
debug("cap 0x%x port_map 0x%x n_ports %d\n",
- probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
+ uc_priv->cap, uc_priv->port_map, uc_priv->n_ports);
- for (i = 0; i < probe_ent->n_ports; i++) {
- probe_ent->port[i].port_mmio =
- ahci_port_base(host_mmio, i);
- port_mmio =
- (struct sata_port_regs *)probe_ent->port[i].port_mmio;
+ for (i = 0; i < uc_priv->n_ports; i++) {
+ uc_priv->port[i].port_mmio = ahci_port_base(host_mmio, i);
+ port_mmio = uc_priv->port[i].port_mmio;
/* Ensure that the DWC_ahsata is in idle state */
- tmp = readl(&(port_mmio->cmd));
+ tmp = readl(&port_mmio->cmd);
/*
* When P#CMD.ST, P#CMD.CR, P#CMD.FRE and P#CMD.FR
* 0 when read.
*/
tmp &= ~SATA_PORT_CMD_ST;
- writel_with_flush(tmp, &(port_mmio->cmd));
+ writel_with_flush(tmp, &port_mmio->cmd);
/*
* spec says 500 msecs for each bit, so
mdelay(500);
timeout = 1000;
- while ((readl(&(port_mmio->cmd)) & SATA_PORT_CMD_CR)
+ while ((readl(&port_mmio->cmd) & SATA_PORT_CMD_CR)
&& --timeout)
;
}
/* Spin-up device */
- tmp = readl(&(port_mmio->cmd));
- writel((tmp | SATA_PORT_CMD_SUD), &(port_mmio->cmd));
+ tmp = readl(&port_mmio->cmd);
+ writel((tmp | SATA_PORT_CMD_SUD), &port_mmio->cmd);
/* Wait for spin-up to finish */
timeout = 1000;
- while (!(readl(&(port_mmio->cmd)) | SATA_PORT_CMD_SUD)
+ while (!(readl(&port_mmio->cmd) | SATA_PORT_CMD_SUD)
&& --timeout)
;
if (timeout <= 0) {
for (j = 0; j < 100; ++j) {
mdelay(10);
- tmp = readl(&(port_mmio->ssts));
+ tmp = readl(&port_mmio->ssts);
if (((tmp & SATA_PORT_SSTS_DET_MASK) == 0x3) ||
((tmp & SATA_PORT_SSTS_DET_MASK) == 0x1))
break;
/* Wait for COMINIT bit 26 (DIAG_X) in SERR */
timeout = 1000;
- while (!(readl(&(port_mmio->serr)) | SATA_PORT_SERR_DIAG_X)
+ while (!(readl(&port_mmio->serr) | SATA_PORT_SERR_DIAG_X)
&& --timeout)
;
if (timeout <= 0) {
* register, by writing ones to each implemented\
* bit location.
*/
- tmp = readl(&(port_mmio->serr));
+ tmp = readl(&port_mmio->serr);
debug("P#SERR 0x%x\n",
tmp);
- writel(tmp, &(port_mmio->serr));
+ writel(tmp, &port_mmio->serr);
/* Ack any pending irq events for this port */
- tmp = readl(&(host_mmio->is));
+ tmp = readl(&host_mmio->is);
debug("IS 0x%x\n", tmp);
if (tmp)
- writel(tmp, &(host_mmio->is));
+ writel(tmp, &host_mmio->is);
- writel(1 << i, &(host_mmio->is));
+ writel(1 << i, &host_mmio->is);
/* set irq mask (enables interrupts) */
- writel(DEF_PORT_IRQ, &(port_mmio->ie));
+ writel(DEF_PORT_IRQ, &port_mmio->ie);
/* register linkup ports */
- tmp = readl(&(port_mmio->ssts));
+ tmp = readl(&port_mmio->ssts);
debug("Port %d status: 0x%x\n", i, tmp);
if ((tmp & SATA_PORT_SSTS_DET_MASK) == 0x03)
- probe_ent->link_port_map |= (0x01 << i);
+ uc_priv->link_port_map |= (0x01 << i);
}
- tmp = readl(&(host_mmio->ghc));
+ tmp = readl(&host_mmio->ghc);
debug("GHC 0x%x\n", tmp);
- writel(tmp | SATA_HOST_GHC_IE, &(host_mmio->ghc));
- tmp = readl(&(host_mmio->ghc));
+ writel(tmp | SATA_HOST_GHC_IE, &host_mmio->ghc);
+ tmp = readl(&host_mmio->ghc);
debug("GHC 0x%x\n", tmp);
return 0;
}
-static void ahci_print_info(struct ahci_uc_priv *probe_ent)
+static void ahci_print_info(struct ahci_uc_priv *uc_priv)
{
- struct sata_host_regs *host_mmio =
- (struct sata_host_regs *)probe_ent->mmio_base;
+ struct sata_host_regs *host_mmio = uc_priv->mmio_base;
u32 vers, cap, impl, speed;
const char *speed_s;
const char *scc_s;
- vers = readl(&(host_mmio->vs));
- cap = probe_ent->cap;
- impl = probe_ent->port_map;
+ vers = readl(&host_mmio->vs);
+ cap = uc_priv->cap;
+ impl = uc_priv->port_map;
speed = (cap & SATA_HOST_CAP_ISS_MASK)
>> SATA_HOST_CAP_ISS_OFFSET;
cap & (1 << 13) ? "part " : "");
}
-static int ahci_init_one(int pdev)
-{
- int rc;
- struct ahci_uc_priv *probe_ent = NULL;
-
- probe_ent = malloc(sizeof(struct ahci_uc_priv));
- memset(probe_ent, 0, sizeof(struct ahci_uc_priv));
- probe_ent->dev = pdev;
-
- probe_ent->host_flags = ATA_FLAG_SATA
- | ATA_FLAG_NO_LEGACY
- | ATA_FLAG_MMIO
- | ATA_FLAG_PIO_DMA
- | ATA_FLAG_NO_ATAPI;
-
- probe_ent->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
-
- /* initialize adapter */
- rc = ahci_host_init(probe_ent);
- if (rc)
- goto err_out;
-
- ahci_print_info(probe_ent);
-
- /* Save the private struct to block device struct */
- sata_dev_desc[pdev].priv = (void *)probe_ent;
-
- return 0;
-
-err_out:
- return rc;
-}
-
-static int ahci_fill_sg(struct ahci_uc_priv *probe_ent,
- u8 port, unsigned char *buf, int buf_len)
+static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
+ unsigned char *buf, int buf_len)
{
- struct ahci_ioports *pp = &(probe_ent->port[port]);
+ struct ahci_ioports *pp = &uc_priv->port[port];
struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
u32 sg_count, max_bytes;
int i;
#define AHCI_GET_CMD_SLOT(c) ((c) ? ffs(c) : 0)
-static int ahci_exec_ata_cmd(struct ahci_uc_priv *probe_ent,
- u8 port, struct sata_fis_h2d *cfis,
- u8 *buf, u32 buf_len, s32 is_write)
+static int ahci_exec_ata_cmd(struct ahci_uc_priv *uc_priv, u8 port,
+ struct sata_fis_h2d *cfis, u8 *buf, u32 buf_len,
+ s32 is_write)
{
- struct ahci_ioports *pp = &(probe_ent->port[port]);
- struct sata_port_regs *port_mmio =
- (struct sata_port_regs *)pp->port_mmio;
+ struct ahci_ioports *pp = &uc_priv->port[port];
+ struct sata_port_regs *port_mmio = pp->port_mmio;
u32 opts;
int sg_count = 0, cmd_slot = 0;
- cmd_slot = AHCI_GET_CMD_SLOT(readl(&(port_mmio->ci)));
+ cmd_slot = AHCI_GET_CMD_SLOT(readl(&port_mmio->ci));
if (32 == cmd_slot) {
printf("Can't find empty command slot!\n");
return 0;
memcpy((u8 *)(pp->cmd_tbl), cfis, sizeof(struct sata_fis_h2d));
if (buf && buf_len)
- sg_count = ahci_fill_sg(probe_ent, port, buf, buf_len);
+ sg_count = ahci_fill_sg(uc_priv, port, buf, buf_len);
opts = (sizeof(struct sata_fis_h2d) >> 2) | (sg_count << 16);
if (is_write) {
opts |= 0x40;
ahci_fill_cmd_slot(pp, cmd_slot, opts);
flush_cache((int)(pp->cmd_slot), AHCI_PORT_PRIV_DMA_SZ);
- writel_with_flush(1 << cmd_slot, &(port_mmio->ci));
+ writel_with_flush(1 << cmd_slot, &port_mmio->ci);
- if (waiting_for_cmd_completed((u8 *)&(port_mmio->ci),
- 10000, 0x1 << cmd_slot)) {
+ if (waiting_for_cmd_completed((u8 *)&port_mmio->ci, 10000,
+ 0x1 << cmd_slot)) {
printf("timeout exit!\n");
return -1;
}
return buf_len;
}
-static void ahci_set_feature(u8 dev, u8 port)
+static void ahci_set_feature(struct ahci_uc_priv *uc_priv, u8 port)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
struct sata_fis_h2d *cfis = &h2d;
cfis->pm_port_c = 1 << 7;
cfis->command = ATA_CMD_SET_FEATURES;
cfis->features = SETFEATURES_XFER;
- cfis->sector_count = ffs(probe_ent->udma_mask + 1) + 0x3e;
+ cfis->sector_count = ffs(uc_priv->udma_mask + 1) + 0x3e;
- ahci_exec_ata_cmd(probe_ent, port, cfis, NULL, 0, READ_CMD);
+ ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, READ_CMD);
}
-static int ahci_port_start(struct ahci_uc_priv *probe_ent,
- u8 port)
+static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
{
- struct ahci_ioports *pp = &(probe_ent->port[port]);
- struct sata_port_regs *port_mmio =
- (struct sata_port_regs *)pp->port_mmio;
+ struct ahci_ioports *pp = &uc_priv->port[port];
+ struct sata_port_regs *port_mmio = pp->port_mmio;
u32 port_status;
u32 mem;
int timeout = 10000000;
debug("Enter start port: %d\n", port);
- port_status = readl(&(port_mmio->ssts));
+ port_status = readl(&port_mmio->ssts);
debug("Port %d status: %x\n", port, port_status);
if ((port_status & 0xf) != 0x03) {
printf("No Link on this port!\n");
mem += AHCI_CMD_TBL_HDR;
- writel_with_flush(0x00004444, &(port_mmio->dmacr));
+ writel_with_flush(0x00004444, &port_mmio->dmacr);
pp->cmd_tbl_sg = (struct ahci_sg *)mem;
- writel_with_flush((u32)pp->cmd_slot, &(port_mmio->clb));
- writel_with_flush(pp->rx_fis, &(port_mmio->fb));
+ writel_with_flush((u32)pp->cmd_slot, &port_mmio->clb);
+ writel_with_flush(pp->rx_fis, &port_mmio->fb);
/* Enable FRE */
- writel_with_flush((SATA_PORT_CMD_FRE | readl(&(port_mmio->cmd))),
- &(port_mmio->cmd));
+ writel_with_flush((SATA_PORT_CMD_FRE | readl(&port_mmio->cmd)),
+ &port_mmio->cmd);
/* Wait device ready */
- while ((readl(&(port_mmio->tfd)) & (SATA_PORT_TFD_STS_ERR |
+ while ((readl(&port_mmio->tfd) & (SATA_PORT_TFD_STS_ERR |
SATA_PORT_TFD_STS_DRQ | SATA_PORT_TFD_STS_BSY))
&& --timeout)
;
writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
- PORT_CMD_START, &(port_mmio->cmd));
+ PORT_CMD_START, &port_mmio->cmd);
debug("Exit start port %d\n", port);
return 0;
}
-int init_sata(int dev)
-{
- int i;
- u32 linkmap;
- struct ahci_uc_priv *probe_ent = NULL;
-
-#if defined(CONFIG_MX6)
- if (!is_mx6dq() && !is_mx6dqp())
- return 1;
-#endif
- if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
- printf("The sata index %d is out of ranges\n\r", dev);
- return -1;
- }
-
- ahci_init_one(dev);
-
- probe_ent = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
- linkmap = probe_ent->link_port_map;
-
- if (0 == linkmap) {
- printf("No port device detected!\n");
- return 1;
- }
-
- for (i = 0; i < probe_ent->n_ports; i++) {
- if ((linkmap >> i) && ((linkmap >> i) & 0x01)) {
- if (ahci_port_start(probe_ent, (u8)i)) {
- printf("Can not start port %d\n", i);
- return 1;
- }
- probe_ent->hard_port_no = i;
- break;
- }
- }
-
- return 0;
-}
-
-int reset_sata(int dev)
-{
- struct ahci_uc_priv *probe_ent;
- struct sata_host_regs *host_mmio;
-
- if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
- printf("The sata index %d is out of ranges\n\r", dev);
- return -1;
- }
-
- probe_ent = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
- if (NULL == probe_ent)
- /* not initialized, so nothing to reset */
- return 0;
-
- host_mmio = (struct sata_host_regs *)probe_ent->mmio_base;
- setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR);
- while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
- udelay(100);
-
- return 0;
-}
-
-static void dwc_ahsata_print_info(int dev)
+static void dwc_ahsata_print_info(struct blk_desc *pdev)
{
- struct blk_desc *pdev = &(sata_dev_desc[dev]);
-
printf("SATA Device Info:\n\r");
#ifdef CONFIG_SYS_64BIT_LBA
printf("S/N: %s\n\rProduct model number: %s\n\r"
#endif
}
-static void dwc_ahsata_identify(int dev, u16 *id)
+static void dwc_ahsata_identify(struct ahci_uc_priv *uc_priv, u16 *id)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
struct sata_fis_h2d *cfis = &h2d;
- u8 port = probe_ent->hard_port_no;
+ u8 port = uc_priv->hard_port_no;
memset(cfis, 0, sizeof(struct sata_fis_h2d));
cfis->pm_port_c = 0x80; /* is command */
cfis->command = ATA_CMD_ID_ATA;
- ahci_exec_ata_cmd(probe_ent, port, cfis,
- (u8 *)id, ATA_ID_WORDS * 2, READ_CMD);
+ ahci_exec_ata_cmd(uc_priv, port, cfis, (u8 *)id, ATA_ID_WORDS * 2,
+ READ_CMD);
ata_swap_buf_le16(id, ATA_ID_WORDS);
}
-static void dwc_ahsata_xfer_mode(int dev, u16 *id)
+static void dwc_ahsata_xfer_mode(struct ahci_uc_priv *uc_priv, u16 *id)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
-
- probe_ent->pio_mask = id[ATA_ID_PIO_MODES];
- probe_ent->udma_mask = id[ATA_ID_UDMA_MODES];
- debug("pio %04x, udma %04x\n\r",
- probe_ent->pio_mask, probe_ent->udma_mask);
+ uc_priv->pio_mask = id[ATA_ID_PIO_MODES];
+ uc_priv->udma_mask = id[ATA_ID_UDMA_MODES];
+ debug("pio %04x, udma %04x\n\r", uc_priv->pio_mask, uc_priv->udma_mask);
}
-static u32 dwc_ahsata_rw_cmd(int dev, u32 start, u32 blkcnt,
- u8 *buffer, int is_write)
+static u32 dwc_ahsata_rw_cmd(struct ahci_uc_priv *uc_priv, u32 start,
+ u32 blkcnt, u8 *buffer, int is_write)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
struct sata_fis_h2d *cfis = &h2d;
- u8 port = probe_ent->hard_port_no;
+ u8 port = uc_priv->hard_port_no;
u32 block;
block = start;
cfis->lba_low = block & 0xff;
cfis->sector_count = (u8)(blkcnt & 0xff);
- if (ahci_exec_ata_cmd(probe_ent, port, cfis,
- buffer, ATA_SECT_SIZE * blkcnt, is_write) > 0)
+ if (ahci_exec_ata_cmd(uc_priv, port, cfis, buffer,
+ ATA_SECT_SIZE * blkcnt, is_write) > 0)
return blkcnt;
else
return 0;
}
-void dwc_ahsata_flush_cache(int dev)
+static void dwc_ahsata_flush_cache(struct ahci_uc_priv *uc_priv)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
struct sata_fis_h2d *cfis = &h2d;
- u8 port = probe_ent->hard_port_no;
+ u8 port = uc_priv->hard_port_no;
memset(cfis, 0, sizeof(struct sata_fis_h2d));
cfis->pm_port_c = 0x80; /* is command */
cfis->command = ATA_CMD_FLUSH;
- ahci_exec_ata_cmd(probe_ent, port, cfis, NULL, 0, 0);
+ ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, 0);
}
-static u32 dwc_ahsata_rw_cmd_ext(int dev, u32 start, lbaint_t blkcnt,
- u8 *buffer, int is_write)
+static u32 dwc_ahsata_rw_cmd_ext(struct ahci_uc_priv *uc_priv, u32 start,
+ lbaint_t blkcnt, u8 *buffer, int is_write)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
struct sata_fis_h2d *cfis = &h2d;
- u8 port = probe_ent->hard_port_no;
+ u8 port = uc_priv->hard_port_no;
u64 block;
block = (u64)start;
cfis->sector_count_exp = (blkcnt >> 8) & 0xff;
cfis->sector_count = blkcnt & 0xff;
- if (ahci_exec_ata_cmd(probe_ent, port, cfis, buffer,
- ATA_SECT_SIZE * blkcnt, is_write) > 0)
+ if (ahci_exec_ata_cmd(uc_priv, port, cfis, buffer,
+ ATA_SECT_SIZE * blkcnt, is_write) > 0)
return blkcnt;
else
return 0;
}
-u32 dwc_ahsata_rw_ncq_cmd(int dev, u32 start, lbaint_t blkcnt,
- u8 *buffer, int is_write)
-{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
- struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
- struct sata_fis_h2d *cfis = &h2d;
- u8 port = probe_ent->hard_port_no;
- u64 block;
-
- if (sata_dev_desc[dev].lba48 != 1) {
- printf("execute FPDMA command on non-LBA48 hard disk\n\r");
- return -1;
- }
-
- block = (u64)start;
-
- memset(cfis, 0, sizeof(struct sata_fis_h2d));
-
- cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
- cfis->pm_port_c = 0x80; /* is command */
-
- cfis->command = (is_write) ? ATA_CMD_FPDMA_WRITE
- : ATA_CMD_FPDMA_READ;
-
- cfis->lba_high_exp = (block >> 40) & 0xff;
- cfis->lba_mid_exp = (block >> 32) & 0xff;
- cfis->lba_low_exp = (block >> 24) & 0xff;
- cfis->lba_high = (block >> 16) & 0xff;
- cfis->lba_mid = (block >> 8) & 0xff;
- cfis->lba_low = block & 0xff;
-
- cfis->device = ATA_LBA;
- cfis->features_exp = (blkcnt >> 8) & 0xff;
- cfis->features = blkcnt & 0xff;
-
- /* Use the latest queue */
- ahci_exec_ata_cmd(probe_ent, port, cfis,
- buffer, ATA_SECT_SIZE * blkcnt, is_write);
-
- return blkcnt;
-}
-
-void dwc_ahsata_flush_cache_ext(int dev)
+static void dwc_ahsata_flush_cache_ext(struct ahci_uc_priv *uc_priv)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
struct sata_fis_h2d *cfis = &h2d;
- u8 port = probe_ent->hard_port_no;
+ u8 port = uc_priv->hard_port_no;
memset(cfis, 0, sizeof(struct sata_fis_h2d));
cfis->pm_port_c = 0x80; /* is command */
cfis->command = ATA_CMD_FLUSH_EXT;
- ahci_exec_ata_cmd(probe_ent, port, cfis, NULL, 0, 0);
+ ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, 0);
}
-static void dwc_ahsata_init_wcache(int dev, u16 *id)
+static void dwc_ahsata_init_wcache(struct ahci_uc_priv *uc_priv, u16 *id)
{
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
-
if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
- probe_ent->flags |= SATA_FLAG_WCACHE;
+ uc_priv->flags |= SATA_FLAG_WCACHE;
if (ata_id_has_flush(id))
- probe_ent->flags |= SATA_FLAG_FLUSH;
+ uc_priv->flags |= SATA_FLAG_FLUSH;
if (ata_id_has_flush_ext(id))
- probe_ent->flags |= SATA_FLAG_FLUSH_EXT;
+ uc_priv->flags |= SATA_FLAG_FLUSH_EXT;
}
-u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
- const void *buffer, int is_write)
+static u32 ata_low_level_rw_lba48(struct ahci_uc_priv *uc_priv, u32 blknr,
+ lbaint_t blkcnt, const void *buffer,
+ int is_write)
{
u32 start, blks;
u8 *addr;
do {
if (blks > max_blks) {
- if (max_blks != dwc_ahsata_rw_cmd_ext(dev, start,
- max_blks, addr, is_write))
+ if (max_blks != dwc_ahsata_rw_cmd_ext(uc_priv, start,
+ max_blks, addr,
+ is_write))
return 0;
start += max_blks;
blks -= max_blks;
addr += ATA_SECT_SIZE * max_blks;
} else {
- if (blks != dwc_ahsata_rw_cmd_ext(dev, start,
- blks, addr, is_write))
+ if (blks != dwc_ahsata_rw_cmd_ext(uc_priv, start, blks,
+ addr, is_write))
return 0;
start += blks;
blks = 0;
return blkcnt;
}
-u32 ata_low_level_rw_lba28(int dev, u32 blknr, lbaint_t blkcnt,
- const void *buffer, int is_write)
+static u32 ata_low_level_rw_lba28(struct ahci_uc_priv *uc_priv, u32 blknr,
+ lbaint_t blkcnt, const void *buffer,
+ int is_write)
{
u32 start, blks;
u8 *addr;
max_blks = ATA_MAX_SECTORS;
do {
if (blks > max_blks) {
- if (max_blks != dwc_ahsata_rw_cmd(dev, start,
- max_blks, addr, is_write))
+ if (max_blks != dwc_ahsata_rw_cmd(uc_priv, start,
+ max_blks, addr,
+ is_write))
return 0;
start += max_blks;
blks -= max_blks;
addr += ATA_SECT_SIZE * max_blks;
} else {
- if (blks != dwc_ahsata_rw_cmd(dev, start,
- blks, addr, is_write))
+ if (blks != dwc_ahsata_rw_cmd(uc_priv, start, blks,
+ addr, is_write))
return 0;
start += blks;
blks = 0;
return blkcnt;
}
-int sata_port_status(int dev, int port)
+static int dwc_ahci_start_ports(struct ahci_uc_priv *uc_priv)
{
- struct sata_port_regs *port_mmio;
- struct ahci_uc_priv *probe_ent = NULL;
-
- if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1))
- return -EINVAL;
-
- if (sata_dev_desc[dev].priv == NULL)
- return -ENODEV;
+ u32 linkmap;
+ int i;
- probe_ent = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
- port_mmio = (struct sata_port_regs *)probe_ent->port[port].port_mmio;
+ linkmap = uc_priv->link_port_map;
- return readl(&(port_mmio->ssts)) & SATA_PORT_SSTS_DET_MASK;
-}
+ if (0 == linkmap) {
+ printf("No port device detected!\n");
+ return -ENXIO;
+ }
-/*
- * SATA interface between low level driver and command layer
- */
-ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
-{
- u32 rc;
+ for (i = 0; i < uc_priv->n_ports; i++) {
+ if ((linkmap >> i) && ((linkmap >> i) & 0x01)) {
+ if (ahci_port_start(uc_priv, (u8)i)) {
+ printf("Can not start port %d\n", i);
+ return 1;
+ }
+ uc_priv->hard_port_no = i;
+ break;
+ }
+ }
- if (sata_dev_desc[dev].lba48)
- rc = ata_low_level_rw_lba48(dev, blknr, blkcnt,
- buffer, READ_CMD);
- else
- rc = ata_low_level_rw_lba28(dev, blknr, blkcnt,
- buffer, READ_CMD);
- return rc;
+ return 0;
}
-ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
-{
- u32 rc;
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
- u32 flags = probe_ent->flags;
-
- if (sata_dev_desc[dev].lba48) {
- rc = ata_low_level_rw_lba48(dev, blknr, blkcnt,
- buffer, WRITE_CMD);
- if ((flags & SATA_FLAG_WCACHE) &&
- (flags & SATA_FLAG_FLUSH_EXT))
- dwc_ahsata_flush_cache_ext(dev);
- } else {
- rc = ata_low_level_rw_lba28(dev, blknr, blkcnt,
- buffer, WRITE_CMD);
- if ((flags & SATA_FLAG_WCACHE) &&
- (flags & SATA_FLAG_FLUSH))
- dwc_ahsata_flush_cache(dev);
- }
- return rc;
-}
-
-int scan_sata(int dev)
+static int dwc_ahsata_scan_common(struct ahci_uc_priv *uc_priv,
+ struct blk_desc *pdev)
{
u8 serial[ATA_ID_SERNO_LEN + 1] = { 0 };
u8 firmware[ATA_ID_FW_REV_LEN + 1] = { 0 };
u8 product[ATA_ID_PROD_LEN + 1] = { 0 };
- u16 *id;
u64 n_sectors;
- struct ahci_uc_priv *probe_ent =
- (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
- u8 port = probe_ent->hard_port_no;
- struct blk_desc *pdev = &(sata_dev_desc[dev]);
-
- id = (u16 *)memalign(ARCH_DMA_MINALIGN,
- roundup(ARCH_DMA_MINALIGN,
- (ATA_ID_WORDS * 2)));
- if (!id) {
- printf("id malloc failed\n\r");
- return -1;
- }
+ u8 port = uc_priv->hard_port_no;
+ ALLOC_CACHE_ALIGN_BUFFER(u16, id, ATA_ID_WORDS);
/* Identify device to get information */
- dwc_ahsata_identify(dev, id);
+ dwc_ahsata_identify(uc_priv, id);
/* Serial number */
ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
pdev->type = DEV_TYPE_HARDDISK;
pdev->blksz = ATA_SECT_SIZE;
- pdev->lun = 0 ;
+ pdev->lun = 0;
/* Check if support LBA48 */
if (ata_id_has_lba48(id)) {
}
/* Get the NCQ queue depth from device */
- probe_ent->flags &= (~SATA_FLAG_Q_DEP_MASK);
- probe_ent->flags |= ata_id_queue_depth(id);
+ uc_priv->flags &= (~SATA_FLAG_Q_DEP_MASK);
+ uc_priv->flags |= ata_id_queue_depth(id);
/* Get the xfer mode from device */
- dwc_ahsata_xfer_mode(dev, id);
+ dwc_ahsata_xfer_mode(uc_priv, id);
/* Get the write cache status from device */
- dwc_ahsata_init_wcache(dev, id);
+ dwc_ahsata_init_wcache(uc_priv, id);
/* Set the xfer mode to highest speed */
- ahci_set_feature(dev, port);
+ ahci_set_feature(uc_priv, port);
+
+ dwc_ahsata_print_info(pdev);
+
+ return 0;
+}
+
+/*
+ * SATA interface between low level driver and command layer
+ */
+static ulong sata_read_common(struct ahci_uc_priv *uc_priv,
+ struct blk_desc *desc, ulong blknr,
+ lbaint_t blkcnt, void *buffer)
+{
+ u32 rc;
+
+ if (desc->lba48)
+ rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt, buffer,
+ READ_CMD);
+ else
+ rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt, buffer,
+ READ_CMD);
+
+ return rc;
+}
+
+static ulong sata_write_common(struct ahci_uc_priv *uc_priv,
+ struct blk_desc *desc, ulong blknr,
+ lbaint_t blkcnt, const void *buffer)
+{
+ u32 rc;
+ u32 flags = uc_priv->flags;
+
+ if (desc->lba48) {
+ rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt, buffer,
+ WRITE_CMD);
+ if ((flags & SATA_FLAG_WCACHE) && (flags & SATA_FLAG_FLUSH_EXT))
+ dwc_ahsata_flush_cache_ext(uc_priv);
+ } else {
+ rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt, buffer,
+ WRITE_CMD);
+ if ((flags & SATA_FLAG_WCACHE) && (flags & SATA_FLAG_FLUSH))
+ dwc_ahsata_flush_cache(uc_priv);
+ }
+
+ return rc;
+}
+
+#if !CONFIG_IS_ENABLED(AHCI)
+static int ahci_init_one(int pdev)
+{
+ int rc;
+ struct ahci_uc_priv *uc_priv = NULL;
+
+ uc_priv = malloc(sizeof(struct ahci_uc_priv));
+ memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
+ uc_priv->dev = pdev;
+
+ uc_priv->host_flags = ATA_FLAG_SATA
+ | ATA_FLAG_NO_LEGACY
+ | ATA_FLAG_MMIO
+ | ATA_FLAG_PIO_DMA
+ | ATA_FLAG_NO_ATAPI;
+
+ uc_priv->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
+
+ /* initialize adapter */
+ rc = ahci_host_init(uc_priv);
+ if (rc)
+ goto err_out;
+
+ ahci_print_info(uc_priv);
+
+ /* Save the uc_private struct to block device struct */
+ sata_dev_desc[pdev].priv = uc_priv;
+
+ return 0;
+
+err_out:
+ return rc;
+}
+
+int init_sata(int dev)
+{
+ struct ahci_uc_priv *uc_priv = NULL;
+
+#if defined(CONFIG_MX6)
+ if (!is_mx6dq() && !is_mx6dqp())
+ return 1;
+#endif
+ if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
+ printf("The sata index %d is out of ranges\n\r", dev);
+ return -1;
+ }
+
+ ahci_init_one(dev);
+
+ uc_priv = sata_dev_desc[dev].priv;
+
+ return dwc_ahci_start_ports(uc_priv) ? 1 : 0;
+}
+
+int reset_sata(int dev)
+{
+ struct ahci_uc_priv *uc_priv;
+ struct sata_host_regs *host_mmio;
- free((void *)id);
+ if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
+ printf("The sata index %d is out of ranges\n\r", dev);
+ return -1;
+ }
- dwc_ahsata_print_info(dev);
+ uc_priv = sata_dev_desc[dev].priv;
+ if (NULL == uc_priv)
+ /* not initialized, so nothing to reset */
+ return 0;
- is_ready = 1;
+ host_mmio = uc_priv->mmio_base;
+ setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR);
+ while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
+ udelay(100);
return 0;
}
+
+int sata_port_status(int dev, int port)
+{
+ struct sata_port_regs *port_mmio;
+ struct ahci_uc_priv *uc_priv = NULL;
+
+ if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1))
+ return -EINVAL;
+
+ if (sata_dev_desc[dev].priv == NULL)
+ return -ENODEV;
+
+ uc_priv = sata_dev_desc[dev].priv;
+ port_mmio = uc_priv->port[port].port_mmio;
+
+ return readl(&port_mmio->ssts) & SATA_PORT_SSTS_DET_MASK;
+}
+
+/*
+ * SATA interface between low level driver and command layer
+ */
+ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
+{
+ struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
+
+ return sata_read_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt,
+ buffer);
+}
+
+ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
+{
+ struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
+
+ return sata_write_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt,
+ buffer);
+}
+
+int scan_sata(int dev)
+{
+ struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
+ struct blk_desc *pdev = &sata_dev_desc[dev];
+
+ return dwc_ahsata_scan_common(uc_priv, pdev);
+}
+#endif /* CONFIG_IS_ENABLED(AHCI) */
+
+#if CONFIG_IS_ENABLED(AHCI)
+
+int dwc_ahsata_port_status(struct udevice *dev, int port)
+{
+ struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct sata_port_regs *port_mmio;
+
+ port_mmio = uc_priv->port[port].port_mmio;
+ return readl(&port_mmio->ssts) & SATA_PORT_SSTS_DET_MASK ? 0 : -ENXIO;
+}
+
+int dwc_ahsata_bus_reset(struct udevice *dev)
+{
+ struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct sata_host_regs *host_mmio = uc_priv->mmio_base;
+
+ setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR);
+ while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
+ udelay(100);
+
+ return 0;
+}
+
+int dwc_ahsata_scan(struct udevice *dev)
+{
+ struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct blk_desc *desc;
+ struct udevice *blk;
+ int ret;
+
+ /*
+ * Create only one block device and do detection
+ * to make sure that there won't be a lot of
+ * block devices created
+ */
+ device_find_first_child(dev, &blk);
+ if (!blk) {
+ ret = blk_create_devicef(dev, "dwc_ahsata_blk", "blk",
+ IF_TYPE_SATA, -1, 512, 0, &blk);
+ if (ret) {
+ debug("Can't create device\n");
+ return ret;
+ }
+ }
+
+ desc = dev_get_uclass_platdata(blk);
+ ret = dwc_ahsata_scan_common(uc_priv, desc);
+ if (ret) {
+ debug("%s: Failed to scan bus\n", __func__);
+ return ret;
+ }
+
+ return 0;
+}
+
+int dwc_ahsata_probe(struct udevice *dev)
+{
+ struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
+ int ret;
+
+ uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
+ ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI;
+ uc_priv->mmio_base = (void __iomem *)dev_read_addr(dev);
+
+ /* initialize adapter */
+ ret = ahci_host_init(uc_priv);
+ if (ret)
+ return ret;
+
+ ahci_print_info(uc_priv);
+
+ return dwc_ahci_start_ports(uc_priv);
+}
+
+static ulong dwc_ahsata_read(struct udevice *blk, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer)
+{
+ struct blk_desc *desc = dev_get_uclass_platdata(blk);
+ struct udevice *dev = dev_get_parent(blk);
+ struct ahci_uc_priv *uc_priv;
+
+ uc_priv = dev_get_uclass_priv(dev);
+ return sata_read_common(uc_priv, desc, blknr, blkcnt, buffer);
+}
+
+static ulong dwc_ahsata_write(struct udevice *blk, lbaint_t blknr,
+ lbaint_t blkcnt, const void *buffer)
+{
+ struct blk_desc *desc = dev_get_uclass_platdata(blk);
+ struct udevice *dev = dev_get_parent(blk);
+ struct ahci_uc_priv *uc_priv;
+
+ uc_priv = dev_get_uclass_priv(dev);
+ return sata_write_common(uc_priv, desc, blknr, blkcnt, buffer);
+}
+
+static const struct blk_ops dwc_ahsata_blk_ops = {
+ .read = dwc_ahsata_read,
+ .write = dwc_ahsata_write,
+};
+
+U_BOOT_DRIVER(dwc_ahsata_blk) = {
+ .name = "dwc_ahsata_blk",
+ .id = UCLASS_BLK,
+ .ops = &dwc_ahsata_blk_ops,
+};
+
+#endif
+++ /dev/null
-/*
- * Copyright (C) 2010 Freescale Semiconductor, Inc.
- * Terry Lv <r65388@freescale.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __FSL_SATA_H__
-#define __FSL_SATA_H__
-
-#define DWC_AHSATA_MAX_CMD_SLOTS 32
-
-/* Max host controller numbers */
-#define SATA_HC_MAX_NUM 4
-/* Max command queue depth per host controller */
-#define DWC_AHSATA_HC_MAX_CMD 32
-/* Max port number per host controller */
-#define SATA_HC_MAX_PORT 16
-
-/* Generic Host Register */
-
-/* HBA Capabilities Register */
-#define SATA_HOST_CAP_S64A 0x80000000
-#define SATA_HOST_CAP_SNCQ 0x40000000
-#define SATA_HOST_CAP_SSNTF 0x20000000
-#define SATA_HOST_CAP_SMPS 0x10000000
-#define SATA_HOST_CAP_SSS 0x08000000
-#define SATA_HOST_CAP_SALP 0x04000000
-#define SATA_HOST_CAP_SAL 0x02000000
-#define SATA_HOST_CAP_SCLO 0x01000000
-#define SATA_HOST_CAP_ISS_MASK 0x00f00000
-#define SATA_HOST_CAP_ISS_OFFSET 20
-#define SATA_HOST_CAP_SNZO 0x00080000
-#define SATA_HOST_CAP_SAM 0x00040000
-#define SATA_HOST_CAP_SPM 0x00020000
-#define SATA_HOST_CAP_PMD 0x00008000
-#define SATA_HOST_CAP_SSC 0x00004000
-#define SATA_HOST_CAP_PSC 0x00002000
-#define SATA_HOST_CAP_NCS 0x00001f00
-#define SATA_HOST_CAP_CCCS 0x00000080
-#define SATA_HOST_CAP_EMS 0x00000040
-#define SATA_HOST_CAP_SXS 0x00000020
-#define SATA_HOST_CAP_NP_MASK 0x0000001f
-
-/* Global HBA Control Register */
-#define SATA_HOST_GHC_AE 0x80000000
-#define SATA_HOST_GHC_IE 0x00000002
-#define SATA_HOST_GHC_HR 0x00000001
-
-/* Interrupt Status Register */
-
-/* Ports Implemented Register */
-
-/* AHCI Version Register */
-#define SATA_HOST_VS_MJR_MASK 0xffff0000
-#define SATA_HOST_VS_MJR_OFFSET 16
-#define SATA_HOST_VS_MJR_MNR 0x0000ffff
-
-/* Command Completion Coalescing Control */
-#define SATA_HOST_CCC_CTL_TV_MASK 0xffff0000
-#define SATA_HOST_CCC_CTL_TV_OFFSET 16
-#define SATA_HOST_CCC_CTL_CC_MASK 0x0000ff00
-#define SATA_HOST_CCC_CTL_CC_OFFSET 8
-#define SATA_HOST_CCC_CTL_INT_MASK 0x000000f8
-#define SATA_HOST_CCC_CTL_INT_OFFSET 3
-#define SATA_HOST_CCC_CTL_EN 0x00000001
-
-/* Command Completion Coalescing Ports */
-
-/* HBA Capabilities Extended Register */
-#define SATA_HOST_CAP2_APST 0x00000004
-
-/* BIST Activate FIS Register */
-#define SATA_HOST_BISTAFR_NCP_MASK 0x0000ff00
-#define SATA_HOST_BISTAFR_NCP_OFFSET 8
-#define SATA_HOST_BISTAFR_PD_MASK 0x000000ff
-#define SATA_HOST_BISTAFR_PD_OFFSET 0
-
-/* BIST Control Register */
-#define SATA_HOST_BISTCR_FERLB 0x00100000
-#define SATA_HOST_BISTCR_TXO 0x00040000
-#define SATA_HOST_BISTCR_CNTCLR 0x00020000
-#define SATA_HOST_BISTCR_NEALB 0x00010000
-#define SATA_HOST_BISTCR_LLC_MASK 0x00000700
-#define SATA_HOST_BISTCR_LLC_OFFSET 8
-#define SATA_HOST_BISTCR_ERREN 0x00000040
-#define SATA_HOST_BISTCR_FLIP 0x00000020
-#define SATA_HOST_BISTCR_PV 0x00000010
-#define SATA_HOST_BISTCR_PATTERN_MASK 0x0000000f
-#define SATA_HOST_BISTCR_PATTERN_OFFSET 0
-
-/* BIST FIS Count Register */
-
-/* BIST Status Register */
-#define SATA_HOST_BISTSR_FRAMERR_MASK 0x0000ffff
-#define SATA_HOST_BISTSR_FRAMERR_OFFSET 0
-#define SATA_HOST_BISTSR_BRSTERR_MASK 0x00ff0000
-#define SATA_HOST_BISTSR_BRSTERR_OFFSET 16
-
-/* BIST DWORD Error Count Register */
-
-/* OOB Register*/
-#define SATA_HOST_OOBR_WE 0x80000000
-#define SATA_HOST_OOBR_cwMin_MASK 0x7f000000
-#define SATA_HOST_OOBR_cwMAX_MASK 0x00ff0000
-#define SATA_HOST_OOBR_ciMin_MASK 0x0000ff00
-#define SATA_HOST_OOBR_ciMax_MASK 0x000000ff
-
-/* Timer 1-ms Register */
-
-/* Global Parameter 1 Register */
-#define SATA_HOST_GPARAM1R_ALIGN_M 0x80000000
-#define SATA_HOST_GPARAM1R_RX_BUFFER 0x40000000
-#define SATA_HOST_GPARAM1R_PHY_DATA_MASK 0x30000000
-#define SATA_HOST_GPARAM1R_PHY_RST 0x08000000
-#define SATA_HOST_GPARAM1R_PHY_CTRL_MASK 0x07e00000
-#define SATA_HOST_GPARAM1R_PHY_STAT_MASK 0x001f8000
-#define SATA_HOST_GPARAM1R_LATCH_M 0x00004000
-#define SATA_HOST_GPARAM1R_BIST_M 0x00002000
-#define SATA_HOST_GPARAM1R_PHY_TYPE 0x00001000
-#define SATA_HOST_GPARAM1R_RETURN_ERR 0x00000400
-#define SATA_HOST_GPARAM1R_AHB_ENDIAN_MASK 0x00000300
-#define SATA_HOST_GPARAM1R_S_HADDR 0X00000080
-#define SATA_HOST_GPARAM1R_M_HADDR 0X00000040
-
-/* Global Parameter 2 Register */
-#define SATA_HOST_GPARAM2R_DEV_CP 0x00004000
-#define SATA_HOST_GPARAM2R_DEV_MP 0x00002000
-#define SATA_HOST_GPARAM2R_DEV_ENCODE_M 0x00001000
-#define SATA_HOST_GPARAM2R_RXOOB_CLK_M 0x00000800
-#define SATA_HOST_GPARAM2R_RXOOB_M 0x00000400
-#define SATA_HOST_GPARAM2R_TX_OOB_M 0x00000200
-#define SATA_HOST_GPARAM2R_RXOOB_CLK_MASK 0x000001ff
-
-/* Port Parameter Register */
-#define SATA_HOST_PPARAMR_TX_MEM_M 0x00000200
-#define SATA_HOST_PPARAMR_TX_MEM_S 0x00000100
-#define SATA_HOST_PPARAMR_RX_MEM_M 0x00000080
-#define SATA_HOST_PPARAMR_RX_MEM_S 0x00000040
-#define SATA_HOST_PPARAMR_TXFIFO_DEPTH_MASK 0x00000038
-#define SATA_HOST_PPARAMR_RXFIFO_DEPTH_MASK 0x00000007
-
-/* Test Register */
-#define SATA_HOST_TESTR_PSEL_MASK 0x00070000
-#define SATA_HOST_TESTR_TEST_IF 0x00000001
-
-/* Port Register Descriptions */
-/* Port# Command List Base Address Register */
-#define SATA_PORT_CLB_CLB_MASK 0xfffffc00
-
-/* Port# Command List Base Address Upper 32-Bits Register */
-
-/* Port# FIS Base Address Register */
-#define SATA_PORT_FB_FB_MASK 0xfffffff0
-
-/* Port# FIS Base Address Upper 32-Bits Register */
-
-/* Port# Interrupt Status Register */
-#define SATA_PORT_IS_CPDS 0x80000000
-#define SATA_PORT_IS_TFES 0x40000000
-#define SATA_PORT_IS_HBFS 0x20000000
-#define SATA_PORT_IS_HBDS 0x10000000
-#define SATA_PORT_IS_IFS 0x08000000
-#define SATA_PORT_IS_INFS 0x04000000
-#define SATA_PORT_IS_OFS 0x01000000
-#define SATA_PORT_IS_IPMS 0x00800000
-#define SATA_PORT_IS_PRCS 0x00400000
-#define SATA_PORT_IS_DMPS 0x00000080
-#define SATA_PORT_IS_PCS 0x00000040
-#define SATA_PORT_IS_DPS 0x00000020
-#define SATA_PORT_IS_UFS 0x00000010
-#define SATA_PORT_IS_SDBS 0x00000008
-#define SATA_PORT_IS_DSS 0x00000004
-#define SATA_PORT_IS_PSS 0x00000002
-#define SATA_PORT_IS_DHRS 0x00000001
-
-/* Port# Interrupt Enable Register */
-#define SATA_PORT_IE_CPDE 0x80000000
-#define SATA_PORT_IE_TFEE 0x40000000
-#define SATA_PORT_IE_HBFE 0x20000000
-#define SATA_PORT_IE_HBDE 0x10000000
-#define SATA_PORT_IE_IFE 0x08000000
-#define SATA_PORT_IE_INFE 0x04000000
-#define SATA_PORT_IE_OFE 0x01000000
-#define SATA_PORT_IE_IPME 0x00800000
-#define SATA_PORT_IE_PRCE 0x00400000
-#define SATA_PORT_IE_DMPE 0x00000080
-#define SATA_PORT_IE_PCE 0x00000040
-#define SATA_PORT_IE_DPE 0x00000020
-#define SATA_PORT_IE_UFE 0x00000010
-#define SATA_PORT_IE_SDBE 0x00000008
-#define SATA_PORT_IE_DSE 0x00000004
-#define SATA_PORT_IE_PSE 0x00000002
-#define SATA_PORT_IE_DHRE 0x00000001
-
-/* Port# Command Register */
-#define SATA_PORT_CMD_ICC_MASK 0xf0000000
-#define SATA_PORT_CMD_ASP 0x08000000
-#define SATA_PORT_CMD_ALPE 0x04000000
-#define SATA_PORT_CMD_DLAE 0x02000000
-#define SATA_PORT_CMD_ATAPI 0x01000000
-#define SATA_PORT_CMD_APSTE 0x00800000
-#define SATA_PORT_CMD_ESP 0x00200000
-#define SATA_PORT_CMD_CPD 0x00100000
-#define SATA_PORT_CMD_MPSP 0x00080000
-#define SATA_PORT_CMD_HPCP 0x00040000
-#define SATA_PORT_CMD_PMA 0x00020000
-#define SATA_PORT_CMD_CPS 0x00010000
-#define SATA_PORT_CMD_CR 0x00008000
-#define SATA_PORT_CMD_FR 0x00004000
-#define SATA_PORT_CMD_MPSS 0x00002000
-#define SATA_PORT_CMD_CCS_MASK 0x00001f00
-#define SATA_PORT_CMD_FRE 0x00000010
-#define SATA_PORT_CMD_CLO 0x00000008
-#define SATA_PORT_CMD_POD 0x00000004
-#define SATA_PORT_CMD_SUD 0x00000002
-#define SATA_PORT_CMD_ST 0x00000001
-
-/* Port# Task File Data Register */
-#define SATA_PORT_TFD_ERR_MASK 0x0000ff00
-#define SATA_PORT_TFD_STS_MASK 0x000000ff
-#define SATA_PORT_TFD_STS_ERR 0x00000001
-#define SATA_PORT_TFD_STS_DRQ 0x00000008
-#define SATA_PORT_TFD_STS_BSY 0x00000080
-
-/* Port# Signature Register */
-
-/* Port# Serial ATA Status {SStatus} Register */
-#define SATA_PORT_SSTS_IPM_MASK 0x00000f00
-#define SATA_PORT_SSTS_SPD_MASK 0x000000f0
-#define SATA_PORT_SSTS_DET_MASK 0x0000000f
-
-/* Port# Serial ATA Control {SControl} Register */
-#define SATA_PORT_SCTL_IPM_MASK 0x00000f00
-#define SATA_PORT_SCTL_SPD_MASK 0x000000f0
-#define SATA_PORT_SCTL_DET_MASK 0x0000000f
-
-/* Port# Serial ATA Error {SError} Register */
-#define SATA_PORT_SERR_DIAG_X 0x04000000
-#define SATA_PORT_SERR_DIAG_F 0x02000000
-#define SATA_PORT_SERR_DIAG_T 0x01000000
-#define SATA_PORT_SERR_DIAG_S 0x00800000
-#define SATA_PORT_SERR_DIAG_H 0x00400000
-#define SATA_PORT_SERR_DIAG_C 0x00200000
-#define SATA_PORT_SERR_DIAG_D 0x00100000
-#define SATA_PORT_SERR_DIAG_B 0x00080000
-#define SATA_PORT_SERR_DIAG_W 0x00040000
-#define SATA_PORT_SERR_DIAG_I 0x00020000
-#define SATA_PORT_SERR_DIAG_N 0x00010000
-#define SATA_PORT_SERR_ERR_E 0x00000800
-#define SATA_PORT_SERR_ERR_P 0x00000400
-#define SATA_PORT_SERR_ERR_C 0x00000200
-#define SATA_PORT_SERR_ERR_T 0x00000100
-#define SATA_PORT_SERR_ERR_M 0x00000002
-#define SATA_PORT_SERR_ERR_I 0x00000001
-
-/* Port# Serial ATA Active {SActive} Register */
-
-/* Port# Command Issue Register */
-
-/* Port# Serial ATA Notification Register */
-
-/* Port# DMA Control Register */
-#define SATA_PORT_DMACR_RXABL_MASK 0x0000f000
-#define SATA_PORT_DMACR_TXABL_MASK 0x00000f00
-#define SATA_PORT_DMACR_RXTS_MASK 0x000000f0
-#define SATA_PORT_DMACR_TXTS_MASK 0x0000000f
-
-/* Port# PHY Control Register */
-
-/* Port# PHY Status Register */
-
-#define SATA_HC_CMD_HDR_ENTRY_SIZE sizeof(struct cmd_hdr_entry)
-
-/* DW0
-*/
-#define CMD_HDR_DI_CFL_MASK 0x0000001f
-#define CMD_HDR_DI_CFL_OFFSET 0
-#define CMD_HDR_DI_A 0x00000020
-#define CMD_HDR_DI_W 0x00000040
-#define CMD_HDR_DI_P 0x00000080
-#define CMD_HDR_DI_R 0x00000100
-#define CMD_HDR_DI_B 0x00000200
-#define CMD_HDR_DI_C 0x00000400
-#define CMD_HDR_DI_PMP_MASK 0x0000f000
-#define CMD_HDR_DI_PMP_OFFSET 12
-#define CMD_HDR_DI_PRDTL 0xffff0000
-#define CMD_HDR_DI_PRDTL_OFFSET 16
-
-/* prde_fis_len
-*/
-#define CMD_HDR_PRD_ENTRY_SHIFT 16
-#define CMD_HDR_PRD_ENTRY_MASK 0x003f0000
-#define CMD_HDR_FIS_LEN_SHIFT 2
-
-/* attribute
-*/
-#define CMD_HDR_ATTR_RES 0x00000800 /* Reserved bit, should be 1 */
-#define CMD_HDR_ATTR_VBIST 0x00000400 /* Vendor BIST */
-/* Snoop enable for all descriptor */
-#define CMD_HDR_ATTR_SNOOP 0x00000200
-#define CMD_HDR_ATTR_FPDMA 0x00000100 /* FPDMA queued command */
-#define CMD_HDR_ATTR_RESET 0x00000080 /* Reset - a SRST or device reset */
-/* BIST - require the host to enter BIST mode */
-#define CMD_HDR_ATTR_BIST 0x00000040
-#define CMD_HDR_ATTR_ATAPI 0x00000020 /* ATAPI command */
-#define CMD_HDR_ATTR_TAG 0x0000001f /* TAG mask */
-
-#define FLAGS_DMA 0x00000000
-#define FLAGS_FPDMA 0x00000001
-
-#define SATA_FLAG_Q_DEP_MASK 0x0000000f
-#define SATA_FLAG_WCACHE 0x00000100
-#define SATA_FLAG_FLUSH 0x00000200
-#define SATA_FLAG_FLUSH_EXT 0x00000400
-
-#define READ_CMD 0
-#define WRITE_CMD 1
-
-#endif /* __FSL_SATA_H__ */
--- /dev/null
+/*
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ * Terry Lv <r65388@freescale.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DWC_AHSATA_PRIV_H__
+#define __DWC_AHSATA_PRIV_H__
+
+#define DWC_AHSATA_MAX_CMD_SLOTS 32
+
+/* Max host controller numbers */
+#define SATA_HC_MAX_NUM 4
+/* Max command queue depth per host controller */
+#define DWC_AHSATA_HC_MAX_CMD 32
+/* Max port number per host controller */
+#define SATA_HC_MAX_PORT 16
+
+/* Generic Host Register */
+
+/* HBA Capabilities Register */
+#define SATA_HOST_CAP_S64A 0x80000000
+#define SATA_HOST_CAP_SNCQ 0x40000000
+#define SATA_HOST_CAP_SSNTF 0x20000000
+#define SATA_HOST_CAP_SMPS 0x10000000
+#define SATA_HOST_CAP_SSS 0x08000000
+#define SATA_HOST_CAP_SALP 0x04000000
+#define SATA_HOST_CAP_SAL 0x02000000
+#define SATA_HOST_CAP_SCLO 0x01000000
+#define SATA_HOST_CAP_ISS_MASK 0x00f00000
+#define SATA_HOST_CAP_ISS_OFFSET 20
+#define SATA_HOST_CAP_SNZO 0x00080000
+#define SATA_HOST_CAP_SAM 0x00040000
+#define SATA_HOST_CAP_SPM 0x00020000
+#define SATA_HOST_CAP_PMD 0x00008000
+#define SATA_HOST_CAP_SSC 0x00004000
+#define SATA_HOST_CAP_PSC 0x00002000
+#define SATA_HOST_CAP_NCS 0x00001f00
+#define SATA_HOST_CAP_CCCS 0x00000080
+#define SATA_HOST_CAP_EMS 0x00000040
+#define SATA_HOST_CAP_SXS 0x00000020
+#define SATA_HOST_CAP_NP_MASK 0x0000001f
+
+/* Global HBA Control Register */
+#define SATA_HOST_GHC_AE 0x80000000
+#define SATA_HOST_GHC_IE 0x00000002
+#define SATA_HOST_GHC_HR 0x00000001
+
+/* Interrupt Status Register */
+
+/* Ports Implemented Register */
+
+/* AHCI Version Register */
+#define SATA_HOST_VS_MJR_MASK 0xffff0000
+#define SATA_HOST_VS_MJR_OFFSET 16
+#define SATA_HOST_VS_MJR_MNR 0x0000ffff
+
+/* Command Completion Coalescing Control */
+#define SATA_HOST_CCC_CTL_TV_MASK 0xffff0000
+#define SATA_HOST_CCC_CTL_TV_OFFSET 16
+#define SATA_HOST_CCC_CTL_CC_MASK 0x0000ff00
+#define SATA_HOST_CCC_CTL_CC_OFFSET 8
+#define SATA_HOST_CCC_CTL_INT_MASK 0x000000f8
+#define SATA_HOST_CCC_CTL_INT_OFFSET 3
+#define SATA_HOST_CCC_CTL_EN 0x00000001
+
+/* Command Completion Coalescing Ports */
+
+/* HBA Capabilities Extended Register */
+#define SATA_HOST_CAP2_APST 0x00000004
+
+/* BIST Activate FIS Register */
+#define SATA_HOST_BISTAFR_NCP_MASK 0x0000ff00
+#define SATA_HOST_BISTAFR_NCP_OFFSET 8
+#define SATA_HOST_BISTAFR_PD_MASK 0x000000ff
+#define SATA_HOST_BISTAFR_PD_OFFSET 0
+
+/* BIST Control Register */
+#define SATA_HOST_BISTCR_FERLB 0x00100000
+#define SATA_HOST_BISTCR_TXO 0x00040000
+#define SATA_HOST_BISTCR_CNTCLR 0x00020000
+#define SATA_HOST_BISTCR_NEALB 0x00010000
+#define SATA_HOST_BISTCR_LLC_MASK 0x00000700
+#define SATA_HOST_BISTCR_LLC_OFFSET 8
+#define SATA_HOST_BISTCR_ERREN 0x00000040
+#define SATA_HOST_BISTCR_FLIP 0x00000020
+#define SATA_HOST_BISTCR_PV 0x00000010
+#define SATA_HOST_BISTCR_PATTERN_MASK 0x0000000f
+#define SATA_HOST_BISTCR_PATTERN_OFFSET 0
+
+/* BIST FIS Count Register */
+
+/* BIST Status Register */
+#define SATA_HOST_BISTSR_FRAMERR_MASK 0x0000ffff
+#define SATA_HOST_BISTSR_FRAMERR_OFFSET 0
+#define SATA_HOST_BISTSR_BRSTERR_MASK 0x00ff0000
+#define SATA_HOST_BISTSR_BRSTERR_OFFSET 16
+
+/* BIST DWORD Error Count Register */
+
+/* OOB Register*/
+#define SATA_HOST_OOBR_WE 0x80000000
+#define SATA_HOST_OOBR_cwMin_MASK 0x7f000000
+#define SATA_HOST_OOBR_cwMAX_MASK 0x00ff0000
+#define SATA_HOST_OOBR_ciMin_MASK 0x0000ff00
+#define SATA_HOST_OOBR_ciMax_MASK 0x000000ff
+
+/* Timer 1-ms Register */
+
+/* Global Parameter 1 Register */
+#define SATA_HOST_GPARAM1R_ALIGN_M 0x80000000
+#define SATA_HOST_GPARAM1R_RX_BUFFER 0x40000000
+#define SATA_HOST_GPARAM1R_PHY_DATA_MASK 0x30000000
+#define SATA_HOST_GPARAM1R_PHY_RST 0x08000000
+#define SATA_HOST_GPARAM1R_PHY_CTRL_MASK 0x07e00000
+#define SATA_HOST_GPARAM1R_PHY_STAT_MASK 0x001f8000
+#define SATA_HOST_GPARAM1R_LATCH_M 0x00004000
+#define SATA_HOST_GPARAM1R_BIST_M 0x00002000
+#define SATA_HOST_GPARAM1R_PHY_TYPE 0x00001000
+#define SATA_HOST_GPARAM1R_RETURN_ERR 0x00000400
+#define SATA_HOST_GPARAM1R_AHB_ENDIAN_MASK 0x00000300
+#define SATA_HOST_GPARAM1R_S_HADDR 0X00000080
+#define SATA_HOST_GPARAM1R_M_HADDR 0X00000040
+
+/* Global Parameter 2 Register */
+#define SATA_HOST_GPARAM2R_DEV_CP 0x00004000
+#define SATA_HOST_GPARAM2R_DEV_MP 0x00002000
+#define SATA_HOST_GPARAM2R_DEV_ENCODE_M 0x00001000
+#define SATA_HOST_GPARAM2R_RXOOB_CLK_M 0x00000800
+#define SATA_HOST_GPARAM2R_RXOOB_M 0x00000400
+#define SATA_HOST_GPARAM2R_TX_OOB_M 0x00000200
+#define SATA_HOST_GPARAM2R_RXOOB_CLK_MASK 0x000001ff
+
+/* Port Parameter Register */
+#define SATA_HOST_PPARAMR_TX_MEM_M 0x00000200
+#define SATA_HOST_PPARAMR_TX_MEM_S 0x00000100
+#define SATA_HOST_PPARAMR_RX_MEM_M 0x00000080
+#define SATA_HOST_PPARAMR_RX_MEM_S 0x00000040
+#define SATA_HOST_PPARAMR_TXFIFO_DEPTH_MASK 0x00000038
+#define SATA_HOST_PPARAMR_RXFIFO_DEPTH_MASK 0x00000007
+
+/* Test Register */
+#define SATA_HOST_TESTR_PSEL_MASK 0x00070000
+#define SATA_HOST_TESTR_TEST_IF 0x00000001
+
+/* Port Register Descriptions */
+/* Port# Command List Base Address Register */
+#define SATA_PORT_CLB_CLB_MASK 0xfffffc00
+
+/* Port# Command List Base Address Upper 32-Bits Register */
+
+/* Port# FIS Base Address Register */
+#define SATA_PORT_FB_FB_MASK 0xfffffff0
+
+/* Port# FIS Base Address Upper 32-Bits Register */
+
+/* Port# Interrupt Status Register */
+#define SATA_PORT_IS_CPDS 0x80000000
+#define SATA_PORT_IS_TFES 0x40000000
+#define SATA_PORT_IS_HBFS 0x20000000
+#define SATA_PORT_IS_HBDS 0x10000000
+#define SATA_PORT_IS_IFS 0x08000000
+#define SATA_PORT_IS_INFS 0x04000000
+#define SATA_PORT_IS_OFS 0x01000000
+#define SATA_PORT_IS_IPMS 0x00800000
+#define SATA_PORT_IS_PRCS 0x00400000
+#define SATA_PORT_IS_DMPS 0x00000080
+#define SATA_PORT_IS_PCS 0x00000040
+#define SATA_PORT_IS_DPS 0x00000020
+#define SATA_PORT_IS_UFS 0x00000010
+#define SATA_PORT_IS_SDBS 0x00000008
+#define SATA_PORT_IS_DSS 0x00000004
+#define SATA_PORT_IS_PSS 0x00000002
+#define SATA_PORT_IS_DHRS 0x00000001
+
+/* Port# Interrupt Enable Register */
+#define SATA_PORT_IE_CPDE 0x80000000
+#define SATA_PORT_IE_TFEE 0x40000000
+#define SATA_PORT_IE_HBFE 0x20000000
+#define SATA_PORT_IE_HBDE 0x10000000
+#define SATA_PORT_IE_IFE 0x08000000
+#define SATA_PORT_IE_INFE 0x04000000
+#define SATA_PORT_IE_OFE 0x01000000
+#define SATA_PORT_IE_IPME 0x00800000
+#define SATA_PORT_IE_PRCE 0x00400000
+#define SATA_PORT_IE_DMPE 0x00000080
+#define SATA_PORT_IE_PCE 0x00000040
+#define SATA_PORT_IE_DPE 0x00000020
+#define SATA_PORT_IE_UFE 0x00000010
+#define SATA_PORT_IE_SDBE 0x00000008
+#define SATA_PORT_IE_DSE 0x00000004
+#define SATA_PORT_IE_PSE 0x00000002
+#define SATA_PORT_IE_DHRE 0x00000001
+
+/* Port# Command Register */
+#define SATA_PORT_CMD_ICC_MASK 0xf0000000
+#define SATA_PORT_CMD_ASP 0x08000000
+#define SATA_PORT_CMD_ALPE 0x04000000
+#define SATA_PORT_CMD_DLAE 0x02000000
+#define SATA_PORT_CMD_ATAPI 0x01000000
+#define SATA_PORT_CMD_APSTE 0x00800000
+#define SATA_PORT_CMD_ESP 0x00200000
+#define SATA_PORT_CMD_CPD 0x00100000
+#define SATA_PORT_CMD_MPSP 0x00080000
+#define SATA_PORT_CMD_HPCP 0x00040000
+#define SATA_PORT_CMD_PMA 0x00020000
+#define SATA_PORT_CMD_CPS 0x00010000
+#define SATA_PORT_CMD_CR 0x00008000
+#define SATA_PORT_CMD_FR 0x00004000
+#define SATA_PORT_CMD_MPSS 0x00002000
+#define SATA_PORT_CMD_CCS_MASK 0x00001f00
+#define SATA_PORT_CMD_FRE 0x00000010
+#define SATA_PORT_CMD_CLO 0x00000008
+#define SATA_PORT_CMD_POD 0x00000004
+#define SATA_PORT_CMD_SUD 0x00000002
+#define SATA_PORT_CMD_ST 0x00000001
+
+/* Port# Task File Data Register */
+#define SATA_PORT_TFD_ERR_MASK 0x0000ff00
+#define SATA_PORT_TFD_STS_MASK 0x000000ff
+#define SATA_PORT_TFD_STS_ERR 0x00000001
+#define SATA_PORT_TFD_STS_DRQ 0x00000008
+#define SATA_PORT_TFD_STS_BSY 0x00000080
+
+/* Port# Signature Register */
+
+/* Port# Serial ATA Status {SStatus} Register */
+#define SATA_PORT_SSTS_IPM_MASK 0x00000f00
+#define SATA_PORT_SSTS_SPD_MASK 0x000000f0
+#define SATA_PORT_SSTS_DET_MASK 0x0000000f
+
+/* Port# Serial ATA Control {SControl} Register */
+#define SATA_PORT_SCTL_IPM_MASK 0x00000f00
+#define SATA_PORT_SCTL_SPD_MASK 0x000000f0
+#define SATA_PORT_SCTL_DET_MASK 0x0000000f
+
+/* Port# Serial ATA Error {SError} Register */
+#define SATA_PORT_SERR_DIAG_X 0x04000000
+#define SATA_PORT_SERR_DIAG_F 0x02000000
+#define SATA_PORT_SERR_DIAG_T 0x01000000
+#define SATA_PORT_SERR_DIAG_S 0x00800000
+#define SATA_PORT_SERR_DIAG_H 0x00400000
+#define SATA_PORT_SERR_DIAG_C 0x00200000
+#define SATA_PORT_SERR_DIAG_D 0x00100000
+#define SATA_PORT_SERR_DIAG_B 0x00080000
+#define SATA_PORT_SERR_DIAG_W 0x00040000
+#define SATA_PORT_SERR_DIAG_I 0x00020000
+#define SATA_PORT_SERR_DIAG_N 0x00010000
+#define SATA_PORT_SERR_ERR_E 0x00000800
+#define SATA_PORT_SERR_ERR_P 0x00000400
+#define SATA_PORT_SERR_ERR_C 0x00000200
+#define SATA_PORT_SERR_ERR_T 0x00000100
+#define SATA_PORT_SERR_ERR_M 0x00000002
+#define SATA_PORT_SERR_ERR_I 0x00000001
+
+/* Port# Serial ATA Active {SActive} Register */
+
+/* Port# Command Issue Register */
+
+/* Port# Serial ATA Notification Register */
+
+/* Port# DMA Control Register */
+#define SATA_PORT_DMACR_RXABL_MASK 0x0000f000
+#define SATA_PORT_DMACR_TXABL_MASK 0x00000f00
+#define SATA_PORT_DMACR_RXTS_MASK 0x000000f0
+#define SATA_PORT_DMACR_TXTS_MASK 0x0000000f
+
+/* Port# PHY Control Register */
+
+/* Port# PHY Status Register */
+
+#define SATA_HC_CMD_HDR_ENTRY_SIZE sizeof(struct cmd_hdr_entry)
+
+/* DW0
+*/
+#define CMD_HDR_DI_CFL_MASK 0x0000001f
+#define CMD_HDR_DI_CFL_OFFSET 0
+#define CMD_HDR_DI_A 0x00000020
+#define CMD_HDR_DI_W 0x00000040
+#define CMD_HDR_DI_P 0x00000080
+#define CMD_HDR_DI_R 0x00000100
+#define CMD_HDR_DI_B 0x00000200
+#define CMD_HDR_DI_C 0x00000400
+#define CMD_HDR_DI_PMP_MASK 0x0000f000
+#define CMD_HDR_DI_PMP_OFFSET 12
+#define CMD_HDR_DI_PRDTL 0xffff0000
+#define CMD_HDR_DI_PRDTL_OFFSET 16
+
+/* prde_fis_len
+*/
+#define CMD_HDR_PRD_ENTRY_SHIFT 16
+#define CMD_HDR_PRD_ENTRY_MASK 0x003f0000
+#define CMD_HDR_FIS_LEN_SHIFT 2
+
+/* attribute
+*/
+#define CMD_HDR_ATTR_RES 0x00000800 /* Reserved bit, should be 1 */
+#define CMD_HDR_ATTR_VBIST 0x00000400 /* Vendor BIST */
+/* Snoop enable for all descriptor */
+#define CMD_HDR_ATTR_SNOOP 0x00000200
+#define CMD_HDR_ATTR_FPDMA 0x00000100 /* FPDMA queued command */
+#define CMD_HDR_ATTR_RESET 0x00000080 /* Reset - a SRST or device reset */
+/* BIST - require the host to enter BIST mode */
+#define CMD_HDR_ATTR_BIST 0x00000040
+#define CMD_HDR_ATTR_ATAPI 0x00000020 /* ATAPI command */
+#define CMD_HDR_ATTR_TAG 0x0000001f /* TAG mask */
+
+#define FLAGS_DMA 0x00000000
+#define FLAGS_FPDMA 0x00000001
+
+#define SATA_FLAG_Q_DEP_MASK 0x0000000f
+#define SATA_FLAG_WCACHE 0x00000100
+#define SATA_FLAG_FLUSH 0x00000200
+#define SATA_FLAG_FLUSH_EXT 0x00000400
+
+#define READ_CMD 0
+#define WRITE_CMD 1
+
+#endif /* __DWC_AHSATA_H__ */
*/
#include <common.h>
+#include <ahci.h>
#include <dm.h>
#include <sata.h>
+#ifndef CONFIG_AHCI
struct blk_desc sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
+#endif
+
+int sata_reset(struct udevice *dev)
+{
+ struct ahci_ops *ops = ahci_get_ops(dev);
+
+ if (!ops->reset)
+ return -ENOSYS;
+
+ return ops->reset(dev);
+}
+
+int sata_dm_port_status(struct udevice *dev, int port)
+{
+ struct ahci_ops *ops = ahci_get_ops(dev);
+
+ if (!ops->port_status)
+ return -ENOSYS;
+ return ops->port_status(dev, port);
+}
+
+int sata_scan(struct udevice *dev)
+{
+ struct ahci_ops *ops = ahci_get_ops(dev);
+
+ if (!ops->scan)
+ return -ENOSYS;
+
+ return ops->scan(dev);
+}
+
+#ifndef CONFIG_AHCI
#ifdef CONFIG_PARTITIONS
struct blk_desc *sata_get_dev(int dev)
{
return (dev < CONFIG_SYS_SATA_MAX_DEVICE) ? &sata_dev_desc[dev] : NULL;
}
#endif
+#endif
#ifdef CONFIG_BLK
static unsigned long sata_bread(struct udevice *dev, lbaint_t start,
}
#endif
+#ifndef CONFIG_AHCI
int __sata_initialize(void)
{
int rc, ret = -1;
return err;
}
int sata_stop(void) __attribute__((weak, alias("__sata_stop")));
+#endif
#ifdef CONFIG_BLK
static const struct blk_ops sata_blk_ops = {
[IF_TYPE_SATA] = "sata",
[IF_TYPE_HOST] = "host",
[IF_TYPE_SYSTEMACE] = "ace",
+ [IF_TYPE_NVME] = "nvme",
};
static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
[IF_TYPE_SD] = UCLASS_INVALID,
[IF_TYPE_SATA] = UCLASS_AHCI,
[IF_TYPE_HOST] = UCLASS_ROOT,
+ [IF_TYPE_NVME] = UCLASS_NVME,
[IF_TYPE_SYSTEMACE] = UCLASS_INVALID,
};
return if_type_uclass_id[if_type];
}
+const char *blk_get_if_type_name(enum if_type if_type)
+{
+ return if_typename_str[if_type];
+}
+
struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum)
{
struct blk_desc *desc;
}
device_set_name_alloced(*devp);
- return ret;
+ return 0;
}
int blk_unbind_all(int if_type)
return NULL;
}
+const char *blk_get_if_type_name(enum if_type if_type)
+{
+ struct blk_driver *drv = blk_driver_lookup_type(if_type);
+
+ return drv ? drv->if_typename : NULL;
+}
+
/**
* get_desc() - Get the block device descriptor for the given device number
*
*/
#include <common.h>
+#include <environment.h>
void bootcount_store(ulong a)
{
- int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+ int upgrade_available = env_get_ulong("upgrade_available", 10, 0);
if (upgrade_available) {
- setenv_ulong("bootcount", a);
- saveenv();
+ env_set_ulong("bootcount", a);
+ env_save();
}
}
ulong bootcount_load(void)
{
- int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+ int upgrade_available = env_get_ulong("upgrade_available", 10, 0);
ulong val = 0;
if (upgrade_available)
- val = getenv_ulong("bootcount", 10, 0);
+ val = env_get_ulong("bootcount", 10, 0);
return val;
}
config SPL_CLK
bool "Enable clock support in SPL"
- depends on CLK
+ depends on CLK && SPL_DM
help
The clock subsystem adds a small amount of overhead to the image.
If this is acceptable and you have a need to use clock drivers in
setting up clocks within SPL, and allows the same drivers to be
used as U-Boot proper.
+config TPL_CLK
+ bool "Enable clock support in TPL"
+ depends on CLK && TPL_DM
+ help
+ The clock subsystem adds a small amount of overhead to the image.
+ If this is acceptable and you have a need to use clock drivers in
+ SPL, enable this option. It might provide a cleaner interface to
+ setting up clocks within TPL, and allows the same drivers to be
+ used as U-Boot proper.
+
config CLK_BCM6345
bool "Clock controller driver for BCM6345"
depends on CLK && ARCH_BMIPS
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_CLK) += clk-uclass.o clk_fixed_rate.o
+obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_SANDBOX) += clk_sandbox.o
obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
}
src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
- return DIV_TO_RATE(src_rate, div);
+ return DIV_TO_RATE(src_rate, div) / 2;
}
static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate,
debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
/* mmc clock auto divide 2 in internal */
- src_clk_div = (clk_general_rate / 2 + freq - 1) / freq;
+ src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
- if (src_clk_div > 0x7f) {
- src_clk_div = (OSC_HZ / 2 + freq - 1) / freq;
+ if (src_clk_div > 128) {
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+ assert(src_clk_div - 1 < 128);
mux = EMMC_SEL_24M;
} else {
mux = EMMC_SEL_GPLL;
SOCSTS_GPLL_LOCK = 1 << 8,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _nr, _no) {\
return -EINVAL;
}
- return DIV_TO_RATE(gclk_rate, div);
+ return DIV_TO_RATE(gclk_rate, div) / 2;
}
static ulong rockchip_mmc_set_clk(struct rk3188_cru *cru, uint gclk_rate,
int src_clk_div;
debug("%s: gclk_rate=%u\n", __func__, gclk_rate);
- src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ /* mmc clock defaulg div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq) - 1;
assert(src_clk_div <= 0x3f);
switch (periph) {
static ulong rockchip_spi_set_clk(struct rk3188_cru *cru, uint gclk_rate,
int periph, uint freq)
{
- int src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ int src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1;
+ assert(src_clk_div < 128);
switch (periph) {
case SCLK_SPI0:
assert(src_clk_div <= SPI0_DIV_MASK);
* reparent aclk_cpu_pre from apll to gpll
* set up dependent divisors for PCLK/HCLK and ACLK clocks.
*/
- aclk_div = RATE_TO_DIV(GPLL_HZ, CPU_ACLK_HZ);
- assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+ aclk_div = DIV_ROUND_UP(GPLL_HZ, CPU_ACLK_HZ) - 1;
+ assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
rk_clrsetreg(&cru->cru_clksel_con[0],
CPU_ACLK_PLL_MASK << CPU_ACLK_PLL_SHIFT |
OUTPUT_MIN_HZ = 24 * 1000000,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
}
src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
- return DIV_TO_RATE(src_rate, div);
+ return DIV_TO_RATE(src_rate, div) / 2;
}
static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
- /* mmc clock auto divide 2 in internal */
- src_clk_div = (clk_general_rate / 2 + freq - 1) / freq;
+ /* mmc clock defaulg div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
- if (src_clk_div > 0x7f) {
- src_clk_div = (OSC_HZ / 2 + freq - 1) / freq;
+ if (src_clk_div > 128) {
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+ assert(src_clk_div - 1 < 128);
mux = EMMC_SEL_24M;
} else {
mux = EMMC_SEL_GPLL;
SOCSTS_NPLL_LOCK = 1 << 9,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _nr, _no) {\
int mux;
debug("%s: gclk_rate=%u\n", __func__, gclk_rate);
- src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ /* mmc clock default div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq);
if (src_clk_div > 0x3f) {
- src_clk_div = RATE_TO_DIV(OSC_HZ, freq);
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+ assert(src_clk_div < 0x40);
mux = EMMC_PLL_SELECT_24MHZ;
assert((int)EMMC_PLL_SELECT_24MHZ ==
(int)MMC0_PLL_SELECT_24MHZ);
int src_clk_div;
debug("%s: clk_general_rate=%u\n", __func__, gclk_rate);
- src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1;
+ assert(src_clk_div < 128);
switch (periph) {
case SCLK_SPI0:
rk_clrsetreg(&cru->cru_clksel_con[25],
if ((con & CLK_EMMC_PLL_MASK) >> CLK_EMMC_PLL_SHIFT
== CLK_EMMC_PLL_SEL_24M)
- return DIV_TO_RATE(OSC_HZ, div);
+ return DIV_TO_RATE(OSC_HZ, div) / 2;
else
- return DIV_TO_RATE(GPLL_HZ, div);
+ return DIV_TO_RATE(GPLL_HZ, div) / 2;
}
static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
return -EINVAL;
}
/* Select clk_sdmmc/emmc source from GPLL by default */
- src_clk_div = GPLL_HZ / set_rate;
+ /* mmc clock defaulg div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
if (src_clk_div > 127) {
/* use 24MHz source for 400KHz clock */
- src_clk_div = OSC_HZ / set_rate;
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
rk_clrsetreg(&cru->clksel_con[con_id],
CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT |
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
* Author: Andy Yan <andy.yan@rock-chips.com>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
* SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
+#include <dt-structs.h>
#include <errno.h>
+#include <mapmem.h>
#include <syscon.h>
#include <asm/arch/clock.h>
#include <asm/arch/cru_rk3368.h>
DECLARE_GLOBAL_DATA_PTR;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+struct rk3368_clk_plat {
+ struct dtd_rockchip_rk3368_cru dtd;
+};
+#endif
+
struct pll_div {
u32 nr;
u32 nf;
#define GPLL_HZ (576 * 1000 * 1000)
#define CPLL_HZ (400 * 1000 * 1000)
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _nr, _no) { \
(_nr * _no) == hz, #hz "Hz cannot be hit with PLL " \
"divisors on line " __stringify(__LINE__));
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
static const struct pll_div apll_l_init_cfg = PLL_DIVISORS(APLL_L_HZ, 12, 2);
static const struct pll_div apll_b_init_cfg = PLL_DIVISORS(APLL_B_HZ, 1, 2);
+#if !defined(CONFIG_TPL_BUILD)
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 2);
static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6);
+#endif
+#endif
+
+static ulong rk3368_clk_get_rate(struct clk *clk);
/* Get pll rate by id */
static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru,
}
}
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
- const struct pll_div *div, bool has_bwadj)
+ const struct pll_div *div)
{
struct rk3368_pll *pll = &cru->pll[pll_id];
/* All PLLs have same VCO and output frequency range restrictions*/
((div->nr - 1) << PLL_NR_SHIFT) |
((div->no - 1) << PLL_OD_SHIFT));
writel((div->nf - 1) << PLL_NF_SHIFT, &pll->con1);
+ /*
+ * BWADJ should be set to NF / 2 to ensure the nominal bandwidth.
+ * Compare the RK3368 TRM, section "3.6.4 PLL Bandwidth Adjustment".
+ */
+ clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
+
udelay(10);
/* return from reset */
return 0;
}
+#endif
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
static void rkclk_init(struct rk3368_cru *cru)
{
u32 apllb, aplll, dpll, cpll, gpll;
- rkclk_set_pll(cru, APLLB, &apll_b_init_cfg, false);
- rkclk_set_pll(cru, APLLL, &apll_l_init_cfg, false);
- rkclk_set_pll(cru, GPLL, &gpll_init_cfg, false);
- rkclk_set_pll(cru, CPLL, &cpll_init_cfg, false);
+ rkclk_set_pll(cru, APLLB, &apll_b_init_cfg);
+ rkclk_set_pll(cru, APLLL, &apll_l_init_cfg);
+#if !defined(CONFIG_TPL_BUILD)
+ /*
+ * If we plan to return to the boot ROM, we can't increase the
+ * GPLL rate from the SPL stage.
+ */
+ rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
+ rkclk_set_pll(cru, CPLL, &cpll_init_cfg);
+#endif
apllb = rkclk_pll_get_rate(cru, APLLB);
aplll = rkclk_pll_get_rate(cru, APLLL);
debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n",
__func__, apllb, aplll, dpll, cpll, gpll);
}
+#endif
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id)
{
u32 div, con, con_id, rate;
u32 pll_rate;
switch (clk_id) {
- case SCLK_SDMMC:
+ case HCLK_SDMMC:
con_id = 50;
break;
- case SCLK_EMMC:
+ case HCLK_EMMC:
con_id = 51;
break;
case SCLK_SDIO0:
}
con = readl(&cru->clksel_con[con_id]);
- switch ((con & MMC_PLL_SEL_MASK) >> MMC_PLL_SEL_SHIFT) {
+ switch (con & MMC_PLL_SEL_MASK) {
case MMC_PLL_SEL_GPLL:
pll_rate = rkclk_pll_get_rate(cru, GPLL);
break;
pll_rate = OSC_HZ;
break;
case MMC_PLL_SEL_CPLL:
+ pll_rate = rkclk_pll_get_rate(cru, CPLL);
+ break;
case MMC_PLL_SEL_USBPHY_480M:
default:
return -EINVAL;
div = (con & MMC_CLK_DIV_MASK) >> MMC_CLK_DIV_SHIFT;
rate = DIV_TO_RATE(pll_rate, div);
+ debug("%s: raw rate %d (post-divide by 2)\n", __func__, rate);
return rate >> 1;
}
-static ulong rk3368_mmc_set_clk(struct rk3368_cru *cru,
- ulong clk_id, ulong rate)
+static ulong rk3368_mmc_find_best_rate_and_parent(struct clk *clk,
+ ulong rate,
+ u32 *best_mux,
+ u32 *best_div)
+{
+ int i;
+ ulong best_rate = 0;
+ const ulong MHz = 1000000;
+ const struct {
+ u32 mux;
+ ulong rate;
+ } parents[] = {
+ { .mux = MMC_PLL_SEL_CPLL, .rate = CPLL_HZ },
+ { .mux = MMC_PLL_SEL_GPLL, .rate = GPLL_HZ },
+ { .mux = MMC_PLL_SEL_24M, .rate = 24 * MHz }
+ };
+
+ debug("%s: target rate %ld\n", __func__, rate);
+ for (i = 0; i < ARRAY_SIZE(parents); ++i) {
+ /*
+ * Find the largest rate no larger than the target-rate for
+ * the current parent.
+ */
+ ulong parent_rate = parents[i].rate;
+ u32 div = DIV_ROUND_UP(parent_rate, rate);
+ u32 adj_div = div;
+ ulong new_rate = parent_rate / adj_div;
+
+ debug("%s: rate %ld, parent-mux %d, parent-rate %ld, div %d\n",
+ __func__, rate, parents[i].mux, parents[i].rate, div);
+
+ /* Skip, if not representable */
+ if ((div - 1) > MMC_CLK_DIV_MASK)
+ continue;
+
+ /* Skip, if we already have a better (or equal) solution */
+ if (new_rate <= best_rate)
+ continue;
+
+ /* This is our new best rate. */
+ best_rate = new_rate;
+ *best_mux = parents[i].mux;
+ *best_div = div - 1;
+ }
+
+ debug("%s: best_mux = %x, best_div = %d, best_rate = %ld\n",
+ __func__, *best_mux, *best_div, best_rate);
+
+ return best_rate;
+}
+
+static ulong rk3368_mmc_set_clk(struct clk *clk, ulong rate)
{
- u32 div;
- u32 con_id;
- u32 gpll_rate = rkclk_pll_get_rate(cru, GPLL);
+ struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+ struct rk3368_cru *cru = priv->cru;
+ ulong clk_id = clk->id;
+ u32 con_id, mux = 0, div = 0;
- div = RATE_TO_DIV(gpll_rate, rate << 1);
+ /* Find the best parent and rate */
+ rk3368_mmc_find_best_rate_and_parent(clk, rate << 1, &mux, &div);
switch (clk_id) {
- case SCLK_SDMMC:
+ case HCLK_SDMMC:
con_id = 50;
break;
- case SCLK_EMMC:
+ case HCLK_EMMC:
con_id = 51;
break;
case SCLK_SDIO0:
return -EINVAL;
}
- if (div > 0x3f) {
- div = RATE_TO_DIV(OSC_HZ, rate);
- rk_clrsetreg(&cru->clksel_con[con_id],
- MMC_PLL_SEL_MASK | MMC_CLK_DIV_MASK,
- (MMC_PLL_SEL_24M << MMC_PLL_SEL_SHIFT) |
- (div << MMC_CLK_DIV_SHIFT));
- } else {
- rk_clrsetreg(&cru->clksel_con[con_id],
- MMC_PLL_SEL_MASK | MMC_CLK_DIV_MASK,
- (MMC_PLL_SEL_GPLL << MMC_PLL_SEL_SHIFT) |
- div << MMC_CLK_DIV_SHIFT);
- }
+ rk_clrsetreg(&cru->clksel_con[con_id],
+ MMC_PLL_SEL_MASK | MMC_CLK_DIV_MASK,
+ mux | div);
return rk3368_mmc_get_clk(cru, clk_id);
}
+#endif
+
+#if IS_ENABLED(CONFIG_TPL_BUILD)
+static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
+{
+ const struct pll_div *dpll_cfg = NULL;
+ const ulong MHz = 1000000;
+
+ /* Fout = ((Fin /NR) * NF )/ NO */
+ static const struct pll_div dpll_1200 = PLL_DIVISORS(1200 * MHz, 1, 1);
+ static const struct pll_div dpll_1332 = PLL_DIVISORS(1332 * MHz, 2, 1);
+ static const struct pll_div dpll_1600 = PLL_DIVISORS(1600 * MHz, 3, 2);
+
+ switch (set_rate) {
+ case 1200*MHz:
+ dpll_cfg = &dpll_1200;
+ break;
+ case 1332*MHz:
+ dpll_cfg = &dpll_1332;
+ break;
+ case 1600*MHz:
+ dpll_cfg = &dpll_1600;
+ break;
+ default:
+ error("Unsupported SDRAM frequency!,%ld\n", set_rate);
+ }
+ rkclk_set_pll(cru, DPLL, dpll_cfg);
+
+ return set_rate;
+}
+#endif
+
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru,
+ ulong clk_id, ulong set_rate)
+{
+ /*
+ * This models the 'assigned-clock-parents = <&ext_gmac>' from
+ * the DTS and switches to the 'ext_gmac' clock parent.
+ */
+ rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
+ return set_rate;
+}
+#endif
+
+/*
+ * RK3368 SPI clocks have a common divider-width (7 bits) and a single bit
+ * to select either CPLL or GPLL as the clock-parent. The location within
+ * the enclosing CLKSEL_CON (i.e. div_shift and sel_shift) are variable.
+ */
+
+struct spi_clkreg {
+ uint8_t reg; /* CLKSEL_CON[reg] register in CRU */
+ uint8_t div_shift;
+ uint8_t sel_shift;
+};
+
+/*
+ * The entries are numbered relative to their offset from SCLK_SPI0.
+ */
+static const struct spi_clkreg spi_clkregs[] = {
+ [0] = { .reg = 45, .div_shift = 0, .sel_shift = 7, },
+ [1] = { .reg = 45, .div_shift = 8, .sel_shift = 15, },
+ [2] = { .reg = 46, .div_shift = 8, .sel_shift = 15, },
+};
+
+static inline u32 extract_bits(u32 val, unsigned width, unsigned shift)
+{
+ return (val >> shift) & ((1 << width) - 1);
+}
+
+static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id)
+{
+ const struct spi_clkreg *spiclk = NULL;
+ u32 div, val;
+
+ switch (clk_id) {
+ case SCLK_SPI0 ... SCLK_SPI2:
+ spiclk = &spi_clkregs[clk_id - SCLK_SPI0];
+ break;
+
+ default:
+ error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+ return -EINVAL;
+ }
+
+ val = readl(&cru->clksel_con[spiclk->reg]);
+ div = extract_bits(val, 7, spiclk->div_shift);
+
+ debug("%s: div 0x%x\n", __func__, div);
+ return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)
+{
+ const struct spi_clkreg *spiclk = NULL;
+ int src_clk_div;
+
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
+ assert(src_clk_div < 127);
+
+ switch (clk_id) {
+ case SCLK_SPI0 ... SCLK_SPI2:
+ spiclk = &spi_clkregs[clk_id - SCLK_SPI0];
+ break;
+
+ default:
+ error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+ return -EINVAL;
+ }
+
+ rk_clrsetreg(&cru->clksel_con[spiclk->reg],
+ ((0x7f << spiclk->div_shift) |
+ (0x1 << spiclk->sel_shift)),
+ ((src_clk_div << spiclk->div_shift) |
+ (1 << spiclk->sel_shift)));
+
+ return rk3368_spi_get_clk(cru, clk_id);
+}
static ulong rk3368_clk_get_rate(struct clk *clk)
{
struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
ulong rate = 0;
- debug("%s id:%ld\n", __func__, clk->id);
+ debug("%s: id %ld\n", __func__, clk->id);
switch (clk->id) {
+ case PLL_CPLL:
+ rate = rkclk_pll_get_rate(priv->cru, CPLL);
+ break;
+ case PLL_GPLL:
+ rate = rkclk_pll_get_rate(priv->cru, GPLL);
+ break;
+ case SCLK_SPI0 ... SCLK_SPI2:
+ rate = rk3368_spi_get_clk(priv->cru, clk->id);
+ break;
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
case HCLK_SDMMC:
case HCLK_EMMC:
rate = rk3368_mmc_get_clk(priv->cru, clk->id);
break;
+#endif
default:
return -ENOENT;
}
static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
{
- struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+ __maybe_unused struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
ulong ret = 0;
debug("%s id:%ld rate:%ld\n", __func__, clk->id, rate);
switch (clk->id) {
- case SCLK_SDMMC:
- case SCLK_EMMC:
- ret = rk3368_mmc_set_clk(priv->cru, clk->id, rate);
+ case SCLK_SPI0 ... SCLK_SPI2:
+ ret = rk3368_spi_set_clk(priv->cru, clk->id, rate);
break;
+#if IS_ENABLED(CONFIG_TPL_BUILD)
+ case CLK_DDR:
+ ret = rk3368_ddr_set_clk(priv->cru, rate);
+ break;
+#endif
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
+ case HCLK_SDMMC:
+ case HCLK_EMMC:
+ ret = rk3368_mmc_set_clk(clk, rate);
+ break;
+#endif
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+ case SCLK_MAC:
+ /* select the external clock */
+ ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
+ break;
+#endif
default:
return -ENOENT;
}
static int rk3368_clk_probe(struct udevice *dev)
{
- struct rk3368_clk_priv *priv = dev_get_priv(dev);
+ struct rk3368_clk_priv __maybe_unused *priv = dev_get_priv(dev);
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct rk3368_clk_plat *plat = dev_get_platdata(dev);
+ priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+#endif
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
rkclk_init(priv->cru);
+#endif
return 0;
}
static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3368_clk_priv *priv = dev_get_priv(dev);
priv->cru = (struct rk3368_cru *)devfdt_get_addr(dev);
+#endif
return 0;
}
.id = UCLASS_CLK,
.of_match = rk3368_clk_ids,
.priv_auto_alloc_size = sizeof(struct rk3368_clk_priv),
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ .platdata_auto_alloc_size = sizeof(struct rk3368_clk_plat),
+#endif
.ofdata_to_platdata = rk3368_clk_ofdata_to_platdata,
.ops = &rk3368_clk_ops,
.bind = rk3368_clk_bind,
const struct spi_clkreg *spiclk = NULL;
int src_clk_div;
- src_clk_div = RATE_TO_DIV(GPLL_HZ, hz);
- assert(src_clk_div < 127);
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+ assert(src_clk_div < 128);
switch (clk_id) {
case SCLK_SPI1 ... SCLK_SPI5:
case HCLK_SDMMC:
case SCLK_SDMMC:
con = readl(&cru->clksel_con[16]);
+ /* dwmmc controller have internal div 2 */
+ div = 2;
break;
case SCLK_EMMC:
con = readl(&cru->clksel_con[21]);
+ div = 1;
break;
default:
return -EINVAL;
}
- div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT;
+ div *= (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT;
if ((con & CLK_EMMC_PLL_MASK) >> CLK_EMMC_PLL_SHIFT
== CLK_EMMC_PLL_SEL_24M)
- return DIV_TO_RATE(24*1000*1000, div);
+ return DIV_TO_RATE(OSC_HZ, div);
else
return DIV_TO_RATE(GPLL_HZ, div);
}
case HCLK_SDMMC:
case SCLK_SDMMC:
/* Select clk_sdmmc source from GPLL by default */
- src_clk_div = GPLL_HZ / set_rate;
+ /* mmc clock defaulg div 2 internal, provide double in cru */
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
- if (src_clk_div > 127) {
+ if (src_clk_div > 128) {
/* use 24MHz source for 400KHz clock */
- src_clk_div = 24*1000*1000 / set_rate;
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+ assert(src_clk_div - 1 < 128);
rk_clrsetreg(&cru->clksel_con[16],
CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT |
break;
case SCLK_EMMC:
/* Select aclk_emmc source from GPLL */
- src_clk_div = GPLL_HZ / aclk_emmc;
- assert(src_clk_div - 1 < 31);
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ , aclk_emmc);
+ assert(src_clk_div - 1 < 32);
rk_clrsetreg(&cru->clksel_con[21],
ACLK_EMMC_PLL_SEL_MASK | ACLK_EMMC_DIV_CON_MASK,
(src_clk_div - 1) << ACLK_EMMC_DIV_CON_SHIFT);
/* Select clk_emmc source from GPLL too */
- src_clk_div = GPLL_HZ / set_rate;
- assert(src_clk_div - 1 < 127);
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, set_rate);
+ assert(src_clk_div - 1 < 128);
rk_clrsetreg(&cru->clksel_con[22],
CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
OUTPUT_MIN_HZ = 24 * 1000000,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
config SPL_REGMAP
bool "Support register maps in SPL"
- depends on DM
+ depends on SPL_DM
+ help
+ Hardware peripherals tend to have one or more sets of registers
+ which can be accessed to control the hardware. A register map
+ models this with a simple read/write interface. It can in principle
+ support any bus type (I2C, SPI) but so far this only supports
+ direct memory access.
+
+config TPL_REGMAP
+ bool "Support register maps in TPL"
+ depends on TPL_DM
help
Hardware peripherals tend to have one or more sets of registers
which can be accessed to control the hardware. A register map
config SPL_SYSCON
bool "Support system controllers in SPL"
- depends on REGMAP
+ depends on SPL_REGMAP
+ help
+ Many SoCs have a number of system controllers which are dealt with
+ as a group by a single driver. Some common functionality is provided
+ by this uclass, including accessing registers via regmap and
+ assigning a unique number to each.
+
+config TPL_SYSCON
+ bool "Support system controllers in TPL"
+ depends on TPL_REGMAP
help
Many SoCs have a number of system controllers which are dealt with
as a group by a single driver. Some common functionality is provided
obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o
obj-$(CONFIG_$(SPL_)SIMPLE_BUS) += simple-bus.o
obj-$(CONFIG_DM) += dump.o
-obj-$(CONFIG_$(SPL_)REGMAP) += regmap.o
-obj-$(CONFIG_$(SPL_)SYSCON) += syscon-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)REGMAP) += regmap.o
+obj-$(CONFIG_$(SPL_TPL_)SYSCON) += syscon-uclass.o
obj-$(CONFIG_OF_LIVE) += of_access.o of_addr.o
ifndef CONFIG_DM_DEV_READ_INLINE
obj-$(CONFIG_OF_CONTROL) += read.o
U_BOOT_DRIVER(generic_syscon) = {
.name = "syscon",
.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ .bind = dm_scan_fdt_dev,
+#endif
.of_match = generic_syscon_ids,
};
#define CTLR_INTLV_MASK 0x20000000
/* Perform build-in test on memory. Three-way interleaving is not yet
* supported by this code. */
- if (getenv_f("ddr_bist", buffer, CONFIG_SYS_CBSIZE) >= 0) {
+ if (env_get_f("ddr_bist", buffer, CONFIG_SYS_CBSIZE) >= 0) {
puts("Running BIST test. This will take a while...");
cs0_config = ddr_in32(&ddr->cs0_config);
cs0_bnds = ddr_in32(&ddr->cs0_bnds);
{
char buffer[CONFIG_SYS_CBSIZE];
- if (getenv_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
+ if (env_get_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
return 1;
return 0;
};
if (var_is_set) {
- if (getenv_f("ddr_interactive", buffer2, CONFIG_SYS_CBSIZE) > 0) {
+ if (env_get_f("ddr_interactive", buffer2,
+ CONFIG_SYS_CBSIZE) > 0)
p = buffer2;
- } else {
+ else
var_is_set = 0;
- }
}
/*
* Use our own stack based buffer before relocation to allow accessing longer
* hwconfig strings that might be in the environment before we've relocated.
* This is pretty fragile on both the use of stack and if the buffer is big
- * enough. However we will get a warning from getenv_f for the later.
+ * enough. However we will get a warning from env_get_f() for the latter.
*/
/* Board-specific functions defined in each board's ddr.c */
* Extract hwconfig from environment since we have not properly setup
* the environment but need it for ddr config params
*/
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
#if defined(CONFIG_SYS_FSL_DDR3) || \
* Extract hwconfig from environment since we have not properly setup
* the environment but need it for ddr config params
*/
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
/* if hwconfig is not enabled, or "sdram" is not defined, use spd */
u32 if_id = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- mem_addr = mem_addr;
-
#ifndef EXCLUDE_SWITCH_DEBUG
if ((is_validate_window_per_if != 0) ||
(is_validate_window_per_pup != 0)) {
u32 tmp_val = 0, if_id = 0, pup_id = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- dev_num = dev_num;
*ptr = NULL;
switch (flag_id) {
u32 i, j;
struct hws_topology_map *tm = ddr3_get_topology_map();
- dev_num = dev_num;
-
for (j = 0; j < tm->num_of_bus_per_interface; j++) {
VALIDATE_ACTIVE(tm->bus_act_mask, j);
for (i = 0; i < MAX_INTERFACE_NUM; i++) {
u32 reg_addr = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- mem_addr = mem_addr;
-
if (test_type == 0) {
reg_addr = 1;
ui_mask_bit = 0x3f;
u32 max_cs = hws_ddr3_tip_max_cs_get();
struct hws_topology_map *tm = ddr3_get_topology_map();
- repeat_num = repeat_num;
-
if (mode == 1) {
/* per pup */
start_pup = 0;
u32 if_id = 0, bus_id = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- dev_num = dev_num;
-
printf("Centralization Results\n");
printf("I/F0 Result[0 - success 1-fail 2 - state_2 3 - state_3] ...\n");
for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) {
#ifdef CONFIG_SET_DFU_ALT_INFO
set_dfu_alt_info(interface, devstr);
#endif
- str_env = getenv("dfu_alt_info");
+ str_env = env_get("dfu_alt_info");
if (!str_env) {
error("\"dfu_alt_info\" env variable not defined!\n");
return -EINVAL;
if (dfu_buf != NULL)
return dfu_buf;
- s = getenv("dfu_bufsiz");
+ s = env_get("dfu_bufsiz");
if (s)
dfu_buf_size = (unsigned long)simple_strtol(s, NULL, 0);
{
char *s;
- s = getenv("dfu_hash_algo");
+ s = env_get("dfu_hash_algo");
if (!s)
return NULL;
}
if (op != DFU_OP_WRITE) {
- str_env = getenv("filesize");
+ str_env = env_get("filesize");
if (str_env == NULL) {
puts("dfu: Wrong file size!\n");
return -1;
Support GPIO controllers on the TI OMAP3/4/5 and related (such as
AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs.
+config CMD_PCA953X
+ bool "Enable the pca953x command"
+ help
+ Deprecated: This should be converted to driver model.
+
+ This command provides access to a pca953x GPIO device using the
+ legacy GPIO interface. Several subcommands are provided which mirror
+ the standard 'gpio' command. It should use that instead.
+
config PM8916_GPIO
bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
depends on DM_GPIO && PMIC_PM8916
of 'anonymous' GPIOs that do not belong to any device or bank.
Select a suitable value depending on your needs.
+config CMD_TCA642X
+ bool "tca642x - Command to access tca642x state"
+ help
+ DEPRECATED - This needs conversion to driver model
+
+ This provides a way to looking at the pin state of this device.
+ This mirrors the 'gpio' command and that should be used in preference
+ to custom code.
+
config TEGRA_GPIO
bool "Tegra20..210 GPIO driver"
depends on DM_GPIO
obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o
obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
obj-$(CONFIG_TCA642X) += tca642x.o
-oby-$(CONFIG_SX151X) += sx151x.o
obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o
obj-$(CONFIG_STM32_GPIO) += stm32_gpio.o
}
#ifdef CONFIG_CMD_PCA953X
-#ifdef CONFIG_CMD_PCA953X_INFO
/*
* Display pca953x information
*/
return 0;
}
-#endif /* CONFIG_CMD_PCA953X_INFO */
cmd_tbl_t cmd_pca953x[] = {
U_BOOT_CMD_MKENT(device, 3, 0, (void *)PCA953X_CMD_DEVICE, "", ""),
U_BOOT_CMD_MKENT(output, 4, 0, (void *)PCA953X_CMD_OUTPUT, "", ""),
U_BOOT_CMD_MKENT(input, 3, 0, (void *)PCA953X_CMD_INPUT, "", ""),
U_BOOT_CMD_MKENT(invert, 4, 0, (void *)PCA953X_CMD_INVERT, "", ""),
-#ifdef CONFIG_CMD_PCA953X_INFO
U_BOOT_CMD_MKENT(info, 2, 0, (void *)PCA953X_CMD_INFO, "", ""),
-#endif
};
int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ul_arg3 = simple_strtoul(argv[3], NULL, 16) & 0x1;
switch ((long)c->cmd) {
-#ifdef CONFIG_CMD_PCA953X_INFO
case PCA953X_CMD_INFO:
ret = pca953x_info(chip);
if (ret)
ret = CMD_RET_FAILURE;
break;
-#endif
case PCA953X_CMD_DEVICE:
if (argc == 3)
"pca953x gpio access",
"device [dev]\n"
" - show or set current device address\n"
-#ifdef CONFIG_CMD_PCA953X_INFO
"pca953x info\n"
" - display info for current chip\n"
-#endif
"pca953x output pin 0|1\n"
" - set pin as output and drive low or high\n"
"pca953x invert pin 0|1\n"
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
static const unsigned long io_base[] = {
STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
out:
return rv;
}
-#elif defined(CONFIG_STM32F1)
-static const unsigned long io_base[] = {
- STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
- STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
- STM32_GPIOG_BASE
-};
-
-#define STM32_GPIO_CR_MODE_MASK 0x3
-#define STM32_GPIO_CR_MODE_SHIFT(p) (p * 4)
-#define STM32_GPIO_CR_CNF_MASK 0x3
-#define STM32_GPIO_CR_CNF_SHIFT(p) (p * 4 + 2)
-
-struct stm32_gpio_regs {
- u32 crl; /* GPIO port configuration low */
- u32 crh; /* GPIO port configuration high */
- u32 idr; /* GPIO port input data */
- u32 odr; /* GPIO port output data */
- u32 bsrr; /* GPIO port bit set/reset */
- u32 brr; /* GPIO port bit reset */
- u32 lckr; /* GPIO port configuration lock */
-};
-
-#define CHECK_DSC(x) (!x || x->port > 6 || x->pin > 15)
-#define CHECK_CTL(x) (!x || x->mode > 3 || x->icnf > 3 || x->ocnf > 3 || \
- x->pupd > 1)
-
-int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,
- const struct stm32_gpio_ctl *ctl)
-{
- struct stm32_gpio_regs *gpio_regs;
- u32 *cr;
- int p, crp;
- int rv;
-
- if (CHECK_DSC(dsc)) {
- rv = -EINVAL;
- goto out;
- }
- if (CHECK_CTL(ctl)) {
- rv = -EINVAL;
- goto out;
- }
-
- p = dsc->pin;
-
- gpio_regs = (struct stm32_gpio_regs *)io_base[dsc->port];
-
- if (p < 8) {
- cr = &gpio_regs->crl;
- crp = p;
- } else {
- cr = &gpio_regs->crh;
- crp = p - 8;
- }
-
- clrbits_le32(cr, 0x3 << STM32_GPIO_CR_MODE_SHIFT(crp));
- setbits_le32(cr, ctl->mode << STM32_GPIO_CR_MODE_SHIFT(crp));
-
- clrbits_le32(cr, 0x3 << STM32_GPIO_CR_CNF_SHIFT(crp));
- /* Inputs set the optional pull up / pull down */
- if (ctl->mode == STM32_GPIO_MODE_IN) {
- setbits_le32(cr, ctl->icnf << STM32_GPIO_CR_CNF_SHIFT(crp));
- clrbits_le32(&gpio_regs->odr, 0x1 << p);
- setbits_le32(&gpio_regs->odr, ctl->pupd << p);
- } else {
- setbits_le32(cr, ctl->ocnf << STM32_GPIO_CR_CNF_SHIFT(crp));
- }
-
- rv = 0;
-out:
- return rv;
-}
-#else
-#error STM32 family not supported
-#endif
int stm32_gpout_set(const struct stm32_gpio_dsc *dsc, int state)
{
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_IN;
ctl.otype = STM32_GPIO_OTYPE_PP;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
-#elif defined(CONFIG_STM32F1)
- ctl.mode = STM32_GPIO_MODE_IN;
- ctl.icnf = STM32_GPIO_ICNF_IN_FLT;
- ctl.ocnf = STM32_GPIO_OCNF_GP_PP; /* ignored for input */
- ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for floating */
-#else
-#error STM32 family not supported
-#endif
return stm32_gpio_config(&dsc, &ctl);
}
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_OUT;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
-#elif defined(CONFIG_STM32F1)
- ctl.mode = STM32_GPIO_MODE_OUT_50M;
- ctl.ocnf = STM32_GPIO_OCNF_GP_PP;
- ctl.icnf = STM32_GPIO_ICNF_IN_FLT; /* ignored for output */
- ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for output */
-#else
-#error STM32 family not supported
-#endif
res = stm32_gpio_config(&dsc, &ctl);
if (res < 0)
+++ /dev/null
-/*
- * (C) Copyright 2013
- * Viktar Palstsiuk, Promwad, viktar.palstsiuk@promwad.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * Driver for Semtech SX151x SPI GPIO Expanders
- */
-
-#include <common.h>
-#include <spi.h>
-#include <sx151x.h>
-
-#ifndef CONFIG_SX151X_SPI_BUS
-#define CONFIG_SX151X_SPI_BUS 0
-#endif
-
-/*
- * The SX151x registers
- */
-
-#ifdef CONFIG_SX151X_GPIO_COUNT_8
-/* 8bit: SX1511 */
-#define SX151X_REG_DIR 0x07
-#define SX151X_REG_DATA 0x08
-#else
-/* 16bit: SX1512 */
-#define SX151X_REG_DIR 0x0F
-#define SX151X_REG_DATA 0x11
-#endif
-#define SX151X_REG_RESET 0x7D
-
-static int sx151x_spi_write(int chip, unsigned char reg, unsigned char val)
-{
- struct spi_slave *slave;
- unsigned char buf[2];
- int ret;
-
- slave = spi_setup_slave(CONFIG_SX151X_SPI_BUS, chip, 1000000,
- SPI_MODE_0);
- if (!slave)
- return 0;
-
- spi_claim_bus(slave);
-
- buf[0] = reg;
- buf[1] = val;
-
- ret = spi_xfer(slave, 16, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
- if (ret < 0)
- printf("spi%d.%d write fail: can't write %02x to %02x: %d\n",
- CONFIG_SX151X_SPI_BUS, chip, val, reg, ret);
- else
- printf("spi%d.%d write 0x%02x to register 0x%02x\n",
- CONFIG_SX151X_SPI_BUS, chip, val, reg);
- spi_release_bus(slave);
- spi_free_slave(slave);
-
- return ret;
-}
-
-static int sx151x_spi_read(int chip, unsigned char reg)
-{
- struct spi_slave *slave;
- int ret;
-
- slave = spi_setup_slave(CONFIG_SX151X_SPI_BUS, chip, 1000000,
- SPI_MODE_0);
- if (!slave)
- return 0;
-
- spi_claim_bus(slave);
-
- ret = spi_w8r8(slave, reg | 0x80);
- if (ret < 0)
- printf("spi%d.%d read fail: can't read %02x: %d\n",
- CONFIG_SX151X_SPI_BUS, chip, reg, ret);
- else
- printf("spi%d.%d read register 0x%02x: 0x%02x\n",
- CONFIG_SX151X_SPI_BUS, chip, reg, ret);
-
- spi_release_bus(slave);
- spi_free_slave(slave);
-
- return ret;
-}
-
-static inline void sx151x_find_cfg(int gpio, unsigned char *reg, unsigned char *mask)
-{
- *reg -= gpio / 8;
- *mask = 1 << (gpio % 8);
-}
-
-static int sx151x_write_cfg(int chip, unsigned char gpio, unsigned char reg, int val)
-{
- unsigned char mask;
- unsigned char data;
- int ret;
-
- sx151x_find_cfg(gpio, ®, &mask);
- ret = sx151x_spi_read(chip, reg);
- if (ret < 0)
- return ret;
- else
- data = ret;
- data &= ~mask;
- data |= (val << (gpio % 8)) & mask;
- return sx151x_spi_write(chip, reg, data);
-}
-
-int sx151x_get_value(int chip, int gpio)
-{
- unsigned char reg = SX151X_REG_DATA;
- unsigned char mask;
- int ret;
-
- sx151x_find_cfg(gpio, ®, &mask);
- ret = sx151x_spi_read(chip, reg);
- if (ret >= 0)
- ret = (ret & mask) != 0 ? 1 : 0;
-
- return ret;
-}
-
-int sx151x_set_value(int chip, int gpio, int val)
-{
- return sx151x_write_cfg(chip, gpio, SX151X_REG_DATA, (val ? 1 : 0));
-}
-
-int sx151x_direction_input(int chip, int gpio)
-{
- return sx151x_write_cfg(chip, gpio, SX151X_REG_DIR, 1);
-}
-
-int sx151x_direction_output(int chip, int gpio)
-{
- return sx151x_write_cfg(chip, gpio, SX151X_REG_DIR, 0);
-}
-
-int sx151x_reset(int chip)
-{
- int err;
-
- err = sx151x_spi_write(chip, SX151X_REG_RESET, 0x12);
- if (err < 0)
- return err;
-
- err = sx151x_spi_write(chip, SX151X_REG_RESET, 0x34);
- return err;
-}
-
-#ifdef CONFIG_CMD_SX151X
-
-int do_sx151x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int ret = CMD_RET_USAGE, chip = 0, gpio = 0, val = 0;
-
- if (argc < 3)
- return CMD_RET_USAGE;
-
- /* arg2 used as chip number */
- chip = simple_strtoul(argv[2], NULL, 10);
-
- if (strcmp(argv[1], "reset") == 0) {
- ret = sx151x_reset(chip);
- if (!ret) {
- printf("Device at spi%d.%d was reset\n",
- CONFIG_SX151X_SPI_BUS, chip);
- }
- return ret;
- }
-
- if (argc < 4)
- return CMD_RET_USAGE;
-
- /* arg3 used as gpio number */
- gpio = simple_strtoul(argv[3], NULL, 10);
-
- if (strcmp(argv[1], "get") == 0) {
- ret = sx151x_get_value(chip, gpio);
- if (ret < 0)
- printf("Failed to get value at spi%d.%d gpio %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio);
- else {
- printf("Value at spi%d.%d gpio %d is %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio, ret);
- ret = 0;
- }
- return ret;
- }
-
- if (argc < 5)
- return CMD_RET_USAGE;
-
- /* arg4 used as value or direction */
- val = simple_strtoul(argv[4], NULL, 10);
-
- if (strcmp(argv[1], "set") == 0) {
- ret = sx151x_set_value(chip, gpio, val);
- if (ret < 0)
- printf("Failed to set value at spi%d.%d gpio %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio);
- else
- printf("New value at spi%d.%d gpio %d is %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio, val);
- return ret;
- } else if (strcmp(argv[1], "dir") == 0) {
- if (val == 0)
- ret = sx151x_direction_output(chip, gpio);
- else
- ret = sx151x_direction_input(chip, gpio);
-
- if (ret < 0)
- printf("Failed to set direction of spi%d.%d gpio %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio);
- else
- printf("New direction of spi%d.%d gpio %d is %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio, val);
- return ret;
- }
-
- printf("Please see usage\n");
-
- return ret;
-}
-
-U_BOOT_CMD(
- sx151x, 5, 1, do_sx151x,
- "sx151x gpio access",
- "dir chip gpio 0|1\n"
- " - set gpio direction (0 for output, 1 for input)\n"
- "sx151x get chip gpio\n"
- " - get gpio value\n"
- "sx151x set chip gpio 0|1\n"
- " - set gpio value\n"
- "sx151x reset chip\n"
- " - reset chip"
-);
-
-#endif /* CONFIG_CMD_SX151X */
/* Init keyboard device (default US layout) */
keymap = KBD_US;
- penv = getenv("keymap");
+ penv = env_get("keymap");
if (penv != NULL) {
if (strncmp(penv, "de", 3) == 0)
keymap = KBD_GER;
error = stdio_register(dev);
/* check if this is the standard input device */
- if (!error && strcmp(getenv("stdin"), dev->name) == 0) {
+ if (!error && strcmp(env_get("stdin"), dev->name) == 0) {
/* reassign the console */
if (OVERWRITE_CONSOLE ||
console_assign(stdin, dev->name))
appear as block devices in U-Boot and can support filesystems such
as EXT4 and FAT.
-config DM_MMC_OPS
- bool "Support MMC controller operations using Driver Model"
- depends on DM_MMC
- default y if DM_MMC
- help
- Driver model provides a means of supporting device operations. This
- option moves MMC operations under the control of driver model. The
- option will be removed as soon as all DM_MMC drivers use it, as it
- will the only supported behaviour.
-
config SPL_DM_MMC
bool "Enable MMC controllers using Driver Model in SPL"
depends on SPL_DM && DM_MMC
appear as block devices in U-Boot and can support filesystems such
as EXT4 and FAT.
-config SPL_DM_MMC_OPS
- bool "Support MMC controller operations using Driver Model in SPL"
- depends on SPL_DM && DM_MMC_OPS
- default y
- help
- Driver model provides a means of supporting device operations. This
- option moves MMC operations under the control of driver model. The
- option will be removed as soon as all DM_MMC drivers use it, as it
- will the only supported behaviour.
-
if MMC
config SPL_MMC_TINY
config MMC_MESON_GX
bool "Meson GX EMMC controller support"
- depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_MESON
+ depends on DM_MMC && BLK && ARCH_MESON
help
Support for EMMC host controller on Meson GX ARM SoCs platform (S905)
config MMC_OMAP_HS
bool "TI OMAP High Speed Multimedia Card Interface support"
- select DM_MMC_OPS if DM_MMC
+ select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR
help
This selects the TI OMAP High Speed Multimedia card Interface.
If you have an omap2plus board with a Multimedia Card slot,
config MMC_UNIPHIER
bool "UniPhier SD/MMC Host Controller support"
depends on ARCH_UNIPHIER
- depends on BLK && DM_MMC_OPS
+ depends on BLK && DM_MMC
depends on OF_CONTROL
help
This selects support for the SD/MMC Host Controller on UniPhier SoCs.
config MMC_SANDBOX
bool "Sandbox MMC support"
depends on SANDBOX
- depends on BLK && DM_MMC_OPS && OF_CONTROL
+ depends on BLK && DM_MMC && OF_CONTROL
help
This select a dummy sandbox MMC driver. At present this does nothing
other than allow sandbox to be build with MMC support. This
config MMC_SDHCI_ATMEL
bool "Atmel SDHCI controller support"
depends on ARCH_AT91
- depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91
+ depends on DM_MMC && BLK && ARCH_AT91
depends on MMC_SDHCI
help
This enables support for the Atmel SDHCI controller, which supports
config MMC_SDHCI_CADENCE
bool "SDHCI support for the Cadence SD/SDIO/eMMC controller"
- depends on BLK && DM_MMC_OPS
+ depends on BLK && DM_MMC
depends on MMC_SDHCI
depends on OF_CONTROL
help
config MMC_SDHCI_MSM
bool "Qualcomm SDHCI controller"
- depends on BLK && DM_MMC_OPS
+ depends on BLK && DM_MMC
depends on MMC_SDHCI
help
Enables support for SDHCI 2.0 controller present on some Qualcomm
config MMC_SDHCI_ROCKCHIP
bool "Arasan SDHCI controller for Rockchip support"
depends on ARCH_ROCKCHIP
- depends on DM_MMC && BLK && DM_MMC_OPS
+ depends on DM_MMC && BLK
depends on MMC_SDHCI
help
Support for Arasan SDHCI host controller on Rockchip ARM SoCs platform
config MMC_SDHCI_ZYNQ
bool "Arasan SDHCI controller support"
depends on ARCH_ZYNQ || ARCH_ZYNQMP
- depends on DM_MMC && OF_CONTROL && BLK && DM_MMC_OPS
+ depends on DM_MMC && OF_CONTROL && BLK
depends on MMC_SDHCI
help
Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
config GENERIC_ATMEL_MCI
bool "Atmel Multimedia Card Interface support"
- depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91
+ depends on DM_MMC && BLK && ARCH_AT91
help
This enables support for Atmel High Speed Multimedia Card Interface
(HSMCI), which supports the MultiMedia Card (MMC) Specification V4.3,
return mode;
}
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
return 0;
}
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
static int dwmci_set_ios(struct udevice *dev)
{
struct mmc *mmc = mmc_get_mmc_dev(dev);
return 0;
}
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
int dwmci_probe(struct udevice *dev)
{
struct mmc *mmc = mmc_get_mmc_dev(dev);
u32 max_clk, u32 min_clk)
{
cfg->name = host->name;
-#ifndef CONFIG_DM_MMC_OPS
+#ifndef CONFIG_DM_MMC
cfg->ops = &dwmci_ops;
#endif
cfg->f_min = min_clk;
uint scr; /* eSDHC control register */
};
+struct fsl_esdhc_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
/**
* struct fsl_esdhc_priv
*
struct fsl_esdhc *esdhc_regs;
unsigned int sdhc_clk;
unsigned int bus_width;
- struct mmc_config cfg;
+#if !CONFIG_IS_ENABLED(BLK)
struct mmc *mmc;
+#endif
struct udevice *dev;
int non_removable;
int wp_enable;
/*
* PIO Read/Write Mode reduce the performace as DMA is not used in this mode.
*/
-static void
-esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
+static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv,
+ struct mmc_data *data)
{
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
uint blocks;
char *buffer;
}
#endif
-static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
+static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
+ struct mmc_data *data)
{
int timeout;
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
dma_addr_t addr;
* Sends a command out on the bus. Takes the mmc pointer,
* a command pointer, and an optional data pointer.
*/
-static int
-esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
+static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
+ struct mmc_cmd *cmd, struct mmc_data *data)
{
int err = 0;
uint xfertyp;
uint irqstat;
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111
/* Set up for a data transfer if we have one */
if (data) {
- err = esdhc_setup_data(mmc, data);
+ err = esdhc_setup_data(priv, mmc, data);
if(err)
return err;
/* Wait until all of the blocks are transferred */
if (data) {
#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
- esdhc_pio_read_write(mmc, data);
+ esdhc_pio_read_write(priv, data);
#else
do {
irqstat = esdhc_read32(®s->irqstat);
return err;
}
-static void set_sysctl(struct mmc *mmc, uint clock)
+static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
{
int div = 1;
#ifdef ARCH_MXC
int pre_div = 2;
#endif
int ddr_pre_div = mmc->ddr_mode ? 2 : 1;
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
int sdhc_clk = priv->sdhc_clk;
uint clk;
}
#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
-static void esdhc_clock_control(struct mmc *mmc, bool enable)
+static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
{
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
u32 value;
u32 time_out;
}
#endif
-static int esdhc_set_ios(struct mmc *mmc)
+static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
{
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
/* Select to use peripheral clock */
- esdhc_clock_control(mmc, false);
+ esdhc_clock_control(priv, false);
esdhc_setbits32(®s->scr, ESDHCCTL_PCS);
- esdhc_clock_control(mmc, true);
+ esdhc_clock_control(priv, true);
#endif
/* Set the clock speed */
- set_sysctl(mmc, mmc->clock);
+ set_sysctl(priv, mmc, mmc->clock);
/* Set the bus width */
esdhc_clrbits32(®s->proctl, PROCTL_DTW_4 | PROCTL_DTW_8);
return 0;
}
-static int esdhc_init(struct mmc *mmc)
+static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
{
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
- int timeout = 1000;
+ ulong start;
/* Reset the entire host controller */
esdhc_setbits32(®s->sysctl, SYSCTL_RSTA);
/* Wait until the controller is available */
- while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
- udelay(1000);
+ start = get_timer(0);
+ while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA)) {
+ if (get_timer(start) > 1000)
+ return -ETIMEDOUT;
+ }
#if defined(CONFIG_FSL_USDHC)
/* RSTA doesn't reset MMC_BOOT register, so manually reset it */
return 0;
}
-static int esdhc_getcd(struct mmc *mmc)
+static int esdhc_getcd_common(struct fsl_esdhc_priv *priv)
{
- struct fsl_esdhc_priv *priv = mmc->priv;
struct fsl_esdhc *regs = priv->esdhc_regs;
int timeout = 1000;
return 1;
#endif
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
if (priv->non_removable)
return 1;
#ifdef CONFIG_DM_GPIO
return timeout > 0;
}
-static void esdhc_reset(struct fsl_esdhc *regs)
+static int esdhc_reset(struct fsl_esdhc *regs)
{
- unsigned long timeout = 100; /* wait max 100 ms */
+ ulong start;
/* reset the controller */
esdhc_setbits32(®s->sysctl, SYSCTL_RSTA);
/* hardware clears the bit when it is done */
- while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
- udelay(1000);
- if (!timeout)
- printf("MMC/SD: Reset never completed.\n");
+ start = get_timer(0);
+ while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA)) {
+ if (get_timer(start) > 100) {
+ printf("MMC/SD: Reset never completed.\n");
+ return -ETIMEDOUT;
+ }
+ }
+
+ return 0;
+}
+
+#if !CONFIG_IS_ENABLED(DM_MMC)
+static int esdhc_getcd(struct mmc *mmc)
+{
+ struct fsl_esdhc_priv *priv = mmc->priv;
+
+ return esdhc_getcd_common(priv);
+}
+
+static int esdhc_init(struct mmc *mmc)
+{
+ struct fsl_esdhc_priv *priv = mmc->priv;
+
+ return esdhc_init_common(priv, mmc);
+}
+
+static int esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct fsl_esdhc_priv *priv = mmc->priv;
+
+ return esdhc_send_cmd_common(priv, mmc, cmd, data);
+}
+
+static int esdhc_set_ios(struct mmc *mmc)
+{
+ struct fsl_esdhc_priv *priv = mmc->priv;
+
+ return esdhc_set_ios_common(priv, mmc);
}
static const struct mmc_ops esdhc_ops = {
+ .getcd = esdhc_getcd,
+ .init = esdhc_init,
.send_cmd = esdhc_send_cmd,
.set_ios = esdhc_set_ios,
- .init = esdhc_init,
- .getcd = esdhc_getcd,
};
+#endif
-static int fsl_esdhc_init(struct fsl_esdhc_priv *priv)
+static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
+ struct fsl_esdhc_plat *plat)
{
+ struct mmc_config *cfg;
struct fsl_esdhc *regs;
- struct mmc *mmc;
u32 caps, voltage_caps;
+ int ret;
if (!priv)
return -EINVAL;
regs = priv->esdhc_regs;
/* First reset the eSDHC controller */
- esdhc_reset(regs);
+ ret = esdhc_reset(regs);
+ if (ret)
+ return ret;
#ifndef CONFIG_FSL_USDHC
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT);
writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten);
- memset(&priv->cfg, 0, sizeof(priv->cfg));
+ cfg = &plat->cfg;
+#ifndef CONFIG_DM_MMC
+ memset(cfg, '\0', sizeof(*cfg));
+#endif
voltage_caps = 0;
caps = esdhc_read32(®s->hostcapblt);
if (caps & ESDHC_HOSTCAPBLT_VS33)
voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34;
- priv->cfg.name = "FSL_SDHC";
- priv->cfg.ops = &esdhc_ops;
+ cfg->name = "FSL_SDHC";
+#if !CONFIG_IS_ENABLED(DM_MMC)
+ cfg->ops = &esdhc_ops;
+#endif
#ifdef CONFIG_SYS_SD_VOLTAGE
- priv->cfg.voltages = CONFIG_SYS_SD_VOLTAGE;
+ cfg->voltages = CONFIG_SYS_SD_VOLTAGE;
#else
- priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
#endif
- if ((priv->cfg.voltages & voltage_caps) == 0) {
+ if ((cfg->voltages & voltage_caps) == 0) {
printf("voltage not supported by controller\n");
return -1;
}
if (priv->bus_width == 8)
- priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
+ cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
else if (priv->bus_width == 4)
- priv->cfg.host_caps = MMC_MODE_4BIT;
+ cfg->host_caps = MMC_MODE_4BIT;
- priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
+ cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
#ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
- priv->cfg.host_caps |= MMC_MODE_DDR_52MHz;
+ cfg->host_caps |= MMC_MODE_DDR_52MHz;
#endif
if (priv->bus_width > 0) {
if (priv->bus_width < 8)
- priv->cfg.host_caps &= ~MMC_MODE_8BIT;
+ cfg->host_caps &= ~MMC_MODE_8BIT;
if (priv->bus_width < 4)
- priv->cfg.host_caps &= ~MMC_MODE_4BIT;
+ cfg->host_caps &= ~MMC_MODE_4BIT;
}
if (caps & ESDHC_HOSTCAPBLT_HSS)
- priv->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
#ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK
if (CONFIG_ESDHC_DETECT_8_BIT_QUIRK)
- priv->cfg.host_caps &= ~MMC_MODE_8BIT;
+ cfg->host_caps &= ~MMC_MODE_8BIT;
#endif
- priv->cfg.f_min = 400000;
- priv->cfg.f_max = min(priv->sdhc_clk, (u32)52000000);
-
- priv->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ cfg->f_min = 400000;
+ cfg->f_max = min(priv->sdhc_clk, (u32)52000000);
- mmc = mmc_create(&priv->cfg, priv);
- if (mmc == NULL)
- return -1;
-
- priv->mmc = mmc;
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
return 0;
}
-#ifndef CONFIG_DM_MMC
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg,
struct fsl_esdhc_priv *priv)
{
int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
{
+ struct fsl_esdhc_plat *plat;
struct fsl_esdhc_priv *priv;
+ struct mmc *mmc;
int ret;
if (!cfg)
priv = calloc(sizeof(struct fsl_esdhc_priv), 1);
if (!priv)
return -ENOMEM;
+ plat = calloc(sizeof(struct fsl_esdhc_plat), 1);
+ if (!plat) {
+ free(priv);
+ return -ENOMEM;
+ }
ret = fsl_esdhc_cfg_to_priv(cfg, priv);
if (ret) {
debug("%s xlate failure\n", __func__);
+ free(plat);
free(priv);
return ret;
}
- ret = fsl_esdhc_init(priv);
+ ret = fsl_esdhc_init(priv, plat);
if (ret) {
debug("%s init failure\n", __func__);
+ free(plat);
free(priv);
return ret;
}
+ mmc = mmc_create(&plat->cfg, priv);
+ if (!mmc)
+ return -EIO;
+
+ priv->mmc = mmc;
+
return 0;
}
return 1;
}
#endif
- do_fixup_by_compat(blob, compat, "status", "okay",
- sizeof("okay"), 1);
return 0;
}
}
#endif
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
#include <asm/arch/clock.h>
__weak void init_clk_usdhc(u32 index)
{
static int fsl_esdhc_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- const void *fdt = gd->fdt_blob;
- int node = dev_of_offset(dev);
+#ifdef CONFIG_DM_REGULATOR
struct udevice *vqmmc_dev;
+#endif
fdt_addr_t addr;
unsigned int val;
+ struct mmc *mmc;
int ret;
- addr = devfdt_get_addr(dev);
+ addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
priv->esdhc_regs = (struct fsl_esdhc *)addr;
priv->dev = dev;
- val = fdtdec_get_int(fdt, node, "bus-width", -1);
+ val = dev_read_u32_default(dev, "bus-width", -1);
if (val == 8)
priv->bus_width = 8;
else if (val == 4)
else
priv->bus_width = 1;
- if (fdt_get_property(fdt, node, "non-removable", NULL)) {
+ if (dev_read_bool(dev, "non-removable")) {
priv->non_removable = 1;
} else {
priv->non_removable = 0;
#ifdef CONFIG_DM_GPIO
- gpio_request_by_name_nodev(offset_to_ofnode(node), "cd-gpios",
- 0, &priv->cd_gpio, GPIOD_IS_IN);
+ gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,
+ GPIOD_IS_IN);
#endif
}
priv->wp_enable = 1;
#ifdef CONFIG_DM_GPIO
- ret = gpio_request_by_name_nodev(offset_to_ofnode(node), "wp-gpios", 0,
- &priv->wp_gpio, GPIOD_IS_IN);
+ ret = gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio,
+ GPIOD_IS_IN);
if (ret)
priv->wp_enable = 0;
#endif
return -EINVAL;
}
- ret = fsl_esdhc_init(priv);
+ ret = fsl_esdhc_init(priv, plat);
if (ret) {
dev_err(dev, "fsl_esdhc_init failure\n");
return ret;
}
- upriv->mmc = priv->mmc;
- priv->mmc->dev = dev;
+ mmc = &plat->mmc;
+ mmc->cfg = &plat->cfg;
+ mmc->dev = dev;
+ upriv->mmc = mmc;
- return 0;
+ return esdhc_init_common(priv, mmc);
}
+#if CONFIG_IS_ENABLED(DM_MMC)
+static int fsl_esdhc_get_cd(struct udevice *dev)
+{
+ struct fsl_esdhc_priv *priv = dev_get_priv(dev);
+
+ return true;
+ return esdhc_getcd_common(priv);
+}
+
+static int fsl_esdhc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_priv *priv = dev_get_priv(dev);
+
+ return esdhc_send_cmd_common(priv, &plat->mmc, cmd, data);
+}
+
+static int fsl_esdhc_set_ios(struct udevice *dev)
+{
+ struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_priv *priv = dev_get_priv(dev);
+
+ return esdhc_set_ios_common(priv, &plat->mmc);
+}
+
+static const struct dm_mmc_ops fsl_esdhc_ops = {
+ .get_cd = fsl_esdhc_get_cd,
+ .send_cmd = fsl_esdhc_send_cmd,
+ .set_ios = fsl_esdhc_set_ios,
+};
+#endif
+
static const struct udevice_id fsl_esdhc_ids[] = {
{ .compatible = "fsl,imx6ul-usdhc", },
{ .compatible = "fsl,imx6sx-usdhc", },
{ /* sentinel */ }
};
+#if CONFIG_IS_ENABLED(BLK)
+static int fsl_esdhc_bind(struct udevice *dev)
+{
+ struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+#endif
+
U_BOOT_DRIVER(fsl_esdhc) = {
.name = "fsl-esdhc-mmc",
.id = UCLASS_MMC,
.of_match = fsl_esdhc_ids,
+ .ops = &fsl_esdhc_ops,
+#if CONFIG_IS_ENABLED(BLK)
+ .bind = fsl_esdhc_bind,
+#endif
.probe = fsl_esdhc_probe,
+ .platdata_auto_alloc_size = sizeof(struct fsl_esdhc_plat),
.priv_auto_alloc_size = sizeof(struct fsl_esdhc_priv),
};
#endif
# define MCI_BUS 0
#endif
+#ifdef CONFIG_DM_MMC
+struct atmel_mci_plat {
+ struct mmc mmc;
+ struct mmc_config cfg;
+ struct atmel_mci *mci;
+};
+#endif
+
struct atmel_mci_priv {
+#ifndef CONFIG_DM_MMC
struct mmc_config cfg;
struct atmel_mci *mci;
+#endif
unsigned int initialized:1;
unsigned int curr_clk;
#ifdef CONFIG_DM_MMC
- struct mmc mmc;
ulong bus_clk_rate;
#endif
};
/* Setup for MCI Clock and Block Size */
#ifdef CONFIG_DM_MMC
-static void mci_set_mode(struct atmel_mci_priv *priv, u32 hz, u32 blklen)
+static void mci_set_mode(struct udevice *dev, u32 hz, u32 blklen)
{
- struct mmc *mmc = &priv->mmc;
+ struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_priv *priv = dev_get_priv(dev);
+ struct mmc *mmc = &plat->mmc;
u32 bus_hz = priv->bus_clk_rate;
+ atmel_mci_t *mci = plat->mci;
#else
static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
{
struct atmel_mci_priv *priv = mmc->priv;
u32 bus_hz = get_mci_clk_rate();
+ atmel_mci_t *mci = priv->mci;
#endif
- atmel_mci_t *mci = priv->mci;
u32 clkdiv = 255;
unsigned int version = atmel_mci_get_version(mci);
u32 clkodd = 0;
static int atmel_mci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
+ struct atmel_mci_plat *plat = dev_get_platdata(dev);
struct atmel_mci_priv *priv = dev_get_priv(dev);
struct mmc *mmc = mmc_get_mmc_dev(dev);
+ atmel_mci_t *mci = plat->mci;
#else
static int
mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
struct atmel_mci_priv *priv = mmc->priv;
-#endif
atmel_mci_t *mci = priv->mci;
+#endif
u32 cmdr;
u32 error_flags = 0;
u32 status;
#ifdef CONFIG_DM_MMC
static int atmel_mci_set_ios(struct udevice *dev)
{
- struct atmel_mci_priv *priv = dev_get_priv(dev);
+ struct atmel_mci_plat *plat = dev_get_platdata(dev);
struct mmc *mmc = mmc_get_mmc_dev(dev);
+ atmel_mci_t *mci = plat->mci;
#else
/* Entered into mmc structure during driver init */
static int mci_set_ios(struct mmc *mmc)
{
struct atmel_mci_priv *priv = mmc->priv;
-#endif
atmel_mci_t *mci = priv->mci;
+#endif
int bus_width = mmc->bus_width;
unsigned int version = atmel_mci_get_version(mci);
int busw;
/* Set the clock speed */
#ifdef CONFIG_DM_MMC
- mci_set_mode(priv, mmc->clock, MMC_DEFAULT_BLKLEN);
+ mci_set_mode(dev, mmc->clock, MMC_DEFAULT_BLKLEN);
#else
mci_set_mode(mmc, mmc->clock, MMC_DEFAULT_BLKLEN);
#endif
}
#ifdef CONFIG_DM_MMC
-static int atmel_mci_hw_init(struct atmel_mci_priv *priv)
+static int atmel_mci_hw_init(struct udevice *dev)
{
+ struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ atmel_mci_t *mci = plat->mci;
#else
/* Entered into mmc structure during driver init */
static int mci_init(struct mmc *mmc)
{
struct atmel_mci_priv *priv = mmc->priv;
-#endif
atmel_mci_t *mci = priv->mci;
+#endif
/* Initialize controller */
writel(MMCI_BIT(SWRST), &mci->cr); /* soft reset */
/* Set default clocks and blocklen */
#ifdef CONFIG_DM_MMC
- mci_set_mode(priv, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
+ mci_set_mode(dev, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
#else
mci_set_mode(mmc, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
#endif
.set_ios = atmel_mci_set_ios,
};
-static void atmel_mci_setup_cfg(struct atmel_mci_priv *priv)
+static void atmel_mci_setup_cfg(struct udevice *dev)
{
+ struct atmel_mci_plat *plat = dev_get_platdata(dev);
+ struct atmel_mci_priv *priv = dev_get_priv(dev);
struct mmc_config *cfg;
u32 version;
- cfg = &priv->cfg;
+ cfg = &plat->cfg;
cfg->name = "Atmel mci";
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
* If the version is above 3.0, the capabilities of the 8-bit
* bus width and high speed are supported.
*/
- version = atmel_mci_get_version(priv->mci);
+ version = atmel_mci_get_version(plat->mci);
if ((version & 0xf00) >= 0x300) {
cfg->host_caps = MMC_MODE_8BIT |
MMC_MODE_HS | MMC_MODE_HS_52MHz;
static int atmel_mci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct atmel_mci_priv *priv = dev_get_priv(dev);
+ struct atmel_mci_plat *plat = dev_get_platdata(dev);
struct mmc *mmc;
int ret;
if (ret)
return ret;
- priv->mci = (struct atmel_mci *)devfdt_get_addr_ptr(dev);
+ plat->mci = (struct atmel_mci *)devfdt_get_addr_ptr(dev);
- atmel_mci_setup_cfg(priv);
+ atmel_mci_setup_cfg(dev);
- mmc = &priv->mmc;
- mmc->cfg = &priv->cfg;
+ mmc = &plat->mmc;
+ mmc->cfg = &plat->cfg;
mmc->dev = dev;
upriv->mmc = mmc;
- atmel_mci_hw_init(priv);
+ atmel_mci_hw_init(dev);
return 0;
}
static int atmel_mci_bind(struct udevice *dev)
{
- struct atmel_mci_priv *priv = dev_get_priv(dev);
+ struct atmel_mci_plat *plat = dev_get_platdata(dev);
- return mmc_bind(dev, &priv->mmc, &priv->cfg);
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
static const struct udevice_id atmel_mci_ids[] = {
.of_match = atmel_mci_ids,
.bind = atmel_mci_bind,
.probe = atmel_mci_probe,
+ .platdata_auto_alloc_size = sizeof(struct atmel_mci_plat),
.priv_auto_alloc_size = sizeof(struct atmel_mci_priv),
.ops = &atmel_mci_mmc_ops,
};
DECLARE_GLOBAL_DATA_PTR;
-#if CONFIG_IS_ENABLED(DM_MMC_OPS)
int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
{
return dm_mmc_get_cd(mmc->dev);
}
-#endif
struct mmc *mmc_get_mmc_dev(struct udevice *dev)
{
struct udevice *bdev;
int ret, devnum = -1;
-#if CONFIG_IS_ENABLED(DM_MMC_OPS)
if (!mmc_get_ops(dev))
return -ENOSYS;
-#endif
#ifndef CONFIG_SPL_BUILD
/* Use the fixed index with aliase node's index */
ret = dev_read_alias_seq(dev, &devnum);
}
#endif
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
__weak int board_mmc_getwp(struct mmc *mmc)
{
return -1;
}
#endif
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
int ret;
return 0;
}
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
int mmc_getcd(struct mmc *mmc)
{
int cd;
80,
};
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
static void mmc_set_ios(struct mmc *mmc)
{
if (mmc->cfg->ops->set_ios)
/* we pretend there's no card when init is NULL */
no_card = mmc_getcd(mmc) == 0;
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
no_card = no_card || (mmc->cfg->ops->init == NULL);
#endif
if (no_card) {
if (err)
return err;
-#if CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if CONFIG_IS_ENABLED(DM_MMC)
/* The device has already been probed ready for use */
#else
/* made sure it's not NULL earlier */
*/
int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
{
- return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
- EXT_CSD_BOOT_ACK(ack) |
- EXT_CSD_BOOT_PART_NUM(part_num) |
- EXT_CSD_PARTITION_ACCESS(access));
+ int ret;
+ u8 part_conf;
+
+ part_conf = EXT_CSD_BOOT_ACK(ack) |
+ EXT_CSD_BOOT_PART_NUM(part_num) |
+ EXT_CSD_PARTITION_ACCESS(access);
+
+ ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
+ part_conf);
+ if (!ret)
+ mmc->part_config = part_conf;
+
+ return ret;
}
/*
cfg->f_max == 0 || cfg->b_max == 0)
return NULL;
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
if (cfg->ops == NULL || cfg->ops->send_cmd == NULL)
return NULL;
#endif
};
static struct pci_device_id mmc_supported[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1) },
+ { PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) },
{},
};
#define SDHCI_CMD_DEFAULT_TIMEOUT 100
#define SDHCI_READ_STATUS_TIMEOUT 1000
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
static int sdhci_send_command(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
}
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
static int sdhci_set_ios(struct udevice *dev)
{
struct mmc *mmc = mmc_get_mmc_dev(dev);
return 0;
}
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
int sdhci_probe(struct udevice *dev)
{
struct mmc *mmc = mmc_get_mmc_dev(dev);
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
cfg->name = host->name;
-#ifndef CONFIG_DM_MMC_OPS
+#ifndef CONFIG_DM_MMC
cfg->ops = &sdhci_ops;
#endif
#include <common.h>
#include <malloc.h>
#include <mmc.h>
+#include <dm.h>
#include <linux/errno.h>
-#include <asm/io.h>
+#include <linux/compat.h>
+#include <linux/io.h>
+#include <linux/sizes.h>
#include <asm/arch/rmobile.h>
#include <asm/arch/sh_sdhi.h>
+#include <clk.h>
#define DRIVER_NAME "sh-sdhi"
struct sh_sdhi_host {
- unsigned long addr;
+ void __iomem *addr;
int ch;
int bus_shift;
unsigned long quirks;
unsigned char wait_int;
unsigned char sd_error;
unsigned char detect_waiting;
+ unsigned char app_cmd;
};
static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val)
return readw(host->addr + (reg << host->bus_shift));
}
-static void *mmc_priv(struct mmc *mmc)
-{
- return (void *)mmc->priv;
-}
-
static void sh_sdhi_detect(struct sh_sdhi_host *host)
{
sh_sdhi_writew(host, SDHI_OPTION,
static unsigned short sh_sdhi_set_cmd(struct sh_sdhi_host *host,
struct mmc_data *data, unsigned short opc)
{
- switch (opc) {
- case SD_CMD_APP_SEND_OP_COND:
- case SD_CMD_APP_SEND_SCR:
- opc |= SDHI_APP;
- break;
- case SD_CMD_APP_SET_BUS_WIDTH:
- /* SD_APP_SET_BUS_WIDTH*/
+ if (host->app_cmd) {
if (!data)
- opc |= SDHI_APP;
- else /* SD_SWITCH */
- opc = SDHI_SD_SWITCH;
- break;
- case MMC_CMD_SEND_OP_COND:
- opc = SDHI_MMC_SEND_OP_COND;
- break;
+ host->app_cmd = 0;
+ return opc | BIT(6);
+ }
+
+ switch (opc) {
+ case MMC_CMD_SWITCH:
+ return opc | (data ? 0x1c00 : 0x40);
case MMC_CMD_SEND_EXT_CSD:
- if (data)
- opc = SDHI_MMC_SEND_EXT_CSD;
- break;
+ return opc | (data ? 0x1c00 : 0);
+ case MMC_CMD_SEND_OP_COND:
+ return opc | 0x0700;
+ case MMC_CMD_APP_CMD:
+ host->app_cmd = 1;
default:
- break;
+ return opc;
}
- return opc;
}
static unsigned short sh_sdhi_data_trans(struct sh_sdhi_host *host,
struct mmc_data *data, unsigned short opc)
{
- unsigned short ret;
-
- switch (opc) {
- case MMC_CMD_READ_MULTIPLE_BLOCK:
- ret = sh_sdhi_multi_read(host, data);
- break;
- case MMC_CMD_WRITE_MULTIPLE_BLOCK:
- ret = sh_sdhi_multi_write(host, data);
- break;
- case MMC_CMD_WRITE_SINGLE_BLOCK:
- ret = sh_sdhi_single_write(host, data);
- break;
- case MMC_CMD_READ_SINGLE_BLOCK:
- case SDHI_SD_APP_SEND_SCR:
- case SDHI_SD_SWITCH: /* SD_SWITCH */
- case SDHI_MMC_SEND_EXT_CSD:
- ret = sh_sdhi_single_read(host, data);
- break;
- default:
- printf(DRIVER_NAME": SD: NOT SUPPORT CMD = d'%04d\n", opc);
- ret = -EINVAL;
- break;
+ if (host->app_cmd) {
+ host->app_cmd = 0;
+ switch (opc) {
+ case SD_CMD_APP_SEND_SCR:
+ case SD_CMD_APP_SD_STATUS:
+ return sh_sdhi_single_read(host, data);
+ default:
+ printf(DRIVER_NAME": SD: NOT SUPPORT APP CMD = d'%04d\n",
+ opc);
+ return -EINVAL;
+ }
+ } else {
+ switch (opc) {
+ case MMC_CMD_WRITE_MULTIPLE_BLOCK:
+ return sh_sdhi_multi_write(host, data);
+ case MMC_CMD_READ_MULTIPLE_BLOCK:
+ return sh_sdhi_multi_read(host, data);
+ case MMC_CMD_WRITE_SINGLE_BLOCK:
+ return sh_sdhi_single_write(host, data);
+ case MMC_CMD_READ_SINGLE_BLOCK:
+ case MMC_CMD_SWITCH:
+ case MMC_CMD_SEND_EXT_CSD:;
+ return sh_sdhi_single_read(host, data);
+ default:
+ printf(DRIVER_NAME": SD: NOT SUPPORT CMD = d'%04d\n", opc);
+ return -EINVAL;
+ }
}
- return ret;
}
static int sh_sdhi_start_cmd(struct sh_sdhi_host *host,
struct mmc_data *data, struct mmc_cmd *cmd)
{
long time;
- unsigned short opc = cmd->cmdidx;
+ unsigned short shcmd, opc = cmd->cmdidx;
int ret = 0;
unsigned long timeout;
}
sh_sdhi_writew(host, SDHI_SIZE, data->blocksize);
}
- opc = sh_sdhi_set_cmd(host, data, opc);
+
+ shcmd = sh_sdhi_set_cmd(host, data, opc);
/*
* U-Boot cannot use interrupt.
INFO2M_RESP_TIMEOUT | INFO2M_ILA) &
sh_sdhi_readw(host, SDHI_INFO2_MASK));
- sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(opc & CMD_MASK));
-
+ sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(shcmd & CMD_MASK));
time = sh_sdhi_wait_interrupt_flag(host);
- if (!time)
+ if (!time) {
+ host->app_cmd = 0;
return sh_sdhi_error_manage(host);
+ }
if (host->sd_error) {
switch (cmd->cmdidx) {
}
host->sd_error = 0;
host->wait_int = 0;
+ host->app_cmd = 0;
return ret;
}
- if (sh_sdhi_readw(host, SDHI_INFO1) & INFO1_RESP_END)
+
+ if (sh_sdhi_readw(host, SDHI_INFO1) & INFO1_RESP_END) {
+ host->app_cmd = 0;
return -EINVAL;
+ }
if (host->wait_int) {
sh_sdhi_get_response(host, cmd);
host->wait_int = 0;
}
+
if (data)
ret = sh_sdhi_data_trans(host, data, opc);
return ret;
}
-static int sh_sdhi_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
- struct mmc_data *data)
+static int sh_sdhi_send_cmd_common(struct sh_sdhi_host *host,
+ struct mmc_cmd *cmd, struct mmc_data *data)
{
- struct sh_sdhi_host *host = mmc_priv(mmc);
- int ret;
-
host->sd_error = 0;
- ret = sh_sdhi_start_cmd(host, data, cmd);
-
- return ret;
+ return sh_sdhi_start_cmd(host, data, cmd);
}
-static int sh_sdhi_set_ios(struct mmc *mmc)
+static int sh_sdhi_set_ios_common(struct sh_sdhi_host *host, struct mmc *mmc)
{
int ret;
- struct sh_sdhi_host *host = mmc_priv(mmc);
ret = sh_sdhi_clock_control(host, mmc->clock);
if (ret)
return 0;
}
-static int sh_sdhi_initialize(struct mmc *mmc)
+static int sh_sdhi_initialize_common(struct sh_sdhi_host *host)
{
- struct sh_sdhi_host *host = mmc_priv(mmc);
int ret = sh_sdhi_sync_reset(host);
sh_sdhi_writew(host, SDHI_PORTSEL, USE_1PORT);
return ret;
}
+#ifndef CONFIG_DM_MMC
+static void *mmc_priv(struct mmc *mmc)
+{
+ return (void *)mmc->priv;
+}
+
+static int sh_sdhi_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct sh_sdhi_host *host = mmc_priv(mmc);
+
+ return sh_sdhi_send_cmd_common(host, cmd, data);
+}
+
+static int sh_sdhi_set_ios(struct mmc *mmc)
+{
+ struct sh_sdhi_host *host = mmc_priv(mmc);
+
+ return sh_sdhi_set_ios_common(host, mmc);
+}
+
+static int sh_sdhi_initialize(struct mmc *mmc)
+{
+ struct sh_sdhi_host *host = mmc_priv(mmc);
+
+ return sh_sdhi_initialize_common(host);
+}
+
static const struct mmc_ops sh_sdhi_ops = {
.send_cmd = sh_sdhi_send_cmd,
.set_ios = sh_sdhi_set_ios,
}
host->ch = ch;
- host->addr = addr;
+ host->addr = (void __iomem *)addr;
host->quirks = quirks;
if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
free(host);
return ret;
}
+
+#else
+
+struct sh_sdhi_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
+int sh_sdhi_dm_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct sh_sdhi_host *host = dev_get_priv(dev);
+
+ return sh_sdhi_send_cmd_common(host, cmd, data);
+}
+
+int sh_sdhi_dm_set_ios(struct udevice *dev)
+{
+ struct sh_sdhi_host *host = dev_get_priv(dev);
+ struct mmc *mmc = mmc_get_mmc_dev(dev);
+
+ return sh_sdhi_set_ios_common(host, mmc);
+}
+
+static const struct dm_mmc_ops sh_sdhi_dm_ops = {
+ .send_cmd = sh_sdhi_dm_send_cmd,
+ .set_ios = sh_sdhi_dm_set_ios,
+};
+
+static int sh_sdhi_dm_bind(struct udevice *dev)
+{
+ struct sh_sdhi_plat *plat = dev_get_platdata(dev);
+
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+
+static int sh_sdhi_dm_probe(struct udevice *dev)
+{
+ struct sh_sdhi_plat *plat = dev_get_platdata(dev);
+ struct sh_sdhi_host *host = dev_get_priv(dev);
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct clk sh_sdhi_clk;
+ const u32 quirks = dev_get_driver_data(dev);
+ fdt_addr_t base;
+ int ret;
+
+ base = devfdt_get_addr(dev);
+ if (base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ host->addr = devm_ioremap(dev, base, SZ_2K);
+ if (!host->addr)
+ return -ENOMEM;
+
+ ret = clk_get_by_index(dev, 0, &sh_sdhi_clk);
+ if (ret) {
+ debug("failed to get clock, ret=%d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&sh_sdhi_clk);
+ if (ret) {
+ debug("failed to enable clock, ret=%d\n", ret);
+ return ret;
+ }
+
+ host->quirks = quirks;
+
+ if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
+ host->bus_shift = 2;
+ else if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF)
+ host->bus_shift = 1;
+
+ plat->cfg.name = dev->name;
+ plat->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
+
+ switch (fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "bus-width",
+ 1)) {
+ case 8:
+ plat->cfg.host_caps |= MMC_MODE_8BIT;
+ break;
+ case 4:
+ plat->cfg.host_caps |= MMC_MODE_4BIT;
+ break;
+ case 1:
+ break;
+ default:
+ dev_err(dev, "Invalid \"bus-width\" value\n");
+ return -EINVAL;
+ }
+
+ sh_sdhi_initialize_common(host);
+
+ plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
+ plat->cfg.f_min = CLKDEV_INIT;
+ plat->cfg.f_max = CLKDEV_HS_DATA;
+ plat->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+
+ upriv->mmc = &plat->mmc;
+
+ return 0;
+}
+
+static const struct udevice_id sh_sdhi_sd_match[] = {
+ { .compatible = "renesas,sdhi-r8a7795", .data = SH_SDHI_QUIRK_64BIT_BUF },
+ { .compatible = "renesas,sdhi-r8a7796", .data = SH_SDHI_QUIRK_64BIT_BUF },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(sh_sdhi_mmc) = {
+ .name = "sh-sdhi-mmc",
+ .id = UCLASS_MMC,
+ .of_match = sh_sdhi_sd_match,
+ .bind = sh_sdhi_dm_bind,
+ .probe = sh_sdhi_dm_probe,
+ .priv_auto_alloc_size = sizeof(struct sh_sdhi_host),
+ .platdata_auto_alloc_size = sizeof(struct sh_sdhi_plat),
+ .ops = &sh_sdhi_dm_ops,
+};
+#endif
u32 rsp_71_40 = readl(priv->regbase + UNIPHIER_SD_RSP32);
u32 rsp_39_8 = readl(priv->regbase + UNIPHIER_SD_RSP10);
- cmd->response[0] = (rsp_127_104 & 0xffffff) << 8 |
- (rsp_103_72 & 0xff);
- cmd->response[1] = (rsp_103_72 & 0xffffff) << 8 |
- (rsp_71_40 & 0xff);
- cmd->response[2] = (rsp_71_40 & 0xffffff) << 8 |
- (rsp_39_8 & 0xff);
- cmd->response[3] = (rsp_39_8 & 0xffffff) << 8;
+ cmd->response[0] = ((rsp_127_104 & 0x00ffffff) << 8) |
+ ((rsp_103_72 & 0xff000000) >> 24);
+ cmd->response[1] = ((rsp_103_72 & 0x00ffffff) << 8) |
+ ((rsp_71_40 & 0xff000000) >> 24);
+ cmd->response[2] = ((rsp_71_40 & 0x00ffffff) << 8) |
+ ((rsp_39_8 & 0xff000000) >> 24);
+ cmd->response[3] = (rsp_39_8 & 0xffffff) << 8;
} else {
/* bit 39-8 */
cmd->response[0] = readl(priv->regbase + UNIPHIER_SD_RSP10);
#ifdef CONFIG_SYS_FLASH_PROTECTION
/* read environment from EEPROM */
char s[64];
- getenv_f("unlock", s, sizeof(s));
+ env_get_f("unlock", s, sizeof(s));
#endif
#ifdef CONFIG_CFI_FLASH /* for driver model */
return found[0];
}
-void AT91F_DataflashSetEnv (void)
+void AT91F_Dataflashenv_set(void)
{
int i, j;
int part;
/* Set the environment according to the label...*/
if((env & FLAG_SETENV) == FLAG_SETENV) {
start = dataflash_info[i].Device.area_list[j].start;
- sprintf((char*) s,"%lX",start);
- setenv((char*) area_list[part].label,(char*) s);
+ sprintf((char *)s, "%lX", start);
+ env_set((char *)area_list[part].label,
+ (char *)s);
}
part++;
}
-menu "NAND Device Support"
+
+menuconfig NAND
+ bool "NAND Device Support"
+if NAND
config SYS_NAND_SELF_INIT
bool
endif
-endmenu
+endif # if NAND
debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
div_u64_rem(len, spi_flash->page_size, &rem);
- if (rem)
+ if (rem) {
+ printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n",
+ dev->name, len, spi_flash->page_size);
return -EINVAL;
+ }
div_u64_rem(offset, spi_flash->page_size, &rem);
- if (rem)
+ if (rem) {
+ printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n",
+ dev->name, offset, spi_flash->page_size);
return -EINVAL;
+ }
status = spi_claim_bus(spi);
if (status) {
if (IS_ERR_OR_NULL(info))
return -ENOENT;
- /* Flash powers up read-only, so clear BP# bits */
+ /*
+ * Flash powers up read-only, so clear BP# bits.
+ *
+ * Note on some flash (like Macronix), QE (quad enable) bit is in the
+ * same status register as BP# bits, and we need preserve its original
+ * value during a reboot cycle as this is required by some platforms
+ * (like Intel ICH SPI controller working under descriptor mode).
+ */
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
- JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
- JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
- write_sr(flash, 0);
+ (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) ||
+ (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX)) {
+ u8 sr = 0;
+
+ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX) {
+ read_sr(flash, &sr);
+ sr &= STATUS_QEB_MXIC;
+ }
+ write_sr(flash, sr);
+ }
flash->name = info->name;
flash->memory_map = spi->memory_map;
{"mx25l12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
{"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
{"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"mx25u6435f", INFO(0xc22537, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP) },
{"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
{"mx66u51235f", INFO(0xc2253a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
{"mx66l1g45g", INFO(0xc2201b, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP) },
uchar enetaddr[6];
/* Ethernet Addr... */
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return;
eeprom[0x0a] = (enetaddr[1] << 8) | enetaddr[0];
eeprom[0x0b] = (enetaddr[3] << 8) | enetaddr[2];
free(fec->tbd_base);
}
+#ifdef CONFIG_DM_ETH
+struct mii_dev *fec_get_miibus(struct udevice *dev, int dev_id)
+#else
struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id)
+#endif
{
+#ifdef CONFIG_DM_ETH
+ struct fec_priv *priv = dev_get_priv(dev);
+ struct ethernet_regs *eth = priv->eth;
+#else
struct ethernet_regs *eth = (struct ethernet_regs *)base_addr;
+#endif
struct mii_dev *bus;
int ret;
sprintf(mac, "eth%daddr", fec->dev_id);
else
strcpy(mac, "ethaddr");
- if (!getenv(mac))
- eth_setenv_enetaddr(mac, ethaddr);
+ if (!env_get(mac))
+ eth_env_set_enetaddr(mac, ethaddr);
}
return ret;
err4:
* Extract hwconfig from environment since environment
* is not setup yet
*/
- getenv_f("hwconfig", buffer, sizeof(buffer));
+ env_get_f("hwconfig", buffer, sizeof(buffer));
buf = buffer;
/* check if XFI interface enable in hwconfig for 10g */
return;
/* If the environment variable is not set, then exit silently */
- p = getenv("fman_ucode");
+ p = env_get("fman_ucode");
if (!p)
return;
rc = fman_upload_firmware(index, ®->fm_imem, addr);
if (rc)
return rc;
- setenv_addr("fman_ucode", addr);
+ env_set_addr("fman_ucode", addr);
fm_init_muram(index, ®->muram);
fm_init_qmi(®->fm_qmi_common);
if_mode |= IF_MODE_GMII;
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
if_mode |= (IF_MODE_GMII | IF_MODE_RG);
break;
case PHY_INTERFACE_MODE_RMII:
if (type != PHY_INTERFACE_MODE_XGMII)
if_mode |= IF_MODE_EN_AUTO;
- if (type == PHY_INTERFACE_MODE_RGMII) {
+ if (type == PHY_INTERFACE_MODE_RGMII ||
+ type == PHY_INTERFACE_MODE_RGMII_TXID) {
if_mode &= ~IF_MODE_EN_AUTO;
if_mode &= ~IF_MODE_SETSP_MASK;
switch (speed) {
/* MAC address property present */
if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
/* u-boot MAC addr randomly assigned - leave the present one */
- if (!eth_getenv_enetaddr_by_index("eth", eth_dev->index,
- env_enetaddr))
+ if (!eth_env_get_enetaddr_by_index("eth", eth_dev->index,
+ env_enetaddr))
return err;
} else {
size = MC_DT_INCREASE_SIZE + strlen(propname) + len;
{
unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
- char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
+ char *timeout_ms_env_var = env_get(MC_BOOT_TIMEOUT_ENV_VAR);
if (timeout_ms_env_var) {
timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
{
unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
- char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
+ char *dram_block_size_env_var = env_get(MC_MEM_SIZE_ENV_VAR);
if (dram_block_size_env_var) {
dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
{
int err = 0;
bool is_dpl_apply_status = false;
+ bool mc_boot_status = false;
if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
mc_apply_dpl(mc_lazy_dpl_addr);
mc_lazy_dpl_addr = 0;
}
+ if (!get_mc_boot_status())
+ mc_boot_status = true;
+
/* MC is not loaded intentionally, So return success. */
- if (bd && get_mc_boot_status() != 0)
+ if (bd && !mc_boot_status)
return 0;
/* If DPL is deployed, set is_dpl_apply_status as TRUE. */
* For case MC is loaded but DPL is not deployed, return success and
* print message on console. Else FDT fix-up code execution hanged.
*/
- if (bd && !get_mc_boot_status() && !is_dpl_apply_status) {
+ if (bd && mc_boot_status && !is_dpl_apply_status) {
printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
return 0;
}
+ if (bd && mc_boot_status && is_dpl_apply_status)
+ return 0;
+
err = dpbp_exit();
if (err < 0) {
printf("dpbp_exit() failed: %d\n", err);
* address info properly. Without MAC addresses, the MC code
* can not properly initialize the DPC.
*/
- mc_boot_env_var = getenv(MC_BOOT_ENV_VAR);
+ mc_boot_env_var = env_get(MC_BOOT_ENV_VAR);
if (mc_boot_env_var)
run_command_list(mc_boot_env_var, -1, 0);
#endif /* CONFIG_FSL_MC_ENET */
/* Set station address */
if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE)
- eth_getenv_enetaddr("ethaddr", enetaddr);
+ eth_env_get_enetaddr("ethaddr", enetaddr);
else
- eth_getenv_enetaddr("eth1addr", enetaddr);
+ eth_env_get_enetaddr("eth1addr", enetaddr);
fec_set_hwaddr(fecp, enetaddr);
/* Set Opcode/Pause Duration Register */
static void ftgmac100_set_mac_from_env(struct eth_device *dev)
{
- eth_getenv_enetaddr("ethaddr", dev->enetaddr);
+ eth_env_get_enetaddr("ethaddr", dev->enetaddr);
ftgmac100_set_mac(dev, dev->enetaddr);
}
int ftmac100_read_rom_hwaddr(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
- eth_getenv_enetaddr("ethaddr", pdata->enetaddr);
+ eth_env_get_enetaddr("ethaddr", pdata->enetaddr);
return 0;
}
#include <asm/arch/clock.h>
#include <asm/arch/hardware.h>
#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/grf_rk3368.h>
#include <asm/arch/grf_rk3399.h>
#include <dm/pinctrl.h>
#include <dt-bindings/clock/rk3288-cru.h>
return 0;
}
+static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+ struct rk3368_grf *grf;
+ int clk;
+ enum {
+ RK3368_GMAC_CLK_SEL_2_5M = 2 << 4,
+ RK3368_GMAC_CLK_SEL_25M = 3 << 4,
+ RK3368_GMAC_CLK_SEL_125M = 0 << 4,
+ RK3368_GMAC_CLK_SEL_MASK = GENMASK(5, 4),
+ };
+
+ switch (priv->phydev->speed) {
+ case 10:
+ clk = RK3368_GMAC_CLK_SEL_2_5M;
+ break;
+ case 100:
+ clk = RK3368_GMAC_CLK_SEL_25M;
+ break;
+ case 1000:
+ clk = RK3368_GMAC_CLK_SEL_125M;
+ break;
+ default:
+ debug("Unknown phy speed: %d\n", priv->phydev->speed);
+ return -EINVAL;
+ }
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ rk_clrsetreg(&grf->soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk);
+
+ return 0;
+}
+
static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
{
struct rk3399_grf_regs *grf;
pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT);
}
+static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+ struct rk3368_grf *grf;
+ enum {
+ RK3368_GMAC_PHY_INTF_SEL_RGMII = 1 << 9,
+ RK3368_GMAC_PHY_INTF_SEL_MASK = GENMASK(11, 9),
+ RK3368_RMII_MODE_MASK = BIT(6),
+ RK3368_RMII_MODE = BIT(6),
+ };
+ enum {
+ RK3368_RXCLK_DLY_ENA_GMAC_MASK = BIT(15),
+ RK3368_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+ RK3368_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(15),
+ RK3368_TXCLK_DLY_ENA_GMAC_MASK = BIT(7),
+ RK3368_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+ RK3368_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(7),
+ RK3368_CLK_RX_DL_CFG_GMAC_SHIFT = 8,
+ RK3368_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(14, 8),
+ RK3368_CLK_TX_DL_CFG_GMAC_SHIFT = 0,
+ RK3368_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+ };
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ rk_clrsetreg(&grf->soc_con15,
+ RK3368_RMII_MODE_MASK | RK3368_GMAC_PHY_INTF_SEL_MASK,
+ RK3368_GMAC_PHY_INTF_SEL_RGMII);
+
+ rk_clrsetreg(&grf->soc_con16,
+ RK3368_RXCLK_DLY_ENA_GMAC_MASK |
+ RK3368_TXCLK_DLY_ENA_GMAC_MASK |
+ RK3368_CLK_RX_DL_CFG_GMAC_MASK |
+ RK3368_CLK_TX_DL_CFG_GMAC_MASK,
+ RK3368_RXCLK_DLY_ENA_GMAC_ENABLE |
+ RK3368_TXCLK_DLY_ENA_GMAC_ENABLE |
+ pdata->rx_delay << RK3368_CLK_RX_DL_CFG_GMAC_SHIFT |
+ pdata->tx_delay << RK3368_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
{
struct rk3399_grf_regs *grf;
.set_to_rgmii = rk3288_gmac_set_to_rgmii,
};
+const struct rk_gmac_ops rk3368_gmac_ops = {
+ .fix_mac_speed = rk3368_gmac_fix_mac_speed,
+ .set_to_rgmii = rk3368_gmac_set_to_rgmii,
+};
+
const struct rk_gmac_ops rk3399_gmac_ops = {
.fix_mac_speed = rk3399_gmac_fix_mac_speed,
.set_to_rgmii = rk3399_gmac_set_to_rgmii,
static const struct udevice_id rockchip_gmac_ids[] = {
{ .compatible = "rockchip,rk3288-gmac",
.data = (ulong)&rk3288_gmac_ops },
+ { .compatible = "rockchip,rk3368-gmac",
+ .data = (ulong)&rk3368_gmac_ops },
{ .compatible = "rockchip,rk3399-gmac",
.data = (ulong)&rk3399_gmac_ops },
{ }
{
uchar v_mac[6];
- if (!eth_getenv_enetaddr("ethaddr", v_mac)) {
+ if (!eth_env_get_enetaddr("ethaddr", v_mac)) {
/* get ROM mac value if any */
if (!get_rom_mac(dev, v_mac)) {
printf("\n*** ERROR: ethaddr is NOT set !!\n");
return -1;
}
- eth_setenv_enetaddr("ethaddr", v_mac);
+ eth_env_set_enetaddr("ethaddr", v_mac);
}
smc_set_mac_addr(v_mac); /* use old function to update smc default */
#ifdef CONFIG_PHYLIB
if (priv->phydev && bus != NULL)
phy_shutdown(priv->phydev);
- else
+ else {
free(priv->phydev);
+ priv->phydev = NULL;
+ }
#endif
ldpaa_dpbp_free();
if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE) {
#ifdef CONFIG_SYS_FEC1_IOBASE
volatile fec_t *fecp1 = (fec_t *) (CONFIG_SYS_FEC1_IOBASE);
- eth_getenv_enetaddr("eth1addr", ea);
+ eth_env_get_enetaddr("eth1addr", ea);
fecp1->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp1->paur = (ea[4] << 24) | (ea[5] << 16);
#endif
- eth_getenv_enetaddr("ethaddr", ea);
+ eth_env_get_enetaddr("ethaddr", ea);
fecp->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp->paur = (ea[4] << 24) | (ea[5] << 16);
} else {
#ifdef CONFIG_SYS_FEC0_IOBASE
volatile fec_t *fecp0 = (fec_t *) (CONFIG_SYS_FEC0_IOBASE);
- eth_getenv_enetaddr("ethaddr", ea);
+ eth_env_get_enetaddr("ethaddr", ea);
fecp0->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp0->paur = (ea[4] << 24) | (ea[5] << 16);
#endif
#ifdef CONFIG_SYS_FEC1_IOBASE
- eth_getenv_enetaddr("eth1addr", ea);
+ eth_env_get_enetaddr("eth1addr", ea);
fecp->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp->paur = (ea[4] << 24) | (ea[5] << 16);
* to the MAC address value in the environment, so we do not read
* it from the prom or eeprom if it is specified in the environment.
*/
- if (!eth_getenv_enetaddr("ethaddr", dev->enetaddr)) {
+ if (!eth_env_get_enetaddr("ethaddr", dev->enetaddr)) {
/* If the MAC address is not in the environment, get it: */
if (!get_prom(dev->enetaddr, nic.base)) /* get MAC from prom */
dp83902a_init(dev->enetaddr); /* fallback: seeprom */
/* And write it into the environment otherwise eth_write_hwaddr
- * returns -1 due to eth_getenv_enetaddr_by_index() failing,
+ * returns -1 due to eth_env_get_enetaddr_by_index() failing,
* and this causes "Warning: failed to set MAC address", and
* cmd_bdinfo has no ethaddr value which it can show: */
- eth_setenv_enetaddr("ethaddr", dev->enetaddr);
+ eth_env_set_enetaddr("ethaddr", dev->enetaddr);
}
return 0;
}
/* update only when the environment has changed */
if (env_changed_id != env_id) {
- netmask = getenv_ip("netmask");
- our_ip = getenv_ip("ipaddr");
+ netmask = env_get_ip("netmask");
+ our_ip = env_get_ip("ipaddr");
env_changed_id = env_id;
}
/* update only when the environment has changed */
if (env_changed_id != env_id) {
- if (getenv("ncip")) {
- nc_ip = getenv_ip("ncip");
+ if (env_get("ncip")) {
+ nc_ip = env_get_ip("ncip");
if (!nc_ip.s_addr)
return -1; /* ncip is 0.0.0.0 */
- p = strchr(getenv("ncip"), ':');
+ p = strchr(env_get("ncip"), ':');
if (p != NULL) {
nc_out_port = simple_strtoul(p + 1, NULL, 10);
nc_in_port = nc_out_port;
nc_ip.s_addr = ~0; /* ncip is not set, so broadcast */
}
- p = getenv("ncoutport");
+ p = env_get("ncoutport");
if (p != NULL)
nc_out_port = simple_strtoul(p, NULL, 10);
- p = getenv("ncinport");
+ p = env_get("ncinport");
if (p != NULL)
nc_in_port = simple_strtoul(p, NULL, 10);
if (ret)
return ret;
- if (getenv("disable_giga"))
+ if (env_get("disable_giga"))
features &= ~(SUPPORTED_1000baseT_Half |
SUPPORTED_1000baseT_Full);
/* force master mode for 1000BaseT due to chip errata */
return ret;
/* add an option to disable the gigabit feature of this PHY */
- if (getenv("disable_giga")) {
+ if (env_get("disable_giga")) {
unsigned features;
unsigned bmcr;
if (strcmp(interface, "lo") == 0) {
priv->local = 1;
- setenv("ipaddr", "127.0.0.1");
- setenv("serverip", "127.0.0.1");
+ env_set("ipaddr", "127.0.0.1");
+ env_set("serverip", "127.0.0.1");
}
return sandbox_eth_raw_os_start(interface, pdata->enetaddr, priv);
}
if (retval < 0)
return retval;
- if (!eth_getenv_enetaddr("ethaddr", dev->enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", dev->enetaddr))
puts("Please set MAC address\n");
return ret;
--- /dev/null
+#
+# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+config NVME
+ bool "NVM Express device support"
+ depends on BLK && PCI
+ help
+ This option enables support for NVM Express devices.
+ It supports basic functions of NVMe (read/write).
--- /dev/null
+#
+# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += nvme-uclass.o nvme.o nvme_show.o
--- /dev/null
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/device.h>
+#include "nvme.h"
+
+static int nvme_info_init(struct uclass *uc)
+{
+ struct nvme_info *info = (struct nvme_info *)uc->priv;
+
+ info->ns_num = 0;
+ info->ndev_num = 0;
+ INIT_LIST_HEAD(&info->dev_list);
+ nvme_info = info;
+
+ return 0;
+}
+
+static int nvme_uclass_post_probe(struct udevice *udev)
+{
+ char name[20];
+ char *str;
+ struct udevice *ns_udev;
+ int i, ret;
+ struct nvme_dev *ndev = dev_get_priv(udev);
+
+ /* Create a blk device for each namespace */
+ for (i = 0; i < ndev->nn; i++) {
+ sprintf(name, "nvme-blk#%d", nvme_info->ns_num);
+ str = strdup(name);
+ if (!str)
+ return -ENOMEM;
+
+ /* The real blksz and size will be set by nvme_blk_probe() */
+ ret = blk_create_device(udev, "nvme-blk", str, IF_TYPE_NVME,
+ nvme_info->ns_num++, 512, 0, &ns_udev);
+ if (ret) {
+ free(str);
+ nvme_info->ns_num--;
+
+ return ret;
+ }
+ device_set_name_alloced(ns_udev);
+ }
+
+ return 0;
+}
+
+UCLASS_DRIVER(nvme) = {
+ .name = "nvme",
+ .id = UCLASS_NVME,
+ .init = nvme_info_init,
+ .post_probe = nvme_uclass_post_probe,
+ .priv_auto_alloc_size = sizeof(struct nvme_info),
+};
--- /dev/null
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <memalign.h>
+#include <pci.h>
+#include <dm/device-internal.h>
+#include "nvme.h"
+
+struct nvme_info *nvme_info;
+
+#define NVME_Q_DEPTH 2
+#define NVME_AQ_DEPTH 2
+#define NVME_SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
+#define NVME_CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
+#define ADMIN_TIMEOUT 60
+#define IO_TIMEOUT 30
+#define MAX_PRP_POOL 512
+
+/*
+ * An NVM Express queue. Each device has at least two (one for admin
+ * commands and one for I/O commands).
+ */
+struct nvme_queue {
+ struct nvme_dev *dev;
+ struct nvme_command *sq_cmds;
+ struct nvme_completion *cqes;
+ wait_queue_head_t sq_full;
+ u32 __iomem *q_db;
+ u16 q_depth;
+ s16 cq_vector;
+ u16 sq_head;
+ u16 sq_tail;
+ u16 cq_head;
+ u16 qid;
+ u8 cq_phase;
+ u8 cqe_seen;
+ unsigned long cmdid_data[];
+};
+
+static int nvme_wait_ready(struct nvme_dev *dev, bool enabled)
+{
+ u32 bit = enabled ? NVME_CSTS_RDY : 0;
+
+ while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit)
+ udelay(10000);
+
+ return 0;
+}
+
+static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
+ int total_len, u64 dma_addr)
+{
+ u32 page_size = dev->page_size;
+ int offset = dma_addr & (page_size - 1);
+ u64 *prp_pool;
+ int length = total_len;
+ int i, nprps;
+ length -= (page_size - offset);
+
+ if (length <= 0) {
+ *prp2 = 0;
+ return 0;
+ }
+
+ if (length)
+ dma_addr += (page_size - offset);
+
+ if (length <= page_size) {
+ *prp2 = dma_addr;
+ return 0;
+ }
+
+ nprps = DIV_ROUND_UP(length, page_size);
+
+ if (nprps > dev->prp_entry_num) {
+ free(dev->prp_pool);
+ dev->prp_pool = malloc(nprps << 3);
+ if (!dev->prp_pool) {
+ printf("Error: malloc prp_pool fail\n");
+ return -ENOMEM;
+ }
+ dev->prp_entry_num = nprps;
+ }
+
+ prp_pool = dev->prp_pool;
+ i = 0;
+ while (nprps) {
+ if (i == ((page_size >> 3) - 1)) {
+ *(prp_pool + i) = cpu_to_le64((ulong)prp_pool +
+ page_size);
+ i = 0;
+ prp_pool += page_size;
+ }
+ *(prp_pool + i++) = cpu_to_le64(dma_addr);
+ dma_addr += page_size;
+ nprps--;
+ }
+ *prp2 = (ulong)dev->prp_pool;
+
+ return 0;
+}
+
+static __le16 nvme_get_cmd_id(void)
+{
+ static unsigned short cmdid;
+
+ return cpu_to_le16((cmdid < USHRT_MAX) ? cmdid++ : 0);
+}
+
+static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index)
+{
+ u64 start = (ulong)&nvmeq->cqes[index];
+ u64 stop = start + sizeof(struct nvme_completion);
+
+ invalidate_dcache_range(start, stop);
+
+ return le16_to_cpu(readw(&(nvmeq->cqes[index].status)));
+}
+
+/**
+ * nvme_submit_cmd() - copy a command into a queue and ring the doorbell
+ *
+ * @nvmeq: The queue to use
+ * @cmd: The command to send
+ */
+static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
+{
+ u16 tail = nvmeq->sq_tail;
+
+ memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
+ flush_dcache_range((ulong)&nvmeq->sq_cmds[tail],
+ (ulong)&nvmeq->sq_cmds[tail] + sizeof(*cmd));
+
+ if (++tail == nvmeq->q_depth)
+ tail = 0;
+ writel(tail, nvmeq->q_db);
+ nvmeq->sq_tail = tail;
+}
+
+static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
+ struct nvme_command *cmd,
+ u32 *result, unsigned timeout)
+{
+ u16 head = nvmeq->cq_head;
+ u16 phase = nvmeq->cq_phase;
+ u16 status;
+ ulong start_time;
+ ulong timeout_us = timeout * 100000;
+
+ cmd->common.command_id = nvme_get_cmd_id();
+ nvme_submit_cmd(nvmeq, cmd);
+
+ start_time = timer_get_us();
+
+ for (;;) {
+ status = nvme_read_completion_status(nvmeq, head);
+ if ((status & 0x01) == phase)
+ break;
+ if (timeout_us > 0 && (timer_get_us() - start_time)
+ >= timeout_us)
+ return -ETIMEDOUT;
+ }
+
+ status >>= 1;
+ if (status) {
+ printf("ERROR: status = %x, phase = %d, head = %d\n",
+ status, phase, head);
+ status = 0;
+ if (++head == nvmeq->q_depth) {
+ head = 0;
+ phase = !phase;
+ }
+ writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
+ nvmeq->cq_head = head;
+ nvmeq->cq_phase = phase;
+
+ return -EIO;
+ }
+
+ if (result)
+ *result = le32_to_cpu(readl(&(nvmeq->cqes[head].result)));
+
+ if (++head == nvmeq->q_depth) {
+ head = 0;
+ phase = !phase;
+ }
+ writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
+ nvmeq->cq_head = head;
+ nvmeq->cq_phase = phase;
+
+ return status;
+}
+
+static int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
+ u32 *result)
+{
+ return nvme_submit_sync_cmd(dev->queues[0], cmd, result, ADMIN_TIMEOUT);
+}
+
+static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev,
+ int qid, int depth)
+{
+ struct nvme_queue *nvmeq = malloc(sizeof(*nvmeq));
+ if (!nvmeq)
+ return NULL;
+ memset(nvmeq, 0, sizeof(*nvmeq));
+
+ nvmeq->cqes = (void *)memalign(4096, NVME_CQ_SIZE(depth));
+ if (!nvmeq->cqes)
+ goto free_nvmeq;
+ memset((void *)nvmeq->cqes, 0, NVME_CQ_SIZE(depth));
+
+ nvmeq->sq_cmds = (void *)memalign(4096, NVME_SQ_SIZE(depth));
+ if (!nvmeq->sq_cmds)
+ goto free_queue;
+ memset((void *)nvmeq->sq_cmds, 0, NVME_SQ_SIZE(depth));
+
+ nvmeq->dev = dev;
+
+ nvmeq->cq_head = 0;
+ nvmeq->cq_phase = 1;
+ nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
+ nvmeq->q_depth = depth;
+ nvmeq->qid = qid;
+ dev->queue_count++;
+ dev->queues[qid] = nvmeq;
+
+ return nvmeq;
+
+ free_queue:
+ free((void *)nvmeq->cqes);
+ free_nvmeq:
+ free(nvmeq);
+
+ return NULL;
+}
+
+static int nvme_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
+{
+ struct nvme_command c;
+
+ memset(&c, 0, sizeof(c));
+ c.delete_queue.opcode = opcode;
+ c.delete_queue.qid = cpu_to_le16(id);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+static int nvme_delete_sq(struct nvme_dev *dev, u16 sqid)
+{
+ return nvme_delete_queue(dev, nvme_admin_delete_sq, sqid);
+}
+
+static int nvme_delete_cq(struct nvme_dev *dev, u16 cqid)
+{
+ return nvme_delete_queue(dev, nvme_admin_delete_cq, cqid);
+}
+
+static int nvme_enable_ctrl(struct nvme_dev *dev)
+{
+ dev->ctrl_config &= ~NVME_CC_SHN_MASK;
+ dev->ctrl_config |= NVME_CC_ENABLE;
+ writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
+
+ return nvme_wait_ready(dev, true);
+}
+
+static int nvme_disable_ctrl(struct nvme_dev *dev)
+{
+ dev->ctrl_config &= ~NVME_CC_SHN_MASK;
+ dev->ctrl_config &= ~NVME_CC_ENABLE;
+ writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
+
+ return nvme_wait_ready(dev, false);
+}
+
+static void nvme_free_queue(struct nvme_queue *nvmeq)
+{
+ free((void *)nvmeq->cqes);
+ free(nvmeq->sq_cmds);
+ free(nvmeq);
+}
+
+static void nvme_free_queues(struct nvme_dev *dev, int lowest)
+{
+ int i;
+
+ for (i = dev->queue_count - 1; i >= lowest; i--) {
+ struct nvme_queue *nvmeq = dev->queues[i];
+ dev->queue_count--;
+ dev->queues[i] = NULL;
+ nvme_free_queue(nvmeq);
+ }
+}
+
+static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
+{
+ struct nvme_dev *dev = nvmeq->dev;
+
+ nvmeq->sq_tail = 0;
+ nvmeq->cq_head = 0;
+ nvmeq->cq_phase = 1;
+ nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
+ memset((void *)nvmeq->cqes, 0, NVME_CQ_SIZE(nvmeq->q_depth));
+ flush_dcache_range((ulong)nvmeq->cqes,
+ (ulong)nvmeq->cqes + NVME_CQ_SIZE(nvmeq->q_depth));
+ dev->online_queues++;
+}
+
+static int nvme_configure_admin_queue(struct nvme_dev *dev)
+{
+ int result;
+ u32 aqa;
+ u64 cap = nvme_readq(&dev->bar->cap);
+ struct nvme_queue *nvmeq;
+ /* most architectures use 4KB as the page size */
+ unsigned page_shift = 12;
+ unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
+ unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
+
+ if (page_shift < dev_page_min) {
+ debug("Device minimum page size (%u) too large for host (%u)\n",
+ 1 << dev_page_min, 1 << page_shift);
+ return -ENODEV;
+ }
+
+ if (page_shift > dev_page_max) {
+ debug("Device maximum page size (%u) smaller than host (%u)\n",
+ 1 << dev_page_max, 1 << page_shift);
+ page_shift = dev_page_max;
+ }
+
+ result = nvme_disable_ctrl(dev);
+ if (result < 0)
+ return result;
+
+ nvmeq = dev->queues[0];
+ if (!nvmeq) {
+ nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
+ if (!nvmeq)
+ return -ENOMEM;
+ }
+
+ aqa = nvmeq->q_depth - 1;
+ aqa |= aqa << 16;
+ aqa |= aqa << 16;
+
+ dev->page_size = 1 << page_shift;
+
+ dev->ctrl_config = NVME_CC_CSS_NVM;
+ dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
+ dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
+ dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
+
+ writel(aqa, &dev->bar->aqa);
+ nvme_writeq((ulong)nvmeq->sq_cmds, &dev->bar->asq);
+ nvme_writeq((ulong)nvmeq->cqes, &dev->bar->acq);
+
+ result = nvme_enable_ctrl(dev);
+ if (result)
+ goto free_nvmeq;
+
+ nvmeq->cq_vector = 0;
+
+ nvme_init_queue(dev->queues[0], 0);
+
+ return result;
+
+ free_nvmeq:
+ nvme_free_queues(dev, 0);
+
+ return result;
+}
+
+static int nvme_alloc_cq(struct nvme_dev *dev, u16 qid,
+ struct nvme_queue *nvmeq)
+{
+ struct nvme_command c;
+ int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
+
+ memset(&c, 0, sizeof(c));
+ c.create_cq.opcode = nvme_admin_create_cq;
+ c.create_cq.prp1 = cpu_to_le64((ulong)nvmeq->cqes);
+ c.create_cq.cqid = cpu_to_le16(qid);
+ c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
+ c.create_cq.cq_flags = cpu_to_le16(flags);
+ c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+static int nvme_alloc_sq(struct nvme_dev *dev, u16 qid,
+ struct nvme_queue *nvmeq)
+{
+ struct nvme_command c;
+ int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
+
+ memset(&c, 0, sizeof(c));
+ c.create_sq.opcode = nvme_admin_create_sq;
+ c.create_sq.prp1 = cpu_to_le64((ulong)nvmeq->sq_cmds);
+ c.create_sq.sqid = cpu_to_le16(qid);
+ c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
+ c.create_sq.sq_flags = cpu_to_le16(flags);
+ c.create_sq.cqid = cpu_to_le16(qid);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+int nvme_identify(struct nvme_dev *dev, unsigned nsid,
+ unsigned cns, dma_addr_t dma_addr)
+{
+ struct nvme_command c;
+ u32 page_size = dev->page_size;
+ int offset = dma_addr & (page_size - 1);
+ int length = sizeof(struct nvme_id_ctrl);
+
+ memset(&c, 0, sizeof(c));
+ c.identify.opcode = nvme_admin_identify;
+ c.identify.nsid = cpu_to_le32(nsid);
+ c.identify.prp1 = cpu_to_le64(dma_addr);
+
+ length -= (page_size - offset);
+ if (length <= 0) {
+ c.identify.prp2 = 0;
+ } else {
+ dma_addr += (page_size - offset);
+ c.identify.prp2 = dma_addr;
+ }
+
+ c.identify.cns = cpu_to_le32(cns);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
+ dma_addr_t dma_addr, u32 *result)
+{
+ struct nvme_command c;
+
+ memset(&c, 0, sizeof(c));
+ c.features.opcode = nvme_admin_get_features;
+ c.features.nsid = cpu_to_le32(nsid);
+ c.features.prp1 = cpu_to_le64(dma_addr);
+ c.features.fid = cpu_to_le32(fid);
+
+ return nvme_submit_admin_cmd(dev, &c, result);
+}
+
+int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
+ dma_addr_t dma_addr, u32 *result)
+{
+ struct nvme_command c;
+
+ memset(&c, 0, sizeof(c));
+ c.features.opcode = nvme_admin_set_features;
+ c.features.prp1 = cpu_to_le64(dma_addr);
+ c.features.fid = cpu_to_le32(fid);
+ c.features.dword11 = cpu_to_le32(dword11);
+
+ return nvme_submit_admin_cmd(dev, &c, result);
+}
+
+static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
+{
+ struct nvme_dev *dev = nvmeq->dev;
+ int result;
+
+ nvmeq->cq_vector = qid - 1;
+ result = nvme_alloc_cq(dev, qid, nvmeq);
+ if (result < 0)
+ goto release_cq;
+
+ result = nvme_alloc_sq(dev, qid, nvmeq);
+ if (result < 0)
+ goto release_sq;
+
+ nvme_init_queue(nvmeq, qid);
+
+ return result;
+
+ release_sq:
+ nvme_delete_sq(dev, qid);
+ release_cq:
+ nvme_delete_cq(dev, qid);
+
+ return result;
+}
+
+static int nvme_set_queue_count(struct nvme_dev *dev, int count)
+{
+ int status;
+ u32 result;
+ u32 q_count = (count - 1) | ((count - 1) << 16);
+
+ status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES,
+ q_count, 0, &result);
+
+ if (status < 0)
+ return status;
+ if (status > 1)
+ return 0;
+
+ return min(result & 0xffff, result >> 16) + 1;
+}
+
+static void nvme_create_io_queues(struct nvme_dev *dev)
+{
+ unsigned int i;
+
+ for (i = dev->queue_count; i <= dev->max_qid; i++)
+ if (!nvme_alloc_queue(dev, i, dev->q_depth))
+ break;
+
+ for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
+ if (nvme_create_queue(dev->queues[i], i))
+ break;
+}
+
+static int nvme_setup_io_queues(struct nvme_dev *dev)
+{
+ int nr_io_queues;
+ int result;
+
+ nr_io_queues = 1;
+ result = nvme_set_queue_count(dev, nr_io_queues);
+ if (result <= 0)
+ return result;
+
+ if (result < nr_io_queues)
+ nr_io_queues = result;
+
+ dev->max_qid = nr_io_queues;
+
+ /* Free previously allocated queues */
+ nvme_free_queues(dev, nr_io_queues + 1);
+ nvme_create_io_queues(dev);
+
+ return 0;
+}
+
+static int nvme_get_info_from_identify(struct nvme_dev *dev)
+{
+ u16 vendor, device;
+ struct nvme_id_ctrl buf, *ctrl = &buf;
+ int ret;
+ int shift = NVME_CAP_MPSMIN(nvme_readq(&dev->bar->cap)) + 12;
+
+ ret = nvme_identify(dev, 0, 1, (dma_addr_t)ctrl);
+ if (ret)
+ return -EIO;
+
+ dev->nn = le32_to_cpu(ctrl->nn);
+ dev->vwc = ctrl->vwc;
+ memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
+ memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
+ memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
+ if (ctrl->mdts)
+ dev->max_transfer_shift = (ctrl->mdts + shift);
+ else {
+ /*
+ * Maximum Data Transfer Size (MDTS) field indicates the maximum
+ * data transfer size between the host and the controller. The
+ * host should not submit a command that exceeds this transfer
+ * size. The value is in units of the minimum memory page size
+ * and is reported as a power of two (2^n).
+ *
+ * The spec also says: a value of 0h indicates no restrictions
+ * on transfer size. But in nvme_blk_read/write() below we have
+ * the following algorithm for maximum number of logic blocks
+ * per transfer:
+ *
+ * u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+ *
+ * In order for lbas not to overflow, the maximum number is 15
+ * which means dev->max_transfer_shift = 15 + 9 (ns->lba_shift).
+ * Let's use 20 which provides 1MB size.
+ */
+ dev->max_transfer_shift = 20;
+ }
+
+ /* Apply quirk stuff */
+ dm_pci_read_config16(dev->pdev, PCI_VENDOR_ID, &vendor);
+ dm_pci_read_config16(dev->pdev, PCI_DEVICE_ID, &device);
+ if ((vendor == PCI_VENDOR_ID_INTEL) &&
+ (device == 0x0953) && ctrl->vs[3]) {
+ unsigned int max_transfer_shift;
+ dev->stripe_size = (ctrl->vs[3] + shift);
+ max_transfer_shift = (ctrl->vs[3] + 18);
+ if (dev->max_transfer_shift) {
+ dev->max_transfer_shift = min(max_transfer_shift,
+ dev->max_transfer_shift);
+ } else {
+ dev->max_transfer_shift = max_transfer_shift;
+ }
+ }
+
+ return 0;
+}
+
+int nvme_scan_namespace(void)
+{
+ struct uclass *uc;
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get(UCLASS_NVME, &uc);
+ if (ret)
+ return ret;
+
+ uclass_foreach_dev(dev, uc) {
+ ret = device_probe(dev);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int nvme_blk_probe(struct udevice *udev)
+{
+ struct nvme_dev *ndev = dev_get_priv(udev->parent);
+ struct blk_desc *desc = dev_get_uclass_platdata(udev);
+ struct nvme_ns *ns = dev_get_priv(udev);
+ u8 flbas;
+ u16 vendor;
+ struct nvme_id_ns buf, *id = &buf;
+
+ memset(ns, 0, sizeof(*ns));
+ ns->dev = ndev;
+ ns->ns_id = desc->devnum - ndev->blk_dev_start + 1;
+ if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)id))
+ return -EIO;
+
+ flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
+ ns->flbas = flbas;
+ ns->lba_shift = id->lbaf[flbas].ds;
+ ns->mode_select_num_blocks = le64_to_cpu(id->nsze);
+ ns->mode_select_block_len = 1 << ns->lba_shift;
+ list_add(&ns->list, &ndev->namespaces);
+
+ desc->lba = ns->mode_select_num_blocks;
+ desc->log2blksz = ns->lba_shift;
+ desc->blksz = 1 << ns->lba_shift;
+ desc->bdev = udev;
+ dm_pci_read_config16(ndev->pdev, PCI_VENDOR_ID, &vendor);
+ sprintf(desc->vendor, "0x%.4x", vendor);
+ memcpy(desc->product, ndev->serial, sizeof(ndev->serial));
+ memcpy(desc->revision, ndev->firmware_rev, sizeof(ndev->firmware_rev));
+ part_init(desc);
+
+ return 0;
+}
+
+static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer)
+{
+ struct nvme_ns *ns = dev_get_priv(udev);
+ struct nvme_dev *dev = ns->dev;
+ struct nvme_command c;
+ struct blk_desc *desc = dev_get_uclass_platdata(udev);
+ int status;
+ u64 prp2;
+ u64 total_len = blkcnt << desc->log2blksz;
+ u64 temp_len = total_len;
+
+ u64 slba = blknr;
+ u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+ u64 total_lbas = blkcnt;
+
+ c.rw.opcode = nvme_cmd_read;
+ c.rw.flags = 0;
+ c.rw.nsid = cpu_to_le32(ns->ns_id);
+ c.rw.control = 0;
+ c.rw.dsmgmt = 0;
+ c.rw.reftag = 0;
+ c.rw.apptag = 0;
+ c.rw.appmask = 0;
+ c.rw.metadata = 0;
+
+ while (total_lbas) {
+ if (total_lbas < lbas) {
+ lbas = (u16)total_lbas;
+ total_lbas = 0;
+ } else {
+ total_lbas -= lbas;
+ }
+
+ if (nvme_setup_prps
+ (dev, &prp2, lbas << ns->lba_shift, (ulong)buffer))
+ return -EIO;
+ c.rw.slba = cpu_to_le64(slba);
+ slba += lbas;
+ c.rw.length = cpu_to_le16(lbas - 1);
+ c.rw.prp1 = cpu_to_le64((ulong)buffer);
+ c.rw.prp2 = cpu_to_le64(prp2);
+ status = nvme_submit_sync_cmd(dev->queues[1],
+ &c, NULL, IO_TIMEOUT);
+ if (status)
+ break;
+ temp_len -= lbas << ns->lba_shift;
+ buffer += lbas << ns->lba_shift;
+ }
+
+ return (total_len - temp_len) >> desc->log2blksz;
+}
+
+static ulong nvme_blk_write(struct udevice *udev, lbaint_t blknr,
+ lbaint_t blkcnt, const void *buffer)
+{
+ struct nvme_ns *ns = dev_get_priv(udev);
+ struct nvme_dev *dev = ns->dev;
+ struct nvme_command c;
+ struct blk_desc *desc = dev_get_uclass_platdata(udev);
+ int status;
+ u64 prp2;
+ u64 total_len = blkcnt << desc->log2blksz;
+ u64 temp_len = total_len;
+
+ u64 slba = blknr;
+ u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+ u64 total_lbas = blkcnt;
+
+ c.rw.opcode = nvme_cmd_write;
+ c.rw.flags = 0;
+ c.rw.nsid = cpu_to_le32(ns->ns_id);
+ c.rw.control = 0;
+ c.rw.dsmgmt = 0;
+ c.rw.reftag = 0;
+ c.rw.apptag = 0;
+ c.rw.appmask = 0;
+ c.rw.metadata = 0;
+
+ while (total_lbas) {
+ if (total_lbas < lbas) {
+ lbas = (u16)total_lbas;
+ total_lbas = 0;
+ } else {
+ total_lbas -= lbas;
+ }
+
+ if (nvme_setup_prps
+ (dev, &prp2, lbas << ns->lba_shift, (ulong)buffer))
+ return -EIO;
+ c.rw.slba = cpu_to_le64(slba);
+ slba += lbas;
+ c.rw.length = cpu_to_le16(lbas - 1);
+ c.rw.prp1 = cpu_to_le64((ulong)buffer);
+ c.rw.prp2 = cpu_to_le64(prp2);
+ status = nvme_submit_sync_cmd(dev->queues[1],
+ &c, NULL, IO_TIMEOUT);
+ if (status)
+ break;
+ temp_len -= lbas << ns->lba_shift;
+ buffer += lbas << ns->lba_shift;
+ }
+
+ return (total_len - temp_len) >> desc->log2blksz;
+}
+
+static const struct blk_ops nvme_blk_ops = {
+ .read = nvme_blk_read,
+ .write = nvme_blk_write,
+};
+
+U_BOOT_DRIVER(nvme_blk) = {
+ .name = "nvme-blk",
+ .id = UCLASS_BLK,
+ .probe = nvme_blk_probe,
+ .ops = &nvme_blk_ops,
+ .priv_auto_alloc_size = sizeof(struct nvme_ns),
+};
+
+static int nvme_bind(struct udevice *udev)
+{
+ char name[20];
+ sprintf(name, "nvme#%d", nvme_info->ndev_num++);
+
+ return device_set_name(udev, name);
+}
+
+static int nvme_probe(struct udevice *udev)
+{
+ int ret;
+ struct nvme_dev *ndev = dev_get_priv(udev);
+ u64 cap;
+
+ ndev->pdev = pci_get_controller(udev);
+ ndev->instance = trailing_strtol(udev->name);
+
+ INIT_LIST_HEAD(&ndev->namespaces);
+ ndev->bar = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0,
+ PCI_REGION_MEM);
+ if (readl(&ndev->bar->csts) == -1) {
+ ret = -ENODEV;
+ printf("Error: %s: Out of memory!\n", udev->name);
+ goto free_nvme;
+ }
+
+ ndev->queues = malloc(2 * sizeof(struct nvme_queue));
+ if (!ndev->queues) {
+ ret = -ENOMEM;
+ printf("Error: %s: Out of memory!\n", udev->name);
+ goto free_nvme;
+ }
+ memset(ndev->queues, 0, sizeof(2 * sizeof(struct nvme_queue)));
+
+ ndev->prp_pool = malloc(MAX_PRP_POOL);
+ if (!ndev->prp_pool) {
+ ret = -ENOMEM;
+ printf("Error: %s: Out of memory!\n", udev->name);
+ goto free_nvme;
+ }
+ ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
+ cap = nvme_readq(&ndev->bar->cap);
+ ndev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
+ ndev->db_stride = 1 << NVME_CAP_STRIDE(cap);
+ ndev->dbs = ((void __iomem *)ndev->bar) + 4096;
+
+ ret = nvme_configure_admin_queue(ndev);
+ if (ret)
+ goto free_queue;
+
+ ret = nvme_setup_io_queues(ndev);
+ if (ret)
+ goto free_queue;
+
+ nvme_get_info_from_identify(ndev);
+ ndev->blk_dev_start = nvme_info->ns_num;
+ list_add(&ndev->node, &nvme_info->dev_list);
+
+ return 0;
+
+free_queue:
+ free((void *)ndev->queues);
+free_nvme:
+ return ret;
+}
+
+U_BOOT_DRIVER(nvme) = {
+ .name = "nvme",
+ .id = UCLASS_NVME,
+ .bind = nvme_bind,
+ .probe = nvme_probe,
+ .priv_auto_alloc_size = sizeof(struct nvme_dev),
+};
+
+struct pci_device_id nvme_supported[] = {
+ { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, ~0) },
+ {}
+};
+
+U_BOOT_PCI_DEVICE(nvme, nvme_supported);
--- /dev/null
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DRIVER_NVME_H__
+#define __DRIVER_NVME_H__
+
+#include <asm/io.h>
+
+struct nvme_id_power_state {
+ __le16 max_power; /* centiwatts */
+ __u8 rsvd2;
+ __u8 flags;
+ __le32 entry_lat; /* microseconds */
+ __le32 exit_lat; /* microseconds */
+ __u8 read_tput;
+ __u8 read_lat;
+ __u8 write_tput;
+ __u8 write_lat;
+ __le16 idle_power;
+ __u8 idle_scale;
+ __u8 rsvd19;
+ __le16 active_power;
+ __u8 active_work_scale;
+ __u8 rsvd23[9];
+};
+
+enum {
+ NVME_PS_FLAGS_MAX_POWER_SCALE = 1 << 0,
+ NVME_PS_FLAGS_NON_OP_STATE = 1 << 1,
+};
+
+struct nvme_id_ctrl {
+ __le16 vid;
+ __le16 ssvid;
+ char sn[20];
+ char mn[40];
+ char fr[8];
+ __u8 rab;
+ __u8 ieee[3];
+ __u8 mic;
+ __u8 mdts;
+ __u16 cntlid;
+ __u32 ver;
+ __u8 rsvd84[172];
+ __le16 oacs;
+ __u8 acl;
+ __u8 aerl;
+ __u8 frmw;
+ __u8 lpa;
+ __u8 elpe;
+ __u8 npss;
+ __u8 avscc;
+ __u8 apsta;
+ __le16 wctemp;
+ __le16 cctemp;
+ __u8 rsvd270[242];
+ __u8 sqes;
+ __u8 cqes;
+ __u8 rsvd514[2];
+ __le32 nn;
+ __le16 oncs;
+ __le16 fuses;
+ __u8 fna;
+ __u8 vwc;
+ __le16 awun;
+ __le16 awupf;
+ __u8 nvscc;
+ __u8 rsvd531;
+ __le16 acwu;
+ __u8 rsvd534[2];
+ __le32 sgls;
+ __u8 rsvd540[1508];
+ struct nvme_id_power_state psd[32];
+ __u8 vs[1024];
+};
+
+enum {
+ NVME_CTRL_ONCS_COMPARE = 1 << 0,
+ NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
+ NVME_CTRL_ONCS_DSM = 1 << 2,
+ NVME_CTRL_VWC_PRESENT = 1 << 0,
+};
+
+struct nvme_lbaf {
+ __le16 ms;
+ __u8 ds;
+ __u8 rp;
+};
+
+struct nvme_id_ns {
+ __le64 nsze;
+ __le64 ncap;
+ __le64 nuse;
+ __u8 nsfeat;
+ __u8 nlbaf;
+ __u8 flbas;
+ __u8 mc;
+ __u8 dpc;
+ __u8 dps;
+ __u8 nmic;
+ __u8 rescap;
+ __u8 fpi;
+ __u8 rsvd33;
+ __le16 nawun;
+ __le16 nawupf;
+ __le16 nacwu;
+ __le16 nabsn;
+ __le16 nabo;
+ __le16 nabspf;
+ __u16 rsvd46;
+ __le64 nvmcap[2];
+ __u8 rsvd64[40];
+ __u8 nguid[16];
+ __u8 eui64[8];
+ struct nvme_lbaf lbaf[16];
+ __u8 rsvd192[192];
+ __u8 vs[3712];
+};
+
+enum {
+ NVME_NS_FEAT_THIN = 1 << 0,
+ NVME_NS_FLBAS_LBA_MASK = 0xf,
+ NVME_NS_FLBAS_META_EXT = 0x10,
+ NVME_LBAF_RP_BEST = 0,
+ NVME_LBAF_RP_BETTER = 1,
+ NVME_LBAF_RP_GOOD = 2,
+ NVME_LBAF_RP_DEGRADED = 3,
+ NVME_NS_DPC_PI_LAST = 1 << 4,
+ NVME_NS_DPC_PI_FIRST = 1 << 3,
+ NVME_NS_DPC_PI_TYPE3 = 1 << 2,
+ NVME_NS_DPC_PI_TYPE2 = 1 << 1,
+ NVME_NS_DPC_PI_TYPE1 = 1 << 0,
+ NVME_NS_DPS_PI_FIRST = 1 << 3,
+ NVME_NS_DPS_PI_MASK = 0x7,
+ NVME_NS_DPS_PI_TYPE1 = 1,
+ NVME_NS_DPS_PI_TYPE2 = 2,
+ NVME_NS_DPS_PI_TYPE3 = 3,
+};
+
+struct nvme_smart_log {
+ __u8 critical_warning;
+ __u8 temperature[2];
+ __u8 avail_spare;
+ __u8 spare_thresh;
+ __u8 percent_used;
+ __u8 rsvd6[26];
+ __u8 data_units_read[16];
+ __u8 data_units_written[16];
+ __u8 host_reads[16];
+ __u8 host_writes[16];
+ __u8 ctrl_busy_time[16];
+ __u8 power_cycles[16];
+ __u8 power_on_hours[16];
+ __u8 unsafe_shutdowns[16];
+ __u8 media_errors[16];
+ __u8 num_err_log_entries[16];
+ __le32 warning_temp_time;
+ __le32 critical_comp_time;
+ __le16 temp_sensor[8];
+ __u8 rsvd216[296];
+};
+
+enum {
+ NVME_SMART_CRIT_SPARE = 1 << 0,
+ NVME_SMART_CRIT_TEMPERATURE = 1 << 1,
+ NVME_SMART_CRIT_RELIABILITY = 1 << 2,
+ NVME_SMART_CRIT_MEDIA = 1 << 3,
+ NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
+};
+
+struct nvme_lba_range_type {
+ __u8 type;
+ __u8 attributes;
+ __u8 rsvd2[14];
+ __u64 slba;
+ __u64 nlb;
+ __u8 guid[16];
+ __u8 rsvd48[16];
+};
+
+enum {
+ NVME_LBART_TYPE_FS = 0x01,
+ NVME_LBART_TYPE_RAID = 0x02,
+ NVME_LBART_TYPE_CACHE = 0x03,
+ NVME_LBART_TYPE_SWAP = 0x04,
+
+ NVME_LBART_ATTRIB_TEMP = 1 << 0,
+ NVME_LBART_ATTRIB_HIDE = 1 << 1,
+};
+
+struct nvme_reservation_status {
+ __le32 gen;
+ __u8 rtype;
+ __u8 regctl[2];
+ __u8 resv5[2];
+ __u8 ptpls;
+ __u8 resv10[13];
+ struct {
+ __le16 cntlid;
+ __u8 rcsts;
+ __u8 resv3[5];
+ __le64 hostid;
+ __le64 rkey;
+ } regctl_ds[];
+};
+
+/* I/O commands */
+
+enum nvme_opcode {
+ nvme_cmd_flush = 0x00,
+ nvme_cmd_write = 0x01,
+ nvme_cmd_read = 0x02,
+ nvme_cmd_write_uncor = 0x04,
+ nvme_cmd_compare = 0x05,
+ nvme_cmd_write_zeroes = 0x08,
+ nvme_cmd_dsm = 0x09,
+ nvme_cmd_resv_register = 0x0d,
+ nvme_cmd_resv_report = 0x0e,
+ nvme_cmd_resv_acquire = 0x11,
+ nvme_cmd_resv_release = 0x15,
+};
+
+struct nvme_common_command {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __le32 cdw2[2];
+ __le64 metadata;
+ __le64 prp1;
+ __le64 prp2;
+ __le32 cdw10[6];
+};
+
+struct nvme_rw_command {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2;
+ __le64 metadata;
+ __le64 prp1;
+ __le64 prp2;
+ __le64 slba;
+ __le16 length;
+ __le16 control;
+ __le32 dsmgmt;
+ __le32 reftag;
+ __le16 apptag;
+ __le16 appmask;
+};
+
+enum {
+ NVME_RW_LR = 1 << 15,
+ NVME_RW_FUA = 1 << 14,
+ NVME_RW_DSM_FREQ_UNSPEC = 0,
+ NVME_RW_DSM_FREQ_TYPICAL = 1,
+ NVME_RW_DSM_FREQ_RARE = 2,
+ NVME_RW_DSM_FREQ_READS = 3,
+ NVME_RW_DSM_FREQ_WRITES = 4,
+ NVME_RW_DSM_FREQ_RW = 5,
+ NVME_RW_DSM_FREQ_ONCE = 6,
+ NVME_RW_DSM_FREQ_PREFETCH = 7,
+ NVME_RW_DSM_FREQ_TEMP = 8,
+ NVME_RW_DSM_LATENCY_NONE = 0 << 4,
+ NVME_RW_DSM_LATENCY_IDLE = 1 << 4,
+ NVME_RW_DSM_LATENCY_NORM = 2 << 4,
+ NVME_RW_DSM_LATENCY_LOW = 3 << 4,
+ NVME_RW_DSM_SEQ_REQ = 1 << 6,
+ NVME_RW_DSM_COMPRESSED = 1 << 7,
+ NVME_RW_PRINFO_PRCHK_REF = 1 << 10,
+ NVME_RW_PRINFO_PRCHK_APP = 1 << 11,
+ NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12,
+ NVME_RW_PRINFO_PRACT = 1 << 13,
+};
+
+struct nvme_dsm_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[2];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 nr;
+ __le32 attributes;
+ __u32 rsvd12[4];
+};
+
+enum {
+ NVME_DSMGMT_IDR = 1 << 0,
+ NVME_DSMGMT_IDW = 1 << 1,
+ NVME_DSMGMT_AD = 1 << 2,
+};
+
+struct nvme_dsm_range {
+ __le32 cattr;
+ __le32 nlb;
+ __le64 slba;
+};
+
+/* Admin commands */
+
+enum nvme_admin_opcode {
+ nvme_admin_delete_sq = 0x00,
+ nvme_admin_create_sq = 0x01,
+ nvme_admin_get_log_page = 0x02,
+ nvme_admin_delete_cq = 0x04,
+ nvme_admin_create_cq = 0x05,
+ nvme_admin_identify = 0x06,
+ nvme_admin_abort_cmd = 0x08,
+ nvme_admin_set_features = 0x09,
+ nvme_admin_get_features = 0x0a,
+ nvme_admin_async_event = 0x0c,
+ nvme_admin_activate_fw = 0x10,
+ nvme_admin_download_fw = 0x11,
+ nvme_admin_format_nvm = 0x80,
+ nvme_admin_security_send = 0x81,
+ nvme_admin_security_recv = 0x82,
+};
+
+enum {
+ NVME_QUEUE_PHYS_CONTIG = (1 << 0),
+ NVME_CQ_IRQ_ENABLED = (1 << 1),
+ NVME_SQ_PRIO_URGENT = (0 << 1),
+ NVME_SQ_PRIO_HIGH = (1 << 1),
+ NVME_SQ_PRIO_MEDIUM = (2 << 1),
+ NVME_SQ_PRIO_LOW = (3 << 1),
+ NVME_FEAT_ARBITRATION = 0x01,
+ NVME_FEAT_POWER_MGMT = 0x02,
+ NVME_FEAT_LBA_RANGE = 0x03,
+ NVME_FEAT_TEMP_THRESH = 0x04,
+ NVME_FEAT_ERR_RECOVERY = 0x05,
+ NVME_FEAT_VOLATILE_WC = 0x06,
+ NVME_FEAT_NUM_QUEUES = 0x07,
+ NVME_FEAT_IRQ_COALESCE = 0x08,
+ NVME_FEAT_IRQ_CONFIG = 0x09,
+ NVME_FEAT_WRITE_ATOMIC = 0x0a,
+ NVME_FEAT_ASYNC_EVENT = 0x0b,
+ NVME_FEAT_AUTO_PST = 0x0c,
+ NVME_FEAT_SW_PROGRESS = 0x80,
+ NVME_FEAT_HOST_ID = 0x81,
+ NVME_FEAT_RESV_MASK = 0x82,
+ NVME_FEAT_RESV_PERSIST = 0x83,
+ NVME_LOG_ERROR = 0x01,
+ NVME_LOG_SMART = 0x02,
+ NVME_LOG_FW_SLOT = 0x03,
+ NVME_LOG_RESERVATION = 0x80,
+ NVME_FWACT_REPL = (0 << 3),
+ NVME_FWACT_REPL_ACTV = (1 << 3),
+ NVME_FWACT_ACTV = (2 << 3),
+};
+
+struct nvme_identify {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[2];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 cns;
+ __u32 rsvd11[5];
+};
+
+struct nvme_features {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[2];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 fid;
+ __le32 dword11;
+ __u32 rsvd12[4];
+};
+
+struct nvme_create_cq {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[5];
+ __le64 prp1;
+ __u64 rsvd8;
+ __le16 cqid;
+ __le16 qsize;
+ __le16 cq_flags;
+ __le16 irq_vector;
+ __u32 rsvd12[4];
+};
+
+struct nvme_create_sq {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[5];
+ __le64 prp1;
+ __u64 rsvd8;
+ __le16 sqid;
+ __le16 qsize;
+ __le16 sq_flags;
+ __le16 cqid;
+ __u32 rsvd12[4];
+};
+
+struct nvme_delete_queue {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[9];
+ __le16 qid;
+ __u16 rsvd10;
+ __u32 rsvd11[5];
+};
+
+struct nvme_abort_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[9];
+ __le16 sqid;
+ __u16 cid;
+ __u32 rsvd11[5];
+};
+
+struct nvme_download_firmware {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[5];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 numd;
+ __le32 offset;
+ __u32 rsvd12[4];
+};
+
+struct nvme_format_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[4];
+ __le32 cdw10;
+ __u32 rsvd11[5];
+};
+
+struct nvme_command {
+ union {
+ struct nvme_common_command common;
+ struct nvme_rw_command rw;
+ struct nvme_identify identify;
+ struct nvme_features features;
+ struct nvme_create_cq create_cq;
+ struct nvme_create_sq create_sq;
+ struct nvme_delete_queue delete_queue;
+ struct nvme_download_firmware dlfw;
+ struct nvme_format_cmd format;
+ struct nvme_dsm_cmd dsm;
+ struct nvme_abort_cmd abort;
+ };
+};
+
+enum {
+ NVME_SC_SUCCESS = 0x0,
+ NVME_SC_INVALID_OPCODE = 0x1,
+ NVME_SC_INVALID_FIELD = 0x2,
+ NVME_SC_CMDID_CONFLICT = 0x3,
+ NVME_SC_DATA_XFER_ERROR = 0x4,
+ NVME_SC_POWER_LOSS = 0x5,
+ NVME_SC_INTERNAL = 0x6,
+ NVME_SC_ABORT_REQ = 0x7,
+ NVME_SC_ABORT_QUEUE = 0x8,
+ NVME_SC_FUSED_FAIL = 0x9,
+ NVME_SC_FUSED_MISSING = 0xa,
+ NVME_SC_INVALID_NS = 0xb,
+ NVME_SC_CMD_SEQ_ERROR = 0xc,
+ NVME_SC_SGL_INVALID_LAST = 0xd,
+ NVME_SC_SGL_INVALID_COUNT = 0xe,
+ NVME_SC_SGL_INVALID_DATA = 0xf,
+ NVME_SC_SGL_INVALID_METADATA = 0x10,
+ NVME_SC_SGL_INVALID_TYPE = 0x11,
+ NVME_SC_LBA_RANGE = 0x80,
+ NVME_SC_CAP_EXCEEDED = 0x81,
+ NVME_SC_NS_NOT_READY = 0x82,
+ NVME_SC_RESERVATION_CONFLICT = 0x83,
+ NVME_SC_CQ_INVALID = 0x100,
+ NVME_SC_QID_INVALID = 0x101,
+ NVME_SC_QUEUE_SIZE = 0x102,
+ NVME_SC_ABORT_LIMIT = 0x103,
+ NVME_SC_ABORT_MISSING = 0x104,
+ NVME_SC_ASYNC_LIMIT = 0x105,
+ NVME_SC_FIRMWARE_SLOT = 0x106,
+ NVME_SC_FIRMWARE_IMAGE = 0x107,
+ NVME_SC_INVALID_VECTOR = 0x108,
+ NVME_SC_INVALID_LOG_PAGE = 0x109,
+ NVME_SC_INVALID_FORMAT = 0x10a,
+ NVME_SC_FIRMWARE_NEEDS_RESET = 0x10b,
+ NVME_SC_INVALID_QUEUE = 0x10c,
+ NVME_SC_FEATURE_NOT_SAVEABLE = 0x10d,
+ NVME_SC_FEATURE_NOT_CHANGEABLE = 0x10e,
+ NVME_SC_FEATURE_NOT_PER_NS = 0x10f,
+ NVME_SC_FW_NEEDS_RESET_SUBSYS = 0x110,
+ NVME_SC_BAD_ATTRIBUTES = 0x180,
+ NVME_SC_INVALID_PI = 0x181,
+ NVME_SC_READ_ONLY = 0x182,
+ NVME_SC_WRITE_FAULT = 0x280,
+ NVME_SC_READ_ERROR = 0x281,
+ NVME_SC_GUARD_CHECK = 0x282,
+ NVME_SC_APPTAG_CHECK = 0x283,
+ NVME_SC_REFTAG_CHECK = 0x284,
+ NVME_SC_COMPARE_FAILED = 0x285,
+ NVME_SC_ACCESS_DENIED = 0x286,
+ NVME_SC_DNR = 0x4000,
+};
+
+struct nvme_completion {
+ __le32 result; /* Used by admin commands to return data */
+ __u32 rsvd;
+ __le16 sq_head; /* how much of this queue may be reclaimed */
+ __le16 sq_id; /* submission queue that generated this entry */
+ __u16 command_id; /* of the command which completed */
+ __le16 status; /* did the command fail, and if so, why? */
+};
+
+struct nvme_user_io {
+ __u8 opcode;
+ __u8 flags;
+ __u16 control;
+ __u16 nblocks;
+ __u16 rsvd;
+ __u64 metadata;
+ __u64 addr;
+ __u64 slba;
+ __u32 dsmgmt;
+ __u32 reftag;
+ __u16 apptag;
+ __u16 appmask;
+};
+
+struct nvme_passthru_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 rsvd1;
+ __u32 nsid;
+ __u32 cdw2;
+ __u32 cdw3;
+ __u64 metadata;
+ __u64 addr;
+ __u32 metadata_len;
+ __u32 data_len;
+ __u32 cdw10;
+ __u32 cdw11;
+ __u32 cdw12;
+ __u32 cdw13;
+ __u32 cdw14;
+ __u32 cdw15;
+ __u32 timeout_ms;
+ __u32 result;
+};
+
+/*
+ * Registers should always be accessed with double word or quad word
+ * accesses. Registers with 64-bit address pointers should be written
+ * to with dword accesses by writing the low dword first (ptr[0]),
+ * then the high dword (ptr[1]) second.
+ */
+static inline u64 nvme_readq(__le64 volatile *regs)
+{
+#if BITS_PER_LONG == 64
+ return readq(regs);
+#else
+ __u32 *ptr = (__u32 *)regs;
+ u64 val_lo = readl(ptr);
+ u64 val_hi = readl(ptr + 1);
+
+ return val_lo + (val_hi << 32);
+#endif
+}
+
+static inline void nvme_writeq(const u64 val, __le64 volatile *regs)
+{
+#if BITS_PER_LONG == 64
+ writeq(val, regs);
+#else
+ __u32 *ptr = (__u32 *)regs;
+ u32 val_lo = lower_32_bits(val);
+ u32 val_hi = upper_32_bits(val);
+ writel(val_lo, ptr);
+ writel(val_hi, ptr + 1);
+#endif
+}
+
+struct nvme_bar {
+ __u64 cap; /* Controller Capabilities */
+ __u32 vs; /* Version */
+ __u32 intms; /* Interrupt Mask Set */
+ __u32 intmc; /* Interrupt Mask Clear */
+ __u32 cc; /* Controller Configuration */
+ __u32 rsvd1; /* Reserved */
+ __u32 csts; /* Controller Status */
+ __u32 rsvd2; /* Reserved */
+ __u32 aqa; /* Admin Queue Attributes */
+ __u64 asq; /* Admin SQ Base Address */
+ __u64 acq; /* Admin CQ Base Address */
+};
+
+#define NVME_CAP_MQES(cap) ((cap) & 0xffff)
+#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
+#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
+#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
+#define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf)
+
+#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8))
+
+enum {
+ NVME_CC_ENABLE = 1 << 0,
+ NVME_CC_CSS_NVM = 0 << 4,
+ NVME_CC_MPS_SHIFT = 7,
+ NVME_CC_ARB_RR = 0 << 11,
+ NVME_CC_ARB_WRRU = 1 << 11,
+ NVME_CC_ARB_VS = 7 << 11,
+ NVME_CC_SHN_NONE = 0 << 14,
+ NVME_CC_SHN_NORMAL = 1 << 14,
+ NVME_CC_SHN_ABRUPT = 2 << 14,
+ NVME_CC_SHN_MASK = 3 << 14,
+ NVME_CC_IOSQES = 6 << 16,
+ NVME_CC_IOCQES = 4 << 20,
+ NVME_CSTS_RDY = 1 << 0,
+ NVME_CSTS_CFS = 1 << 1,
+ NVME_CSTS_SHST_NORMAL = 0 << 2,
+ NVME_CSTS_SHST_OCCUR = 1 << 2,
+ NVME_CSTS_SHST_CMPLT = 2 << 2,
+ NVME_CSTS_SHST_MASK = 3 << 2,
+};
+
+/* Represents an NVM Express device. Each nvme_dev is a PCI function. */
+struct nvme_dev {
+ struct list_head node;
+ struct nvme_queue **queues;
+ u32 __iomem *dbs;
+ unsigned int cardnum;
+ struct udevice *pdev;
+ pci_dev_t pci_dev;
+ int instance;
+ uint8_t *hw_addr;
+ unsigned queue_count;
+ unsigned online_queues;
+ unsigned max_qid;
+ int q_depth;
+ u32 db_stride;
+ u32 ctrl_config;
+ struct nvme_bar __iomem *bar;
+ struct list_head namespaces;
+ const char *name;
+ char serial[20];
+ char model[40];
+ char firmware_rev[8];
+ u32 max_transfer_shift;
+ u32 stripe_size;
+ u32 page_size;
+ u16 oncs;
+ u16 abort_limit;
+ u8 event_limit;
+ u8 vwc;
+ u64 *prp_pool;
+ u32 prp_entry_num;
+ u32 nn;
+ u32 blk_dev_start;
+};
+
+struct nvme_info {
+ int ns_num; /*the number of nvme namespaces*/
+ int ndev_num; /*the number of nvme devices*/
+ struct list_head dev_list;
+};
+
+/*
+ * The nvme_iod describes the data in an I/O, including the list of PRP
+ * entries. You can't see it in this data structure because C doesn't let
+ * me express that. Use nvme_alloc_iod to ensure there's enough space
+ * allocated to store the PRP list.
+ */
+struct nvme_iod {
+ unsigned long private; /* For the use of the submitter of the I/O */
+ int npages; /* In the PRP list. 0 means small pool in use */
+ int offset; /* Of PRP list */
+ int nents; /* Used in scatterlist */
+ int length; /* Of data, in bytes */
+ dma_addr_t first_dma;
+};
+
+/*
+ * An NVM Express namespace is equivalent to a SCSI LUN.
+ * Each namespace is operated as an independent "device".
+ */
+struct nvme_ns {
+ struct list_head list;
+ struct nvme_dev *dev;
+ unsigned ns_id;
+ int devnum;
+ int lba_shift;
+ u16 ms;
+ u8 flbas;
+ u8 pi_type;
+ u64 mode_select_num_blocks;
+ u32 mode_select_block_len;
+};
+
+extern struct nvme_info *nvme_info;
+
+#endif /* __DRIVER_NVME_H__ */
--- /dev/null
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <nvme.h>
+#include "nvme.h"
+
+static void print_optional_admin_cmd(u16 oacs, int devnum)
+{
+ printf("Blk device %d: Optional Admin Command Support:\n",
+ devnum);
+ printf("\tNamespace Management/Attachment: %s\n",
+ oacs & 0x08 ? "yes" : "no");
+ printf("\tFirmware Commit/Image download: %s\n",
+ oacs & 0x04 ? "yes" : "no");
+ printf("\tFormat NVM: %s\n",
+ oacs & 0x02 ? "yes" : "no");
+ printf("\tSecurity Send/Receive: %s\n",
+ oacs & 0x01 ? "yes" : "no");
+}
+
+static void print_optional_nvm_cmd(u16 oncs, int devnum)
+{
+ printf("Blk device %d: Optional NVM Command Support:\n",
+ devnum);
+ printf("\tReservation: %s\n",
+ oncs & 0x10 ? "yes" : "no");
+ printf("\tSave/Select field in the Set/Get features: %s\n",
+ oncs & 0x08 ? "yes" : "no");
+ printf("\tWrite Zeroes: %s\n",
+ oncs & 0x04 ? "yes" : "no");
+ printf("\tDataset Management: %s\n",
+ oncs & 0x02 ? "yes" : "no");
+ printf("\tWrite Uncorrectable: %s\n",
+ oncs & 0x01 ? "yes" : "no");
+}
+
+static void print_format_nvme_attributes(u8 fna, int devnum)
+{
+ printf("Blk device %d: Format NVM Attributes:\n", devnum);
+ printf("\tSupport Cryptographic Erase: %s\n",
+ fna & 0x04 ? "yes" : "No");
+ printf("\tSupport erase a particular namespace: %s\n",
+ fna & 0x02 ? "No" : "Yes");
+ printf("\tSupport format a particular namespace: %s\n",
+ fna & 0x01 ? "No" : "Yes");
+}
+
+static void print_format(struct nvme_lbaf *lbaf)
+{
+ u8 str[][10] = {"Best", "Better", "Good", "Degraded"};
+
+ printf("\t\tMetadata Size: %d\n", le16_to_cpu(lbaf->ms));
+ printf("\t\tLBA Data Size: %d\n", 1 << lbaf->ds);
+ printf("\t\tRelative Performance: %s\n", str[lbaf->rp & 0x03]);
+}
+
+static void print_formats(struct nvme_id_ns *id, struct nvme_ns *ns)
+{
+ int i;
+
+ printf("Blk device %d: LBA Format Support:\n", ns->devnum);
+
+ for (i = 0; i < id->nlbaf; i++) {
+ printf("\tLBA Foramt %d Support: ", i);
+ if (i == ns->flbas)
+ printf("(current)\n");
+ else
+ printf("\n");
+ print_format(id->lbaf + i);
+ }
+}
+
+static void print_data_protect_cap(u8 dpc, int devnum)
+{
+ printf("Blk device %d: End-to-End Data", devnum);
+ printf("Protect Capabilities:\n");
+ printf("\tAs last eight bytes: %s\n",
+ dpc & 0x10 ? "yes" : "No");
+ printf("\tAs first eight bytes: %s\n",
+ dpc & 0x08 ? "yes" : "No");
+ printf("\tSupport Type3: %s\n",
+ dpc & 0x04 ? "yes" : "No");
+ printf("\tSupport Type2: %s\n",
+ dpc & 0x02 ? "yes" : "No");
+ printf("\tSupport Type1: %s\n",
+ dpc & 0x01 ? "yes" : "No");
+}
+
+static void print_metadata_cap(u8 mc, int devnum)
+{
+ printf("Blk device %d: Metadata capabilities:\n", devnum);
+ printf("\tAs part of a separate buffer: %s\n",
+ mc & 0x02 ? "yes" : "No");
+ printf("\tAs part of an extended data LBA: %s\n",
+ mc & 0x01 ? "yes" : "No");
+}
+
+int nvme_print_info(struct udevice *udev)
+{
+ struct nvme_ns *ns = dev_get_priv(udev);
+ struct nvme_dev *dev = ns->dev;
+ struct nvme_id_ns buf_ns, *id = &buf_ns;
+ struct nvme_id_ctrl buf_ctrl, *ctrl = &buf_ctrl;
+
+ if (nvme_identify(dev, 0, 1, (dma_addr_t)ctrl))
+ return -EIO;
+
+ print_optional_admin_cmd(le16_to_cpu(ctrl->oacs), ns->devnum);
+ print_optional_nvm_cmd(le16_to_cpu(ctrl->oncs), ns->devnum);
+ print_format_nvme_attributes(ctrl->fna, ns->devnum);
+
+ if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)id))
+ return -EIO;
+
+ print_formats(id, ns);
+ print_data_protect_cap(id->dpc, ns->devnum);
+ print_metadata_cap(id->mc, ns->devnum);
+
+ return 0;
+}
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
/* boot from PCIE --master */
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
char pcie[6];
sprintf(pcie, "PCIE%d", pci_info->pci_num);
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
} else {
/* boot from PCIE --master releases slave's core 0 */
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
char pcie[6];
sprintf(pcie, "PCIE%d", pci_info->pci_num);
if (!gd->pcidelay_done) {
/* wait "pcidelay" ms (if defined)... */
- s = getenv("pcidelay");
+ s = env_get("pcidelay");
if (s) {
int val = simple_strtoul(s, NULL, 10);
for (i = 0; i < val; i++)
hose_head = NULL;
/* allow env to disable pci init/enum */
- if (getenv("pcidisable") != NULL)
+ if (env_get("pcidisable") != NULL)
return;
/* now call board specific pci_init()... */
/*
* Only skip configuration if "pciconfighost" is not set
*/
- if (getenv("pciconfighost") == NULL)
+ if (env_get("pciconfighost") == NULL)
return 1;
#else
return 1;
bool ep_mode;
uint svr;
int ret;
+ fdt_size_t cfg_size;
pcie->bus = dev;
if (svr == SVR_LS2088A || svr == SVR_LS2084A ||
svr == SVR_LS2048A || svr == SVR_LS2044A ||
svr == SVR_LS2081A || svr == SVR_LS2041A) {
+ cfg_size = fdt_resource_size(&pcie->cfg_res);
pcie->cfg_res.start = LS2088A_PCIE1_PHYS_ADDR +
LS2088A_PCIE_PHYS_SIZE * pcie->idx;
+ pcie->cfg_res.end = pcie->cfg_res.start + cfg_size;
pcie->ctrl = pcie->lut + 0x40000;
}
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_IDE_TI_CARDBUS) += ti_pci1410a.o
obj-$(CONFIG_MARUBUN_PCCARD) += marubun_pcmcia.o
+++ /dev/null
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- ********************************************************************
- *
- * Lots of code copied from:
- *
- * m8xx_pcmcia.c - Linux PCMCIA socket driver for the mpc8xx series.
- * (C) 1999-2000 Magnus Damm <damm@bitsmart.com>
- *
- * "The ExCA standard specifies that socket controllers should provide
- * two IO and five memory windows per socket, which can be independently
- * configured and positioned in the host address space and mapped to
- * arbitrary segments of card address space. " - David A Hinds. 1999
- *
- * This controller does _not_ meet the ExCA standard.
- *
- * m8xx pcmcia controller brief info:
- * + 8 windows (attrib, mem, i/o)
- * + up to two slots (SLOT_A and SLOT_B)
- * + inputpins, outputpins, event and mask registers.
- * - no offset register. sigh.
- *
- * Because of the lacking offset register we must map the whole card.
- * We assign each memory window PCMCIA_MEM_WIN_SIZE address space.
- * Make sure there is (PCMCIA_MEM_WIN_SIZE * PCMCIA_MEM_WIN_NO
- * * PCMCIA_SOCKETS_NO) bytes at PCMCIA_MEM_WIN_BASE.
- * The i/o windows are dynamically allocated at PCMCIA_IO_WIN_BASE.
- * They are maximum 64KByte each...
- */
-
-
-#undef DEBUG /**/
-
-/*
- * PCMCIA support
- */
-#include <common.h>
-#include <command.h>
-#include <config.h>
-#include <pci.h>
-#include <asm/io.h>
-
-#include <pcmcia.h>
-
-#if defined(CONFIG_CMD_PCMCIA)
-
-int pcmcia_on(int ide_base_bus);
-
-static int hardware_disable(int slot);
-static int hardware_enable(int slot);
-static int voltage_set(int slot, int vcc, int vpp);
-static void print_funcid(int func);
-static void print_fixed(volatile char *p);
-static int identify(volatile char *p);
-static int check_ide_device(int slot, int ide_base_bus);
-
-
-/* ------------------------------------------------------------------------- */
-
-
-const char *indent = "\t ";
-
-/* ------------------------------------------------------------------------- */
-
-
-static struct pci_device_id supported[] = {
- { PCI_VENDOR_ID_TI, 0xac50 }, /* Ti PCI1410A */
- { PCI_VENDOR_ID_TI, 0xac56 }, /* Ti PCI1510 */
- { }
-};
-
-static pci_dev_t devbusfn;
-static u32 socket_base;
-static u32 pcmcia_cis_ptr;
-
-int pcmcia_on(int ide_base_bus)
-{
- u16 dev_id;
- u32 socket_status;
- int slot = 0;
- int cis_len;
- u16 io_base;
- u16 io_len;
-
- /*
- * Find the CardBus PCI device(s).
- */
- if ((devbusfn = pci_find_devices(supported, 0)) < 0) {
- printf("Ti CardBus: not found\n");
- return 1;
- }
-
- pci_read_config_word(devbusfn, PCI_DEVICE_ID, &dev_id);
-
- if (dev_id == 0xac56) {
- debug("Enable PCMCIA Ti PCI1510\n");
- } else {
- debug("Enable PCMCIA Ti PCI1410A\n");
- }
-
- pcmcia_cis_ptr = CONFIG_SYS_PCMCIA_CIS_WIN;
- cis_len = CONFIG_SYS_PCMCIA_CIS_WIN_SIZE;
-
- io_base = CONFIG_SYS_PCMCIA_IO_WIN;
- io_len = CONFIG_SYS_PCMCIA_IO_WIN_SIZE;
-
- /*
- * Setup the PCI device.
- */
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &socket_base);
- socket_base &= ~0xf;
-
- socket_status = readl(socket_base+8);
- if ((socket_status & 6) == 0) {
- printf("Card Present: ");
-
- switch (socket_status & 0x3c00) {
-
- case 0x400:
- printf("5V ");
- break;
- case 0x800:
- printf("3.3V ");
- break;
- case 0xc00:
- printf("3.3/5V ");
- break;
- default:
- printf("unsupported Vcc ");
- break;
- }
- switch (socket_status & 0x30) {
- case 0x10:
- printf("16bit PC-Card\n");
- break;
- case 0x20:
- printf("32bit CardBus Card\n");
- break;
- default:
- printf("8bit PC-Card\n");
- break;
- }
- }
-
-
- writeb(0x41, socket_base + 0x806); /* Enable I/O window 0 and memory window 0 */
- writeb(0x0e, socket_base + 0x807); /* Reset I/O window options */
-
- /* Careful: the linux yenta driver do not seem to reset the offset
- * in the i/o windows, so leaving them non-zero is a problem */
-
- writeb(io_base & 0xff, socket_base + 0x808); /* I/O window 0 base address */
- writeb(io_base>>8, socket_base + 0x809);
- writeb((io_base + io_len - 1) & 0xff, socket_base + 0x80a); /* I/O window 0 end address */
- writeb((io_base + io_len - 1)>>8, socket_base + 0x80b);
- writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address 0x000 */
- writeb(0x00, socket_base + 0x837);
-
-
- writeb((pcmcia_cis_ptr&0x000ff000) >> 12,
- socket_base + 0x810); /* Memory window 0 start address bits 19-12 */
- writeb((pcmcia_cis_ptr&0x00f00000) >> 20,
- socket_base + 0x811); /* Memory window 0 start address bits 23-20 */
- writeb(((pcmcia_cis_ptr+cis_len-1) & 0x000ff000) >> 12,
- socket_base + 0x812); /* Memory window 0 end address bits 19-12*/
- writeb(((pcmcia_cis_ptr+cis_len-1) & 0x00f00000) >> 20,
- socket_base + 0x813); /* Memory window 0 end address bits 23-20*/
- writeb(0x00, socket_base + 0x814); /* Memory window 0 offset bits 19-12 */
- writeb(0x40, socket_base + 0x815); /* Memory window 0 offset bits 23-20 and
- * options (read/write, attribute access) */
- writeb(0x00, socket_base + 0x816); /* ExCA card-detect and general control */
- writeb(0x00, socket_base + 0x81e); /* ExCA global control (interrupt modes) */
-
- writeb((pcmcia_cis_ptr & 0xff000000) >> 24,
- socket_base + 0x840); /* Memory window address bits 31-24 */
-
-
- /* turn off voltage */
- if (voltage_set(slot, 0, 0)) {
- return 1;
- }
-
- /* Enable external hardware */
- if (hardware_enable(slot)) {
- return 1;
- }
-
- if (check_ide_device(slot, ide_base_bus)) {
- return 1;
- }
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-#if defined(CONFIG_CMD_PCMCIA)
-int pcmcia_off (void)
-{
- int slot = 0;
-
- writeb(0x00, socket_base + 0x806); /* disable all I/O and memory windows */
-
- writeb(0x00, socket_base + 0x808); /* I/O window 0 base address */
- writeb(0x00, socket_base + 0x809);
- writeb(0x00, socket_base + 0x80a); /* I/O window 0 end address */
- writeb(0x00, socket_base + 0x80b);
- writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address */
- writeb(0x00, socket_base + 0x837);
-
- writeb(0x00, socket_base + 0x80c); /* I/O window 1 base address */
- writeb(0x00, socket_base + 0x80d);
- writeb(0x00, socket_base + 0x80e); /* I/O window 1 end address */
- writeb(0x00, socket_base + 0x80f);
- writeb(0x00, socket_base + 0x838); /* I/O window 1 offset address */
- writeb(0x00, socket_base + 0x839);
-
- writeb(0x00, socket_base + 0x810); /* Memory window 0 start address */
- writeb(0x00, socket_base + 0x811);
- writeb(0x00, socket_base + 0x812); /* Memory window 0 end address */
- writeb(0x00, socket_base + 0x813);
- writeb(0x00, socket_base + 0x814); /* Memory window 0 offset */
- writeb(0x00, socket_base + 0x815);
-
- writeb(0xc0, socket_base + 0x840); /* Memory window 0 page address */
-
-
- /* turn off voltage */
- voltage_set(slot, 0, 0);
-
- /* disable external hardware */
- printf ("Shutdown and Poweroff Ti PCI1410A\n");
- hardware_disable(slot);
-
- return 0;
-}
-
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-
-#define MAX_TUPEL_SZ 512
-#define MAX_FEATURES 4
-int ide_devices_found;
-static int check_ide_device(int slot, int ide_base_bus)
-{
- volatile char *ident = NULL;
- volatile char *feature_p[MAX_FEATURES];
- volatile char *p, *start;
- int n_features = 0;
- uchar func_id = ~0;
- uchar code, len;
- ushort config_base = 0;
- int found = 0;
- int i;
- u32 socket_status;
-
- debug ("PCMCIA MEM: %08X\n", pcmcia_cis_ptr);
-
- socket_status = readl(socket_base+8);
-
- if ((socket_status & 6) != 0 || (socket_status & 0x20) != 0) {
- printf("no card or CardBus card\n");
- return 1;
- }
-
- start = p = (volatile char *) pcmcia_cis_ptr;
-
- while ((p - start) < MAX_TUPEL_SZ) {
-
- code = *p; p += 2;
-
- if (code == 0xFF) { /* End of chain */
- break;
- }
-
- len = *p; p += 2;
-#if defined(DEBUG) && (DEBUG > 1)
- {
- volatile uchar *q = p;
- printf ("\nTuple code %02x length %d\n\tData:",
- code, len);
-
- for (i = 0; i < len; ++i) {
- printf (" %02x", *q);
- q+= 2;
- }
- }
-#endif /* DEBUG */
- switch (code) {
- case CISTPL_VERS_1:
- ident = p + 4;
- break;
- case CISTPL_FUNCID:
- /* Fix for broken SanDisk which may have 0x80 bit set */
- func_id = *p & 0x7F;
- break;
- case CISTPL_FUNCE:
- if (n_features < MAX_FEATURES)
- feature_p[n_features++] = p;
- break;
- case CISTPL_CONFIG:
- config_base = (*(p+6) << 8) + (*(p+4));
- debug ("\n## Config_base = %04x ###\n", config_base);
- default:
- break;
- }
- p += 2 * len;
- }
-
- found = identify(ident);
-
- if (func_id != ((uchar)~0)) {
- print_funcid (func_id);
-
- if (func_id == CISTPL_FUNCID_FIXED)
- found = 1;
- else
- return 1; /* no disk drive */
- }
-
- for (i=0; i<n_features; ++i) {
- print_fixed(feature_p[i]);
- }
-
- if (!found) {
- printf("unknown card type\n");
- return 1;
- }
-
- /* select config index 1 */
- writeb(1, pcmcia_cis_ptr + config_base);
-
-#if 0
- printf("Confiuration Option Register: %02x\n", readb(pcmcia_cis_ptr + config_base));
- printf("Card Confiuration and Status Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 2));
- printf("Pin Replacement Register Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 4));
- printf("Socket and Copy Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 6));
-#endif
- ide_devices_found |= (1 << (slot+ide_base_bus));
-
- return 0;
-}
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- u32 socket_control;
- int reg=0;
-
- switch (slot) {
- case 0:
- reg = socket_base + 0x10;
- break;
- default:
- return 1;
- }
-
- socket_control = 0;
-
-
- switch (vcc) {
- case 50:
- socket_control |= 0x20;
- break;
- case 33:
- socket_control |= 0x30;
- break;
- case 0:
- default: ;
- }
-
- switch (vpp) {
- case 120:
- socket_control |= 0x1;
- break;
- case 50:
- socket_control |= 0x2;
- break;
- case 33:
- socket_control |= 0x3;
- break;
- case 0:
- default: ;
- }
-
- writel(socket_control, reg);
-
- debug ("voltage_set: Ti PCI1410A Slot %d, Vcc=%d.%d, Vpp=%d.%d\n",
- slot, vcc/10, vcc%10, vpp/10, vpp%10);
-
- udelay(500);
- return 0;
-}
-
-
-static int hardware_enable(int slot)
-{
- u32 socket_status;
- u16 brg_ctrl;
- int is_82365sl;
-
- socket_status = readl(socket_base+8);
-
- if ((socket_status & 6) == 0) {
-
- switch (socket_status & 0x3c00) {
-
- case 0x400:
- printf("5V ");
- voltage_set(slot, 50, 0);
- break;
- case 0x800:
- voltage_set(slot, 33, 0);
- break;
- case 0xc00:
- voltage_set(slot, 33, 0);
- break;
- default:
- voltage_set(slot, 0, 0);
- break;
- }
- } else {
- voltage_set(slot, 0, 0);
- }
-
- pci_read_config_word(devbusfn, PCI_BRIDGE_CONTROL, &brg_ctrl);
- brg_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
- pci_write_config_word(devbusfn, PCI_BRIDGE_CONTROL, brg_ctrl);
- is_82365sl = ((readb(socket_base+0x800) & 0x0f) == 2);
- writeb(is_82365sl?0x90:0x98, socket_base+0x802);
- writeb(0x67, socket_base+0x803);
- udelay(100000);
-#if 0
- printf("ExCA Id %02x, Card Status %02x, Power config %02x, Interrupt Config %02x, bridge control %04x %d\n",
- readb(socket_base+0x800), readb(socket_base+0x801),
- readb(socket_base+0x802), readb(socket_base+0x803), brg_ctrl, is_82365sl);
-#endif
-
- return ((readb(socket_base+0x801)&0x6c)==0x6c)?0:1;
-}
-
-
-static int hardware_disable(int slot)
-{
- voltage_set(slot, 0, 0);
- return 0;
-}
-
-static void print_funcid(int func)
-{
- puts(indent);
- switch (func) {
- case CISTPL_FUNCID_MULTI:
- puts(" Multi-Function");
- break;
- case CISTPL_FUNCID_MEMORY:
- puts(" Memory");
- break;
- case CISTPL_FUNCID_SERIAL:
- puts(" Serial Port");
- break;
- case CISTPL_FUNCID_PARALLEL:
- puts(" Parallel Port");
- break;
- case CISTPL_FUNCID_FIXED:
- puts(" Fixed Disk");
- break;
- case CISTPL_FUNCID_VIDEO:
- puts(" Video Adapter");
- break;
- case CISTPL_FUNCID_NETWORK:
- puts(" Network Adapter");
- break;
- case CISTPL_FUNCID_AIMS:
- puts(" AIMS Card");
- break;
- case CISTPL_FUNCID_SCSI:
- puts(" SCSI Adapter");
- break;
- default:
- puts(" Unknown");
- break;
- }
- puts(" Card\n");
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void print_fixed(volatile char *p)
-{
- if (p == NULL)
- return;
-
- puts(indent);
-
- switch (*p) {
- case CISTPL_FUNCE_IDE_IFACE:
- { uchar iface = *(p+2);
-
- puts ((iface == CISTPL_IDE_INTERFACE) ? " IDE" : " unknown");
- puts (" interface ");
- break;
- }
- case CISTPL_FUNCE_IDE_MASTER:
- case CISTPL_FUNCE_IDE_SLAVE:
- {
- uchar f1 = *(p+2);
- uchar f2 = *(p+4);
-
- puts((f1 & CISTPL_IDE_SILICON) ? " [silicon]" : " [rotating]");
-
- if (f1 & CISTPL_IDE_UNIQUE) {
- puts(" [unique]");
- }
-
- puts((f1 & CISTPL_IDE_DUAL) ? " [dual]" : " [single]");
-
- if (f2 & CISTPL_IDE_HAS_SLEEP) {
- puts(" [sleep]");
- }
-
- if (f2 & CISTPL_IDE_HAS_STANDBY) {
- puts(" [standby]");
- }
-
- if (f2 & CISTPL_IDE_HAS_IDLE) {
- puts(" [idle]");
- }
-
- if (f2 & CISTPL_IDE_LOW_POWER) {
- puts(" [low power]");
- }
-
- if (f2 & CISTPL_IDE_REG_INHIBIT) {
- puts(" [reg inhibit]");
- }
-
- if (f2 & CISTPL_IDE_HAS_INDEX) {
- puts(" [index]");
- }
-
- if (f2 & CISTPL_IDE_IOIS16) {
- puts(" [IOis16]");
- }
-
- break;
- }
- }
- putc('\n');
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define MAX_IDENT_CHARS 64
-#define MAX_IDENT_FIELDS 4
-
-static char *known_cards[] = {
- "ARGOSY PnPIDE D5",
- NULL
-};
-
-static int identify(volatile char *p)
-{
- char id_str[MAX_IDENT_CHARS];
- char data;
- char *t;
- char **card;
- int i, done;
-
- if (p == NULL)
- return (0); /* Don't know */
-
- t = id_str;
- done =0;
-
- for (i=0; i<=4 && !done; ++i, p+=2) {
- while ((data = *p) != '\0') {
- if (data == 0xFF) {
- done = 1;
- break;
- }
- *t++ = data;
- if (t == &id_str[MAX_IDENT_CHARS-1]) {
- done = 1;
- break;
- }
- p += 2;
- }
- if (!done)
- *t++ = ' ';
- }
- *t = '\0';
- while (--t > id_str) {
- if (*t == ' ') {
- *t = '\0';
- } else {
- break;
- }
- }
- puts(id_str);
- putc('\n');
-
- for (card=known_cards; *card; ++card) {
- debug ("## Compare against \"%s\"\n", *card);
- if (strcmp(*card, id_str) == 0) { /* found! */
- debug ("## CARD FOUND ##\n");
- return 1;
- }
- }
-
- return 0; /* don't know */
-}
-
-#endif /* CONFIG_CMD_PCMCIA */
rk_clrsetreg(&grf->gpio1b_iomux,
GPIO1B6_MASK | GPIO1B7_MASK,
GPIO1B6_SDMMC_PWREN << GPIO1B6_SHIFT |
- GPIO1B7_SDMMC_CMD << GPIO1B6_SHIFT);
+ GPIO1B7_SDMMC_CMD << GPIO1B7_SHIFT);
rk_clrsetreg(&grf->gpio1c_iomux, 0xfff,
GPIO1C5_SDMMC_D3 << GPIO1C5_SHIFT |
GPIO1C4_SDMMC_D2 << GPIO1C4_SHIFT |
}
static const struct udevice_id rk322x_pinctrl_ids[] = {
- { .compatible = "rockchip,rk322x-pinctrl" },
+ { .compatible = "rockchip,rk3228-pinctrl" },
{ }
};
-U_BOOT_DRIVER(pinctrl_rk322x) = {
- .name = "pinctrl_rk322x",
+U_BOOT_DRIVER(pinctrl_rk3228) = {
+ .name = "pinctrl_rk3228",
.id = UCLASS_PINCTRL,
.of_match = rk322x_pinctrl_ids,
.priv_auto_alloc_size = sizeof(struct rk322x_pinctrl_priv),
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
* Author: Andy Yan <andy.yan@rock-chips.com>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
* SPDX-License-Identifier: GPL-2.0+
*/
+
#include <common.h>
#include <dm.h>
#include <errno.h>
DECLARE_GLOBAL_DATA_PTR;
+/* PMUGRF_GPIO0B_IOMUX */
+enum {
+ GPIO0B5_SHIFT = 10,
+ GPIO0B5_MASK = GENMASK(GPIO0B5_SHIFT + 1, GPIO0B5_SHIFT),
+ GPIO0B5_GPIO = 0,
+ GPIO0B5_SPI2_CSN0 = (2 << GPIO0B5_SHIFT),
+
+ GPIO0B4_SHIFT = 8,
+ GPIO0B4_MASK = GENMASK(GPIO0B4_SHIFT + 1, GPIO0B4_SHIFT),
+ GPIO0B4_GPIO = 0,
+ GPIO0B4_SPI2_CLK = (2 << GPIO0B4_SHIFT),
+
+ GPIO0B3_SHIFT = 6,
+ GPIO0B3_MASK = GENMASK(GPIO0B3_SHIFT + 1, GPIO0B3_SHIFT),
+ GPIO0B3_GPIO = 0,
+ GPIO0B3_SPI2_TXD = (2 << GPIO0B3_SHIFT),
+
+ GPIO0B2_SHIFT = 4,
+ GPIO0B2_MASK = GENMASK(GPIO0B2_SHIFT + 1, GPIO0B2_SHIFT),
+ GPIO0B2_GPIO = 0,
+ GPIO0B2_SPI2_RXD = (2 << GPIO0B2_SHIFT),
+};
+
+/*GRF_GPIO0C_IOMUX*/
+enum {
+ GPIO0C7_SHIFT = 14,
+ GPIO0C7_MASK = GENMASK(GPIO0C7_SHIFT + 1, GPIO0C7_SHIFT),
+ GPIO0C7_GPIO = 0,
+ GPIO0C7_LCDC_D19 = (1 << GPIO0C7_SHIFT),
+ GPIO0C7_TRACE_D9 = (2 << GPIO0C7_SHIFT),
+ GPIO0C7_UART1_RTSN = (3 << GPIO0C7_SHIFT),
+
+ GPIO0C6_SHIFT = 12,
+ GPIO0C6_MASK = GENMASK(GPIO0C6_SHIFT + 1, GPIO0C6_SHIFT),
+ GPIO0C6_GPIO = 0,
+ GPIO0C6_LCDC_D18 = (1 << GPIO0C6_SHIFT),
+ GPIO0C6_TRACE_D8 = (2 << GPIO0C6_SHIFT),
+ GPIO0C6_UART1_CTSN = (3 << GPIO0C6_SHIFT),
+
+ GPIO0C5_SHIFT = 10,
+ GPIO0C5_MASK = GENMASK(GPIO0C5_SHIFT + 1, GPIO0C5_SHIFT),
+ GPIO0C5_GPIO = 0,
+ GPIO0C5_LCDC_D17 = (1 << GPIO0C5_SHIFT),
+ GPIO0C5_TRACE_D7 = (2 << GPIO0C5_SHIFT),
+ GPIO0C5_UART1_SOUT = (3 << GPIO0C5_SHIFT),
+
+ GPIO0C4_SHIFT = 8,
+ GPIO0C4_MASK = GENMASK(GPIO0C4_SHIFT + 1, GPIO0C4_SHIFT),
+ GPIO0C4_GPIO = 0,
+ GPIO0C4_LCDC_D16 = (1 << GPIO0C4_SHIFT),
+ GPIO0C4_TRACE_D6 = (2 << GPIO0C4_SHIFT),
+ GPIO0C4_UART1_SIN = (3 << GPIO0C4_SHIFT),
+
+ GPIO0C3_SHIFT = 6,
+ GPIO0C3_MASK = GENMASK(GPIO0C3_SHIFT + 1, GPIO0C3_SHIFT),
+ GPIO0C3_GPIO = 0,
+ GPIO0C3_LCDC_D15 = (1 << GPIO0C3_SHIFT),
+ GPIO0C3_TRACE_D5 = (2 << GPIO0C3_SHIFT),
+ GPIO0C3_MCU_JTAG_TDO = (3 << GPIO0C3_SHIFT),
+
+ GPIO0C2_SHIFT = 4,
+ GPIO0C2_MASK = GENMASK(GPIO0C2_SHIFT + 1, GPIO0C2_SHIFT),
+ GPIO0C2_GPIO = 0,
+ GPIO0C2_LCDC_D14 = (1 << GPIO0C2_SHIFT),
+ GPIO0C2_TRACE_D4 = (2 << GPIO0C2_SHIFT),
+ GPIO0C2_MCU_JTAG_TDI = (3 << GPIO0C2_SHIFT),
+
+ GPIO0C1_SHIFT = 2,
+ GPIO0C1_MASK = GENMASK(GPIO0C1_SHIFT + 1, GPIO0C1_SHIFT),
+ GPIO0C1_GPIO = 0,
+ GPIO0C1_LCDC_D13 = (1 << GPIO0C1_SHIFT),
+ GPIO0C1_TRACE_D3 = (2 << GPIO0C1_SHIFT),
+ GPIO0C1_MCU_JTAG_TRTSN = (3 << GPIO0C1_SHIFT),
+
+ GPIO0C0_SHIFT = 0,
+ GPIO0C0_MASK = GENMASK(GPIO0C0_SHIFT + 1, GPIO0C0_SHIFT),
+ GPIO0C0_GPIO = 0,
+ GPIO0C0_LCDC_D12 = (1 << GPIO0C0_SHIFT),
+ GPIO0C0_TRACE_D2 = (2 << GPIO0C0_SHIFT),
+ GPIO0C0_MCU_JTAG_TDO = (3 << GPIO0C0_SHIFT),
+};
+
+/*GRF_GPIO0D_IOMUX*/
+enum {
+ GPIO0D7_SHIFT = 14,
+ GPIO0D7_MASK = GENMASK(GPIO0D7_SHIFT + 1, GPIO0D7_SHIFT),
+ GPIO0D7_GPIO = 0,
+ GPIO0D7_LCDC_DCLK = (1 << GPIO0D7_SHIFT),
+ GPIO0D7_TRACE_CTL = (2 << GPIO0D7_SHIFT),
+ GPIO0D7_PMU_DEBUG5 = (3 << GPIO0D7_SHIFT),
+
+ GPIO0D6_SHIFT = 12,
+ GPIO0D6_MASK = GENMASK(GPIO0D6_SHIFT + 1, GPIO0D6_SHIFT),
+ GPIO0D6_GPIO = 0,
+ GPIO0D6_LCDC_DEN = (1 << GPIO0D6_SHIFT),
+ GPIO0D6_TRACE_CLK = (2 << GPIO0D6_SHIFT),
+ GPIO0D6_PMU_DEBUG4 = (3 << GPIO0D6_SHIFT),
+
+ GPIO0D5_SHIFT = 10,
+ GPIO0D5_MASK = GENMASK(GPIO0D5_SHIFT + 1, GPIO0D5_SHIFT),
+ GPIO0D5_GPIO = 0,
+ GPIO0D5_LCDC_VSYNC = (1 << GPIO0D5_SHIFT),
+ GPIO0D5_TRACE_D15 = (2 << GPIO0D5_SHIFT),
+ GPIO0D5_PMU_DEBUG3 = (3 << GPIO0D5_SHIFT),
+
+ GPIO0D4_SHIFT = 8,
+ GPIO0D4_MASK = GENMASK(GPIO0D4_SHIFT + 1, GPIO0D4_SHIFT),
+ GPIO0D4_GPIO = 0,
+ GPIO0D4_LCDC_HSYNC = (1 << GPIO0D4_SHIFT),
+ GPIO0D4_TRACE_D14 = (2 << GPIO0D4_SHIFT),
+ GPIO0D4_PMU_DEBUG2 = (3 << GPIO0D4_SHIFT),
+
+ GPIO0D3_SHIFT = 6,
+ GPIO0D3_MASK = GENMASK(GPIO0D3_SHIFT + 1, GPIO0D3_SHIFT),
+ GPIO0D3_GPIO = 0,
+ GPIO0D3_LCDC_D23 = (1 << GPIO0D3_SHIFT),
+ GPIO0D3_TRACE_D13 = (2 << GPIO0D3_SHIFT),
+ GPIO0D3_UART4_SIN = (3 << GPIO0D3_SHIFT),
+
+ GPIO0D2_SHIFT = 4,
+ GPIO0D2_MASK = GENMASK(GPIO0D2_SHIFT + 1, GPIO0D2_SHIFT),
+ GPIO0D2_GPIO = 0,
+ GPIO0D2_LCDC_D22 = (1 << GPIO0D2_SHIFT),
+ GPIO0D2_TRACE_D12 = (2 << GPIO0D2_SHIFT),
+ GPIO0D2_UART4_SOUT = (3 << GPIO0D2_SHIFT),
+
+ GPIO0D1_SHIFT = 2,
+ GPIO0D1_MASK = GENMASK(GPIO0D1_SHIFT + 1, GPIO0D1_SHIFT),
+ GPIO0D1_GPIO = 0,
+ GPIO0D1_LCDC_D21 = (1 << GPIO0D1_SHIFT),
+ GPIO0D1_TRACE_D11 = (2 << GPIO0D1_SHIFT),
+ GPIO0D1_UART4_RTSN = (3 << GPIO0D1_SHIFT),
+
+ GPIO0D0_SHIFT = 0,
+ GPIO0D0_MASK = GENMASK(GPIO0D0_SHIFT + 1, GPIO0D0_SHIFT),
+ GPIO0D0_GPIO = 0,
+ GPIO0D0_LCDC_D20 = (1 << GPIO0D0_SHIFT),
+ GPIO0D0_TRACE_D10 = (2 << GPIO0D0_SHIFT),
+ GPIO0D0_UART4_CTSN = (3 << GPIO0D0_SHIFT),
+};
+
+/*GRF_GPIO2A_IOMUX*/
+enum {
+ GPIO2A7_SHIFT = 14,
+ GPIO2A7_MASK = GENMASK(GPIO2A7_SHIFT + 1, GPIO2A7_SHIFT),
+ GPIO2A7_GPIO = 0,
+ GPIO2A7_SDMMC0_D2 = (1 << GPIO2A7_SHIFT),
+ GPIO2A7_JTAG_TCK = (2 << GPIO2A7_SHIFT),
+
+ GPIO2A6_SHIFT = 12,
+ GPIO2A6_MASK = GENMASK(GPIO2A6_SHIFT + 1, GPIO2A6_SHIFT),
+ GPIO2A6_GPIO = 0,
+ GPIO2A6_SDMMC0_D1 = (1 << GPIO2A6_SHIFT),
+ GPIO2A6_UART2_SIN = (2 << GPIO2A6_SHIFT),
+
+ GPIO2A5_SHIFT = 10,
+ GPIO2A5_MASK = GENMASK(GPIO2A5_SHIFT + 1, GPIO2A5_SHIFT),
+ GPIO2A5_GPIO = 0,
+ GPIO2A5_SDMMC0_D0 = (1 << GPIO2A5_SHIFT),
+ GPIO2A5_UART2_SOUT = (2 << GPIO2A5_SHIFT),
+
+ GPIO2A4_SHIFT = 8,
+ GPIO2A4_MASK = GENMASK(GPIO2A4_SHIFT + 1, GPIO2A4_SHIFT),
+ GPIO2A4_GPIO = 0,
+ GPIO2A4_FLASH_DQS = (1 << GPIO2A4_SHIFT),
+ GPIO2A4_EMMC_CLKOUT = (2 << GPIO2A4_SHIFT),
+
+ GPIO2A3_SHIFT = 6,
+ GPIO2A3_MASK = GENMASK(GPIO2A3_SHIFT + 1, GPIO2A3_SHIFT),
+ GPIO2A3_GPIO = 0,
+ GPIO2A3_FLASH_CSN3 = (1 << GPIO2A3_SHIFT),
+ GPIO2A3_EMMC_RSTNOUT = (2 << GPIO2A3_SHIFT),
+
+ GPIO2A2_SHIFT = 4,
+ GPIO2A2_MASK = GENMASK(GPIO2A2_SHIFT + 1, GPIO2A2_SHIFT),
+ GPIO2A2_GPIO = 0,
+ GPIO2A2_FLASH_CSN2 = (1 << GPIO2A2_SHIFT),
+
+ GPIO2A1_SHIFT = 2,
+ GPIO2A1_MASK = GENMASK(GPIO2A1_SHIFT + 1, GPIO2A1_SHIFT),
+ GPIO2A1_GPIO = 0,
+ GPIO2A1_FLASH_CSN1 = (1 << GPIO2A1_SHIFT),
+
+ GPIO2A0_SHIFT = 0,
+ GPIO2A0_MASK = GENMASK(GPIO2A0_SHIFT + 1, GPIO2A0_SHIFT),
+ GPIO2A0_GPIO = 0,
+ GPIO2A0_FLASH_CSN0 = (1 << GPIO2A0_SHIFT),
+};
+
+/*GRF_GPIO2D_IOMUX*/
+enum {
+ GPIO2D7_SHIFT = 14,
+ GPIO2D7_MASK = GENMASK(GPIO2D7_SHIFT + 1, GPIO2D7_SHIFT),
+ GPIO2D7_GPIO = 0,
+ GPIO2D7_SDIO0_D3 = (1 << GPIO2D7_SHIFT),
+
+ GPIO2D6_SHIFT = 12,
+ GPIO2D6_MASK = GENMASK(GPIO2D6_SHIFT + 1, GPIO2D6_SHIFT),
+ GPIO2D6_GPIO = 0,
+ GPIO2D6_SDIO0_D2 = (1 << GPIO2D6_SHIFT),
+
+ GPIO2D5_SHIFT = 10,
+ GPIO2D5_MASK = GENMASK(GPIO2D5_SHIFT + 1, GPIO2D5_SHIFT),
+ GPIO2D5_GPIO = 0,
+ GPIO2D5_SDIO0_D1 = (1 << GPIO2D5_SHIFT),
+
+ GPIO2D4_SHIFT = 8,
+ GPIO2D4_MASK = GENMASK(GPIO2D4_SHIFT + 1, GPIO2D4_SHIFT),
+ GPIO2D4_GPIO = 0,
+ GPIO2D4_SDIO0_D0 = (1 << GPIO2D4_SHIFT),
+
+ GPIO2D3_SHIFT = 6,
+ GPIO2D3_MASK = GENMASK(GPIO2D3_SHIFT + 1, GPIO2D3_SHIFT),
+ GPIO2D3_GPIO = 0,
+ GPIO2D3_UART0_RTS0 = (1 << GPIO2D3_SHIFT),
+
+ GPIO2D2_SHIFT = 4,
+ GPIO2D2_MASK = GENMASK(GPIO2D2_SHIFT + 1, GPIO2D2_SHIFT),
+ GPIO2D2_GPIO = 0,
+ GPIO2D2_UART0_CTS0 = (1 << GPIO2D2_SHIFT),
+
+ GPIO2D1_SHIFT = 2,
+ GPIO2D1_MASK = GENMASK(GPIO2D1_SHIFT + 1, GPIO2D1_SHIFT),
+ GPIO2D1_GPIO = 0,
+ GPIO2D1_UART0_SOUT = (1 << GPIO2D1_SHIFT),
+
+ GPIO2D0_SHIFT = 0,
+ GPIO2D0_MASK = GENMASK(GPIO2D0_SHIFT + 1, GPIO2D0_SHIFT),
+ GPIO2D0_GPIO = 0,
+ GPIO2D0_UART0_SIN = (1 << GPIO2D0_SHIFT),
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+ GPIO1B7_SHIFT = 14,
+ GPIO1B7_MASK = GENMASK(GPIO1B7_SHIFT + 1, GPIO1B7_SHIFT),
+ GPIO1B7_GPIO = 0,
+ GPIO1B7_SPI1_CSN0 = (2 << GPIO1B7_SHIFT),
+
+ GPIO1B6_SHIFT = 12,
+ GPIO1B6_MASK = GENMASK(GPIO1B6_SHIFT + 1, GPIO1B6_SHIFT),
+ GPIO1B6_GPIO = 0,
+ GPIO1B6_SPI1_CLK = (2 << GPIO1B6_SHIFT),
+};
+
+/* GRF_GPIO1C_IOMUX */
+enum {
+ GPIO1C7_SHIFT = 14,
+ GPIO1C7_MASK = GENMASK(GPIO1C7_SHIFT + 1, GPIO1C7_SHIFT),
+ GPIO1C7_GPIO = 0,
+ GPIO1C7_EMMC_DATA5 = (2 << GPIO1C7_SHIFT),
+ GPIO1C7_SPI0_TXD = (3 << GPIO1C7_SHIFT),
+
+ GPIO1C6_SHIFT = 12,
+ GPIO1C6_MASK = GENMASK(GPIO1C6_SHIFT + 1, GPIO1C6_SHIFT),
+ GPIO1C6_GPIO = 0,
+ GPIO1C6_EMMC_DATA4 = (2 << GPIO1C6_SHIFT),
+ GPIO1C6_SPI0_RXD = (3 << GPIO1C6_SHIFT),
+
+ GPIO1C5_SHIFT = 10,
+ GPIO1C5_MASK = GENMASK(GPIO1C5_SHIFT + 1, GPIO1C5_SHIFT),
+ GPIO1C5_GPIO = 0,
+ GPIO1C5_EMMC_DATA3 = (2 << GPIO1C5_SHIFT),
+
+ GPIO1C4_SHIFT = 8,
+ GPIO1C4_MASK = GENMASK(GPIO1C4_SHIFT + 1, GPIO1C4_SHIFT),
+ GPIO1C4_GPIO = 0,
+ GPIO1C4_EMMC_DATA2 = (2 << GPIO1C4_SHIFT),
+
+ GPIO1C3_SHIFT = 6,
+ GPIO1C3_MASK = GENMASK(GPIO1C3_SHIFT + 1, GPIO1C3_SHIFT),
+ GPIO1C3_GPIO = 0,
+ GPIO1C3_EMMC_DATA1 = (2 << GPIO1C3_SHIFT),
+
+ GPIO1C2_SHIFT = 4,
+ GPIO1C2_MASK = GENMASK(GPIO1C2_SHIFT + 1, GPIO1C2_SHIFT),
+ GPIO1C2_GPIO = 0,
+ GPIO1C2_EMMC_DATA0 = (2 << GPIO1C2_SHIFT),
+
+ GPIO1C1_SHIFT = 2,
+ GPIO1C1_MASK = GENMASK(GPIO1C1_SHIFT + 1, GPIO1C1_SHIFT),
+ GPIO1C1_GPIO = 0,
+ GPIO1C1_SPI1_RXD = (2 << GPIO1C1_SHIFT),
+
+ GPIO1C0_SHIFT = 0,
+ GPIO1C0_MASK = GENMASK(GPIO1C0_SHIFT + 1, GPIO1C0_SHIFT),
+ GPIO1C0_GPIO = 0,
+ GPIO1C0_SPI1_TXD = (2 << GPIO1C0_SHIFT),
+};
+
+/* GRF_GPIO1D_IOMUX*/
+enum {
+ GPIO1D5_SHIFT = 10,
+ GPIO1D5_MASK = GENMASK(GPIO1D5_SHIFT + 1, GPIO1D5_SHIFT),
+ GPIO1D5_GPIO = 0,
+ GPIO1D5_SPI0_CLK = (2 << GPIO1D5_SHIFT),
+
+ GPIO1D3_SHIFT = 6,
+ GPIO1D3_MASK = GENMASK(GPIO1D3_SHIFT + 1, GPIO1D3_SHIFT),
+ GPIO1D3_GPIO = 0,
+ GPIO1D3_EMMC_PWREN = (2 << GPIO1D3_SHIFT),
+
+ GPIO1D2_SHIFT = 4,
+ GPIO1D2_MASK = GENMASK(GPIO1D2_SHIFT + 1, GPIO1D2_SHIFT),
+ GPIO1D2_GPIO = 0,
+ GPIO1D2_EMMC_CMD = (2 << GPIO1D2_SHIFT),
+
+ GPIO1D1_SHIFT = 2,
+ GPIO1D1_MASK = GENMASK(GPIO1D1_SHIFT + 1, GPIO1D1_SHIFT),
+ GPIO1D1_GPIO = 0,
+ GPIO1D1_EMMC_DATA7 = (2 << GPIO1D1_SHIFT),
+ GPIO1D1_SPI0_CSN1 = (3 << GPIO1D1_SHIFT),
+
+ GPIO1D0_SHIFT = 0,
+ GPIO1D0_MASK = GENMASK(GPIO1D0_SHIFT + 1, GPIO1D0_SHIFT),
+ GPIO1D0_GPIO = 0,
+ GPIO1D0_EMMC_DATA6 = (2 << GPIO1D0_SHIFT),
+ GPIO1D0_SPI0_CSN0 = (3 << GPIO1D0_SHIFT),
+};
+
+
+/*GRF_GPIO3B_IOMUX*/
+enum {
+ GPIO3B7_SHIFT = 14,
+ GPIO3B7_MASK = GENMASK(GPIO3B7_SHIFT + 1, GPIO3B7_SHIFT),
+ GPIO3B7_GPIO = 0,
+ GPIO3B7_MAC_RXD0 = (1 << GPIO3B7_SHIFT),
+
+ GPIO3B6_SHIFT = 12,
+ GPIO3B6_MASK = GENMASK(GPIO3B6_SHIFT + 1, GPIO3B6_SHIFT),
+ GPIO3B6_GPIO = 0,
+ GPIO3B6_MAC_TXD3 = (1 << GPIO3B6_SHIFT),
+
+ GPIO3B5_SHIFT = 10,
+ GPIO3B5_MASK = GENMASK(GPIO3B5_SHIFT + 1, GPIO3B5_SHIFT),
+ GPIO3B5_GPIO = 0,
+ GPIO3B5_MAC_TXEN = (1 << GPIO3B5_SHIFT),
+
+ GPIO3B4_SHIFT = 8,
+ GPIO3B4_MASK = GENMASK(GPIO3B4_SHIFT + 1, GPIO3B4_SHIFT),
+ GPIO3B4_GPIO = 0,
+ GPIO3B4_MAC_COL = (1 << GPIO3B4_SHIFT),
+
+ GPIO3B3_SHIFT = 6,
+ GPIO3B3_MASK = GENMASK(GPIO3B3_SHIFT + 1, GPIO3B3_SHIFT),
+ GPIO3B3_GPIO = 0,
+ GPIO3B3_MAC_CRS = (1 << GPIO3B3_SHIFT),
+
+ GPIO3B2_SHIFT = 4,
+ GPIO3B2_MASK = GENMASK(GPIO3B2_SHIFT + 1, GPIO3B2_SHIFT),
+ GPIO3B2_GPIO = 0,
+ GPIO3B2_MAC_TXD2 = (1 << GPIO3B2_SHIFT),
+
+ GPIO3B1_SHIFT = 2,
+ GPIO3B1_MASK = GENMASK(GPIO3B1_SHIFT + 1, GPIO3B1_SHIFT),
+ GPIO3B1_GPIO = 0,
+ GPIO3B1_MAC_TXD1 = (1 << GPIO3B1_SHIFT),
+
+ GPIO3B0_SHIFT = 0,
+ GPIO3B0_MASK = GENMASK(GPIO3B0_SHIFT + 1, GPIO3B0_SHIFT),
+ GPIO3B0_GPIO = 0,
+ GPIO3B0_MAC_TXD0 = (1 << GPIO3B0_SHIFT),
+ GPIO3B0_PWM0 = (2 << GPIO3B0_SHIFT),
+};
+
+/*GRF_GPIO3C_IOMUX*/
+enum {
+ GPIO3C6_SHIFT = 12,
+ GPIO3C6_MASK = GENMASK(GPIO3C6_SHIFT + 1, GPIO3C6_SHIFT),
+ GPIO3C6_GPIO = 0,
+ GPIO3C6_MAC_CLK = (1 << GPIO3C6_SHIFT),
+
+ GPIO3C5_SHIFT = 10,
+ GPIO3C5_MASK = GENMASK(GPIO3C5_SHIFT + 1, GPIO3C5_SHIFT),
+ GPIO3C5_GPIO = 0,
+ GPIO3C5_MAC_RXEN = (1 << GPIO3C5_SHIFT),
+
+ GPIO3C4_SHIFT = 8,
+ GPIO3C4_MASK = GENMASK(GPIO3C4_SHIFT + 1, GPIO3C4_SHIFT),
+ GPIO3C4_GPIO = 0,
+ GPIO3C4_MAC_RXDV = (1 << GPIO3C4_SHIFT),
+
+ GPIO3C3_SHIFT = 6,
+ GPIO3C3_MASK = GENMASK(GPIO3C3_SHIFT + 1, GPIO3C3_SHIFT),
+ GPIO3C3_GPIO = 0,
+ GPIO3C3_MAC_MDC = (1 << GPIO3C3_SHIFT),
+
+ GPIO3C2_SHIFT = 4,
+ GPIO3C2_MASK = GENMASK(GPIO3C2_SHIFT + 1, GPIO3C2_SHIFT),
+ GPIO3C2_GPIO = 0,
+ GPIO3C2_MAC_RXD3 = (1 << GPIO3C2_SHIFT),
+
+ GPIO3C1_SHIFT = 2,
+ GPIO3C1_MASK = GENMASK(GPIO3C1_SHIFT + 1, GPIO3C1_SHIFT),
+ GPIO3C1_GPIO = 0,
+ GPIO3C1_MAC_RXD2 = (1 << GPIO3C1_SHIFT),
+
+ GPIO3C0_SHIFT = 0,
+ GPIO3C0_MASK = GENMASK(GPIO3C0_SHIFT + 1, GPIO3C0_SHIFT),
+ GPIO3C0_GPIO = 0,
+ GPIO3C0_MAC_RXD1 = (1 << GPIO3C0_SHIFT),
+};
+
+/*GRF_GPIO3D_IOMUX*/
+enum {
+ GPIO3D4_SHIFT = 8,
+ GPIO3D4_MASK = GENMASK(GPIO3D4_SHIFT + 1, GPIO3D4_SHIFT),
+ GPIO3D4_GPIO = 0,
+ GPIO3D4_MAC_TXCLK = (1 << GPIO3D4_SHIFT),
+ GPIO3D4_SPI1_CNS1 = (2 << GPIO3D4_SHIFT),
+
+ GPIO3D1_SHIFT = 2,
+ GPIO3D1_MASK = GENMASK(GPIO3D1_SHIFT + 1, GPIO3D1_SHIFT),
+ GPIO3D1_GPIO = 0,
+ GPIO3D1_MAC_RXCLK = (1 << GPIO3D1_SHIFT),
+
+ GPIO3D0_SHIFT = 0,
+ GPIO3D0_MASK = GENMASK(GPIO3D0_SHIFT + 1, GPIO3D0_SHIFT),
+ GPIO3D0_GPIO = 0,
+ GPIO3D0_MAC_MDIO = (1 << GPIO3D0_SHIFT),
+};
+
struct rk3368_pinctrl_priv {
struct rk3368_grf *grf;
struct rk3368_pmu_grf *pmugrf;
case PERIPH_ID_UART2:
rk_clrsetreg(&grf->gpio2a_iomux,
GPIO2A6_MASK | GPIO2A5_MASK,
- GPIO2A6_UART2_SIN << GPIO2A6_SHIFT |
- GPIO2A5_UART2_SOUT << GPIO2A5_SHIFT);
+ GPIO2A6_UART2_SIN | GPIO2A5_UART2_SOUT);
break;
case PERIPH_ID_UART0:
break;
rk_clrsetreg(&pmugrf->gpio0d_iomux,
GPIO0D0_MASK | GPIO0D1_MASK |
GPIO0D2_MASK | GPIO0D3_MASK,
- GPIO0D0_GPIO << GPIO0D0_SHIFT |
- GPIO0D1_GPIO << GPIO0D1_SHIFT |
- GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
- GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
+ GPIO0D0_GPIO | GPIO0D1_GPIO |
+ GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
break;
default:
debug("uart id = %d iomux error!\n", uart_id);
}
}
+static void pinctrl_rk3368_spi_config(struct rk3368_pinctrl_priv *priv,
+ int spi_id)
+{
+ struct rk3368_grf *grf = priv->grf;
+ struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
+
+ switch (spi_id) {
+ case PERIPH_ID_SPI0:
+ /*
+ * eMMC can only be connected with 4 bits, when SPI0 is used.
+ * This is all-or-nothing, so we assume that if someone asks us
+ * to configure SPI0, that their eMMC interface is unused or
+ * configured appropriately.
+ */
+ rk_clrsetreg(&grf->gpio1d_iomux,
+ GPIO1D0_MASK | GPIO1D1_MASK |
+ GPIO1D5_MASK,
+ GPIO1D0_SPI0_CSN0 | GPIO1D1_SPI0_CSN1 |
+ GPIO1D5_SPI0_CLK);
+ rk_clrsetreg(&grf->gpio1c_iomux,
+ GPIO1C6_MASK | GPIO1C7_MASK,
+ GPIO1C6_SPI0_RXD | GPIO1C7_SPI0_TXD);
+ break;
+ case PERIPH_ID_SPI1:
+ /*
+ * We don't implement support for configuring SPI1_CSN#1, as it
+ * conflicts with the GMAC (MAC TX clk-out).
+ */
+ rk_clrsetreg(&grf->gpio1b_iomux,
+ GPIO1B6_MASK | GPIO1B7_MASK,
+ GPIO1B6_SPI1_CLK | GPIO1B7_SPI1_CSN0);
+ rk_clrsetreg(&grf->gpio1c_iomux,
+ GPIO1C0_MASK | GPIO1C1_MASK,
+ GPIO1C0_SPI1_TXD | GPIO1C1_SPI1_RXD);
+ break;
+ case PERIPH_ID_SPI2:
+ rk_clrsetreg(&pmugrf->gpio0b_iomux,
+ GPIO0B2_MASK | GPIO0B3_MASK |
+ GPIO0B4_MASK | GPIO0B5_MASK,
+ GPIO0B2_SPI2_RXD | GPIO0B3_SPI2_TXD |
+ GPIO0B4_SPI2_CLK | GPIO0B5_SPI2_CSN0);
+ break;
+ default:
+ debug("%s: spi id = %d iomux error!\n", __func__, spi_id);
+ break;
+ }
+}
+
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+static void pinctrl_rk3368_gmac_config(struct rk3368_grf *grf, int gmac_id)
+{
+ rk_clrsetreg(&grf->gpio3b_iomux,
+ GPIO3B0_MASK | GPIO3B1_MASK |
+ GPIO3B2_MASK | GPIO3B5_MASK |
+ GPIO3B6_MASK | GPIO3B7_MASK,
+ GPIO3B0_MAC_TXD0 | GPIO3B1_MAC_TXD1 |
+ GPIO3B2_MAC_TXD2 | GPIO3B5_MAC_TXEN |
+ GPIO3B6_MAC_TXD3 | GPIO3B7_MAC_RXD0);
+ rk_clrsetreg(&grf->gpio3c_iomux,
+ GPIO3C0_MASK | GPIO3C1_MASK |
+ GPIO3C2_MASK | GPIO3C3_MASK |
+ GPIO3C4_MASK | GPIO3C5_MASK |
+ GPIO3C6_MASK,
+ GPIO3C0_MAC_RXD1 | GPIO3C1_MAC_RXD2 |
+ GPIO3C2_MAC_RXD3 | GPIO3C3_MAC_MDC |
+ GPIO3C4_MAC_RXDV | GPIO3C5_MAC_RXEN |
+ GPIO3C6_MAC_CLK);
+ rk_clrsetreg(&grf->gpio3d_iomux,
+ GPIO3D0_MASK | GPIO3D1_MASK |
+ GPIO3D4_MASK,
+ GPIO3D0_MAC_MDIO | GPIO3D1_MAC_RXCLK |
+ GPIO3D4_MAC_TXCLK);
+}
+#endif
+
+static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf, int mmc_id)
+{
+ switch (mmc_id) {
+ case PERIPH_ID_EMMC:
+ debug("mmc id = %d setting registers!\n", mmc_id);
+ rk_clrsetreg(&grf->gpio1c_iomux,
+ GPIO1C2_MASK | GPIO1C3_MASK |
+ GPIO1C4_MASK | GPIO1C5_MASK |
+ GPIO1C6_MASK | GPIO1C7_MASK,
+ GPIO1C2_EMMC_DATA0 |
+ GPIO1C3_EMMC_DATA1 |
+ GPIO1C4_EMMC_DATA2 |
+ GPIO1C5_EMMC_DATA3 |
+ GPIO1C6_EMMC_DATA4 |
+ GPIO1C7_EMMC_DATA5);
+ rk_clrsetreg(&grf->gpio1d_iomux,
+ GPIO1D0_MASK | GPIO1D1_MASK |
+ GPIO1D2_MASK | GPIO1D3_MASK,
+ GPIO1D0_EMMC_DATA6 |
+ GPIO1D1_EMMC_DATA7 |
+ GPIO1D2_EMMC_CMD |
+ GPIO1D3_EMMC_PWREN);
+ rk_clrsetreg(&grf->gpio2a_iomux,
+ GPIO2A3_MASK | GPIO2A4_MASK,
+ GPIO2A3_EMMC_RSTNOUT |
+ GPIO2A4_EMMC_CLKOUT);
+ break;
+ case PERIPH_ID_SDCARD:
+ /*
+ * We assume that the BROM has already set this up
+ * correctly for us and that there's nothing to do
+ * here.
+ */
+ break;
+ default:
+ debug("mmc id = %d iomux error!\n", mmc_id);
+ break;
+ }
+}
+
static int rk3368_pinctrl_request(struct udevice *dev, int func, int flags)
{
struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
case PERIPH_ID_UART4:
pinctrl_rk3368_uart_config(priv, func);
break;
+ case PERIPH_ID_SPI0:
+ case PERIPH_ID_SPI1:
+ case PERIPH_ID_SPI2:
+ pinctrl_rk3368_spi_config(priv, func);
+ break;
+ case PERIPH_ID_EMMC:
+ case PERIPH_ID_SDCARD:
+ pinctrl_rk3368_sdmmc_config(priv->grf, func);
+ break;
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+ case PERIPH_ID_GMAC:
+ pinctrl_rk3368_gmac_config(priv->grf, func);
+ break;
+#endif
default:
return -EINVAL;
}
return PERIPH_ID_UART1;
case 55:
return PERIPH_ID_UART0;
+ case 44:
+ return PERIPH_ID_SPI0;
+ case 45:
+ return PERIPH_ID_SPI1;
+ case 41:
+ return PERIPH_ID_SPI2;
+ case 35:
+ return PERIPH_ID_EMMC;
+ case 32:
+ return PERIPH_ID_SDCARD;
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+ case 27:
+ return PERIPH_ID_GMAC;
+#endif
}
return -ENOENT;
config SPL_RAM
bool "Enable RAM support in SPL"
- depends on RAM
+ depends on RAM && SPL_DM
help
The RAM subsystem adds a small amount of overhead to the image.
If this is acceptable and you have a need to use RAM drivers in
SPL, enable this option. It might provide a cleaner interface to
setting up RAM (e.g. SDRAM / DDR) within SPL.
+config TPL_RAM
+ bool "Enable RAM support in SPL"
+ depends on RAM && TPL_DM
+ help
+ The RAM subsystem adds a small amount of overhead to the image.
+ If this is acceptable and you have a need to use RAM drivers in
+ TPL, enable this option. It might provide a cleaner interface to
+ setting up RAM (e.g. SDRAM / DDR) within TPL.
+
config STM32_SDRAM
bool "Enable STM32 SDRAM support"
depends on RAM
obj-$(CONFIG_SANDBOX) += sandbox_ram.o
obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
+
+obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
--- /dev/null
+#
+# Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
--- /dev/null
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-bindings/memory/rk3368-dmc.h>
+#include <dt-structs.h>
+#include <ram.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/ddr_rk3368.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+ struct ram_info info;
+ struct clk ddr_clk;
+ struct rk3368_cru *cru;
+ struct rk3368_grf *grf;
+ struct rk3368_ddr_pctl *pctl;
+ struct rk3368_ddrphy *phy;
+ struct rk3368_pmu_grf *pmugrf;
+ struct rk3368_msch *msch;
+};
+
+struct rk3368_sdram_params {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_rockchip_rk3368_dmc of_plat;
+#endif
+ struct rk3288_sdram_pctl_timing pctl_timing;
+ u32 trefi_mem_ddr3;
+ struct rk3288_sdram_channel chan;
+ struct regmap *map;
+ u32 ddr_freq;
+ u32 memory_schedule;
+ u32 ddr_speed_bin;
+ u32 tfaw_mult;
+};
+
+/* PTCL bits */
+enum {
+ /* PCTL_DFISTCFG0 */
+ DFI_INIT_START = BIT(0),
+ DFI_DATA_BYTE_DISABLE_EN = BIT(2),
+
+ /* PCTL_DFISTCFG1 */
+ DFI_DRAM_CLK_SR_EN = BIT(0),
+ DFI_DRAM_CLK_DPD_EN = BIT(1),
+ ODT_LEN_BL8_W_SHIFT = 16,
+
+ /* PCTL_DFISTCFG2 */
+ DFI_PARITY_INTR_EN = BIT(0),
+ DFI_PARITY_EN = BIT(1),
+
+ /* PCTL_DFILPCFG0 */
+ TLP_RESP_TIME_SHIFT = 16,
+ LP_SR_EN = BIT(8),
+ LP_PD_EN = BIT(0),
+
+ /* PCTL_DFIODTCFG */
+ RANK0_ODT_WRITE_SEL = BIT(3),
+ RANK1_ODT_WRITE_SEL = BIT(11),
+
+ /* PCTL_SCFG */
+ HW_LOW_POWER_EN = BIT(0),
+
+ /* PCTL_MCMD */
+ START_CMD = BIT(31),
+ MCMD_RANK0 = BIT(20),
+ MCMD_RANK1 = BIT(21),
+ DESELECT_CMD = 0,
+ PREA_CMD,
+ REF_CMD,
+ MRS_CMD,
+ ZQCS_CMD,
+ ZQCL_CMD,
+ RSTL_CMD,
+ MRR_CMD = 8,
+ DPDE_CMD,
+
+ /* PCTL_POWCTL */
+ POWER_UP_START = BIT(0),
+
+ /* PCTL_POWSTAT */
+ POWER_UP_DONE = BIT(0),
+
+ /* PCTL_SCTL */
+ INIT_STATE = 0,
+ CFG_STATE,
+ GO_STATE,
+ SLEEP_STATE,
+ WAKEUP_STATE,
+
+ /* PCTL_STAT */
+ LP_TRIG_SHIFT = 4,
+ LP_TRIG_MASK = 7,
+ PCTL_STAT_MSK = 7,
+ INIT_MEM = 0,
+ CONFIG,
+ CONFIG_REQ,
+ ACCESS,
+ ACCESS_REQ,
+ LOW_POWER,
+ LOW_POWER_ENTRY_REQ,
+ LOW_POWER_EXIT_REQ,
+
+ /* PCTL_MCFG */
+ DDR2_DDR3_BL_8 = BIT(0),
+ DDR3_EN = BIT(5),
+ TFAW_TRRD_MULT4 = (0 << 18),
+ TFAW_TRRD_MULT5 = (1 << 18),
+ TFAW_TRRD_MULT6 = (2 << 18),
+};
+
+#define DDR3_MR0_WR(n) \
+ ((n <= 8) ? ((n - 4) << 9) : (((n >> 1) & 0x7) << 9))
+#define DDR3_MR0_CL(n) \
+ ((((n - 4) & 0x7) << 4) | (((n - 4) & 0x8) >> 2))
+#define DDR3_MR0_BL8 \
+ (0 << 0)
+#define DDR3_MR0_DLL_RESET \
+ (1 << 8)
+#define DDR3_MR1_RTT120OHM \
+ ((0 << 9) | (1 << 6) | (0 << 2))
+#define DDR3_MR2_TWL(n) \
+ (((n - 5) & 0x7) << 3)
+
+
+#ifdef CONFIG_TPL_BUILD
+
+static void ddr_set_noc_spr_err_stall(struct rk3368_grf *grf, bool enable)
+{
+ if (enable)
+ rk_setreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL);
+ else
+ rk_clrreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL);
+}
+
+static void ddr_set_ddr3_mode(struct rk3368_grf *grf, bool ddr3_mode)
+{
+ if (ddr3_mode)
+ rk_setreg(&grf->ddrc0_con0, MSCH0_MAINDDR3_DDR3);
+ else
+ rk_clrreg(&grf->ddrc0_con0, MSCH0_MAINDDR3_DDR3);
+}
+
+static void ddrphy_config(struct rk3368_ddrphy *phy,
+ u32 tcl, u32 tal, u32 tcwl)
+{
+ int i;
+
+ /* Set to DDR3 mode */
+ clrsetbits_le32(&phy->reg[1], 0x3, 0x0);
+
+ /* DDRPHY_REGB: CL, AL */
+ clrsetbits_le32(&phy->reg[0xb], 0xff, tcl << 4 | tal);
+ /* DDRPHY_REGC: CWL */
+ clrsetbits_le32(&phy->reg[0xc], 0x0f, tcwl);
+
+ /* Update drive-strength */
+ writel(0xcc, &phy->reg[0x11]);
+ writel(0xaa, &phy->reg[0x16]);
+ /*
+ * Update NRCOMP/PRCOMP for all 4 channels (for details of all
+ * affected registers refer to the documentation of DDRPHY_REG20
+ * and DDRPHY_REG21 in the RK3368 TRM.
+ */
+ for (i = 0; i < 4; ++i) {
+ writel(0xcc, &phy->reg[0x20 + i * 0x10]);
+ writel(0x44, &phy->reg[0x21 + i * 0x10]);
+ }
+
+ /* Enable write-leveling calibration bypass */
+ setbits_le32(&phy->reg[2], BIT(3));
+}
+
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+ int i;
+
+ for (i = 0; i < n / sizeof(u32); i++)
+ writel(*src++, dest++);
+}
+
+static void send_command(struct rk3368_ddr_pctl *pctl, u32 rank, u32 cmd)
+{
+ u32 mcmd = START_CMD | cmd | rank;
+
+ debug("%s: writing %x to MCMD\n", __func__, mcmd);
+ writel(mcmd, &pctl->mcmd);
+ while (readl(&pctl->mcmd) & START_CMD)
+ /* spin */;
+}
+
+static void send_mrs(struct rk3368_ddr_pctl *pctl,
+ u32 rank, u32 mr_num, u32 mr_data)
+{
+ u32 mcmd = START_CMD | MRS_CMD | rank | (mr_num << 17) | (mr_data << 4);
+
+ debug("%s: writing %x to MCMD\n", __func__, mcmd);
+ writel(mcmd, &pctl->mcmd);
+ while (readl(&pctl->mcmd) & START_CMD)
+ /* spin */;
+}
+
+static int memory_init(struct rk3368_ddr_pctl *pctl,
+ struct rk3368_sdram_params *params)
+{
+ u32 mr[4];
+ const ulong timeout_ms = 500;
+ ulong tmp;
+
+ /*
+ * Power up DRAM by DDR_PCTL_POWCTL[0] register of PCTL and
+ * wait power up DRAM finish with DDR_PCTL_POWSTAT[0] register
+ * of PCTL.
+ */
+ writel(POWER_UP_START, &pctl->powctl);
+
+ tmp = get_timer(0);
+ do {
+ if (get_timer(tmp) > timeout_ms) {
+ error("%s: POWER_UP_START did not complete in %ld ms\n",
+ __func__, timeout_ms);
+ return -ETIME;
+ }
+ } while (!(readl(&pctl->powstat) & POWER_UP_DONE));
+
+ /* Configure MR0 through MR3 */
+ mr[0] = DDR3_MR0_WR(params->pctl_timing.twr) |
+ DDR3_MR0_CL(params->pctl_timing.tcl) |
+ DDR3_MR0_DLL_RESET;
+ mr[1] = DDR3_MR1_RTT120OHM;
+ mr[2] = DDR3_MR2_TWL(params->pctl_timing.tcwl);
+ mr[3] = 0;
+
+ /*
+ * Also see RK3368 Technical Reference Manual:
+ * "16.6.2 Initialization (DDR3 Initialization Sequence)"
+ */
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, DESELECT_CMD);
+ udelay(1);
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, PREA_CMD);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 2, mr[2]);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 3, mr[3]);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 1, mr[1]);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 0, mr[0]);
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, ZQCL_CMD);
+
+ return 0;
+}
+
+static void move_to_config_state(struct rk3368_ddr_pctl *pctl)
+{
+ /*
+ * Also see RK3368 Technical Reference Manual:
+ * "16.6.1 State transition of PCTL (Moving to Config State)"
+ */
+ u32 state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+ switch (state) {
+ case LOW_POWER:
+ writel(WAKEUP_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != ACCESS)
+ /* spin */;
+
+ /* fall-through */
+ case ACCESS:
+ case INIT_MEM:
+ writel(CFG_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+ /* spin */;
+ break;
+
+ case CONFIG:
+ return;
+
+ default:
+ break;
+ }
+}
+
+static void move_to_access_state(struct rk3368_ddr_pctl *pctl)
+{
+ /*
+ * Also see RK3368 Technical Reference Manual:
+ * "16.6.1 State transition of PCTL (Moving to Access State)"
+ */
+ u32 state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+ switch (state) {
+ case LOW_POWER:
+ if (((readl(&pctl->stat) >> LP_TRIG_SHIFT) &
+ LP_TRIG_MASK) == 1)
+ return;
+
+ writel(WAKEUP_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != ACCESS)
+ /* spin */;
+
+ /* fall-through */
+ case INIT_MEM:
+ writel(CFG_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+ /* spin */;
+
+ /* fall-through */
+ case CONFIG:
+ writel(GO_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) == CONFIG)
+ /* spin */;
+ break;
+
+ case ACCESS:
+ return;
+
+ default:
+ break;
+ }
+}
+
+static void ddrctl_reset(struct rk3368_cru *cru)
+{
+ const u32 ctl_reset = BIT(3) | BIT(2);
+ const u32 phy_reset = BIT(1) | BIT(0);
+
+ /*
+ * The PHY reset should be released before the PCTL reset.
+ *
+ * Note that the following sequence (including the number of
+ * us to delay between releasing the PHY and PCTL reset) has
+ * been adapted per feedback received from Rockchips, so do
+ * not try to optimise.
+ */
+ rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset);
+ udelay(1);
+ rk_clrreg(&cru->softrst_con[10], phy_reset);
+ udelay(5);
+ rk_clrreg(&cru->softrst_con[10], ctl_reset);
+}
+
+static void ddrphy_reset(struct rk3368_ddrphy *ddrphy)
+{
+ /*
+ * The analog part of the PHY should be release at least 1000
+ * DRAM cycles before the digital part of the PHY (waiting for
+ * 5us will ensure this for a DRAM clock as low as 200MHz).
+ */
+ clrbits_le32(&ddrphy->reg[0], BIT(3) | BIT(2));
+ udelay(1);
+ setbits_le32(&ddrphy->reg[0], BIT(2));
+ udelay(5);
+ setbits_le32(&ddrphy->reg[0], BIT(3));
+}
+
+static void ddrphy_config_delays(struct rk3368_ddrphy *ddrphy, u32 freq)
+{
+ u32 dqs_dll_delay;
+
+ setbits_le32(&ddrphy->reg[0x13], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x14], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x26], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x27], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x36], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x37], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x46], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x47], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x56], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x57], BIT(3));
+
+ if (freq <= 400000000)
+ setbits_le32(&ddrphy->reg[0xa4], 0x1f);
+ else
+ clrbits_le32(&ddrphy->reg[0xa4], 0x1f);
+
+ if (freq < 681000000)
+ dqs_dll_delay = 3; /* 67.5 degree delay */
+ else
+ dqs_dll_delay = 2; /* 45 degree delay */
+
+ writel(dqs_dll_delay, &ddrphy->reg[0x28]);
+ writel(dqs_dll_delay, &ddrphy->reg[0x38]);
+ writel(dqs_dll_delay, &ddrphy->reg[0x48]);
+ writel(dqs_dll_delay, &ddrphy->reg[0x58]);
+}
+
+static int dfi_cfg(struct rk3368_ddr_pctl *pctl)
+{
+ const ulong timeout_ms = 200;
+ ulong tmp;
+
+ writel(DFI_DATA_BYTE_DISABLE_EN, &pctl->dfistcfg0);
+
+ writel(DFI_DRAM_CLK_SR_EN | DFI_DRAM_CLK_DPD_EN,
+ &pctl->dfistcfg1);
+ writel(DFI_PARITY_INTR_EN | DFI_PARITY_EN, &pctl->dfistcfg2);
+ writel(7 << TLP_RESP_TIME_SHIFT | LP_SR_EN | LP_PD_EN,
+ &pctl->dfilpcfg0);
+
+ writel(1, &pctl->dfitphyupdtype0);
+
+ writel(0x1f, &pctl->dfitphyrdlat);
+ writel(0, &pctl->dfitphywrdata);
+ writel(0, &pctl->dfiupdcfg); /* phyupd and ctrlupd disabled */
+
+ setbits_le32(&pctl->dfistcfg0, DFI_INIT_START);
+
+ tmp = get_timer(0);
+ do {
+ if (get_timer(tmp) > timeout_ms) {
+ error("%s: DFI init did not complete within %ld ms\n",
+ __func__, timeout_ms);
+ return -ETIME;
+ }
+ } while ((readl(&pctl->dfiststat0) & 1) == 0);
+
+ return 0;
+}
+
+static inline u32 ps_to_tCK(const u32 ps, const ulong freq)
+{
+ const ulong MHz = 1000000;
+ return DIV_ROUND_UP(ps * freq, 1000000 * MHz);
+}
+
+static inline u32 ns_to_tCK(const u32 ns, const ulong freq)
+{
+ return ps_to_tCK(ns * 1000, freq);
+}
+
+static inline u32 tCK_to_ps(const ulong tCK, const ulong freq)
+{
+ const ulong MHz = 1000000;
+ return DIV_ROUND_UP(tCK * 1000000 * MHz, freq);
+}
+
+static int pctl_calc_timings(struct rk3368_sdram_params *params,
+ ulong freq)
+{
+ struct rk3288_sdram_pctl_timing *pctl_timing = ¶ms->pctl_timing;
+ const ulong MHz = 1000000;
+ u32 tccd;
+ u32 tfaw_as_ps;
+
+ if (params->ddr_speed_bin != DDR3_1600K) {
+ error("%s: unimplemented DDR3 speed bin %d\n",
+ __func__, params->ddr_speed_bin);
+ return -1;
+ }
+
+ /* PCTL is clocked at 1/2 the DRAM clock; err on the side of caution */
+ pctl_timing->togcnt1u = DIV_ROUND_UP(freq, 2 * MHz);
+ pctl_timing->togcnt100n = DIV_ROUND_UP(freq / 10, 2 * MHz);
+
+ pctl_timing->tinit = 200; /* 200 usec */
+ pctl_timing->trsth = 500; /* 500 usec */
+ pctl_timing->trefi = 78; /* 7.8usec = 78 * 100ns */
+ params->trefi_mem_ddr3 = ns_to_tCK(pctl_timing->trefi * 100, freq);
+
+ if (freq <= (400 * MHz)) {
+ pctl_timing->tcl = 6;
+ pctl_timing->tcwl = 10;
+ } else if (freq <= (533 * MHz)) {
+ pctl_timing->tcl = 8;
+ pctl_timing->tcwl = 6;
+ } else if (freq <= (666 * MHz)) {
+ pctl_timing->tcl = 10;
+ pctl_timing->tcwl = 7;
+ } else {
+ pctl_timing->tcl = 11;
+ pctl_timing->tcwl = 8;
+ }
+
+ pctl_timing->tmrd = 4; /* 4 tCK (all speed bins) */
+ pctl_timing->trfc = ns_to_tCK(350, freq); /* tRFC: 350 (max) @ 8GBit */
+ pctl_timing->trp = max(4u, ps_to_tCK(13750, freq));
+ /*
+ * JESD-79:
+ * READ to WRITE Command Delay = RL + tCCD / 2 + 2tCK - WL
+ */
+ tccd = 4;
+ pctl_timing->trtw = pctl_timing->tcl + tccd/2 + 2 - pctl_timing->tcwl;
+ pctl_timing->tal = 0;
+ pctl_timing->tras = ps_to_tCK(35000, freq);
+ pctl_timing->trc = ps_to_tCK(48750, freq);
+ pctl_timing->trcd = ps_to_tCK(13750, freq);
+ pctl_timing->trrd = max(4u, ps_to_tCK(7500, freq));
+ pctl_timing->trtp = max(4u, ps_to_tCK(7500, freq));
+ pctl_timing->twr = ps_to_tCK(15000, freq);
+ /* The DDR3 mode-register does only support even values for tWR > 8. */
+ if (pctl_timing->twr > 8)
+ pctl_timing->twr = (pctl_timing->twr + 1) & ~1;
+ pctl_timing->twtr = max(4u, ps_to_tCK(7500, freq));
+ pctl_timing->texsr = 512; /* tEXSR(max) is tDLLLK */
+ pctl_timing->txp = max(3u, ps_to_tCK(6000, freq));
+ pctl_timing->txpdll = max(10u, ps_to_tCK(24000, freq));
+ pctl_timing->tzqcs = max(64u, ps_to_tCK(80000, freq));
+ pctl_timing->tzqcsi = 10000; /* as used by Rockchip */
+ pctl_timing->tdqs = 1; /* fixed for DDR3 */
+ pctl_timing->tcksre = max(5u, ps_to_tCK(10000, freq));
+ pctl_timing->tcksrx = max(5u, ps_to_tCK(10000, freq));
+ pctl_timing->tcke = max(3u, ps_to_tCK(5000, freq));
+ pctl_timing->tmod = max(12u, ps_to_tCK(15000, freq));
+ pctl_timing->trstl = ns_to_tCK(100, freq);
+ pctl_timing->tzqcl = max(256u, ps_to_tCK(320000, freq)); /* tZQoper */
+ pctl_timing->tmrr = 0;
+ pctl_timing->tckesr = pctl_timing->tcke + 1; /* JESD-79: tCKE + 1tCK */
+ pctl_timing->tdpd = 0; /* RK3368 TRM: "allowed values for DDR3: 0" */
+
+
+ /*
+ * The controller can represent tFAW as 4x, 5x or 6x tRRD only.
+ * We want to use the smallest multiplier that satisfies the tFAW
+ * requirements of the given speed-bin. If necessary, we stretch out
+ * tRRD to allow us to operate on a 6x multiplier for tFAW.
+ */
+ tfaw_as_ps = 40000; /* 40ns: tFAW for DDR3-1600K, 2KB page-size */
+ if (tCK_to_ps(pctl_timing->trrd * 6, freq) < tfaw_as_ps) {
+ /* If tFAW is > 6 x tRRD, we need to stretch tRRD */
+ pctl_timing->trrd = ps_to_tCK(DIV_ROUND_UP(40000, 6), freq);
+ params->tfaw_mult = TFAW_TRRD_MULT6;
+ } else if (tCK_to_ps(pctl_timing->trrd * 5, freq) < tfaw_as_ps) {
+ params->tfaw_mult = TFAW_TRRD_MULT6;
+ } else if (tCK_to_ps(pctl_timing->trrd * 4, freq) < tfaw_as_ps) {
+ params->tfaw_mult = TFAW_TRRD_MULT5;
+ } else {
+ params->tfaw_mult = TFAW_TRRD_MULT4;
+ }
+
+ return 0;
+}
+
+static void pctl_cfg(struct rk3368_ddr_pctl *pctl,
+ struct rk3368_sdram_params *params,
+ struct rk3368_grf *grf)
+{
+ /* Configure PCTL timing registers */
+ params->pctl_timing.trefi |= BIT(31); /* see PCTL_TREFI */
+ copy_to_reg(&pctl->togcnt1u, ¶ms->pctl_timing.togcnt1u,
+ sizeof(params->pctl_timing));
+ writel(params->trefi_mem_ddr3, &pctl->trefi_mem_ddr3);
+
+ /* Set up ODT write selector and ODT write length */
+ writel((RANK0_ODT_WRITE_SEL | RANK1_ODT_WRITE_SEL), &pctl->dfiodtcfg);
+ writel(7 << ODT_LEN_BL8_W_SHIFT, &pctl->dfiodtcfg1);
+
+ /* Set up the CL/CWL-dependent timings of DFI */
+ writel((params->pctl_timing.tcl - 1) / 2 - 1, &pctl->dfitrddataen);
+ writel((params->pctl_timing.tcwl - 1) / 2 - 1, &pctl->dfitphywrlat);
+
+ /* DDR3 */
+ writel(params->tfaw_mult | DDR3_EN | DDR2_DDR3_BL_8, &pctl->mcfg);
+ writel(0x001c0004, &grf->ddrc0_con0);
+
+ setbits_le32(&pctl->scfg, HW_LOW_POWER_EN);
+}
+
+static int ddrphy_data_training(struct rk3368_ddr_pctl *pctl,
+ struct rk3368_ddrphy *ddrphy)
+{
+ const u32 trefi = readl(&pctl->trefi);
+ const ulong timeout_ms = 500;
+ ulong tmp;
+
+ /* disable auto-refresh */
+ writel(0 | BIT(31), &pctl->trefi);
+
+ clrsetbits_le32(&ddrphy->reg[2], 0x33, 0x20);
+ clrsetbits_le32(&ddrphy->reg[2], 0x33, 0x21);
+
+ tmp = get_timer(0);
+ do {
+ if (get_timer(tmp) > timeout_ms) {
+ error("%s: did not complete within %ld ms\n",
+ __func__, timeout_ms);
+ return -ETIME;
+ }
+ } while ((readl(&ddrphy->reg[0xff]) & 0xf) != 0xf);
+
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, PREA_CMD);
+ clrsetbits_le32(&ddrphy->reg[2], 0x33, 0x20);
+ /* resume auto-refresh */
+ writel(trefi | BIT(31), &pctl->trefi);
+
+ return 0;
+}
+
+static int sdram_col_row_detect(struct udevice *dev)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+ struct rk3368_sdram_params *params = dev_get_platdata(dev);
+ struct rk3368_ddr_pctl *pctl = priv->pctl;
+ struct rk3368_msch *msch = priv->msch;
+ const u32 test_pattern = 0x5aa5f00f;
+ int row, col;
+ uintptr_t addr;
+
+ move_to_config_state(pctl);
+ writel(6, &msch->ddrconf);
+ move_to_access_state(pctl);
+
+ /* Detect col */
+ for (col = 11; col >= 9; col--) {
+ writel(0, CONFIG_SYS_SDRAM_BASE);
+ addr = CONFIG_SYS_SDRAM_BASE +
+ (1 << (col + params->chan.bw - 1));
+ writel(test_pattern, addr);
+ if ((readl(addr) == test_pattern) &&
+ (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+ break;
+ }
+
+ if (col == 8) {
+ error("%s: col detect error\n", __func__);
+ return -EINVAL;
+ }
+
+ move_to_config_state(pctl);
+ writel(15, &msch->ddrconf);
+ move_to_access_state(pctl);
+
+ /* Detect row*/
+ for (row = 16; row >= 12; row--) {
+ writel(0, CONFIG_SYS_SDRAM_BASE);
+ addr = CONFIG_SYS_SDRAM_BASE + (1 << (row + 15 - 1));
+ writel(test_pattern, addr);
+ if ((readl(addr) == test_pattern) &&
+ (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+ break;
+ }
+
+ if (row == 11) {
+ error("%s: row detect error\n", __func__);
+ return -EINVAL;
+ }
+
+ /* Record results */
+ debug("%s: col %d, row %d\n", __func__, col, row);
+ params->chan.col = col;
+ params->chan.cs0_row = row;
+ params->chan.cs1_row = row;
+ params->chan.row_3_4 = 0;
+
+ return 0;
+}
+
+static int msch_niu_config(struct rk3368_msch *msch,
+ struct rk3368_sdram_params *params)
+{
+ int i;
+ const u8 cols = params->chan.col - ((params->chan.bw == 2) ? 0 : 1);
+ const u8 rows = params->chan.cs0_row;
+
+ /*
+ * The DDR address-translation table always assumes a 32bit
+ * bus and the comparison below takes care of adjusting for
+ * a 16bit bus (i.e. one column-address is consumed).
+ */
+ const struct {
+ u8 rows;
+ u8 columns;
+ u8 type;
+ } ddrconf_table[] = {
+ /*
+ * C-B-R-D patterns are first. For these we require an
+ * exact match for the columns and rows (as there's
+ * one entry per possible configuration).
+ */
+ [0] = { .rows = 13, .columns = 10, .type = DMC_MSCH_CBRD },
+ [1] = { .rows = 14, .columns = 10, .type = DMC_MSCH_CBRD },
+ [2] = { .rows = 15, .columns = 10, .type = DMC_MSCH_CBRD },
+ [3] = { .rows = 16, .columns = 10, .type = DMC_MSCH_CBRD },
+ [4] = { .rows = 14, .columns = 11, .type = DMC_MSCH_CBRD },
+ [5] = { .rows = 15, .columns = 11, .type = DMC_MSCH_CBRD },
+ [6] = { .rows = 16, .columns = 11, .type = DMC_MSCH_CBRD },
+ [7] = { .rows = 13, .columns = 9, .type = DMC_MSCH_CBRD },
+ [8] = { .rows = 14, .columns = 9, .type = DMC_MSCH_CBRD },
+ [9] = { .rows = 15, .columns = 9, .type = DMC_MSCH_CBRD },
+ [10] = { .rows = 16, .columns = 9, .type = DMC_MSCH_CBRD },
+ /*
+ * 11 through 13 are C-R-B-D patterns. These are
+ * matched for an exact number of columns and to
+ * ensure that the hardware uses at least as many rows
+ * as the pattern requires (i.e. we make sure that
+ * there's no gaps up until we hit the device/chip-select;
+ * however, these patterns can accept up to 16 rows,
+ * as the row-address continues right after the CS
+ * switching)
+ */
+ [11] = { .rows = 15, .columns = 10, .type = DMC_MSCH_CRBD },
+ [12] = { .rows = 14, .columns = 11, .type = DMC_MSCH_CRBD },
+ [13] = { .rows = 13, .columns = 10, .type = DMC_MSCH_CRBD },
+ /*
+ * 14 and 15 are catch-all variants using a C-B-D-R
+ * scheme (i.e. alternating the chip-select every time
+ * C-B overflows) and stuffing the remaining C-bits
+ * into the top. Matching needs to make sure that the
+ * number of columns is either an exact match (i.e. we
+ * can use less the the maximum number of rows) -or-
+ * that the columns exceed what is given in this table
+ * and the rows are an exact match (in which case the
+ * remaining C-bits will be stuffed onto the top after
+ * the device/chip-select switches).
+ */
+ [14] = { .rows = 16, .columns = 10, .type = DMC_MSCH_CBDR },
+ [15] = { .rows = 16, .columns = 9, .type = DMC_MSCH_CBDR },
+ };
+
+ /*
+ * For C-B-R-D, we need an exact match (i.e. both for the number of
+ * columns and rows), while for C-B-D-R, only the the number of
+ * columns needs to match.
+ */
+ for (i = 0; i < ARRAY_SIZE(ddrconf_table); i++) {
+ bool match = false;
+
+ /* If this entry if for a different matcher, then skip it */
+ if (ddrconf_table[i].type != params->memory_schedule)
+ continue;
+
+ /*
+ * Match according to the rules (exact/inexact/at-least)
+ * documented in the ddrconf_table above.
+ */
+ switch (params->memory_schedule) {
+ case DMC_MSCH_CBRD:
+ match = (ddrconf_table[i].columns == cols) &&
+ (ddrconf_table[i].rows == rows);
+ break;
+
+ case DMC_MSCH_CRBD:
+ match = (ddrconf_table[i].columns == cols) &&
+ (ddrconf_table[i].rows <= rows);
+ break;
+
+ case DMC_MSCH_CBDR:
+ match = (ddrconf_table[i].columns == cols) ||
+ ((ddrconf_table[i].columns <= cols) &&
+ (ddrconf_table[i].rows == rows));
+ break;
+
+ default:
+ break;
+ }
+
+ if (match) {
+ debug("%s: setting ddrconf 0x%x\n", __func__, i);
+ writel(i, &msch->ddrconf);
+ return 0;
+ }
+ }
+
+ error("%s: ddrconf (NIU config) not found\n", __func__);
+ return -EINVAL;
+}
+
+static void dram_all_config(struct udevice *dev)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+ struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
+ struct rk3368_sdram_params *params = dev_get_platdata(dev);
+ const struct rk3288_sdram_channel *info = ¶ms->chan;
+ u32 sys_reg = 0;
+ const int chan = 0;
+
+ sys_reg |= DDR3 << SYS_REG_DDRTYPE_SHIFT;
+ sys_reg |= 0 << SYS_REG_NUM_CH_SHIFT;
+
+ sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
+ sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
+ sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
+ sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
+ sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
+ sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
+ sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan);
+ sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(chan);
+ sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan);
+
+ writel(sys_reg, &pmugrf->os_reg[2]);
+}
+
+static int setup_sdram(struct udevice *dev)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+ struct rk3368_sdram_params *params = dev_get_platdata(dev);
+
+ struct rk3368_ddr_pctl *pctl = priv->pctl;
+ struct rk3368_ddrphy *ddrphy = priv->phy;
+ struct rk3368_cru *cru = priv->cru;
+ struct rk3368_grf *grf = priv->grf;
+ struct rk3368_msch *msch = priv->msch;
+
+ int ret;
+
+ /* The input clock (i.e. DPLL) needs to be 2x the DRAM frequency */
+ ret = clk_set_rate(&priv->ddr_clk, 2 * params->ddr_freq);
+ if (ret < 0) {
+ debug("%s: could not set DDR clock: %d\n", __func__, ret);
+ return ret;
+ }
+
+ /* Update the read-latency for the RK3368 */
+ writel(0x32, &msch->readlatency);
+
+ /* Initialise the DDR PCTL and DDR PHY */
+ ddrctl_reset(cru);
+ ddrphy_reset(ddrphy);
+ ddrphy_config_delays(ddrphy, params->ddr_freq);
+ dfi_cfg(pctl);
+ /* Configure relative system information of grf_ddrc0_con0 register */
+ ddr_set_ddr3_mode(grf, true);
+ ddr_set_noc_spr_err_stall(grf, true);
+ /* Calculate timings */
+ pctl_calc_timings(params, params->ddr_freq);
+ /* Initialise the device timings in protocol controller */
+ pctl_cfg(pctl, params, grf);
+ /* Configure AL, CL ... information of PHY registers */
+ ddrphy_config(ddrphy,
+ params->pctl_timing.tcl,
+ params->pctl_timing.tal,
+ params->pctl_timing.tcwl);
+
+ /* Initialize DRAM and configure with mode-register values */
+ ret = memory_init(pctl, params);
+ if (ret)
+ goto error;
+
+ move_to_config_state(pctl);
+ /* Perform data-training */
+ ddrphy_data_training(pctl, ddrphy);
+ move_to_access_state(pctl);
+
+ /* TODO(prt): could detect rank in training... */
+ params->chan.rank = 2;
+ /* TODO(prt): bus width is not auto-detected (yet)... */
+ params->chan.bw = 2; /* 32bit wide bus */
+ params->chan.dbw = params->chan.dbw; /* 32bit wide bus */
+
+ /* DDR3 is always 8 bank */
+ params->chan.bk = 3;
+ /* Detect col and row number */
+ ret = sdram_col_row_detect(dev);
+ if (ret)
+ goto error;
+
+ /* Configure NIU DDR configuration */
+ ret = msch_niu_config(msch, params);
+ if (ret)
+ goto error;
+
+ /* set up OS_REG to communicate w/ next stage and OS */
+ dram_all_config(dev);
+
+ return 0;
+
+error:
+ printf("DRAM init failed!\n");
+ hang();
+}
+#endif
+
+static int rk3368_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+ int ret = 0;
+
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+
+ ret = regmap_init_mem(dev, &plat->map);
+ if (ret)
+ return ret;
+#endif
+
+ return ret;
+}
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+ struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+ struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat;
+ int ret;
+
+ plat->ddr_freq = of_plat->rockchip_ddr_frequency;
+ plat->ddr_speed_bin = of_plat->rockchip_ddr_speed_bin;
+ plat->memory_schedule = of_plat->rockchip_memory_schedule;
+
+ ret = regmap_init_mem_platdata(dev, of_plat->reg,
+ ARRAY_SIZE(of_plat->reg) / 2,
+ &plat->map);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+#endif
+
+static int rk3368_dmc_probe(struct udevice *dev)
+{
+#ifdef CONFIG_TPL_BUILD
+ struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3368_ddr_pctl *pctl;
+ struct rk3368_ddrphy *ddrphy;
+ struct rk3368_cru *cru;
+ struct rk3368_grf *grf;
+ struct rk3368_msch *msch;
+ int ret;
+ struct udevice *dev_clk;
+#endif
+ struct dram_info *priv = dev_get_priv(dev);
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ ret = conv_of_platdata(dev);
+ if (ret)
+ return ret;
+#endif
+
+ priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+ debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
+
+#ifdef CONFIG_TPL_BUILD
+ pctl = regmap_get_range(plat->map, 0);
+ ddrphy = regmap_get_range(plat->map, 1);
+ msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+ priv->pctl = pctl;
+ priv->phy = ddrphy;
+ priv->msch = msch;
+ priv->grf = grf;
+
+ ret = rockchip_get_clk(&dev_clk);
+ if (ret)
+ return ret;
+ priv->ddr_clk.id = CLK_DDR;
+ ret = clk_request(dev_clk, &priv->ddr_clk);
+ if (ret)
+ return ret;
+
+ cru = rockchip_get_cru();
+ priv->cru = cru;
+ if (IS_ERR(priv->cru))
+ return PTR_ERR(priv->cru);
+
+ ret = setup_sdram(dev);
+ if (ret)
+ return ret;
+#endif
+
+ priv->info.base = 0;
+ priv->info.size =
+ rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
+
+ /*
+ * we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff
+ * is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is
+ * inaccessible for some IP controller.
+ */
+ priv->info.size = min(priv->info.size, (size_t)0xfe000000);
+
+ return 0;
+}
+
+static int rk3368_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+
+ *info = priv->info;
+ return 0;
+}
+
+static struct ram_ops rk3368_dmc_ops = {
+ .get_info = rk3368_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3368_dmc_ids[] = {
+ { .compatible = "rockchip,rk3368-dmc" },
+ { }
+};
+
+U_BOOT_DRIVER(dmc_rk3368) = {
+ .name = "rockchip_rk3368_dmc",
+ .id = UCLASS_RAM,
+ .of_match = rk3368_dmc_ids,
+ .ops = &rk3368_dmc_ops,
+ .probe = rk3368_dmc_probe,
+ .priv_auto_alloc_size = sizeof(struct dram_info),
+ .ofdata_to_platdata = rk3368_dmc_ofdata_to_platdata,
+ .probe = rk3368_dmc_probe,
+ .priv_auto_alloc_size = sizeof(struct dram_info),
+ .platdata_auto_alloc_size = sizeof(struct rk3368_sdram_params),
+};
void rtc_reset(void)
{
uchar *const data = rtc_validate();
- char const *const s = getenv("rtccal");
+ char const *const s = env_get("rtccal");
if (!data)
return;
printf("Found %d device(s).\n", scsi_max_devs);
#ifndef CONFIG_SPL_BUILD
- setenv_ulong("scsidevs", scsi_max_devs);
+ env_set_ulong("scsidevs", scsi_max_devs);
#endif
return 0;
}
int snlen;
/* Ger seiral number */
- if (!(sn = getenv("serial#"))) {
+ sn = env_get("serial#");
+ if (!sn)
sn = "000000000000";
- }
snlen = strlen(sn);
if (snlen > sizeof(serial_number) - 1) {
printf ("Warning: serial number %s is too long (%d > %lu)\n",
/* Decide on which type of UDC device to be.
*/
-
- if(!(tt = getenv("usbtty"))) {
+ tt = env_get("usbtty");
+ if (!tt)
tt = "generic";
- }
usbtty_init_terminal_type(strcmp(tt,"cdc_acm"));
/* prepare buffers... */
Zynq QSPI IP core. This IP is used to connect the flash in
4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
-config OMAP3_SPI
- bool "McSPI driver for OMAP"
- help
- SPI master controller for OMAP24XX and later Multichannel SPI
- (McSPI). This driver be used to access SPI chips on platforms
- embedding this OMAP3 McSPI IP core.
-
endif # if DM_SPI
config SOFT_SPI
help
Enable support for SPI on MPC8XX
+config OMAP3_SPI
+ bool "McSPI driver for OMAP"
+ help
+ SPI master controller for OMAP24XX and later Multichannel SPI
+ (McSPI). This driver be used to access SPI chips on platforms
+ embedding this OMAP3 McSPI IP core.
+
endmenu # menu "SPI Support"
static int rockchip_spi_calc_modclk(ulong max_freq)
{
+ /*
+ * While this is not strictly correct for the RK3368, as the
+ * GPLL will be 576MHz, things will still work, as the
+ * clk_set_rate(...) implementation in our clock-driver will
+ * chose the next closest rate not exceeding what we request
+ * based on the output of this function.
+ */
+
unsigned div;
const unsigned long gpll_hz = 594000000UL;
static const struct udevice_id rockchip_spi_ids[] = {
{ .compatible = "rockchip,rk3288-spi" },
+ { .compatible = "rockchip,rk3368-spi" },
{ .compatible = "rockchip,rk3399-spi" },
{ }
};
will be used. The timer is usually a 32 bits free-running up
counter. There may be no real tick, and no timer interrupt.
+config SPL_TIMER
+ bool "Enable driver model for timer drivers in SPL"
+ depends on TIMER && SPL
+ help
+ Enable support for timer drivers in SPL. These can be used to get
+ a timer value when in SPL, or perhaps for implementing a delay
+ function. This enables the drivers in drivers/timer as part of an
+ SPL build.
+
+config TPL_TIMER
+ bool "Enable driver model for timer drivers in TPL"
+ depends on TIMER && TPL
+ help
+ Enable support for timer drivers in TPL. These can be used to get
+ a timer value when in TPL, or perhaps for implementing a delay
+ function. This enables the drivers in drivers/timer as part of an
+ TPL build.
+
config TIMER_EARLY
bool "Allow timer to be used early in U-Boot"
depends on TIMER
help
Select this to enable a timer for AE3XX devices.
+config ROCKCHIP_TIMER
+ bool "Rockchip timer support"
+ depends on TIMER
+ help
+ Select this to enable support for the timer found on
+ Rockchip devices.
+
endmenu
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_TIMER) += timer-uclass.o
+obj-y += timer-uclass.o
obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o
obj-$(CONFIG_ARC_TIMER) += arc_timer.o
obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
obj-$(CONFIG_AE3XX_TIMER) += ae3xx_timer.o
+obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
--- /dev/null
+/*
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <mapmem.h>
+#include <asm/arch/timer.h>
+#include <dt-structs.h>
+#include <timer.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+struct rockchip_timer_plat {
+ struct dtd_rockchip_rk3368_timer dtd;
+};
+#endif
+
+/* Driver private data. Contains timer id. Could be either 0 or 1. */
+struct rockchip_timer_priv {
+ struct rk_timer *timer;
+};
+
+static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
+{
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+ uint64_t timebase_h, timebase_l;
+ uint64_t cntr;
+
+ timebase_l = readl(&priv->timer->timer_curr_value0);
+ timebase_h = readl(&priv->timer->timer_curr_value1);
+
+ /* timers are down-counting */
+ cntr = timebase_h << 32 | timebase_l;
+ *count = ~0ull - cntr;
+ return 0;
+}
+
+static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+
+ priv->timer = (struct rk_timer *)devfdt_get_addr(dev);
+#endif
+
+ return 0;
+}
+
+static int rockchip_timer_start(struct udevice *dev)
+{
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+ const uint64_t reload_val = ~0uLL;
+ const uint32_t reload_val_l = reload_val & 0xffffffff;
+ const uint32_t reload_val_h = reload_val >> 32;
+
+ /* disable timer and reset all control */
+ writel(0, &priv->timer->timer_ctrl_reg);
+ /* write reload value */
+ writel(reload_val_l, &priv->timer->timer_load_count0);
+ writel(reload_val_h, &priv->timer->timer_load_count1);
+ /* enable timer */
+ writel(1, &priv->timer->timer_ctrl_reg);
+
+ return 0;
+}
+
+static int rockchip_timer_probe(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+ struct rockchip_timer_plat *plat = dev_get_platdata(dev);
+
+ priv->timer = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+ uc_priv->clock_rate = plat->dtd.clock_frequency;
+#endif
+
+ return rockchip_timer_start(dev);
+}
+
+static const struct timer_ops rockchip_timer_ops = {
+ .get_count = rockchip_timer_get_count,
+};
+
+static const struct udevice_id rockchip_timer_ids[] = {
+ { .compatible = "rockchip,rk3368-timer" },
+ {}
+};
+
+U_BOOT_DRIVER(arc_timer) = {
+ .name = "rockchip_rk3368_timer",
+ .id = UCLASS_TIMER,
+ .of_match = rockchip_timer_ids,
+ .probe = rockchip_timer_probe,
+ .ops = &rockchip_timer_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+ .priv_auto_alloc_size = sizeof(struct rockchip_timer_priv),
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ .platdata_auto_alloc_size = sizeof(struct rockchip_timer_plat),
+#endif
+ .ofdata_to_platdata = rockchip_clk_ofdata_to_platdata,
+};
static int timer_pre_probe(struct udevice *dev)
{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct clk timer_clk;
int err;
} else
uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob,
dev_of_offset(dev), "clock-frequency", 0);
+#endif
return 0;
}
int notrace dm_timer_init(void)
{
- const void *blob = gd->fdt_blob;
+ __maybe_unused const void *blob = gd->fdt_blob;
struct udevice *dev = NULL;
- int node;
+ int node = -ENOENT;
int ret;
if (gd->timer)
return 0;
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
/* Check for a chosen timer to be used for tick */
node = fdtdec_get_chosen_node(blob, "tick-timer");
+#endif
if (node < 0) {
/* No chosen timer, trying first available timer */
ret = uclass_first_device_err(UCLASS_TIMER, &dev);
source "drivers/usb/gadget/Kconfig"
+source "drivers/usb/eth/Kconfig"
+
endif
--- /dev/null
+comment "USB to Ethernet Controller Drivers"
+
+config USB_ETHER_LAN75XX
+ bool "Microchip LAN75XX support"
+ ---help---
+ Say Y here if you would like to support Microchip LAN75XX Hi-Speed
+ USB 2.0 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
+
+config USB_ETHER_LAN78XX
+ bool "Microchip LAN78XX support"
+ ---help---
+ Say Y here if you would like to support Microchip LAN78XX USB 3.1
+ Gen 1 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
obj-$(CONFIG_USB_ETHER_ASIX88179) += asix88179.o
obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o
obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
+obj-$(CONFIG_USB_ETHER_LAN75XX) += lan7x.o lan75xx.o
+obj-$(CONFIG_USB_ETHER_LAN78XX) += lan7x.o lan78xx.o
obj-$(CONFIG_USB_ETHER_RTL8152) += r8152.o r8152_fw.o
--- /dev/null
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm.h>
+#include <usb.h>
+#include <linux/mii.h>
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/* LAN75xx specific register/bit defines */
+#define LAN75XX_HW_CFG_BIR BIT(7)
+
+#define LAN75XX_BURST_CAP 0x034
+
+#define LAN75XX_BULK_IN_DLY 0x03C
+
+#define LAN75XX_RFE_CTL 0x060
+
+#define LAN75XX_FCT_RX_CTL 0x090
+
+#define LAN75XX_FCT_TX_CTL 0x094
+
+#define LAN75XX_FCT_RX_FIFO_END 0x098
+
+#define LAN75XX_FCT_TX_FIFO_END 0x09C
+
+#define LAN75XX_FCT_FLOW 0x0A0
+
+/* MAC ADDRESS PERFECT FILTER For LAN75xx */
+#define LAN75XX_ADDR_FILTX 0x300
+#define LAN75XX_ADDR_FILTX_FB_VALID BIT(31)
+
+/*
+ * Lan75xx infrastructure commands
+ */
+static int lan75xx_phy_gig_workaround(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ int ret = 0;
+
+ /* Only internal phy */
+ /* Set the phy in Gig loopback */
+ lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
+ (BMCR_LOOPBACK | BMCR_SPEED1000));
+
+ /* Wait for the link up */
+ ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
+ dev->phy_id, MII_BMSR, BMSR_LSTATUS,
+ true, PHY_CONNECT_TIMEOUT_MS, 1);
+ if (ret)
+ return ret;
+
+ /* phy reset */
+ return lan7x_pmt_phy_reset(udev, dev);
+}
+
+static int lan75xx_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ uint32_t flow = 0, fct_flow = 0;
+ int ret;
+
+ ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow);
+ if (ret)
+ return ret;
+ return lan7x_write_reg(udev, FLOW, flow);
+}
+
+static int lan75xx_set_receive_filter(struct usb_device *udev)
+{
+ /* No multicast in u-boot */
+ return lan7x_write_reg(udev, LAN75XX_RFE_CTL,
+ RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT);
+}
+
+/* starts the TX path */
+static void lan75xx_start_tx_path(struct usb_device *udev)
+{
+ /* Enable Tx at MAC */
+ lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);
+
+ /* Enable Tx at SCSRs */
+ lan7x_write_reg(udev, LAN75XX_FCT_TX_CTL, FCT_TX_CTL_EN);
+}
+
+/* Starts the Receive path */
+static void lan75xx_start_rx_path(struct usb_device *udev)
+{
+ /* Enable Rx at MAC */
+ lan7x_write_reg(udev, MAC_RX,
+ LAN7X_MAC_RX_MAX_SIZE_DEFAULT |
+ MAC_RX_FCS_STRIP | MAC_RX_RXEN);
+
+ /* Enable Rx at SCSRs */
+ lan7x_write_reg(udev, LAN75XX_FCT_RX_CTL, FCT_RX_CTL_EN);
+}
+
+static int lan75xx_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev,
+ struct lan7x_private *priv)
+{
+ int ret;
+ u32 val;
+
+ ret = lan7x_basic_reset(udev, dev);
+ if (ret)
+ return ret;
+
+ /* Keep the chip ID */
+ ret = lan7x_read_reg(udev, ID_REV, &val);
+ if (ret)
+ return ret;
+ debug("LAN75xx ID_REV = 0x%08x\n", val);
+
+ priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16;
+
+ /* Respond to the IN token with a NAK */
+ ret = lan7x_read_reg(udev, HW_CFG, &val);
+ if (ret)
+ return ret;
+ val |= LAN75XX_HW_CFG_BIR;
+ return lan7x_write_reg(udev, HW_CFG, val);
+}
+
+int lan75xx_write_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ unsigned char *enetaddr = pdata->enetaddr;
+ u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
+ u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
+ int ret;
+
+ /* set hardware address */
+ ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX + 4, addr_lo);
+ if (ret)
+ return ret;
+
+ addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID;
+ ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi);
+ if (ret)
+ return ret;
+
+ debug("MAC addr %pM written\n", enetaddr);
+
+ return 0;
+}
+
+static int lan75xx_eth_start(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ int ret;
+ u32 write_buf;
+
+ /* Reset and read Mac addr were done in probe() */
+ ret = lan75xx_write_hwaddr(dev);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_BURST_CAP, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
+ if (ret)
+ return ret;
+
+ /* set FIFO sizes */
+ write_buf = (MAX_RX_FIFO_SIZE - 512) / 512;
+ ret = lan7x_write_reg(udev, LAN75XX_FCT_RX_FIFO_END, write_buf);
+ if (ret)
+ return ret;
+
+ write_buf = (MAX_TX_FIFO_SIZE - 512) / 512;
+ ret = lan7x_write_reg(udev, LAN75XX_FCT_TX_FIFO_END, write_buf);
+ if (ret)
+ return ret;
+
+ /* Init Tx */
+ ret = lan7x_write_reg(udev, FLOW, 0);
+ if (ret)
+ return ret;
+
+ /* Init Rx. Set Vlan, keep default for VLAN on 75xx */
+ ret = lan75xx_set_receive_filter(udev);
+ if (ret)
+ return ret;
+
+ /* phy workaround for gig link */
+ ret = lan75xx_phy_gig_workaround(udev, ueth);
+ if (ret)
+ return ret;
+
+ /* Init PHY, autonego, and link */
+ ret = lan7x_eth_phylib_connect(dev, &priv->ueth);
+ if (ret)
+ return ret;
+ ret = lan7x_eth_phylib_config_start(dev);
+ if (ret)
+ return ret;
+
+ /*
+ * MAC_CR has to be set after PHY init.
+ * MAC will auto detect the PHY speed.
+ */
+ ret = lan7x_read_reg(udev, MAC_CR, &write_buf);
+ if (ret)
+ return ret;
+ write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP;
+ ret = lan7x_write_reg(udev, MAC_CR, write_buf);
+ if (ret)
+ return ret;
+
+ lan75xx_start_tx_path(udev);
+ lan75xx_start_rx_path(udev);
+
+ return lan75xx_update_flowcontrol(udev, ueth);
+}
+
+int lan75xx_read_rom_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ int ret;
+
+ /*
+ * Refer to the doc/README.enetaddr and doc/README.usb for
+ * the U-Boot MAC address policy
+ */
+ ret = lan7x_read_eeprom_mac(pdata->enetaddr, udev);
+ if (ret)
+ memset(pdata->enetaddr, 0, 6);
+
+ return 0;
+}
+
+static int lan75xx_eth_probe(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ int ret;
+
+ /* Do a reset in order to get the MAC address from HW */
+ if (lan75xx_basic_reset(udev, ueth, priv))
+ return 0;
+
+ /* Get the MAC address */
+ /*
+ * We must set the eth->enetaddr from HW because the upper layer
+ * will force to use the environmental var (usbethaddr) or random if
+ * there is no valid MAC address in eth->enetaddr.
+ *
+ * Refer to the doc/README.enetaddr and doc/README.usb for
+ * the U-Boot MAC address policy
+ */
+ lan7x_read_eeprom_mac(pdata->enetaddr, udev);
+ /* Do not return 0 for not finding MAC addr in HW */
+
+ ret = usb_ether_register(dev, ueth, RX_URB_SIZE);
+ if (ret)
+ return ret;
+
+ /* Register phylib */
+ return lan7x_phylib_register(dev);
+}
+
+static const struct eth_ops lan75xx_eth_ops = {
+ .start = lan75xx_eth_start,
+ .send = lan7x_eth_send,
+ .recv = lan7x_eth_recv,
+ .free_pkt = lan7x_free_pkt,
+ .stop = lan7x_eth_stop,
+ .write_hwaddr = lan75xx_write_hwaddr,
+ .read_rom_hwaddr = lan75xx_read_rom_hwaddr,
+};
+
+U_BOOT_DRIVER(lan75xx_eth) = {
+ .name = "lan75xx_eth",
+ .id = UCLASS_ETH,
+ .probe = lan75xx_eth_probe,
+ .remove = lan7x_eth_remove,
+ .ops = &lan75xx_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct lan7x_private),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
+
+static const struct usb_device_id lan75xx_eth_id_table[] = {
+ { USB_DEVICE(0x0424, 0x7500) }, /* LAN7500 USB Ethernet */
+ { } /* Terminating entry */
+};
+
+U_BOOT_USB_DEVICE(lan75xx_eth, lan75xx_eth_id_table);
--- /dev/null
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm.h>
+#include <usb.h>
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/* LAN78xx specific register/bit defines */
+#define LAN78XX_HW_CFG_LED1_EN BIT(21) /* Muxed with EEDO */
+#define LAN78XX_HW_CFG_LED0_EN BIT(20) /* Muxed with EECLK */
+
+#define LAN78XX_USB_CFG0 0x080
+#define LAN78XX_USB_CFG0_BIR BIT(6)
+
+#define LAN78XX_BURST_CAP 0x090
+
+#define LAN78XX_BULK_IN_DLY 0x094
+
+#define LAN78XX_RFE_CTL 0x0B0
+
+#define LAN78XX_FCT_RX_CTL 0x0C0
+
+#define LAN78XX_FCT_TX_CTL 0x0C4
+
+#define LAN78XX_FCT_RX_FIFO_END 0x0C8
+
+#define LAN78XX_FCT_TX_FIFO_END 0x0CC
+
+#define LAN78XX_FCT_FLOW 0x0D0
+
+#define LAN78XX_MAF_BASE 0x400
+#define LAN78XX_MAF_HIX 0x00
+#define LAN78XX_MAF_LOX 0x04
+#define LAN78XX_MAF_HI_BEGIN (LAN78XX_MAF_BASE + LAN78XX_MAF_HIX)
+#define LAN78XX_MAF_LO_BEGIN (LAN78XX_MAF_BASE + LAN78XX_MAF_LOX)
+#define LAN78XX_MAF_HI(index) (LAN78XX_MAF_BASE + (8 * (index)) + \
+ LAN78XX_MAF_HIX)
+#define LAN78XX_MAF_LO(index) (LAN78XX_MAF_BASE + (8 * (index)) + \
+ LAN78XX_MAF_LOX)
+#define LAN78XX_MAF_HI_VALID BIT(31)
+
+/* OTP registers */
+#define LAN78XX_OTP_BASE_ADDR 0x00001000
+
+#define LAN78XX_OTP_PWR_DN (LAN78XX_OTP_BASE_ADDR + 4 * 0x00)
+#define LAN78XX_OTP_PWR_DN_PWRDN_N BIT(0)
+
+#define LAN78XX_OTP_ADDR1 (LAN78XX_OTP_BASE_ADDR + 4 * 0x01)
+#define LAN78XX_OTP_ADDR1_15_11 0x1F
+
+#define LAN78XX_OTP_ADDR2 (LAN78XX_OTP_BASE_ADDR + 4 * 0x02)
+#define LAN78XX_OTP_ADDR2_10_3 0xFF
+
+#define LAN78XX_OTP_RD_DATA (LAN78XX_OTP_BASE_ADDR + 4 * 0x06)
+
+#define LAN78XX_OTP_FUNC_CMD (LAN78XX_OTP_BASE_ADDR + 4 * 0x08)
+#define LAN78XX_OTP_FUNC_CMD_READ BIT(0)
+
+#define LAN78XX_OTP_CMD_GO (LAN78XX_OTP_BASE_ADDR + 4 * 0x0A)
+#define LAN78XX_OTP_CMD_GO_GO BIT(0)
+
+#define LAN78XX_OTP_STATUS (LAN78XX_OTP_BASE_ADDR + 4 * 0x0C)
+#define LAN78XX_OTP_STATUS_BUSY BIT(0)
+
+#define LAN78XX_OTP_INDICATOR_1 0xF3
+#define LAN78XX_OTP_INDICATOR_2 0xF7
+
+/*
+ * Lan78xx infrastructure commands
+ */
+static int lan78xx_read_raw_otp(struct usb_device *udev, u32 offset,
+ u32 length, u8 *data)
+{
+ int i;
+ int ret;
+ u32 buf;
+
+ ret = lan7x_read_reg(udev, LAN78XX_OTP_PWR_DN, &buf);
+ if (ret)
+ return ret;
+
+ if (buf & LAN78XX_OTP_PWR_DN_PWRDN_N) {
+ /* clear it and wait to be cleared */
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_PWR_DN, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_wait_for_bit(udev, "LAN78XX_OTP_PWR_DN_PWRDN_N",
+ LAN78XX_OTP_PWR_DN,
+ LAN78XX_OTP_PWR_DN_PWRDN_N,
+ false, 1000, 0);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < length; i++) {
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_ADDR1,
+ ((offset + i) >> 8) &
+ LAN78XX_OTP_ADDR1_15_11);
+ if (ret)
+ return ret;
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_ADDR2,
+ ((offset + i) & LAN78XX_OTP_ADDR2_10_3));
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_FUNC_CMD,
+ LAN78XX_OTP_FUNC_CMD_READ);
+ if (ret)
+ return ret;
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_CMD_GO,
+ LAN78XX_OTP_CMD_GO_GO);
+
+ if (ret)
+ return ret;
+
+ ret = lan7x_wait_for_bit(udev, "LAN78XX_OTP_STATUS_BUSY",
+ LAN78XX_OTP_STATUS,
+ LAN78XX_OTP_STATUS_BUSY,
+ false, 1000, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_read_reg(udev, LAN78XX_OTP_RD_DATA, &buf);
+ if (ret)
+ return ret;
+
+ data[i] = (u8)(buf & 0xFF);
+ }
+
+ return 0;
+}
+
+static int lan78xx_read_otp(struct usb_device *udev, u32 offset,
+ u32 length, u8 *data)
+{
+ u8 sig;
+ int ret;
+
+ ret = lan78xx_read_raw_otp(udev, 0, 1, &sig);
+
+ if (!ret) {
+ if (sig == LAN78XX_OTP_INDICATOR_1)
+ offset = offset;
+ else if (sig == LAN78XX_OTP_INDICATOR_2)
+ offset += 0x100;
+ else
+ return -EINVAL;
+ ret = lan78xx_read_raw_otp(udev, offset, length, data);
+ if (ret)
+ return ret;
+ }
+ debug("LAN78x: MAC address from OTP = %pM\n", data);
+
+ return ret;
+}
+
+static int lan78xx_read_otp_mac(unsigned char *enetaddr,
+ struct usb_device *udev)
+{
+ int ret;
+
+ memset(enetaddr, 0, 6);
+
+ ret = lan78xx_read_otp(udev,
+ EEPROM_MAC_OFFSET,
+ ETH_ALEN,
+ enetaddr);
+ if (!ret && is_valid_ethaddr(enetaddr)) {
+ /* eeprom values are valid so use them */
+ debug("MAC address read from OTP %pM\n", enetaddr);
+ return 0;
+ }
+ debug("MAC address read from OTP invalid %pM\n", enetaddr);
+
+ memset(enetaddr, 0, 6);
+ return -EINVAL;
+}
+
+static int lan78xx_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ uint32_t flow = 0, fct_flow = 0;
+ int ret;
+
+ ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_FCT_FLOW, fct_flow);
+ if (ret)
+ return ret;
+ return lan7x_write_reg(udev, FLOW, flow);
+}
+
+static int lan78xx_read_mac(unsigned char *enetaddr,
+ struct usb_device *udev,
+ struct lan7x_private *priv)
+{
+ u32 val;
+ int ret;
+ int saved = 0, done = 0;
+
+ /*
+ * Depends on chip, some EEPROM pins are muxed with LED function.
+ * disable & restore LED function to access EEPROM.
+ */
+ if ((priv->chipid == ID_REV_CHIP_ID_7800) ||
+ (priv->chipid == ID_REV_CHIP_ID_7850)) {
+ ret = lan7x_read_reg(udev, HW_CFG, &val);
+ if (ret)
+ return ret;
+ saved = val;
+ val &= ~(LAN78XX_HW_CFG_LED1_EN | LAN78XX_HW_CFG_LED0_EN);
+ ret = lan7x_write_reg(udev, HW_CFG, val);
+ if (ret)
+ goto restore;
+ }
+
+ /*
+ * Refer to the doc/README.enetaddr and doc/README.usb for
+ * the U-Boot MAC address policy
+ */
+ /* try reading mac address from EEPROM, then from OTP */
+ ret = lan7x_read_eeprom_mac(enetaddr, udev);
+ if (!ret)
+ done = 1;
+
+restore:
+ if ((priv->chipid == ID_REV_CHIP_ID_7800) ||
+ (priv->chipid == ID_REV_CHIP_ID_7850)) {
+ ret = lan7x_write_reg(udev, HW_CFG, saved);
+ if (ret)
+ return ret;
+ }
+ /* if the EEPROM mac address is good, then exit */
+ if (done)
+ return 0;
+
+ /* try reading mac address from OTP if the device is LAN78xx */
+ return lan78xx_read_otp_mac(enetaddr, udev);
+}
+
+static int lan78xx_set_receive_filter(struct usb_device *udev)
+{
+ /* No multicast in u-boot for now */
+ return lan7x_write_reg(udev, LAN78XX_RFE_CTL,
+ RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT);
+}
+
+/* starts the TX path */
+static void lan78xx_start_tx_path(struct usb_device *udev)
+{
+ /* Enable Tx at MAC */
+ lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);
+
+ /* Enable Tx at SCSRs */
+ lan7x_write_reg(udev, LAN78XX_FCT_TX_CTL, FCT_TX_CTL_EN);
+}
+
+/* Starts the Receive path */
+static void lan78xx_start_rx_path(struct usb_device *udev)
+{
+ /* Enable Rx at MAC */
+ lan7x_write_reg(udev, MAC_RX,
+ LAN7X_MAC_RX_MAX_SIZE_DEFAULT |
+ MAC_RX_FCS_STRIP | MAC_RX_RXEN);
+
+ /* Enable Rx at SCSRs */
+ lan7x_write_reg(udev, LAN78XX_FCT_RX_CTL, FCT_RX_CTL_EN);
+}
+
+static int lan78xx_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev,
+ struct lan7x_private *priv)
+{
+ int ret;
+ u32 val;
+
+ ret = lan7x_basic_reset(udev, dev);
+ if (ret)
+ return ret;
+
+ /* Keep the chip ID */
+ ret = lan7x_read_reg(udev, ID_REV, &val);
+ if (ret)
+ return ret;
+ debug("LAN78xx ID_REV = 0x%08x\n", val);
+
+ priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16;
+
+ /* Respond to the IN token with a NAK */
+ ret = lan7x_read_reg(udev, LAN78XX_USB_CFG0, &val);
+ if (ret)
+ return ret;
+ val |= LAN78XX_USB_CFG0_BIR;
+ return lan7x_write_reg(udev, LAN78XX_USB_CFG0, val);
+}
+
+int lan78xx_write_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ unsigned char *enetaddr = pdata->enetaddr;
+ u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
+ u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
+ int ret;
+
+ /* set hardware address */
+ ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_MAF_LO(0), addr_lo);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_MAF_HI(0),
+ addr_hi | LAN78XX_MAF_HI_VALID);
+ if (ret)
+ return ret;
+
+ debug("MAC addr %pM written\n", enetaddr);
+
+ return 0;
+}
+
+static int lan78xx_eth_start(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+
+ int ret;
+ u32 write_buf;
+
+ /* Reset and read Mac addr were done in probe() */
+ ret = lan78xx_write_hwaddr(dev);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_BURST_CAP, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);
+ if (ret)
+ return ret;
+
+ /* set FIFO sizes */
+ ret = lan7x_write_reg(udev, LAN78XX_FCT_RX_FIFO_END,
+ (MAX_RX_FIFO_SIZE - 512) / 512);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_FCT_TX_FIFO_END,
+ (MAX_TX_FIFO_SIZE - 512) / 512);
+ if (ret)
+ return ret;
+
+ /* Init Tx */
+ ret = lan7x_write_reg(udev, FLOW, 0);
+ if (ret)
+ return ret;
+
+ /* Init Rx. Set Vlan, keep default for VLAN on 78xx */
+ ret = lan78xx_set_receive_filter(udev);
+ if (ret)
+ return ret;
+
+ /* Init PHY, autonego, and link */
+ ret = lan7x_eth_phylib_connect(dev, &priv->ueth);
+ if (ret)
+ return ret;
+ ret = lan7x_eth_phylib_config_start(dev);
+ if (ret)
+ return ret;
+
+ /*
+ * MAC_CR has to be set after PHY init.
+ * MAC will auto detect the PHY speed.
+ */
+ ret = lan7x_read_reg(udev, MAC_CR, &write_buf);
+ if (ret)
+ return ret;
+ write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP;
+ ret = lan7x_write_reg(udev, MAC_CR, write_buf);
+ if (ret)
+ return ret;
+
+ lan78xx_start_tx_path(udev);
+ lan78xx_start_rx_path(udev);
+
+ return lan78xx_update_flowcontrol(udev, &priv->ueth);
+}
+
+int lan78xx_read_rom_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = lan78xx_read_mac(pdata->enetaddr, udev, priv);
+ if (ret)
+ memset(pdata->enetaddr, 0, 6);
+
+ return 0;
+}
+
+static int lan78xx_eth_probe(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ int ret;
+
+ /* Do a reset in order to get the MAC address from HW */
+ if (lan78xx_basic_reset(udev, ueth, priv))
+ return 0;
+
+ /* Get the MAC address */
+ /*
+ * We must set the eth->enetaddr from HW because the upper layer
+ * will force to use the environmental var (usbethaddr) or random if
+ * there is no valid MAC address in eth->enetaddr.
+ */
+ lan78xx_read_mac(pdata->enetaddr, udev, priv);
+ /* Do not return 0 for not finding MAC addr in HW */
+
+ ret = usb_ether_register(dev, ueth, RX_URB_SIZE);
+ if (ret)
+ return ret;
+
+ /* Register phylib */
+ return lan7x_phylib_register(dev);
+}
+
+static const struct eth_ops lan78xx_eth_ops = {
+ .start = lan78xx_eth_start,
+ .send = lan7x_eth_send,
+ .recv = lan7x_eth_recv,
+ .free_pkt = lan7x_free_pkt,
+ .stop = lan7x_eth_stop,
+ .write_hwaddr = lan78xx_write_hwaddr,
+ .read_rom_hwaddr = lan78xx_read_rom_hwaddr,
+};
+
+U_BOOT_DRIVER(lan78xx_eth) = {
+ .name = "lan78xx_eth",
+ .id = UCLASS_ETH,
+ .probe = lan78xx_eth_probe,
+ .remove = lan7x_eth_remove,
+ .ops = &lan78xx_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct lan7x_private),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
+
+static const struct usb_device_id lan78xx_eth_id_table[] = {
+ { USB_DEVICE(0x0424, 0x7800) }, /* LAN7800 USB Ethernet */
+ { USB_DEVICE(0x0424, 0x7850) }, /* LAN7850 USB Ethernet */
+ { } /* Terminating entry */
+};
+
+U_BOOT_USB_DEVICE(lan78xx_eth, lan78xx_eth_id_table);
--- /dev/null
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm.h>
+#include <malloc.h>
+#include <miiphy.h>
+#include <memalign.h>
+#include <usb.h>
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/*
+ * Lan7x infrastructure commands
+ */
+int lan7x_write_reg(struct usb_device *udev, u32 index, u32 data)
+{
+ int len;
+ ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
+
+ cpu_to_le32s(&data);
+ tmpbuf[0] = data;
+
+ len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
+ USB_VENDOR_REQUEST_WRITE_REGISTER,
+ USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
+ 0, index, tmpbuf, sizeof(data),
+ USB_CTRL_SET_TIMEOUT_MS);
+ if (len != sizeof(data)) {
+ debug("%s failed: index=%d, data=%d, len=%d",
+ __func__, index, data, len);
+ return -EIO;
+ }
+ return 0;
+}
+
+int lan7x_read_reg(struct usb_device *udev, u32 index, u32 *data)
+{
+ int len;
+ ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
+
+ len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+ USB_VENDOR_REQUEST_READ_REGISTER,
+ USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
+ 0, index, tmpbuf, sizeof(*data),
+ USB_CTRL_GET_TIMEOUT_MS);
+ *data = tmpbuf[0];
+ if (len != sizeof(*data)) {
+ debug("%s failed: index=%d, len=%d", __func__, index, len);
+ return -EIO;
+ }
+
+ le32_to_cpus(data);
+ return 0;
+}
+
+static int lan7x_phy_wait_not_busy(struct usb_device *udev)
+{
+ return lan7x_wait_for_bit(udev, __func__,
+ MII_ACC, MII_ACC_MII_BUSY,
+ false, 100, 0);
+}
+
+int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx)
+{
+ u32 val, addr;
+
+ /* confirm MII not busy */
+ if (lan7x_phy_wait_not_busy(udev)) {
+ debug("MII is busy in %s\n", __func__);
+ return -ETIMEDOUT;
+ }
+
+ /* set the address, index & direction (read from PHY) */
+ addr = (phy_id << 11) | (idx << 6) |
+ MII_ACC_MII_READ | MII_ACC_MII_BUSY;
+ lan7x_write_reg(udev, MII_ACC, addr);
+
+ if (lan7x_phy_wait_not_busy(udev)) {
+ debug("Timed out reading MII reg %02X\n", idx);
+ return -ETIMEDOUT;
+ }
+
+ lan7x_read_reg(udev, MII_DATA, &val);
+
+ return val & 0xFFFF;
+}
+
+void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx, int regval)
+{
+ u32 addr;
+
+ /* confirm MII not busy */
+ if (lan7x_phy_wait_not_busy(udev)) {
+ debug("MII is busy in %s\n", __func__);
+ return;
+ }
+
+ lan7x_write_reg(udev, MII_DATA, regval);
+
+ /* set the address, index & direction (write to PHY) */
+ addr = (phy_id << 11) | (idx << 6) |
+ MII_ACC_MII_WRITE | MII_ACC_MII_BUSY;
+ lan7x_write_reg(udev, MII_ACC, addr);
+
+ if (lan7x_phy_wait_not_busy(udev))
+ debug("Timed out writing MII reg %02X\n", idx);
+}
+
+/*
+ * Lan7x phylib wrappers
+ */
+static int lan7x_phylib_mdio_read(struct mii_dev *bus,
+ int addr, int devad, int reg)
+{
+ struct usb_device *udev = dev_get_parent_priv(bus->priv);
+
+ return lan7x_mdio_read(udev, addr, reg);
+}
+
+static int lan7x_phylib_mdio_write(struct mii_dev *bus,
+ int addr, int devad, int reg, u16 val)
+{
+ struct usb_device *udev = dev_get_parent_priv(bus->priv);
+
+ lan7x_mdio_write(udev, addr, reg, (int)val);
+
+ return 0;
+}
+
+/*
+ * Lan7x eeprom functions
+ */
+static int lan7x_eeprom_confirm_not_busy(struct usb_device *udev)
+{
+ return lan7x_wait_for_bit(udev, __func__,
+ E2P_CMD, E2P_CMD_EPC_BUSY,
+ false, 100, 0);
+}
+
+static int lan7x_wait_eeprom(struct usb_device *udev)
+{
+ return lan7x_wait_for_bit(udev, __func__,
+ E2P_CMD,
+ (E2P_CMD_EPC_BUSY | E2P_CMD_EPC_TIMEOUT),
+ false, 100, 0);
+}
+
+static int lan7x_read_eeprom(struct usb_device *udev,
+ u32 offset, u32 length, u8 *data)
+{
+ u32 val;
+ int i, ret;
+
+ ret = lan7x_eeprom_confirm_not_busy(udev);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < length; i++) {
+ val = E2P_CMD_EPC_BUSY | E2P_CMD_EPC_CMD_READ |
+ (offset & E2P_CMD_EPC_ADDR_MASK);
+ lan7x_write_reg(udev, E2P_CMD, val);
+
+ ret = lan7x_wait_eeprom(udev);
+ if (ret)
+ return ret;
+
+ lan7x_read_reg(udev, E2P_DATA, &val);
+ data[i] = val & 0xFF;
+ offset++;
+ }
+ return ret;
+}
+
+/*
+ * Lan7x phylib functions
+ */
+int lan7x_phylib_register(struct udevice *udev)
+{
+ struct usb_device *usbdev = dev_get_parent_priv(udev);
+ struct lan7x_private *priv = dev_get_priv(udev);
+ int ret;
+
+ priv->mdiobus = mdio_alloc();
+ if (!priv->mdiobus) {
+ printf("mdio_alloc failed\n");
+ return -ENOMEM;
+ }
+ priv->mdiobus->read = lan7x_phylib_mdio_read;
+ priv->mdiobus->write = lan7x_phylib_mdio_write;
+ sprintf(priv->mdiobus->name,
+ "lan7x_mdiobus-d%hu-p%hu", usbdev->devnum, usbdev->portnr);
+ priv->mdiobus->priv = (void *)udev;
+
+ ret = mdio_register(priv->mdiobus);
+ if (ret) {
+ printf("mdio_register failed\n");
+ free(priv->mdiobus);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+int lan7x_eth_phylib_connect(struct udevice *udev, struct ueth_data *dev)
+{
+ struct lan7x_private *priv = dev_get_priv(udev);
+
+ priv->phydev = phy_connect(priv->mdiobus, dev->phy_id,
+ udev, PHY_INTERFACE_MODE_MII);
+
+ if (!priv->phydev) {
+ printf("phy_connect failed\n");
+ return -ENODEV;
+ }
+ return 0;
+}
+
+int lan7x_eth_phylib_config_start(struct udevice *udev)
+{
+ struct lan7x_private *priv = dev_get_priv(udev);
+ int ret;
+
+ /* configure supported modes */
+ priv->phydev->supported = PHY_BASIC_FEATURES |
+ SUPPORTED_1000baseT_Full |
+ SUPPORTED_Pause |
+ SUPPORTED_Asym_Pause;
+
+ priv->phydev->advertising = ADVERTISED_10baseT_Half |
+ ADVERTISED_10baseT_Full |
+ ADVERTISED_100baseT_Half |
+ ADVERTISED_100baseT_Full |
+ ADVERTISED_1000baseT_Full |
+ ADVERTISED_Pause |
+ ADVERTISED_Asym_Pause |
+ ADVERTISED_Autoneg;
+
+ priv->phydev->autoneg = AUTONEG_ENABLE;
+
+ ret = genphy_config_aneg(priv->phydev);
+ if (ret) {
+ printf("genphy_config_aneg failed\n");
+ return ret;
+ }
+ ret = phy_startup(priv->phydev);
+ if (ret) {
+ printf("phy_startup failed\n");
+ return ret;
+ }
+
+ debug("** %s() speed %i duplex %i adv %X supp %X\n", __func__,
+ priv->phydev->speed, priv->phydev->duplex,
+ priv->phydev->advertising, priv->phydev->supported);
+
+ return 0;
+}
+
+int lan7x_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev,
+ uint32_t *flow, uint32_t *fct_flow)
+{
+ uint32_t lcladv, rmtadv;
+ u8 cap = 0;
+ struct lan7x_private *priv = dev_get_priv(udev->dev);
+
+ debug("** %s()\n", __func__);
+ debug("** %s() priv->phydev->speed %i duplex %i\n", __func__,
+ priv->phydev->speed, priv->phydev->duplex);
+
+ if (priv->phydev->duplex == DUPLEX_FULL) {
+ lcladv = lan7x_mdio_read(udev, dev->phy_id, MII_ADVERTISE);
+ rmtadv = lan7x_mdio_read(udev, dev->phy_id, MII_LPA);
+ cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
+
+ debug("TX Flow ");
+ if (cap & FLOW_CTRL_TX) {
+ *flow = (FLOW_CR_TX_FCEN | 0xFFFF);
+ /* set fct_flow thresholds to 20% and 80% */
+ *fct_flow = ((MAX_RX_FIFO_SIZE * 2) / (10 * 512))
+ & 0x7FUL;
+ *fct_flow <<= 8UL;
+ *fct_flow |= ((MAX_RX_FIFO_SIZE * 8) / (10 * 512))
+ & 0x7FUL;
+ debug("EN ");
+ } else {
+ debug("DIS ");
+ }
+ debug("RX Flow ");
+ if (cap & FLOW_CTRL_RX) {
+ *flow |= FLOW_CR_RX_FCEN;
+ debug("EN");
+ } else {
+ debug("DIS");
+ }
+ }
+ debug("\n");
+ return 0;
+}
+
+int lan7x_read_eeprom_mac(unsigned char *enetaddr, struct usb_device *udev)
+{
+ int ret;
+
+ memset(enetaddr, 0, 6);
+
+ ret = lan7x_read_eeprom(udev, 0, 1, enetaddr);
+
+ if ((ret == 0) && (enetaddr[0] == EEPROM_INDICATOR)) {
+ ret = lan7x_read_eeprom(udev,
+ EEPROM_MAC_OFFSET, ETH_ALEN,
+ enetaddr);
+ if ((ret == 0) && is_valid_ethaddr(enetaddr)) {
+ /* eeprom values are valid so use them */
+ debug("MAC address read from EEPROM %pM\n",
+ enetaddr);
+ return 0;
+ }
+ }
+ debug("MAC address read from EEPROM invalid %pM\n", enetaddr);
+
+ memset(enetaddr, 0, 6);
+ return -EINVAL;
+}
+
+int lan7x_pmt_phy_reset(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ int ret;
+ u32 data;
+
+ ret = lan7x_read_reg(udev, PMT_CTL, &data);
+ if (ret)
+ return ret;
+ ret = lan7x_write_reg(udev, PMT_CTL, data | PMT_CTL_PHY_RST);
+ if (ret)
+ return ret;
+
+ /* for LAN7x, we need to check PMT_CTL_READY asserted */
+ ret = lan7x_wait_for_bit(udev, "PMT_CTL_PHY_RST",
+ PMT_CTL, PMT_CTL_PHY_RST,
+ false, 1000, 0); /* could take over 125mS */
+ if (ret)
+ return ret;
+
+ return lan7x_wait_for_bit(udev, "PMT_CTL_READY",
+ PMT_CTL, PMT_CTL_READY,
+ true, 1000, 0);
+}
+
+int lan7x_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ int ret;
+
+ dev->phy_id = LAN7X_INTERNAL_PHY_ID; /* fixed phy id */
+
+ ret = lan7x_write_reg(udev, HW_CFG, HW_CFG_LRST);
+ if (ret)
+ return ret;
+
+ ret = lan7x_wait_for_bit(udev, "HW_CFG_LRST",
+ HW_CFG, HW_CFG_LRST,
+ false, 1000, 0);
+ if (ret)
+ return ret;
+
+ debug("USB devnum %d portnr %d\n", udev->devnum, udev->portnr);
+
+ return lan7x_pmt_phy_reset(udev, dev);
+}
+
+void lan7x_eth_stop(struct udevice *dev)
+{
+ debug("** %s()\n", __func__);
+}
+
+int lan7x_eth_send(struct udevice *dev, void *packet, int length)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ int err;
+ int actual_len;
+ u32 tx_cmd_a;
+ u32 tx_cmd_b;
+ ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
+ PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
+
+ debug("** %s(), len %d, buf %#x\n", __func__, length,
+ (unsigned int)(ulong) msg);
+ if (length > PKTSIZE)
+ return -ENOSPC;
+
+ /* LAN7x disable all TX offload features for u-boot */
+ tx_cmd_a = (u32) (length & TX_CMD_A_LEN_MASK) | TX_CMD_A_FCS;
+ tx_cmd_b = 0;
+ cpu_to_le32s(&tx_cmd_a);
+ cpu_to_le32s(&tx_cmd_b);
+
+ /* prepend cmd_a and cmd_b */
+ memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
+ memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
+ memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
+ length);
+ err = usb_bulk_msg(ueth->pusb_dev,
+ usb_sndbulkpipe(ueth->pusb_dev, ueth->ep_out),
+ (void *)msg,
+ length + sizeof(tx_cmd_a) +
+ sizeof(tx_cmd_b),
+ &actual_len, USB_BULK_SEND_TIMEOUT_MS);
+ debug("Tx: len = %u, actual = %u, err = %d\n",
+ (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)),
+ (unsigned int)actual_len, err);
+
+ return err;
+}
+
+int lan7x_eth_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ uint8_t *ptr;
+ int ret, len;
+ u32 packet_len = 0;
+ u32 rx_cmd_a = 0;
+
+ len = usb_ether_get_rx_bytes(ueth, &ptr);
+ debug("%s: first try, len=%d\n", __func__, len);
+ if (!len) {
+ if (!(flags & ETH_RECV_CHECK_DEVICE))
+ return -EAGAIN;
+ ret = usb_ether_receive(ueth, RX_URB_SIZE);
+ if (ret == -EAGAIN)
+ return ret;
+
+ len = usb_ether_get_rx_bytes(ueth, &ptr);
+ debug("%s: second try, len=%d\n", __func__, len);
+ }
+
+ /*
+ * 1st 4 bytes contain the length of the actual data plus error info.
+ * Extract data length.
+ */
+ if (len < sizeof(packet_len)) {
+ debug("Rx: incomplete packet length\n");
+ goto err;
+ }
+ memcpy(&rx_cmd_a, ptr, sizeof(rx_cmd_a));
+ le32_to_cpus(&rx_cmd_a);
+ if (rx_cmd_a & RX_CMD_A_RXE) {
+ debug("Rx: Error header=%#x", rx_cmd_a);
+ goto err;
+ }
+ packet_len = (u16) (rx_cmd_a & RX_CMD_A_LEN_MASK);
+
+ if (packet_len > len - sizeof(packet_len)) {
+ debug("Rx: too large packet: %d\n", packet_len);
+ goto err;
+ }
+
+ /*
+ * For LAN7x, the length in command A does not
+ * include command A, B, and C length.
+ * So use it as is.
+ */
+
+ *packetp = ptr + 10;
+ return packet_len;
+
+err:
+ usb_ether_advance_rxbuf(ueth, -1);
+ return -EINVAL;
+}
+
+int lan7x_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+
+ packet_len = ALIGN(packet_len, 4);
+ usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
+
+ return 0;
+}
+
+int lan7x_eth_remove(struct udevice *dev)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+
+ debug("** %s()\n", __func__);
+ free(priv->phydev);
+ mdio_unregister(priv->mdiobus);
+ mdio_free(priv->mdiobus);
+
+ return 0;
+}
--- /dev/null
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <console.h>
+#include <watchdog.h>
+
+/* USB Vendor Requests */
+#define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
+#define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
+#define USB_VENDOR_REQUEST_GET_STATS 0xA2
+
+/* Tx Command A */
+#define TX_CMD_A_FCS BIT(22)
+#define TX_CMD_A_LEN_MASK 0x000FFFFF
+
+/* Rx Command A */
+#define RX_CMD_A_RXE BIT(18)
+#define RX_CMD_A_LEN_MASK 0x00003FFF
+
+/* SCSRs */
+#define ID_REV 0x00
+#define ID_REV_CHIP_ID_MASK 0xFFFF0000
+#define ID_REV_CHIP_ID_7500 0x7500
+#define ID_REV_CHIP_ID_7800 0x7800
+#define ID_REV_CHIP_ID_7850 0x7850
+
+#define INT_STS 0x0C
+
+#define HW_CFG 0x010
+#define HW_CFG_LRST BIT(1)
+
+#define PMT_CTL 0x014
+#define PMT_CTL_PHY_PWRUP BIT(10)
+#define PMT_CTL_READY BIT(7)
+#define PMT_CTL_PHY_RST BIT(4)
+
+#define E2P_CMD 0x040
+#define E2P_CMD_EPC_BUSY BIT(31)
+#define E2P_CMD_EPC_CMD_READ 0x00000000
+#define E2P_CMD_EPC_TIMEOUT BIT(10)
+#define E2P_CMD_EPC_ADDR_MASK 0x000001FF
+
+#define E2P_DATA 0x044
+
+#define RFE_CTL_BCAST_EN BIT(10)
+#define RFE_CTL_DA_PERFECT BIT(1)
+
+#define FCT_RX_CTL_EN BIT(31)
+
+#define FCT_TX_CTL_EN BIT(31)
+
+#define MAC_CR 0x100
+#define MAC_CR_ADP BIT(13)
+#define MAC_CR_AUTO_DUPLEX BIT(12)
+#define MAC_CR_AUTO_SPEED BIT(11)
+
+#define MAC_RX 0x104
+#define MAC_RX_FCS_STRIP BIT(4)
+#define MAC_RX_RXEN BIT(0)
+
+#define MAC_TX 0x108
+#define MAC_TX_TXEN BIT(0)
+
+#define FLOW 0x10C
+#define FLOW_CR_TX_FCEN BIT(30)
+#define FLOW_CR_RX_FCEN BIT(29)
+
+#define RX_ADDRH 0x118
+#define RX_ADDRL 0x11C
+
+#define MII_ACC 0x120
+#define MII_ACC_MII_READ 0x00000000
+#define MII_ACC_MII_WRITE 0x00000002
+#define MII_ACC_MII_BUSY BIT(0)
+
+#define MII_DATA 0x124
+
+#define SS_USB_PKT_SIZE 1024
+#define HS_USB_PKT_SIZE 512
+#define FS_USB_PKT_SIZE 64
+
+#define MAX_RX_FIFO_SIZE (12 * 1024)
+#define MAX_TX_FIFO_SIZE (12 * 1024)
+#define DEFAULT_BULK_IN_DELAY 0x0800
+
+#define EEPROM_INDICATOR 0xA5
+#define EEPROM_MAC_OFFSET 0x01
+
+/* Some extra defines */
+#define LAN7X_INTERNAL_PHY_ID 1
+
+#define LAN7X_MAC_RX_MAX_SIZE(mtu) \
+ ((mtu) << 16) /* Max frame size */
+#define LAN7X_MAC_RX_MAX_SIZE_DEFAULT \
+ LAN7X_MAC_RX_MAX_SIZE(ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */)
+
+/* Timeouts */
+#define USB_CTRL_SET_TIMEOUT_MS 5000
+#define USB_CTRL_GET_TIMEOUT_MS 5000
+#define USB_BULK_SEND_TIMEOUT_MS 5000
+#define USB_BULK_RECV_TIMEOUT_MS 5000
+#define TIMEOUT_RESOLUTION_MS 50
+#define PHY_CONNECT_TIMEOUT_MS 5000
+
+#define RX_URB_SIZE 2048
+
+/* driver private */
+struct lan7x_private {
+ struct ueth_data ueth;
+ u32 chipid; /* Chip or device ID */
+ struct mii_dev *mdiobus;
+ struct phy_device *phydev;
+};
+
+/*
+ * Lan7x infrastructure commands
+ */
+
+int lan7x_write_reg(struct usb_device *udev, u32 index, u32 data);
+
+int lan7x_read_reg(struct usb_device *udev, u32 index, u32 *data);
+
+static inline int lan7x_wait_for_bit(struct usb_device *udev,
+ const char *prefix, const u32 reg,
+ const u32 mask, const bool set,
+ const unsigned int timeout_ms,
+ const bool breakable)
+{
+ u32 val;
+ unsigned long start = get_timer(0);
+
+ while (1) {
+ lan7x_read_reg(udev, reg, &val);
+
+ if (!set)
+ val = ~val;
+
+ if ((val & mask) == mask)
+ return 0;
+
+ if (get_timer(start) > timeout_ms)
+ break;
+
+ if (breakable && ctrlc()) {
+ puts("Abort\n");
+ return -EINTR;
+ }
+
+ udelay(1);
+ WATCHDOG_RESET();
+ }
+
+ debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg,
+ mask, set);
+
+ return -ETIMEDOUT;
+}
+
+int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx);
+
+void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx,
+ int regval);
+
+static inline int lan7x_mdio_wait_for_bit(struct usb_device *udev,
+ const char *prefix,
+ int phy_id, const u32 reg,
+ const u32 mask, const bool set,
+ const unsigned int timeout_ms,
+ const bool breakable)
+{
+ u32 val;
+ unsigned long start = get_timer(0);
+
+ while (1) {
+ val = lan7x_mdio_read(udev, phy_id, reg);
+
+ if (!set)
+ val = ~val;
+
+ if ((val & mask) == mask)
+ return 0;
+
+ if (get_timer(start) > timeout_ms)
+ break;
+
+ if (breakable && ctrlc()) {
+ puts("Abort\n");
+ return -EINTR;
+ }
+
+ udelay(1);
+ WATCHDOG_RESET();
+ }
+
+ debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg,
+ mask, set);
+
+ return -ETIMEDOUT;
+}
+
+int lan7x_phylib_register(struct udevice *udev);
+
+int lan7x_eth_phylib_connect(struct udevice *udev, struct ueth_data *dev);
+
+int lan7x_eth_phylib_config_start(struct udevice *udev);
+
+int lan7x_pmt_phy_reset(struct usb_device *udev,
+ struct ueth_data *dev);
+
+int lan7x_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev,
+ uint32_t *flow, uint32_t *fct_flow);
+
+int lan7x_read_eeprom_mac(unsigned char *enetaddr, struct usb_device *udev);
+
+int lan7x_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev);
+
+void lan7x_eth_stop(struct udevice *dev);
+
+int lan7x_eth_send(struct udevice *dev, void *packet, int length);
+
+int lan7x_eth_recv(struct udevice *dev, int flags, uchar **packetp);
+
+int lan7x_free_pkt(struct udevice *dev, uchar *packet, int packet_len);
+
+int lan7x_eth_remove(struct udevice *dev);
if ((ep != 0) && (udc_device->device_state < STATE_ADDRESSED))
return;
- tt = getenv("usbtty");
+ tt = env_get("usbtty");
if (!tt)
tt = "generic";
strlcpy(host_addr, CONFIG_USBNET_HOST_ADDR, sizeof(host_addr));
#endif
/* Check if the user overruled the MAC addresses */
- if (getenv("usbnet_devaddr"))
- strlcpy(dev_addr, getenv("usbnet_devaddr"),
+ if (env_get("usbnet_devaddr"))
+ strlcpy(dev_addr, env_get("usbnet_devaddr"),
sizeof(dev_addr));
- if (getenv("usbnet_hostaddr"))
- strlcpy(host_addr, getenv("usbnet_hostaddr"),
+ if (env_get("usbnet_hostaddr"))
+ strlcpy(host_addr, env_get("usbnet_hostaddr"),
sizeof(host_addr));
if (!is_eth_addr_valid(dev_addr)) {
gadget = dev->gadget;
usb_gadget_connect(gadget);
- if (getenv("cdc_connect_timeout"))
- timeout = simple_strtoul(getenv("cdc_connect_timeout"),
+ if (env_get("cdc_connect_timeout"))
+ timeout = simple_strtoul(env_get("cdc_connect_timeout"),
NULL, 10) * CONFIG_SYS_HZ;
ts = get_timer(0);
while (!dev->network_started) {
l_priv = priv;
get_ether_addr(CONFIG_USBNET_DEVADDR, pdata->enetaddr);
- eth_setenv_enetaddr("usbnet_devaddr", pdata->enetaddr);
+ eth_env_set_enetaddr("usbnet_devaddr", pdata->enetaddr);
return 0;
}
cdev->req->context = f_dfu;
- s = getenv("serial#");
+ s = env_get("serial#");
if (s)
g_dnl_set_serialnumber((char *)s);
f->hs_descriptors = fb_hs_function;
}
- s = getenv("serial#");
+ s = env_get("serial#");
if (s)
g_dnl_set_serialnumber((char *)s);
sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
strncat(response, str_num, chars_left);
} else if (!strcmp_l1("serialno", cmd)) {
- s = getenv("serial#");
+ s = env_get("serial#");
if (s)
strncat(response, s, chars_left);
else
}
sprintf(envstr, "fastboot.%s", cmd);
- s = getenv(envstr);
+ s = env_get(envstr);
if (s) {
strncat(response, s, chars_left);
} else {
"phy_type", &len);
#endif
else
- phy_type = getenv("usb_phy_type");
+ phy_type = env_get("usb_phy_type");
if (!phy_type) {
#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE;
/* get video mode via environment */
- if ((penv = getenv ("videomode")) != NULL) {
+ penv = env_get("videomode");
+ if (penv) {
/* deceide if it is a string */
if (penv[0] <= '9') {
videomode = (int) simple_strtoul (penv, NULL, 16);
splash_get_pos(&video_logo_xpos, &video_logo_ypos);
#ifdef CONFIG_SPLASH_SCREEN
- s = getenv("splashimage");
+ s = env_get("splashimage");
if (s != NULL) {
ret = splash_screen_prepare();
if (ret < 0)
tmp = 0;
videomode = 0x310;
/* get video mode via environment */
- if ((penv = getenv ("videomode")) != NULL) {
+ penv = env_get("videomode");
+ if (penv) {
/* decide if it is a string */
if (penv[0] <= '9') {
videomode = (int) simple_strtoul (penv, NULL, 16);
videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE;
/* get video mode via environment */
- penv = getenv("videomode");
+ penv = env_get("videomode");
if (penv) {
/* decide if it is a string */
if (penv[0] <= '9') {
puts("Video: ");
/* Suck display configuration from "videomode" variable */
- penv = getenv("videomode");
+ penv = env_get("videomode");
if (!penv) {
puts("MXSFB: 'videomode' variable not set!\n");
return NULL;
/* first search for the environment containing the real param string */
s = penv;
- if ((p = getenv (s)) != NULL)
+ p = env_get(s);
+ if (p)
s = p;
/*
int video_get_video_mode(unsigned int *xres, unsigned int *yres,
unsigned int *depth, unsigned int *freq, const char **options)
{
- char *p = getenv("video-mode");
+ char *p = env_get("video-mode");
if (!p)
return 0;
DECLARE_GLOBAL_DATA_PTR;
-int wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
{
const struct wdt_ops *ops = device_get_ops(dev);
if (!ops->start)
return -ENOSYS;
- return ops->start(dev, timeout, flags);
+ return ops->start(dev, timeout_ms, flags);
}
int wdt_stop(struct udevice *dev)
which is not enough to support device tree. Enable this option to
allow such boards to be supported by U-Boot SPL.
+config TPL_OF_CONTROL
+ bool "Enable run-time configuration via Device Tree in TPL"
+ depends on TPL && OF_CONTROL
+ help
+ Some boards use device tree in U-Boot but only have 4KB of SRAM
+ which is not enough to support device tree. Enable this option to
+ allow such boards to be supported by U-Boot TPL.
+
config OF_LIVE
bool "Enable use of a live tree"
depends on OF_CONTROL
declarations for each node. See README.platdata for more
information.
+config TPL_OF_PLATDATA
+ bool "Generate platform data for use in TPL"
+ depends on TPL_OF_CONTROL
+ help
+ For very constrained SPL environments the overhead of decoding
+ device tree nodes and converting their contents into platform data
+ is too large. This overhead includes libfdt code as well as the
+ device tree contents itself. The latter is fairly compact, but the
+ former can add 3KB or more to a Thumb 2 Image.
+
+ This option enables generation of platform data from the device
+ tree as C code. This code creates devices using U_BOOT_DEVICE()
+ declarations. The benefit is that it allows driver code to access
+ the platform data directly in C structures, avoidin the libfdt
+ overhead.
+
+ This option works by generating C structure declarations for each
+ compatible string, then adding platform data and U_BOOT_DEVICE
+ declarations for each node. See README.platdata for more
+ information.
+
endmenu
--- /dev/null
+menu "Environment"
+
+choice
+ prompt "Select the location of the environment"
+ default ENV_IS_IN_MMC if ARCH_SUNXI
+ default ENV_IS_IN_FAT if ARCH_BCM283X
+ default ENV_IS_IN_MMC if ARCH_UNIPHIER
+ default ENV_IS_IN_MMC if ARCH_EXYNOS4
+ default ENV_IS_IN_MMC if MX6SX || MX7D
+ default ENV_IS_IN_FLASH if ARCH_CINTEGRATOR
+ default ENV_IS_IN_SPI_FLASH if ARMADA_XP
+ default ENV_IS_IN_MMC if TEGRA30 || TEGRA124
+ default ENV_IS_IN_MMC if TEGRA_ARMV8_COMMON
+ default ENV_IS_IN_FLASH if ARCH_INTEGRATOR_CP
+ default ENV_IS_IN_FLASH if M548x || M547x || M5282 || MCF547x_8x
+ default ENV_IS_IN_FLASH if MCF532x || MCF52x2
+ default ENV_IS_IN_FLASH if MPC86xx || MPC83xx
+ default ENV_IS_IN_FLASH if ARCH_MPC8572 || ARCH_MPC8548 || ARCH_MPC8641
+ default ENV_IS_IN_FLASH if SH && !CPU_SH4
+ default ENV_IS_IN_SPI_FLASH if INTEL_BAYTRAIL
+ default ENV_IS_IN_SPI_FLASH if INTEL_BROADWELL
+ default ENV_IS_IN_SPI_FLASH if NORTHBRIDGE_INTEL_IVYBRIDGE
+ default ENV_IS_IN_SPI_FLASH if INTEL_QUARK
+ default ENV_IS_IN_SPI_FLASH if INTEL_QUEENSBAY
+ default ENV_IS_IN_FAT if MMC_OMAP_HS && TI_COMMON_CMD_OPTIONS
+ default ENV_IS_NOWHERE
+ help
+ At present the environment can be stored in only one place. Use this
+ option to select the location. This is either a device (where the
+ environemnt information is simply written to a fixed location or
+ partition on the device) or a filesystem (where the environment
+ information is written to a file).
+
+config ENV_IS_NOWHERE
+ bool "Environment is not stored"
+ help
+ Define this if you don't want to or can't have an environment stored
+ on a storage medium. In this case the environemnt will still exist
+ while U-Boot is running, but once U-Boot exits it will not be
+ stored. U-Boot will therefore always start up with a default
+ environment.
+
+config ENV_IS_IN_DATAFLASH
+ bool "Environment in dataflash"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a DataFlash memory device which you
+ want to use for the environment.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These three #defines specify the offset and size of the
+ environment area within the total memory of your DataFlash placed
+ at the specified address.
+
+config ENV_IS_IN_EEPROM
+ bool "Environment in EEPROM"
+ depends on !CHAIN_OF_TRUST
+ help
+ Use this if you have an EEPROM or similar serial access
+ device and a driver for it.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the
+ environment area within the total memory of your EEPROM.
+
+ - CONFIG_SYS_I2C_EEPROM_ADDR:
+ If defined, specified the chip address of the EEPROM device.
+ The default address is zero.
+
+ - CONFIG_SYS_I2C_EEPROM_BUS:
+ If defined, specified the i2c bus of the EEPROM device.
+
+ - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
+ If defined, the number of bits used to address bytes in a
+ single page in the EEPROM device. A 64 byte page, for example
+ would require six bits.
+
+ - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
+ If defined, the number of milliseconds to delay between
+ page writes. The default is zero milliseconds.
+
+ - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
+ The length in bytes of the EEPROM memory array address. Note
+ that this is NOT the chip address length!
+
+ - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
+ EEPROM chips that implement "address overflow" are ones
+ like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+ address and the extra bits end up in the "chip address" bit
+ slots. This makes a 24WC08 (1Kbyte) chip look like four 256
+ byte chips.
+
+ Note that we consider the length of the address field to
+ still be one byte because the extra address bits are hidden
+ in the chip address.
+
+ - CONFIG_SYS_EEPROM_SIZE:
+ The size in bytes of the EEPROM device.
+
+ - CONFIG_ENV_EEPROM_IS_ON_I2C
+ define this, if you have I2C and SPI activated, and your
+ EEPROM, which holds the environment, is on the I2C bus.
+
+ - CONFIG_I2C_ENV_EEPROM_BUS
+ if you have an Environment on an EEPROM reached over
+ I2C muxes, you can define here, how to reach this
+ EEPROM. For example:
+
+ #define CONFIG_I2C_ENV_EEPROM_BUS 1
+
+ EEPROM which holds the environment, is reached over
+ a pca9547 i2c mux with address 0x70, channel 3.
+
+config ENV_IS_IN_FAT
+ bool "Environment is in a FAT filesystem"
+ depends on !CHAIN_OF_TRUST
+ select FAT_WRITE
+ help
+ Define this if you want to use the FAT file system for the environment.
+
+ - CONFIG_FAT_WRITE:
+ This must be enabled. Otherwise it cannot save the environment file.
+
+config ENV_IS_IN_FLASH
+ bool "Environment in flash memory"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a flash device which you want to use for the
+ environment.
+
+ a) The environment occupies one whole flash sector, which is
+ "embedded" in the text segment with the U-Boot code. This
+ happens usually with "bottom boot sector" or "top boot
+ sector" type flash chips, which have several smaller
+ sectors at the start or the end. For instance, such a
+ layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
+ such a case you would place the environment in one of the
+ 4 kB sectors - with U-Boot code before and after it. With
+ "top boot sector" type flash chips, you would put the
+ environment in one of the last sectors, leaving a gap
+ between U-Boot and the environment.
+
+ CONFIG_ENV_OFFSET:
+
+ Offset of environment data (variable area) to the
+ beginning of flash memory; for instance, with bottom boot
+ type flash chips the second sector can be used: the offset
+ for this sector is given here.
+
+ CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
+
+ CONFIG_ENV_ADDR:
+
+ This is just another way to specify the start address of
+ the flash sector containing the environment (instead of
+ CONFIG_ENV_OFFSET).
+
+ CONFIG_ENV_SECT_SIZE:
+
+ Size of the sector containing the environment.
+
+
+ b) Sometimes flash chips have few, equal sized, BIG sectors.
+ In such a case you don't want to spend a whole sector for
+ the environment.
+
+ CONFIG_ENV_SIZE:
+
+ If you use this in combination with CONFIG_ENV_IS_IN_FLASH
+ and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
+ of this flash sector for the environment. This saves
+ memory for the RAM copy of the environment.
+
+ It may also save flash memory if you decide to use this
+ when your environment is "embedded" within U-Boot code,
+ since then the remainder of the flash sector could be used
+ for U-Boot code. It should be pointed out that this is
+ STRONGLY DISCOURAGED from a robustness point of view:
+ updating the environment in flash makes it always
+ necessary to erase the WHOLE sector. If something goes
+ wrong before the contents has been restored from a copy in
+ RAM, your target system will be dead.
+
+ CONFIG_ENV_ADDR_REDUND
+ CONFIG_ENV_SIZE_REDUND
+
+ These settings describe a second storage area used to hold
+ a redundant copy of the environment data, so that there is
+ a valid backup copy in case there is a power failure during
+ a "saveenv" operation.
+
+ BE CAREFUL! Any changes to the flash layout, and some changes to the
+ source code will make it necessary to adapt <board>/u-boot.lds*
+ accordingly!
+
+config ENV_IS_IN_MMC
+ bool "Environment in an MMC device"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have an MMC device which you want to use for the
+ environment.
+
+ CONFIG_SYS_MMC_ENV_DEV:
+
+ Specifies which MMC device the environment is stored in.
+
+ CONFIG_SYS_MMC_ENV_PART (optional):
+
+ Specifies which MMC partition the environment is stored in. If not
+ set, defaults to partition 0, the user area. Common values might be
+ 1 (first MMC boot partition), 2 (second MMC boot partition).
+
+ CONFIG_ENV_OFFSET:
+ CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the environment
+ area within the specified MMC device.
+
+ If offset is positive (the usual case), it is treated as relative to
+ the start of the MMC partition. If offset is negative, it is treated
+ as relative to the end of the MMC partition. This can be useful if
+ your board may be fitted with different MMC devices, which have
+ different sizes for the MMC partitions, and you always want the
+ environment placed at the very end of the partition, to leave the
+ maximum possible space before it, to store other data.
+
+ These two values are in units of bytes, but must be aligned to an
+ MMC sector boundary.
+
+ CONFIG_ENV_OFFSET_REDUND (optional):
+
+ Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
+ hold a redundant copy of the environment data. This provides a
+ valid backup copy in case the other copy is corrupted, e.g. due
+ to a power failure during a "saveenv" operation.
+
+ This value may also be positive or negative; this is handled in the
+ same way as CONFIG_ENV_OFFSET.
+
+ This value is also in units of bytes, but must also be aligned to
+ an MMC sector boundary.
+
+ CONFIG_ENV_SIZE_REDUND (optional):
+
+ This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
+ set. If this value is set, it must be set to the same value as
+ CONFIG_ENV_SIZE.
+
+config ENV_IS_IN_NAND
+ bool "Environment in a NAND device"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a NAND device which you want to use for the
+ environment.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the environment
+ area within the first NAND device. CONFIG_ENV_OFFSET must be
+ aligned to an erase block boundary.
+
+ - CONFIG_ENV_OFFSET_REDUND (optional):
+
+ This setting describes a second storage area of CONFIG_ENV_SIZE
+ size used to hold a redundant copy of the environment data, so
+ that there is a valid backup copy in case there is a power failure
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
+ aligned to an erase block boundary.
+
+ - CONFIG_ENV_RANGE (optional):
+
+ Specifies the length of the region in which the environment
+ can be written. This should be a multiple of the NAND device's
+ block size. Specifying a range with more erase blocks than
+ are needed to hold CONFIG_ENV_SIZE allows bad blocks within
+ the range to be avoided.
+
+ - CONFIG_ENV_OFFSET_OOB (optional):
+
+ Enables support for dynamically retrieving the offset of the
+ environment from block zero's out-of-band data. The
+ "nand env.oob" command can be used to record this offset.
+ Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
+ using CONFIG_ENV_OFFSET_OOB.
+
+config ENV_IS_IN_NVRAM
+ bool "Environment in a non-volatile RAM"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have some non-volatile memory device
+ (NVRAM, battery buffered SRAM) which you want to use for the
+ environment.
+
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines are used to determine the memory area you
+ want to use for environment. It is assumed that this memory
+ can just be read and written to, without any special
+ provision.
+
+config ENV_IS_IN_ONENAND
+ bool "Environment is in OneNAND"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you want to put your local device's environment in
+ OneNAND.
+
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines are used to determine the device range you
+ want to use for environment. It is assumed that this memory
+ can just be read and written to, without any special
+ provision.
+
+config ENV_IS_IN_REMOTE
+ bool "Environment is in remove memory space"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a remote memory space which you
+ want to use for the local device's environment.
+
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the address and size of the
+ environment area within the remote memory space. The
+ local device can get the environment from remote memory
+ space by SRIO or PCIE links.
+
+config ENV_IS_IN_SPI_FLASH
+ bool "Environment is in SPI flash"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a SPI Flash memory device which you
+ want to use for the environment.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the
+ environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
+ aligned to an erase sector boundary.
+
+ - CONFIG_ENV_SECT_SIZE:
+
+ Define the SPI flash's sector size.
+
+ - CONFIG_ENV_OFFSET_REDUND (optional):
+
+ This setting describes a second storage area of CONFIG_ENV_SIZE
+ size used to hold a redundant copy of the environment data, so
+ that there is a valid backup copy in case there is a power failure
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
+ aligned to an erase sector boundary.
+
+ - CONFIG_ENV_SPI_BUS (optional):
+ - CONFIG_ENV_SPI_CS (optional):
+
+ Define the SPI bus and chip select. If not defined they will be 0.
+
+ - CONFIG_ENV_SPI_MAX_HZ (optional):
+
+ Define the SPI max work clock. If not defined then use 1MHz.
+
+ - CONFIG_ENV_SPI_MODE (optional):
+
+ Define the SPI work mode. If not defined then use SPI_MODE_3.
+
+config ENV_IS_IN_UBI
+ bool "Environment in a UBI volume"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have an UBI volume that you want to use for the
+ environment. This has the benefit of wear-leveling the environment
+ accesses, which is important on NAND.
+
+ - CONFIG_ENV_UBI_PART:
+
+ Define this to a string that is the mtd partition containing the UBI.
+
+ - CONFIG_ENV_UBI_VOLUME:
+
+ Define this to the name of the volume that you want to store the
+ environment in.
+
+ - CONFIG_ENV_UBI_VOLUME_REDUND:
+
+ Define this to the name of another volume to store a second copy of
+ the environment in. This will enable redundant environments in UBI.
+ It is assumed that both volumes are in the same MTD partition.
+
+ - CONFIG_UBI_SILENCE_MSG
+ - CONFIG_UBIFS_SILENCE_MSG
+
+ You will probably want to define these to avoid a really noisy system
+ when storing the env in UBI.
+
+endchoice
+
+config ENV_FAT_INTERFACE
+ string "Name of the block device for the environment"
+ depends on ENV_IS_IN_FAT
+ default "mmc" if TI_COMMON_CMD_OPTIONS || ARCH_ZYNQMP || ARCH_AT91
+ help
+ Define this to a string that is the name of the block device.
+
+config ENV_FAT_DEVICE_AND_PART
+ string "Device and partition for where to store the environemt in FAT"
+ depends on ENV_IS_IN_FAT
+ default "0:1" if TI_COMMON_CMD_OPTIONS
+ default "0:auto" if ARCH_ZYNQMP
+ default "0" if ARCH_AT91
+ help
+ Define this to a string to specify the partition of the device. It can
+ be as following:
+
+ "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
+ - "D:P": device D partition P. Error occurs if device D has no
+ partition table.
+ - "D:0": device D.
+ - "D" or "D:": device D partition 1 if device D has partition
+ table, or the whole device D if has no partition
+ table.
+ - "D:auto": first partition in device D with bootable flag set.
+ If none, first valid partition in device D. If no
+ partition table then means device D.
+
+config ENV_FAT_FILE
+ string "Name of the FAT file to use for the environemnt"
+ depends on ENV_IS_IN_FAT
+ default "uboot.env"
+ help
+ It's a string of the FAT file name. This file use to store the
+ environment.
+
+if ARCH_SUNXI
+
+config ENV_OFFSET
+ hex "Environment Offset"
+ depends on !ENV_IS_IN_UBI
+ depends on !ENV_IS_NOWHERE
+ default 0x88000 if ARCH_SUNXI
+ help
+ Offset from the start of the device (or partition)
+
+config ENV_SIZE
+ hex "Environment Size"
+ depends on !ENV_IS_NOWHERE
+ default 0x20000 if ARCH_SUNXI
+ help
+ Size of the environment storage area
+
+config ENV_UBI_PART
+ string "UBI partition name"
+ depends on ENV_IS_IN_UBI
+ help
+ MTD partition containing the UBI device
+
+config ENV_UBI_VOLUME
+ string "UBI volume name"
+ depends on ENV_IS_IN_UBI
+ help
+ Name of the volume that you want to store the environment in.
+
+endif
+
+endmenu
--- /dev/null
+#
+# (C) Copyright 2004-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += common.o env.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += attr.o
+obj-y += callback.o
+obj-y += flags.o
+obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += dataflash.o
+obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
+extra-$(CONFIG_ENV_IS_EMBEDDED) += embedded.o
+obj-$(CONFIG_ENV_IS_IN_EEPROM) += embedded.o
+extra-$(CONFIG_ENV_IS_IN_FLASH) += embedded.o
+obj-$(CONFIG_ENV_IS_IN_NVRAM) += embedded.o
+obj-$(CONFIG_ENV_IS_IN_FLASH) += flash.o
+obj-$(CONFIG_ENV_IS_IN_MMC) += mmc.o
+obj-$(CONFIG_ENV_IS_IN_FAT) += fat.o
+obj-$(CONFIG_ENV_IS_IN_EXT4) += ext4.o
+obj-$(CONFIG_ENV_IS_IN_NAND) += nand.o
+obj-$(CONFIG_ENV_IS_IN_NVRAM) += nvram.o
+obj-$(CONFIG_ENV_IS_IN_ONENAND) += onenand.o
+obj-$(CONFIG_ENV_IS_IN_SATA) += sata.o
+obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += sf.o
+obj-$(CONFIG_ENV_IS_IN_REMOTE) += remote.o
+obj-$(CONFIG_ENV_IS_IN_UBI) += ubi.o
+obj-$(CONFIG_ENV_IS_NOWHERE) += nowhere.o
+endif
+
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_ENV_IS_IN_FLASH) += flash.o
+# environment
+ifdef CONFIG_TPL_BUILD
+obj-$(CONFIG_TPL_ENV_SUPPORT) += attr.o
+obj-$(CONFIG_TPL_ENV_SUPPORT) += flags.o
+obj-$(CONFIG_TPL_ENV_SUPPORT) += callback.o
+else
+obj-$(CONFIG_SPL_ENV_SUPPORT) += attr.o
+obj-$(CONFIG_SPL_ENV_SUPPORT) += flags.o
+obj-$(CONFIG_SPL_ENV_SUPPORT) += callback.o
+endif
+ifneq ($(CONFIG_TPL_ENV_SUPPORT)$(CONFIG_SPL_ENV_SUPPORT),)
+obj-$(CONFIG_ENV_IS_NOWHERE) += nowhere.o
+obj-$(CONFIG_ENV_IS_IN_MMC) += mmc.o
+obj-$(CONFIG_ENV_IS_IN_FAT) += fat.o
+obj-$(CONFIG_ENV_IS_IN_EXT4) += ext4.o
+obj-$(CONFIG_ENV_IS_IN_NAND) += nand.o
+obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += sf.o
+obj-$(CONFIG_ENV_IS_IN_FLASH) += flash.o
+endif
+endif
+
+CFLAGS_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools/envcrc 2>/dev/null)
--- /dev/null
+/*
+ * (C) Copyright 2012
+ * Joe Hershberger, National Instruments, joe.hershberger@ni.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */
+#include <stdint.h>
+#include <stdio.h>
+#include <linux/linux_string.h>
+#else
+#include <common.h>
+#include <slre.h>
+#endif
+
+#include <env_attr.h>
+#include <errno.h>
+#include <linux/string.h>
+#include <malloc.h>
+
+/*
+ * Iterate through the whole list calling the callback for each found element.
+ * "attr_list" takes the form:
+ * attributes = [^,:\s]*
+ * entry = name[:attributes]
+ * list = entry[,list]
+ */
+int env_attr_walk(const char *attr_list,
+ int (*callback)(const char *name, const char *attributes, void *priv),
+ void *priv)
+{
+ const char *entry, *entry_end;
+ char *name, *attributes;
+
+ if (!attr_list)
+ /* list not found */
+ return 1;
+
+ entry = attr_list;
+ do {
+ char *entry_cpy = NULL;
+
+ entry_end = strchr(entry, ENV_ATTR_LIST_DELIM);
+ /* check if this is the last entry in the list */
+ if (entry_end == NULL) {
+ int entry_len = strlen(entry);
+
+ if (entry_len) {
+ /*
+ * allocate memory to copy the entry into since
+ * we will need to inject '\0' chars and squash
+ * white-space before calling the callback
+ */
+ entry_cpy = malloc(entry_len + 1);
+ if (entry_cpy)
+ /* copy the rest of the list */
+ strcpy(entry_cpy, entry);
+ else
+ return -ENOMEM;
+ }
+ } else {
+ int entry_len = entry_end - entry;
+
+ if (entry_len) {
+ /*
+ * allocate memory to copy the entry into since
+ * we will need to inject '\0' chars and squash
+ * white-space before calling the callback
+ */
+ entry_cpy = malloc(entry_len + 1);
+ if (entry_cpy) {
+ /* copy just this entry and null term */
+ strncpy(entry_cpy, entry, entry_len);
+ entry_cpy[entry_len] = '\0';
+ } else
+ return -ENOMEM;
+ }
+ }
+
+ /* check if there is anything to process (e.g. not ",,,") */
+ if (entry_cpy != NULL) {
+ attributes = strchr(entry_cpy, ENV_ATTR_SEP);
+ /* check if there is a ':' */
+ if (attributes != NULL) {
+ /* replace the ':' with '\0' to term name */
+ *attributes++ = '\0';
+ /* remove white-space from attributes */
+ attributes = strim(attributes);
+ }
+ /* remove white-space from name */
+ name = strim(entry_cpy);
+
+ /* only call the callback if there is a name */
+ if (strlen(name) != 0) {
+ int retval = 0;
+
+ retval = callback(name, attributes, priv);
+ if (retval) {
+ free(entry_cpy);
+ return retval;
+ }
+ }
+ }
+
+ free(entry_cpy);
+ entry = entry_end + 1;
+ } while (entry_end != NULL);
+
+ return 0;
+}
+
+#if defined(CONFIG_REGEX)
+struct regex_callback_priv {
+ const char *searched_for;
+ char *regex;
+ char *attributes;
+};
+
+static int regex_callback(const char *name, const char *attributes, void *priv)
+{
+ int retval = 0;
+ struct regex_callback_priv *cbp = (struct regex_callback_priv *)priv;
+ struct slre slre;
+ char regex[strlen(name) + 3];
+
+ /* Require the whole string to be described by the regex */
+ sprintf(regex, "^%s$", name);
+ if (slre_compile(&slre, regex)) {
+ struct cap caps[slre.num_caps + 2];
+
+ if (slre_match(&slre, cbp->searched_for,
+ strlen(cbp->searched_for), caps)) {
+ free(cbp->regex);
+ if (!attributes) {
+ retval = -EINVAL;
+ goto done;
+ }
+ cbp->regex = malloc(strlen(regex) + 1);
+ if (cbp->regex) {
+ strcpy(cbp->regex, regex);
+ } else {
+ retval = -ENOMEM;
+ goto done;
+ }
+
+ free(cbp->attributes);
+ cbp->attributes = malloc(strlen(attributes) + 1);
+ if (cbp->attributes) {
+ strcpy(cbp->attributes, attributes);
+ } else {
+ retval = -ENOMEM;
+ free(cbp->regex);
+ cbp->regex = NULL;
+ goto done;
+ }
+ }
+ } else {
+ printf("Error compiling regex: %s\n", slre.err_str);
+ retval = -EINVAL;
+ }
+done:
+ return retval;
+}
+
+/*
+ * Retrieve the attributes string associated with a single name in the list
+ * There is no protection on attributes being too small for the value
+ */
+int env_attr_lookup(const char *attr_list, const char *name, char *attributes)
+{
+ if (!attributes)
+ /* bad parameter */
+ return -EINVAL;
+ if (!attr_list)
+ /* list not found */
+ return -EINVAL;
+
+ struct regex_callback_priv priv;
+ int retval;
+
+ priv.searched_for = name;
+ priv.regex = NULL;
+ priv.attributes = NULL;
+ retval = env_attr_walk(attr_list, regex_callback, &priv);
+ if (retval)
+ return retval; /* error */
+
+ if (priv.regex) {
+ strcpy(attributes, priv.attributes);
+ free(priv.attributes);
+ free(priv.regex);
+ /* success */
+ return 0;
+ }
+ return -ENOENT; /* not found in list */
+}
+#else
+
+/*
+ * Search for the last exactly matching name in an attribute list
+ */
+static int reverse_name_search(const char *searched, const char *search_for,
+ const char **result)
+{
+ int result_size = 0;
+ const char *cur_searched = searched;
+
+ if (result)
+ *result = NULL;
+
+ if (*search_for == '\0') {
+ if (result)
+ *result = searched;
+ return strlen(searched);
+ }
+
+ for (;;) {
+ const char *match = strstr(cur_searched, search_for);
+ const char *prevch;
+ const char *nextch;
+
+ /* Stop looking if no new match is found */
+ if (match == NULL)
+ break;
+
+ prevch = match - 1;
+ nextch = match + strlen(search_for);
+
+ /* Skip spaces */
+ while (*prevch == ' ' && prevch >= searched)
+ prevch--;
+ while (*nextch == ' ')
+ nextch++;
+
+ /* Start looking past the current match so last is found */
+ cur_searched = match + 1;
+ /* Check for an exact match */
+ if (match != searched &&
+ *prevch != ENV_ATTR_LIST_DELIM &&
+ prevch != searched - 1)
+ continue;
+ if (*nextch != ENV_ATTR_SEP &&
+ *nextch != ENV_ATTR_LIST_DELIM &&
+ *nextch != '\0')
+ continue;
+
+ if (result)
+ *result = match;
+ result_size = strlen(search_for);
+ }
+
+ return result_size;
+}
+
+/*
+ * Retrieve the attributes string associated with a single name in the list
+ * There is no protection on attributes being too small for the value
+ */
+int env_attr_lookup(const char *attr_list, const char *name, char *attributes)
+{
+ const char *entry = NULL;
+ int entry_len;
+
+ if (!attributes)
+ /* bad parameter */
+ return -EINVAL;
+ if (!attr_list)
+ /* list not found */
+ return -EINVAL;
+
+ entry_len = reverse_name_search(attr_list, name, &entry);
+ if (entry != NULL) {
+ int len;
+
+ /* skip the name */
+ entry += entry_len;
+ /* skip spaces */
+ while (*entry == ' ')
+ entry++;
+ if (*entry != ENV_ATTR_SEP)
+ len = 0;
+ else {
+ const char *delim;
+ static const char delims[] = {
+ ENV_ATTR_LIST_DELIM, ' ', '\0'};
+
+ /* skip the attr sep */
+ entry += 1;
+ /* skip spaces */
+ while (*entry == ' ')
+ entry++;
+
+ delim = strpbrk(entry, delims);
+ if (delim == NULL)
+ len = strlen(entry);
+ else
+ len = delim - entry;
+ memcpy(attributes, entry, len);
+ }
+ attributes[len] = '\0';
+
+ /* success */
+ return 0;
+ }
+
+ /* not found in list */
+ return -ENOENT;
+}
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2012
+ * Joe Hershberger, National Instruments, joe.hershberger@ni.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <environment.h>
+
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
+/*
+ * Look up a callback function pointer by name
+ */
+static struct env_clbk_tbl *find_env_callback(const char *name)
+{
+ struct env_clbk_tbl *clbkp;
+ int i;
+ int num_callbacks = ll_entry_count(struct env_clbk_tbl, env_clbk);
+
+ if (name == NULL)
+ return NULL;
+
+ /* look up the callback in the linker-list */
+ for (i = 0, clbkp = ll_entry_start(struct env_clbk_tbl, env_clbk);
+ i < num_callbacks;
+ i++, clbkp++) {
+ if (strcmp(name, clbkp->name) == 0)
+ return clbkp;
+ }
+
+ return NULL;
+}
+
+static int first_call = 1;
+static const char *callback_list;
+
+/*
+ * Look for a possible callback for a newly added variable
+ * This is called specifically when the variable did not exist in the hash
+ * previously, so the blanket update did not find this variable.
+ */
+void env_callback_init(ENTRY *var_entry)
+{
+ const char *var_name = var_entry->key;
+ char callback_name[256] = "";
+ struct env_clbk_tbl *clbkp;
+ int ret = 1;
+
+ if (first_call) {
+ callback_list = env_get(ENV_CALLBACK_VAR);
+ first_call = 0;
+ }
+
+ /* look in the ".callbacks" var for a reference to this variable */
+ if (callback_list != NULL)
+ ret = env_attr_lookup(callback_list, var_name, callback_name);
+
+ /* only if not found there, look in the static list */
+ if (ret)
+ ret = env_attr_lookup(ENV_CALLBACK_LIST_STATIC, var_name,
+ callback_name);
+
+ /* if an association was found, set the callback pointer */
+ if (!ret && strlen(callback_name)) {
+ clbkp = find_env_callback(callback_name);
+ if (clbkp != NULL)
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
+ var_entry->callback = clbkp->callback + gd->reloc_off;
+#else
+ var_entry->callback = clbkp->callback;
+#endif
+ }
+}
+
+/*
+ * Called on each existing env var prior to the blanket update since removing
+ * a callback association should remove its callback.
+ */
+static int clear_callback(ENTRY *entry)
+{
+ entry->callback = NULL;
+
+ return 0;
+}
+
+/*
+ * Call for each element in the list that associates variables to callbacks
+ */
+static int set_callback(const char *name, const char *value, void *priv)
+{
+ ENTRY e, *ep;
+ struct env_clbk_tbl *clbkp;
+
+ e.key = name;
+ e.data = NULL;
+ e.callback = NULL;
+ hsearch_r(e, FIND, &ep, &env_htab, 0);
+
+ /* does the env variable actually exist? */
+ if (ep != NULL) {
+ /* the assocaition delares no callback, so remove the pointer */
+ if (value == NULL || strlen(value) == 0)
+ ep->callback = NULL;
+ else {
+ /* assign the requested callback */
+ clbkp = find_env_callback(value);
+ if (clbkp != NULL)
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
+ ep->callback = clbkp->callback + gd->reloc_off;
+#else
+ ep->callback = clbkp->callback;
+#endif
+ }
+ }
+
+ return 0;
+}
+
+static int on_callbacks(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ /* remove all callbacks */
+ hwalk_r(&env_htab, clear_callback);
+
+ /* configure any static callback bindings */
+ env_attr_walk(ENV_CALLBACK_LIST_STATIC, set_callback, NULL);
+ /* configure any dynamic callback bindings */
+ env_attr_walk(value, set_callback, NULL);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(callbacks, on_callbacks);
--- /dev/null
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <search.h>
+#include <errno.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/************************************************************************
+ * Default settings to be used when no valid environment is found
+ */
+#include <env_default.h>
+
+struct hsearch_data env_htab = {
+ .change_ok = env_flags_validate,
+};
+
+/*
+ * Read an environment variable as a boolean
+ * Return -1 if variable does not exist (default to true)
+ */
+int env_get_yesno(const char *var)
+{
+ char *s = env_get(var);
+
+ if (s == NULL)
+ return -1;
+ return (*s == '1' || *s == 'y' || *s == 'Y' || *s == 't' || *s == 'T') ?
+ 1 : 0;
+}
+
+/*
+ * Look up the variable from the default environment
+ */
+char *env_get_default(const char *name)
+{
+ char *ret_val;
+ unsigned long really_valid = gd->env_valid;
+ unsigned long real_gd_flags = gd->flags;
+
+ /* Pretend that the image is bad. */
+ gd->flags &= ~GD_FLG_ENV_READY;
+ gd->env_valid = 0;
+ ret_val = env_get(name);
+ gd->env_valid = really_valid;
+ gd->flags = real_gd_flags;
+ return ret_val;
+}
+
+void set_default_env(const char *s)
+{
+ int flags = 0;
+
+ if (sizeof(default_environment) > ENV_SIZE) {
+ puts("*** Error - default environment is too large\n\n");
+ return;
+ }
+
+ if (s) {
+ if (*s == '!') {
+ printf("*** Warning - %s, "
+ "using default environment\n\n",
+ s + 1);
+ } else {
+ flags = H_INTERACTIVE;
+ puts(s);
+ }
+ } else {
+ puts("Using default environment\n\n");
+ }
+
+ if (himport_r(&env_htab, (char *)default_environment,
+ sizeof(default_environment), '\0', flags, 0,
+ 0, NULL) == 0)
+ error("Environment import failed: errno = %d\n", errno);
+
+ gd->flags |= GD_FLG_ENV_READY;
+ gd->flags |= GD_FLG_ENV_DEFAULT;
+}
+
+
+/* [re]set individual variables to their value in the default environment */
+int set_default_vars(int nvars, char * const vars[])
+{
+ /*
+ * Special use-case: import from default environment
+ * (and use \0 as a separator)
+ */
+ return himport_r(&env_htab, (const char *)default_environment,
+ sizeof(default_environment), '\0',
+ H_NOCLEAR | H_INTERACTIVE, 0, nvars, vars);
+}
+
+#ifdef CONFIG_ENV_AES
+#include <uboot_aes.h>
+/**
+ * env_aes_cbc_get_key() - Get AES-128-CBC key for the environment
+ *
+ * This function shall return 16-byte array containing AES-128 key used
+ * to encrypt and decrypt the environment. This function must be overridden
+ * by the implementer as otherwise the environment encryption will not
+ * work.
+ */
+__weak uint8_t *env_aes_cbc_get_key(void)
+{
+ return NULL;
+}
+
+static int env_aes_cbc_crypt(env_t *env, const int enc)
+{
+ unsigned char *data = env->data;
+ uint8_t *key;
+ uint8_t key_exp[AES_EXPAND_KEY_LENGTH];
+ uint32_t aes_blocks;
+
+ key = env_aes_cbc_get_key();
+ if (!key)
+ return -EINVAL;
+
+ /* First we expand the key. */
+ aes_expand_key(key, key_exp);
+
+ /* Calculate the number of AES blocks to encrypt. */
+ aes_blocks = ENV_SIZE / AES_KEY_LENGTH;
+
+ if (enc)
+ aes_cbc_encrypt_blocks(key_exp, data, data, aes_blocks);
+ else
+ aes_cbc_decrypt_blocks(key_exp, data, data, aes_blocks);
+
+ return 0;
+}
+#else
+static inline int env_aes_cbc_crypt(env_t *env, const int enc)
+{
+ return 0;
+}
+#endif
+
+/*
+ * Check if CRC is valid and (if yes) import the environment.
+ * Note that "buf" may or may not be aligned.
+ */
+int env_import(const char *buf, int check)
+{
+ env_t *ep = (env_t *)buf;
+ int ret;
+
+ if (check) {
+ uint32_t crc;
+
+ memcpy(&crc, &ep->crc, sizeof(crc));
+
+ if (crc32(0, ep->data, ENV_SIZE) != crc) {
+ set_default_env("!bad CRC");
+ return 0;
+ }
+ }
+
+ /* Decrypt the env if desired. */
+ ret = env_aes_cbc_crypt(ep, 0);
+ if (ret) {
+ error("Failed to decrypt env!\n");
+ set_default_env("!import failed");
+ return ret;
+ }
+
+ if (himport_r(&env_htab, (char *)ep->data, ENV_SIZE, '\0', 0, 0,
+ 0, NULL)) {
+ gd->flags |= GD_FLG_ENV_READY;
+ return 1;
+ }
+
+ error("Cannot import environment: errno = %d\n", errno);
+
+ set_default_env("!import failed");
+
+ return 0;
+}
+
+#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
+static unsigned char env_flags;
+
+int env_import_redund(const char *buf1, const char *buf2)
+{
+ int crc1_ok, crc2_ok;
+ env_t *ep, *tmp_env1, *tmp_env2;
+
+ tmp_env1 = (env_t *)buf1;
+ tmp_env2 = (env_t *)buf2;
+
+ crc1_ok = crc32(0, tmp_env1->data, ENV_SIZE) ==
+ tmp_env1->crc;
+ crc2_ok = crc32(0, tmp_env2->data, ENV_SIZE) ==
+ tmp_env2->crc;
+
+ if (!crc1_ok && !crc2_ok) {
+ set_default_env("!bad CRC");
+ return 0;
+ } else if (crc1_ok && !crc2_ok) {
+ gd->env_valid = 1;
+ } else if (!crc1_ok && crc2_ok) {
+ gd->env_valid = 2;
+ } else {
+ /* both ok - check serial */
+ if (tmp_env1->flags == 255 && tmp_env2->flags == 0)
+ gd->env_valid = 2;
+ else if (tmp_env2->flags == 255 && tmp_env1->flags == 0)
+ gd->env_valid = 1;
+ else if (tmp_env1->flags > tmp_env2->flags)
+ gd->env_valid = 1;
+ else if (tmp_env2->flags > tmp_env1->flags)
+ gd->env_valid = 2;
+ else /* flags are equal - almost impossible */
+ gd->env_valid = 1;
+ }
+
+ if (gd->env_valid == 1)
+ ep = tmp_env1;
+ else
+ ep = tmp_env2;
+
+ env_flags = ep->flags;
+ return env_import((char *)ep, 0);
+}
+#endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
+
+/* Export the environment and generate CRC for it. */
+int env_export(env_t *env_out)
+{
+ char *res;
+ ssize_t len;
+ int ret;
+
+ res = (char *)env_out->data;
+ len = hexport_r(&env_htab, '\0', 0, &res, ENV_SIZE, 0, NULL);
+ if (len < 0) {
+ error("Cannot export environment: errno = %d\n", errno);
+ return 1;
+ }
+
+ /* Encrypt the env if desired. */
+ ret = env_aes_cbc_crypt(env_out, 1);
+ if (ret)
+ return ret;
+
+ env_out->crc = crc32(0, env_out->data, ENV_SIZE);
+
+#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
+ env_out->flags = ++env_flags; /* increase the serial */
+#endif
+
+ return 0;
+}
+
+void env_relocate(void)
+{
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
+ env_reloc();
+ env_htab.change_ok += gd->reloc_off;
+#endif
+ if (gd->env_valid == 0) {
+#if defined(CONFIG_ENV_IS_NOWHERE) || defined(CONFIG_SPL_BUILD)
+ /* Environment not changable */
+ set_default_env(NULL);
+#else
+ bootstage_error(BOOTSTAGE_ID_NET_CHECKSUM);
+ set_default_env("!bad CRC");
+#endif
+ } else {
+ env_load();
+ }
+}
+
+#if defined(CONFIG_AUTO_COMPLETE) && !defined(CONFIG_SPL_BUILD)
+int env_complete(char *var, int maxv, char *cmdv[], int bufsz, char *buf)
+{
+ ENTRY *match;
+ int found, idx;
+
+ idx = 0;
+ found = 0;
+ cmdv[0] = NULL;
+
+ while ((idx = hmatch_r(var, idx, &match, &env_htab))) {
+ int vallen = strlen(match->key) + 1;
+
+ if (found >= maxv - 2 || bufsz < vallen)
+ break;
+
+ cmdv[found++] = buf;
+ memcpy(buf, match->key, vallen);
+ buf += vallen;
+ bufsz -= vallen;
+ }
+
+ qsort(cmdv, found, sizeof(cmdv[0]), strcmp_compar);
+
+ if (idx)
+ cmdv[found++] = "...";
+
+ cmdv[found] = NULL;
+ return found;
+}
+#endif
--- /dev/null
+/*
+ * LowLevel function for DataFlash environment support
+ * Author : Gilles Gastaldi (Atmel)
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <dataflash.h>
+#include <search.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int env_dataflash_get_char(int index)
+{
+ uchar c;
+
+ read_dataflash(CONFIG_ENV_ADDR + index + offsetof(env_t, data),
+ 1, (char *)&c);
+ return c;
+}
+
+static int env_dataflash_load(void)
+{
+ ulong crc, new = 0;
+ unsigned off;
+ char buf[CONFIG_ENV_SIZE];
+
+ /* Read old CRC */
+ read_dataflash(CONFIG_ENV_ADDR + offsetof(env_t, crc),
+ sizeof(ulong), (char *)&crc);
+
+ /* Read whole environment */
+ read_dataflash(CONFIG_ENV_ADDR, CONFIG_ENV_SIZE, buf);
+
+ /* Calculate the CRC */
+ off = offsetof(env_t, data);
+ new = crc32(new, (unsigned char *)(buf + off), ENV_SIZE);
+
+ if (crc == new)
+ env_import(buf, 1);
+ else
+ set_default_env("!bad CRC");
+
+ return 0;
+}
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+#error No support for redundant environment on dataflash yet!
+#endif
+
+static int env_dataflash_save(void)
+{
+ env_t env_new;
+ int ret;
+
+ ret = env_export(&env_new);
+ if (ret)
+ return ret;
+
+ return write_dataflash(CONFIG_ENV_ADDR,
+ (unsigned long)&env_new,
+ CONFIG_ENV_SIZE);
+}
+
+U_BOOT_ENV_LOCATION(dataflash) = {
+ .location = ENVL_DATAFLASH,
+ ENV_NAME("dataflash")
+ .get_char = env_dataflash_get_char,
+ .load = env_dataflash_load,
+ .save = env_save_ptr(env_dataflash_save),
+};
--- /dev/null
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
+#include <i2c.h>
+#endif
+#include <search.h>
+#include <errno.h>
+#include <linux/compiler.h> /* for BUG_ON */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int eeprom_bus_read(unsigned dev_addr, unsigned offset,
+ uchar *buffer, unsigned cnt)
+{
+ int rcode;
+#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
+ int old_bus = i2c_get_bus_num();
+
+ if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS)
+ i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS);
+#endif
+
+ rcode = eeprom_read(dev_addr, offset, buffer, cnt);
+
+#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
+ i2c_set_bus_num(old_bus);
+#endif
+
+ return rcode;
+}
+
+static int eeprom_bus_write(unsigned dev_addr, unsigned offset,
+ uchar *buffer, unsigned cnt)
+{
+ int rcode;
+#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
+ int old_bus = i2c_get_bus_num();
+
+ if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS)
+ i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS);
+#endif
+
+ rcode = eeprom_write(dev_addr, offset, buffer, cnt);
+
+#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
+ i2c_set_bus_num(old_bus);
+#endif
+
+ return rcode;
+}
+
+static int env_eeprom_get_char(int index)
+{
+ uchar c;
+ unsigned int off = CONFIG_ENV_OFFSET;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ if (gd->env_valid == ENV_REDUND)
+ off = CONFIG_ENV_OFFSET_REDUND;
+#endif
+ eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ off + index + offsetof(env_t, data), &c, 1);
+
+ return c;
+}
+
+static int env_eeprom_load(void)
+{
+ char buf_env[CONFIG_ENV_SIZE];
+ unsigned int off = CONFIG_ENV_OFFSET;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ ulong len, crc[2], crc_tmp;
+ unsigned int off_env[2];
+ uchar rdbuf[64], flags[2];
+ int i, crc_ok[2] = {0, 0};
+
+ eeprom_init(-1); /* prepare for EEPROM read/write */
+
+ off_env[0] = CONFIG_ENV_OFFSET;
+ off_env[1] = CONFIG_ENV_OFFSET_REDUND;
+
+ for (i = 0; i < 2; i++) {
+ /* read CRC */
+ eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ off_env[i] + offsetof(env_t, crc),
+ (uchar *)&crc[i], sizeof(ulong));
+ /* read FLAGS */
+ eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ off_env[i] + offsetof(env_t, flags),
+ (uchar *)&flags[i], sizeof(uchar));
+
+ crc_tmp = 0;
+ len = ENV_SIZE;
+ off = off_env[i] + offsetof(env_t, data);
+ while (len > 0) {
+ int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
+
+ eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR, off,
+ rdbuf, n);
+
+ crc_tmp = crc32(crc_tmp, rdbuf, n);
+ len -= n;
+ off += n;
+ }
+
+ if (crc_tmp == crc[i])
+ crc_ok[i] = 1;
+ }
+
+ if (!crc_ok[0] && !crc_ok[1]) {
+ gd->env_addr = 0;
+ gd->env_valid = 0;
+ } else if (crc_ok[0] && !crc_ok[1]) {
+ gd->env_valid = ENV_VALID;
+ } else if (!crc_ok[0] && crc_ok[1]) {
+ gd->env_valid = ENV_REDUND;
+ } else {
+ /* both ok - check serial */
+ if (flags[0] == ACTIVE_FLAG && flags[1] == OBSOLETE_FLAG)
+ gd->env_valid = ENV_VALID;
+ else if (flags[0] == OBSOLETE_FLAG && flags[1] == ACTIVE_FLAG)
+ gd->env_valid = ENV_REDUND;
+ else if (flags[0] == 0xFF && flags[1] == 0)
+ gd->env_valid = ENV_REDUND;
+ else if (flags[1] == 0xFF && flags[0] == 0)
+ gd->env_valid = ENV_VALID;
+ else /* flags are equal - almost impossible */
+ gd->env_valid = ENV_VALID;
+ }
+
+#else /* CONFIG_ENV_OFFSET_REDUND */
+ ulong crc, len, new;
+ uchar rdbuf[64];
+
+ eeprom_init(-1); /* prepare for EEPROM read/write */
+
+ /* read old CRC */
+ eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ CONFIG_ENV_OFFSET + offsetof(env_t, crc),
+ (uchar *)&crc, sizeof(ulong));
+
+ new = 0;
+ len = ENV_SIZE;
+ off = offsetof(env_t, data);
+ while (len > 0) {
+ int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len;
+
+ eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ CONFIG_ENV_OFFSET + off, rdbuf, n);
+ new = crc32(new, rdbuf, n);
+ len -= n;
+ off += n;
+ }
+
+ if (crc == new) {
+ gd->env_valid = ENV_VALID;
+ } else {
+ gd->env_valid = 0;
+ }
+#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+ off = CONFIG_ENV_OFFSET;
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ if (gd->env_valid == ENV_REDUND)
+ off = CONFIG_ENV_OFFSET_REDUND;
+#endif
+
+ eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
+ off, (uchar *)buf_env, CONFIG_ENV_SIZE);
+
+ env_import(buf_env, 1);
+
+ return 0;
+}
+
+static int env_eeprom_save(void)
+{
+ env_t env_new;
+ int rc;
+ unsigned int off = CONFIG_ENV_OFFSET;
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ unsigned int off_red = CONFIG_ENV_OFFSET_REDUND;
+ char flag_obsolete = OBSOLETE_FLAG;
+#endif
+
+ rc = env_export(&env_new);
+ if (rc)
+ return rc;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ if (gd->env_valid == ENV_VALID) {
+ off = CONFIG_ENV_OFFSET_REDUND;
+ off_red = CONFIG_ENV_OFFSET;
+ }
+
+ env_new.flags = ACTIVE_FLAG;
+#endif
+
+ rc = eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
+ off, (uchar *)&env_new, CONFIG_ENV_SIZE);
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ if (rc == 0) {
+ eeprom_bus_write(CONFIG_SYS_DEF_EEPROM_ADDR,
+ off_red + offsetof(env_t, flags),
+ (uchar *)&flag_obsolete, 1);
+
+ if (gd->env_valid == ENV_VALID)
+ gd->env_valid = ENV_REDUND;
+ else
+ gd->env_valid = ENV_VALID;
+ }
+#endif
+ return rc;
+}
+
+U_BOOT_ENV_LOCATION(eeprom) = {
+ .location = ENVL_EEPROM,
+ ENV_NAME("EEPROM")
+ .get_char = env_eeprom_get_char,
+ .load = env_eeprom_load,
+ .save = env_save_ptr(env_eeprom_save),
+};
--- /dev/null
+/*
+ * (C) Copyright 2001
+ * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/kconfig.h>
+
+#ifndef __ASSEMBLY__
+#define __ASSEMBLY__ /* Dirty trick to get only #defines */
+#endif
+#define __ASM_STUB_PROCESSOR_H__ /* don't include asm/processor. */
+#include <config.h>
+#undef __ASSEMBLY__
+#include <environment.h>
+#include <linux/stringify.h>
+
+/* Handle HOSTS that have prepended crap on symbol names, not TARGETS. */
+#if defined(__APPLE__)
+/* Leading underscore on symbols */
+# define SYM_CHAR "_"
+#else /* No leading character on symbols */
+# define SYM_CHAR
+#endif
+
+/*
+ * Generate embedded environment table
+ * inside U-Boot image, if needed.
+ */
+#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_BUILD_ENVCRC)
+/*
+ * Put the environment in the .text section when we are building
+ * U-Boot proper. The host based program "tools/envcrc" does not need
+ * a seperate section.
+ */
+#if defined(USE_HOSTCC) /* Native for 'tools/envcrc' */
+# define __UBOOT_ENV_SECTION__ /*XXX DO_NOT_DEL_THIS_COMMENT*/
+
+#else /* Environment is embedded in U-Boot's .text section */
+/* XXX - This only works with GNU C */
+# define __UBOOT_ENV_SECTION__ __attribute__ ((section(".text")))
+#endif
+
+/*
+ * Macros to generate global absolutes.
+ */
+#if defined(__bfin__)
+# define GEN_SET_VALUE(name, value) \
+ asm(".set " GEN_SYMNAME(name) ", " GEN_VALUE(value))
+#else
+# define GEN_SET_VALUE(name, value) \
+ asm(GEN_SYMNAME(name) " = " GEN_VALUE(value))
+#endif
+#define GEN_SYMNAME(str) SYM_CHAR #str
+#define GEN_VALUE(str) #str
+#define GEN_ABS(name, value) \
+ asm(".globl " GEN_SYMNAME(name)); \
+ GEN_SET_VALUE(name, value)
+
+/*
+ * Check to see if we are building with a
+ * computed CRC. Otherwise define it as ~0.
+ */
+#if !defined(ENV_CRC)
+# define ENV_CRC (~0)
+#endif
+
+#define DEFAULT_ENV_INSTANCE_EMBEDDED
+#include <env_default.h>
+
+#ifdef CONFIG_ENV_ADDR_REDUND
+env_t redundand_environment __UBOOT_ENV_SECTION__ = {
+ 0, /* CRC Sum: invalid */
+ 0, /* Flags: invalid */
+ {
+ "\0"
+ }
+};
+#endif /* CONFIG_ENV_ADDR_REDUND */
+
+/*
+ * These will end up in the .text section
+ * if the environment strings are embedded
+ * in the image. When this is used for
+ * tools/envcrc, they are placed in the
+ * .data/.sdata section.
+ *
+ */
+unsigned long env_size __UBOOT_ENV_SECTION__ = sizeof(env_t);
+
+/*
+ * Add in absolutes.
+ */
+GEN_ABS(env_offset, CONFIG_ENV_OFFSET);
+
+#endif /* ENV_IS_EMBEDDED */
--- /dev/null
+/*
+ * Copyright (C) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <environment.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct env_driver *env_driver_lookup(enum env_location loc)
+{
+ struct env_driver *drv;
+ const int n_ents = ll_entry_count(struct env_driver, env_driver);
+ struct env_driver *entry;
+
+ drv = ll_entry_start(struct env_driver, env_driver);
+ for (entry = drv; entry != drv + n_ents; entry++) {
+ if (loc == entry->location)
+ return entry;
+ }
+
+ /* Not found */
+ return NULL;
+}
+
+static enum env_location env_get_default_location(void)
+{
+ if IS_ENABLED(CONFIG_ENV_IS_IN_DATAFLASH)
+ return ENVL_DATAFLASH;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM)
+ return ENVL_EEPROM;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_FAT)
+ return ENVL_FAT;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_FLASH)
+ return ENVL_FLASH;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_MMC)
+ return ENVL_MMC;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_NAND)
+ return ENVL_NAND;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_NVRAM)
+ return ENVL_NVRAM;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_REMOTE)
+ return ENVL_REMOTE;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)
+ return ENVL_SPI_FLASH;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_UBI)
+ return ENVL_UBI;
+ else if IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
+ return ENVL_NOWHERE;
+ else
+ return ENVL_UNKNOWN;
+}
+
+struct env_driver *env_driver_lookup_default(void)
+{
+ enum env_location loc = env_get_default_location();
+ struct env_driver *drv;
+
+ drv = env_driver_lookup(loc);
+ if (!drv) {
+ debug("%s: No environment driver for location %d\n", __func__,
+ loc);
+ return NULL;
+ }
+
+ return drv;
+}
+
+int env_get_char(int index)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret;
+
+ if (!gd->env_valid)
+ return default_environment[index];
+ if (!drv)
+ return -ENODEV;
+ if (!drv->get_char)
+ return *(uchar *)(gd->env_addr + index);
+ ret = drv->get_char(index);
+ if (ret < 0) {
+ debug("%s: Environment failed to load (err=%d)\n",
+ __func__, ret);
+ }
+
+ return ret;
+}
+
+int env_load(void)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret = 0;
+
+ if (!drv)
+ return -ENODEV;
+ if (!drv->load)
+ return 0;
+ drv->load(); /* TODO(sjg@chromium.org): Make this return an error */
+ if (ret) {
+ debug("%s: Environment failed to load (err=%d)\n", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int env_save(void)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret;
+
+ if (!drv)
+ return -ENODEV;
+ if (!drv->save)
+ return -ENOSYS;
+ ret = drv->save();
+ if (ret) {
+ debug("%s: Environment failed to save (err=%d)\n", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int env_init(void)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret = -ENOENT;
+
+ if (!drv)
+ return -ENODEV;
+ if (drv->init)
+ ret = drv->init();
+ if (ret == -ENOENT) {
+ gd->env_addr = (ulong)&default_environment[0];
+ gd->env_valid = 0;
+
+ return 0;
+ } else if (ret) {
+ debug("%s: Environment failed to init (err=%d)\n", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
--- /dev/null
+/*
+ * (c) Copyright 2016 by VRT Technology
+ *
+ * Author:
+ * Stuart Longland <stuartl@vrt.com.au>
+ *
+ * Based on FAT environment driver
+ * (c) Copyright 2011 by Tigris Elektronik GmbH
+ *
+ * Author:
+ * Maximilian Schwerin <mvs@tigris.de>
+ *
+ * and EXT4 filesystem implementation
+ * (C) Copyright 2011 - 2012 Samsung Electronics
+ * EXT4 filesystem implementation in Uboot by
+ * Uma Shankar <uma.shankar@samsung.com>
+ * Manjunatha C Achar <a.manjunatha@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <search.h>
+#include <errno.h>
+#include <ext4fs.h>
+#include <mmc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CMD_SAVEENV
+static int env_ext4_save(void)
+{
+ env_t env_new;
+ struct blk_desc *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+
+ err = env_export(&env_new);
+ if (err)
+ return err;
+
+ part = blk_get_device_part_str(EXT4_ENV_INTERFACE,
+ EXT4_ENV_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ return 1;
+
+ dev = dev_desc->devnum;
+ ext4fs_set_blk_dev(dev_desc, &info);
+
+ if (!ext4fs_mount(info.size)) {
+ printf("\n** Unable to use %s %s for saveenv **\n",
+ EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART);
+ return 1;
+ }
+
+ err = ext4fs_write(EXT4_ENV_FILE, (void *)&env_new, sizeof(env_t));
+ ext4fs_close();
+
+ if (err == -1) {
+ printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
+ EXT4_ENV_FILE, EXT4_ENV_INTERFACE, dev, part);
+ return 1;
+ }
+
+ puts("done\n");
+ return 0;
+}
+#endif /* CONFIG_CMD_SAVEENV */
+
+static int env_ext4_load(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+ struct blk_desc *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+ loff_t off;
+
+ part = blk_get_device_part_str(EXT4_ENV_INTERFACE,
+ EXT4_ENV_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ goto err_env_relocate;
+
+ dev = dev_desc->devnum;
+ ext4fs_set_blk_dev(dev_desc, &info);
+
+ if (!ext4fs_mount(info.size)) {
+ printf("\n** Unable to use %s %s for loading the env **\n",
+ EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART);
+ goto err_env_relocate;
+ }
+
+ err = ext4_read_file(EXT4_ENV_FILE, buf, 0, CONFIG_ENV_SIZE, &off);
+ ext4fs_close();
+
+ if (err == -1) {
+ printf("\n** Unable to read \"%s\" from %s%d:%d **\n",
+ EXT4_ENV_FILE, EXT4_ENV_INTERFACE, dev, part);
+ goto err_env_relocate;
+ }
+
+ env_import(buf, 1);
+ return 0;
+
+err_env_relocate:
+ set_default_env(NULL);
+
+ return -EIO;
+}
+
+U_BOOT_ENV_LOCATION(ext4) = {
+ .location = ENVL_EXT4,
+ ENV_NAME("EXT4")
+ .load = env_ext4_load,
+ .save = env_save_ptr(env_ext4_save),
+};
--- /dev/null
+/*
+ * (c) Copyright 2011 by Tigris Elektronik GmbH
+ *
+ * Author:
+ * Maximilian Schwerin <mvs@tigris.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <search.h>
+#include <errno.h>
+#include <fat.h>
+#include <mmc.h>
+
+#ifdef CONFIG_SPL_BUILD
+/* TODO(sjg@chromium.org): Figure out why this is needed */
+# if !defined(CONFIG_TARGET_AM335X_EVM) || defined(CONFIG_SPL_OS_BOOT)
+# define LOADENV
+# endif
+#else
+# define LOADENV
+# if defined(CONFIG_CMD_SAVEENV)
+# define CMD_SAVEENV
+# endif
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CMD_SAVEENV
+static int env_fat_save(void)
+{
+ env_t env_new;
+ struct blk_desc *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+ loff_t size;
+
+ err = env_export(&env_new);
+ if (err)
+ return err;
+
+ part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
+ CONFIG_ENV_FAT_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ return 1;
+
+ dev = dev_desc->devnum;
+ if (fat_set_blk_dev(dev_desc, &info) != 0) {
+ printf("\n** Unable to use %s %d:%d for saveenv **\n",
+ CONFIG_ENV_FAT_INTERFACE, dev, part);
+ return 1;
+ }
+
+ err = file_fat_write(CONFIG_ENV_FAT_FILE, (void *)&env_new, 0, sizeof(env_t),
+ &size);
+ if (err == -1) {
+ printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
+ CONFIG_ENV_FAT_FILE, CONFIG_ENV_FAT_INTERFACE, dev, part);
+ return 1;
+ }
+
+ puts("done\n");
+ return 0;
+}
+#endif /* CMD_SAVEENV */
+
+#ifdef LOADENV
+static int env_fat_load(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+ struct blk_desc *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+
+ part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
+ CONFIG_ENV_FAT_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ goto err_env_relocate;
+
+ dev = dev_desc->devnum;
+ if (fat_set_blk_dev(dev_desc, &info) != 0) {
+ printf("\n** Unable to use %s %d:%d for loading the env **\n",
+ CONFIG_ENV_FAT_INTERFACE, dev, part);
+ goto err_env_relocate;
+ }
+
+ err = file_fat_read(CONFIG_ENV_FAT_FILE, buf, CONFIG_ENV_SIZE);
+ if (err == -1) {
+ printf("\n** Unable to read \"%s\" from %s%d:%d **\n",
+ CONFIG_ENV_FAT_FILE, CONFIG_ENV_FAT_INTERFACE, dev, part);
+ goto err_env_relocate;
+ }
+
+ env_import(buf, 1);
+ return 0;
+
+err_env_relocate:
+ set_default_env(NULL);
+
+ return -EIO;
+}
+#endif /* LOADENV */
+
+U_BOOT_ENV_LOCATION(fat) = {
+ .location = ENVL_FAT,
+ ENV_NAME("FAT")
+#ifdef LOADENV
+ .load = env_fat_load,
+#endif
+#ifdef CMD_SAVEENV
+ .save = env_save_ptr(env_fat_save),
+#endif
+};
--- /dev/null
+/*
+ * (C) Copyright 2012
+ * Joe Hershberger, National Instruments, joe.hershberger@ni.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+#ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */
+#include <stdint.h>
+#include <stdio.h>
+#include "fw_env_private.h"
+#include "fw_env.h"
+#include <env_attr.h>
+#include <env_flags.h>
+#define env_get fw_getenv
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+#else
+#include <common.h>
+#include <environment.h>
+#endif
+
+#ifdef CONFIG_CMD_NET
+#define ENV_FLAGS_NET_VARTYPE_REPS "im"
+#else
+#define ENV_FLAGS_NET_VARTYPE_REPS ""
+#endif
+
+static const char env_flags_vartype_rep[] = "sdxb" ENV_FLAGS_NET_VARTYPE_REPS;
+static const char env_flags_varaccess_rep[] = "aroc";
+static const int env_flags_varaccess_mask[] = {
+ 0,
+ ENV_FLAGS_VARACCESS_PREVENT_DELETE |
+ ENV_FLAGS_VARACCESS_PREVENT_CREATE |
+ ENV_FLAGS_VARACCESS_PREVENT_OVERWR,
+ ENV_FLAGS_VARACCESS_PREVENT_DELETE |
+ ENV_FLAGS_VARACCESS_PREVENT_OVERWR,
+ ENV_FLAGS_VARACCESS_PREVENT_DELETE |
+ ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR};
+
+#ifdef CONFIG_CMD_ENV_FLAGS
+static const char * const env_flags_vartype_names[] = {
+ "string",
+ "decimal",
+ "hexadecimal",
+ "boolean",
+#ifdef CONFIG_CMD_NET
+ "IP address",
+ "MAC address",
+#endif
+};
+static const char * const env_flags_varaccess_names[] = {
+ "any",
+ "read-only",
+ "write-once",
+ "change-default",
+};
+
+/*
+ * Print the whole list of available type flags.
+ */
+void env_flags_print_vartypes(void)
+{
+ enum env_flags_vartype curtype = (enum env_flags_vartype)0;
+
+ while (curtype != env_flags_vartype_end) {
+ printf("\t%c -\t%s\n", env_flags_vartype_rep[curtype],
+ env_flags_vartype_names[curtype]);
+ curtype++;
+ }
+}
+
+/*
+ * Print the whole list of available access flags.
+ */
+void env_flags_print_varaccess(void)
+{
+ enum env_flags_varaccess curaccess = (enum env_flags_varaccess)0;
+
+ while (curaccess != env_flags_varaccess_end) {
+ printf("\t%c -\t%s\n", env_flags_varaccess_rep[curaccess],
+ env_flags_varaccess_names[curaccess]);
+ curaccess++;
+ }
+}
+
+/*
+ * Return the name of the type.
+ */
+const char *env_flags_get_vartype_name(enum env_flags_vartype type)
+{
+ return env_flags_vartype_names[type];
+}
+
+/*
+ * Return the name of the access.
+ */
+const char *env_flags_get_varaccess_name(enum env_flags_varaccess access)
+{
+ return env_flags_varaccess_names[access];
+}
+#endif /* CONFIG_CMD_ENV_FLAGS */
+
+/*
+ * Parse the flags string from a .flags attribute list into the vartype enum.
+ */
+enum env_flags_vartype env_flags_parse_vartype(const char *flags)
+{
+ char *type;
+
+ if (strlen(flags) <= ENV_FLAGS_VARTYPE_LOC)
+ return env_flags_vartype_string;
+
+ type = strchr(env_flags_vartype_rep,
+ flags[ENV_FLAGS_VARTYPE_LOC]);
+
+ if (type != NULL)
+ return (enum env_flags_vartype)
+ (type - &env_flags_vartype_rep[0]);
+
+ printf("## Warning: Unknown environment variable type '%c'\n",
+ flags[ENV_FLAGS_VARTYPE_LOC]);
+ return env_flags_vartype_string;
+}
+
+/*
+ * Parse the flags string from a .flags attribute list into the varaccess enum.
+ */
+enum env_flags_varaccess env_flags_parse_varaccess(const char *flags)
+{
+ char *access;
+
+ if (strlen(flags) <= ENV_FLAGS_VARACCESS_LOC)
+ return env_flags_varaccess_any;
+
+ access = strchr(env_flags_varaccess_rep,
+ flags[ENV_FLAGS_VARACCESS_LOC]);
+
+ if (access != NULL)
+ return (enum env_flags_varaccess)
+ (access - &env_flags_varaccess_rep[0]);
+
+ printf("## Warning: Unknown environment variable access method '%c'\n",
+ flags[ENV_FLAGS_VARACCESS_LOC]);
+ return env_flags_varaccess_any;
+}
+
+/*
+ * Parse the binary flags from a hash table entry into the varaccess enum.
+ */
+enum env_flags_varaccess env_flags_parse_varaccess_from_binflags(int binflags)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(env_flags_varaccess_mask); i++)
+ if (env_flags_varaccess_mask[i] ==
+ (binflags & ENV_FLAGS_VARACCESS_BIN_MASK))
+ return (enum env_flags_varaccess)i;
+
+ printf("Warning: Non-standard access flags. (0x%x)\n",
+ binflags & ENV_FLAGS_VARACCESS_BIN_MASK);
+
+ return env_flags_varaccess_any;
+}
+
+static inline int is_hex_prefix(const char *value)
+{
+ return value[0] == '0' && (value[1] == 'x' || value[1] == 'X');
+}
+
+static void skip_num(int hex, const char *value, const char **end,
+ int max_digits)
+{
+ int i;
+
+ if (hex && is_hex_prefix(value))
+ value += 2;
+
+ for (i = max_digits; i != 0; i--) {
+ if (hex && !isxdigit(*value))
+ break;
+ if (!hex && !isdigit(*value))
+ break;
+ value++;
+ }
+ if (end != NULL)
+ *end = value;
+}
+
+#ifdef CONFIG_CMD_NET
+int eth_validate_ethaddr_str(const char *addr)
+{
+ const char *end;
+ const char *cur;
+ int i;
+
+ cur = addr;
+ for (i = 0; i < 6; i++) {
+ skip_num(1, cur, &end, 2);
+ if (cur == end)
+ return -1;
+ if (cur + 2 == end && is_hex_prefix(cur))
+ return -1;
+ if (i != 5 && *end != ':')
+ return -1;
+ if (i == 5 && *end != '\0')
+ return -1;
+ cur = end + 1;
+ }
+
+ return 0;
+}
+#endif
+
+/*
+ * Based on the declared type enum, validate that the value string complies
+ * with that format
+ */
+static int _env_flags_validate_type(const char *value,
+ enum env_flags_vartype type)
+{
+ const char *end;
+#ifdef CONFIG_CMD_NET
+ const char *cur;
+ int i;
+#endif
+
+ switch (type) {
+ case env_flags_vartype_string:
+ break;
+ case env_flags_vartype_decimal:
+ skip_num(0, value, &end, -1);
+ if (*end != '\0')
+ return -1;
+ break;
+ case env_flags_vartype_hex:
+ skip_num(1, value, &end, -1);
+ if (*end != '\0')
+ return -1;
+ if (value + 2 == end && is_hex_prefix(value))
+ return -1;
+ break;
+ case env_flags_vartype_bool:
+ if (value[0] != '1' && value[0] != 'y' && value[0] != 't' &&
+ value[0] != 'Y' && value[0] != 'T' &&
+ value[0] != '0' && value[0] != 'n' && value[0] != 'f' &&
+ value[0] != 'N' && value[0] != 'F')
+ return -1;
+ if (value[1] != '\0')
+ return -1;
+ break;
+#ifdef CONFIG_CMD_NET
+ case env_flags_vartype_ipaddr:
+ cur = value;
+ for (i = 0; i < 4; i++) {
+ skip_num(0, cur, &end, 3);
+ if (cur == end)
+ return -1;
+ if (i != 3 && *end != '.')
+ return -1;
+ if (i == 3 && *end != '\0')
+ return -1;
+ cur = end + 1;
+ }
+ break;
+ case env_flags_vartype_macaddr:
+ if (eth_validate_ethaddr_str(value))
+ return -1;
+ break;
+#endif
+ case env_flags_vartype_end:
+ return -1;
+ }
+
+ /* OK */
+ return 0;
+}
+
+/*
+ * Look for flags in a provided list and failing that the static list
+ */
+static inline int env_flags_lookup(const char *flags_list, const char *name,
+ char *flags)
+{
+ int ret = 1;
+
+ if (!flags)
+ /* bad parameter */
+ return -1;
+
+ /* try the env first */
+ if (flags_list)
+ ret = env_attr_lookup(flags_list, name, flags);
+
+ if (ret != 0)
+ /* if not found in the env, look in the static list */
+ ret = env_attr_lookup(ENV_FLAGS_LIST_STATIC, name, flags);
+
+ return ret;
+}
+
+#ifdef USE_HOSTCC /* Functions only used from tools/env */
+/*
+ * Look up any flags directly from the .flags variable and the static list
+ * and convert them to the vartype enum.
+ */
+enum env_flags_vartype env_flags_get_type(const char *name)
+{
+ const char *flags_list = env_get(ENV_FLAGS_VAR);
+ char flags[ENV_FLAGS_ATTR_MAX_LEN + 1];
+
+ if (env_flags_lookup(flags_list, name, flags))
+ return env_flags_vartype_string;
+
+ if (strlen(flags) <= ENV_FLAGS_VARTYPE_LOC)
+ return env_flags_vartype_string;
+
+ return env_flags_parse_vartype(flags);
+}
+
+/*
+ * Look up the access of a variable directly from the .flags var.
+ */
+enum env_flags_varaccess env_flags_get_varaccess(const char *name)
+{
+ const char *flags_list = env_get(ENV_FLAGS_VAR);
+ char flags[ENV_FLAGS_ATTR_MAX_LEN + 1];
+
+ if (env_flags_lookup(flags_list, name, flags))
+ return env_flags_varaccess_any;
+
+ if (strlen(flags) <= ENV_FLAGS_VARACCESS_LOC)
+ return env_flags_varaccess_any;
+
+ return env_flags_parse_varaccess(flags);
+}
+
+/*
+ * Validate that the proposed new value for "name" is valid according to the
+ * defined flags for that variable, if any.
+ */
+int env_flags_validate_type(const char *name, const char *value)
+{
+ enum env_flags_vartype type;
+
+ if (value == NULL)
+ return 0;
+ type = env_flags_get_type(name);
+ if (_env_flags_validate_type(value, type) < 0) {
+ printf("## Error: flags type check failure for "
+ "\"%s\" <= \"%s\" (type: %c)\n",
+ name, value, env_flags_vartype_rep[type]);
+ return -1;
+ }
+ return 0;
+}
+
+/*
+ * Validate that the proposed access to variable "name" is valid according to
+ * the defined flags for that variable, if any.
+ */
+int env_flags_validate_varaccess(const char *name, int check_mask)
+{
+ enum env_flags_varaccess access;
+ int access_mask;
+
+ access = env_flags_get_varaccess(name);
+ access_mask = env_flags_varaccess_mask[access];
+
+ return (check_mask & access_mask) != 0;
+}
+
+/*
+ * Validate the parameters to "env set" directly
+ */
+int env_flags_validate_env_set_params(char *name, char * const val[], int count)
+{
+ if ((count >= 1) && val[0] != NULL) {
+ enum env_flags_vartype type = env_flags_get_type(name);
+
+ /*
+ * we don't currently check types that need more than
+ * one argument
+ */
+ if (type != env_flags_vartype_string && count > 1) {
+ printf("## Error: too many parameters for setting \"%s\"\n",
+ name);
+ return -1;
+ }
+ return env_flags_validate_type(name, val[0]);
+ }
+ /* ok */
+ return 0;
+}
+
+#else /* !USE_HOSTCC - Functions only used from lib/hashtable.c */
+
+/*
+ * Parse the flag charachters from the .flags attribute list into the binary
+ * form to be stored in the environment entry->flags field.
+ */
+static int env_parse_flags_to_bin(const char *flags)
+{
+ int binflags;
+
+ binflags = env_flags_parse_vartype(flags) & ENV_FLAGS_VARTYPE_BIN_MASK;
+ binflags |= env_flags_varaccess_mask[env_flags_parse_varaccess(flags)];
+
+ return binflags;
+}
+
+static int first_call = 1;
+static const char *flags_list;
+
+/*
+ * Look for possible flags for a newly added variable
+ * This is called specifically when the variable did not exist in the hash
+ * previously, so the blanket update did not find this variable.
+ */
+void env_flags_init(ENTRY *var_entry)
+{
+ const char *var_name = var_entry->key;
+ char flags[ENV_FLAGS_ATTR_MAX_LEN + 1] = "";
+ int ret = 1;
+
+ if (first_call) {
+ flags_list = env_get(ENV_FLAGS_VAR);
+ first_call = 0;
+ }
+ /* look in the ".flags" and static for a reference to this variable */
+ ret = env_flags_lookup(flags_list, var_name, flags);
+
+ /* if any flags were found, set the binary form to the entry */
+ if (!ret && strlen(flags))
+ var_entry->flags = env_parse_flags_to_bin(flags);
+}
+
+/*
+ * Called on each existing env var prior to the blanket update since removing
+ * a flag in the flag list should remove its flags.
+ */
+static int clear_flags(ENTRY *entry)
+{
+ entry->flags = 0;
+
+ return 0;
+}
+
+/*
+ * Call for each element in the list that defines flags for a variable
+ */
+static int set_flags(const char *name, const char *value, void *priv)
+{
+ ENTRY e, *ep;
+
+ e.key = name;
+ e.data = NULL;
+ e.callback = NULL;
+ hsearch_r(e, FIND, &ep, &env_htab, 0);
+
+ /* does the env variable actually exist? */
+ if (ep != NULL) {
+ /* the flag list is empty, so clear the flags */
+ if (value == NULL || strlen(value) == 0)
+ ep->flags = 0;
+ else
+ /* assign the requested flags */
+ ep->flags = env_parse_flags_to_bin(value);
+ }
+
+ return 0;
+}
+
+static int on_flags(const char *name, const char *value, enum env_op op,
+ int flags)
+{
+ /* remove all flags */
+ hwalk_r(&env_htab, clear_flags);
+
+ /* configure any static flags */
+ env_attr_walk(ENV_FLAGS_LIST_STATIC, set_flags, NULL);
+ /* configure any dynamic flags */
+ env_attr_walk(value, set_flags, NULL);
+
+ return 0;
+}
+U_BOOT_ENV_CALLBACK(flags, on_flags);
+
+/*
+ * Perform consistency checking before creating, overwriting, or deleting an
+ * environment variable. Called as a callback function by hsearch_r() and
+ * hdelete_r(). Returns 0 in case of success, 1 in case of failure.
+ * When (flag & H_FORCE) is set, do not print out any error message and force
+ * overwriting of write-once variables.
+ */
+
+int env_flags_validate(const ENTRY *item, const char *newval, enum env_op op,
+ int flag)
+{
+ const char *name;
+ const char *oldval = NULL;
+
+ if (op != env_op_create)
+ oldval = item->data;
+
+ name = item->key;
+
+ /* Default value for NULL to protect string-manipulating functions */
+ newval = newval ? : "";
+
+ /* validate the value to match the variable type */
+ if (op != env_op_delete) {
+ enum env_flags_vartype type = (enum env_flags_vartype)
+ (ENV_FLAGS_VARTYPE_BIN_MASK & item->flags);
+
+ if (_env_flags_validate_type(newval, type) < 0) {
+ printf("## Error: flags type check failure for "
+ "\"%s\" <= \"%s\" (type: %c)\n",
+ name, newval, env_flags_vartype_rep[type]);
+ return -1;
+ }
+ }
+
+ /* check for access permission */
+#ifndef CONFIG_ENV_ACCESS_IGNORE_FORCE
+ if (flag & H_FORCE)
+ return 0;
+#endif
+ switch (op) {
+ case env_op_delete:
+ if (item->flags & ENV_FLAGS_VARACCESS_PREVENT_DELETE) {
+ printf("## Error: Can't delete \"%s\"\n", name);
+ return 1;
+ }
+ break;
+ case env_op_overwrite:
+ if (item->flags & ENV_FLAGS_VARACCESS_PREVENT_OVERWR) {
+ printf("## Error: Can't overwrite \"%s\"\n", name);
+ return 1;
+ } else if (item->flags &
+ ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR) {
+ const char *defval = env_get_default(name);
+
+ if (defval == NULL)
+ defval = "";
+ printf("oldval: %s defval: %s\n", oldval, defval);
+ if (strcmp(oldval, defval) != 0) {
+ printf("## Error: Can't overwrite \"%s\"\n",
+ name);
+ return 1;
+ }
+ }
+ break;
+ case env_op_create:
+ if (item->flags & ENV_FLAGS_VARACCESS_PREVENT_CREATE) {
+ printf("## Error: Can't create \"%s\"\n", name);
+ return 1;
+ }
+ break;
+ }
+
+ return 0;
+}
+
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* #define DEBUG */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <search.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_SPL_BUILD
+# if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_FLASH)
+# define CMD_SAVEENV
+# elif defined(CONFIG_ENV_ADDR_REDUND)
+# error CONFIG_ENV_ADDR_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_FLASH
+# endif
+#endif
+
+#if defined(CONFIG_ENV_SIZE_REDUND) && \
+ (CONFIG_ENV_SIZE_REDUND < CONFIG_ENV_SIZE)
+#error CONFIG_ENV_SIZE_REDUND should not be less then CONFIG_ENV_SIZE
+#endif
+
+/* TODO(sjg@chromium.org): Figure out all these special cases */
+#if (!defined(CONFIG_MICROBLAZE) && !defined(CONFIG_ARCH_ZYNQ) && \
+ !defined(CONFIG_TARGET_MCCMON6) && !defined(CONFIG_TARGET_X600) && \
+ !defined(CONFIG_TARGET_EDMINIV2)) || \
+ !defined(CONFIG_SPL_BUILD)
+#define LOADENV
+#endif
+
+#if !defined(CONFIG_TARGET_X600) || !defined(CONFIG_SPL_BUILD)
+#define INITENV
+#endif
+
+#ifdef ENV_IS_EMBEDDED
+env_t *env_ptr = &environment;
+
+static __maybe_unused env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
+
+#else /* ! ENV_IS_EMBEDDED */
+
+env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
+static __maybe_unused env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
+#endif /* ENV_IS_EMBEDDED */
+
+/* CONFIG_ENV_ADDR is supposed to be on sector boundary */
+static ulong __maybe_unused end_addr =
+ CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1;
+
+#ifdef CONFIG_ENV_ADDR_REDUND
+
+static env_t __maybe_unused *flash_addr_new = (env_t *)CONFIG_ENV_ADDR_REDUND;
+
+/* CONFIG_ENV_ADDR_REDUND is supposed to be on sector boundary */
+static ulong __maybe_unused end_addr_new =
+ CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1;
+#endif /* CONFIG_ENV_ADDR_REDUND */
+
+#ifdef CONFIG_ENV_ADDR_REDUND
+#ifdef INITENV
+static int env_flash_init(void)
+{
+ int crc1_ok = 0, crc2_ok = 0;
+
+ uchar flag1 = flash_addr->flags;
+ uchar flag2 = flash_addr_new->flags;
+
+ ulong addr_default = (ulong)&default_environment[0];
+ ulong addr1 = (ulong)&(flash_addr->data);
+ ulong addr2 = (ulong)&(flash_addr_new->data);
+
+ crc1_ok = crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc;
+ crc2_ok =
+ crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc;
+
+ if (crc1_ok && !crc2_ok) {
+ gd->env_addr = addr1;
+ gd->env_valid = ENV_VALID;
+ } else if (!crc1_ok && crc2_ok) {
+ gd->env_addr = addr2;
+ gd->env_valid = ENV_VALID;
+ } else if (!crc1_ok && !crc2_ok) {
+ gd->env_addr = addr_default;
+ gd->env_valid = 0;
+ } else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
+ gd->env_addr = addr1;
+ gd->env_valid = ENV_VALID;
+ } else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
+ gd->env_addr = addr2;
+ gd->env_valid = ENV_VALID;
+ } else if (flag1 == flag2) {
+ gd->env_addr = addr1;
+ gd->env_valid = ENV_REDUND;
+ } else if (flag1 == 0xFF) {
+ gd->env_addr = addr1;
+ gd->env_valid = ENV_REDUND;
+ } else if (flag2 == 0xFF) {
+ gd->env_addr = addr2;
+ gd->env_valid = ENV_REDUND;
+ }
+
+ return 0;
+}
+#endif
+
+#ifdef CMD_SAVEENV
+static int env_flash_save(void)
+{
+ env_t env_new;
+ char *saved_data = NULL;
+ char flag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
+ int rc = 1;
+#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
+ ulong up_data = 0;
+#endif
+
+ debug("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr);
+
+ if (flash_sect_protect(0, (ulong)flash_addr, end_addr))
+ goto done;
+
+ debug("Protect off %08lX ... %08lX\n",
+ (ulong)flash_addr_new, end_addr_new);
+
+ if (flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new))
+ goto done;
+
+ rc = env_export(&env_new);
+ if (rc)
+ return rc;
+ env_new.flags = new_flag;
+
+#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
+ up_data = end_addr_new + 1 - ((long)flash_addr_new + CONFIG_ENV_SIZE);
+ debug("Data to save 0x%lX\n", up_data);
+ if (up_data) {
+ saved_data = malloc(up_data);
+ if (saved_data == NULL) {
+ printf("Unable to save the rest of sector (%ld)\n",
+ up_data);
+ goto done;
+ }
+ memcpy(saved_data,
+ (void *)((long)flash_addr_new + CONFIG_ENV_SIZE),
+ up_data);
+ debug("Data (start 0x%lX, len 0x%lX) saved at 0x%p\n",
+ (long)flash_addr_new + CONFIG_ENV_SIZE,
+ up_data, saved_data);
+ }
+#endif
+ puts("Erasing Flash...");
+ debug(" %08lX ... %08lX ...", (ulong)flash_addr_new, end_addr_new);
+
+ if (flash_sect_erase((ulong)flash_addr_new, end_addr_new))
+ goto done;
+
+ puts("Writing to Flash... ");
+ debug(" %08lX ... %08lX ...",
+ (ulong)&(flash_addr_new->data),
+ sizeof(env_ptr->data) + (ulong)&(flash_addr_new->data));
+ rc = flash_write((char *)&env_new, (ulong)flash_addr_new,
+ sizeof(env_new));
+ if (rc)
+ goto perror;
+
+ rc = flash_write(&flag, (ulong)&(flash_addr->flags),
+ sizeof(flash_addr->flags));
+ if (rc)
+ goto perror;
+
+#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
+ if (up_data) { /* restore the rest of sector */
+ debug("Restoring the rest of data to 0x%lX len 0x%lX\n",
+ (long)flash_addr_new + CONFIG_ENV_SIZE, up_data);
+ if (flash_write(saved_data,
+ (long)flash_addr_new + CONFIG_ENV_SIZE,
+ up_data))
+ goto perror;
+ }
+#endif
+ puts("done\n");
+
+ {
+ env_t *etmp = flash_addr;
+ ulong ltmp = end_addr;
+
+ flash_addr = flash_addr_new;
+ flash_addr_new = etmp;
+
+ end_addr = end_addr_new;
+ end_addr_new = ltmp;
+ }
+
+ rc = 0;
+ goto done;
+perror:
+ flash_perror(rc);
+done:
+ if (saved_data)
+ free(saved_data);
+ /* try to re-protect */
+ flash_sect_protect(1, (ulong)flash_addr, end_addr);
+ flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new);
+
+ return rc;
+}
+#endif /* CMD_SAVEENV */
+
+#else /* ! CONFIG_ENV_ADDR_REDUND */
+
+#ifdef INITENV
+static int env_flash_init(void)
+{
+ if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
+ gd->env_addr = (ulong)&(env_ptr->data);
+ gd->env_valid = ENV_VALID;
+ return 0;
+ }
+
+ gd->env_addr = (ulong)&default_environment[0];
+ gd->env_valid = 0;
+ return 0;
+}
+#endif
+
+#ifdef CMD_SAVEENV
+static int env_flash_save(void)
+{
+ env_t env_new;
+ int rc = 1;
+ char *saved_data = NULL;
+#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
+ ulong up_data = 0;
+
+ up_data = end_addr + 1 - ((long)flash_addr + CONFIG_ENV_SIZE);
+ debug("Data to save 0x%lx\n", up_data);
+ if (up_data) {
+ saved_data = malloc(up_data);
+ if (saved_data == NULL) {
+ printf("Unable to save the rest of sector (%ld)\n",
+ up_data);
+ goto done;
+ }
+ memcpy(saved_data,
+ (void *)((long)flash_addr + CONFIG_ENV_SIZE), up_data);
+ debug("Data (start 0x%lx, len 0x%lx) saved at 0x%lx\n",
+ (ulong)flash_addr + CONFIG_ENV_SIZE,
+ up_data,
+ (ulong)saved_data);
+ }
+#endif /* CONFIG_ENV_SECT_SIZE */
+
+ debug("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr);
+
+ if (flash_sect_protect(0, (long)flash_addr, end_addr))
+ goto done;
+
+ rc = env_export(&env_new);
+ if (rc)
+ goto done;
+
+ puts("Erasing Flash...");
+ if (flash_sect_erase((long)flash_addr, end_addr))
+ goto done;
+
+ puts("Writing to Flash... ");
+ rc = flash_write((char *)&env_new, (long)flash_addr, CONFIG_ENV_SIZE);
+ if (rc != 0)
+ goto perror;
+
+#if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE
+ if (up_data) { /* restore the rest of sector */
+ debug("Restoring the rest of data to 0x%lx len 0x%lx\n",
+ (ulong)flash_addr + CONFIG_ENV_SIZE, up_data);
+ if (flash_write(saved_data,
+ (long)flash_addr + CONFIG_ENV_SIZE,
+ up_data))
+ goto perror;
+ }
+#endif
+ puts("done\n");
+ rc = 0;
+ goto done;
+perror:
+ flash_perror(rc);
+done:
+ if (saved_data)
+ free(saved_data);
+ /* try to re-protect */
+ flash_sect_protect(1, (long)flash_addr, end_addr);
+ return rc;
+}
+#endif /* CMD_SAVEENV */
+
+#endif /* CONFIG_ENV_ADDR_REDUND */
+
+#ifdef LOADENV
+static int env_flash_load(void)
+{
+#ifdef CONFIG_ENV_ADDR_REDUND
+ if (gd->env_addr != (ulong)&(flash_addr->data)) {
+ env_t *etmp = flash_addr;
+ ulong ltmp = end_addr;
+
+ flash_addr = flash_addr_new;
+ flash_addr_new = etmp;
+
+ end_addr = end_addr_new;
+ end_addr_new = ltmp;
+ }
+
+ if (flash_addr_new->flags != OBSOLETE_FLAG &&
+ crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc) {
+ char flag = OBSOLETE_FLAG;
+
+ gd->env_valid = ENV_REDUND;
+ flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new);
+ flash_write(&flag,
+ (ulong)&(flash_addr_new->flags),
+ sizeof(flash_addr_new->flags));
+ flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new);
+ }
+
+ if (flash_addr->flags != ACTIVE_FLAG &&
+ (flash_addr->flags & ACTIVE_FLAG) == ACTIVE_FLAG) {
+ char flag = ACTIVE_FLAG;
+
+ gd->env_valid = ENV_REDUND;
+ flash_sect_protect(0, (ulong)flash_addr, end_addr);
+ flash_write(&flag,
+ (ulong)&(flash_addr->flags),
+ sizeof(flash_addr->flags));
+ flash_sect_protect(1, (ulong)flash_addr, end_addr);
+ }
+
+ if (gd->env_valid == ENV_REDUND)
+ puts("*** Warning - some problems detected "
+ "reading environment; recovered successfully\n\n");
+#endif /* CONFIG_ENV_ADDR_REDUND */
+
+ env_import((char *)flash_addr, 1);
+
+ return 0;
+}
+#endif /* LOADENV */
+
+U_BOOT_ENV_LOCATION(flash) = {
+ .location = ENVL_FLASH,
+ ENV_NAME("Flash")
+#ifdef LOADENV
+ .load = env_flash_load,
+#endif
+#ifdef CMD_SAVEENV
+ .save = env_save_ptr(env_flash_save),
+#endif
+#ifdef INITENV
+ .init = env_flash_init,
+#endif
+};
--- /dev/null
+/*
+ * (C) Copyright 2008-2011 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* #define DEBUG */
+
+#include <common.h>
+
+#include <command.h>
+#include <environment.h>
+#include <fdtdec.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <mmc.h>
+#include <search.h>
+#include <errno.h>
+
+#if defined(CONFIG_ENV_SIZE_REDUND) && \
+ (CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
+#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if !defined(CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0
+#endif
+
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static inline s64 mmc_offset(int copy)
+{
+ const char *propname = "u-boot,mmc-env-offset";
+ s64 defvalue = CONFIG_ENV_OFFSET;
+
+#if defined(CONFIG_ENV_OFFSET_REDUND)
+ if (copy) {
+ propname = "u-boot,mmc-env-offset-redundant";
+ defvalue = CONFIG_ENV_OFFSET_REDUND;
+ }
+#endif
+
+ return fdtdec_get_config_int(gd->fdt_blob, propname, defvalue);
+}
+#else
+static inline s64 mmc_offset(int copy)
+{
+ s64 offset = CONFIG_ENV_OFFSET;
+
+#if defined(CONFIG_ENV_OFFSET_REDUND)
+ if (copy)
+ offset = CONFIG_ENV_OFFSET_REDUND;
+#endif
+ return offset;
+}
+#endif
+
+__weak int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
+{
+ s64 offset = mmc_offset(copy);
+
+ if (offset < 0)
+ offset += mmc->capacity;
+
+ *env_addr = offset;
+
+ return 0;
+}
+
+__weak int mmc_get_env_dev(void)
+{
+ return CONFIG_SYS_MMC_ENV_DEV;
+}
+
+#ifdef CONFIG_SYS_MMC_ENV_PART
+__weak uint mmc_get_env_part(struct mmc *mmc)
+{
+ return CONFIG_SYS_MMC_ENV_PART;
+}
+
+static unsigned char env_mmc_orig_hwpart;
+
+static int mmc_set_env_part(struct mmc *mmc)
+{
+ uint part = mmc_get_env_part(mmc);
+ int dev = mmc_get_env_dev();
+ int ret = 0;
+
+ env_mmc_orig_hwpart = mmc_get_blk_desc(mmc)->hwpart;
+ ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part);
+ if (ret)
+ puts("MMC partition switch failed\n");
+
+ return ret;
+}
+#else
+static inline int mmc_set_env_part(struct mmc *mmc) {return 0; };
+#endif
+
+static const char *init_mmc_for_env(struct mmc *mmc)
+{
+ if (!mmc)
+ return "!No MMC card found";
+
+#ifdef CONFIG_BLK
+ struct udevice *dev;
+
+ if (blk_get_from_parent(mmc->dev, &dev))
+ return "!No block device";
+#else
+ if (mmc_init(mmc))
+ return "!MMC init failed";
+#endif
+ if (mmc_set_env_part(mmc))
+ return "!MMC partition switch failed";
+
+ return NULL;
+}
+
+static void fini_mmc_for_env(struct mmc *mmc)
+{
+#ifdef CONFIG_SYS_MMC_ENV_PART
+ int dev = mmc_get_env_dev();
+
+ blk_select_hwpart_devnum(IF_TYPE_MMC, dev, env_mmc_orig_hwpart);
+#endif
+}
+
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_SPL_BUILD)
+static inline int write_env(struct mmc *mmc, unsigned long size,
+ unsigned long offset, const void *buffer)
+{
+ uint blk_start, blk_cnt, n;
+ struct blk_desc *desc = mmc_get_blk_desc(mmc);
+
+ blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len;
+ blk_cnt = ALIGN(size, mmc->write_bl_len) / mmc->write_bl_len;
+
+ n = blk_dwrite(desc, blk_start, blk_cnt, (u_char *)buffer);
+
+ return (n == blk_cnt) ? 0 : -1;
+}
+
+static int env_mmc_save(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
+ int dev = mmc_get_env_dev();
+ struct mmc *mmc = find_mmc_device(dev);
+ u32 offset;
+ int ret, copy = 0;
+ const char *errmsg;
+
+ errmsg = init_mmc_for_env(mmc);
+ if (errmsg) {
+ printf("%s\n", errmsg);
+ return 1;
+ }
+
+ ret = env_export(env_new);
+ if (ret)
+ goto fini;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ if (gd->env_valid == ENV_VALID)
+ copy = 1;
+#endif
+
+ if (mmc_get_env_addr(mmc, copy, &offset)) {
+ ret = 1;
+ goto fini;
+ }
+
+ printf("Writing to %sMMC(%d)... ", copy ? "redundant " : "", dev);
+ if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
+ puts("failed\n");
+ ret = 1;
+ goto fini;
+ }
+
+ puts("done\n");
+ ret = 0;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
+#endif
+
+fini:
+ fini_mmc_for_env(mmc);
+ return ret;
+}
+#endif /* CONFIG_CMD_SAVEENV && !CONFIG_SPL_BUILD */
+
+static inline int read_env(struct mmc *mmc, unsigned long size,
+ unsigned long offset, const void *buffer)
+{
+ uint blk_start, blk_cnt, n;
+ struct blk_desc *desc = mmc_get_blk_desc(mmc);
+
+ blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
+ blk_cnt = ALIGN(size, mmc->read_bl_len) / mmc->read_bl_len;
+
+ n = blk_dread(desc, blk_start, blk_cnt, (uchar *)buffer);
+
+ return (n == blk_cnt) ? 0 : -1;
+}
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+static int env_mmc_load(void)
+{
+#if !defined(ENV_IS_EMBEDDED)
+ struct mmc *mmc;
+ u32 offset1, offset2;
+ int read1_fail = 0, read2_fail = 0;
+ int ret;
+ int dev = mmc_get_env_dev();
+ const char *errmsg = NULL;
+
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
+
+ mmc = find_mmc_device(dev);
+
+ errmsg = init_mmc_for_env(mmc);
+ if (errmsg) {
+ ret = -EIO;
+ goto err;
+ }
+
+ if (mmc_get_env_addr(mmc, 0, &offset1) ||
+ mmc_get_env_addr(mmc, 1, &offset2)) {
+ ret = -EIO;
+ goto fini;
+ }
+
+ read1_fail = read_env(mmc, CONFIG_ENV_SIZE, offset1, tmp_env1);
+ read2_fail = read_env(mmc, CONFIG_ENV_SIZE, offset2, tmp_env2);
+
+ if (read1_fail && read2_fail)
+ puts("*** Error - No Valid Environment Area found\n");
+ else if (read1_fail || read2_fail)
+ puts("*** Warning - some problems detected "
+ "reading environment; recovered successfully\n");
+
+ if (read1_fail && read2_fail) {
+ errmsg = "!bad CRC";
+ ret = -EIO;
+ goto fini;
+ } else if (!read1_fail && read2_fail) {
+ gd->env_valid = ENV_VALID;
+ env_import((char *)tmp_env1, 1);
+ } else if (read1_fail && !read2_fail) {
+ gd->env_valid = ENV_REDUND;
+ env_import((char *)tmp_env2, 1);
+ } else {
+ env_import_redund((char *)tmp_env1, (char *)tmp_env2);
+ }
+
+ ret = 0;
+
+fini:
+ fini_mmc_for_env(mmc);
+err:
+ if (ret)
+ set_default_env(errmsg);
+
+#endif
+ return ret;
+}
+#else /* ! CONFIG_ENV_OFFSET_REDUND */
+static int env_mmc_load(void)
+{
+#if !defined(ENV_IS_EMBEDDED)
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+ struct mmc *mmc;
+ u32 offset;
+ int ret;
+ int dev = mmc_get_env_dev();
+ const char *errmsg;
+
+ mmc = find_mmc_device(dev);
+
+ errmsg = init_mmc_for_env(mmc);
+ if (errmsg) {
+ ret = -EIO;
+ goto err;
+ }
+
+ if (mmc_get_env_addr(mmc, 0, &offset)) {
+ ret = -EIO;
+ goto fini;
+ }
+
+ if (read_env(mmc, CONFIG_ENV_SIZE, offset, buf)) {
+ errmsg = "!read failed";
+ ret = -EIO;
+ goto fini;
+ }
+
+ env_import(buf, 1);
+ ret = 0;
+
+fini:
+ fini_mmc_for_env(mmc);
+err:
+ if (ret)
+ set_default_env(errmsg);
+#endif
+ return ret;
+}
+#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+U_BOOT_ENV_LOCATION(mmc) = {
+ .location = ENVL_MMC,
+ ENV_NAME("MMC")
+ .load = env_mmc_load,
+#ifndef CONFIG_SPL_BUILD
+ .save = env_save_ptr(env_mmc_save),
+#endif
+};
--- /dev/null
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2008
+ * Stuart Wood, Lab X Technologies <stuart.wood@labxtechnologies.com>
+ *
+ * (C) Copyright 2004
+ * Jian Zhang, Texas Instruments, jzhang@ti.com.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <nand.h>
+#include <search.h>
+#include <errno.h>
+
+#if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_NAND) && \
+ !defined(CONFIG_SPL_BUILD)
+#define CMD_SAVEENV
+#elif defined(CONFIG_ENV_OFFSET_REDUND)
+#error CONFIG_ENV_OFFSET_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_NAND
+#endif
+
+#if defined(CONFIG_ENV_SIZE_REDUND) && \
+ (CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
+#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
+#endif
+
+#ifndef CONFIG_ENV_RANGE
+#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE
+#endif
+
+#if defined(ENV_IS_EMBEDDED)
+env_t *env_ptr = &environment;
+#elif defined(CONFIG_NAND_ENV_DST)
+env_t *env_ptr = (env_t *)CONFIG_NAND_ENV_DST;
+#else /* ! ENV_IS_EMBEDDED */
+env_t *env_ptr;
+#endif /* ENV_IS_EMBEDDED */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * This is called before nand_init() so we can't read NAND to
+ * validate env data.
+ *
+ * Mark it OK for now. env_relocate() in env_common.c will call our
+ * relocate function which does the real validation.
+ *
+ * When using a NAND boot image (like sequoia_nand), the environment
+ * can be embedded or attached to the U-Boot image in NAND flash.
+ * This way the SPL loads not only the U-Boot image from NAND but
+ * also the environment.
+ */
+static int env_nand_init(void)
+{
+#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_NAND_ENV_DST)
+ int crc1_ok = 0, crc2_ok = 0;
+ env_t *tmp_env1;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ env_t *tmp_env2;
+
+ tmp_env2 = (env_t *)((ulong)env_ptr + CONFIG_ENV_SIZE);
+ crc2_ok = crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc;
+#endif
+ tmp_env1 = env_ptr;
+ crc1_ok = crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc;
+
+ if (!crc1_ok && !crc2_ok) {
+ gd->env_addr = 0;
+ gd->env_valid = 0;
+
+ return 0;
+ } else if (crc1_ok && !crc2_ok) {
+ gd->env_valid = ENV_VALID;
+ }
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ else if (!crc1_ok && crc2_ok) {
+ gd->env_valid = ENV_REDUND;
+ } else {
+ /* both ok - check serial */
+ if (tmp_env1->flags == 255 && tmp_env2->flags == 0)
+ gd->env_valid = ENV_REDUND;
+ else if (tmp_env2->flags == 255 && tmp_env1->flags == 0)
+ gd->env_valid = ENV_VALID;
+ else if (tmp_env1->flags > tmp_env2->flags)
+ gd->env_valid = ENV_VALID;
+ else if (tmp_env2->flags > tmp_env1->flags)
+ gd->env_valid = ENV_REDUND;
+ else /* flags are equal - almost impossible */
+ gd->env_valid = ENV_VALID;
+ }
+
+ if (gd->env_valid == ENV_REDUND)
+ env_ptr = tmp_env2;
+ else
+#endif
+ if (gd->env_valid == ENV_VALID)
+ env_ptr = tmp_env1;
+
+ gd->env_addr = (ulong)env_ptr->data;
+
+#else /* ENV_IS_EMBEDDED || CONFIG_NAND_ENV_DST */
+ gd->env_addr = (ulong)&default_environment[0];
+ gd->env_valid = ENV_VALID;
+#endif /* ENV_IS_EMBEDDED || CONFIG_NAND_ENV_DST */
+
+ return 0;
+}
+
+#ifdef CMD_SAVEENV
+/*
+ * The legacy NAND code saved the environment in the first NAND device i.e.,
+ * nand_dev_desc + 0. This is also the behaviour using the new NAND code.
+ */
+static int writeenv(size_t offset, u_char *buf)
+{
+ size_t end = offset + CONFIG_ENV_RANGE;
+ size_t amount_saved = 0;
+ size_t blocksize, len;
+ struct mtd_info *mtd;
+ u_char *char_ptr;
+
+ mtd = get_nand_dev_by_index(0);
+ if (!mtd)
+ return 1;
+
+ blocksize = mtd->erasesize;
+ len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
+
+ while (amount_saved < CONFIG_ENV_SIZE && offset < end) {
+ if (nand_block_isbad(mtd, offset)) {
+ offset += blocksize;
+ } else {
+ char_ptr = &buf[amount_saved];
+ if (nand_write(mtd, offset, &len, char_ptr))
+ return 1;
+
+ offset += blocksize;
+ amount_saved += len;
+ }
+ }
+ if (amount_saved != CONFIG_ENV_SIZE)
+ return 1;
+
+ return 0;
+}
+
+struct nand_env_location {
+ const char *name;
+ const nand_erase_options_t erase_opts;
+};
+
+static int erase_and_write_env(const struct nand_env_location *location,
+ u_char *env_new)
+{
+ struct mtd_info *mtd;
+ int ret = 0;
+
+ mtd = get_nand_dev_by_index(0);
+ if (!mtd)
+ return 1;
+
+ printf("Erasing %s...\n", location->name);
+ if (nand_erase_opts(mtd, &location->erase_opts))
+ return 1;
+
+ printf("Writing to %s... ", location->name);
+ ret = writeenv(location->erase_opts.offset, env_new);
+ puts(ret ? "FAILED!\n" : "OK\n");
+
+ return ret;
+}
+
+static int env_nand_save(void)
+{
+ int ret = 0;
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
+ int env_idx = 0;
+ static const struct nand_env_location location[] = {
+ {
+ .name = "NAND",
+ .erase_opts = {
+ .length = CONFIG_ENV_RANGE,
+ .offset = CONFIG_ENV_OFFSET,
+ },
+ },
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ {
+ .name = "redundant NAND",
+ .erase_opts = {
+ .length = CONFIG_ENV_RANGE,
+ .offset = CONFIG_ENV_OFFSET_REDUND,
+ },
+ },
+#endif
+ };
+
+
+ if (CONFIG_ENV_RANGE < CONFIG_ENV_SIZE)
+ return 1;
+
+ ret = env_export(env_new);
+ if (ret)
+ return ret;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ env_idx = (gd->env_valid == ENV_VALID);
+#endif
+
+ ret = erase_and_write_env(&location[env_idx], (u_char *)env_new);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ if (!ret) {
+ /* preset other copy for next write */
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID :
+ ENV_REDUND;
+ return ret;
+ }
+
+ env_idx = (env_idx + 1) & 1;
+ ret = erase_and_write_env(&location[env_idx], (u_char *)env_new);
+ if (!ret)
+ printf("Warning: primary env write failed,"
+ " redundancy is lost!\n");
+#endif
+
+ return ret;
+}
+#endif /* CMD_SAVEENV */
+
+#if defined(CONFIG_SPL_BUILD)
+static int readenv(size_t offset, u_char *buf)
+{
+ return nand_spl_load_image(offset, CONFIG_ENV_SIZE, buf);
+}
+#else
+static int readenv(size_t offset, u_char *buf)
+{
+ size_t end = offset + CONFIG_ENV_RANGE;
+ size_t amount_loaded = 0;
+ size_t blocksize, len;
+ struct mtd_info *mtd;
+ u_char *char_ptr;
+
+ mtd = get_nand_dev_by_index(0);
+ if (!mtd)
+ return 1;
+
+ blocksize = mtd->erasesize;
+ len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
+
+ while (amount_loaded < CONFIG_ENV_SIZE && offset < end) {
+ if (nand_block_isbad(mtd, offset)) {
+ offset += blocksize;
+ } else {
+ char_ptr = &buf[amount_loaded];
+ if (nand_read_skip_bad(mtd, offset,
+ &len, NULL,
+ mtd->size, char_ptr))
+ return 1;
+
+ offset += blocksize;
+ amount_loaded += len;
+ }
+ }
+
+ if (amount_loaded != CONFIG_ENV_SIZE)
+ return 1;
+
+ return 0;
+}
+#endif /* #if defined(CONFIG_SPL_BUILD) */
+
+#ifdef CONFIG_ENV_OFFSET_OOB
+int get_nand_env_oob(struct mtd_info *mtd, unsigned long *result)
+{
+ struct mtd_oob_ops ops;
+ uint32_t oob_buf[ENV_OFFSET_SIZE / sizeof(uint32_t)];
+ int ret;
+
+ ops.datbuf = NULL;
+ ops.mode = MTD_OOB_AUTO;
+ ops.ooboffs = 0;
+ ops.ooblen = ENV_OFFSET_SIZE;
+ ops.oobbuf = (void *)oob_buf;
+
+ ret = mtd->read_oob(mtd, ENV_OFFSET_SIZE, &ops);
+ if (ret) {
+ printf("error reading OOB block 0\n");
+ return ret;
+ }
+
+ if (oob_buf[0] == ENV_OOB_MARKER) {
+ *result = ovoid ob_buf[1] * mtd->erasesize;
+ } else if (oob_buf[0] == ENV_OOB_MARKER_OLD) {
+ *result = oob_buf[1];
+ } else {
+ printf("No dynamic environment marker in OOB block 0\n");
+ return -ENOENT;
+ }
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+static int env_nand_load(void)
+{
+#if defined(ENV_IS_EMBEDDED)
+ return 0;
+#else
+ int read1_fail = 0, read2_fail = 0;
+ env_t *tmp_env1, *tmp_env2;
+ int ret = 0;
+
+ tmp_env1 = (env_t *)malloc(CONFIG_ENV_SIZE);
+ tmp_env2 = (env_t *)malloc(CONFIG_ENV_SIZE);
+ if (tmp_env1 == NULL || tmp_env2 == NULL) {
+ puts("Can't allocate buffers for environment\n");
+ set_default_env("!malloc() failed");
+ ret = -EIO;
+ goto done;
+ }
+
+ read1_fail = readenv(CONFIG_ENV_OFFSET, (u_char *) tmp_env1);
+ read2_fail = readenv(CONFIG_ENV_OFFSET_REDUND, (u_char *) tmp_env2);
+
+ if (read1_fail && read2_fail)
+ puts("*** Error - No Valid Environment Area found\n");
+ else if (read1_fail || read2_fail)
+ puts("*** Warning - some problems detected "
+ "reading environment; recovered successfully\n");
+
+ if (read1_fail && read2_fail) {
+ set_default_env("!bad env area");
+ goto done;
+ } else if (!read1_fail && read2_fail) {
+ gd->env_valid = ENV_VALID;
+ env_import((char *)tmp_env1, 1);
+ } else if (read1_fail && !read2_fail) {
+ gd->env_valid = ENV_REDUND;
+ env_import((char *)tmp_env2, 1);
+ } else {
+ env_import_redund((char *)tmp_env1, (char *)tmp_env2);
+ }
+
+done:
+ free(tmp_env1);
+ free(tmp_env2);
+
+ return ret;
+#endif /* ! ENV_IS_EMBEDDED */
+}
+#else /* ! CONFIG_ENV_OFFSET_REDUND */
+/*
+ * The legacy NAND code saved the environment in the first NAND
+ * device i.e., nand_dev_desc + 0. This is also the behaviour using
+ * the new NAND code.
+ */
+static int env_nand_load(void)
+{
+#if !defined(ENV_IS_EMBEDDED)
+ int ret;
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+
+#if defined(CONFIG_ENV_OFFSET_OOB)
+ struct mtd_info *mtd = get_nand_dev_by_index(0);
+ /*
+ * If unable to read environment offset from NAND OOB then fall through
+ * to the normal environment reading code below
+ */
+ if (mtd && !get_nand_env_oob(mtd, &nand_env_oob_offset)) {
+ printf("Found Environment offset in OOB..\n");
+ } else {
+ set_default_env("!no env offset in OOB");
+ return;
+ }
+#endif
+
+ ret = readenv(CONFIG_ENV_OFFSET, (u_char *)buf);
+ if (ret) {
+ set_default_env("!readenv() failed");
+ return -EIO;
+ }
+
+ env_import(buf, 1);
+#endif /* ! ENV_IS_EMBEDDED */
+
+ return 0;
+}
+#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+U_BOOT_ENV_LOCATION(nand) = {
+ .location = ENVL_NAND,
+ ENV_NAME("NAND")
+ .load = env_nand_load,
+#if defined(CMD_SAVEENV)
+ .save = env_save_ptr(env_nand_save),
+#endif
+ .init = env_nand_init,
+};
--- /dev/null
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+U_BOOT_ENV_LOCATION(nowhere) = {
+ .location = ENVL_NOWHERE,
+ ENV_NAME("nowhere")
+};
--- /dev/null
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * 09-18-2001 Andreas Heppel, Sysgo RTS GmbH <aheppel@sysgo.de>
+ *
+ * It might not be possible in all cases to use 'memcpy()' to copy
+ * the environment to NVRAM, as the NVRAM might not be mapped into
+ * the memory space. (I.e. this is the case for the BAB750). In those
+ * cases it might be possible to access the NVRAM using a different
+ * method. For example, the RTC on the BAB750 is accessible in IO
+ * space using its address and data registers. To enable usage of
+ * NVRAM in those cases I invented the functions 'nvram_read()' and
+ * 'nvram_write()', which will be activated upon the configuration
+ * #define CONFIG_SYS_NVRAM_ACCESS_ROUTINE. Note, that those functions are
+ * strongly dependent on the used HW, and must be redefined for each
+ * board that wants to use them.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <search.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
+extern void *nvram_read(void *dest, const long src, size_t count);
+extern void nvram_write(long dest, const void *src, size_t count);
+#else
+env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
+#endif
+
+#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
+static int env_nvram_get_char(int index)
+{
+ uchar c;
+
+ nvram_read(&c, CONFIG_ENV_ADDR + index, 1);
+
+ return c;
+}
+#endif
+
+static int env_nvram_load(void)
+{
+ char buf[CONFIG_ENV_SIZE];
+
+#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE)
+ nvram_read(buf, CONFIG_ENV_ADDR, CONFIG_ENV_SIZE);
+#else
+ memcpy(buf, (void *)CONFIG_ENV_ADDR, CONFIG_ENV_SIZE);
+#endif
+ env_import(buf, 1);
+
+ return 0;
+}
+
+static int env_nvram_save(void)
+{
+ env_t env_new;
+ int rcode = 0;
+
+ rcode = env_export(&env_new);
+ if (rcode)
+ return rcode;
+
+#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
+ nvram_write(CONFIG_ENV_ADDR, &env_new, CONFIG_ENV_SIZE);
+#else
+ if (memcpy((char *)CONFIG_ENV_ADDR, &env_new, CONFIG_ENV_SIZE) == NULL)
+ rcode = 1;
+#endif
+ return rcode;
+}
+
+/*
+ * Initialize Environment use
+ *
+ * We are still running from ROM, so data use is limited
+ */
+static int env_nvram_init(void)
+{
+#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE)
+ ulong crc;
+ uchar data[ENV_SIZE];
+
+ nvram_read(&crc, CONFIG_ENV_ADDR, sizeof(ulong));
+ nvram_read(data, CONFIG_ENV_ADDR + sizeof(ulong), ENV_SIZE);
+
+ if (crc32(0, data, ENV_SIZE) == crc) {
+ gd->env_addr = (ulong)CONFIG_ENV_ADDR + sizeof(long);
+#else
+ if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
+ gd->env_addr = (ulong)&env_ptr->data;
+#endif
+ gd->env_valid = ENV_VALID;
+ } else {
+ gd->env_addr = (ulong)&default_environment[0];
+ gd->env_valid = 0;
+ }
+
+ return 0;
+}
+
+U_BOOT_ENV_LOCATION(nvram) = {
+ .location = ENVL_NVRAM,
+ ENV_NAME("NVRAM")
+#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
+ .get_char = env_nvram_get_char,
+#endif
+ .load = env_nvram_load,
+ .save = env_save_ptr(env_nvram_save),
+ .init = env_nvram_init,
+};
--- /dev/null
+/*
+ * (C) Copyright 2010 DENX Software Engineering
+ * Wolfgang Denk <wd@denx.de>
+ *
+ * (C) Copyright 2005-2009 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <search.h>
+#include <errno.h>
+#include <onenand_uboot.h>
+
+#include <linux/compat.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/onenand.h>
+
+#define ONENAND_MAX_ENV_SIZE CONFIG_ENV_SIZE
+#define ONENAND_ENV_SIZE(mtd) (ONENAND_MAX_ENV_SIZE - ENV_HEADER_SIZE)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int env_onenand_load(void)
+{
+ struct mtd_info *mtd = &onenand_mtd;
+#ifdef CONFIG_ENV_ADDR_FLEX
+ struct onenand_chip *this = &onenand_chip;
+#endif
+ int rc;
+ size_t retlen;
+#ifdef ENV_IS_EMBEDDED
+ char *buf = (char *)&environment;
+#else
+ loff_t env_addr = CONFIG_ENV_ADDR;
+ char onenand_env[ONENAND_MAX_ENV_SIZE];
+ char *buf = (char *)&onenand_env[0];
+#endif /* ENV_IS_EMBEDDED */
+
+#ifndef ENV_IS_EMBEDDED
+# ifdef CONFIG_ENV_ADDR_FLEX
+ if (FLEXONENAND(this))
+ env_addr = CONFIG_ENV_ADDR_FLEX;
+# endif
+ /* Check OneNAND exist */
+ if (mtd->writesize)
+ /* Ignore read fail */
+ mtd_read(mtd, env_addr, ONENAND_MAX_ENV_SIZE,
+ &retlen, (u_char *)buf);
+ else
+ mtd->writesize = MAX_ONENAND_PAGESIZE;
+#endif /* !ENV_IS_EMBEDDED */
+
+ rc = env_import(buf, 1);
+ if (rc)
+ gd->env_valid = ENV_VALID;
+
+ return rc ? 0 : -EIO;
+}
+
+static int env_onenand_save(void)
+{
+ env_t env_new;
+ int ret;
+ struct mtd_info *mtd = &onenand_mtd;
+#ifdef CONFIG_ENV_ADDR_FLEX
+ struct onenand_chip *this = &onenand_chip;
+#endif
+ loff_t env_addr = CONFIG_ENV_ADDR;
+ size_t retlen;
+ struct erase_info instr = {
+ .callback = NULL,
+ };
+
+ ret = env_export(&env_new);
+ if (ret)
+ return ret;
+
+ instr.len = CONFIG_ENV_SIZE;
+#ifdef CONFIG_ENV_ADDR_FLEX
+ if (FLEXONENAND(this)) {
+ env_addr = CONFIG_ENV_ADDR_FLEX;
+ instr.len = CONFIG_ENV_SIZE_FLEX;
+ instr.len <<= onenand_mtd.eraseregions[0].numblocks == 1 ?
+ 1 : 0;
+ }
+#endif
+ instr.addr = env_addr;
+ instr.mtd = mtd;
+ if (mtd_erase(mtd, &instr)) {
+ printf("OneNAND: erase failed at 0x%08llx\n", env_addr);
+ return 1;
+ }
+
+ if (mtd_write(mtd, env_addr, ONENAND_MAX_ENV_SIZE, &retlen,
+ (u_char *)&env_new)) {
+ printf("OneNAND: write failed at 0x%llx\n", instr.addr);
+ return 2;
+ }
+
+ return 0;
+}
+
+U_BOOT_ENV_LOCATION(onenand) = {
+ .location = ENVL_ONENAND,
+ ENV_NAME("OneNAND")
+ .load = env_onenand_load,
+ .save = env_save_ptr(env_onenand_save),
+};
--- /dev/null
+/*
+ * (C) Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* #define DEBUG */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+
+#ifdef ENV_IS_EMBEDDED
+env_t *env_ptr = &environment;
+#else /* ! ENV_IS_EMBEDDED */
+env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
+#endif /* ENV_IS_EMBEDDED */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if !defined(CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0
+#endif
+
+static int env_remote_init(void)
+{
+ if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
+ gd->env_addr = (ulong)&(env_ptr->data);
+ gd->env_valid = ENV_VALID;
+ return 0;
+ }
+
+ return -ENOENT;
+}
+
+#ifdef CONFIG_CMD_SAVEENV
+static int env_remote_save(void)
+{
+#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
+ printf("Can not support the 'saveenv' when boot from SRIO or PCIE!\n");
+ return 1;
+#else
+ return 0;
+#endif
+}
+#endif /* CONFIG_CMD_SAVEENV */
+
+static int env_remote_load(void)
+{
+#ifndef ENV_IS_EMBEDDED
+ env_import((char *)env_ptr, 1);
+#endif
+
+ return 0;
+}
+
+U_BOOT_ENV_LOCATION(remote) = {
+ .location = ENVL_REMOTE,
+ ENV_NAME("Remote")
+ .load = env_remote_load,
+ .save = env_save_ptr(env_remote_save),
+ .init = env_remote_init,
+};
--- /dev/null
+/*
+ * (C) Copyright 2010-2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* #define DEBUG */
+
+#include <common.h>
+
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <errno.h>
+#include <memalign.h>
+#include <sata.h>
+#include <search.h>
+
+#if defined(CONFIG_ENV_SIZE_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND)
+#error ENV REDUND not supported
+#endif
+
+#if !defined(CONFIG_ENV_OFFSET) || !defined(CONFIG_ENV_SIZE)
+#error CONFIG_ENV_OFFSET or CONFIG_ENV_SIZE not defined
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+__weak int sata_get_env_dev(void)
+{
+ return CONFIG_SYS_SATA_ENV_DEV;
+}
+
+#ifdef CONFIG_CMD_SAVEENV
+static inline int write_env(struct blk_desc *sata, unsigned long size,
+ unsigned long offset, void *buffer)
+{
+ uint blk_start, blk_cnt, n;
+
+ blk_start = ALIGN(offset, sata->blksz) / sata->blksz;
+ blk_cnt = ALIGN(size, sata->blksz) / sata->blksz;
+
+ n = blk_dwrite(sata, blk_start, blk_cnt, buffer);
+
+ return (n == blk_cnt) ? 0 : -1;
+}
+
+static int env_sata_save(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
+ struct blk_desc *sata = NULL;
+ int env_sata, ret;
+
+ if (sata_initialize())
+ return 1;
+
+ env_sata = sata_get_env_dev();
+
+ sata = sata_get_dev(env_sata);
+ if (sata == NULL) {
+ printf("Unknown SATA(%d) device for environment!\n",
+ env_sata);
+ return 1;
+ }
+
+ ret = env_export(env_new);
+ if (ret)
+ return 1;
+
+ printf("Writing to SATA(%d)...", env_sata);
+ if (write_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, &env_new)) {
+ puts("failed\n");
+ return 1;
+ }
+
+ puts("done\n");
+ return 0;
+}
+#endif /* CONFIG_CMD_SAVEENV */
+
+static inline int read_env(struct blk_desc *sata, unsigned long size,
+ unsigned long offset, void *buffer)
+{
+ uint blk_start, blk_cnt, n;
+
+ blk_start = ALIGN(offset, sata->blksz) / sata->blksz;
+ blk_cnt = ALIGN(size, sata->blksz) / sata->blksz;
+
+ n = blk_dread(sata, blk_start, blk_cnt, buffer);
+
+ return (n == blk_cnt) ? 0 : -1;
+}
+
+static void env_sata_load(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+ struct blk_desc *sata = NULL;
+ int env_sata;
+
+ if (sata_initialize())
+ return -EIO;
+
+ env_sata = sata_get_env_dev();
+
+ sata = sata_get_dev(env_sata);
+ if (sata == NULL) {
+ printf("Unknown SATA(%d) device for environment!\n", env_sata);
+ return -EIO;
+ }
+
+ if (read_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf)) {
+ set_default_env(NULL);
+ return -EIO;
+ }
+
+ env_import(buf, 1);
+
+ return 0;
+}
+
+U_BOOT_ENV_LOCATION(sata) = {
+ .location = ENVL_ESATA,
+ ENV_NAME("SATA")
+ .load = env_sata_load,
+ .save = env_save_ptr(env_sata_save),
+};
--- /dev/null
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+ *
+ * (C) Copyright 2008 Atmel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <environment.h>
+#include <malloc.h>
+#include <spi.h>
+#include <spi_flash.h>
+#include <search.h>
+#include <errno.h>
+#include <dm/device-internal.h>
+
+#ifndef CONFIG_ENV_SPI_BUS
+# define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
+#endif
+#ifndef CONFIG_ENV_SPI_CS
+# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
+#endif
+#ifndef CONFIG_ENV_SPI_MAX_HZ
+# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#endif
+#ifndef CONFIG_ENV_SPI_MODE
+# define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+#endif
+
+#ifndef CONFIG_SPL_BUILD
+#define CMD_SAVEENV
+#endif
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+#ifdef CMD_SAVEENV
+static ulong env_offset = CONFIG_ENV_OFFSET;
+static ulong env_new_offset = CONFIG_ENV_OFFSET_REDUND;
+#endif
+
+#define ACTIVE_FLAG 1
+#define OBSOLETE_FLAG 0
+#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct spi_flash *env_flash;
+
+static int setup_flash_device(void)
+{
+#ifdef CONFIG_DM_SPI_FLASH
+ struct udevice *new;
+ int ret;
+
+ /* speed and mode will be read from DT */
+ ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+ 0, 0, &new);
+ if (ret) {
+ set_default_env("!spi_flash_probe_bus_cs() failed");
+ return ret;
+ }
+
+ env_flash = dev_get_uclass_priv(new);
+#else
+
+ if (!env_flash) {
+ env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
+ CONFIG_ENV_SPI_CS,
+ CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
+ if (!env_flash) {
+ set_default_env("!spi_flash_probe() failed");
+ return -EIO;
+ }
+ }
+#endif
+ return 0;
+}
+
+#if defined(CONFIG_ENV_OFFSET_REDUND)
+#ifdef CMD_SAVEENV
+static int env_sf_save(void)
+{
+ env_t env_new;
+ char *saved_buffer = NULL, flag = OBSOLETE_FLAG;
+ u32 saved_size, saved_offset, sector;
+ int ret;
+
+ ret = setup_flash_device();
+ if (ret)
+ return ret;
+
+ ret = env_export(&env_new);
+ if (ret)
+ return -EIO;
+ env_new.flags = ACTIVE_FLAG;
+
+ if (gd->env_valid == ENV_VALID) {
+ env_new_offset = CONFIG_ENV_OFFSET_REDUND;
+ env_offset = CONFIG_ENV_OFFSET;
+ } else {
+ env_new_offset = CONFIG_ENV_OFFSET;
+ env_offset = CONFIG_ENV_OFFSET_REDUND;
+ }
+
+ /* Is the sector larger than the env (i.e. embedded) */
+ if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
+ saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
+ saved_offset = env_new_offset + CONFIG_ENV_SIZE;
+ saved_buffer = memalign(ARCH_DMA_MINALIGN, saved_size);
+ if (!saved_buffer) {
+ ret = -ENOMEM;
+ goto done;
+ }
+ ret = spi_flash_read(env_flash, saved_offset,
+ saved_size, saved_buffer);
+ if (ret)
+ goto done;
+ }
+
+ sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
+
+ puts("Erasing SPI flash...");
+ ret = spi_flash_erase(env_flash, env_new_offset,
+ sector * CONFIG_ENV_SECT_SIZE);
+ if (ret)
+ goto done;
+
+ puts("Writing to SPI flash...");
+
+ ret = spi_flash_write(env_flash, env_new_offset,
+ CONFIG_ENV_SIZE, &env_new);
+ if (ret)
+ goto done;
+
+ if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
+ ret = spi_flash_write(env_flash, saved_offset,
+ saved_size, saved_buffer);
+ if (ret)
+ goto done;
+ }
+
+ ret = spi_flash_write(env_flash, env_offset + offsetof(env_t, flags),
+ sizeof(env_new.flags), &flag);
+ if (ret)
+ goto done;
+
+ puts("done\n");
+
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
+
+ printf("Valid environment: %d\n", (int)gd->env_valid);
+
+ done:
+ if (saved_buffer)
+ free(saved_buffer);
+
+ return ret;
+}
+#endif /* CMD_SAVEENV */
+
+static int env_sf_load(void)
+{
+ int ret;
+ int crc1_ok = 0, crc2_ok = 0;
+ env_t *tmp_env1 = NULL;
+ env_t *tmp_env2 = NULL;
+ env_t *ep = NULL;
+
+ tmp_env1 = (env_t *)memalign(ARCH_DMA_MINALIGN,
+ CONFIG_ENV_SIZE);
+ tmp_env2 = (env_t *)memalign(ARCH_DMA_MINALIGN,
+ CONFIG_ENV_SIZE);
+ if (!tmp_env1 || !tmp_env2) {
+ set_default_env("!malloc() failed");
+ ret = -EIO;
+ goto out;
+ }
+
+ ret = setup_flash_device();
+ if (ret)
+ goto out;
+
+ ret = spi_flash_read(env_flash, CONFIG_ENV_OFFSET,
+ CONFIG_ENV_SIZE, tmp_env1);
+ if (ret) {
+ set_default_env("!spi_flash_read() failed");
+ goto err_read;
+ }
+
+ if (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc)
+ crc1_ok = 1;
+
+ ret = spi_flash_read(env_flash, CONFIG_ENV_OFFSET_REDUND,
+ CONFIG_ENV_SIZE, tmp_env2);
+ if (!ret) {
+ if (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc)
+ crc2_ok = 1;
+ }
+
+ if (!crc1_ok && !crc2_ok) {
+ set_default_env("!bad CRC");
+ ret = -EIO;
+ goto err_read;
+ } else if (crc1_ok && !crc2_ok) {
+ gd->env_valid = ENV_VALID;
+ } else if (!crc1_ok && crc2_ok) {
+ gd->env_valid = ENV_REDUND;
+ } else if (tmp_env1->flags == ACTIVE_FLAG &&
+ tmp_env2->flags == OBSOLETE_FLAG) {
+ gd->env_valid = ENV_VALID;
+ } else if (tmp_env1->flags == OBSOLETE_FLAG &&
+ tmp_env2->flags == ACTIVE_FLAG) {
+ gd->env_valid = ENV_REDUND;
+ } else if (tmp_env1->flags == tmp_env2->flags) {
+ gd->env_valid = ENV_VALID;
+ } else if (tmp_env1->flags == 0xFF) {
+ gd->env_valid = ENV_VALID;
+ } else if (tmp_env2->flags == 0xFF) {
+ gd->env_valid = ENV_REDUND;
+ } else {
+ /*
+ * this differs from code in env_flash.c, but I think a sane
+ * default path is desirable.
+ */
+ gd->env_valid = ENV_VALID;
+ }
+
+ if (gd->env_valid == ENV_VALID)
+ ep = tmp_env1;
+ else
+ ep = tmp_env2;
+
+ ret = env_import((char *)ep, 0);
+ if (!ret) {
+ error("Cannot import environment: errno = %d\n", errno);
+ set_default_env("!env_import failed");
+ }
+
+err_read:
+ spi_flash_free(env_flash);
+ env_flash = NULL;
+out:
+ free(tmp_env1);
+ free(tmp_env2);
+
+ return ret;
+}
+#else
+#ifdef CMD_SAVEENV
+static int env_sf_save(void)
+{
+ u32 saved_size, saved_offset, sector;
+ char *saved_buffer = NULL;
+ int ret = 1;
+ env_t env_new;
+
+ ret = setup_flash_device();
+ if (ret)
+ return ret;
+
+ /* Is the sector larger than the env (i.e. embedded) */
+ if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
+ saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
+ saved_offset = CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE;
+ saved_buffer = malloc(saved_size);
+ if (!saved_buffer)
+ goto done;
+
+ ret = spi_flash_read(env_flash, saved_offset,
+ saved_size, saved_buffer);
+ if (ret)
+ goto done;
+ }
+
+ ret = env_export(&env_new);
+ if (ret)
+ goto done;
+
+ sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
+
+ puts("Erasing SPI flash...");
+ ret = spi_flash_erase(env_flash, CONFIG_ENV_OFFSET,
+ sector * CONFIG_ENV_SECT_SIZE);
+ if (ret)
+ goto done;
+
+ puts("Writing to SPI flash...");
+ ret = spi_flash_write(env_flash, CONFIG_ENV_OFFSET,
+ CONFIG_ENV_SIZE, &env_new);
+ if (ret)
+ goto done;
+
+ if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
+ ret = spi_flash_write(env_flash, saved_offset,
+ saved_size, saved_buffer);
+ if (ret)
+ goto done;
+ }
+
+ ret = 0;
+ puts("done\n");
+
+ done:
+ if (saved_buffer)
+ free(saved_buffer);
+
+ return ret;
+}
+#endif /* CMD_SAVEENV */
+
+static int env_sf_load(void)
+{
+ int ret;
+ char *buf = NULL;
+
+ buf = (char *)memalign(ARCH_DMA_MINALIGN, CONFIG_ENV_SIZE);
+ if (!buf) {
+ set_default_env("!malloc() failed");
+ return -EIO;
+ }
+
+ ret = setup_flash_device();
+ if (ret)
+ goto out;
+
+ ret = spi_flash_read(env_flash,
+ CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, buf);
+ if (ret) {
+ set_default_env("!spi_flash_read() failed");
+ goto err_read;
+ }
+
+ ret = env_import(buf, 1);
+ if (ret)
+ gd->env_valid = ENV_VALID;
+
+err_read:
+ spi_flash_free(env_flash);
+ env_flash = NULL;
+out:
+ free(buf);
+
+ return ret;
+}
+#endif
+
+U_BOOT_ENV_LOCATION(sf) = {
+ .location = ENVL_SPI_FLASH,
+ ENV_NAME("SPI Flash")
+ .load = env_sf_load,
+#ifdef CMD_SAVEENV
+ .save = env_save_ptr(env_sf_save),
+#endif
+};
--- /dev/null
+/*
+ * (c) Copyright 2012 by National Instruments,
+ * Joe Hershberger <joe.hershberger@ni.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <command.h>
+#include <environment.h>
+#include <errno.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <search.h>
+#include <ubi_uboot.h>
+#undef crc32
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CMD_SAVEENV
+#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
+static int env_ubi_save(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
+ int ret;
+
+ ret = env_export(env_new);
+ if (ret)
+ return ret;
+
+ if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
+ printf("\n** Cannot find mtd partition \"%s\"\n",
+ CONFIG_ENV_UBI_PART);
+ return 1;
+ }
+
+ if (gd->env_valid == ENV_VALID) {
+ puts("Writing to redundant UBI... ");
+ if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME_REDUND,
+ (void *)env_new, CONFIG_ENV_SIZE)) {
+ printf("\n** Unable to write env to %s:%s **\n",
+ CONFIG_ENV_UBI_PART,
+ CONFIG_ENV_UBI_VOLUME_REDUND);
+ return 1;
+ }
+ } else {
+ puts("Writing to UBI... ");
+ if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME,
+ (void *)env_new, CONFIG_ENV_SIZE)) {
+ printf("\n** Unable to write env to %s:%s **\n",
+ CONFIG_ENV_UBI_PART,
+ CONFIG_ENV_UBI_VOLUME);
+ return 1;
+ }
+ }
+
+ puts("done\n");
+
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
+
+ return 0;
+}
+#else /* ! CONFIG_SYS_REDUNDAND_ENVIRONMENT */
+static int env_ubi_save(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
+ int ret;
+
+ ret = env_export(env_new);
+ if (ret)
+ return ret;
+
+ if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
+ printf("\n** Cannot find mtd partition \"%s\"\n",
+ CONFIG_ENV_UBI_PART);
+ return 1;
+ }
+
+ if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME, (void *)env_new,
+ CONFIG_ENV_SIZE)) {
+ printf("\n** Unable to write env to %s:%s **\n",
+ CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
+ return 1;
+ }
+
+ puts("done\n");
+ return 0;
+}
+#endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
+#endif /* CONFIG_CMD_SAVEENV */
+
+#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
+static int env_ubi_load(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, env1_buf, CONFIG_ENV_SIZE);
+ ALLOC_CACHE_ALIGN_BUFFER(char, env2_buf, CONFIG_ENV_SIZE);
+ env_t *tmp_env1, *tmp_env2;
+
+ /*
+ * In case we have restarted u-boot there is a chance that buffer
+ * contains old environment (from the previous boot).
+ * If UBI volume is zero size, ubi_volume_read() doesn't modify the
+ * buffer.
+ * We need to clear buffer manually here, so the invalid CRC will
+ * cause setting default environment as expected.
+ */
+ memset(env1_buf, 0x0, CONFIG_ENV_SIZE);
+ memset(env2_buf, 0x0, CONFIG_ENV_SIZE);
+
+ tmp_env1 = (env_t *)env1_buf;
+ tmp_env2 = (env_t *)env2_buf;
+
+ if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
+ printf("\n** Cannot find mtd partition \"%s\"\n",
+ CONFIG_ENV_UBI_PART);
+ set_default_env(NULL);
+ return -EIO;
+ }
+
+ if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, (void *)tmp_env1,
+ CONFIG_ENV_SIZE)) {
+ printf("\n** Unable to read env from %s:%s **\n",
+ CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
+ }
+
+ if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME_REDUND, (void *)tmp_env2,
+ CONFIG_ENV_SIZE)) {
+ printf("\n** Unable to read redundant env from %s:%s **\n",
+ CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME_REDUND);
+ }
+
+ env_import_redund((char *)tmp_env1, (char *)tmp_env2);
+
+ return 0;
+}
+#else /* ! CONFIG_SYS_REDUNDAND_ENVIRONMENT */
+static int env_ubi_load(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+
+ /*
+ * In case we have restarted u-boot there is a chance that buffer
+ * contains old environment (from the previous boot).
+ * If UBI volume is zero size, ubi_volume_read() doesn't modify the
+ * buffer.
+ * We need to clear buffer manually here, so the invalid CRC will
+ * cause setting default environment as expected.
+ */
+ memset(buf, 0x0, CONFIG_ENV_SIZE);
+
+ if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
+ printf("\n** Cannot find mtd partition \"%s\"\n",
+ CONFIG_ENV_UBI_PART);
+ set_default_env(NULL);
+ return -EIO;
+ }
+
+ if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, buf, CONFIG_ENV_SIZE)) {
+ printf("\n** Unable to read env from %s:%s **\n",
+ CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
+ set_default_env(NULL);
+ return -EIO;
+ }
+
+ env_import(buf, 1);
+
+ return 0;
+}
+#endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
+
+U_BOOT_ENV_LOCATION(ubi) = {
+ .location = ENVL_UBI,
+ .load = env_ubi_load,
+ .save = env_save_ptr(env_ubi_save),
+};
source "fs/cramfs/Kconfig"
+source "fs/yaffs2/Kconfig"
+
endmenu
if (fs_size(argv[3], &size) < 0)
return CMD_RET_FAILURE;
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return 0;
}
if (ep == argv[3] || *ep != '\0')
return CMD_RET_USAGE;
} else {
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str != NULL)
addr = simple_strtoul(addr_str, NULL, 16);
else
if (argc >= 5) {
filename = argv[4];
} else {
- filename = getenv("bootfile");
+ filename = env_get("bootfile");
if (!filename) {
puts("** No boot file defined **\n");
return 1;
}
puts("\n");
- setenv_hex("fileaddr", addr);
- setenv_hex("filesize", len_read);
+ env_set_hex("fileaddr", addr);
+ env_set_hex("filesize", len_read);
return 0;
}
return CMD_RET_FAILURE;
if (argc == 4)
- setenv(argv[3], uuid);
+ env_set(argv[3], uuid);
else
printf("%s\n", uuid);
info = fs_get_info(fs_type);
if (argc == 4)
- setenv(argv[3], info->name);
+ env_set(argv[3], info->name);
else
printf("%s\n", info->name);
err = ubifs_read(filename, (void *)(uintptr_t)addr, 0, size, &actread);
if (err == 0) {
- setenv_hex("filesize", actread);
+ env_set_hex("filesize", actread);
printf("Done\n");
}
--- /dev/null
+config YAFFS2
+ bool "YAFFS2 filesystem support"
+ help
+ This provides access to YAFFS2 filesystems. Yet Another Flash
+ Filesystem 2 is a filesystem designed specifically for NAND flash.
+ It incorporates bad-block management and ensures that device
+ writes are sequential regardless of filesystem activity.
EXPORT_FUNC(vprintf, int, vprintf, const char *, va_list)
EXPORT_FUNC(do_reset, int, do_reset, cmd_tbl_t *,
int , int , char * const [])
- EXPORT_FUNC(getenv, char *, getenv, const char*)
- EXPORT_FUNC(setenv, int, setenv, const char *, const char *)
+ EXPORT_FUNC(env_get, char *, env_get, const char*)
+ EXPORT_FUNC(env_set, int, env_set, const char *, const char *)
EXPORT_FUNC(simple_strtoul, unsigned long, simple_strtoul,
const char *, char **, unsigned int)
EXPORT_FUNC(strict_strtoul, int, strict_strtoul,
u32 link_port_map; /*linkup port map*/
};
+struct ahci_ops {
+ /**
+ * reset() - reset the controller
+ *
+ * @dev: Controller to reset
+ * @return 0 if OK, -ve on error
+ */
+ int (*reset)(struct udevice *dev);
+
+ /**
+ * port_status() - get the status of a SATA port
+ *
+ * @dev: Controller to reset
+ * @port: Port number to check (0 for first)
+ * @return 0 if detected, -ENXIO if nothing on port, other -ve on error
+ */
+ int (*port_status)(struct udevice *dev, int port);
+
+ /**
+ * scan() - scan SATA ports
+ *
+ * @dev: Controller to scan
+ * @return 0 if OK, -ve on error
+ */
+ int (*scan)(struct udevice *dev);
+};
+
+#define ahci_get_ops(dev) ((struct ahci_ops *)(dev)->driver->ops)
+
+/**
+ * sata_reset() - reset the controller
+ *
+ * @dev: Controller to reset
+ * @return 0 if OK, -ve on error
+ */
+int sata_reset(struct udevice *dev);
+
+/**
+ * sata_port_status() - get the status of a SATA port
+ *
+ * @dev: Controller to reset
+ * @port: Port number to check (0 for first)
+ * @return 0 if detected, -ENXIO if nothin on port, other -ve on error
+ */
+int sata_dm_port_status(struct udevice *dev, int port);
+
+/**
+ * sata_scan() - scan SATA ports
+ *
+ * @dev: Controller to scan
+ * @return 0 if OK, -ve on error
+ */
+int sata_scan(struct udevice *dev);
+
int ahci_init(void __iomem *base);
int ahci_reset(void __iomem *base);
unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
+ unsigned long env_valid; /* Environment valid? enum env_valid */
unsigned long ram_top; /* Top address of RAM used by U-Boot */
unsigned long relocaddr; /* Start address of U-Boot in RAM */
struct device_node *of_root;
#endif
struct jt_funcs *jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
+ char env_buf[32]; /* buffer for env_get() before reloc. */
#ifdef CONFIG_TRACE
void *trace_buff; /* The trace buffer */
#endif
IF_TYPE_SATA,
IF_TYPE_HOST,
IF_TYPE_SYSTEMACE,
+ IF_TYPE_NVME,
IF_TYPE_COUNT, /* Number of interface types */
};
*/
int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart);
+/**
+ * blk_get_if_type_name() - Get the name of an interface type
+ *
+ * @if_type: Interface type to check
+ * @return name of interface, or NULL if none
+ */
+const char *blk_get_if_type_name(enum if_type if_type);
+
+/**
+ * blk_common_cmd() - handle common commands with block devices
+ *
+ * @args: Number of arguments to the command (argv[0] is the command itself)
+ * @argv: Command arguments
+ * @if_type: Interface type
+ * @cur_devnump: Current device number for this interface type
+ * @return 0 if OK, CMD_RET_ERROR on error
+ */
+int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
+ int *cur_devnump);
+
#endif
* void function (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
*/
-#if defined(CONFIG_CMD_MEMORY) \
- || defined(CONFIG_CMD_I2C) \
- || defined(CONFIG_CMD_ITEST) \
- || defined(CONFIG_CMD_PCI) \
- || defined(CONFIG_CMD_PORTIO)
+#if defined(CONFIG_CMD_MEMORY) || \
+ defined(CONFIG_CMD_I2C) || \
+ defined(CONFIG_CMD_ITEST) || \
+ defined(CONFIG_CMD_PCI)
#define CMD_DATA_SIZE
extern int cmd_get_data_size(char* arg, int default_size);
#endif
void env_relocate (void);
int envmatch (uchar *, int);
-/* Avoid unfortunate conflict with libc's getenv() */
-#ifdef CONFIG_SANDBOX
-#define getenv uboot_getenv
-#endif
-char *getenv (const char *);
-int getenv_f (const char *name, char *buf, unsigned len);
-ulong getenv_ulong(const char *name, int base, ulong default_val);
+/**
+ * env_get() - Look up the value of an environment variable
+ *
+ * In U-Boot proper this can be called before relocation (which is when the
+ * environment is loaded from storage, i.e. GD_FLG_ENV_READY is 0). In that
+ * case this function calls env_get_f().
+ *
+ * @varname: Variable to look up
+ * @return value of variable, or NULL if not found
+ */
+char *env_get(const char *varname);
+
+/**
+ * env_get_f() - Look up the value of an environment variable (early)
+ *
+ * This function is called from env_get() if the environment has not been
+ * loaded yet (GD_FLG_ENV_READY flag is 0). Some environment locations will
+ * support reading the value (slowly) and some will not.
+ *
+ * @varname: Variable to look up
+ * @return value of variable, or NULL if not found
+ */
+int env_get_f(const char *name, char *buf, unsigned len);
+
+/**
+ * env_get_ulong() - Return an environment variable as an integer value
+ *
+ * Most U-Boot environment variables store hex values. For those which store
+ * (e.g.) base-10 integers, this function can be used to read the value.
+ *
+ * @name: Variable to look up
+ * @base: Base to use (e.g. 10 for base 10, 2 for binary)
+ * @default_val: Default value to return if no value is found
+ * @return the value found, or @default_val if none
+ */
+ulong env_get_ulong(const char *name, int base, ulong default_val);
/**
- * getenv_hex() - Return an environment variable as a hex value
+ * env_get_hex() - Return an environment variable as a hex value
*
* Decode an environment as a hex number (it may or may not have a 0x
* prefix). If the environment variable cannot be found, or does not start
* @varname: Variable to decode
* @default_val: Value to return on error
*/
-ulong getenv_hex(const char *varname, ulong default_val);
+ulong env_get_hex(const char *varname, ulong default_val);
/*
* Read an environment variable as a boolean
* Return -1 if variable does not exist (default to true)
*/
-int getenv_yesno(const char *var);
-int saveenv (void);
-int setenv (const char *, const char *);
-int setenv_ulong(const char *varname, ulong value);
-int setenv_hex(const char *varname, ulong value);
+int env_get_yesno(const char *var);
+
+/**
+ * env_set() - set an environment variable
+ *
+ * This sets or deletes the value of an environment variable. For setting the
+ * value the variable is created if it does not already exist.
+ *
+ * @varname: Variable to adjust
+ * @value: Value to set for the variable, or NULL or "" to delete the variable
+ * @return 0 if OK, 1 on error
+ */
+int env_set(const char *varname, const char *value);
+
+/**
+ * env_set_ulong() - set an environment variable to an integer
+ *
+ * @varname: Variable to adjust
+ * @value: Value to set for the variable (will be converted to a string)
+ * @return 0 if OK, 1 on error
+ */
+int env_set_ulong(const char *varname, ulong value);
+
+/**
+ * env_set_hex() - set an environment variable to a hex value
+ *
+ * @varname: Variable to adjust
+ * @value: Value to set for the variable (will be converted to a hex string)
+ * @return 0 if OK, 1 on error
+ */
+int env_set_hex(const char *varname, ulong value);
+
/**
- * setenv_addr - Set an environment variable to an address in hex
+ * env_set_addr - Set an environment variable to an address in hex
*
* @varname: Environment variable to set
* @addr: Value to set it to
* @return 0 if ok, 1 on error
*/
-static inline int setenv_addr(const char *varname, const void *addr)
+static inline int env_set_addr(const char *varname, const void *addr)
{
- return setenv_hex(varname, (ulong)addr);
+ return env_set_hex(varname, (ulong)addr);
}
#ifdef CONFIG_AUTO_COMPLETE
/* lib/net_utils.c */
#include <net.h>
-static inline struct in_addr getenv_ip(char *var)
+static inline struct in_addr env_get_ip(char *var)
{
- return string_to_ip(getenv(var));
+ return string_to_ip(env_get(var));
}
int pcmcia_init (void);
+++ /dev/null
-/*
- * Copyright 2007 Freescale Semiconductor, Inc.
- *
- * This file is licensed under the terms of the GNU General Public
- * License Version 2. This file is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef _CONFIG_CMD_ALL_H
-#define _CONFIG_CMD_ALL_H
-
-/*
- * Alphabetical list of all possible commands.
- */
-
-#define CONFIG_CMD_MFSL /* FSL support for Microblaze */
-#define CONFIG_CMD_ONENAND /* OneNAND support */
-#define CONFIG_CMD_PCI /* pciinfo */
-#define CONFIG_CMD_PCMCIA /* PCMCIA support */
-#define CONFIG_CMD_PORTIO /* Port I/O */
-#define CONFIG_CMD_REGINFO /* Register dump */
-#define CONFIG_CMD_REISER /* Reiserfs support */
-#define CONFIG_CMD_READ /* Read data from partition */
-#define CONFIG_CMD_SANDBOX /* sb command to access sandbox features */
-#define CONFIG_CMD_SAVES /* save S record dump */
-#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */
-#define CONFIG_CMD_TERMINAL /* built-in Serial Terminal */
-#define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */
-#define CONFIG_CMD_ZFS /* ZFS Support */
-
-#endif /* _CONFIG_CMD_ALL_H */
BOOT_TARGET_DEVICES_references_IDE_without_CONFIG_IDE
#endif
-#if defined(CONFIG_CMD_PCI_ENUM) || defined(CONFIG_DM_PCI)
+#if defined(CONFIG_DM_PCI)
#define BOOTENV_RUN_NET_PCI_ENUM "run boot_net_pci_enum; "
#define BOOTENV_SHARED_PCI \
"boot_net_pci_enum=pci enum\0"
* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
*/
-#ifdef CONFIG_BOOTARGS
+#ifdef CONFIG_USE_BOOTARGS
#define CONFIG_SET_BOOTARGS "setenv bootargs \'" CONFIG_BOOTARGS" \';"
#else
#define CONFIG_SET_BOOTARGS "setenv bootargs \'root=/dev/ram " \
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
-
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
-
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
#define CONFIG_LOADS_ECHO
#define CONFIG_SYS_LOADS_BAUD_CHANGE
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_ENV_SECT_SIZE 0x2000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE 16
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/* Command line configuration */
-#define CONFIG_CMD_PCI
-
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
# define CONFIG_MII 1
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ env/embedded.o(.text);
#ifdef NORFLASH_PS32BIT
# define CONFIG_ENV_OFFSET (0x8000)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
#define CONFIG_ENV_OFFSET 0x4000 /* Address of Environment Sector*/
#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/*
* Command line configuration.
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text)
+ env/embedded.o(.text)
/*
* BOOTP options
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
/*
* BOOTP options
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
/*
* BOOTP options
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ env/embedded.o(.text*);
/*
* BOOTP options
# define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
# define MCFFEC_TOUT_LOOP 50000
-# define CONFIG_BOOTARGS "root=/dev/mtdblock3 rw rootfstype=jffs2"
-
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
# ifndef CONFIG_SYS_DISCOVER_PHY
# define FECDUPLEX FULL
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*)
+ env/embedded.o(.text*)
/*-----------------------------------------------------------------------
* Cache Configuration
#define CONFIG_ENV_SECT_SIZE 0x2000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/*-----------------------------------------------------------------------
* Cache Configuration
#define CONFIG_ENV_SECT_SIZE 0x2000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/*-----------------------------------------------------------------------
* Cache Configuration
#define CONFIG_SYS_UART_PORT (0)
#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+#define LDS_BOARD_TEXT board/freescale/m54418twr/sbf_dram_init.o (.text*)
+
#undef CONFIG_WATCHDOG
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#define CONFIG_SYS_FEC0_PHYADDR 0
#define CONFIG_SYS_FEC1_PHYADDR 1
-
-#ifdef CONFIG_SYS_NAND_BOOT
-#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw rootfstype=jffs2 " \
- "mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro," \
- "-(jffs2) console=ttyS0,115200"
-#else
-#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=" \
- __stringify(CONFIG_SERVERIP) ":/tftpboot/" \
- __stringify(CONFIG_IPADDR) " ip=" \
- __stringify(CONFIG_IPADDR) ":" \
- __stringify(CONFIG_SERVERIP)":" \
- __stringify(CONFIG_GATEWAYIP)": " \
- __stringify(CONFIG_NETMASK) \
- "::eth0:off:rw console=ttyS0,115200"
-#endif
-
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_IPADDR 192.168.1.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT (0)
+#define LDS_BOARD_TEXT board/freescale/m54451evb/sbf_dram_init.o (.text*)
+
#undef CONFIG_WATCHDOG
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
# define MCFFEC_TOUT_LOOP 50000
-# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
# define CONFIG_ETHPRIME "FEC0"
# define CONFIG_IPADDR 192.162.1.2
# define CONFIG_NETMASK 255.255.255.0
#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT (0)
+#define LDS_BOARD_TEXT board/freescale/m54455evb/sbf_dram_init.o (.text*)
+
#undef CONFIG_WATCHDOG
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/* Command line configuration */
-#undef CONFIG_CMD_PCI
-
/* Network configuration */
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
# define MCFFEC_TOUT_LOOP 50000
# define CONFIG_HAS_ETH1
-# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
# define CONFIG_ETHPRIME "FEC0"
# define CONFIG_IPADDR 192.162.1.2
# define CONFIG_NETMASK 255.255.255.0
#undef CONFIG_HW_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-/* Command line configuration */
-#define CONFIG_CMD_PCI
-
#define CONFIG_SLTTMR
#define CONFIG_FSLDMAFEC
#ifdef CONFIG_CMD_USB
# define CONFIG_USB_OHCI_NEW
-# ifndef CONFIG_CMD_PCI
-# define CONFIG_CMD_PCI
-# endif
# define CONFIG_PCI_OHCI
# undef CONFIG_SYS_USB_OHCI_BOARD_INIT
#undef CONFIG_HW_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-/* Command line configuration */
-#define CONFIG_CMD_PCI
-
#define CONFIG_SLTTMR
#define CONFIG_FSLDMAFEC
#ifdef CONFIG_CMD_USB
# define CONFIG_USB_OHCI_NEW
-# ifndef CONFIG_CMD_PCI
-# define CONFIG_CMD_PCI
-# endif
/*# define CONFIG_PCI_OHCI*/
# define CONFIG_SYS_USB_OHCI_REGS_BASE 0x80041000
# define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
#define CONFIG_NETMASK 255.0.0.0
#define CONFIG_BOOTCOMMAND "run flashboot"
-#define CONFIG_BOOTARGS "ubi.mtd=4 root=ubi0:rootfs rw " \
- "rootfstype=ubifs rootflags=sync " \
- "console=ttyCPM0,115200N8 " \
- "ip=${ipaddr}:::${netmask}:mcr3k:eth0:off"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CONFIG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#define BOOTFLAG_COLD 0x01
#define BOOTFLAG_WARM 0x02
-/* Misc Settings */
-#define CONFIG_CMD_REGINFO
-
#endif /* __CONFIG_H */
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_PREBOOT "echo;" \
"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
"echo"
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-
#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114) \
|| defined(CONFIG_USB_STORAGE)
#define CONFIG_SUPPORT_VFAT
#if defined(CONFIG_SATA_SIL3114) || defined(CONFIG_USB_STORAGE)
#endif
-#ifdef CONFIG_PCI
- #define CONFIG_CMD_PCI
-#endif
-
/* Watchdog */
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_NETDEV "eth0"
-#ifdef CONFIG_MPC8349ITX
-#define CONFIG_HOSTNAME "mpc8349emitx"
-#else
-#define CONFIG_HOSTNAME "mpc8349emitxgp"
-#endif
-
/* Default path and filenames */
#define CONFIG_ROOTPATH "/nfsroot/rootfs"
#define CONFIG_BOOTFILE "uImage"
#endif
-#define CONFIG_BOOTARGS \
- "root=/dev/nfs rw" \
- " nfsroot=" __stringify(CONFIG_SERVERIP) ":" CONFIG_ROOTPATH \
- " ip=" __stringify(CONFIG_IPADDR) ":" \
- __stringify(CONFIG_SERVERIP) ":" \
- __stringify(CONFIG_GATEWAYIP) ":" \
- __stringify(CONFIG_NETMASK) ":" \
- CONFIG_HOSTNAME ":" CONFIG_NETDEV ":off" \
- " console=" __stringify(CONSOLE) "," __stringify(CONFIG_BAUDRATE)
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=" __stringify(CONSOLE) "\0" \
"netdev=" CONFIG_NETDEV "\0" \
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#ifdef CONFIG_MMC
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS1\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ecc=off\0" \
"netdev=eth0\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS1\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
-#if defined(CONFIG_ETHER_ON_FCC)
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyCPM\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#ifdef CONFIG_MMC
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0" \
"netdev=eth0\0" \
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_CMD_REGINFO
-
#define CONFIG_ULI526X
#ifdef CONFIG_ULI526X
#endif
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
#define CONFIG_WATCHDOG /* watchdog enabled */
#define CONFIG_SYS_WATCHDOG_FREQ 5000 /* Feed interval, 5s */
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 0x10000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#if defined(CONFIG_PCI1)
#define PCI_ENV \
"pcireg=md ${a}000 3; echo o;md ${a}c00 25; echo i; md ${a}da0 15;" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 0x10000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
#define CONFIG_CPU_SH7722 1
#define CONFIG_MIGO_R 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
-
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \
"netdev=eth0\0" \
#define CONFIG_LOADS_ECHO
#define CONFIG_SYS_LOADS_BAUD_CHANGE
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
* Environment
*/
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_DDR_ECC
-#define CONFIG_CMD_REGINFO
-
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
#endif /* CONFIG_TSEC_ENET */
-/*
- * General PCI
- * Addresses are mapped 1-1.
- */
-
#if defined(CONFIG_PCI)
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 400000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_PREBOOT "echo;" \
"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
"echo"
-#undef CONFIG_BOOTARGS
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=tqm834x\0" \
#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_CMD_PCI
-
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
/*
* USB
*/
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_MMC_SPI
-#define CONFIG_CMD_MMC_SPI
#endif
/* Misc Extra Settings */
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#define CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#if defined(CONFIG_DONGLE)
#define CONFIG_EXTRA_ENV_SETTINGS \
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
-#undef CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
-
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_MMC_OPS
#undef CONFIG_TIMER
#undef CONFIG_DM_USB
#endif
#ifndef __CONFIG_IGEP003X_H
#define __CONFIG_IGEP003X_H
-#define CONFIG_NAND
#include <configs/ti_am335x_common.h>
/* Clock defines */
#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL),-(UBI)"
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* UBI configuration */
#define CONFIG_SPL_UBI 1
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#undef CONFIG_CMD_EXT4
#undef CONFIG_CMD_EXT4_WRITE
-#undef CONFIG_CMD_MMC_SPI
#undef CONFIG_CMD_SPI
#define CONFIG_CMD_CACHE
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifndef CONFIG_SPL_USBETH_SUPPORT
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#endif
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_MMC_OPS
#undef CONFIG_TIMER
#endif
#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifndef CONFIG_SPL_USBETH_SUPPORT
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#endif
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* NAND boot config */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif /* __CONFIG_H */
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
/* SPL USB Support */
#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#endif
/* SPI */
-#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_QSPI_SEL_GPIO 48
#define CONFIG_SF_DEFAULT_SPEED 48000000
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00100000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#endif
#define NANDARGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
/* SPI */
-#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED 76800000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_ENV_SECT_SIZE 0x1000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/* memory map space for linux boot data */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
#define CONFIG_SYS_BAUDRATE_TABLE \
{9600, 19200, 38400, 57600, 115200}
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock2 " \
- "rootfstype=squashfs"
#define CONFIG_BOOTCOMMAND "sf probe;" \
"mtdparts default;" \
"bootm 0x9f650000"
#define CONFIG_SYS_BAUDRATE_TABLE \
{9600, 19200, 38400, 57600, 115200}
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock2 " \
- "rootfstype=squashfs"
#define CONFIG_BOOTCOMMAND "sf probe;" \
"mtdparts default;" \
"bootm 0x9f680000"
#define CONFIG_CPU_SH7723 1
#define CONFIG_AP325RXA 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,38400"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_SYS_TEXT_BASE 0x8BFC0000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC4,115200"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
/* PCI host support */
#undef CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
/* PCI networking support */
#define CONFIG_E1000_NO_NVM
#define CONFIG_USB_EHCI_TEGRA
/* PCI host support */
-#define CONFIG_CMD_PCI
/* PCI networking support */
#define CONFIG_E1000_NO_NVM
* SPL
*/
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
#define CONFIG_SPL_TEXT_BASE 0xA0000000
#define CONFIG_INITRD_TAG /* send initrd params */
#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
-#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
- __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
- " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
#define ACFG_CONSOLE_DEV ttySMX0
#define CONFIG_BOOTCOMMAND "run ubifsboot"
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_SDRAM
-
#define BOARD_LATE_INIT
-#define CONFIG_BOOTARGS ""
-
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_BOOTARGS \
- "console=ttyS4,115200n8" \
- " root=/dev/ram rw"
-
#define CONFIG_BOOTCOMMAND "bootm 20080000 20300000"
#define CONFIG_ENV_OVERWRITE
#endif
#endif
-/* default bootargs that are considered during boot */
-#define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\
- " loaderversion=$loaderversion"
-
/* default RAM address for user programs */
#define CONFIG_SYS_LOAD_ADDR 0x20000
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*)
+ env/embedded.o(.text*)
#if ENABLE_JFFS
/* JFFS Partition offset set */
"fatload mmc 0:1 0x21000000 ${dtb_name}; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "root=/dev/mmcblk0p2 rw rootwait"
+
#else
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256K(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
#ifdef CONFIG_SYS_USE_NANDFLASH
/* u-boot env in nand flash */
#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
#elif CONFIG_SYS_USE_DATAFLASH_CS1
#define CONFIG_BOOTCOMMAND "sf probe 0:1; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
#elif defined(CONFIG_SYS_USE_NANDFLASH)
#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_BOOTCOMMAND \
"fatload mmc 0:1 0x22000000 uImage; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
#elif CONFIG_SYS_USE_DATAFLASH_CS3
#define CONFIG_BOOTCOMMAND "sf probe 0:3; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
#else /* CONFIG_SYS_USE_NANDFLASH */
#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) "\
- "rw rootfstype=jffs2"
#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#elif CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_ENV_SIZE 0x4000
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "mtdparts=atmel_nand:" \
- "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 rw rootwait"
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \
"fatload mmc 0:1 0x72000000 zImage; " \
"bootz 0x72000000 - 0x71000000"
#define CONFIG_SYS_SPL_MALLOC_START 0x70080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MCKR_CSS 0x1302
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) "\
- "rw rootfstype=jffs2"
#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
"nand read 0x21000000 0x180000 0x80000; " \
"bootz 0x22000000 - 0x21000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256K(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
#else /* CONFIG_SYS_USE_MMC */
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "mtdparts=atmel_nand:" \
- "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 rw rootwait"
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_ENV_SIZE 0x4000
#endif
-#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
- "mtdparts=atmel_nand:" \
- "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 " \
- "rw rootfstype=ext4 rootwait"
-#else
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
-#endif
-
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MCKR_CSS 0x1302
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS3,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
#ifdef CONFIG_NAND
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00080000
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#define NANDARGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
/* General network SPL, both CPSW and USB gadget RNDIS */
#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"*/
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
-
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
/* Boot Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
#define CONFIG_BOOTCOMMAND "bootm"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/*
* PCI
*/
-#define CONFIG_CMD_PCI
/*
* Memory map
/* NAND */
#ifdef CONFIG_NAND
-#define CONFIG_CMD_SPL_NAND_OFS 0x080000 /* end of u-boot */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif /* CONFIG_NAND */
#endif /* CONFIG_SPL_OS_BOOT */
#if defined(CONFIG_SPI_BOOT)
/* McSPI IP block */
#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
#define CONFIG_SF_DEFAULT_SPEED 24000000
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
/* General parts of the framework, required. */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif /* ! __BUR_AM335X_COMMON_H__ */
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS ""
#define CONFIG_BOOTCOMMAND "run checkupdate; run checkbutton;"
#define CONFIG_BOOT_RETRY_TIME 60 /* continue boot after 60 s inactivity */
#define CONFIG_RESET_TO_RETRY
"echo Product: $product; " \
"gpio c 1; gpio c 2;"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
-#ifndef CONFIG_DRIVER_TI_EMAC
-#endif
-
/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0xc0000000
/* initial stack pointer in internal SRAM */
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
#ifndef __CONFIG_CHILIBOARD_H
#define __CONFIG_CHILIBOARD_H
-#define CONFIG_NAND
-
#include <configs/ti_am335x_common.h>
#define CONFIG_CONS_INDEX 1
#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_MMC_OPS
#undef CONFIG_TIMER
#undef CONFIG_DM_USB
#endif
#define CONFIG_SYS_SPD_BUS_NUM 3
/* SPI Flash support */
-#undef CONFIG_OMAP3_SPI
-
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED 48000000
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
#ifndef CONFIG_SPL_BUILD
/* SATA */
-#define CONFIG_CMD_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_LUN)
/* PCA9555 GPIO expander support */
#define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* I2C */
#define CONFIG_SYS_I2C
#define __CONFIG_CM_T335_H
#define CONFIG_CM_T335
-#define CONFIG_NAND
#include <configs/ti_am335x_common.h>
#undef CONFIG_SPI
-#undef CONFIG_OMAP3_SPI
#undef CONFIG_BOOTCOUNT_LIMIT
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#define CONFIG_SYS_I2C_EEPROM_BUS 0
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* Network. */
#define CONFIG_PHY_ATHEROS
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* un-assigned: (using dtb) */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* GPIO pin + bank to pin ID mapping */
* First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
*/
#define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x26
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} }
#endif /* CONFIG_SPL_BUILD */
#define CONFIG_BMP_16BPP
#define CONFIG_SCF0403_LCD
-#define CONFIG_OMAP3_SPI
-
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* NAND boot config */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_BMP_16BPP
#define CONFIG_SCF0403_LCD
-#define CONFIG_OMAP3_SPI
-
/* EEPROM */
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#endif
/* NAND support */
-#define CONFIG_NAND
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_ENV_OFFSET (768 * 1024)
#define CONFIG_ENV_SPI_MAX_HZ 48000000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \
"fdtaddr=0x81200000\0" \
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
/*
* BOOTP options
#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
enter a valid image address in flash */
-#define CONFIG_BOOTARGS " " /* default bootargs that are
-considered during boot */
-
/* User network settings */
#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
"bootm 0xa0000000; " \
"fi; " \
"bootm 0xc0000;"
-#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
#define CONFIG_TIMESTAMP
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ef000
-#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sda2 ro quiet"
#define CONFIG_BOOTCOMMAND \
"load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \
"load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;" \
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#ifndef CONFIG_TRAILBLAZER
-
-#define CONFIG_CMD_REGINFO
-
/*
* Board initialisation callbacks
*/
* Commands configuration
*/
#define CONFIG_CMD_I2C
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_SCSI
#define CONFIG_CMD_SPI
/* SPI NOR flash default params, used by sf commands */
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS \
- "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
#define CONFIG_EXTRA_ENV_SETTINGS "hwconfig=dsp:wake=yes"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
#define CONFIG_SPL_MAX_FOOTPRINT 32768
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_BUS 1
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_TEXT_BASE 0x00800000
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-/*
- * Commands configuration
- */
-#define CONFIG_CMD_PCI
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
/* valid baudrates */
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
* Command line configuration.
*/
-#ifdef CONFIG_DBAU1550
-
-#undef CONFIG_CMD_PCMCIA
-#endif
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS0,115200n8"
#define CONFIG_LOADADDR 0x80008000
/*
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
-#define CONFIG_NAND
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
/* SPI */
#undef CONFIG_SPI
-#undef CONFIG_OMAP3_SPI
/* I2C */
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
/* SPL OS boot options */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
-#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
- 0x400000)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ef000
-#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sda1 ro quiet"
#define CONFIG_BOOTCOMMAND \
"load scsi 0:1 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \
"load scsi 0:1 04000000 /boot/initrd.img-${kernel-ver}-generic;" \
#define CONFIG_PHY_TI
/* SPI */
-#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED 76800000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
/* Enable that for switching of boot partitions */
/* Disabled by default as some sub-commands can brick eMMC */
/*#define CONFIG_SUPPORT_EMMC_BOOT */
-#define CONFIG_CMD_TFTP
/* Partition table support */
#define HAVE_BLOCK_DEVICE /* Needed for partition commands */
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-/* Environment - Boot*/
-#define CONFIG_BOOTARGS "console=ttyMSM0,115200n8"
-
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 1) \
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
#define CONFIG_PCI_MVEBU
#define CONFIG_PCI_SCAN_SHOW
#endif
/* Default Environment */
#define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200"
#define CONFIG_LOADADDR 0x80000
#undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */
#define CONFIG_PREBOOT "usb start; sf probe"
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_TAG 1
#define CONFIG_INITRD_TAG 1
#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_BOOTARGS "root=/dev/nfs console=ttyAM0,115200 ip=dhcp"
#define CONFIG_BOOTFILE "edb93xx.img"
#define CONFIG_SYS_LDSCRIPT "board/cirrus/edb93xx/u-boot.lds"
#include <asm/ibmpc.h>
/* Boot */
-#define CONFIG_CMD_ZBOOT
#define CONFIG_BOOTCOMMAND "run bootcmd"
/* DISK Partition support */
#define CONFIG_SYS_MEMTEST_END 0x01000000
/* Environment */
-#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 0
#define CONFIG_ENV_SIZE (64 * 1024)
#define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff
#define CONFIG_SYS_SPL_MALLOC_START 0x00040000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
-#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/orion5x/u-boot-spl.lds"
#define CONFIG_SYS_UBOOT_BASE 0xfff90000
#define CONFIG_SYS_UBOOT_START 0x00800000
#define CONFIG_SYS_TEXT_BASE 0x00800000
#include <configs/x86-common.h>
-#undef CONFIG_CMD_SF_TEST
-
#undef CONFIG_TPM_TIS_BASE_ADDRESS
#undef CONFIG_SCSI_AHCI
#define CONFIG_ESPT 1
#define __LITTLE_ENDIAN 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_ENV_SPI_MAX_HZ 15000000
#ifndef MINIMAL_LOADER
-#define CONFIG_CMD_REISER
-#define CONFIG_CMD_SAVES
#endif
/* NAND flash */
#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
"sf read 0x22000000 0xc6000 0x294000; " \
"bootm 0x22000000"
-#if defined(CONFIG_CMD_NAND)
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- MTDPARTS_DEFAULT \
- " rw rootfstype=jffs2"
-#endif
/* Misc. u-boot settings */
#define CONFIG_SYS_CBSIZE 256
/* SD/MMC configuration */
#define CONFIG_MMC_DEFAULT_DEV 0
-#undef CONFIG_CMD_ONENAND
-
/* TIZEN THOR downloader support */
-#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
#ifdef FTRACE
#define CONFIG_TRACE
-#define CONFIG_CMD_TRACE
#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
#define CONFIG_TRACE_EARLY
#define CONFIG_SUPPORT_EMMC_BOOT
/* specific .lds file */
-#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
/* Boot Argument Buffer Size */
/* memtest works on */
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
-#undef CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
/* Falcon Mode */
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - NAND support: args@17MB kernel@18MB */
-#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
/*
* PCI express
*/
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCI_FIXUP_DEV
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
-
#define CONFIG_USB_DEV_PULLUP_GPIO 33
/* USB VBUS GPIO 3 */
* Defines where the kernel and FDT will be put in RAM
*/
-/* Assume we boot with root on the seventh partition of eMMC */
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw"
-
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 1) \
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS0,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
#define CONFIG_PREBOOT "echo;" \
"echo Type \\\"run nfsboot\\\" " \
"to mount root filesystem over NFS;echo"
-#undef CONFIG_BOOTARGS
#define CONFIG_BOOTCOMMAND "run boot_cramfs"
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
* and some padding thus 'our' max size is really 0x00908000 - 0x00918000
* or 64KB
*/
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x00908000
#define CONFIG_SPL_MAX_SIZE 0x10000
#define CONFIG_SPL_STACK 0x0091FFB8
/*
* Command line configuration.
*/
-#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAM0 console=tty"
#define CONFIG_BOOTCOMMAND ""
/* Flash settings */
* PCI definitions
*/
-#define CONFIG_CMD_PCI
-
#define CONFIG_TULIP
#define CONFIG_EEPRO100
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
/*
* Command line configuration.
*/
-#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
#define CONFIG_BOOTCOMMAND "tftpboot ; bootm"
#define CONFIG_SERVERIP 192.168.1.100
#define CONFIG_IPADDR 192.168.1.104
"nand write c0000100 180000 20000\0" \
"\0"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-ipam390.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
#define CONFIG_SPL_MAX_SIZE 0x20000
GENERATED_GBL_DATA_SIZE)
/* add FALCON boot mode */
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
#define CONFIG_SYS_SPL_ARGS_ADDR LINUX_BOOT_PARAM_ADDR
-#define CONFIG_CMD_SPL_NAND_OFS 0x00180000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400
/* GPIO support */
#define CONFIG_DA8XX_GPIO
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
/*
* Console
*/
#undef CONFIG_WATCHDOG /* disable platform specific watchdog */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
#endif
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
/*
* additionnal command line configuration.
*/
-#define CONFIG_CMD_PCI
/* we don't need flash support */
#undef CONFIG_FLASH_CFI_MTD
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200"
-
#undef CONFIG_SHOW_BOOT_PROGRESS
/* MEMORY */
/*
* Default environment variables
*/
-#define CONFIG_BOOTARGS "console=ttyS0,115200"
-
#define CONFIG_BOOTCOMMAND \
"dhcp && run netconsole; " \
"if run usbload || run diskload; then bootm; fi"
"loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
"bootscript=source ${bootscraddr}\0" \
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
--- /dev/null
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIGS_LION_RK3368_H
+#define __CONFIGS_LION_RK3368_H
+
+#include <configs/rk3368_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define KERNEL_LOAD_ADDR 0x280000
+#define DTB_LOAD_ADDR 0x5600000
+#define INITRD_LOAD_ADDR 0x5bf0000
+#define CONFIG_ENV_SIZE 0x2000
+
+#endif
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
"$kernel_start $kernel_size && "\
"bootm $kernel_load"
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI_FSL
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_CMD_SCSI
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_CMD_SCSI
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_FSL_PBL_RCW \
board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_FSL_ESDHC
/* SATA */
-#define CONFIG_CMD_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#define CONFIG_CMD_PING
board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg
#endif
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#define CONFIG_CMDLINE_TAG
board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg
#endif
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#ifdef CONFIG_SECURE_BOOT
/*
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#define CONFIG_CMDLINE_TAG
"&& esbc_halt; run nor_bootcmd;"
#endif
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0"
-
/*
* Miscellaneous configurable options
*/
/* SD boot SPL */
#ifdef CONFIG_SD_BOOT
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x10000000
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SPL_PBL_PAD
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
#ifdef CONFIG_PCI
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#endif
#define CONFIG_BOOTCOMMAND "run distro_bootcmd; env exists secureboot" \
"&& esbc_halt; run nor_bootcmd;"
#endif
-
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 " \
- MTDPARTS_DEFAULT
#endif
/* Monitor Command Prompt */
#ifndef SPL_NO_SATA
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
-#define CONFIG_CMD_SCSI
#ifndef CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT2
#endif
/* SD boot SPL */
#ifdef CONFIG_SD_BOOT
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SPL_PBL_PAD
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
/* Command line configuration */
"sf probe && sf read $load_addr " \
"$kernel_start $kernel_size && bootm $load_addr#$board\0"
-
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 " \
- MTDPARTS_DEFAULT
#endif
/* Monitor Command Prompt */
#define CONFIG_SYS_TEXT_BASE 0x20100000
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
-#define CONFIG_ENV_SECT_SIZE 0x10000
+#define CONFIG_ENV_SECT_SIZE 0x40000
#endif
#define CONFIG_SUPPORT_RAW_INITRD
"mcinitcmd=fsl_mc start mc 0x580a00000" \
" 0x580e00000 \0"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 " \
- "ramdisk_size=0x2000000 default_hugepagesz=2m" \
- " hugepagesz=2m hugepages=256"
#ifdef CONFIG_SD_BOOT
#define CONFIG_BOOTCOMMAND "mmc read 0x80200000 0x6800 0x800;"\
" fsl_mc apply dpl 0x80200000 &&" \
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 0x16000
#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
/* MMC */
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
/* MMC */
"env exists secureboot && esbc_halt; "
#endif
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0600 " \
- "ramdisk_size=0x2000000 default_hugepagesz=2m" \
- " hugepagesz=2m hugepages=256"
-
/* MAC/PHY configuration */
#ifdef CONFIG_FSL_MC_ENET
#define CONFIG_PHYLIB_10G
*/
#define CONFIG_LOADADDR 0x00800000
#define CONFIG_BOOTCOMMAND "run bootcmd_${bootsource}"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/sda2"
#if defined(CONFIG_LSXHL)
#define CONFIG_FDTFILE "kirkwood-lsxhl.dtb"
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttymxc1,115200"
#define CONFIG_LOADADDR 0x70800000
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#include "at91-sama5_common.h"
-#undef CONFIG_BOOTARGS
#define CONFIG_SYS_USE_SERIALFLASH 1
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_INITRD_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyS3,115200"
#define CONFIG_LOADADDR 0x20800000
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
#define CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
/*
* Commands
*/
-#define CONFIG_CMD_PCI
#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
*/
/* **** PISMO SUPPORT *** */
-#define CONFIG_NAND
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_MFSL
-
-#if defined(FLASH)
-# if !defined(RAMENV)
-# define CONFIG_CMD_SAVES
-# endif
-
-#else
-#if defined(SPIFLASH)
-
-# if !defined(RAMENV)
-# define CONFIG_CMD_SAVES
-# endif
-#endif
-#endif
-
#if defined(CONFIG_CMD_JFFS2)
# define CONFIG_MTD_PARTITIONS
#endif
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0
-#define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_HOSTNAME XILINX_BOARD_NAME
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
#endif
/* SPL part */
-#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
-
#ifdef CONFIG_SYS_FLASH_BASE
# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
#endif
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
/* Supported commands */
/* Default environment variables */
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_BOOTFILE "/boot/zImage"
#define CONFIG_LOADADDR 0x8E000000
#define CONFIG_CPU_SH7720 1
#define CONFIG_MS7720SE 1
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_PCMCIA
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_BOOTFILE "/boot/zImage"
#define CONFIG_LOADADDR 0x8E000000
#define CONFIG_CPU_SH7722 1
#define CONFIG_MS7722SE 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
*/
#define CONFIG_CONS_SCIF1 1
-#define CONFIG_BOOTARGS "console=ttySC0,38400"
#define CONFIG_ENV_OVERWRITE 1
/* SDRAM */
*/
#ifdef CONFIG_PCIE_DW_MVEBU
#define CONFIG_E1000
-#define CONFIG_CMD_PCI
#endif
#endif /* _CONFIG_MVEBU_ARMADA_8K_H */
#define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
#define CONFIG_SPL_TEXT_BASE 0x87dc0000
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
/* Falcon Mode */
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
#endif
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
/* SPL */
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
/* Memory sizes */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-#ifdef ONENAND_SUPPORT
-
-#define CONFIG_CMD_ONENAND /* ONENAND support */
-
-#endif
-
-#define CONFIG_OMAP3_SPI
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#include "mx6_common.h"
/* U-Boot Commands */
-#define CONFIG_CMD_PCI
/* U-Boot general configurations */
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttymxc1,115200 "
#define CONFIG_BOOTCOMMAND "run distro_bootcmd ; run net_nfs"
#define CONFIG_HOSTNAME novena
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyARC0,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
/* Console configuration */
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
#define CONFIG_USB_FUNCTION_THOR
-#define CONFIG_CMD_THOR_DOWNLOAD
/* UMS */
#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
-#define CONFIG_OMAP3_SPI
-
/* Defines for SPL */
#define CONFIG_SPL_OMAP3_ID_NAND
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-#define CONFIG_NAND
-
#include <configs/ti_omap3_common.h>
#define CONFIG_MISC_INIT_R
/* Probe all devices */
#define CONFIG_SYS_I2C_NOPROBES { {0x0, 0x0} }
-#define CONFIG_NAND
-
/*
* TWL4030
*/
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
-#define CONFIG_OMAP3_SPI
-
/* Defines for SPL */
#define CONFIG_SPL_OMAP3_ID_NAND
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* env defaults */
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __OMAP3EVM_CONFIG_H
-#define __OMAP3EVM_CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-/* ----------------------------------------------------------------------------
- * Supported U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_LONGHELP
-
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Add auto-completion support */
-#define CONFIG_AUTO_COMPLETE
-
-/* ----------------------------------------------------------------------------
- * Supported hardware
- * ----------------------------------------------------------------------------
- */
-
-/* SPL */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-/* Partition tables */
-
-/* USB
- *
- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
- */
-#define CONFIG_USB_OMAP3
-#define CONFIG_USB_MUSB_HCD
-/* #define CONFIG_USB_MUSB_UDC */
-
-/* NAND SPL */
-#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
- 10, 11, 12, 13}
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-
-/*
- * High level configuration options
- */
-
-#define CONFIG_SDRC /* The chip has SDRC controller */
-
-/*
- * Clock related definitions
- */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-
-/* Size of environment - 128KB */
-#define CONFIG_ENV_SIZE (128 << 10)
-
-/* Size of malloc pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
-/*
- * Physical Memory Map
- * Note 1: CS1 may or may not be populated
- * Note 2: SDRAM size is expected to be at least 32MB
- */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-
-/* Limits for memtest */
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
- 0x01F00000) /* 31MB */
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
-
-/* -----------------------------------------------------------------------------
- * Hardware drivers
- * -----------------------------------------------------------------------------
- */
-
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
+#include <configs/ti_omap3_common.h>
/*
- * PISMO support
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
*/
-/* Monitor at start of flash - Reserve 2 sectors */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-
-/* Start location & size of environment */
-#define ONENAND_ENV_OFFSET 0x260000
-#define SMNAND_ENV_OFFSET 0x260000
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-
-/*
- * NAND
- */
-/* Physical address to access NAND */
-#define CONFIG_SYS_NAND_ADDR NAND_BASE
-
-/* Physical address to access NAND at CS0 */
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-
-/* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-/* Timeout values (in ticks) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
- CONFIG_SYS_MAX_NAND_DEVICE)
-
-#define CONFIG_SYS_JFFS2_MEM_NAND
-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
-
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV "nand0"
-/* Start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET 0x680000
-/* Size of jffs2 partition */
-#define CONFIG_JFFS2_PART_SIZE 0xf980000
-
-/*
- * USB
- */
-#ifdef CONFIG_USB_OMAP3
-
-#ifdef CONFIG_USB_MUSB_HCD
-
-#ifdef CONFIG_USB_KEYBOARD
-#define CONFIG_SYS_USB_EVENT_POLL
-#define CONFIG_PREBOOT "usb start"
-#endif /* CONFIG_USB_KEYBOARD */
-
-#endif /* CONFIG_USB_MUSB_HCD */
-
-#ifdef CONFIG_USB_MUSB_UDC
-/* USB device configuration */
-#define CONFIG_USB_DEVICE
-#define CONFIG_USB_TTY
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID 0x0451
-#define CONFIG_USBD_PRODUCTID 0x5678
-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME "EVM"
-#endif /* CONFIG_USB_MUSB_UDC */
-
-#endif /* CONFIG_USB_OMAP3 */
-
-/* ----------------------------------------------------------------------------
- * U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
+#define CONFIG_SPL_FRAMEWORK
#define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
-/* Size of Console IO buffer */
-#define CONFIG_SYS_CBSIZE 512
-
-/* Size of print buffer */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Size of bootarg buffer */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-#define CONFIG_BOOTFILE "uImage"
+/* Override OMAP3 serial console configuration */
+#undef CONFIG_CONS_INDEX
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_SYS_NS16550_REG_SIZE
+#else /* !CONFIG_SPL_BUILD */
+#define CONFIG_SYS_NS16550_REG_SIZE (-1)
+#endif /* CONFIG_SPL_BUILD */
-/*
- * NAND / OneNAND
- */
-#if defined(CONFIG_CMD_NAND)
+/* NAND */
+#if defined(CONFIG_NAND)
+#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_FLASH_BASE NAND_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_BCH
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
+#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
+#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
+#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
+#endif /* CONFIG_NAND */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-#endif
+#define CONFIG_USB_OMAP3
-#if !defined(CONFIG_ENV_IS_NOWHERE)
-#if defined(CONFIG_CMD_NAND)
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
-#endif
-#endif /* CONFIG_ENV_IS_NOWHERE */
+/* MUSB */
+#define CONFIG_USB_MUSB_OMAP2PLUS
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
-#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
+/* USB EHCI */
+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
+/* SMSC911x Ethernet */
#if defined(CONFIG_CMD_NET)
-
-/* Ethernet (SMSC9115 from SMSC9118 family) */
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE 0x2C000000
-
-/* BOOTP fields */
-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
-#define CONFIG_BOOTP_GATEWAY 0x00000002
-#define CONFIG_BOOTP_HOSTNAME 0x00000004
-#define CONFIG_BOOTP_BOOTPATH 0x00000010
-
+#define CONFIG_SMC911X_BASE 0x2C000000
#endif /* CONFIG_CMD_NET */
-/* Support for relocation */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-
-/* -----------------------------------------------------------------------------
- * Board specific
- * -----------------------------------------------------------------------------
- */
-
-/* Uncomment to define the board revision statically */
-/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
-
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
- CONFIG_SPL_TEXT_BASE)
-
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
-
-#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
-/* -----------------------------------------------------------------------------
- * Default environment
- * -----------------------------------------------------------------------------
- */
+/* Environment */
+#define CONFIG_PREBOOT "usb start"
#define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"loadaddr=0x82000000\0" \
"usbtty=cdc_acm\0" \
"mmcdev=0\0" \
"console=ttyO0,115200n8\0" \
"mmcargs=setenv bootargs console=${console} " \
+ "${optargs} " \
"root=/dev/mmcblk0p2 rw " \
- "rootfstype=ext3 rootwait\0" \
+ "rootfstype=ext4 rootwait\0" \
"nandargs=setenv bootargs console=${console} " \
- "root=/dev/mtdblock4 rw " \
- "rootfstype=jffs2\0" \
+ "${optargs} " \
+ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
+ "rootfstype=ubifs rootwait\0" \
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
+ "loaduimage=setenv bootfile uImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+ "loadzimage=setenv bootfile zImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
+ "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
+ "mmcboot=echo Booting ${bootfile} from mmc ...; " \
+ "run mmcargs; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0" \
+ "mmcbootz=echo Booting ${bootfile} from mmc ...; " \
"run mmcargs; " \
- "bootm ${loadaddr}\0" \
- "nandboot=echo Booting from nand ...; " \
+ "bootz ${loadaddr} - ${fdtaddr}\0" \
+ "nandboot=echo Booting uImage from nand ...; " \
"run nandargs; " \
- "onenand read ${loadaddr} 280000 400000; " \
- "bootm ${loadaddr}\0" \
+ "nand read ${loadaddr} kernel; " \
+ "nand read ${fdtaddr} dtb; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
+ "if run loadzimage && run loaddtb; then " \
+ "run mmcbootz; fi; " \
+ "if run loaduimage && run loaddtb; then " \
+ "run mmcboot; fi; " \
+ "run nandboot; " \
"fi; " \
"else run nandboot; fi"
-#endif /* __OMAP3EVM_CONFIG_H */
+#endif /* __CONFIG_H */
#define __IGEP00X0_H
#define CONFIG_NR_DRAM_BANKS 2
-#define CONFIG_NAND
#include <configs/ti_omap3_common.h>
#include <asm/mach-types.h>
#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME "IGEP"
-#define CONFIG_CMD_ONENAND
-
#ifndef CONFIG_SPL_BUILD
/* Environment */
* DM support in SPL
*/
#undef CONFIG_DM_MMC
-#undef CONFIG_DM_MMC_OPS
#undef OMAP_HSMMC_USE_GPIO
/* select serial console configuration for SPL */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
#define __CONFIG_H
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define CONFIG_NAND
#include <configs/ti_omap3_common.h>
/*
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
#define __CONFIG_H
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define CONFIG_NAND
/* override base for compatibility with MLO the device ships with */
#define CONFIG_SYS_TEXT_BASE 0x80008000
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_NAND
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap.h>
#if defined(CONFIG_CMD_NAND)
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif
/* Required support for the TCA642X GPIO we have on the uEVM */
#define CONFIG_TCA642X
-#define CONFIG_CMD_TCA642X
#define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4
#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
"boot_fit=0\0" \
"console=ttyS2,115200n8\0"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
#define CONFIG_SPL_MAX_FOOTPRINT 32768
#define ACFG_CONSOLE_DEV ttymxc0
#define CONFIG_SYS_AUTOLOAD "no"
#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
-#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," __stringify(CONFIG_BAUDRATE)
#define CONFIG_PREBOOT "run check_env"
#define CONFIG_BOOTCOMMAND "run emmcboot"
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
-#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
/* I2C Configs */
#define CONFIG_SYS_I2C
#endif
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_CMD_PCI
-
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
/*
* USB
*/
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#define CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#ifdef __SW_BOOT_NOR
#define __NOR_RST_CMD \
norboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NOR 1; \
#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_CMD_PCI
-
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
/*
* USB
*/
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#define CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
/* PCI host support */
-#define CONFIG_CMD_PCI
#include "tegra-common-post.h"
#endif
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
/* CPU */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifdef CONFIG_SPI_BOOT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#ifndef __CONFIG_PENGWYN_H
#define __CONFIG_PENGWYN_H
-#define CONFIG_NAND
#define CONFIG_SERIAL1
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* un-assigned */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/*
/* CPSW support */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#endif /* ! __CONFIG_PENGWYN_H */
#define CONFIG_PHY_RESET_DELAY 1000
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif /* __CONFIG_PEPPER_H */
--- /dev/null
+/*
+ * Copyright (C) Stefano Babic <sbabic@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+
+#ifndef __PCM058_CONFIG_H
+#define __PCM058_CONFIG_H
+
+#include <config_distro_defaults.h>
+
+#ifdef CONFIG_SPL
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#include "imx6_spl.h"
+#endif
+
+#include "mx6_common.h"
+
+/* Thermal */
+#define CONFIG_IMX_THERMAL
+
+/* Serial */
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART4_BASE
+#define CONSOLE_DEV "ttymxc3"
+
+/* Early setup */
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
+
+/* Ethernet */
+#define CONFIG_MII
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_ETHPRIME "FEC"
+#define CONFIG_FEC_MXC_PHYADDR 3
+
+/* SPI Flash */
+#define CONFIG_MXC_SPI
+#define CONFIG_SF_DEFAULT_BUS 2
+#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+
+/* I2C Configs */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 0 */
+#define CONFIG_SYS_I2C_SPEED 100000
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_CMD_NAND
+/* Enable NAND support */
+#define CONFIG_CMD_NAND_TRIMFFS
+#define CONFIG_NAND_MXS
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0x40000000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#endif
+
+/* DMA stuff, needed for GPMI/MXS NAND support */
+#define CONFIG_APBH_DMA
+#define CONFIG_APBH_DMA_BURST
+#define CONFIG_APBH_DMA_BURST8
+
+/* Filesystem support */
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_MTD_DEVICE
+#define MTDIDS_DEFAULT "nand0=gpmi-nand"
+#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:-(nand);" \
+ "spi2.0:1024k(bootloader),64k(env1),64k(env2),-(rescue)"
+
+/* Various command support */
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* MMC Configs */
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_USDHC_NUM 2
+
+/* Environment organization */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE (16 * 1024)
+#define CONFIG_ENV_OFFSET (1024 * SZ_1K)
+#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
+#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
+ CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
+
+#ifdef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET (0x1E0000)
+#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
+#endif
+
+/* Default environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "addcons=setenv bootargs ${bootargs} " \
+ "console=${console},${baudrate}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:" \
+ "${netmask}:${hostname}:${netdev}:off\0" \
+ "addmisc=setenv bootargs ${bootargs} ${miscargs}\0" \
+ "addmtd=run mtdnand;run mtdspi;" \
+ "setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "mtdnand=setenv mtdparts mtdparts=gpmi-nand:" \
+ "40m(Kernels),400m(root),-(nand)\0" \
+ "mtdspi=setenv mtdparts ${mtdparts}" \
+ "';spi2.0:1024k(bootloader)," \
+ "64k(env1),64k(env2),-(rescue)'\0" \
+ "bootcmd=if test -n ${rescue};" \
+ "then run swupdate;fi;run nandboot;run swupdate\0" \
+ "bootfile=uImage\0" \
+ "bootimage=uImage\0" \
+ "console=ttymxc3\0" \
+ "fdt_addr_r=0x18000000\0" \
+ "fdt_file=pfla02.dtb\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+ "miscargs=panic=1 quiet\0" \
+ "mmcargs=setenv bootargs root=${mmcroot} rw rootwait\0" \
+ "mmcboot=if run mmcload;then " \
+ "run mmcargs addcons addmisc;" \
+ "bootm;fi\0" \
+ "mmcload=mmc rescan;" \
+ "load mmc 0:${mmcpart} ${kernel_addr_r} boot/fitImage\0"\
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p1\0" \
+ "ubiroot=1\0" \
+ "nandargs=setenv bootargs ubi.mtd=1 " \
+ "root=ubi0:rootfs${ubiroot} rootfstype=ubifs\0" \
+ "nandboot=run mtdnand;ubi part nand0,0;" \
+ "ubi readvol ${kernel_addr_r} kernel${ubiroot};" \
+ "run nandargs addip addcons addmtd addmisc;" \
+ "bootm ${kernel_addr_r}\0" \
+ "net_nfs=tftp ${kernel_addr_r} ${board_name}/${bootfile};" \
+ "tftp ${fdt_addr_r} ${board_name}/${fdt_file};" \
+ "run nfsargs addip addcons addmtd addmisc;" \
+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
+ "net_nfs_fit=tftp ${kernel_addr_r} ${board_name}/${fitfile};" \
+ "run nfsargs addip addcons addmtd addmisc;" \
+ "bootm ${kernel_addr_r}\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs" \
+ " nfsroot=${serverip}:${nfsroot},v3 panic=1\0" \
+ "swupdate=setenv bootargs root=/dev/ram;" \
+ "run addip addcons addmtd addmisc;" \
+ "sf probe;" \
+ "sf read ${kernel_addr_r} 120000 600000;" \
+ "sf read 14000000 730000 800000;" \
+ "bootm ${kernel_addr_r} 14000000\0"
+
+#endif
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_ENV_SIZE 0x4000
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mmcblk0p2 rw rootwait"
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x210000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
#elif defined(CONFIG_SYS_USE_NANDFLASH) /* CONFIG_SYS_USE_NANDFLASH */
#define CONFIG_ENV_OFFSET_REDUND 0x80000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro," \
- "256k(uboot)ro,128k(env1)ro," \
- "128k(env2)ro,2M(linux),-(root) " \
- "rw rootfstype=jffs2"
#elif defined (CONFIG_SYS_USE_FLASH)
"nand:-(nand)"
#define CONFIG_CON_ROT "fbcon=rotate:3 "
-#define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 " CONFIG_CON_ROT
#define CONFIG_EXTRA_ENV_SETTINGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) "\
- "rw rootfstype=jffs2"
#elif defined(CONFIG_SYS_USE_NANDFLASH) /* CFG_USE_NANDFLASH */
#define CONFIG_ENV_OFFSET_REDUND 0x80000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:" \
- "128k(bootstrap)ro," \
- "256k(uboot)ro," \
- "128k(env1)ro," \
- "128k(env2)ro," \
- "2M(linux)," \
- "-(root) " \
- "rw rootfstype=jffs2"
#elif defined(CONFIG_SYS_USE_FLASH) /* CFG_USE_FLASH */
#define CONFIG_ROOTPATH "/ronetix/rootfs"
#define CONFIG_CON_ROT "fbcon=rotate:3 "
-#define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 "\
- CONFIG_CON_ROT
#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=nand"
#define MTDPARTS_DEFAULT \
#define CONFIG_ENV_OFFSET_REDUND 0x80000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm"
-#define CONFIG_BOOTARGS "fbcon=rotate:3 console=tty0 " \
- "console=ttyS0,115200 " \
- "root=/dev/mtdblock4 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro," \
- "256k(uboot)ro,1664k(env)," \
- "2M(linux)ro,-(root) rw " \
- "rootfstype=jffs2"
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_MISC_INIT_R
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
#define CONFIG_MISC_INIT_R
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
#ifndef __QEMU_PPCE500_H
#define __QEMU_PPCE500_H
-#define CONFIG_CMD_REGINFO
-
#undef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC3,115200"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_DISPLAY_BOARDINFO
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_SH_ZIMAGEBOOT
-
/* SCIF */
#define CONFIG_CONS_SCIF1 1
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_ENV_OVERWRITE 1
/* SDRAM */
#define CONFIG_DISPLAY_BOARDINFO
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_PCI
-
#define CONFIG_CONS_SCIF0 1
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_SDRAM
-
/* Support File sytems */
#define CONFIG_SUPPORT_VFAT
#define CONFIG_FS_EXT4
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_BOOTARGS ""
-
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_ARCH_CPU_INIT
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0"
-#define CONFIG_BOOTARGS \
- "console=ttySC0,115200 rw root=/dev/nfs " \
- "nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-
#define CONFIG_BOOTCOMMAND \
"tftp 0x48080000 Image; " \
"tftp 0x48000000 Image-"CONFIG_DEFAULT_FDT_FILE"; " \
#define CONFIG_SYS_NS16550_MEM32
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
#define CONFIG_SYS_TEXT_BASE 0x60000000
#else
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SYS_NS16550_MEM32
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#define CONFIG_SYS_TEXT_BASE 0x00000000
#else
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
+#define COUNTER_FREQUENCY 24000000
+
+#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_TEXT_BASE 0x00200000
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SYS_LOAD_ADDR 0x00280000
+#define CONFIG_SPL_TEXT_BASE 0x00000000
+#define CONFIG_SPL_MAX_SIZE 0x40000
+#define CONFIG_SPL_BSS_START_ADDR 0x400000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
+
#define CONFIG_BOUNCE_BUFFER
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MMC_ENV_DEV 0
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
#endif
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
#define CONFIG_CPU_SH7203 1
#define CONFIG_RSK7203 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_BOOTARGS "console=ttySC3,115200"
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_BOOTARGS "console=ttySC7,115200"
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
#define CONFIG_FORMIKE
#endif
#define CONFIG_LOADADDR 0xC307FFC0
-#define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw"
#define CONFIG_EXTRA_ENV_SETTINGS \
"boot_scripts=boot.scr.uimg boot.scr\0" \
/* PWM */
#define CONFIG_PWM 1
-#define CONFIG_CMD_ONENAND
-
/* USB Composite download gadget - g_dnl */
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* TIZEN THOR downloader support */
-#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
/* USB Samsung's IDs */
#define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}"
-#define CONFIG_BOOTARGS "root=/dev/mtdblock8 rootfstype=ext4 " \
- CONFIG_COMMON_BOOT
-
#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \
" onenand write 0x32008000 0x0 0x100000\0"
/* Console configuration */
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run mmcboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
"bootz 0x22000000 - 0x21000000"
#endif
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS \
- "console=ttyS0,57600 earlyprintk " \
- "mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
-
/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x200000
#define CONFIG_BOOTCOMMAND "fatload mmc 1:1 0x21000000 at91-sama5d2_xplained.dtb; " \
"fatload mmc 1:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
#endif
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#ifdef FTRACE
#define CONFIG_TRACE
-#define CONFIG_CMD_TRACE
#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
#define CONFIG_TRACE_EARLY
#define CONFIG_LMB
#define CONFIG_ANDROID_BOOT_IMAGE
-#define CONFIG_CMD_PCI
-
#define CONFIG_FS_EXT4
#define CONFIG_EXT4_WRITE
#define CONFIG_HOST_MAX_DEVICES 4
#define CONFIG_ENV_SIZE 8192
/* SPI - enable all SPI flash types for testing purposes */
-#define CONFIG_CMD_SF_TEST
#define CONFIG_I2C_EDID
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_IP_DEFRAG
-#define CONFIG_CMD_SANDBOX
-
-#define CONFIG_BOOTARGS ""
-
#ifndef SANDBOX_NO_SDL
#define CONFIG_SANDBOX_SDL
#endif
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 800000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=sbc8349\0" \
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
#define CONFIG_BOOTCOMMAND "bootm"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_TEXT_BASE 0x5ff80000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_TEXT_BASE 0x5ff80000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_TEXT_BASE 0x8ef80000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_SH7763RDP 1
#define __LITTLE_ENDIAN 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_CPU_SH7785 1
#define CONFIG_SH7785LCR 1
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SH_ZIMAGEBOOT
-
-#define CONFIG_BOOTARGS "console=ttySC1,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootdevice=0:1\0" \
"usbload=usb reset;usbboot;usb stop;bootm\0"
/* T-SH7706LSR*/
/* #define CONFIG_T_SH7706LSR 1 */
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
-
/*
* This board has original boot loader. If you write u-boot to 0x0,
* you should set undef.
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
#define CONFIG_MTD_DEVICE
#define CONFIG_SF_DEFAULT_SPEED (75000000)
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_SPL_NAND_AM33XX_BCH
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NAND
/* NAND support */
#ifdef CONFIG_NAND
/* UBI Support */
#define CONFIG_SYS_INIT_SP_ADDR 0x301000
#define CONFIG_SPL_STACK_R
#define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
-/* we have only 4k sram in SPL, so cut SYS_MALLOC_F_LEN */
-#undef CONFIG_SYS_MALLOC_F_LEN
-#define CONFIG_SYS_MALLOC_F_LEN 0x400
#else
/*
* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
CONFIG_SPL_BSS_MAX_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
#define CONFIG_SYS_USE_NANDFLASH 1
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-/***********************************************************
- * Command definition
- ***********************************************************/
-#define CONFIG_CMD_ONENAND
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
" mem=128M " \
" " MTDPARTS_DEFAULT
-#define CONFIG_BOOTARGS "root=/dev/mtdblock5 ubi.mtd=4" \
- " rootfstype=cramfs " CONFIG_COMMON_BOOT
-
#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x40000;" \
" onenand write 0x32008000 0x0 0x40000\0"
#undef CONFIG_USB_GADGET_DWC2_OTG
#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
#undef CONFIG_REVISION_TAG
-#undef CONFIG_CMD_THOR_DOWNLOAD
/* High Level Configuration Options */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
-#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
#define CONFIG_ENV_OFFSET (512 << 10)
#define CONFIG_ENV_SIZE (256 << 10)
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any"
/* Console settings */
#define CONFIG_SYS_CBSIZE 256
/* U-Boot memory settings */
#define CONFIG_SYS_MALLOC_LEN (1 << 20)
-/* Command line configuration */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
* U-Boot environment configurations
*/
-/*
- * arguments passed to the bootz command. The value of
- * CONFIG_BOOTARGS goes into the environment value "bootargs".
- * Do note the value will overide also the chosen node in FDT blob.
- */
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-
/*
* Serial / UART configurations
*/
/* Booting Linux */
#define CONFIG_BOOTFILE "zImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
#define CONFIG_PREBOOT "run try_bootscript"
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_LOADADDR 0x01000000
/* Booting Linux */
#define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
#define CONFIG_BOOTCOMMAND "run selboot"
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
"echo Welcome on the ABB Socrates Board;" \
"echo"
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consdev=ttyS0\0" \
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
-/*
- * Command support defines
- */
-#define CONFIG_CMD_SAVES
-
/*
* Default Environment Varible definitions
*/
"bootm 0x1600000"
#endif
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \
- "mem=128M " \
- "root="CONFIG_FSMTDBLK \
- "rootfstype=jffs2"
-
#define CONFIG_NFSBOOTCOMMAND \
"bootp; " \
"setenv bootargs root=/dev/nfs rw " \
#define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
-
/* Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
"board= B2260" \
#define CONFIG_SYS_MALLOC_LEN (2 << 20)
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
#define CONFIG_BOOTCOMMAND \
"run bootcmd_romfs"
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_CMD_MEM
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
#define CONFIG_BOOTCOMMAND \
"run bootcmd_romfs"
--- /dev/null
+/*
+ * Sysam stmark2 board configuration
+ *
+ * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __STMARK2_CONFIG_H
+#define __STMARK2_CONFIG_H
+
+#define CONFIG_STMARK2
+#define CONFIG_HOSTNAME stmark2
+
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT 0
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#define LDS_BOARD_TEXT \
+ board/sysam/stmark2/sbf_dram_init.o (.text*)
+
+#define CONFIG_TIMESTAMP
+
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 root=/dev/ram0 rw " \
+ "rootfstype=ramfs " \
+ "rdinit=/bin/init " \
+ "devtmpfs.mount=1"
+
+#define CONFIG_BOOTCOMMAND \
+ "sf probe 0:1 50000000; " \
+ "sf read ${loadaddr} 0x100000 ${kern_size}; " \
+ "bootm ${loadaddr}"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "kern_size=0x700000\0" \
+ "loadaddr=0x40001000\0" \
+ "-(rootfs)\0" \
+ "update_uboot=loady ${loadaddr}; " \
+ "sf probe 0:1 50000000; " \
+ "sf erase 0 0x80000; " \
+ "sf write ${loadaddr} 0 ${filesize}\0" \
+ "update_kernel=loady ${loadaddr}; " \
+ "setenv kern_size ${filesize}; saveenv; " \
+ "sf probe 0:1 50000000; " \
+ "sf erase 0x100000 0x700000; " \
+ "sf write ${loadaddr} 0x100000 ${filesize}\0" \
+ "update_rootfs=loady ${loadaddr}; " \
+ "sf probe 0:1 50000000; " \
+ "sf erase 0x00800000 0x100000; " \
+ "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
+ ""
+
+/* Realtime clock */
+#undef CONFIG_MCFRTC
+#define CONFIG_RTC_MCFRRTC
+#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
+
+/* spi not partitions */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV "nor0"
+#define MTDIDS_DEFAULT "nor0=spi-flash.0"
+#define MTDPARTS_DEFAULT \
+ "mtdparts=spi-flash.0:" \
+ "1m(u-boot)," \
+ "7m(kernel)," \
+ "-(rootfs)"
+
+/* Timer */
+#define CONFIG_MCFTMR
+#undef CONFIG_MCFPIT
+
+/* DSPI and Serial Flash */
+#define CONFIG_CF_SPI
+#define CONFIG_CF_DSPI
+#define CONFIG_SF_DEFAULT_SPEED 50000000
+#define CONFIG_SERIAL_FLASH
+#define CONFIG_HARD_SPI
+#define CONFIG_SPI_FLASH_ISSI
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS 1
+
+#define CONFIG_SYS_SBFHDR_SIZE 0x7
+
+#define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
+ DSPI_CTAR_PCSSCK_1CLK | \
+ DSPI_CTAR_PASC(0) | \
+ DSPI_CTAR_PDT(0) | \
+ DSPI_CTAR_CSSCK(0) | \
+ DSPI_CTAR_ASC(0) | \
+ DSPI_CTAR_DT(1) | \
+ DSPI_CTAR_BR(6))
+#define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
+#define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
+
+/* Input, PCI, Flexbus, and VCO */
+#define CONFIG_EXTRA_CLOCK
+
+#define CONFIG_PRAM 2048 /* 2048 KB */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
+#define CONFIG_SYS_MBAR 0xFC000000
+
+/*
+ * Definitions for initial stack pointer and data area (in internal SRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
+/* End of used area in internal SRAM */
+#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
+#define CONFIG_SYS_INIT_RAM_CTRL 0x221
+#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE) - 32)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
+
+/*
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
+
+#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400)
+#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
+#define CONFIG_SYS_DRAM_TEST
+
+#if defined(CONFIG_CF_SBF)
+#define CONFIG_SERIAL_BOOT
+#endif
+
+#if defined(CONFIG_SERIAL_BOOT)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
+#else
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
+#endif
+
+#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
+/* Reserve 256 kB for Monitor */
+#define CONFIG_SYS_MONITOR_LEN (256 << 10)
+/* Reserve 256 kB for malloc() */
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+/* Initial Memory map for Linux */
+#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
+ (CONFIG_SYS_SDRAM_SIZE << 20))
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+
+#if defined(CONFIG_CF_SBF)
+#define CONFIG_ENV_IS_IN_SPI_FLASH 1
+#define CONFIG_ENV_SPI_CS 1
+#define CONFIG_ENV_OFFSET 0x40000
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#endif
+
+#undef CONFIG_ENV_OVERWRITE
+
+/* Cache Configuration */
+#define CONFIG_SYS_CACHELINE_SIZE 16
+#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - 4)
+#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
+#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
+#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
+ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+ CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
+ CF_CACR_ICINVA | CF_CACR_EUSP)
+#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
+ CF_CACR_DEC | CF_CACR_DDCM_P | \
+ CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
+
+#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - 12)
+
+#endif /* __STMARK2_CONFIG_H */
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_PCA953X /* NXP PCA9554 */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x24, 16}, {0x25, 16}, {0x26, 16}, \
{0x3c, 8}, {0x3d, 8}, {0x3e, 8} }
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#ifndef CONFIG_ARM64
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
-#endif
-
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
#ifndef __T4QDS_H
#define __T4QDS_H
-#define CONFIG_CMD_REGINFO
-
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
*/
/* **** PISMO SUPPORT *** */
-#define CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
else \
strcpy(ethname, "ethaddr"); \
printf("Setting %s from EEPROM with %s\n", ethname, buf);\
- setenv(ethname, buf); \
+ env_set(ethname, buf); \
} \
} while (0)
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-#define CONFIG_OMAP3_SPI
-
/*
* USB
*
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* NAND boot config */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#if defined(CONFIG_BOARD_TAURUS)
-#define CONFIG_BOOTARGS_TAURUS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
-#endif
-
-#if defined(CONFIG_BOARD_AXM)
-#define CONFIG_BOOTARGS_AXM \
- "\0" \
- "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
- "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
- "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
- "baudrate=115200\0" \
- "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
- "boot_retries=0\0" \
- "bootcmd=run flash_self\0" \
- "bootdelay=3\0" \
- "ethact=macb0\0" \
- "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
- "bootm ${kernel_ram};reset\0" \
- "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
- "bootm ${kernel_ram};reset\0" \
- "flash_self_test=run nand_kernel;run setbootargs addtest; " \
- "upgrade_available;bootm ${kernel_ram};reset\0" \
- "hostname=systemone\0" \
- "kernel_Off=0x00200000\0" \
- "kernel_Off_fallback=0x03800000\0" \
- "kernel_ram=0x21500000\0" \
- "kernel_size=0x00400000\0" \
- "kernel_size_fallback=0x00400000\0" \
- "loads_echo=1\0" \
- "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
- "${kernel_size}\0" \
- "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
- "run nfsargs;run addip;upgrade_available;bootm " \
- "${kernel_ram};reset\0" \
- "netdev=eth0\0" \
- "nfsargs=run root_path;setenv bootargs ${bootargs} " \
- "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
- "at91sam9_wdt.wdt_timeout=16\0" \
- "partitionset_active=A\0" \
- "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
- "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
- "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
- "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
- "project_dir=systemone\0" \
- "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
- "rootfs=/dev/mtdblock5\0" \
- "rootfs_fallback=/dev/mtdblock7\0" \
- "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
- "root=${rootfs} rootfstype=jffs2 panic=7 " \
- "at91sam9_wdt.wdt_timeout=16\0" \
- "stderr=serial\0" \
- "stdin=serial\0" \
- "stdout=serial\0" \
- "upgrade_available=0\0"
-#endif
-
-#if defined(CONFIG_BOARD_TAURUS)
-#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
-#endif
-
-#if defined(CONFIG_BOARD_AXM)
-#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
-#endif
-
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE \
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS0,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
#endif
/* PCI */
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_ENV_OFFSET_REDUND \
(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
#undef CONFIG_EXTRA_ENV_SETTINGS
* This version should also enable all other non-production
* interfaces / features.
*/
-#ifdef CONFIG_USB
-#define CONFIG_CMD_PCI
-#endif
/* I2C */
#define CONFIG_SYS_I2C
"fdt_addr=0x94C00000\0" \
"fdt_high=0x9fffffff\0"
-#define CONFIG_BOOTARGS \
- "console=ttyAMA0,115200n8 " \
- "earlycon=pl011,0x87e024000000 " \
- "debug maxcpus=48 rootwait rw "\
- "root=/dev/sda2 coherent_pool=16M"
-
/* Do not preserve environment */
#define CONFIG_ENV_SIZE 0x1000
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
"fatload mmc 0 ${loadaddr} uImage;" \
"bootm ${loadaddr}" \
-#define CONFIG_BOOTARGS "console=ttyO2,115200n8 noinitrd earlyprintk"
-
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_SYS_TEXT_BASE 0x80800000
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700 /* address 0x2E0000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */
-
-
-/* spl export command */
-#define CONFIG_CMD_SPL
#endif
/* General parts of the framework, required. */
#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
#define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
-/* U-Boot command configuration */
-#define CONFIG_CMD_SAVES
-
/* U-Boot general configuration */
#define CONFIG_MISC_INIT_R
#define CONFIG_MX_CYCLIC
#endif
#endif
-#define CONFIG_BOOTARGS \
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-/* SPI IP Block */
-#define CONFIG_OMAP3_SPI
-
/*
* GPMC NAND block. We support 1 device and the physical address to
* access CS0 at is 0x8000000.
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(64 << 20))
* So moving TEXT_BASE down to non-HS limit.
*/
#define CONFIG_SPL_TEXT_BASE 0x40300000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
#define CONFIG_SPL_TEXT_BASE 0x40300000
#endif
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
#define CONFIG_SYS_BAUDRATE_TABLE \
{9600, 19200, 38400, 57600, 115200}
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
#define CONFIG_BOOTCOMMAND \
"dhcp 192.168.1.1:wdr4300.fit && bootm $loadaddr"
#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
"fdtaddr=40800000\0" \
/* Falcon mode definitions */
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
/* GPT */
/* Console configuration */
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* I2C support */
#define CONFIG_DM_I2C
"bootcmd=run nandboot\0"
/* SPL OS boot options */
-#define CONFIG_CMD_SPL
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
-#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
- 0x600000)
#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
#define CONFIG_SH_SDHI_FREQ 200000000
/* Environment in eMMC, at the end of 2nd "boot sector" */
-#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
#define CONFIG_ENV_SPI_MAX_HZ 15000000
#define CONFIG_BOOTCOMMAND "nboot 21000000 0"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock1 " \
- "mtdparts=" MTDPARTS_DEFAULT " " \
- "rw rootfstype=jffs2"
#define CONFIG_EXTRA_ENV_SETTINGS \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
BOOTENV
#ifndef CONFIG_CMDLINE
-#define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
#define USBARMORY_FIT_ADDR "0x70800000"
#endif
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
#endif /* CONFIG_CMD_USB */
-#if defined(CONFIG_VCT_ONENAND)
-#define CONFIG_CMD_ONENAND
-#endif
-
/*
* BOOTP options
*/
* (NOR/OneNAND) usage and Linux kernel booting.
*/
#if defined(CONFIG_VCT_SMALL_IMAGE)
-#undef CONFIG_CMD_STRINGS
-#undef CONFIG_CMD_TERMINAL
-
#undef CONFIG_SMC911X
#undef CONFIG_SYS_I2C_SOFT
#undef CONFIG_SOURCE
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
-/* Assume we boot with root on the first partition of a USB stick */
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \
- "root=/dev/sda2 rw " \
- "rootwait "\
- "earlyprintk=pl011,0x7ff80000 debug "\
- "user_debug=31 "\
- "androidboot.hardware=juno "\
- "loglevel=9"
-
/* Copy the kernel and FDT to DRAM memory and boot */
#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
"if test $? -eq 1; then "\
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0"
-#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
- "0x1c090000 debug user_debug=31 "\
- "loglevel=9"
-
#define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
"smhload ${fdtfile} ${fdt_addr}; " \
"smhload ${initrd_name} ${initrd_addr} "\
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0"
-#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
- "0x1c090000 debug user_debug=31 "\
- "androidboot.hardware=fvpbase "\
- "root=/dev/vda2 rw "\
- "rootwait "\
- "loglevel=9"
-
#define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr"
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPI_FLASH_GIGADEVICE
-#define CONFIG_CMD_SF_TEST
-
#define CONFIG_KEYBOARD
#endif
"mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \
"bootz ${loadaddr} - ${oftaddr}"
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_start=0x20000\0" \
"kernel_size=0x800000\0" \
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_SYS_RTC_BUS_NUM 0x01
#define CONFIG_SYS_I2C_RTC_ADDR 0x32
#define CONFIG_RTC_RX8025
-#define CONFIG_CMD_TSI148
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
/* Pass Ethernet MAC to VxWorks */
#define CONFIG_SYS_VXWORKS_MAC_PTR 0x000043f0
#define CONFIG_LOADADDR 800000 /* def location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=vme8349\0" \
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
+ func(SATA, sata, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
* SPL
*/
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm1136/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x10002300
#define CONFIG_SPL_MAX_SIZE (64 * 1024) /* 8 KB for stack */
#define CONFIG_LPC32XX_SSP
#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
-#define CONFIG_CMD_MAX6957
/*
* Environment
*/
#define CONFIG_INITRD_TAG
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS2,115200n8"
#define CONFIG_LOADADDR 0x80008000
/*
#define CONFIG_USB_EHCI_SPEAR
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-/*
- * Command support defines
- */
-#define CONFIG_CMD_SAVES
-
/* Filesystem support (for USB key) */
#define CONFIG_SUPPORT_VFAT
#define CONFIG_SPL_TEXT_BASE 0xd2800b00
#define CONFIG_SPL_MAX_SIZE (CONFIG_SRAM_SIZE - 0xb00)
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
#define CONFIG_SPL_FRAMEWORK
/*-----------------------------------------------------------------------
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_ZBOOT
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sdb3 init=/sbin/init rootwait ro"
#define CONFIG_BOOTCOMMAND \
"ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
/*-----------------------------------------------------------------------
* FLASH configuration
*/
-#define CONFIG_CMD_SF_TEST
#define CONFIG_SPI
/*-----------------------------------------------------------------------
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CONFIG_USB_CABLE_CHECK
-#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
#define CONFIG_THOR_RESET_OFF
#define DFU_ALT_INFO_RAM \
#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT7U CONFIG_SYS_DBAT7U
-/*
- * Command configuration.
- */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
-/*
- * Command configuration.
- */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
/*
* Miscellaneous configurable options
*/
#define TSEC2_PHYIDX 0
#define CONFIG_HAS_ETH1
-/*
- * Command configuration.
- */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-/*
- * Command configuration.
- */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
/*
* Miscellaneous configurable options
*/
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/*=================*/
-/* U-Boot commands */
-/*=================*/
-
-#define CONFIG_CMD_SAVES
-
/*==============================*/
/* U-Boot autoboot configuration */
/*==============================*/
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_MV88E6352_SWITCH
-#define CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
"else " \
"bootm 0x50000; " \
"fi; "
-#define CONFIG_BOOTARGS \
- "console=tty0 console=ttyS2,115200 fbcon=rotate:3"
#define CONFIG_TIMESTAMP
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
# define DFU_DEFAULT_POLL_TIMEOUT 300
# define CONFIG_USB_CABLE_CHECK
-# define CONFIG_CMD_THOR_DOWNLOAD
# define CONFIG_THOR_RESET_OFF
# define CONFIG_USB_FUNCTION_THOR
# define DFU_ALT_INFO_RAM \
/* Commands */
/* SPL part */
-#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
-
/* MMC support */
#ifdef CONFIG_MMC_SDHCI_ZYNQ
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
extern void dataflash_print_info (void);
extern void dataflash_perror (int err);
-extern void AT91F_DataflashSetEnv (void);
+extern void AT91F_Dataflashenv_set(void);
extern struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS];
extern dataflash_protect_t area_list[NB_DATAFLASH_AREA];
* children are deactivated first.
*
* @dev: Pointer to device to remove
- * @flags: Flags for selective device removal
+ * @flags: Flags for selective device removal (DM_REMOVE_...)
* @return 0 if OK, -ve on error (an error here is normally a very bad thing)
*/
#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
UCLASS_MOD_EXP, /* RSA Mod Exp device */
UCLASS_MTD, /* Memory Technology Device (MTD) device */
UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
+ UCLASS_NVME, /* NVM Express device */
UCLASS_PANEL, /* Display panel, such as an LCD */
UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
UCLASS_PCH, /* x86 platform controller hub */
--- /dev/null
+#ifndef DT_BINDINGS_RK3368_DMC_H
+#define DT_BINDINGS_RK3368_DMC_H
+
+#define DMC_MSCH_CBDR 0x0
+#define DMC_MSCH_CBRD 0x1
+#define DMC_MSCH_CRBD 0x2
+
+#define DDR3_800D 0
+#define DDR3_800E 1
+#define DDR3_1066E 2
+#define DDR3_1066F 3
+#define DDR3_1066G 4
+#define DDR3_1333F 5
+#define DDR3_1333G 6
+#define DDR3_1333H 7
+#define DDR3_1333J 8
+#define DDR3_1600G 9
+#define DDR3_1600H 10
+#define DDR3_1600J 11
+#define DDR3_1600K 12
+#define DDR3_1866J 13
+#define DDR3_1866K 14
+#define DDR3_1866L 15
+#define DDR3_1866M 16
+#define DDR3_2133K 17
+#define DDR3_2133L 18
+#define DDR3_2133M 19
+#define DDR3_2133N 20
+
+#endif
--- /dev/null
+/*
+ * Copyright 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DWC_AHSATA_H__
+#define __DWC_AHSATA_H__
+
+int dwc_ahsata_bus_reset(struct udevice *dev);
+int dwc_ahsata_probe(struct udevice *dev);
+int dwc_ahsata_scan(struct udevice *dev);
+int dwc_ahsata_port_status(struct udevice *dev, int port);
+
+#endif
int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
#endif /* !CONFIG_BLK */
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
/* Export the operations to drivers */
int dwmci_probe(struct udevice *dev);
extern const struct dm_mmc_ops dm_dwmci_ops;
#ifdef CONFIG_ENV_FLAGS_LIST_DEFAULT
ENV_FLAGS_VAR "=" CONFIG_ENV_FLAGS_LIST_DEFAULT "\0"
#endif
-#ifdef CONFIG_BOOTARGS
+#ifdef CONFIG_USE_BOOTARGS
"bootargs=" CONFIG_BOOTARGS "\0"
#endif
#ifdef CONFIG_BOOTCOMMAND
# define ENV_HEADER_SIZE (sizeof(uint32_t))
#endif
-#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
-extern char *env_name_spec;
-#endif
-
#ifdef CONFIG_ENV_AES
/* Make sure the payload is multiple of AES block size */
#define ENV_SIZE ((CONFIG_ENV_SIZE - ENV_HEADER_SIZE) & ~(16 - 1))
extern const unsigned char default_environment[];
extern env_t *env_ptr;
-extern void env_relocate_spec(void);
-extern unsigned char env_get_char_spec(int);
-
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
extern void env_reloc(void);
#endif
#include <env_flags.h>
#include <search.h>
-extern struct hsearch_data env_htab;
+/* Value for environment validity */
+enum env_valid {
+ ENV_INVALID, /* No valid environment */
+ ENV_VALID, /* First or only environment is valid */
+ ENV_REDUND, /* Redundant environment is valid */
+};
+
+enum env_location {
+ ENVL_DATAFLASH,
+ ENVL_EEPROM,
+ ENVL_EXT4,
+ ENVL_FAT,
+ ENVL_FLASH,
+ ENVL_MMC,
+ ENVL_NAND,
+ ENVL_NVRAM,
+ ENVL_ONENAND,
+ ENVL_REMOTE,
+ ENVL_SPI_FLASH,
+ ENVL_UBI,
+ ENVL_NOWHERE,
+
+ ENVL_COUNT,
+ ENVL_UNKNOWN,
+};
+
+struct env_driver {
+ const char *name;
+ enum env_location location;
+
+ /**
+ * get_char() - Read a character from the environment
+ *
+ * This method is optional. If not provided, a default implementation
+ * will read from gd->env_addr.
+ *
+ * @index: Index of character to read (0=first)
+ * @return character read, or -ve on error
+ */
+ int (*get_char)(int index);
+
+ /**
+ * load() - Load the environment from storage
+ *
+ * This method is optional. If not provided, no environment will be
+ * loaded.
+ *
+ * @return 0 if OK, -ve on error
+ */
+ int (*load)(void);
+
+ /**
+ * save() - Save the environment to storage
+ *
+ * This method is required for 'saveenv' to work.
+ *
+ * @return 0 if OK, -ve on error
+ */
+ int (*save)(void);
+
+ /**
+ * init() - Set up the initial pre-relocation environment
+ *
+ * This method is optional.
+ *
+ * @return 0 if OK, -ENOENT if no initial environment could be found,
+ * other -ve on error
+ */
+ int (*init)(void);
+};
+
+/* Declare a new environment location driver */
+#define U_BOOT_ENV_LOCATION(__name) \
+ ll_entry_declare(struct env_driver, __name, env_driver)
+
+/* Declare the name of a location */
+#ifdef CONFIG_CMD_SAVEENV
+#define ENV_NAME(_name) .name = _name,
+#else
+#define ENV_NAME(_name)
+#endif
-/* Function that returns a character from the environment */
-unsigned char env_get_char(int);
+#ifdef CONFIG_CMD_SAVEENV
+#define env_save_ptr(x) x
+#else
+#define env_save_ptr(x) NULL
+#endif
-/* Function that returns a pointer to a value from the environment */
-const unsigned char *env_get_addr(int);
-unsigned char env_get_char_memory(int index);
+extern struct hsearch_data env_htab;
/* Function that updates CRC of the enironment */
void env_crc_update(void);
/* Look up the variable from the default environment */
-char *getenv_default(const char *name);
+char *env_get_default(const char *name);
/* [re]set to the default environment */
void set_default_env(const char *s);
int env_import_redund(const char *buf1, const char *buf2);
#endif
+/**
+ * env_driver_lookup_default() - Look up the default environment driver
+ *
+ * @return pointer to driver, or NULL if none (which should not happen)
+ */
+struct env_driver *env_driver_lookup_default(void);
+
+/**
+ * env_get_char() - Get a character from the early environment
+ *
+ * This reads from the pre-relocation environemnt
+ *
+ * @index: Index of character to read (0 = first)
+ * @return character read, or -ve on error
+ */
+int env_get_char(int index);
+
+/**
+ * env_load() - Load the environment from storage
+ *
+ * @return 0 if OK, -ve on error
+ */
+int env_load(void);
+
+/**
+ * env_save() - Save the environment to storage
+ *
+ * @return 0 if OK, -ve on error
+ */
+int env_save(void);
+
#endif /* DO_DEPS_ONLY */
#endif /* _ENVIRONMENT_H_ */
int vprintf(const char *, va_list);
unsigned long simple_strtoul(const char *cp, char **endp, unsigned int base);
int strict_strtoul(const char *cp, unsigned int base, unsigned long *res);
-char *getenv (const char *name);
-int setenv (const char *varname, const char *varvalue);
+char *env_get(const char *name);
+int env_set(const char *varname, const char *value);
long simple_strtol(const char *cp, char **endp, unsigned int base);
int strcmp(const char *cs, const char *ct);
unsigned long ustrtoul(const char *cp, char **endp, unsigned int base);
#define FLASH_S29GL128N 0x00F1 /* Spansion S29GL128N */
#define FLASH_STM32 0x00F2 /* STM32 Embedded Flash */
-#define FLASH_STM32F1 0x00F3 /* STM32F1 Embedded Flash */
#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
};
void enable_layerscape_ns_access(void);
-void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val);
+void set_devices_ns_access(unsigned long, u16 val);
void set_pcie_ns_access(int pcie, u16 val);
#endif
bd_t *kbd;
#endif
- int verify; /* getenv("verify")[0] != 'n' */
+ int verify; /* env_get("verify")[0] != 'n' */
#define BOOTM_STATE_START (0x00000001)
#define BOOTM_STATE_FINDOS (0x00000002)
int image_check_hcrc(const image_header_t *hdr);
int image_check_dcrc(const image_header_t *hdr);
#ifndef USE_HOSTCC
-ulong getenv_bootm_low(void);
-phys_size_t getenv_bootm_size(void);
-phys_size_t getenv_bootm_mapsize(void);
+ulong env_get_bootm_low(void);
+phys_size_t env_get_bootm_size(void);
+phys_size_t env_get_bootm_mapsize(void);
#endif
void memmove_wd(void *to, void *from, size_t len, ulong chunksz);
#define _IS_SPL 1
#endif
+#ifdef CONFIG_TPL_BUILD
+#define _IS_TPL 1
+#endif
+
+#if defined(CONFIG_TPL_BUILD)
+#define config_val(cfg) _config_val(_IS_TPL, cfg)
+#define _config_val(x, cfg) __config_val(x, cfg)
+#define __config_val(x, cfg) ___config_val(__ARG_PLACEHOLDER_##x, cfg)
+#define ___config_val(arg1_or_junk, cfg) \
+ ____config_val(arg1_or_junk CONFIG_TPL_##cfg, CONFIG_##cfg)
+#define ____config_val(__ignored, val, ...) val
+#else
#define config_val(cfg) _config_val(_IS_SPL, cfg)
#define _config_val(x, cfg) __config_val(x, cfg)
#define __config_val(x, cfg) ___config_val(__ARG_PLACEHOLDER_##x, cfg)
#define ___config_val(arg1_or_junk, cfg) \
____config_val(arg1_or_junk CONFIG_SPL_##cfg, CONFIG_##cfg)
#define ____config_val(__ignored, val, ...) val
+#endif
/*
* CONFIG_VAL(FOO) evaluates to the value of
return 0;
}
+/**
+ * mii_resolve_flowctrl_fdx
+ * @lcladv: value of MII ADVERTISE register
+ * @rmtadv: value of MII LPA register
+ *
+ * Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
+ */
+static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
+{
+ u8 cap = 0;
+
+ if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
+ cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
+ } else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
+ if (lcladv & ADVERTISE_PAUSE_CAP)
+ cap = FLOW_CTRL_RX;
+ else if (rmtadv & ADVERTISE_PAUSE_CAP)
+ cap = FLOW_CTRL_TX;
+ }
+
+ return cap;
+}
+
#endif /* __LINUX_MII_H__ */
#define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
#define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
+#define EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
+#define EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
+#define EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)
+
#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
#define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
/* forward decl. */
struct mmc;
-#if CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if CONFIG_IS_ENABLED(DM_MMC)
struct dm_mmc_ops {
/**
* send_cmd() - Send a command to the MMC device
struct mmc_config {
const char *name;
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
const struct mmc_ops *ops;
#endif
uint host_caps;
int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
enum mmc_hwpart_conf_mode mode);
-#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
+#if !CONFIG_IS_ENABLED(DM_MMC)
int mmc_getcd(struct mmc *mmc);
int board_mmc_getcd(struct mmc *mmc);
int mmc_getwp(struct mmc *mmc);
int eth_get_dev_index(void); /* get the device index */
void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
-int eth_getenv_enetaddr(const char *name, uchar *enetaddr);
-int eth_setenv_enetaddr(const char *name, const uchar *enetaddr);
+int eth_env_get_enetaddr(const char *name, uchar *enetaddr);
+int eth_env_set_enetaddr(const char *name, const uchar *enetaddr);
/**
- * eth_setenv_enetaddr_by_index() - set the MAC address environment variable
+ * eth_env_set_enetaddr_by_index() - set the MAC address environment variable
*
* This sets up an environment variable with the given MAC address (@enetaddr).
* The environment variable to be set is defined by <@base_name><@index>addr.
* @enetaddr: Pointer to MAC address to put into the variable
* @return 0 if OK, other value on error
*/
-int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_set_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
* Returns:
* Return true if the address is valid.
*/
-int eth_getenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_get_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
int eth_init(void); /* Initialize the device */
ushort string_to_vlan(const char *s);
/* read a VLAN id from an environment variable */
-ushort getenv_vlan(char *);
+ushort env_get_vlan(char *);
/* copy a filename (allow for "..." notation, limit length) */
void copy_filename(char *dst, const char *src, int size);
return num;
}
+#ifdef CONFIG_DM_ETH
+struct mii_dev *fec_get_miibus(struct udevice *dev, int dev_id);
+#else
struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
+#endif
+
#ifdef CONFIG_PHYLIB
struct phy_device;
int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
--- /dev/null
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __NVME_H__
+#define __NVME_H__
+
+struct nvme_dev;
+
+/**
+ * nvme_identify - identify controller or namespace capabilities and status
+ *
+ * This issues an identify command to the NVMe controller to return a data
+ * buffer that describes the controller or namespace capabilities and status.
+ *
+ * @dev: NVMe controller device
+ * @nsid: 0 for controller, namespace id for namespace to identify
+ * @cns: 1 for controller, 0 for namespace
+ * @dma_addr: dma buffer address to store the identify result
+ * @return: 0 on success, -ETIMEDOUT on command execution timeout,
+ * -EIO on command execution fails
+ */
+int nvme_identify(struct nvme_dev *dev, unsigned nsid,
+ unsigned cns, dma_addr_t dma_addr);
+
+/**
+ * nvme_get_features - retrieve the attributes of the feature specified
+ *
+ * This retrieves the attributes of the feature specified.
+ *
+ * @dev: NVMe controller device
+ * @fid: feature id to provide data
+ * @nsid: namespace id the command applies to
+ * @dma_addr: data structure used as part of the specified feature
+ * @result: command-specific result in the completion queue entry
+ * @return: 0 on success, -ETIMEDOUT on command execution timeout,
+ * -EIO on command execution fails
+ */
+int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
+ dma_addr_t dma_addr, u32 *result);
+
+/**
+ * nvme_set_features - specify the attributes of the feature indicated
+ *
+ * This specifies the attributes of the feature indicated.
+ *
+ * @dev: NVMe controller device
+ * @fid: feature id to provide data
+ * @dword11: command-specific input parameter
+ * @dma_addr: data structure used as part of the specified feature
+ * @result: command-specific result in the completion queue entry
+ * @return: 0 on success, -ETIMEDOUT on command execution timeout,
+ * -EIO on command execution fails
+ */
+int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
+ dma_addr_t dma_addr, u32 *result);
+
+/**
+ * nvme_scan_namespace - scan all namespaces attached to NVMe controllers
+ *
+ * This probes all registered NVMe uclass device drivers in the system,
+ * and tries to find all namespaces attached to the NVMe controllers.
+ *
+ * @return: 0 on success, -ve on error
+ */
+int nvme_scan_namespace(void);
+
+/**
+ * nvme_print_info - print detailed NVMe controller and namespace information
+ *
+ * This prints out detailed human readable NVMe controller and namespace
+ * information which is very useful for debugging.
+ *
+ * @udev: NVMe controller device
+ * @return: 0 on success, -EIO if NVMe identify command fails
+ */
+int nvme_print_info(struct udevice *udev);
+
+#endif /* __NVME_H__ */
#define PCI_CLASS_STORAGE_SATA 0x0106
#define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
#define PCI_CLASS_STORAGE_SAS 0x0107
+#define PCI_CLASS_STORAGE_EXPRESS 0x010802
#define PCI_CLASS_STORAGE_OTHER 0x0180
#define PCI_BASE_CLASS_NETWORK 0x02
#define __SATA_H__
#include <part.h>
-#if !defined(CONFIG_DM_SCSI)
+#if !defined(CONFIG_DM_SCSI) && !defined(CONFIG_AHCI)
int init_sata(int dev);
int reset_sata(int dev);
int scan_sata(int dev);
extern struct blk_desc sata_dev_desc[];
#endif
+int sata_probe(int devnum);
+int sata_remove(int devnum);
+
#endif
int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min);
#endif /* !CONFIG_BLK */
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
/* Export the operations to drivers */
int sdhci_probe(struct udevice *dev);
extern const struct dm_mmc_ops sdhci_ops;
#define H_MATCH_SUBSTR (1 << 7) /* search for substring matches */
#define H_MATCH_REGEX (1 << 8) /* search for regular expression matches */
#define H_MATCH_METHOD (H_MATCH_IDENT | H_MATCH_SUBSTR | H_MATCH_REGEX)
-#define H_PROGRAMMATIC (1 << 9) /* indicate that an import is from setenv() */
+#define H_PROGRAMMATIC (1 << 9) /* indicate that an import is from env_set() */
#define H_ORIGIN_FLAGS (H_INTERACTIVE | H_PROGRAMMATIC)
#endif /* _SEARCH_H_ */
struct spl_boot_device *bootdev);
void bl31_entry(void);
+
+/**
+ * board_return_to_bootrom - allow for boards to continue with the boot ROM
+ *
+ * If a board (e.g. the Rockchip RK3368 boards) provide some
+ * supporting functionality for SPL in their boot ROM and the SPL
+ * stage wants to return to the ROM code to continue booting, boards
+ * can implement 'board_return_to_bootrom'.
+ */
+void board_return_to_bootrom(void);
#endif
+++ /dev/null
-/*
- * (C) Copyright 2013
- * Viktar Palstsiuk, Promwad, viktar.palstsiuk@promwad.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SX151X_H_
-#define __SX151X_H_
-
-int sx151x_get_value(int chip, int gpio);
-int sx151x_set_value(int chip, int gpio, int val);
-int sx151x_direction_input(int chip, int gpio);
-int sx151x_direction_output(int chip, int gpio);
-int sx151x_reset(int chip);
-
-#endif /* __SX151X_H_ */
#elif defined(CONFIG_MPC85xx)
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR
-#elif defined(CONFIG_ARCH_LS1021A)
+#elif defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A)
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR 0
#endif
* Start the timer
*
* @dev: WDT Device
- * @timeout: Number of ticks before timer expires
+ * @timeout_ms: Number of ticks (milliseconds) before timer expires
* @flags: Driver specific flags. This might be used to specify
* which action needs to be executed when the timer expires
* @return: 0 if OK, -ve on error
*/
-int wdt_start(struct udevice *dev, u64 timeout, ulong flags);
+int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags);
/*
* Stop the timer, thus disabling the Watchdog. Use wdt_start to start it again.
* Start the timer
*
* @dev: WDT Device
- * @timeout: Number of ticks before the timer expires
+ * @timeout_ms: Number of ticks (milliseconds) before the timer expires
* @flags: Driver specific flags. This might be used to specify
* which action needs to be executed when the timer expires
* @return: 0 if OK, -ve on error
*/
- int (*start)(struct udevice *dev, u64 timeout, ulong flags);
+ int (*start)(struct udevice *dev, u64 timeout_ms, ulong flags);
/*
* Stop the timer
*
size-constrained envrionments even this may be too big. Enable this
option to reduce code size slightly at the cost of some speed.
+config TPL_TINY_MEMSET
+ bool "Use a very small memset() in TPL"
+ help
+ The faster memset() is the arch-specific one (if available) enabled
+ by CONFIG_USE_ARCH_MEMSET. If that is not enabled, we can still get
+ better performance by writing a word at a time. But in very
+ size-constrained envrionments even this may be too big. Enable this
+ option to reduce code size slightly at the cost of some speed.
+
config RBTREE
bool
obj-$(CONFIG_SHA1) += sha1.o
obj-$(CONFIG_SHA256) += sha256.o
-obj-$(CONFIG_SPL_SAVEENV) += qsort.o
-obj-$(CONFIG_$(SPL_)OF_LIBFDT) += libfdt/
-ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_SPL_OF_PLATDATA),yy)
-obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
-obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
+obj-$(CONFIG_$(SPL_TPL_)SAVEENV) += qsort.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/
+ifneq ($(CONFIG_$(SPL_TPL_)BUILD)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
+obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += fdtdec_common.o
+obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += fdtdec.o
endif
ifdef CONFIG_SPL_BUILD
# endif
# ifndef CONFIG_SPL_BUILD
/* Allow the early environment to override the fdt address */
- gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
+ gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
(uintptr_t)gd->fdt_blob);
# endif
#endif
{
struct smbios_type1 *t = (struct smbios_type1 *)*current;
int len = sizeof(struct smbios_type1);
- char *serial_str = getenv("serial#");
+ char *serial_str = env_get("serial#");
memset(t, 0, sizeof(struct smbios_type1));
fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle);
return -1;
}
- if (offset + length > size)
+ if (offset + length > size) {
+ va_end(args);
return -1;
+ }
switch (*format) {
case 'b':
length = va_arg(args, uint32_t);
break;
default:
+ va_end(args);
debug("Couldn't recognize format string\n");
return -1;
}
if (argc == 1)
printf("%s\n", uuid);
else
- setenv(argv[1], uuid);
+ env_set(argv[1], uuid);
return CMD_RET_SUCCESS;
}
if (net_server_ip.s_addr == net_arp_wait_packet_ip.s_addr) {
char buf[20];
sprintf(buf, "%pM", &arp->ar_sha);
- setenv("serveraddr", buf);
+ env_set("serveraddr", buf);
}
#endif
* not contain a new value
*/
if (*net_boot_file_name)
- setenv("bootfile", net_boot_file_name);
+ env_set("bootfile", net_boot_file_name);
#endif
net_copy_ip(&net_ip, &bp->bp_yiaddr);
}
static u8 *add_vci(u8 *e)
{
char *vci = NULL;
- char *env_vci = getenv("bootp_vci");
+ char *env_vci = env_get("bootp_vci");
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_NET_VCI_STRING)
vci = CONFIG_SPL_NET_VCI_STRING;
*e++ = tmp & 0xff;
}
#if defined(CONFIG_BOOTP_SEND_HOSTNAME)
- hostname = getenv("hostname");
+ hostname = env_get("hostname");
if (hostname) {
int hostnamelen = strlen(hostname);
clientarch = CONFIG_BOOTP_PXE_CLIENTARCH;
#endif
- if (getenv("bootp_arch"))
- clientarch = getenv_ulong("bootp_arch", 16, clientarch);
+ if (env_get("bootp_arch"))
+ clientarch = env_get_ulong("bootp_arch", 16, clientarch);
if (clientarch > 0) {
*e++ = 93; /* Client System Architecture */
*e++ = 0; /* minor revision */
#ifdef CONFIG_LIB_UUID
- uuid = getenv("pxeuuid");
+ uuid = env_get("pxeuuid");
if (uuid) {
if (uuid_str_valid(uuid)) {
dhcp_state = INIT;
#endif
- ep = getenv("bootpretryperiod");
+ ep = env_get("bootpretryperiod");
if (ep != NULL)
time_taken_max = simple_strtoul(ep, NULL, 10);
else
ip_to_string(ip_addr, ip_str);
printf("%s\n", ip_str);
if (net_dns_env_var)
- setenv(net_dns_env_var, ip_str);
+ env_set(net_dns_env_var, ip_str);
} else {
puts("server responded with invalid IP number\n");
}
int eth_init(void)
{
- char *ethact = getenv("ethact");
- char *ethrotate = getenv("ethrotate");
+ char *ethact = env_get("ethact");
+ char *ethrotate = env_get("ethrotate");
struct udevice *current = NULL;
struct udevice *old_current;
int ret = -ENODEV;
printf("No ethernet found.\n");
bootstage_error(BOOTSTAGE_ID_NET_ETH_START);
} else {
- char *ethprime = getenv("ethprime");
+ char *ethprime = env_get("ethprime");
struct udevice *prime_dev = NULL;
if (ethprime)
if (eth_get_ops(dev)->read_rom_hwaddr)
eth_get_ops(dev)->read_rom_hwaddr(dev);
- eth_getenv_enetaddr_by_index("eth", dev->seq, env_enetaddr);
+ eth_env_get_enetaddr_by_index("eth", dev->seq, env_enetaddr);
if (!is_zero_ethaddr(env_enetaddr)) {
if (!is_zero_ethaddr(pdata->enetaddr) &&
memcmp(pdata->enetaddr, env_enetaddr, ARP_HLEN)) {
/* Override the ROM MAC address */
memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN);
} else if (is_valid_ethaddr(pdata->enetaddr)) {
- eth_setenv_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
+ eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
printf("\nWarning: %s using MAC address from ROM\n",
dev->name);
} else if (is_zero_ethaddr(pdata->enetaddr) ||
}
}
-int eth_getenv_enetaddr(const char *name, uchar *enetaddr)
+int eth_env_get_enetaddr(const char *name, uchar *enetaddr)
{
- eth_parse_enetaddr(getenv(name), enetaddr);
+ eth_parse_enetaddr(env_get(name), enetaddr);
return is_valid_ethaddr(enetaddr);
}
-int eth_setenv_enetaddr(const char *name, const uchar *enetaddr)
+int eth_env_set_enetaddr(const char *name, const uchar *enetaddr)
{
char buf[ARP_HLEN_ASCII + 1];
- if (eth_getenv_enetaddr(name, (uchar *)buf))
+ if (eth_env_get_enetaddr(name, (uchar *)buf))
return -EEXIST;
sprintf(buf, "%pM", enetaddr);
- return setenv(name, buf);
+ return env_set(name, buf);
}
-int eth_getenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_get_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr)
{
char enetvar[32];
sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
- return eth_getenv_enetaddr(enetvar, enetaddr);
+ return eth_env_get_enetaddr(enetvar, enetaddr);
}
-int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_set_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr)
{
char enetvar[32];
sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
- return eth_setenv_enetaddr(enetvar, enetaddr);
+ return eth_env_set_enetaddr(enetvar, enetaddr);
}
void eth_common_init(void)
char *skip_state;
sprintf(enetvar, index ? "eth%dmacskip" : "ethmacskip", index);
- skip_state = getenv(enetvar);
+ skip_state = env_get(enetvar);
return skip_state != NULL;
}
void eth_current_changed(void)
{
- char *act = getenv("ethact");
+ char *act = env_get("ethact");
char *ethrotate;
/*
* ethernet device if uc_priv->current == NULL. This is not what
* we want when 'ethrotate' variable is 'no'.
*/
- ethrotate = getenv("ethrotate");
+ ethrotate = env_get("ethrotate");
if ((ethrotate != NULL) && (strcmp(ethrotate, "no") == 0))
return;
/* update current ethernet name */
if (eth_get_dev()) {
if (act == NULL || strcmp(act, eth_get_name()) != 0)
- setenv("ethact", eth_get_name());
+ env_set("ethact", eth_get_name());
}
/*
* remove the variable completely if there is no active
* interface
*/
else if (act != NULL)
- setenv("ethact", NULL);
+ env_set("ethact", NULL);
}
void eth_try_another(int first_restart)
* Do not rotate between network interfaces when
* 'ethrotate' variable is set to 'no'.
*/
- ethrotate = getenv("ethrotate");
+ ethrotate = env_get("ethrotate");
if ((ethrotate != NULL) && (strcmp(ethrotate, "no") == 0))
return;
env_id = get_env_id();
if ((act == NULL) || (env_changed_id != env_id)) {
- act = getenv("ethact");
+ act = env_get("ethact");
env_changed_id = env_id;
}
if (act == NULL) {
- char *ethprime = getenv("ethprime");
+ char *ethprime = env_get("ethprime");
void *dev = NULL;
if (ethprime)
void eth_common_init(void);
/**
- * eth_setenv_enetaddr_by_index() - set the MAC address environment variable
+ * eth_env_set_enetaddr_by_index() - set the MAC address environment variable
*
* This sets up an environment variable with the given MAC address (@enetaddr).
* The environment variable to be set is defined by <@base_name><@index>addr.
* @enetaddr: Pointer to MAC address to put into the variable
* @return 0 if OK, other value on error
*/
-int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_set_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
int eth_mac_skip(int index);
unsigned char env_enetaddr[ARP_HLEN];
int ret = 0;
- eth_getenv_enetaddr_by_index(base_name, eth_number, env_enetaddr);
+ eth_env_get_enetaddr_by_index(base_name, eth_number, env_enetaddr);
if (!is_zero_ethaddr(env_enetaddr)) {
if (!is_zero_ethaddr(dev->enetaddr) &&
memcpy(dev->enetaddr, env_enetaddr, ARP_HLEN);
} else if (is_valid_ethaddr(dev->enetaddr)) {
- eth_setenv_enetaddr_by_index(base_name, eth_number,
- dev->enetaddr);
+ eth_env_set_enetaddr_by_index(base_name, eth_number,
+ dev->enetaddr);
} else if (is_zero_ethaddr(dev->enetaddr)) {
#ifdef CONFIG_NET_RANDOM_ETHADDR
net_random_ethaddr(dev->enetaddr);
bootstage_error(BOOTSTAGE_ID_NET_ETH_START);
} else {
struct eth_device *dev = eth_devices;
- char *ethprime = getenv("ethprime");
+ char *ethprime = env_get("ethprime");
bootstage_mark(BOOTSTAGE_ID_NET_ETH_INIT);
do {
void link_local_start(void)
{
- ip = getenv_ip("llipaddr");
+ ip = env_get_ip("llipaddr");
if (ip.s_addr != 0 &&
(ntohl(ip.s_addr) & IN_CLASSB_NET) != LINKLOCAL_ADDR) {
puts("invalid link address");
void net_auto_load(void)
{
#if defined(CONFIG_CMD_NFS)
- const char *s = getenv("autoload");
+ const char *s = env_get("autoload");
if (s != NULL && strcmp(s, "NFS") == 0) {
/*
return;
}
#endif
- if (getenv_yesno("autoload") == 0) {
+ if (env_get_yesno("autoload") == 0) {
/*
* Just use BOOTP/RARP to configure system;
* Do not use TFTP to load the bootfile.
if (net_boot_file_size > 0) {
printf("Bytes transferred = %d (%x hex)\n",
net_boot_file_size, net_boot_file_size);
- setenv_hex("filesize", net_boot_file_size);
- setenv_hex("fileaddr", load_addr);
+ env_set_hex("filesize", net_boot_file_size);
+ env_set_hex("fileaddr", load_addr);
}
if (protocol != NETCONS)
eth_halt();
unsigned long retrycnt = 0;
int ret;
- nretry = getenv("netretry");
+ nretry = env_get("netretry");
if (nretry) {
if (!strcmp(nretry, "yes"))
retry_forever = 1;
return htons(id);
}
-ushort getenv_vlan(char *var)
+ushort env_get_vlan(char *var)
{
- return string_to_vlan(getenv(var));
+ return string_to_vlan(env_get(var));
}
* TFTP protocol has a minimal timeout of 1 second.
*/
- ep = getenv("tftpblocksize");
+ ep = env_get("tftpblocksize");
if (ep != NULL)
tftp_block_size_option = simple_strtol(ep, NULL, 10);
- ep = getenv("tftptimeout");
+ ep = env_get("tftptimeout");
if (ep != NULL)
timeout_ms = simple_strtol(ep, NULL, 10);
timeout_ms = 1000;
}
- ep = getenv("tftptimeoutcountmax");
+ ep = env_get("tftptimeoutcountmax");
if (ep != NULL)
tftp_timeout_count_max = simple_strtol(ep, NULL, 10);
tftp_our_port = 1024 + (get_timer(0) % 3072);
#ifdef CONFIG_TFTP_PORT
- ep = getenv("tftpdstp");
+ ep = env_get("tftpdstp");
if (ep != NULL)
tftp_remote_port = simple_strtol(ep, NULL, 10);
- ep = getenv("tftpsrcp");
+ ep = env_get("tftpsrcp");
if (ep != NULL)
tftp_our_port = simple_strtol(ep, NULL, 10);
#endif
int i, j;
for (i = 0; i < varnum; i++) {
- if (getenv_f(var[i], list, sizeof(list)) <= 0)
+ if (env_get_f(var[i], list, sizeof(list)) <= 0)
continue;
for (j = 0; j < post_list_size; j++)
# Special handling for a few options which support SPL/TPL
ifeq ($(CONFIG_TPL_BUILD),y)
-libs-$(CONFIG_TPL_LIBCOMMON_SUPPORT) += common/ cmd/
+libs-$(CONFIG_TPL_LIBCOMMON_SUPPORT) += common/ cmd/ env/
libs-$(CONFIG_TPL_LIBGENERIC_SUPPORT) += lib/
else
-libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/ cmd/
+libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/ cmd/ env/
libs-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/
endif
u-boot-spl-init := $(head-y)
u-boot-spl-main := $(libs-y)
-ifdef CONFIG_SPL_OF_PLATDATA
+ifdef CONFIG_$(SPL_TPL_)OF_PLATDATA
u-boot-spl-platdata := $(obj)/dts/dt-platdata.o
endif
# Linker Script
-ifdef CONFIG_SPL_LDSCRIPT
+# First test whether there's a linker-script for the specific stage defined...
+ifneq ($(CONFIG_$(SPL_TPL_)LDSCRIPT),)
+# need to strip off double quotes
+LDSCRIPT := $(addprefix $(srctree)/,$(CONFIG_$(SPL_TPL_)LDSCRIPT:"%"=%))
+else
+# ...then fall back to the generic SPL linker-script
+ifneq ($(CONFIG_SPL_LDSCRIPT),)
# need to strip off double quotes
LDSCRIPT := $(addprefix $(srctree)/,$(CONFIG_SPL_LDSCRIPT:"%"=%))
endif
+endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(srctree)/board/$(BOARDDIR)/u-boot-spl.lds
quiet_cmd_copy = COPY $@
cmd_copy = cp $< $@
-ifeq ($(CONFIG_SPL_OF_CONTROL)$(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),yy)
+ifeq ($(CONFIG_$(SPL_TPL_)OF_CONTROL)$(CONFIG_OF_SEPARATE)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
$(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
$(if $(CONFIG_SPL_SEPARATE_BSS),,$(obj)/$(SPL_BIN)-pad.bin) \
$(obj)/$(SPL_BIN).dtb FORCE
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_$(SPL_BIN) += $(call ld-option, --no-dynamic-linker)
+# First try the best-match (i.e. SPL_TEXT_BASE for SPL, TPL_TEXT_BASE for TPL)
+ifneq ($(CONFIG_$(SPL_TPL_)TEXT_BASE),)
+LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_$(SPL_TPL_)TEXT_BASE)
+else
+# And then fall back to just testing for SPL_TEXT_BASE, even if in TPL mode
ifneq ($(CONFIG_SPL_TEXT_BASE),)
LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
endif
+endif
MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
$(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
CONFIG_ATI
CONFIG_ATI_RADEON_FB
CONFIG_ATM
-CONFIG_ATMEL_DATAFLASH_SPI
CONFIG_ATMEL_LCD
CONFIG_ATMEL_LCD_BGR555
CONFIG_ATMEL_LCD_RGB565
CONFIG_BOARD_TYPES
CONFIG_BOOGER
CONFIG_BOOM
-CONFIG_BOOTARGS
-CONFIG_BOOTARGS_AXM
-CONFIG_BOOTARGS_TAURUS
CONFIG_BOOTBLOCK
CONFIG_BOOTCOMMAND
CONFIG_BOOTCOUNT_ALEN
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_MAX6957
-CONFIG_CMD_MEM
-CONFIG_CMD_MFSL
-CONFIG_CMD_MMC_SPI
-CONFIG_CMD_MTDPARTS_SPREAD
-CONFIG_CMD_ONENAND
-CONFIG_CMD_PCA953X
-CONFIG_CMD_PCA953X_INFO
-CONFIG_CMD_PCI
-CONFIG_CMD_PCI_ENUM
-CONFIG_CMD_PCMCIA
-CONFIG_CMD_PORTIO
-CONFIG_CMD_READ
-CONFIG_CMD_REGINFO
-CONFIG_CMD_REISER
-CONFIG_CMD_SANDBOX
-CONFIG_CMD_SAVES
-CONFIG_CMD_SCSI
-CONFIG_CMD_SDRAM
-CONFIG_CMD_SF_TEST
-CONFIG_CMD_SH_ZIMAGEBOOT
-CONFIG_CMD_SPL
-CONFIG_CMD_SPL_NAND_OFS
-CONFIG_CMD_SPL_WRITE_SIZE
-CONFIG_CMD_STRINGS
-CONFIG_CMD_SX151X
-CONFIG_CMD_TCA642X
-CONFIG_CMD_TERMINAL
-CONFIG_CMD_TFTP
-CONFIG_CMD_THOR_DOWNLOAD
-CONFIG_CMD_TRACE
-CONFIG_CMD_TSI148
-CONFIG_CMD_UNIVERSE
-CONFIG_CMD_UUID
-CONFIG_CMD_ZBOOT
-CONFIG_CMD_ZFS
CONFIG_CM_INIT
CONFIG_CM_MULTIPLE_SSRAM
CONFIG_CM_REMAP
CONFIG_MXS_SPI
CONFIG_MX_CYCLIC
CONFIG_MY_OPTION
-CONFIG_NAND
CONFIG_NANDFLASH_SIZE
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
CONFIG_NAND_ACTL
CONFIG_PHY_ID
CONFIG_PHY_INTERFACE_MODE
CONFIG_PHY_IRAM_BASE
-CONFIG_PHY_KSZ9031
CONFIG_PHY_M88E1111
CONFIG_PHY_MAX_ADDR
CONFIG_PHY_MODE_NEED_CHANGE
CONFIG_SPL_INIT_MINIMAL
CONFIG_SPL_JR0_LIODN_NS
CONFIG_SPL_JR0_LIODN_S
-CONFIG_SPL_LDSCRIPT
CONFIG_SPL_LOAD_FIT_ADDRESS
CONFIG_SPL_MAX_FOOTPRINT
CONFIG_SPL_MAX_PEB_SIZE
CONFIG_STM32_HSE_HZ
CONFIG_STM32_HZ
CONFIG_STM32_SERIAL
+CONFIG_STMARK2
CONFIG_STRIDER
CONFIG_STRIDER_CON
CONFIG_STRIDER_CON_DP
CONFIG_SUPPORT_RAW_INITRD
CONFIG_SUPPORT_VFAT
CONFIG_SUVD3
-CONFIG_SX151X_GPIO_COUNT_8
-CONFIG_SX151X_SPI_BUS
CONFIG_SXNI855T
CONFIG_SYSCOUNTER_TIMER
CONFIG_SYSFLAGS_ADDR
CONFIG_SYS_DA850_PLL1_PLLM
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_SYSCFG_SUSPSRC
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
CONFIG_SYS_PCI_TBATR5
CONFIG_SYS_PCI_VIRT
CONFIG_SYS_PCMCIA_ATTR_BASE
-CONFIG_SYS_PCMCIA_CIS_WIN
-CONFIG_SYS_PCMCIA_CIS_WIN_SIZE
CONFIG_SYS_PCMCIA_IO_BASE
-CONFIG_SYS_PCMCIA_IO_WIN
-CONFIG_SYS_PCMCIA_IO_WIN_SIZE
CONFIG_SYS_PCMCIA_MEM_ADDR
CONFIG_SYS_PCMCIA_MEM_SIZE
CONFIG_SYS_PCMCIA_PBR0
CONFIG_TI_KSNAV
CONFIG_TI_SPI_MMAP
CONFIG_TMU_TIMER
-CONFIG_TPL_DRIVERS_MISC_SUPPORT
CONFIG_TPL_PAD_TO
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_TPS6586X_POWER
CONFIG_UPDATE_TFTP_CNT_MAX
CONFIG_UPDATE_TFTP_MSEC_MAX
CONFIG_USART1
-CONFIG_USART3
CONFIG_USART_BASE
CONFIG_USART_ID
CONFIG_USBBOOTCOMMAND
CONFIG_USB_MUSB_TIMEOUT
CONFIG_USB_MUSB_TUSB6010
CONFIG_USB_MUSB_UDC
-CONFIG_USB_MUSB_UDD
CONFIG_USB_OHCI
CONFIG_USB_OHCI_EP93XX
CONFIG_USB_OHCI_LPC32XX
CONFIG_VIDEO_MXS
CONFIG_VIDEO_MXS_MODE_SYSTEM
CONFIG_VIDEO_OMAP3
-CONFIG_VIDEO_ONBOARD
CONFIG_VIDEO_STD_TIMINGS
CONFIG_VIDEO_SUNXI
CONFIG_VIDEO_VCXK
fi
if test -e include/config/auto.conf; then
- . include/config/auto.conf
+ # We are interested only in CONFIG_LOCALVERSION and
+ # CONFIG_LOCALVERSION_AUTO, so extract these in a safe
+ # way (i.e. w/o sourcing auto.conf)
+ CONFIG_LOCALVERSION=`cat include/config/auto.conf | awk -F '=' '/^CONFIG_LOCALVERSION=/ {print $2}'`
+ CONFIG_LOCALVERSION_AUTO=`cat include/config/auto.conf | awk -F '=' '/^CONFIG_LOCALVERSION_AUTO=/ {print $2}'`
else
echo "Error: kernelrelease not valid - run 'make prepare' to update it"
exit 1
/* commands separated by \n */
run_command_list("setenv list 1\n setenv list ${list}1", -1, 0);
- assert(!strcmp("11", getenv("list")));
+ assert(!strcmp("11", env_get("list")));
/* command followed by \n and nothing else */
run_command_list("setenv list 1${list}\n", -1, 0);
- assert(!strcmp("111", getenv("list")));
+ assert(!strcmp("111", env_get("list")));
/* a command string with \0 in it. Stuff after \0 should be ignored */
run_command("setenv list", 0);
run_command_list(test_cmd, sizeof(test_cmd), 0);
- assert(!strcmp("123", getenv("list")));
+ assert(!strcmp("123", env_get("list")));
/*
* a command list where we limit execution to only the first command
*/
run_command_list("setenv list 1\n setenv list ${list}2; "
"setenv list ${list}3", strlen("setenv list 1"), 0);
- assert(!strcmp("1", getenv("list")));
+ assert(!strcmp("1", env_get("list")));
assert(run_command("false", 0) == 1);
assert(run_command("echo", 0) == 0);
#ifdef CONFIG_HUSH_PARSER
run_command("setenv foo 'setenv black 1\nsetenv adder 2'", 0);
run_command("run foo", 0);
- assert(getenv("black") != NULL);
- assert(!strcmp("1", getenv("black")));
- assert(getenv("adder") != NULL);
- assert(!strcmp("2", getenv("adder")));
+ assert(env_get("black") != NULL);
+ assert(!strcmp("1", env_get("black")));
+ assert(env_get("adder") != NULL);
+ assert(!strcmp("2", env_get("adder")));
#endif
assert(run_command("", 0) == 0);
{
net_ping_ip = string_to_ip("1.1.2.2");
- setenv("ethact", "eth@10002000");
+ env_set("ethact", "eth@10002000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
- setenv("ethact", "eth@10003000");
+ env_set("ethact", "eth@10003000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10003000", getenv("ethact"));
+ ut_asserteq_str("eth@10003000", env_get("ethact"));
- setenv("ethact", "eth@10004000");
+ env_set("ethact", "eth@10004000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
return 0;
}
static int dm_test_eth_alias(struct unit_test_state *uts)
{
net_ping_ip = string_to_ip("1.1.2.2");
- setenv("ethact", "eth0");
+ env_set("ethact", "eth0");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
- setenv("ethact", "eth1");
+ env_set("ethact", "eth1");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
/* Expected to fail since eth2 is not defined in the device tree */
- setenv("ethact", "eth2");
+ env_set("ethact", "eth2");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
- setenv("ethact", "eth5");
+ env_set("ethact", "eth5");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10003000", getenv("ethact"));
+ ut_asserteq_str("eth@10003000", env_get("ethact"));
return 0;
}
net_ping_ip = string_to_ip("1.1.2.2");
/* Expected to be "eth@10003000" because of ethprime variable */
- setenv("ethact", NULL);
- setenv("ethprime", "eth5");
+ env_set("ethact", NULL);
+ env_set("ethprime", "eth5");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10003000", getenv("ethact"));
+ ut_asserteq_str("eth@10003000", env_get("ethact"));
/* Expected to be "eth@10002000" because it is first */
- setenv("ethact", NULL);
- setenv("ethprime", NULL);
+ env_set("ethact", NULL);
+ env_set("ethprime", NULL);
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
return 0;
}
ut_assertok(device_remove(dev[i], DM_REMOVE_NORMAL));
/* Invalidate MAC address */
- strcpy(ethaddr[i], getenv(addrname[i]));
+ strcpy(ethaddr[i], env_get(addrname[i]));
/* Must disable access protection for ethaddr before clearing */
- setenv(".flags", addrname[i]);
- setenv(addrname[i], NULL);
+ env_set(".flags", addrname[i]);
+ env_set(addrname[i], NULL);
}
/* Set ethact to "eth@10002000" */
- setenv("ethact", ethname[0]);
+ env_set("ethact", ethname[0]);
/* Segment fault might happen if something is wrong */
ut_asserteq(-ENODEV, net_loop(PING));
for (i = 0; i < DM_TEST_ETH_NUM; i++) {
/* Restore the env */
- setenv(".flags", addrname[i]);
- setenv(addrname[i], ethaddr[i]);
+ env_set(".flags", addrname[i]);
+ env_set(addrname[i], ethaddr[i]);
/* Probe the device again */
ut_assertok(device_probe(dev[i]));
}
- setenv(".flags", NULL);
- setenv("ethact", NULL);
+ env_set(".flags", NULL);
+ env_set("ethact", NULL);
return 0;
}
static int _dm_test_eth_rotate1(struct unit_test_state *uts)
{
/* Make sure that the default is to rotate to the next interface */
- setenv("ethact", "eth@10004000");
+ env_set("ethact", "eth@10004000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
/* If ethrotate is no, then we should fail on a bad MAC */
- setenv("ethact", "eth@10004000");
- setenv("ethrotate", "no");
+ env_set("ethact", "eth@10004000");
+ env_set("ethrotate", "no");
ut_asserteq(-EINVAL, net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
return 0;
}
static int _dm_test_eth_rotate2(struct unit_test_state *uts)
{
/* Make sure we can skip invalid devices */
- setenv("ethact", "eth@10004000");
+ env_set("ethact", "eth@10004000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
/* Make sure we can handle device name which is not eth# */
- setenv("ethact", "sbe5");
+ env_set("ethact", "sbe5");
ut_assertok(net_loop(PING));
- ut_asserteq_str("sbe5", getenv("ethact"));
+ ut_asserteq_str("sbe5", env_get("ethact"));
return 0;
}
net_ping_ip = string_to_ip("1.1.2.2");
/* Invalidate eth1's MAC address */
- strcpy(ethaddr, getenv("eth1addr"));
+ strcpy(ethaddr, env_get("eth1addr"));
/* Must disable access protection for eth1addr before clearing */
- setenv(".flags", "eth1addr");
- setenv("eth1addr", NULL);
+ env_set(".flags", "eth1addr");
+ env_set("eth1addr", NULL);
retval = _dm_test_eth_rotate1(uts);
/* Restore the env */
- setenv("eth1addr", ethaddr);
- setenv("ethrotate", NULL);
+ env_set("eth1addr", ethaddr);
+ env_set("ethrotate", NULL);
if (!retval) {
/* Invalidate eth0's MAC address */
- strcpy(ethaddr, getenv("ethaddr"));
+ strcpy(ethaddr, env_get("ethaddr"));
/* Must disable access protection for ethaddr before clearing */
- setenv(".flags", "ethaddr");
- setenv("ethaddr", NULL);
+ env_set(".flags", "ethaddr");
+ env_set("ethaddr", NULL);
retval = _dm_test_eth_rotate2(uts);
/* Restore the env */
- setenv("ethaddr", ethaddr);
+ env_set("ethaddr", ethaddr);
}
/* Restore the env */
- setenv(".flags", NULL);
+ env_set(".flags", NULL);
return retval;
}
* the active device should be eth0
*/
sandbox_eth_disable_response(1, true);
- setenv("ethact", "eth@10004000");
- setenv("netretry", "yes");
+ env_set("ethact", "eth@10004000");
+ env_set("netretry", "yes");
sandbox_eth_skip_timeout();
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
/*
* eth1 is disabled and netretry is no, so the ping should fail and the
* active device should be eth1
*/
- setenv("ethact", "eth@10004000");
- setenv("netretry", "no");
+ env_set("ethact", "eth@10004000");
+ env_set("netretry", "no");
sandbox_eth_skip_timeout();
ut_asserteq(-ETIMEDOUT, net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
return 0;
}
retval = _dm_test_net_retry(uts);
/* Restore the env */
- setenv("netretry", NULL);
+ env_set("netretry", NULL);
sandbox_eth_disable_response(1, false);
return retval;
+++ /dev/null
-#!/usr/bin/python
-#
-# Copyright (c) 2013, Google Inc.
-#
-# Sanity check of the FIT handling in U-Boot
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-# To run this:
-#
-# make O=sandbox sandbox_config
-# make O=sandbox
-# ./test/image/test-fit.py -u sandbox/u-boot
-#
-# Note: The above testing requires the Python development package, typically
-# called python-devel or something similar.
-
-import doctest
-from optparse import OptionParser
-import os
-import shutil
-import struct
-import sys
-import tempfile
-
-# Enable printing of all U-Boot output
-DEBUG = True
-
-# The 'command' library in patman is convenient for running commands
-base_path = os.path.dirname(sys.argv[0])
-patman = os.path.join(base_path, '../../tools/patman')
-sys.path.append(patman)
-
-import command
-
-# Define a base ITS which we can adjust using % and a dictionary
-base_its = '''
-/dts-v1/;
-
-/ {
- description = "Chrome OS kernel image with one or more FDT blobs";
- #address-cells = <1>;
-
- images {
- kernel@1 {
- data = /incbin/("%(kernel)s");
- type = "kernel";
- arch = "sandbox";
- os = "linux";
- compression = "none";
- load = <0x40000>;
- entry = <0x8>;
- };
- kernel@2 {
- data = /incbin/("%(loadables1)s");
- type = "kernel";
- arch = "sandbox";
- os = "linux";
- compression = "none";
- %(loadables1_load)s
- entry = <0x0>;
- };
- fdt@1 {
- description = "snow";
- data = /incbin/("u-boot.dtb");
- type = "flat_dt";
- arch = "sandbox";
- %(fdt_load)s
- compression = "none";
- signature@1 {
- algo = "sha1,rsa2048";
- key-name-hint = "dev";
- };
- };
- ramdisk@1 {
- description = "snow";
- data = /incbin/("%(ramdisk)s");
- type = "ramdisk";
- arch = "sandbox";
- os = "linux";
- %(ramdisk_load)s
- compression = "none";
- };
- ramdisk@2 {
- description = "snow";
- data = /incbin/("%(loadables2)s");
- type = "ramdisk";
- arch = "sandbox";
- os = "linux";
- %(loadables2_load)s
- compression = "none";
- };
- };
- configurations {
- default = "conf@1";
- conf@1 {
- kernel = "kernel@1";
- fdt = "fdt@1";
- %(ramdisk_config)s
- %(loadables_config)s
- };
- };
-};
-'''
-
-# Define a base FDT - currently we don't use anything in this
-base_fdt = '''
-/dts-v1/;
-
-/ {
- model = "Sandbox Verified Boot Test";
- compatible = "sandbox";
-
- reset@0 {
- compatible = "sandbox,reset";
- };
-
-};
-'''
-
-# This is the U-Boot script that is run for each test. First load the FIT,
-# then run the 'bootm' command, then save out memory from the places where
-# we expect 'bootm' to write things. Then quit.
-base_script = '''
-sb load hostfs 0 %(fit_addr)x %(fit)s
-fdt addr %(fit_addr)x
-bootm start %(fit_addr)x
-bootm loados
-sb save hostfs 0 %(kernel_addr)x %(kernel_out)s %(kernel_size)x
-sb save hostfs 0 %(fdt_addr)x %(fdt_out)s %(fdt_size)x
-sb save hostfs 0 %(ramdisk_addr)x %(ramdisk_out)s %(ramdisk_size)x
-sb save hostfs 0 %(loadables1_addr)x %(loadables1_out)s %(loadables1_size)x
-sb save hostfs 0 %(loadables2_addr)x %(loadables2_out)s %(loadables2_size)x
-reset
-'''
-
-def debug_stdout(stdout):
- if DEBUG:
- print stdout
-
-def make_fname(leaf):
- """Make a temporary filename
-
- Args:
- leaf: Leaf name of file to create (within temporary directory)
- Return:
- Temporary filename
- """
- global base_dir
-
- return os.path.join(base_dir, leaf)
-
-def filesize(fname):
- """Get the size of a file
-
- Args:
- fname: Filename to check
- Return:
- Size of file in bytes
- """
- return os.stat(fname).st_size
-
-def read_file(fname):
- """Read the contents of a file
-
- Args:
- fname: Filename to read
- Returns:
- Contents of file as a string
- """
- with open(fname, 'r') as fd:
- return fd.read()
-
-def make_dtb():
- """Make a sample .dts file and compile it to a .dtb
-
- Returns:
- Filename of .dtb file created
- """
- src = make_fname('u-boot.dts')
- dtb = make_fname('u-boot.dtb')
- with open(src, 'w') as fd:
- print >>fd, base_fdt
- command.Output('dtc', src, '-O', 'dtb', '-o', dtb)
- return dtb
-
-def make_its(params):
- """Make a sample .its file with parameters embedded
-
- Args:
- params: Dictionary containing parameters to embed in the %() strings
- Returns:
- Filename of .its file created
- """
- its = make_fname('test.its')
- with open(its, 'w') as fd:
- print >>fd, base_its % params
- return its
-
-def make_fit(mkimage, params):
- """Make a sample .fit file ready for loading
-
- This creates a .its script with the selected parameters and uses mkimage to
- turn this into a .fit image.
-
- Args:
- mkimage: Filename of 'mkimage' utility
- params: Dictionary containing parameters to embed in the %() strings
- Return:
- Filename of .fit file created
- """
- fit = make_fname('test.fit')
- its = make_its(params)
- command.Output(mkimage, '-f', its, fit)
- with open(make_fname('u-boot.dts'), 'w') as fd:
- print >>fd, base_fdt
- return fit
-
-def make_kernel(filename, text):
- """Make a sample kernel with test data
-
- Args:
- filename: the name of the file you want to create
- Returns:
- Full path and filename of the kernel it created
- """
- fname = make_fname(filename)
- data = ''
- for i in range(100):
- data += 'this %s %d is unlikely to boot\n' % (text, i)
- with open(fname, 'w') as fd:
- print >>fd, data
- return fname
-
-def make_ramdisk(filename, text):
- """Make a sample ramdisk with test data
-
- Returns:
- Filename of ramdisk created
- """
- fname = make_fname(filename)
- data = ''
- for i in range(100):
- data += '%s %d was seldom used in the middle ages\n' % (text, i)
- with open(fname, 'w') as fd:
- print >>fd, data
- return fname
-
-def find_matching(text, match):
- """Find a match in a line of text, and return the unmatched line portion
-
- This is used to extract a part of a line from some text. The match string
- is used to locate the line - we use the first line that contains that
- match text.
-
- Once we find a match, we discard the match string itself from the line,
- and return what remains.
-
- TODO: If this function becomes more generally useful, we could change it
- to use regex and return groups.
-
- Args:
- text: Text to check (each line separated by \n)
- match: String to search for
- Return:
- String containing unmatched portion of line
- Exceptions:
- ValueError: If match is not found
-
- >>> find_matching('first line:10\\nsecond_line:20', 'first line:')
- '10'
- >>> find_matching('first line:10\\nsecond_line:20', 'second line')
- Traceback (most recent call last):
- ...
- ValueError: Test aborted
- >>> find_matching('first line:10\\nsecond_line:20', 'second_line:')
- '20'
- """
- for line in text.splitlines():
- pos = line.find(match)
- if pos != -1:
- return line[:pos] + line[pos + len(match):]
-
- print "Expected '%s' but not found in output:"
- print text
- raise ValueError('Test aborted')
-
-def set_test(name):
- """Set the name of the current test and print a message
-
- Args:
- name: Name of test
- """
- global test_name
-
- test_name = name
- print name
-
-def fail(msg, stdout):
- """Raise an error with a helpful failure message
-
- Args:
- msg: Message to display
- """
- print stdout
- raise ValueError("Test '%s' failed: %s" % (test_name, msg))
-
-def run_fit_test(mkimage, u_boot):
- """Basic sanity check of FIT loading in U-Boot
-
- TODO: Almost everything:
- - hash algorithms - invalid hash/contents should be detected
- - signature algorithms - invalid sig/contents should be detected
- - compression
- - checking that errors are detected like:
- - image overwriting
- - missing images
- - invalid configurations
- - incorrect os/arch/type fields
- - empty data
- - images too large/small
- - invalid FDT (e.g. putting a random binary in instead)
- - default configuration selection
- - bootm command line parameters should have desired effect
- - run code coverage to make sure we are testing all the code
- """
- global test_name
-
- # Set up invariant files
- control_dtb = make_dtb()
- kernel = make_kernel('test-kernel.bin', 'kernel')
- ramdisk = make_ramdisk('test-ramdisk.bin', 'ramdisk')
- loadables1 = make_kernel('test-loadables1.bin', 'lenrek')
- loadables2 = make_ramdisk('test-loadables2.bin', 'ksidmar')
- kernel_out = make_fname('kernel-out.bin')
- fdt_out = make_fname('fdt-out.dtb')
- ramdisk_out = make_fname('ramdisk-out.bin')
- loadables1_out = make_fname('loadables1-out.bin')
- loadables2_out = make_fname('loadables2-out.bin')
-
- # Set up basic parameters with default values
- params = {
- 'fit_addr' : 0x1000,
-
- 'kernel' : kernel,
- 'kernel_out' : kernel_out,
- 'kernel_addr' : 0x40000,
- 'kernel_size' : filesize(kernel),
-
- 'fdt_out' : fdt_out,
- 'fdt_addr' : 0x80000,
- 'fdt_size' : filesize(control_dtb),
- 'fdt_load' : '',
-
- 'ramdisk' : ramdisk,
- 'ramdisk_out' : ramdisk_out,
- 'ramdisk_addr' : 0xc0000,
- 'ramdisk_size' : filesize(ramdisk),
- 'ramdisk_load' : '',
- 'ramdisk_config' : '',
-
- 'loadables1' : loadables1,
- 'loadables1_out' : loadables1_out,
- 'loadables1_addr' : 0x100000,
- 'loadables1_size' : filesize(loadables1),
- 'loadables1_load' : '',
-
- 'loadables2' : loadables2,
- 'loadables2_out' : loadables2_out,
- 'loadables2_addr' : 0x140000,
- 'loadables2_size' : filesize(loadables2),
- 'loadables2_load' : '',
-
- 'loadables_config' : '',
- }
-
- # Make a basic FIT and a script to load it
- fit = make_fit(mkimage, params)
- params['fit'] = fit
- cmd = base_script % params
-
- # First check that we can load a kernel
- # We could perhaps reduce duplication with some loss of readability
- set_test('Kernel load')
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(kernel) != read_file(kernel_out):
- fail('Kernel not loaded', stdout)
- if read_file(control_dtb) == read_file(fdt_out):
- fail('FDT loaded but should be ignored', stdout)
- if read_file(ramdisk) == read_file(ramdisk_out):
- fail('Ramdisk loaded but should not be', stdout)
-
- # Find out the offset in the FIT where U-Boot has found the FDT
- line = find_matching(stdout, 'Booting using the FDT blob at ')
- fit_offset = int(line, 16) - params['fit_addr']
- fdt_magic = struct.pack('>L', 0xd00dfeed)
- data = read_file(fit)
-
- # Now find where it actually is in the FIT (skip the first word)
- real_fit_offset = data.find(fdt_magic, 4)
- if fit_offset != real_fit_offset:
- fail('U-Boot loaded FDT from offset %#x, FDT is actually at %#x' %
- (fit_offset, real_fit_offset), stdout)
-
- # Now a kernel and an FDT
- set_test('Kernel + FDT load')
- params['fdt_load'] = 'load = <%#x>;' % params['fdt_addr']
- fit = make_fit(mkimage, params)
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(kernel) != read_file(kernel_out):
- fail('Kernel not loaded', stdout)
- if read_file(control_dtb) != read_file(fdt_out):
- fail('FDT not loaded', stdout)
- if read_file(ramdisk) == read_file(ramdisk_out):
- fail('Ramdisk loaded but should not be', stdout)
-
- # Try a ramdisk
- set_test('Kernel + FDT + Ramdisk load')
- params['ramdisk_config'] = 'ramdisk = "ramdisk@1";'
- params['ramdisk_load'] = 'load = <%#x>;' % params['ramdisk_addr']
- fit = make_fit(mkimage, params)
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(ramdisk) != read_file(ramdisk_out):
- fail('Ramdisk not loaded', stdout)
-
- # Configuration with some Loadables
- set_test('Kernel + FDT + Ramdisk load + Loadables')
- params['loadables_config'] = 'loadables = "kernel@2", "ramdisk@2";'
- params['loadables1_load'] = 'load = <%#x>;' % params['loadables1_addr']
- params['loadables2_load'] = 'load = <%#x>;' % params['loadables2_addr']
- fit = make_fit(mkimage, params)
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(loadables1) != read_file(loadables1_out):
- fail('Loadables1 (kernel) not loaded', stdout)
- if read_file(loadables2) != read_file(loadables2_out):
- fail('Loadables2 (ramdisk) not loaded', stdout)
-
-def run_tests():
- """Parse options, run the FIT tests and print the result"""
- global base_path, base_dir
-
- # Work in a temporary directory
- base_dir = tempfile.mkdtemp()
- parser = OptionParser()
- parser.add_option('-u', '--u-boot',
- default=os.path.join(base_path, 'u-boot'),
- help='Select U-Boot sandbox binary')
- parser.add_option('-k', '--keep', action='store_true',
- help="Don't delete temporary directory even when tests pass")
- parser.add_option('-t', '--selftest', action='store_true',
- help='Run internal self tests')
- (options, args) = parser.parse_args()
-
- # Find the path to U-Boot, and assume mkimage is in its tools/mkimage dir
- base_path = os.path.dirname(options.u_boot)
- mkimage = os.path.join(base_path, 'tools/mkimage')
-
- # There are a few doctests - handle these here
- if options.selftest:
- doctest.testmod()
- return
-
- title = 'FIT Tests'
- print title, '\n', '=' * len(title)
-
- run_fit_test(mkimage, options.u_boot)
-
- print '\nTests passed'
- print 'Caveat: this is only a sanity check - test coverage is poor'
-
- # Remove the temporary directory unless we are asked to keep it
- if options.keep:
- print "Output files are in '%s'" % base_dir
- else:
- shutil.rmtree(base_dir)
-
-run_tests()
--- /dev/null
+# Copyright (c) 2013, Google Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Sanity check of the FIT handling in U-Boot
+
+import os
+import pytest
+import struct
+import u_boot_utils as util
+
+# Define a base ITS which we can adjust using % and a dictionary
+base_its = '''
+/dts-v1/;
+
+/ {
+ description = "Chrome OS kernel image with one or more FDT blobs";
+ #address-cells = <1>;
+
+ images {
+ kernel@1 {
+ data = /incbin/("%(kernel)s");
+ type = "kernel";
+ arch = "sandbox";
+ os = "linux";
+ compression = "none";
+ load = <0x40000>;
+ entry = <0x8>;
+ };
+ kernel@2 {
+ data = /incbin/("%(loadables1)s");
+ type = "kernel";
+ arch = "sandbox";
+ os = "linux";
+ compression = "none";
+ %(loadables1_load)s
+ entry = <0x0>;
+ };
+ fdt@1 {
+ description = "snow";
+ data = /incbin/("u-boot.dtb");
+ type = "flat_dt";
+ arch = "sandbox";
+ %(fdt_load)s
+ compression = "none";
+ signature@1 {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ };
+ };
+ ramdisk@1 {
+ description = "snow";
+ data = /incbin/("%(ramdisk)s");
+ type = "ramdisk";
+ arch = "sandbox";
+ os = "linux";
+ %(ramdisk_load)s
+ compression = "none";
+ };
+ ramdisk@2 {
+ description = "snow";
+ data = /incbin/("%(loadables2)s");
+ type = "ramdisk";
+ arch = "sandbox";
+ os = "linux";
+ %(loadables2_load)s
+ compression = "none";
+ };
+ };
+ configurations {
+ default = "conf@1";
+ conf@1 {
+ kernel = "kernel@1";
+ fdt = "fdt@1";
+ %(ramdisk_config)s
+ %(loadables_config)s
+ };
+ };
+};
+'''
+
+# Define a base FDT - currently we don't use anything in this
+base_fdt = '''
+/dts-v1/;
+
+/ {
+ model = "Sandbox Verified Boot Test";
+ compatible = "sandbox";
+
+ reset@0 {
+ compatible = "sandbox,reset";
+ };
+
+};
+'''
+
+# This is the U-Boot script that is run for each test. First load the FIT,
+# then run the 'bootm' command, then save out memory from the places where
+# we expect 'bootm' to write things. Then quit.
+base_script = '''
+sb load hostfs 0 %(fit_addr)x %(fit)s
+fdt addr %(fit_addr)x
+bootm start %(fit_addr)x
+bootm loados
+sb save hostfs 0 %(kernel_addr)x %(kernel_out)s %(kernel_size)x
+sb save hostfs 0 %(fdt_addr)x %(fdt_out)s %(fdt_size)x
+sb save hostfs 0 %(ramdisk_addr)x %(ramdisk_out)s %(ramdisk_size)x
+sb save hostfs 0 %(loadables1_addr)x %(loadables1_out)s %(loadables1_size)x
+sb save hostfs 0 %(loadables2_addr)x %(loadables2_out)s %(loadables2_size)x
+'''
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('fit_signature')
+def test_fit(u_boot_console):
+ def make_fname(leaf):
+ """Make a temporary filename
+
+ Args:
+ leaf: Leaf name of file to create (within temporary directory)
+ Return:
+ Temporary filename
+ """
+
+ return os.path.join(cons.config.build_dir, leaf)
+
+ def filesize(fname):
+ """Get the size of a file
+
+ Args:
+ fname: Filename to check
+ Return:
+ Size of file in bytes
+ """
+ return os.stat(fname).st_size
+
+ def read_file(fname):
+ """Read the contents of a file
+
+ Args:
+ fname: Filename to read
+ Returns:
+ Contents of file as a string
+ """
+ with open(fname, 'r') as fd:
+ return fd.read()
+
+ def make_dtb():
+ """Make a sample .dts file and compile it to a .dtb
+
+ Returns:
+ Filename of .dtb file created
+ """
+ src = make_fname('u-boot.dts')
+ dtb = make_fname('u-boot.dtb')
+ with open(src, 'w') as fd:
+ print >> fd, base_fdt
+ util.run_and_log(cons, ['dtc', src, '-O', 'dtb', '-o', dtb])
+ return dtb
+
+ def make_its(params):
+ """Make a sample .its file with parameters embedded
+
+ Args:
+ params: Dictionary containing parameters to embed in the %() strings
+ Returns:
+ Filename of .its file created
+ """
+ its = make_fname('test.its')
+ with open(its, 'w') as fd:
+ print >> fd, base_its % params
+ return its
+
+ def make_fit(mkimage, params):
+ """Make a sample .fit file ready for loading
+
+ This creates a .its script with the selected parameters and uses mkimage to
+ turn this into a .fit image.
+
+ Args:
+ mkimage: Filename of 'mkimage' utility
+ params: Dictionary containing parameters to embed in the %() strings
+ Return:
+ Filename of .fit file created
+ """
+ fit = make_fname('test.fit')
+ its = make_its(params)
+ util.run_and_log(cons, [mkimage, '-f', its, fit])
+ with open(make_fname('u-boot.dts'), 'w') as fd:
+ print >> fd, base_fdt
+ return fit
+
+ def make_kernel(filename, text):
+ """Make a sample kernel with test data
+
+ Args:
+ filename: the name of the file you want to create
+ Returns:
+ Full path and filename of the kernel it created
+ """
+ fname = make_fname(filename)
+ data = ''
+ for i in range(100):
+ data += 'this %s %d is unlikely to boot\n' % (text, i)
+ with open(fname, 'w') as fd:
+ print >> fd, data
+ return fname
+
+ def make_ramdisk(filename, text):
+ """Make a sample ramdisk with test data
+
+ Returns:
+ Filename of ramdisk created
+ """
+ fname = make_fname(filename)
+ data = ''
+ for i in range(100):
+ data += '%s %d was seldom used in the middle ages\n' % (text, i)
+ with open(fname, 'w') as fd:
+ print >> fd, data
+ return fname
+
+ def find_matching(text, match):
+ """Find a match in a line of text, and return the unmatched line portion
+
+ This is used to extract a part of a line from some text. The match string
+ is used to locate the line - we use the first line that contains that
+ match text.
+
+ Once we find a match, we discard the match string itself from the line,
+ and return what remains.
+
+ TODO: If this function becomes more generally useful, we could change it
+ to use regex and return groups.
+
+ Args:
+ text: Text to check (list of strings, one for each command issued)
+ match: String to search for
+ Return:
+ String containing unmatched portion of line
+ Exceptions:
+ ValueError: If match is not found
+
+ >>> find_matching(['first line:10', 'second_line:20'], 'first line:')
+ '10'
+ >>> find_matching(['first line:10', 'second_line:20'], 'second line')
+ Traceback (most recent call last):
+ ...
+ ValueError: Test aborted
+ >>> find_matching('first line:10\', 'second_line:20'], 'second_line:')
+ '20'
+ >>> find_matching('first line:10\', 'second_line:20\nthird_line:30'],
+ 'third_line:')
+ '30'
+ """
+ __tracebackhide__ = True
+ for line in '\n'.join(text).splitlines():
+ pos = line.find(match)
+ if pos != -1:
+ return line[:pos] + line[pos + len(match):]
+
+ pytest.fail("Expected '%s' but not found in output")
+
+ def check_equal(expected_fname, actual_fname, failure_msg):
+ """Check that a file matches its expected contents
+
+ Args:
+ expected_fname: Filename containing expected contents
+ actual_fname: Filename containing actual contents
+ failure_msg: Message to print on failure
+ """
+ expected_data = read_file(expected_fname)
+ actual_data = read_file(actual_fname)
+ assert expected_data == actual_data, failure_msg
+
+ def check_not_equal(expected_fname, actual_fname, failure_msg):
+ """Check that a file does not match its expected contents
+
+ Args:
+ expected_fname: Filename containing expected contents
+ actual_fname: Filename containing actual contents
+ failure_msg: Message to print on failure
+ """
+ expected_data = read_file(expected_fname)
+ actual_data = read_file(actual_fname)
+ assert expected_data != actual_data, failure_msg
+
+ def run_fit_test(mkimage):
+ """Basic sanity check of FIT loading in U-Boot
+
+ TODO: Almost everything:
+ - hash algorithms - invalid hash/contents should be detected
+ - signature algorithms - invalid sig/contents should be detected
+ - compression
+ - checking that errors are detected like:
+ - image overwriting
+ - missing images
+ - invalid configurations
+ - incorrect os/arch/type fields
+ - empty data
+ - images too large/small
+ - invalid FDT (e.g. putting a random binary in instead)
+ - default configuration selection
+ - bootm command line parameters should have desired effect
+ - run code coverage to make sure we are testing all the code
+ """
+ # Set up invariant files
+ control_dtb = make_dtb()
+ kernel = make_kernel('test-kernel.bin', 'kernel')
+ ramdisk = make_ramdisk('test-ramdisk.bin', 'ramdisk')
+ loadables1 = make_kernel('test-loadables1.bin', 'lenrek')
+ loadables2 = make_ramdisk('test-loadables2.bin', 'ksidmar')
+ kernel_out = make_fname('kernel-out.bin')
+ fdt_out = make_fname('fdt-out.dtb')
+ ramdisk_out = make_fname('ramdisk-out.bin')
+ loadables1_out = make_fname('loadables1-out.bin')
+ loadables2_out = make_fname('loadables2-out.bin')
+
+ # Set up basic parameters with default values
+ params = {
+ 'fit_addr' : 0x1000,
+
+ 'kernel' : kernel,
+ 'kernel_out' : kernel_out,
+ 'kernel_addr' : 0x40000,
+ 'kernel_size' : filesize(kernel),
+
+ 'fdt_out' : fdt_out,
+ 'fdt_addr' : 0x80000,
+ 'fdt_size' : filesize(control_dtb),
+ 'fdt_load' : '',
+
+ 'ramdisk' : ramdisk,
+ 'ramdisk_out' : ramdisk_out,
+ 'ramdisk_addr' : 0xc0000,
+ 'ramdisk_size' : filesize(ramdisk),
+ 'ramdisk_load' : '',
+ 'ramdisk_config' : '',
+
+ 'loadables1' : loadables1,
+ 'loadables1_out' : loadables1_out,
+ 'loadables1_addr' : 0x100000,
+ 'loadables1_size' : filesize(loadables1),
+ 'loadables1_load' : '',
+
+ 'loadables2' : loadables2,
+ 'loadables2_out' : loadables2_out,
+ 'loadables2_addr' : 0x140000,
+ 'loadables2_size' : filesize(loadables2),
+ 'loadables2_load' : '',
+
+ 'loadables_config' : '',
+ }
+
+ # Make a basic FIT and a script to load it
+ fit = make_fit(mkimage, params)
+ params['fit'] = fit
+ cmd = base_script % params
+
+ # First check that we can load a kernel
+ # We could perhaps reduce duplication with some loss of readability
+ cons.config.dtb = control_dtb
+ cons.restart_uboot()
+ with cons.log.section('Kernel load'):
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(kernel, kernel_out, 'Kernel not loaded')
+ check_not_equal(control_dtb, fdt_out,
+ 'FDT loaded but should be ignored')
+ check_not_equal(ramdisk, ramdisk_out,
+ 'Ramdisk loaded but should not be')
+
+ # Find out the offset in the FIT where U-Boot has found the FDT
+ line = find_matching(output, 'Booting using the fdt blob at ')
+ fit_offset = int(line, 16) - params['fit_addr']
+ fdt_magic = struct.pack('>L', 0xd00dfeed)
+ data = read_file(fit)
+
+ # Now find where it actually is in the FIT (skip the first word)
+ real_fit_offset = data.find(fdt_magic, 4)
+ assert fit_offset == real_fit_offset, (
+ 'U-Boot loaded FDT from offset %#x, FDT is actually at %#x' %
+ (fit_offset, real_fit_offset))
+
+ # Now a kernel and an FDT
+ with cons.log.section('Kernel + FDT load'):
+ params['fdt_load'] = 'load = <%#x>;' % params['fdt_addr']
+ fit = make_fit(mkimage, params)
+ cons.restart_uboot()
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(kernel, kernel_out, 'Kernel not loaded')
+ check_equal(control_dtb, fdt_out, 'FDT not loaded')
+ check_not_equal(ramdisk, ramdisk_out,
+ 'Ramdisk loaded but should not be')
+
+ # Try a ramdisk
+ with cons.log.section('Kernel + FDT + Ramdisk load'):
+ params['ramdisk_config'] = 'ramdisk = "ramdisk@1";'
+ params['ramdisk_load'] = 'load = <%#x>;' % params['ramdisk_addr']
+ fit = make_fit(mkimage, params)
+ cons.restart_uboot()
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(ramdisk, ramdisk_out, 'Ramdisk not loaded')
+
+ # Configuration with some Loadables
+ with cons.log.section('Kernel + FDT + Ramdisk load + Loadables'):
+ params['loadables_config'] = 'loadables = "kernel@2", "ramdisk@2";'
+ params['loadables1_load'] = ('load = <%#x>;' %
+ params['loadables1_addr'])
+ params['loadables2_load'] = ('load = <%#x>;' %
+ params['loadables2_addr'])
+ fit = make_fit(mkimage, params)
+ cons.restart_uboot()
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(loadables1, loadables1_out,
+ 'Loadables1 (kernel) not loaded')
+ check_equal(loadables2, loadables2_out,
+ 'Loadables2 (ramdisk) not loaded')
+
+ cons = u_boot_console
+ try:
+ # We need to use our own device tree file. Remember to restore it
+ # afterwards.
+ old_dtb = cons.config.dtb
+ mkimage = cons.config.build_dir + '/tools/mkimage'
+ run_fit_test(mkimage)
+ finally:
+ # Go back to the original U-Boot with the correct dtb.
+ cons.config.dtb = old_dtb
+ cons.restart_uboot()
HOSTCFLAGS_bmp_logo.o := -pedantic
hostprogs-$(CONFIG_BUILD_ENVCRC) += envcrc
-envcrc-objs := envcrc.o lib/crc32.o common/env_embedded.o lib/sha1.o
+envcrc-objs := envcrc.o lib/crc32.o env/embedded.o lib/sha1.o
hostprogs-$(CONFIG_CMD_NET) += gen_eth_addr
HOSTCFLAGS_gen_eth_addr.o := -pedantic
quiet_cmd_wrap = WRAP $@
cmd_wrap = echo "\#include <../$(patsubst $(obj)/%,%,$@)>" >$@
-$(obj)/lib/%.c $(obj)/common/%.c:
+$(obj)/lib/%.c $(obj)/common/%.c $(obj)/env/%.c:
$(call cmd,wrap)
clean-dirs := lib common
* modified or deleted
*
*/
-int fw_setenv(int argc, char *argv[], struct env_opts *opts)
+int fw_env_set(int argc, char *argv[], struct env_opts *opts)
{
int i;
size_t len;
int fw_printenv(int argc, char *argv[], int value_only, struct env_opts *opts);
/**
- * fw_setenv() - adds or removes one variable to the environment
+ * fw_env_set() - adds or removes one variable to the environment
*
* @argc: number of strings in argv, argv[0] is variable name,
* argc==1 means erase variable, argc > 1 means add a variable
* ERRORS:
* EROFS - some variables ("ethaddr", "serial#") cannot be modified
*/
-int fw_setenv(int argc, char *argv[], struct env_opts *opts);
+int fw_env_set(int argc, char *argv[], struct env_opts *opts);
/**
* fw_parse_script() - adds or removes multiple variables with a batch script
"\n");
}
-void usage_setenv(void)
+void usage_env_set(void)
{
fprintf(stderr,
"Usage: fw_setenv [OPTIONS]... [VARIABLE]...\n"
env_opts.lockname = optarg;
break;
case 'h':
- do_printenv ? usage_printenv() : usage_setenv();
+ do_printenv ? usage_printenv() : usage_env_set();
exit(EXIT_SUCCESS);
break;
default:
/* ignore common options */
break;
default: /* '?' */
- usage_setenv();
+ usage_env_set();
exit(EXIT_FAILURE);
break;
}
retval = EXIT_FAILURE;
} else {
if (!script_file) {
- if (fw_setenv(argc, argv, &env_opts) != 0)
+ if (fw_env_set(argc, argv, &env_opts) != 0)
retval = EXIT_FAILURE;
} else {
if (fw_parse_script(script_file, &env_opts) != 0)
{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
{ "rk3288", "RK32", 0x8000, false, false },
{ "rk3328", "RK32", 0x8000 - 0x1000, false, false },
+ { "rk3368", "RK33", 0x8000 - 0x1000, false, true },
{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
{ "rv1108", "RK11", 0x1800, false, false},
};