]> git.sur5r.net Git - u-boot/commitdiff
mpc83xx: MPC8360E-RDK: add support for NAND
authorAnton Vorontsov <avorontsov@ru.mvista.com>
Mon, 24 Mar 2008 17:46:51 +0000 (20:46 +0300)
committerKim Phillips <kim.phillips@freescale.com>
Wed, 26 Mar 2008 00:16:46 +0000 (19:16 -0500)
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
board/freescale/mpc8360erdk/Makefile
board/freescale/mpc8360erdk/nand.c [new file with mode: 0644]
include/configs/MPC8360ERDK.h

index acc954488f54bdb8e0b99991dad67d2649b49a35..53e0c482760b7b050a34c44b605e4e72b1315a28 100644 (file)
@@ -25,8 +25,10 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(BOARD).a
 
-COBJS  := $(BOARD).o
+COBJS-y += $(BOARD).o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
 
+COBJS  := $(COBJS-y)
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
 SOBJS  := $(addprefix $(obj),$(SOBJS))
diff --git a/board/freescale/mpc8360erdk/nand.c b/board/freescale/mpc8360erdk/nand.c
new file mode 100644 (file)
index 0000000..e1e790b
--- /dev/null
@@ -0,0 +1,72 @@
+/*
+ * MPC8360E-RDK support for the NAND on FSL UPM
+ *
+ * Copyright (C) 2007 MontaVista Software, Inc.
+ *                    Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/immap_83xx.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/fsl_upm.h>
+#include <nand.h>
+
+static struct immap *im = (struct immap *)CFG_IMMR;
+
+static const u32 upm_array[] = {
+       0x0ff03c30, 0x0ff03c30, 0x0ff03c34, 0x0ff33c30, /* Words  0 to  3 */
+       0xfff33c31, 0xfffffc30, 0xfffffc30, 0xfffffc30, /* Words  4 to  7 */
+       0x0faf3c30, 0x0faf3c30, 0x0faf3c30, 0x0fff3c34, /* Words  8 to 11 */
+       0xffff3c31, 0xfffffc30, 0xfffffc30, 0xfffffc30, /* Words 12 to 15 */
+       0x0fa3fc30, 0x0fa3fc30, 0x0fa3fc30, 0x0ff3fc34, /* Words 16 to 19 */
+       0xfff3fc31, 0xfffffc30, 0xfffffc30, 0xfffffc30, /* Words 20 to 23 */
+       0x0ff33c30, 0x0fa33c30, 0x0fa33c34, 0x0ff33c30, /* Words 24 to 27 */
+       0xfff33c31, 0xfff0fc30, 0xfff0fc30, 0xfff0fc30, /* Words 28 to 31 */
+       0xfff3fc30, 0xfff3fc30, 0xfff6fc30, 0xfffcfc30, /* Words 32 to 35 */
+       0xfffcfc30, 0xfffcfc30, 0xfffcfc30, 0xfffcfc30, /* Words 36 to 39 */
+       0xfffcfc30, 0xfffcfc30, 0xfffcfc30, 0xfffcfc30, /* Words 40 to 43 */
+       0xfffdfc30, 0xfffffc30, 0xfffffc30, 0xfffffc31, /* Words 44 to 47 */
+       0xfffffc30, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 48 to 51 */
+       0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 52 to 55 */
+       0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 56 to 59 */
+       0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 60 to 63 */
+};
+
+static int dev_ready(void)
+{
+       if (in_be32(&im->qepio.ioport[4].pdat) & 0x00002000) {
+               debug("nand ready\n");
+               return 1;
+       }
+
+       debug("nand busy\n");
+       return 0;
+}
+
+static struct fsl_upm_nand fun = {
+       .upm = {
+               .array = upm_array,
+               .io_addr = (void *)CFG_NAND_BASE,
+       },
+       .width = 1,
+       .upm_cmd_offset = 8,
+       .upm_addr_offset = 16,
+       .dev_ready = dev_ready,
+       .wait_pattern = 1,
+       .chip_delay = 50,
+};
+
+int board_nand_init(struct nand_chip *nand)
+{
+       fun.upm.mxmr = &im->lbus.mamr;
+       fun.upm.mdr = &im->lbus.mdr;
+       fun.upm.mar = &im->lbus.mar;
+       return fsl_upm_nand_init(nand, &fun);
+}
index 1588610b87c07316fdd74e7dc8add37f158b5c44..4843e6a03b878cdd27dc41065e18ad5b957e7cbb 100644 (file)
  * NAND flash on the local bus
  */
 #define CFG_NAND_BASE          0x60000000
+#define CONFIG_CMD_NAND                1
+#define CONFIG_NAND_FSL_UPM    1
+#define CFG_MAX_NAND_DEVICE    1
+#define NAND_MAX_CHIPS         1
+#define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #define CFG_LBLAWBAR1_PRELIM   CFG_NAND_BASE
 #define CFG_LBLAWAR1_PRELIM    0x8000001b /* Access window size 4K */
    "fdtfile=dtb\0"\
    "fsfile=fs\0"\
    "ubootfile=u-boot.bin\0"\
+   "mtdparts=mtdparts=60000000.nand-flash:4096k(kernel),128k(dtb),-(rootfs)\0"\
    "setbootargs=setenv bootargs console=$consoledev,$baudrate "\
                "$mtdparts panic=1\0"\
    "adddhcpargs=setenv bootargs $bootargs ip=on\0"\
    "addnfsargs=setenv bootargs $bootargs ip=$ipaddr:$serverip:"\
                "$gatewayip:$netmask:$hostname:$netdev:off "\
                "root=/dev/nfs rw nfsroot=$serverip:$rootpath\0"\
+   "addnandargs=setenv bootargs $bootargs root=/dev/mtdblock3 "\
+               "rootfstype=jffs2 rw\0"\
    "tftp_get_uboot=tftp 100000 $ubootfile\0"\
    "tftp_get_kernel=tftp $loadaddr $bootfile\0"\
    "tftp_get_dtb=tftp $fdtaddr $fdtfile\0"\
    "tftp_get_fs=tftp c00000 $fsfile\0"\
+   "nand_erase_kernel=nand erase 0 400000\0"\
+   "nand_erase_dtb=nand erase 400000 20000\0"\
+   "nand_erase_fs=nand erase 420000 3be0000\0"\
+   "nand_write_kernel=nand write.jffs2 $loadaddr 0 400000\0"\
+   "nand_write_dtb=nand write.jffs2 $fdtaddr 400000 20000\0"\
+   "nand_write_fs=nand write.jffs2 c00000 420000 $filesize\0"\
+   "nand_read_kernel=nand read.jffs2 $loadaddr 0 400000\0"\
+   "nand_read_dtb=nand read.jffs2 $fdtaddr 400000 20000\0"\
    "nor_reflash=protect off ff800000 ff87ffff ; erase ff800000 ff87ffff ; "\
                "cp.b 100000 ff800000 $filesize\0"\
+   "nand_reflash_kernel=run tftp_get_kernel nand_erase_kernel "\
+               "nand_write_kernel\0"\
+   "nand_reflash_dtb=run tftp_get_dtb nand_erase_dtb nand_write_dtb\0"\
+   "nand_reflash_fs=run tftp_get_fs nand_erase_fs nand_write_fs\0"\
+   "nand_reflash=run nand_reflash_kernel nand_reflash_dtb "\
+               "nand_reflash_fs\0"\
    "boot_m=bootm $loadaddr - $fdtaddr\0"\
    "dhcpboot=run setbootargs adddhcpargs tftp_get_kernel tftp_get_dtb "\
                "boot_m\0"\
    "nfsboot=run setbootargs addnfsargs tftp_get_kernel tftp_get_dtb "\
                "boot_m\0"\
+   "nandboot=run setbootargs addnandargs nand_read_kernel nand_read_dtb "\
+               "boot_m\0"\
    ""
 
 #define CONFIG_BOOTCOMMAND "run dhcpboot"