void init_addr_map(void)
{
int i;
- unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
+ unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
/* walk all the entries */
- for (i = 0; i < max_cam; i++) {
+ for (i = 0; i < num_cam; i++) {
unsigned long epn;
u32 tsize, _mas1;
phys_addr_t rpn;
unsigned int ctrl_num)
{
unsigned int i;
-#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
const char *p;
-#endif
/* Chip select options. */
simple_strtoul(p, NULL, 0);
}
}
+#endif
- if( (p = getenv("ba_intlv_ctl")) != NULL) {
+ if( ((p = getenv("ba_intlv_ctl")) != NULL) &&
+ (CONFIG_CHIP_SELECTS_PER_CTRL > 1)) {
if (strcmp(p, "cs0_cs1") == 0)
popts->ba_intlv_ctl = FSL_DDR_CS0_CS1;
else if (strcmp(p, "cs2_cs3") == 0)
break;
}
}
-#endif
fsl_ddr_board_options(popts, pdimm, ctrl_num);