rockchip: rk322x: update max-frequency for mmc node

mmc using 150000000 as max-frequency like what rk3288 sets.
This can speed up the mmc read/write, the actual mmc clock is:
Before this patch: 37.125M
After this patch: 49.5M

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index e066a306d0ac59cb91e1c617399c9be755081de7..64f1c2d7dac2b854ef870cfbb99676e6a41bea7e 100644 (file)
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -79,7 +79,6 @@
        cap-sd-highspeed;
        card-detect-delay = <200>;
        disable-wp;
-       max-frequency = <50000000>;
        num-slots = <1>;
        supports-sd;
 };

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index ddbe1137416ba08654e1d97a24835f926a6ea1c8..22324f97b3d9412c82224a7aa9208af03bed0868 100644 (file)
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -388,6 +388,7 @@
        sdmmc: dwmmc@30000000 {
                compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x30000000 0x4000>;
+               max-frequency = <150000000>;
                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                         <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
@@ -414,9 +415,8 @@
        emmc: dwmmc@30020000 {
                compatible = "rockchip,rk3288-dw-mshc";
                reg = <0x30020000 0x4000>;
+               max-frequency = <150000000>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-               clock-frequency = <37500000>;
-               max-frequency = <37500000>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";