arm64: a37xx: dts: enable pcie port

This patch enabled PCIe port on both devel-board
and espressobin board.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/arch/arm/dts/armada-3720-db.dts b/arch/arm/dts/armada-3720-db.dts
index 52fc134bad0b4e1365407c6269a50807b3f86417..770c08aa7dd4178fc814cb3cf0264f6bf3843e46 100644 (file)
--- a/arch/arm/dts/armada-3720-db.dts
+++ b/arch/arm/dts/armada-3720-db.dts
@@ -154,3 +154,11 @@
 &usb3 {
        status = "okay";
 };
+
+/* CON17 */
+&pcie0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_pins>;
+       reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};

diff --git a/arch/arm/dts/armada-3720-espressobin.dts b/arch/arm/dts/armada-3720-espressobin.dts
index 4e70d885bc4c710722fe7ceafa0c9d0092b0ad71..7bfccb0435afe359b0221481383b0dee5566e3bd 100644 (file)
--- a/arch/arm/dts/armada-3720-espressobin.dts
+++ b/arch/arm/dts/armada-3720-espressobin.dts
@@ -141,3 +141,10 @@
 &usb3 {
        status = "okay";
 };
+
+&pcie0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_pins>;
+       reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};

diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi
index 9fc87c9272315334c5b2826efe57b4d0984ee837..54007428ed3b83e98c2ec7704870bd2023dd1cc3 100644 (file)
--- a/arch/arm/dts/armada-37xx.dtsi
+++ b/arch/arm/dts/armada-37xx.dtsi
@@ -294,5 +294,21 @@
                                max-lanes = <2>;
                        };
                };
+
+               pcie0: pcie@d0070000 {
+                       compatible = "marvell,armada-37xx-pcie";
+                       reg = <0 0xd0070000 0 0x20000>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       num-lanes = <1>;
+                       status = "disabled";
+
+                       bus-range = <0 0xff>;
+                       ranges = <0x82000000 0 0xe8000000
+                                0 0xe8000000 0 0x1000000 /* Port 0 MEM */
+                                0x81000000 0 0xe9000000
+                                0 0xe9000000 0 0x10000>; /* Port 0 IO*/
+               };
        };
 };