Not only Spansion supports the Persistent Protection Bits (PPB) locking.
Other devices like the Micron JS28F512M29EWx also support this type
of locking/unlocking. Detection of support is done in the same way as
done for the Spansion chips - via the 0x49 CFI word.
This patch enables this PPB protection mechanism for all AMD type
(AMD commandset) chips.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-by: Holger Brunck <holger.brunck@keymile.com>
0, ATM_CMD_UNLOCK_SECT);
}
}
0, ATM_CMD_UNLOCK_SECT);
}
}
- if (manufact_match(info, AMD_MANUFACT)) {
+ if (info->legacy_unlock) {
int flag = disable_interrupts();
int lock_flag;
int flag = disable_interrupts();
int lock_flag;
flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
#ifdef CONFIG_SYS_FLASH_PROTECTION
flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
#ifdef CONFIG_SYS_FLASH_PROTECTION
- if (info->ext_addr && manufact_match(info, AMD_MANUFACT)) {
- ushort spus;
-
- /* read sector protect/unprotect scheme */
- spus = flash_read_uchar(info, info->ext_addr + 9);
- if (spus == 0x8)
+ if (info->ext_addr) {
+ /* read sector protect/unprotect scheme (at 0x49) */
+ if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
info->legacy_unlock = 1;
}
#endif
info->legacy_unlock = 1;
}
#endif
break;
case CFI_CMDSET_AMD_EXTENDED:
case CFI_CMDSET_AMD_STANDARD:
break;
case CFI_CMDSET_AMD_EXTENDED:
case CFI_CMDSET_AMD_STANDARD:
- if (!manufact_match(info, AMD_MANUFACT)) {
+ if (!info->legacy_unlock) {
/* default: not protected */
info->protect[sect_cnt] = 0;
break;
/* default: not protected */
info->protect[sect_cnt] = 0;
break;