]> git.sur5r.net Git - u-boot/commitdiff
Merge git://git.denx.de/u-boot-fsl-qoriq
authorTom Rini <trini@konsulko.com>
Sat, 28 Oct 2017 01:59:10 +0000 (21:59 -0400)
committerTom Rini <trini@konsulko.com>
Sat, 28 Oct 2017 01:59:10 +0000 (21:59 -0400)
30 files changed:
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/ppa.c
arch/arm/cpu/armv8/sec_firmware.c
arch/arm/dts/fsl-ls1088a.dtsi
arch/arm/include/asm/arch-fsl-layerscape/config.h
arch/arm/include/asm/armv8/sec_firmware.h
arch/powerpc/cpu/mpc85xx/release.S
board/freescale/ls1088a/eth_ls1088aqds.c
configs/ls1088aqds_qspi_defconfig
configs/ls1088ardb_qspi_defconfig
drivers/net/fsl-mc/mc.c
drivers/net/ldpaa_eth/ls1088a.c
drivers/usb/host/Kconfig
include/configs/ls1012a_common.h
include/configs/ls1012afrdm.h
include/configs/ls1012aqds.h
include/configs/ls1012ardb.h
include/configs/ls1021aiot.h
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/linux/usb/xhci-fsl.h
scripts/config_whitelist.txt

index 85b7c70937e84f6694eb1e46c354e3007cc9ec37..8bbc981d43f35415e5e6e406adad7d382479294d 100644 (file)
@@ -490,3 +490,10 @@ config SYS_MC_RSV_MEM_ALIGN
 
 config SPL_LDSCRIPT
        default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
+
+config HAS_FSL_XHCI_USB
+       bool
+       default y if ARCH_LS1043A || ARCH_LS1046A
+       help
+         For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use
+         pins, select it when the pins are assigned to USB.
index bbf8bba1120d301c2f559ab178bb23598412af0f..cddcee964afd0560a3d78be1b8d2467db206d675 100644 (file)
@@ -35,6 +35,7 @@ int ppa_init(void)
        unsigned int el = current_el();
        void *ppa_fit_addr;
        u32 *boot_loc_ptr_l, *boot_loc_ptr_h;
+       u32 *loadable_l, *loadable_h;
        int ret;
 
 #ifdef CONFIG_CHAIN_OF_TRUST
@@ -240,9 +241,9 @@ int ppa_init(void)
                                           PPA_KEY_HASH,
                                           &ppa_img_addr);
                if (ret != 0)
-                       printf("PPA validation failed\n");
+                       printf("SEC firmware(s) validation failed\n");
                else
-                       printf("PPA validation Successful\n");
+                       printf("SEC firmware(s) validation Successful\n");
        }
 #if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
        defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
@@ -254,15 +255,24 @@ int ppa_init(void)
        struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
        boot_loc_ptr_l = &gur->bootlocptrl;
        boot_loc_ptr_h = &gur->bootlocptrh;
+
+       /* Assign addresses to loadable ptrs */
+       loadable_l = &gur->scratchrw[4];
+       loadable_h = &gur->scratchrw[5];
 #elif defined(CONFIG_FSL_LSCH2)
        struct ccsr_scfg __iomem *scfg = (void *)(CONFIG_SYS_FSL_SCFG_ADDR);
        boot_loc_ptr_l = &scfg->scratchrw[1];
        boot_loc_ptr_h = &scfg->scratchrw[0];
+
+       /* Assign addresses to loadable ptrs */
+       loadable_l = &scfg->scratchrw[2];
+       loadable_h = &scfg->scratchrw[3];
 #endif
 
        debug("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n",
              boot_loc_ptr_l, boot_loc_ptr_h);
-       ret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h);
+       ret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h,
+                               loadable_l, loadable_h);
 
 #if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
        defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
index 0e7483437a9bbc9b00952308ec0b8f089c215f1a..927eae4f741d8d806926567a97f859eeb995330d 100644 (file)
@@ -105,6 +105,74 @@ static int sec_firmware_parse_image(const void *sec_firmware_img,
        return 0;
 }
 
+/*
+ * SEC Firmware FIT image parser to check if any loadable is
+ * present. If present, verify integrity of the loadable and
+ * copy loadable to address provided in (loadable_h, loadable_l).
+ *
+ * Returns 0 on success and a negative errno on error task fail.
+ */
+static int sec_firmware_check_copy_loadable(const void *sec_firmware_img,
+                                           u32 *loadable_l, u32 *loadable_h)
+{
+       phys_addr_t sec_firmware_loadable_addr = 0;
+       int conf_node_off, ld_node_off;
+       char *conf_node_name = NULL;
+       const void *data;
+       size_t size;
+       ulong load;
+
+       conf_node_name = SEC_FIRMEWARE_FIT_CNF_NAME;
+
+       conf_node_off = fit_conf_get_node(sec_firmware_img, conf_node_name);
+       if (conf_node_off < 0) {
+               printf("SEC Firmware: %s: no such config\n", conf_node_name);
+       return -ENOENT;
+       }
+
+       ld_node_off = fit_conf_get_prop_node(sec_firmware_img, conf_node_off,
+                                            FIT_LOADABLE_PROP);
+       if (ld_node_off >= 0) {
+               printf("SEC Firmware: '%s' present in config\n",
+                      FIT_LOADABLE_PROP);
+
+               /* Verify secure firmware image */
+               if (!(fit_image_verify(sec_firmware_img, ld_node_off))) {
+                       printf("SEC Loadable: Bad loadable image (bad CRC)\n");
+                       return -EINVAL;
+               }
+
+               if (fit_image_get_data(sec_firmware_img, ld_node_off,
+                                      &data, &size)) {
+                       printf("SEC Loadable: Can't get subimage data/size");
+                       return -ENOENT;
+               }
+
+               /* Get load address, treated as load offset to secure memory */
+               if (fit_image_get_load(sec_firmware_img, ld_node_off, &load)) {
+                       printf("SEC Loadable: Can't get subimage load");
+                       return -ENOENT;
+               }
+
+               /* Compute load address for loadable in secure memory */
+               sec_firmware_loadable_addr = (sec_firmware_addr -
+                                               gd->arch.tlb_size) + load;
+
+               /* Copy loadable to secure memory and flush dcache */
+               debug("%s copied to address 0x%p\n",
+                     FIT_LOADABLE_PROP, (void *)sec_firmware_loadable_addr);
+               memcpy((void *)sec_firmware_loadable_addr, data, size);
+               flush_dcache_range(sec_firmware_loadable_addr,
+                                  sec_firmware_loadable_addr + size);
+       }
+
+       /* Populate address ptrs for loadable image with loadbale addr */
+       out_le32(loadable_l, (sec_firmware_loadable_addr & WORD_MASK));
+       out_le32(loadable_h, (sec_firmware_loadable_addr >> WORD_SHIFT));
+
+       return 0;
+}
+
 static int sec_firmware_copy_image(const char *title,
                         u64 image_addr, u32 image_size, u64 sec_firmware)
 {
@@ -117,9 +185,11 @@ static int sec_firmware_copy_image(const char *title,
 
 /*
  * This function will parse the SEC Firmware image, and then load it
- * to secure memory.
+ * to secure memory. Also load any loadable if present along with SEC
+ * Firmware image.
  */
-static int sec_firmware_load_image(const void *sec_firmware_img)
+static int sec_firmware_load_image(const void *sec_firmware_img,
+                                  u32 *loadable_l, u32 *loadable_h)
 {
        const void *raw_image_addr;
        size_t raw_image_size = 0;
@@ -172,6 +242,15 @@ static int sec_firmware_load_image(const void *sec_firmware_img)
        if (ret)
                goto out;
 
+       /*
+        * Check if any loadable are present along with firmware image, if
+        * present load them.
+        */
+       ret = sec_firmware_check_copy_loadable(sec_firmware_img, loadable_l,
+                                              loadable_h);
+       if (ret)
+               goto out;
+
        sec_firmware_addr |= SEC_FIRMWARE_LOADED;
        debug("SEC Firmware: Entry point: 0x%llx\n",
              sec_firmware_addr & SEC_FIRMWARE_ADDR_MASK);
@@ -289,17 +368,22 @@ int sec_firmware_get_random(uint8_t *rand, int bytes)
  * @sec_firmware_img:  the SEC Firmware image address
  * @eret_hold_l:       the address to hold exception return address low
  * @eret_hold_h:       the address to hold exception return address high
+ * @loadable_l:                the address to hold loadable address low
+ * @loadable_h:                the address to hold loadable address high
  */
 int sec_firmware_init(const void *sec_firmware_img,
                        u32 *eret_hold_l,
-                       u32 *eret_hold_h)
+                       u32 *eret_hold_h,
+                       u32 *loadable_l,
+                       u32 *loadable_h)
 {
        int ret;
 
        if (!sec_firmware_is_valid(sec_firmware_img))
                return -EINVAL;
 
-       ret = sec_firmware_load_image(sec_firmware_img);
+       ret = sec_firmware_load_image(sec_firmware_img, loadable_l,
+                                     loadable_h);
        if (ret) {
                printf("SEC Firmware: Failed to load image\n");
                return ret;
index d943a9efa32d82ae0a8faba702f5798f29827cbc..64b4fcf12b6493aa4966309706b4ae737a81ede4 100644 (file)
                num-cs = <4>;
        };
 
+       usb0: usb3@3100000 {
+               compatible = "fsl,layerscape-dwc3";
+               reg = <0x0 0x3100000 0x0 0x10000>;
+               interrupts = <0 80 0x4>; /* Level high type */
+               dr_mode = "host";
+       };
+
+       usb1: usb3@3110000 {
+               compatible = "fsl,layerscape-dwc3";
+               reg = <0x0 0x3110000 0x0 0x10000>;
+               interrupts = <0 81 0x4>; /* Level high type */
+               dr_mode = "host";
+       };
+
        pcie@3400000 {
                compatible = "fsl,ls-pcie", "snps,dw-pcie";
                reg = <0x00 0x03400000 0x0 0x80000   /* dbi registers */
index a7098be8463e7b6461b602d50ab02799008e452f..95e2791507773233590cdd304cdc30723b41b6aa 100644 (file)
@@ -16,7 +16,7 @@
  * Reserve secure memory
  * To be aligned with MMU block size
  */
-#define CONFIG_SYS_MEM_RESERVE_SECURE  (2048 * 1024)   /* 2MB */
+#define CONFIG_SYS_MEM_RESERVE_SECURE  (66 * 1024 * 1024)      /* 66MB */
 #define SPL_TLB_SETBACK        0x1000000       /* 16MB under effective memory top */
 
 #ifdef CONFIG_ARCH_LS2080A
index 6d42a7111f2a37f382760d3cf2bd52689f027976..2ba1847a2ed79d6fc1970fc7cf303b552cd63ae1 100644 (file)
@@ -9,8 +9,10 @@
 
 #define PSCI_INVALID_VER               0xffffffff
 #define SEC_JR3_OFFSET                 0x40000
+#define WORD_MASK                      0xffffffff
+#define WORD_SHIFT                     32
 
-int sec_firmware_init(const void *, u32 *, u32 *);
+int sec_firmware_init(const void *, u32 *, u32 *, u32 *, u32 *);
 int _sec_firmware_entry(const void *, u32 *, u32 *);
 bool sec_firmware_is_valid(const void *);
 bool sec_firmware_support_hwrng(void);
index 0e0daf5a44ef5b6b324fc2dfe94634df63f02222..e1f12089c33e1139ee957f338d811ab38a0bc2db 100644 (file)
@@ -184,12 +184,18 @@ __secondary_start_page:
 
        mtspr   SPRN_PIR,r4     /* write to PIR register */
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A007907
+       mfspr   r8, L1CSR2
+       clrrwi  r8, r8, 10      /* clear bit [54-63] DCSTASHID */
+       mtspr   L1CSR2, r8
+#else
 #ifdef CONFIG_SYS_CACHE_STASHING
        /* set stash id to (coreID) * 2 + 32 + L1 CT (0) */
        slwi    r8,r4,1
        addi    r8,r8,32
        mtspr   L1CSR2,r8
 #endif
+#endif /* CONFIG_SYS_FSL_ERRATUM_A007907 */
 
 #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) || \
        defined(CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011)
index de70aee867776a0824e258f1b6a530906a39a02f..7fe446e624c0b2bd786c371d77e89d3b42b32f81 100644 (file)
@@ -634,6 +634,7 @@ int board_eth_init(bd_t *bis)
        for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
                switch (wriop_get_enet_if(i)) {
                case PHY_INTERFACE_MODE_RGMII:
+               case PHY_INTERFACE_MODE_RGMII_ID:
                        ls1088a_handle_phy_interface_rgmii(i);
                        break;
                case PHY_INTERFACE_MODE_QSGMII:
index 6a542ed5f8f17168eb6f6d483715cccd896dbd63..a75d4035380903350e6e6ac99bf49482f83ce941 100644 (file)
@@ -30,3 +30,12 @@ CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_CMD_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_STORAGE=y
index 52b10af96a0cd5d16d55354221b651791f1b9bb6..bd44fa99df0e9e99926713fc1fbefb840fca3e76 100644 (file)
@@ -30,3 +30,12 @@ CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_CMD_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_STORAGE=y
index 12dbcd8cc50e3e227a84b89827a1ad5cb4779e25..be2b6117d77e95069d53802c818b04e524bf3332 100644 (file)
@@ -725,9 +725,9 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
         * Initialize the global default MC portal
         * And check that the MC firmware is responding portal commands:
         */
-       root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
+       root_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
        if (!root_mc_io) {
-               printf(" No memory: malloc() failed\n");
+               printf(" No memory: calloc() failed\n");
                return -ENOMEM;
        }
 
@@ -879,11 +879,12 @@ static int dpio_init(void)
        struct dpio_cfg dpio_cfg;
        int err = 0;
 
-       dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
+       dflt_dpio = (struct fsl_dpio_obj *)calloc(
+                                       sizeof(struct fsl_dpio_obj), 1);
        if (!dflt_dpio) {
-               printf("No memory: malloc() failed\n");
+               printf("No memory: calloc() failed\n");
                err = -ENOMEM;
-               goto err_malloc;
+               goto err_calloc;
        }
 
        dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
@@ -948,7 +949,7 @@ err_get_attr:
        dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
 err_create:
        free(dflt_dpio);
-err_malloc:
+err_calloc:
        return err;
 }
 
@@ -1030,11 +1031,11 @@ static int dprc_init(void)
                goto err_create;
        }
 
-       dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
+       dflt_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
        if (!dflt_mc_io) {
                err  = -ENOMEM;
-               printf(" No memory: malloc() failed\n");
-               goto err_malloc;
+               printf(" No memory: calloc() failed\n");
+               goto err_calloc;
        }
 
        child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
@@ -1059,7 +1060,7 @@ static int dprc_init(void)
        return 0;
 err_child_open:
        free(dflt_mc_io);
-err_malloc:
+err_calloc:
        dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
                               root_dprc_handle, child_dprc_id);
 err_create:
@@ -1110,11 +1111,12 @@ static int dpbp_init(void)
        struct dpbp_attr dpbp_attr;
        struct dpbp_cfg dpbp_cfg;
 
-       dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
+       dflt_dpbp = (struct fsl_dpbp_obj *)calloc(
+                                       sizeof(struct fsl_dpbp_obj), 1);
        if (!dflt_dpbp) {
-               printf("No memory: malloc() failed\n");
+               printf("No memory: calloc() failed\n");
                err = -ENOMEM;
-               goto err_malloc;
+               goto err_calloc;
        }
 
        dpbp_cfg.options = 512;
@@ -1164,7 +1166,7 @@ err_get_attr:
        dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
        dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
 err_create:
-err_malloc:
+err_calloc:
        return err;
 }
 
@@ -1206,11 +1208,12 @@ static int dpni_init(void)
        struct dpni_extended_cfg dpni_extended_cfg;
        struct dpni_cfg dpni_cfg;
 
-       dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
+       dflt_dpni = (struct fsl_dpni_obj *)calloc(
+                                       sizeof(struct fsl_dpni_obj), 1);
        if (!dflt_dpni) {
-               printf("No memory: malloc() failed\n");
+               printf("No memory: calloc() failed\n");
                err = -ENOMEM;
-               goto err_malloc;
+               goto err_calloc;
        }
 
        memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg));
@@ -1272,7 +1275,7 @@ err_get_attr:
 err_create:
 err_prepare_extended_cfg:
        free(dflt_dpni);
-err_malloc:
+err_calloc:
        return err;
 }
 
index 061935e51c555f4ec7f71878486dac1ffe3487e8..780a23998ad944dcc2c4bfc25eb59627852f4bb0 100644 (file)
@@ -99,7 +99,7 @@ void fsl_rgmii_init(void)
        ec >>= FSL_CHASSIS3_RCWSR25_EC1_PRTCL_SHIFT;
 
        if (!ec)
-               wriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII);
+               wriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII_ID);
 #endif
 
 #ifdef CONFIG_SYS_FSL_EC2
@@ -108,7 +108,7 @@ void fsl_rgmii_init(void)
        ec >>= FSL_CHASSIS3_RCWSR25_EC2_PRTCL_SHIFT;
 
        if (!ec)
-               wriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII);
+               wriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII_ID);
 #endif
 }
 #endif
index f5f19ed775c219017abd96e65721da0f7701e326..5264475fa521bf91c075d866b28ed7b88236663e 100644 (file)
@@ -71,6 +71,12 @@ config USB_XHCI_DRA7XX_INDEX
          Select the DRA7XX xHCI USB index.
          Current supported values: 0, 1.
 
+config USB_XHCI_FSL
+       bool "Support for NXP Layerscape on-chip xHCI USB controller"
+       default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
+       depends on !SPL_NO_USB
+       help
+         Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
 endif # USB_XHCI_HCD
 
 config USB_EHCI_HCD
index 77bd9308562d1f23f63fd837395bc1ab24cb3f85..d2fa50a8be752956a54de7a91615f1f9c40dd6f9 100644 (file)
@@ -32,7 +32,7 @@
 #define CONFIG_SYS_DDR_BLOCK2_BASE     0x880000000ULL
 
 /* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              CONFIG_SYS_CLK_FREQ/4   /* 25MHz */
+#define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
 /* CSU */
 #define CONFIG_LAYERSCAPE_NS_ACCESS
index 6b1ba578e9225da18a40077e8b386e30b2de0cc8..efb4c00cd91e0b1eae73317ac5ed82b575265b7d 100644 (file)
        "kernel_load=0x96000000\0"              \
        "kernel_size=0x2800000\0"
 
-/*
-* USB
-*/
-#define CONFIG_HAS_FSL_XHCI_USB
-
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT         1
-#endif
-
 #define CONFIG_CMD_MEMINFO
 #define CONFIG_CMD_MEMTEST
 #define CONFIG_SYS_MEMTEST_START       0x80000000
index 2899ff13dc128475ca80adcea523ce9d82ae9b32..d15054709ec082c206aac6cb26f4ebbe3ea7552c 100644 (file)
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
-/*XHCI Support - enabled by default*/
-#define CONFIG_HAS_FSL_XHCI_USB
-
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT         1
-#endif
-
 /*  MMC  */
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
index c720a8d4bcfe7c2de16d68ceb33b45e2389607a5..794117062f4da32079ce23f8b2f0129003f27fc9 100644 (file)
 #define CONFIG_SYS_MEMTEST_START       0x80000000
 #define CONFIG_SYS_MEMTEST_END         0x9fffffff
 
-/*
-* USB
-*/
-#define CONFIG_HAS_FSL_XHCI_USB
-
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT         1
-#endif
 
 /*
  * I2C IO expander
index 63667810bd1a2ef7ed00fa16810ff170b371707e..46bf55f89171fdd638fab6506e56f2c7f8f1a5c4 100644 (file)
 #define CONFIG_SYS_INIT_RAM_ADDR       OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE       OCRAM_SIZE
 
-/* XHCI Support - enabled by default */
-#define CONFIG_HAS_FSL_XHCI_USB
-
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT                1
-#endif
-
 #define CONFIG_SYS_CLK_FREQ            100000000
 #define CONFIG_DDR_CLK_FREQ            100000000
 
index f3d3aa227123acc968920ffd208cae237e206fe3..6669f2f9602af0b6f038c11509cb32e53c930188 100644 (file)
@@ -404,14 +404,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
-/*XHCI Support - enabled by default*/
-#define CONFIG_HAS_FSL_XHCI_USB
-
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT                1
-#endif
-
 /*
  * Video
  */
index 852ff57fb6defc905c73874c61005e04b4df13e4..0f20e5e2cc8e1b6b8aebad8aabbd11dc69d97d2d 100644 (file)
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
-/* XHCI Support - enabled by default */
-#define CONFIG_HAS_FSL_XHCI_USB
-
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT        1
-#endif
-
 #define CONFIG_SYS_CLK_FREQ            100000000
 #define CONFIG_DDR_CLK_FREQ            100000000
 
index 5aadd92efd555f0c32f2297710227ee35e750d26..8cc2abb2b6bd3ed46336622fc885b5164392cabb 100644 (file)
@@ -370,13 +370,6 @@ unsigned long get_board_ddr_clk(void);
 #endif
 #endif
 
-/* USB */
-#define CONFIG_HAS_FSL_XHCI_USB
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT                3
-#endif
-
 /*
  * Miscellaneous configurable options
  */
index f9843f5ebae9f21be046feeee87ed3028a67e868..b4b4d5e178fb6e2eddaba8976bad575cf7695038 100644 (file)
 #endif
 #endif
 
-/* USB */
-#ifndef SPL_NO_USB
-#define CONFIG_HAS_FSL_XHCI_USB
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT                3
-#endif
-#endif
-
 /* SATA */
 #ifndef SPL_NO_SATA
 #define CONFIG_LIBATA
index 39bd1c38a8019b3576fe0557f641136f15271425..586e9e9b6b3e1ce744c11eae1bc0255928765aeb 100644 (file)
@@ -136,13 +136,6 @@ unsigned long get_board_ddr_clk(void);
 #define CFG_LPUART_EN          0x2
 #endif
 
-/* USB */
-#define CONFIG_HAS_FSL_XHCI_USB
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT         3
-#endif
-
 /* SATA */
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI
index 7bbd4ada707a2113fe81b2800b2d1ac8d3ccb210..bb27dd058a45d9e791228bff970de6e55d5e4896 100644 (file)
 #endif
 #endif
 
-/* USB */
-#ifndef SPL_NO_USB
-#define CONFIG_HAS_FSL_XHCI_USB
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT         3
-#endif
-#endif
-
 /* SATA */
 #ifndef SPL_NO_SATA
 #define CONFIG_LIBATA
index 71d0e4e7d19f3f4471ab0b9b774cc90cffda3766..c2e6fd26d352f68dcb104c1615a6b4f46204e345 100644 (file)
@@ -20,7 +20,6 @@ unsigned long get_board_ddr_clk(void);
 
 
 #if defined(CONFIG_QSPI_BOOT)
-#define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET              0x300000        /* 3MB */
 #define CONFIG_ENV_SECT_SIZE           0x40000
index 39f1345f9793e85a7d307be4f9bdf3cc5c6c9dc8..478ddd0864ffdcef0c396f5412c8a6aef1e8d7e4 100644 (file)
@@ -12,7 +12,6 @@
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 
 #if defined(CONFIG_QSPI_BOOT)
-#define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET              0x300000        /* 3MB */
 #define CONFIG_ENV_SECT_SIZE           0x40000
index 54d6b51c5528ff601e3b55e7e25d8d2e8c248f76..f1968cc53353506490411ffa32d2ac144071a21a 100644 (file)
@@ -435,13 +435,6 @@ unsigned long get_board_ddr_clk(void);
 
 #endif
 
-/*
- * USB
- */
-#define CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT                2
-
 #include <asm/fsl_secure_boot.h>
 
 #endif /* __LS2_QDS_H */
index 9e9979e1c7fc1259fa208fc923ca31866061288d..48c3a5397f7464250f77267afed9eb046a2f95c9 100644 (file)
@@ -333,13 +333,6 @@ unsigned long get_board_sys_clk(void);
 
 #define CONFIG_MISC_INIT_R
 
-/*
- * USB
- */
-#define CONFIG_HAS_FSL_XHCI_USB
-#define CONFIG_USB_XHCI_FSL
-#define CONFIG_USB_MAX_CONTROLLER_COUNT         2
-
 #undef CONFIG_CMDLINE_EDITING
 #include <config_distro_defaults.h>
 
index bd54089722f95cafd1a94287d0deac987ccd466c..a916afb885a4a7c7f1ef9235a9b15d0607613382 100644 (file)
@@ -58,7 +58,7 @@ struct fsl_xhci {
 #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
-#elif defined(CONFIG_ARCH_LS2080A)
+#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
 #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
index 5ee1601f0e7a022cb9a25ffbaa070e0a1b5988ae..776c116669dfa281a9414afc38e320f2517e9a48 100644 (file)
@@ -873,7 +873,6 @@ CONFIG_HAS_ETH7
 CONFIG_HAS_FEC
 CONFIG_HAS_FSL_DR_USB
 CONFIG_HAS_FSL_MPH_USB
-CONFIG_HAS_FSL_XHCI_USB
 CONFIG_HAS_POST
 CONFIG_HCLK_FREQ
 CONFIG_HDBOOT
@@ -5027,7 +5026,6 @@ CONFIG_USB_TTY
 CONFIG_USB_TUSB_OMAP_DMA
 CONFIG_USB_ULPI_TIMEOUT
 CONFIG_USB_XHCI_EXYNOS
-CONFIG_USB_XHCI_FSL
 CONFIG_USB_XHCI_KEYSTONE
 CONFIG_USB_XHCI_OMAP
 CONFIG_USER_LOWLEVEL_INIT