]> git.sur5r.net Git - u-boot/commitdiff
rtc:ds3232/ds3231: Add support to generate 32KHz output
authorPriyanka Jain <Priyanka.Jain@freescale.com>
Mon, 29 Jun 2015 10:09:23 +0000 (15:39 +0530)
committerYork Sun <yorksun@freescale.com>
Wed, 2 Sep 2015 02:37:23 +0000 (21:37 -0500)
RTC devices can generate 32KHz output if for
-DS3232 device, EN32KHz bit and BB32KHz bit are set
-DS3231 device, EN32KHz bit is set, BB32KHz bit is don't care

Patch adds rtc_enable_32khz_output() which when called
will enable 32KHz output on 32KHz pin

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
drivers/rtc/ds3231.c
include/rtc.h

index c84bbc647f5fe78032d76bb02acf56e70ef8c548..e5e1be134ccee80a4a9f3a56a7c7438c76e8c394 100644 (file)
@@ -49,6 +49,8 @@
 #define RTC_STAT_BIT_A1F       0x1     /* Alarm 1 flag                 */
 #define RTC_STAT_BIT_A2F       0x2     /* Alarm 2 flag                 */
 #define RTC_STAT_BIT_OSF       0x80    /* Oscillator stop flag         */
+#define RTC_STAT_BIT_BB32KHZ   0x40    /* Battery backed 32KHz Output  */
+#define RTC_STAT_BIT_EN32KHZ   0x8     /* Enable 32KHz Output  */
 
 
 static uchar rtc_read (uchar reg);
@@ -141,6 +143,14 @@ void rtc_reset (void)
        rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
 }
 
+/*
+ * Enable 32KHz output
+ */
+void rtc_enable_32khz_output(void)
+{
+       rtc_write(RTC_STAT_REG_ADDR,
+                 RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
+}
 
 /*
  * Helper functions
index bd8621d60b93d4491d33ee477ccd04b7438c65a7..69fe8d4db05316703ad6e48fa36843185e099f45 100644 (file)
@@ -151,6 +151,7 @@ int rtc_write32(struct udevice *dev, unsigned int reg, u32 value);
 int rtc_get (struct rtc_time *);
 int rtc_set (struct rtc_time *);
 void rtc_reset (void);
+void rtc_enable_32khz_output(void);
 
 /**
  * rtc_read8() - Read an 8-bit register