]> git.sur5r.net Git - u-boot/commitdiff
nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers
authorScott Wood <scottwood@freescale.com>
Fri, 2 Nov 2012 23:41:35 +0000 (18:41 -0500)
committerScott Wood <scottwood@freescale.com>
Mon, 26 Nov 2012 21:41:27 +0000 (15:41 -0600)
These controllers can only do hardware ECC on full page transfers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
drivers/mtd/nand/fsl_elbc_nand.c
drivers/mtd/nand/fsl_ifc_nand.c

index 9076ad4cdc36ac517ef1658f91a0955c2223ab16..834a8a64983f35d01abdb1383cd928fbb155b6ff 100644 (file)
@@ -748,7 +748,7 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
 
        /* set up nand options */
        nand->options = NAND_NO_READRDY | NAND_NO_AUTOINCR |
-                       NAND_USE_FLASH_BBT;
+                       NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE;
 
        nand->controller = &elbc_ctrl->controller;
        nand->priv = priv;
index b3b7c705e189a9fdfb61ba45c517d1de1fc03bed..f4730037692745dded987e536c4bf8bc0e3fdadd 100644 (file)
@@ -797,7 +797,7 @@ int board_nand_init(struct nand_chip *nand)
 
        /* set up nand options */
        nand->options = NAND_NO_READRDY | NAND_NO_AUTOINCR |
-                       NAND_USE_FLASH_BBT;
+                       NAND_USE_FLASH_BBT | NAND_NO_SUBPAGE_WRITE;
 
        if (cspr & CSPR_PORT_SIZE_16) {
                nand->read_byte = fsl_ifc_read_byte16;