}
-static int dev_stor_index(block_dev_desc_t *dd)
-{
- int i, type;
-
- type = dev_stor_type(dd);
- for (i = 0; i < specs[type].max_dev; i++)
- if (dd == get_dev(specs[type].name, i))
- return i;
-
- return (specs[type].max_dev);
-}
-
-
lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
{
int type;
return 0;
}
- return (dd->block_read(dev_stor_index(dd), start, len, buf));
+ return dd->block_read(dd, start, len, buf);
}
1:
#endif
- /* Setup stack- and frame-pointers */
+ /* Establish C runtime stack and frame */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
- /* Allocate and zero GD, update SP */
+ /* Allocate reserved area from current top of stack */
mov %r0, %sp
- bl board_init_f_mem
-
- /* Update stack- and frame-pointers */
+ bl board_init_f_alloc_reserve
+ /* Set stack below reserved area, adjust frame pointer accordingly */
mov %sp, %r0
mov %fp, %sp
+ /* Initialize reserved area - note: r0 already contains address */
+ bl board_init_f_init_reserve
+
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
select DM_SPI
select DM_SPI_FLASH
select SPL_DM
+ select SPL_DM_SEQ_ALIAS
select SPL_OF_CONTROL
select SPL_SIMPLE_BUS
*/
#include <common.h>
-#include <asm/arch/cpu.h>
+#include <dm.h>
+#include <ns16550.h>
+#include <dm/platform_data/lpc32xx_hsuart.h>
+
#include <asm/arch/clk.h>
#include <asm/arch/uart.h>
#include <asm/arch/mux.h>
#include <asm/io.h>
-#include <dm.h>
static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
&clk->u3clk + (uart_id - 3));
}
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
+static const struct ns16550_platdata lpc32xx_uart[] = {
+ { UART3_BASE, 2, CONFIG_SYS_NS16550_CLK },
+ { UART4_BASE, 2, CONFIG_SYS_NS16550_CLK },
+ { UART5_BASE, 2, CONFIG_SYS_NS16550_CLK },
+ { UART6_BASE, 2, CONFIG_SYS_NS16550_CLK },
+};
+
+#if defined(CONFIG_LPC32XX_HSUART)
+static const struct lpc32xx_hsuart_platdata lpc32xx_hsuart[] = {
+ { HS_UART1_BASE, },
+ { HS_UART2_BASE, },
+ { HS_UART7_BASE, },
+};
+#endif
+
+U_BOOT_DEVICES(lpc32xx_uarts) = {
+#if defined(CONFIG_LPC32XX_HSUART)
+ { "lpc32xx_hsuart", &lpc32xx_hsuart[0], },
+ { "lpc32xx_hsuart", &lpc32xx_hsuart[1], },
+#endif
+ { "ns16550_serial", &lpc32xx_uart[0], },
+ { "ns16550_serial", &lpc32xx_uart[1], },
+ { "ns16550_serial", &lpc32xx_uart[2], },
+ { "ns16550_serial", &lpc32xx_uart[3], },
+#if defined(CONFIG_LPC32XX_HSUART)
+ { "lpc32xx_hsuart", &lpc32xx_hsuart[2], },
+#endif
+};
+#endif
+
void lpc32xx_dma_init(void)
{
/* Enable DMA interface */
#define CONFIG_NR_DRAM_BANKS_MAX 2
/* UART configuration */
-#if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
-#elif (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
+#if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
(CONFIG_SYS_LPC32XX_UART == 7)
+#if !defined(CONFIG_LPC32XX_HSUART)
#define CONFIG_LPC32XX_HSUART
-#else
-#error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7"
#endif
-
-#if defined(CONFIG_SYS_NS16550_SERIAL)
-
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-
-#define CONFIG_SYS_NS16550_COM1 UART3_BASE
-#define CONFIG_SYS_NS16550_COM2 UART4_BASE
-#define CONFIG_SYS_NS16550_COM3 UART5_BASE
-#define CONFIG_SYS_NS16550_COM4 UART6_BASE
#endif
-#if defined(CONFIG_LPC32XX_HSUART)
-#if CONFIG_SYS_LPC32XX_UART == 1
-#define HS_UART_BASE HS_UART1_BASE
-#elif CONFIG_SYS_LPC32XX_UART == 2
-#define HS_UART_BASE HS_UART2_BASE
-#else /* CONFIG_SYS_LPC32XX_UART == 7 */
-#define HS_UART_BASE HS_UART7_BASE
+#if !defined(CONFIG_SYS_NS16550_CLK)
+#define CONFIG_SYS_NS16550_CLK 13000000
#endif
+
+#if !defined(CONFIG_LPC32XX_HSUART)
+#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
+#else
+#define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART
#endif
#define CONFIG_SYS_BAUDRATE_TABLE \
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
#endif
mov r0, sp
- bl board_init_f_mem
+ bl board_init_f_alloc_reserve
mov sp, r0
+ /* set up gd here, outside any C code */
+ mov r9, r0
+ bl board_init_f_init_reserve
mov r0, #0
bl board_init_f
bl spl_relocate_stack_gd
cmp r0, #0
movne sp, r0
+ movne r9, r0
# endif
ldr r0, =__bss_start /* this is auto-relocated! */
ldr x0, =(CONFIG_SYS_INIT_SP_ADDR)
#endif
bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
- bl board_init_f_mem
+ mov x0, sp
+ bl board_init_f_alloc_reserve
mov sp, x0
+ bl board_init_f_init_reserve
mov x0, #0
bl board_init_f
addi r8, r0, __end
mts rslr, r8
- /* TODO: Redo this code to call board_init_f_mem() */
+ /* TODO: Redo this code to call board_init_f_*() */
#if defined(CONFIG_SPL_BUILD)
addi r1, r0, CONFIG_SPL_STACK_ADDR
mts rshr, r1
ori r12, r12, 0x1a0
mts rmsr, r12
- /* TODO: Redo this code to call board_init_f_mem() */
+ /* TODO: Redo this code to call board_init_f_*() */
clear_bss:
/* clear BSS segments */
addi r5, r0, __bss_start
stw r0, 4(sp)
mov fp, sp
- /* Allocate and zero GD, update SP */
+ /* Allocate and initialize reserved area, update SP */
mov r4, sp
- movhi r2, %hi(board_init_f_mem@h)
- ori r2, r2, %lo(board_init_f_mem@h)
+ movhi r2, %hi(board_init_f_alloc_reserve@h)
+ ori r2, r2, %lo(board_init_f_alloc_reserve@h)
callr r2
-
- /* Update stack- and frame-pointers */
mov sp, r2
+ mov r4, sp
+ movhi r2, %hi(board_init_f_init_reserve@h)
+ ori r2, r2, %lo(board_init_f_init_reserve@h)
+ callr r2
+
+ /* Update frame-pointer */
mov fp, sp
/* Call board_init_f -- never returns */
bl cpu_init_f /* run low-level CPU init code (from Flash) */
#ifdef CONFIG_SYS_GENERIC_BOARD
mr r3, r1
- bl board_init_f_mem
+ bl board_init_f_alloc_reserve
mr r1, r3
+ bl board_init_f_init_reserve
li r0,0
stwu r0, -4(r1)
stwu r0, -4(r1)
bl cpu_init_f /* run low-level CPU init code (from Flash) */
#ifdef CONFIG_SYS_GENERIC_BOARD
mr r3, r1
- bl board_init_f_mem
+ bl board_init_f_alloc_reserve
mr r1, r3
+ bl board_init_f_init_reserve
stwu r0, -4(r1)
stwu r0, -4(r1)
#endif
#endif
/* Set up global data */
mov %esp, %eax
- call board_init_f_mem
+ call board_init_f_alloc_reserve
mov %eax, %esp
+ call board_init_f_init_reserve
#ifdef CONFIG_DEBUG_UART
call debug_uart_init
/*
* The second time we enter here, adjust the size of malloc()
* pool before relocation. Given gd->malloc_base was adjusted
- * after the call to board_init_f_mem() in arch/x86/cpu/start.S,
- * we should fix up gd->malloc_limit here.
+ * after the call to board_init_f_init_reserve() in arch/x86/
+ * cpu/start.S, we should fix up gd->malloc_limit here.
*/
gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
}
return 1;
/* read out the first block, get the config data information */
- n = mmc->block_dev.block_read(mmc->block_dev.dev, 0, 1, tmp_buf);
+ n = mmc->block_dev.block_read(&mmc->block_dev, 0, 1, tmp_buf);
if (!n) {
free(tmp_buf);
return 1;
ofs = src % blk_len;
if (ofs) {
- n = mmc->block_dev.block_read(mmc->block_dev.dev, block_no++, 1,
+ n = mmc->block_dev.block_read(&mmc->block_dev, block_no++, 1,
tmp_buf);
if (!n)
goto failure;
}
cnt = size / blk_len;
if (cnt) {
- n = mmc->block_dev.block_read(mmc->block_dev.dev, block_no, cnt,
+ n = mmc->block_dev.block_read(&mmc->block_dev, block_no, cnt,
dst);
if (n != cnt)
goto failure;
block_no += cnt;
}
if (size) {
- n = mmc->block_dev.block_read(mmc->block_dev.dev, block_no++, 1,
+ n = mmc->block_dev.block_read(&mmc->block_dev, block_no++, 1,
tmp_buf);
if (!n)
goto failure;
return 1;
/* read out the first block, get the config data information */
- n = mmc->block_dev.block_read(mmc->block_dev.dev, 0, 1, tmp_buf);
+ n = mmc->block_dev.block_read(&mmc->block_dev, 0, 1, tmp_buf);
if (!n) {
free(tmp_buf);
return 1;
MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /* SDRC_DQS2 */\
MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /* SDRC_DQS3 */ \
/* GPMC */ \
- MUX_VAL(CP(GPMC_A1), (IDIS | PTU | DIS | M4)) /* GPIO_34: LCD_RESET_N */ \
- MUX_VAL(CP(GPMC_A2), (IEN | PTU | DIS | M4)) /* GPIO_35: TOUCH_INT_N */ \
- MUX_VAL(CP(GPMC_A3), (IDIS | PTU | DIS | M4)) /* GPIO_36: VT_CAM_PWDN */ \
- MUX_VAL(CP(GPMC_A4), (IDIS | PTU | DIS | M4)) /* GPIO_37: CAM_SUBPM_EN */\
+ MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M4)) /* GPIO_34: LCD_RESET_N */ \
+ MUX_VAL(CP(GPMC_A2), (IEN | PTD | DIS | M4)) /* GPIO_35: TOUCH_INT_N */ \
+ MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M4)) /* GPIO_36: VT_CAM_PWDN */ \
+ MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M4)) /* GPIO_37: CAM_SUBPM_EN */\
MUX_VAL(CP(GPMC_A5), (IEN | PTD | DIS | M4)) /* GPIO_38: MODEM_PWR_CHK */\
MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M4)) /* GPIO_39: MODEM_WAKE */\
- MUX_VAL(CP(GPMC_A7), (IEN | PTU | DIS | M4)) /* GPIO_40: MUIC_INT_N */\
+ MUX_VAL(CP(GPMC_A7), (IEN | PTD | DIS | M4)) /* GPIO_40: MUIC_INT_N */\
MUX_VAL(CP(GPMC_A8), (IEN | PTD | DIS | M4)) /* GPIO_41: GYRO_INT_N */\
MUX_VAL(CP(GPMC_A9), (IEN | PTD | EN | M4)) /* GPIO_42: MOTION_INT_N */\
MUX_VAL(CP(GPMC_A10), (IEN | PTD | DIS | M4)) /* GPIO_43: BT_HOST_WAKEUP */\
MUX_VAL(CP(CAM_VS), (IEN | PTD | EN | M0)) /* CAM_VS */ \
MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /* CAM_XCLKA */ \
MUX_VAL(CP(CAM_PCLK), (IEN | PTD | EN | M0)) /* CAM_PCLK */ \
- MUX_VAL(CP(CAM_FLD), (IDIS | PTU | DIS | M4)) /* GPIO_98: 5M_RESET_N */ \
+ MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /* GPIO_98: 5M_RESET_N */ \
MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M2)) /* CSI2_DX2 */ \
MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M2)) /* CSI2_DY2 */ \
MUX_VAL(CP(CAM_D2), (IDIS | PTD | EN | M4)) /* GPIO_101: IFX_USB_VBUS_EN */ \
MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /* MCBSP2_DR */ \
MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /* MCBSP2_DX */ \
/* MMC1 */ \
- MUX_VAL(CP(MMC1_CLK), (IDIS | PTD | DIS | M0)) /* MMC1_CLK */ \
- MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) /* MMC1_CMD */ \
- MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) /* MMC1_DAT0 */ \
- MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) /* MMC1_DAT1 */ \
- MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) /* MMC1_DAT2 */ \
- MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) /* MMC1_DAT3 */ \
+ MUX_VAL(CP(MMC1_CLK), (IEN | PTD | DIS | M0)) /* MMC1_CLK */ \
+ MUX_VAL(CP(MMC1_CMD), (IEN | PTD | DIS | M0)) /* MMC1_CMD */ \
+ MUX_VAL(CP(MMC1_DAT0), (IEN | PTD | DIS | M0)) /* MMC1_DAT0 */ \
+ MUX_VAL(CP(MMC1_DAT1), (IEN | PTD | DIS | M0)) /* MMC1_DAT1 */ \
+ MUX_VAL(CP(MMC1_DAT2), (IEN | PTD | DIS | M0)) /* MMC1_DAT2 */ \
+ MUX_VAL(CP(MMC1_DAT3), (IEN | PTD | DIS | M0)) /* MMC1_DAT3 */ \
MUX_VAL(CP(MMC1_DAT4), (IEN | PTD | DIS | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | DIS | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(MMC1_DAT6), (IEN | PTD | DIS | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)) /* MCBSP3_CLKX */ \
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)) /* MCBSP3_FSX */ \
/* UART2 */ \
- MUX_VAL(CP(UART2_CTS), (IEN | PTU | DIS | M0)) /* UART2_CTS */ \
- MUX_VAL(CP(UART2_RTS), (IDIS | PTU | DIS | M0)) /* UART2_RTS */ \
+ MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M0)) /* UART2_CTS */ \
+ MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /* UART2_RTS */ \
MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /* UART2_TX */ \
MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) /* UART2_RX */ \
/* UART1 */ \
- MUX_VAL(CP(UART1_TX), (IDIS | PTU | DIS | M0)) /* UART1_TX */ \
- MUX_VAL(CP(UART1_RTS), (IDIS | PTU | DIS | M0)) /* UART1_RTS */ \
- MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /* UART1_CTS */ \
- MUX_VAL(CP(UART1_RX), (IEN | PTU | DIS | M0)) /* UART1_RX */ \
+ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /* UART1_TX */ \
+ MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /* UART1_RTS */ \
+ MUX_VAL(CP(UART1_CTS), (IEN | PTD | DIS | M0)) /* UART1_CTS */ \
+ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /* UART1_RX */ \
/* MCBSP4 */ \
MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)) /* GPIO_152: GPS_PWR_ON */ \
MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /* GPIO_153: GPS_RESET_N */ \
MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */ \
MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /* I2C1_SDA */ \
/* I2C2 */ \
- MUX_VAL(CP(I2C2_SCL), (IEN | PTU | DIS | M0)) /* I2C2_SCL */ \
- MUX_VAL(CP(I2C2_SDA), (IEN | PTU | DIS | M0)) /* I2C2_SDA */ \
+ MUX_VAL(CP(I2C2_SCL), (IEN | PTD | DIS | M0)) /* I2C2_SCL */ \
+ MUX_VAL(CP(I2C2_SDA), (IEN | PTD | DIS | M0)) /* I2C2_SDA */ \
/* I2C3 */ \
- MUX_VAL(CP(I2C3_SCL), (IEN | PTU | DIS | M0)) /* I2C3_SCL */ \
- MUX_VAL(CP(I2C3_SDA), (IEN | PTU | DIS | M0)) /* I2C3_SDA */ \
+ MUX_VAL(CP(I2C3_SCL), (IEN | PTD | DIS | M0)) /* I2C3_SCL */ \
+ MUX_VAL(CP(I2C3_SDA), (IEN | PTD | DIS | M0)) /* I2C3_SDA */ \
/* I2C4 */ \
MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /* I2C4_SCL */ \
MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /* I2C4_SDA */ \
MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | EN | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | EN | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M7)) /* SAFE_MODE */ \
- MUX_VAL(CP(MCSPI1_CS1), (IEN | PTU | DIS | M4)) /* GPIO_175: GAUGE_INT */ \
- MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /* GPIO_176: MODEM_SEND */ \
- MUX_VAL(CP(MCSPI1_CS3), (IDIS | PTU | DIS | M4)) /* GPIO_177: MODEM_CHK */ \
+ MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | DIS | M4)) /* GPIO_175: GAUGE_INT */ \
+ MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /* GPIO_176: MODEM_SEND */ \
+ MUX_VAL(CP(MCSPI1_CS3), (IDIS | PTD | DIS | M4)) /* GPIO_177: MODEM_CHK */ \
MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M0)) /* MCSPI2_CLK */ \
MUX_VAL(CP(MCSPI2_SIMO), (IDIS | PTD | DIS | M0)) /* MCSPI2_SIMO */ \
MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /* MCSPI2_SOMI */ \
- MUX_VAL(CP(MCSPI2_CS0), (IDIS | PTU | DIS | M4)) /* GPIO_181: WLAN_WAKEUP */ \
+ MUX_VAL(CP(MCSPI2_CS0), (IDIS | PTD | DIS | M4)) /* GPIO_181: WLAN_WAKEUP */ \
MUX_VAL(CP(MCSPI2_CS1), (IDIS | PTD | DIS | M4)) /* GPIO_182: USIF1_SW */ \
/* SYS */ \
MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /* SYS_32K */ \
MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | EN | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(SYS_BOOT6), (IEN | PTU | EN | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(SYS_OFF_MODE), (IDIS | PTD | DIS | M0)) /* SYS_OFF_MODE */ \
- MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTU | DIS | M4)) /* GPIO_10: MICROSD_DET_N */ \
+ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M4)) /* GPIO_10: MICROSD_DET_N */ \
MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTD | EN | M7)) /* SAFE_MODE */ \
/* JTAG */ \
MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)) /* JTAG_NTRST */ \
MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /* JTAG_TCK */ \
MUX_VAL(CP(JTAG_TMS), (IEN | PTU | EN | M0)) /* JTAG_TMS */ \
MUX_VAL(CP(JTAG_TDI), (IEN | PTU | EN | M0)) /* JTAG_TDI */ \
- MUX_VAL(CP(JTAG_EMU0), (IEN | PTU | DIS | M0)) /* JTAG_EMU0 */ \
- MUX_VAL(CP(JTAG_EMU1), (IEN | PTU | DIS | M0)) /* JTAG_EMU1 */ \
+ MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /* JTAG_EMU0 */ \
+ MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /* JTAG_EMU1 */ \
/* ETK */ \
MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTD | DIS | M2)) /* SDMMC3_CLK */ \
MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /* SDMMC3_CMD */ \
MUX_VAL(CP(ETK_D0_ES2), (IEN | PTD | EN | M4)) /* GPIO_14: PROX_OUT */ \
- MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | DIS | M4)) /* GPIO_15: CHG_STATUS_N_OMAP */ \
+ MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | DIS | M4)) /* GPIO_15: CHG_STATUS_N_OMAP */ \
MUX_VAL(CP(ETK_D2_ES2), (IEN | PTD | DIS | M4)) /* GPIO_16: BT_EN */ \
- MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | DIS | M2)) /* SDMMC3_DAT3 */ \
- MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M2)) /* SDMMC3_DAT0 */ \
- MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | DIS | M2)) /* SDMMC3_DAT1 */ \
- MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | DIS | M2)) /* SDMMC3_DAT2 */ \
+ MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | DIS | M2)) /* SDMMC3_DAT3 */ \
+ MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | DIS | M2)) /* SDMMC3_DAT0 */ \
+ MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | DIS | M2)) /* SDMMC3_DAT1 */ \
+ MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | DIS | M2)) /* SDMMC3_DAT2 */ \
MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | EN | M4)) /* GPIO_21: IPC_SRDY */ \
MUX_VAL(CP(ETK_D8_ES2), (IDIS | PTD | DIS | M4)) /* GPIO_22: IPC_MRDY */ \
MUX_VAL(CP(ETK_D9_ES2), (IDIS | PTD | DIS | M4)) /* GPIO_23: WLAN_EN */ \
MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /* D2D_MCAD36 */ \
MUX_VAL(CP(D2D_CLK26MI), (IDIS | PTD | DIS | M0)) /* D2D_CLK26MI */ \
MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTU | EN | M0)) /* D2D_NRESPWRON */ \
- MUX_VAL(CP(D2D_NRESWARM), (IDIS | PTU | DIS | M0)) /* D2D_NRESWARM */ \
+ MUX_VAL(CP(D2D_NRESWARM), (IDIS | PTD | DIS | M0)) /* D2D_NRESWARM */ \
MUX_VAL(CP(D2D_ARM9NIRQ), (IDIS | PTD | DIS | M0)) /* D2D_ARM9NIRQ */ \
MUX_VAL(CP(D2D_UMA2P6FIQ), (IDIS | PTD | DIS | M0)) /* D2D_UMA2P6FIQ */ \
MUX_VAL(CP(D2D_SPINT), (IEN | PTD | DIS | M0)) /* D2D_SPINT */ \
MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /* D2D_SREAD */ \
MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /* D2D_MBUSFLAG */ \
MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /* D2D_SBUSFLAG */ \
- MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | DIS | M0)) /* SDRC_CKE0 */ \
- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | DIS | M0)) /* SDRC_CKE1 */ \
+ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTD | DIS | M0)) /* SDRC_CKE0 */ \
+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M0)) /* SDRC_CKE1 */ \
MUX_VAL(CP(GPIO127), (IEN | PTD | DIS | M7)) /* SAFE_MODE */ \
MUX_VAL(CP(GPIO126), (IDIS | PTD | DIS | M4)) /* GPIO_126: OMAP_SEND */ \
MUX_VAL(CP(GPIO128), (IDIS | PTD | DIS | M4)) /* GPIO_128: KEY_LED_RESET */ \
help
Extract a part of a multi-image.
+config CMD_POWEROFF
+ bool
+
endmenu
menu "Environment commands"
flag = 0; /* assume no special flags for now */
if (len > 0)
- strcpy(lastcommand, console_buffer);
+ strlcpy(lastcommand, console_buffer,
+ CONFIG_SYS_CBSIZE + 1);
else if (len == 0)
flag |= CMD_FLAG_REPEAT;
#ifdef CONFIG_BOOT_RETRY_TIME
"Perform RESET of the CPU",
""
);
+
+#ifdef CONFIG_CMD_POWEROFF
+U_BOOT_CMD(
+ poweroff, 1, 0, do_poweroff,
+ "Perform POWEROFF of the device",
+ ""
+);
+#endif
", Block Size: %ld\n",
info.start, info.size, info.blksz);
- if (dev_desc->block_read(dev, info.start, 1, (ulong *) addr) != 1) {
+ if (dev_desc->block_read(dev_desc, info.start, 1, (ulong *)addr) != 1) {
printf("** Read error on %d:%d\n", dev, part);
bootstage_error(BOOTSTAGE_ID_IDE_PART_READ);
return 1;
cnt /= info.blksz;
cnt -= 1;
- if (dev_desc->block_read(dev, info.start + 1, cnt,
- (ulong *)(addr + info.blksz)) != cnt) {
+ if (dev_desc->block_read(dev_desc, info.start + 1, cnt,
+ (ulong *)(addr + info.blksz)) != cnt) {
printf("** Read error on %d:%d\n", dev, part);
bootstage_error(BOOTSTAGE_ID_IDE_READ);
return 1;
#ifdef CONFIG_ATAPI
static void atapi_inquiry(block_dev_desc_t *dev_desc);
-static ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
- void *buffer);
+static ulong atapi_read(block_dev_desc_t *block_dev, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer);
#endif
if (strcmp(argv[1], "read") == 0) {
ulong addr = simple_strtoul(argv[2], NULL, 16);
ulong cnt = simple_strtoul(argv[4], NULL, 16);
+ block_dev_desc_t *dev_desc;
ulong n;
#ifdef CONFIG_SYS_64BIT_LBA
curr_device, blk, cnt);
#endif
- n = ide_dev_desc[curr_device].block_read(curr_device,
- blk, cnt,
- (ulong *)addr);
+ dev_desc = &ide_dev_desc[curr_device];
+ n = dev_desc->block_read(dev_desc, blk, cnt,
+ (ulong *)addr);
/* flush cache after read */
flush_cache(addr,
cnt * ide_dev_desc[curr_device].blksz);
printf("\nIDE write: device %d block # %ld, count %ld ... ",
curr_device, blk, cnt);
#endif
- n = ide_write(curr_device, blk, cnt, (ulong *) addr);
+ n = ide_write(&ide_dev_desc[curr_device], blk, cnt,
+ (ulong *)addr);
printf("%ld blocks written: %s\n",
n, (n == cnt) ? "OK" : "ERROR");
/* ------------------------------------------------------------------------- */
-ulong ide_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
+ulong ide_read(block_dev_desc_t *block_dev, lbaint_t blknr, lbaint_t blkcnt,
+ void *buffer)
{
+ int device = block_dev->dev;
ulong n = 0;
unsigned char c;
unsigned char pwrsave = 0; /* power save */
/* ------------------------------------------------------------------------- */
-ulong ide_write(int device, lbaint_t blknr, lbaint_t blkcnt, const void *buffer)
+ulong ide_write(block_dev_desc_t *block_dev, lbaint_t blknr, lbaint_t blkcnt,
+ const void *buffer)
{
+ int device = block_dev->dev;
ulong n = 0;
unsigned char c;
#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
#define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
-ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
+ulong atapi_read(block_dev_desc_t *block_dev, lbaint_t blknr, lbaint_t blkcnt,
+ void *buffer)
{
+ int device = block_dev->dev;
ulong n = 0;
unsigned char ccb[12]; /* Command descriptor block */
ulong cnt;
return CMD_RET_FAILURE;
}
/* Switch to the RPMB partition */
- original_part = mmc->part_num;
- if (mmc->part_num != MMC_PART_RPMB) {
- if (mmc_switch_part(curr_device, MMC_PART_RPMB) != 0)
- return CMD_RET_FAILURE;
- mmc->part_num = MMC_PART_RPMB;
- }
+ original_part = mmc->block_dev.part_num;
+ if (mmc_select_hwpart(curr_device, MMC_PART_RPMB) != 0)
+ return CMD_RET_FAILURE;
ret = cp->cmd(cmdtp, flag, argc, argv);
/* Return to original partition */
- if (mmc->part_num != original_part) {
- if (mmc_switch_part(curr_device, original_part) != 0)
- return CMD_RET_FAILURE;
- mmc->part_num = original_part;
- }
+ if (mmc_select_hwpart(curr_device, original_part) != 0)
+ return CMD_RET_FAILURE;
return ret;
}
#endif
printf("\nMMC read: dev # %d, block # %d, count %d ... ",
curr_device, blk, cnt);
- n = mmc->block_dev.block_read(curr_device, blk, cnt, addr);
+ n = mmc->block_dev.block_read(&mmc->block_dev, blk, cnt, addr);
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512); /* FIXME */
printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
printf("Error: card is write protected!\n");
return CMD_RET_FAILURE;
}
- n = mmc->block_dev.block_write(curr_device, blk, cnt, addr);
+ n = mmc->block_dev.block_write(&mmc->block_dev, blk, cnt, addr);
printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR");
return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
printf("Error: card is write protected!\n");
return CMD_RET_FAILURE;
}
- n = mmc->block_dev.block_erase(curr_device, blk, cnt);
+ n = mmc->block_dev.block_erase(&mmc->block_dev, blk, cnt);
printf("%d blocks erased: %s\n", n, (n == cnt) ? "OK" : "ERROR");
return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
printf("mmc%d is current device\n", curr_device);
else
printf("mmc%d(part %d) is current device\n",
- curr_device, mmc->part_num);
+ curr_device, mmc->block_dev.hwpart);
return CMD_RET_SUCCESS;
}
return 1;
}
- if (dev_desc->block_read(dev, offset + blk, cnt, addr) < 0) {
+ if (dev_desc->block_read(dev_desc, offset + blk, cnt, addr) < 0) {
printf("Error reading blocks\n");
return 1;
}
static int sata_curr_device = -1;
block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
+static unsigned long sata_bread(block_dev_desc_t *block_dev, lbaint_t start,
+ lbaint_t blkcnt, void *dst)
+{
+ return sata_read(block_dev->dev, start, blkcnt, dst);
+}
+
+static unsigned long sata_bwrite(block_dev_desc_t *block_dev, lbaint_t start,
+ lbaint_t blkcnt, const void *buffer)
+{
+ return sata_write(block_dev->dev, start, blkcnt, buffer);
+}
+
int __sata_initialize(void)
{
int rc;
sata_dev_desc[i].lba = 0;
sata_dev_desc[i].blksz = 512;
sata_dev_desc[i].log2blksz = LOG2(sata_dev_desc[i].blksz);
- sata_dev_desc[i].block_read = sata_read;
- sata_dev_desc[i].block_write = sata_write;
+ sata_dev_desc[i].block_read = sata_bread;
+ sata_dev_desc[i].block_write = sata_bwrite;
rc = init_sata(i);
if (!rc) {
static int scsi_read_capacity(ccb *pccb, lbaint_t *capacity,
unsigned long *blksz);
-static ulong scsi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
- void *buffer);
-static ulong scsi_write(int device, lbaint_t blknr,
+static ulong scsi_read(block_dev_desc_t *block_dev, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer);
+static ulong scsi_write(block_dev_desc_t *block_dev, lbaint_t blknr,
lbaint_t blkcnt, const void *buffer);
ulong n;
printf ("\nSCSI read: device %d block # %ld, count %ld ... ",
scsi_curr_dev, blk, cnt);
- n = scsi_read(scsi_curr_dev, blk, cnt, (ulong *)addr);
+ n = scsi_read(&scsi_dev_desc[scsi_curr_dev],
+ blk, cnt, (ulong *)addr);
printf ("%ld blocks read: %s\n",n,(n==cnt) ? "OK" : "ERROR");
return 0;
} else if (strcmp(argv[1], "write") == 0) {
printf("\nSCSI write: device %d block # %ld, "
"count %ld ... ",
scsi_curr_dev, blk, cnt);
- n = scsi_write(scsi_curr_dev, blk, cnt,
- (ulong *)addr);
+ n = scsi_write(&scsi_dev_desc[scsi_curr_dev],
+ blk, cnt, (ulong *)addr);
printf("%ld blocks written: %s\n", n,
(n == cnt) ? "OK" : "ERROR");
return 0;
#define SCSI_MAX_READ_BLK 0xFFFF
#define SCSI_LBA48_READ 0xFFFFFFF
-static ulong scsi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
- void *buffer)
+static ulong scsi_read(block_dev_desc_t *block_dev, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer)
{
+ int device = block_dev->dev;
lbaint_t start, blks;
uintptr_t buf_addr;
unsigned short smallblks = 0;
/* Almost the maximum amount of the scsi_ext command.. */
#define SCSI_MAX_WRITE_BLK 0xFFFF
-static ulong scsi_write(int device, lbaint_t blknr,
+static ulong scsi_write(block_dev_desc_t *block_dev, lbaint_t blknr,
lbaint_t blkcnt, const void *buffer)
{
+ int device = block_dev->dev;
lbaint_t start, blks;
uintptr_t buf_addr;
unsigned short smallblks;
printf("\nUSB read: device %d block # %ld, count %ld"
" ... ", usb_stor_curr_dev, blk, cnt);
stor_dev = usb_stor_get_dev(usb_stor_curr_dev);
- n = stor_dev->block_read(usb_stor_curr_dev, blk, cnt,
+ n = stor_dev->block_read(stor_dev, blk, cnt,
(ulong *)addr);
printf("%ld blocks read: %s\n", n,
(n == cnt) ? "OK" : "ERROR");
printf("\nUSB write: device %d block # %ld, count %ld"
" ... ", usb_stor_curr_dev, blk, cnt);
stor_dev = usb_stor_get_dev(usb_stor_curr_dev);
- n = stor_dev->block_write(usb_stor_curr_dev, blk, cnt,
+ n = stor_dev->block_write(stor_dev, blk, cnt,
(ulong *)addr);
printf("%ld blocks write: %s\n", n,
(n == cnt) ? "OK" : "ERROR");
* Copyright (C) 2011 Samsung Electronics
* Lukasz Majewski <l.majewski@samsung.com>
*
+ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
+ *
* SPDX-License-Identifier: GPL-2.0+
*/
static int ums_read_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, void *buf)
{
- block_dev_desc_t *block_dev = ums_dev->block_dev;
+ block_dev_desc_t *block_dev = &ums_dev->block_dev;
lbaint_t blkstart = start + ums_dev->start_sector;
- int dev_num = block_dev->dev;
- return block_dev->block_read(dev_num, blkstart, blkcnt, buf);
+ return block_dev->block_read(block_dev, blkstart, blkcnt, buf);
}
static int ums_write_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, const void *buf)
{
- block_dev_desc_t *block_dev = ums_dev->block_dev;
+ block_dev_desc_t *block_dev = &ums_dev->block_dev;
lbaint_t blkstart = start + ums_dev->start_sector;
- int dev_num = block_dev->dev;
- return block_dev->block_write(dev_num, blkstart, blkcnt, buf);
+ return block_dev->block_write(block_dev, blkstart, blkcnt, buf);
+}
+
+static struct ums *ums;
+static int ums_count;
+
+static void ums_fini(void)
+{
+ int i;
+
+ for (i = 0; i < ums_count; i++)
+ free((void *)ums[i].name);
+ free(ums);
+ ums = 0;
+ ums_count = 0;
}
-static struct ums ums_dev = {
- .read_sector = ums_read_sector,
- .write_sector = ums_write_sector,
- .name = "UMS disk",
-};
+#define UMS_NAME_LEN 16
-struct ums *ums_init(const char *devtype, const char *devnum)
+static int ums_init(const char *devtype, const char *devnums)
{
+ char *s, *t, *devnum, *name;
block_dev_desc_t *block_dev;
int ret;
+ struct ums *ums_new;
- ret = get_device(devtype, devnum, &block_dev);
- if (ret < 0)
- return NULL;
+ s = strdup(devnums);
+ if (!s)
+ return -1;
+
+ t = s;
+ ums_count = 0;
+
+ for (;;) {
+ devnum = strsep(&t, ",");
+ if (!devnum)
+ break;
+
+ ret = get_device(devtype, devnum, &block_dev);
+ if (ret < 0)
+ goto cleanup;
+
+ /* f_mass_storage.c assumes SECTOR_SIZE sectors */
+ if (block_dev->blksz != SECTOR_SIZE) {
+ ret = -1;
+ goto cleanup;
+ }
- /* f_mass_storage.c assumes SECTOR_SIZE sectors */
- if (block_dev->blksz != SECTOR_SIZE)
- return NULL;
+ ums_new = realloc(ums, (ums_count + 1) * sizeof(*ums));
+ if (!ums_new) {
+ ret = -1;
+ goto cleanup;
+ }
+ ums = ums_new;
+
+ ums[ums_count].read_sector = ums_read_sector;
+ ums[ums_count].write_sector = ums_write_sector;
+ ums[ums_count].start_sector = 0;
+ ums[ums_count].num_sectors = block_dev->lba;
+ name = malloc(UMS_NAME_LEN);
+ if (!name) {
+ ret = -1;
+ goto cleanup;
+ }
+ snprintf(name, UMS_NAME_LEN, "UMS disk %d", ums_count);
+ ums[ums_count].name = name;
+ ums[ums_count].block_dev = *block_dev;
+
+ printf("UMS: LUN %d, dev %d, hwpart %d, sector %#x, count %#x\n",
+ ums_count, ums[ums_count].block_dev.dev,
+ ums[ums_count].block_dev.hwpart,
+ ums[ums_count].start_sector,
+ ums[ums_count].num_sectors);
+
+ ums_count++;
+ }
+
+ if (!ums_count)
+ ret = -1;
+ else
+ ret = 0;
- ums_dev.block_dev = block_dev;
- ums_dev.start_sector = 0;
- ums_dev.num_sectors = block_dev->lba;
+cleanup:
+ free(s);
- printf("UMS: disk start sector: %#x, count: %#x\n",
- ums_dev.start_sector, ums_dev.num_sectors);
+ if (ret < 0)
+ ums_fini();
- return &ums_dev;
+ return ret;
}
int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
const char *usb_controller;
const char *devtype;
const char *devnum;
- struct ums *ums;
unsigned int controller_index;
int rc;
int cable_ready_timeout __maybe_unused;
devnum = argv[2];
}
- ums = ums_init(devtype, devnum);
- if (!ums)
+ rc = ums_init(devtype, devnum);
+ if (rc < 0)
return CMD_RET_FAILURE;
controller_index = (unsigned int)(simple_strtoul(
usb_controller, NULL, 0));
if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
error("Couldn't init USB controller.");
- return CMD_RET_FAILURE;
+ rc = CMD_RET_FAILURE;
+ goto cleanup_ums_init;
}
- rc = fsg_init(ums);
+ rc = fsg_init(ums, ums_count);
if (rc) {
error("fsg_init failed");
- return CMD_RET_FAILURE;
+ rc = CMD_RET_FAILURE;
+ goto cleanup_board;
}
rc = g_dnl_register("usb_dnl_ums");
if (rc) {
error("g_dnl_register failed");
- return CMD_RET_FAILURE;
+ rc = CMD_RET_FAILURE;
+ goto cleanup_board;
}
/* Timeout unit: seconds */
while (!g_dnl_board_usb_cable_connected()) {
if (ctrlc()) {
puts("\rCTRL+C - Operation aborted.\n");
- goto exit;
+ rc = CMD_RET_SUCCESS;
+ goto cleanup_register;
}
if (!cable_ready_timeout) {
puts("\rUSB cable not detected.\n" \
"Command exit.\n");
- goto exit;
+ rc = CMD_RET_SUCCESS;
+ goto cleanup_register;
}
printf("\rAuto exit in: %.2d s.", cable_ready_timeout);
if (rc == -EPIPE)
printf("\rCTRL+C - Operation aborted\n");
- goto exit;
+ rc = CMD_RET_SUCCESS;
+ goto cleanup_register;
}
}
-exit:
+
+cleanup_register:
g_dnl_unregister();
+cleanup_board:
board_usb_cleanup(controller_index, USB_INIT_DEVICE);
- return CMD_RET_SUCCESS;
+cleanup_ums_init:
+ ums_fini();
+
+ return rc;
}
U_BOOT_CMD(ums, 4, 1, do_usb_mass_storage,
{
int i;
- for (i = 0; i < sizeof(env_flags_varaccess_mask); i++)
+ for (i = 0; i < ARRAY_SIZE(env_flags_varaccess_mask); i++)
if (env_flags_varaccess_mask[i] ==
(binflags & ENV_FLAGS_VARACCESS_BIN_MASK))
return (enum env_flags_varaccess)i;
return CONFIG_SYS_MMC_ENV_PART;
}
+static unsigned char env_mmc_orig_hwpart;
+
static int mmc_set_env_part(struct mmc *mmc)
{
uint part = mmc_get_env_part(mmc);
dev = 0;
#endif
- if (part != mmc->part_num) {
- ret = mmc_switch_part(dev, part);
- if (ret)
- puts("MMC partition switch failed\n");
- }
+ env_mmc_orig_hwpart = mmc->block_dev.hwpart;
+ ret = mmc_select_hwpart(dev, part);
+ if (ret)
+ puts("MMC partition switch failed\n");
return ret;
}
#ifdef CONFIG_SPL_BUILD
dev = 0;
#endif
- if (mmc_get_env_part(mmc) != mmc->part_num)
- mmc_switch_part(dev, mmc->part_num);
+ mmc_select_hwpart(dev, env_mmc_orig_hwpart);
#endif
}
blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len;
blk_cnt = ALIGN(size, mmc->write_bl_len) / mmc->write_bl_len;
- n = mmc->block_dev.block_write(CONFIG_SYS_MMC_ENV_DEV, blk_start,
+ n = mmc->block_dev.block_write(&mmc->block_dev, blk_start,
blk_cnt, (u_char *)buffer);
return (n == blk_cnt) ? 0 : -1;
unsigned long offset, const void *buffer)
{
uint blk_start, blk_cnt, n;
- int dev = CONFIG_SYS_MMC_ENV_DEV;
-
-#ifdef CONFIG_SPL_BUILD
- dev = 0;
-#endif
blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
blk_cnt = ALIGN(size, mmc->read_bl_len) / mmc->read_bl_len;
- n = mmc->block_dev.block_read(dev, blk_start, blk_cnt, (uchar *)buffer);
+ n = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
+ (uchar *)buffer);
return (n == blk_cnt) ? 0 : -1;
}
block_dev_desc_t *dev_desc = sparse->dev_desc;
int ret;
- ret = dev_desc->block_write(dev_desc->dev, offset, size, data);
+ ret = dev_desc->block_write(dev_desc, offset, size, data);
if (!ret)
return -EIO;
puts("Flashing Raw Image\n");
- blks = dev_desc->block_write(dev_desc->dev, info->start, blkcnt,
- buffer);
+ blks = dev_desc->block_write(dev_desc, info->start, blkcnt, buffer);
if (blks != blkcnt) {
error("failed writing to device %d\n", dev_desc->dev);
fastboot_fail(response_str, "failed writing to device");
printf("Erasing blocks " LBAFU " to " LBAFU " due to alignment\n",
blks_start, blks_start + blks_size);
- blks = dev_desc->block_erase(dev_desc->dev, blks_start, blks_size);
+ blks = dev_desc->block_erase(dev_desc, blks_start, blks_size);
if (blks != blks_size) {
error("failed erasing from device %d", dev_desc->dev);
fastboot_fail(response_str, "failed erasing from device");
void fdt_fixup_ethernet(void *fdt)
{
int node, i, j;
- char enet[16], *tmp, *end;
+ char *tmp, *end;
char mac[16];
const char *path;
unsigned char mac_addr[6];
+ int offset;
node = fdt_path_offset(fdt, "/aliases");
if (node < 0)
return;
- if (!getenv("ethaddr")) {
- if (getenv("usbethaddr")) {
- strcpy(mac, "usbethaddr");
- } else {
- debug("No ethernet MAC Address defined\n");
- return;
- }
- } else {
- strcpy(mac, "ethaddr");
- }
-
- i = 0;
- while ((tmp = getenv(mac)) != NULL) {
- sprintf(enet, "ethernet%d", i);
- path = fdt_getprop(fdt, node, enet, NULL);
- if (!path) {
- debug("No alias for %s\n", enet);
- sprintf(mac, "eth%daddr", ++i);
- continue;
- }
+ for (offset = fdt_first_property_offset(fdt, node);
+ offset > 0;
+ offset = fdt_next_property_offset(fdt, offset)) {
+ const char *name;
+ int len = strlen("ethernet");
+
+ path = fdt_getprop_by_offset(fdt, offset, &name, NULL);
+ if (!strncmp(name, "ethernet", len)) {
+ i = trailing_strtol(name);
+ if (i != -1) {
+ if (i == 0)
+ strcpy(mac, "ethaddr");
+ else
+ sprintf(mac, "eth%daddr", i);
+ } else {
+ continue;
+ }
+ tmp = getenv(mac);
+ if (!tmp)
+ continue;
+
+ for (j = 0; j < 6; j++) {
+ mac_addr[j] = tmp ?
+ simple_strtoul(tmp, &end, 16) : 0;
+ if (tmp)
+ tmp = (*end) ? end + 1 : end;
+ }
- for (j = 0; j < 6; j++) {
- mac_addr[j] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
- if (tmp)
- tmp = (*end) ? end+1 : end;
+ do_fixup_by_path(fdt, path, "mac-address",
+ &mac_addr, 6, 0);
+ do_fixup_by_path(fdt, path, "local-mac-address",
+ &mac_addr, 6, 1);
}
-
- do_fixup_by_path(fdt, path, "mac-address", &mac_addr, 6, 0);
- do_fixup_by_path(fdt, path, "local-mac-address",
- &mac_addr, 6, 1);
-
- sprintf(mac, "eth%daddr", ++i);
}
}
return 0;
}
+int hash_block(const char *algo_name, const void *data, unsigned int len,
+ uint8_t *output, int *output_size)
+{
+ struct hash_algo *algo;
+ int ret;
+
+ ret = hash_lookup_algo(algo_name, &algo);
+ if (ret)
+ return ret;
+
+ if (output_size && *output_size < algo->digest_size) {
+ debug("Output buffer size %d too small (need %d bytes)",
+ *output_size, algo->digest_size);
+ return -ENOSPC;
+ }
+ if (output_size)
+ *output_size = algo->digest_size;
+ algo->hash_func_ws(data, len, output, algo->chunk_size);
+
+ return 0;
+}
+
+#if defined(CONFIG_CMD_HASH) || defined(CONFIG_CMD_SHA1SUM) || defined(CONFIG_CMD_CRC32)
/**
* store_result: Store the resulting sum to an address or variable
*
return 0;
}
-void hash_show(struct hash_algo *algo, ulong addr, ulong len, uint8_t *output)
+static void hash_show(struct hash_algo *algo, ulong addr, ulong len, uint8_t *output)
{
int i;
printf("%02x", output[i]);
}
-int hash_block(const char *algo_name, const void *data, unsigned int len,
- uint8_t *output, int *output_size)
-{
- struct hash_algo *algo;
- int ret;
-
- ret = hash_lookup_algo(algo_name, &algo);
- if (ret)
- return ret;
-
- if (output_size && *output_size < algo->digest_size) {
- debug("Output buffer size %d too small (need %d bytes)",
- *output_size, algo->digest_size);
- return -ENOSPC;
- }
- if (output_size)
- *output_size = algo->digest_size;
- algo->hash_func_ws(data, len, output, algo->chunk_size);
-
- return 0;
-}
-
int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
return 0;
}
#endif
+#endif
#define _USE_MEMCPY
#endif
-/* Unfortunately x86 can't compile this code as gd cannot be assigned */
-#ifndef CONFIG_X86
+/* Unfortunately x86 or ARM can't compile this code as gd cannot be assigned */
+#if !defined(CONFIG_X86) && !defined(CONFIG_ARM)
__weak void arch_setup_gd(struct global_data *gd_ptr)
{
gd = gd_ptr;
}
-#endif /* !CONFIG_X86 */
+#endif /* !CONFIG_X86 && !CONFIG_ARM */
-ulong board_init_f_mem(ulong top)
+/*
+ * Allocate reserved space for use as 'globals' from 'top' address and
+ * return 'bottom' address of allocated space
+ *
+ * Notes:
+ *
+ * Actual reservation cannot be done from within this function as
+ * it requires altering the C stack pointer, so this will be done by
+ * the caller upon return from this function.
+ *
+ * IMPORTANT:
+ *
+ * Alignment constraints may differ for each 'chunk' allocated. For now:
+ *
+ * - GD is aligned down on a 16-byte boundary
+ *
+ * - the early malloc arena is not aligned, therefore it follows the stack
+ * alignment constraint of the architecture for which we are bulding.
+ *
+ * - GD is allocated last, so that the return value of this functions is
+ * both the bottom of the reserved area and the address of GD, should
+ * the calling context need it.
+ */
+
+ulong board_init_f_alloc_reserve(ulong top)
+{
+ /* Reserve early malloc arena */
+#if defined(CONFIG_SYS_MALLOC_F)
+ top -= CONFIG_SYS_MALLOC_F_LEN;
+#endif
+ /* LAST : reserve GD (rounded up to a multiple of 16 bytes) */
+ top = rounddown(top-sizeof(struct global_data), 16);
+
+ return top;
+}
+
+/*
+ * Initialize reserved space (which has been safely allocated on the C
+ * stack from the C runtime environment handling code).
+ *
+ * Notes:
+ *
+ * Actual reservation was done by the caller; the locations from base
+ * to base+size-1 (where 'size' is the value returned by the allocation
+ * function above) can be accessed freely without risk of corrupting the
+ * C runtime environment.
+ *
+ * IMPORTANT:
+ *
+ * Upon return from the allocation function above, on some architectures
+ * the caller will set gd to the lowest reserved location. Therefore, in
+ * this initialization function, the global data MUST be placed at base.
+ *
+ * ALSO IMPORTANT:
+ *
+ * On some architectures, gd will already be good when entering this
+ * function. On others, it will only be good once arch_setup_gd() returns.
+ * Therefore, global data accesses must be done:
+ *
+ * - through gd_ptr if before the call to arch_setup_gd();
+ *
+ * - through gd once arch_setup_gd() has been called.
+ *
+ * Do not use 'gd->' until arch_setup_gd() has been called!
+ *
+ * IMPORTANT TOO:
+ *
+ * Initialization for each "chunk" (GD, early malloc arena...) ends with
+ * an incrementation line of the form 'base += <some size>'. The last of
+ * these incrementations seems useless, as base will not be used any
+ * more after this incrementation; but if/when a new "chunk" is appended,
+ * this increment will be essential as it will give base right value for
+ * this new chunk (which will have to end with its own incrementation
+ * statement). Besides, the compiler's optimizer will silently detect
+ * and remove the last base incrementation, therefore leaving that last
+ * (seemingly useless) incrementation causes no code increase.
+ */
+
+void board_init_f_init_reserve(ulong base)
{
struct global_data *gd_ptr;
#ifndef _USE_MEMCPY
int *ptr;
#endif
- /* Leave space for the stack we are running with now */
- top -= 0x40;
+ /*
+ * clear GD entirely and set it up.
+ * Use gd_ptr, as gd may not be properly set yet.
+ */
- top -= sizeof(struct global_data);
- top = ALIGN(top, 16);
- gd_ptr = (struct global_data *)top;
+ gd_ptr = (struct global_data *)base;
+ /* zero the area */
#ifdef _USE_MEMCPY
memset(gd_ptr, '\0', sizeof(*gd));
#else
for (ptr = (int *)gd_ptr; ptr < (int *)(gd_ptr + 1); )
*ptr++ = 0;
#endif
+ /* set GD unless architecture did it already */
+#if !defined(CONFIG_X86) && !defined(CONFIG_ARM)
arch_setup_gd(gd_ptr);
+#endif
+ /* next alloc will be higher by one GD plus 16-byte alignment */
+ base += roundup(sizeof(struct global_data), 16);
+
+ /*
+ * record early malloc arena start.
+ * Use gd as it is now properly set for all architectures.
+ */
#if defined(CONFIG_SYS_MALLOC_F)
- top -= CONFIG_SYS_MALLOC_F_LEN;
- gd->malloc_base = top;
+ /* go down one 'early malloc arena' */
+ gd->malloc_base = base;
+ /* next alloc will be higher by one 'early malloc arena' size */
+ base += CONFIG_SYS_MALLOC_F_LEN;
#endif
-
- return top;
}
* more stack space for things like the MMC sub-system.
*
* This function calculates the stack position, copies the global_data into
- * place and returns the new stack position. The caller is responsible for
- * setting up the sp register.
+ * place, sets the new gd (except for ARM, for which setting GD within a C
+ * function may not always work) and returns the new stack position. The
+ * caller is responsible for setting up the sp register and, in the case
+ * of ARM, setting up gd.
+ *
+ * All of this is done using the same layout and alignments as done in
+ * board_init_f_init_reserve() / board_init_f_alloc_reserve().
*
* @return new stack location, or 0 to use the same stack
*/
{
#ifdef CONFIG_SPL_STACK_R
gd_t *new_gd;
- ulong ptr;
-
- /* Get stack position: use 8-byte alignment for ABI compliance */
- ptr = CONFIG_SPL_STACK_R_ADDR - sizeof(gd_t);
- ptr &= ~7;
- new_gd = (gd_t *)ptr;
- memcpy(new_gd, (void *)gd, sizeof(gd_t));
- gd = new_gd;
+ ulong ptr = CONFIG_SPL_STACK_R_ADDR;
#ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE
if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) {
gd->malloc_ptr = 0;
}
#endif
-
+ /* Get stack position: use 8-byte alignment for ABI compliance */
+ ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16);
+ new_gd = (gd_t *)ptr;
+ memcpy(new_gd, (void *)gd, sizeof(gd_t));
+#if !defined(CONFIG_ARM)
+ gd = new_gd;
+#endif
return ptr;
#else
return 0;
unsigned long count;
u32 image_size_sectors;
struct image_header *header;
- int dev_num = mmc->block_dev.dev;
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct image_header));
/* read image header to find the image size & load address */
- count = mmc->block_dev.block_read(dev_num, sector, 1, header);
+ count = mmc->block_dev.block_read(&mmc->block_dev, sector, 1, header);
debug("read sector %lx, count=%lu\n", sector, count);
if (count == 0)
goto end;
mmc->read_bl_len;
/* Read the header too to avoid extra memcpy */
- count = mmc->block_dev.block_read(dev_num, sector, image_size_sectors,
+ count = mmc->block_dev.block_read(&mmc->block_dev, sector,
+ image_size_sectors,
(void *)(ulong)spl_image.load_addr);
debug("read %x sectors to %x\n", image_size_sectors,
spl_image.load_addr);
{
unsigned long count;
- count = mmc->block_dev.block_read(
- mmc->block_dev.dev,
+ count = mmc->block_dev.block_read(&mmc->block_dev,
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS,
(void *) CONFIG_SYS_SPL_ARGS_ADDR);
block_dev_desc_t *dev_desc);
int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
struct us_data *ss);
-unsigned long usb_stor_read(int device, lbaint_t blknr,
- lbaint_t blkcnt, void *buffer);
-unsigned long usb_stor_write(int device, lbaint_t blknr,
- lbaint_t blkcnt, const void *buffer);
+static unsigned long usb_stor_read(block_dev_desc_t *block_dev, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer);
+static unsigned long usb_stor_write(block_dev_desc_t *block_dev, lbaint_t blknr,
+ lbaint_t blkcnt, const void *buffer);
void uhci_show_temp_int_td(void);
#ifdef CONFIG_PARTITIONS
}
#endif /* CONFIG_USB_BIN_FIXUP */
-unsigned long usb_stor_read(int device, lbaint_t blknr,
- lbaint_t blkcnt, void *buffer)
+static unsigned long usb_stor_read(block_dev_desc_t *block_dev, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer)
{
+ int device = block_dev->dev;
lbaint_t start, blks;
uintptr_t buf_addr;
unsigned short smallblks;
return blkcnt;
}
-unsigned long usb_stor_write(int device, lbaint_t blknr,
- lbaint_t blkcnt, const void *buffer)
+static unsigned long usb_stor_write(block_dev_desc_t *block_dev, lbaint_t blknr,
+ lbaint_t blkcnt, const void *buffer)
{
+ int device = block_dev->dev;
lbaint_t start, blks;
uintptr_t buf_addr;
unsigned short smallblks;
CONFIG_ARM=y
CONFIG_TARGET_DEVKIT3250=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
+CONFIG_DM_SERIAL=y
CONFIG_DM_GPIO=y
CONFIG_SPL=y
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
-# CONFIG_CMD_SETEXPR is not set
CONFIG_PHYS_TO_BUS=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
-# CONFIG_CMD_SETEXPR is not set
CONFIG_PHYS_TO_BUS=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_TARGET_SOCFPGA_SR1500=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
CONFIG_SPL=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
# CONFIG_CMD_IMLS is not set
CONFIG_ARM=y
CONFIG_TARGET_WORK_92105=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_DM=y
+CONFIG_DM_SERIAL=y
CONFIG_DM_GPIO=y
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_GEM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_GEM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_GEM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_GEM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ZYNQ=y
for (i=0; i<limit; i++)
{
- ulong res = dev_desc->block_read(dev_desc->dev, i, 1,
- (ulong *)block_buffer);
+ ulong res = dev_desc->block_read(dev_desc, i, 1, (ulong *)block_buffer);
if (res == 1)
{
struct rigid_disk_block *trdb = (struct rigid_disk_block *)block_buffer;
for (i = 0; i < limit; i++)
{
- ulong res = dev_desc->block_read(dev_desc->dev, i, 1, (ulong *)block_buffer);
+ ulong res = dev_desc->block_read(dev_desc, i, 1, (ulong *)block_buffer);
if (res == 1)
{
struct bootcode_block *boot = (struct bootcode_block *)block_buffer;
while (block != 0xFFFFFFFF)
{
- ulong res = dev_desc->block_read(dev_desc->dev, block, 1,
+ ulong res = dev_desc->block_read(dev_desc, block, 1,
(ulong *)block_buffer);
if (res == 1)
{
PRINTF("Trying to load block #0x%X\n", block);
- res = dev_desc->block_read(dev_desc->dev, block, 1,
- (ulong *)block_buffer);
+ res = dev_desc->block_read(dev_desc, block, 1, (ulong *)block_buffer);
if (res == 1)
{
p = (struct partition_block *)block_buffer;
{
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
- if (dev_desc->block_read(dev_desc->dev, 0, 1, (ulong *) buffer) != 1)
+ if (dev_desc->block_read(dev_desc, 0, 1, (ulong *)buffer) != 1)
return -1;
if (test_block_type(buffer) != DOS_MBR)
dos_partition_t *pt;
int i;
- if (dev_desc->block_read(dev_desc->dev, ext_part_sector, 1, (ulong *) buffer) != 1) {
+ if (dev_desc->block_read(dev_desc, ext_part_sector, 1,
+ (ulong *)buffer) != 1) {
printf ("** Can't read partition table on %d:" LBAFU " **\n",
dev_desc->dev, ext_part_sector);
return;
int i;
int dos_type;
- if (dev_desc->block_read (dev_desc->dev, ext_part_sector, 1, (ulong *) buffer) != 1) {
+ if (dev_desc->block_read(dev_desc, ext_part_sector, 1,
+ (ulong *)buffer) != 1) {
printf ("** Can't read partition table on %d:" LBAFU " **\n",
dev_desc->dev, ext_part_sector);
return -1;
ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc->blksz);
/* Read legacy MBR from block 0 and validate it */
- if ((dev_desc->block_read(dev_desc->dev, 0, 1, (ulong *)legacymbr) != 1)
+ if ((dev_desc->block_read(dev_desc, 0, 1, (ulong *)legacymbr) != 1)
|| (is_pmbr_valid(legacymbr) != 1)) {
return -1;
}
p_mbr->partition_record[0].nr_sects = (u32) dev_desc->lba - 1;
/* Write MBR sector to the MMC device */
- if (dev_desc->block_write(dev_desc->dev, 0, 1, p_mbr) != 1) {
+ if (dev_desc->block_write(dev_desc, 0, 1, p_mbr) != 1) {
printf("** Can't write to device %d **\n",
dev_desc->dev);
return -1;
gpt_h->header_crc32 = cpu_to_le32(calc_crc32);
/* Write the First GPT to the block right after the Legacy MBR */
- if (dev_desc->block_write(dev_desc->dev, 1, 1, gpt_h) != 1)
+ if (dev_desc->block_write(dev_desc, 1, 1, gpt_h) != 1)
goto err;
- if (dev_desc->block_write(dev_desc->dev, 2, pte_blk_cnt, gpt_e)
+ if (dev_desc->block_write(dev_desc, 2, pte_blk_cnt, gpt_e)
!= pte_blk_cnt)
goto err;
prepare_backup_gpt_header(gpt_h);
- if (dev_desc->block_write(dev_desc->dev,
+ if (dev_desc->block_write(dev_desc,
(lbaint_t)le64_to_cpu(gpt_h->last_usable_lba)
+ 1,
pte_blk_cnt, gpt_e) != pte_blk_cnt)
goto err;
- if (dev_desc->block_write(dev_desc->dev,
+ if (dev_desc->block_write(dev_desc,
(lbaint_t)le64_to_cpu(gpt_h->my_lba), 1,
gpt_h) != 1)
goto err;
/* write MBR */
lba = 0; /* MBR is always at 0 */
cnt = 1; /* MBR (1 block) */
- if (dev_desc->block_write(dev_desc->dev, lba, cnt, buf) != cnt) {
+ if (dev_desc->block_write(dev_desc, lba, cnt, buf) != cnt) {
printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
__func__, "MBR", cnt, lba);
return 1;
/* write Primary GPT */
lba = GPT_PRIMARY_PARTITION_TABLE_LBA;
cnt = 1; /* GPT Header (1 block) */
- if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_h) != cnt) {
+ if (dev_desc->block_write(dev_desc, lba, cnt, gpt_h) != cnt) {
printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
__func__, "Primary GPT Header", cnt, lba);
return 1;
lba = le64_to_cpu(gpt_h->partition_entry_lba);
cnt = gpt_e_blk_cnt;
- if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_e) != cnt) {
+ if (dev_desc->block_write(dev_desc, lba, cnt, gpt_e) != cnt) {
printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
__func__, "Primary GPT Entries", cnt, lba);
return 1;
/* write Backup GPT */
lba = le64_to_cpu(gpt_h->partition_entry_lba);
cnt = gpt_e_blk_cnt;
- if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_e) != cnt) {
+ if (dev_desc->block_write(dev_desc, lba, cnt, gpt_e) != cnt) {
printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
__func__, "Backup GPT Entries", cnt, lba);
return 1;
lba = le64_to_cpu(gpt_h->my_lba);
cnt = 1; /* GPT Header (1 block) */
- if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_h) != cnt) {
+ if (dev_desc->block_write(dev_desc, lba, cnt, gpt_h) != cnt) {
printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
__func__, "Backup GPT Header", cnt, lba);
return 1;
}
/* Read GPT Header from device */
- if (dev_desc->block_read(dev_desc->dev, (lbaint_t)lba, 1, pgpt_head)
- != 1) {
+ if (dev_desc->block_read(dev_desc, (lbaint_t)lba, 1, pgpt_head) != 1) {
printf("*** ERROR: Can't read GPT header ***\n");
return 0;
}
gpt_header * pgpt_head)
{
size_t count = 0, blk_cnt;
+ lbaint_t blk;
gpt_entry *pte = NULL;
if (!dev_desc || !pgpt_head) {
}
/* Read GPT Entries from device */
+ blk = le64_to_cpu(pgpt_head->partition_entry_lba);
blk_cnt = BLOCK_CNT(count, dev_desc);
- if (dev_desc->block_read (dev_desc->dev,
- (lbaint_t)le64_to_cpu(pgpt_head->partition_entry_lba),
- (lbaint_t) (blk_cnt), pte)
- != blk_cnt) {
-
+ if (dev_desc->block_read(dev_desc, blk, (lbaint_t)blk_cnt, pte)
+ != blk_cnt) {
printf("*** ERROR: Can't read GPT Entries ***\n");
free(pte);
return NULL;
/* the first sector (sector 0x10) must be a primary volume desc */
blkaddr=PVD_OFFSET;
- if (dev_desc->block_read (dev_desc->dev, PVD_OFFSET, 1, (ulong *) tmpbuf) != 1)
- return (-1);
+ if (dev_desc->block_read(dev_desc, PVD_OFFSET, 1, (ulong *)tmpbuf) != 1)
+ return -1;
if(ppr->desctype!=0x01) {
if(verb)
printf ("** First descriptor is NOT a primary desc on %d:%d **\n",
PRINTF(" Lastsect:%08lx\n",lastsect);
for(i=blkaddr;i<lastsect;i++) {
PRINTF("Reading block %d\n", i);
- if (dev_desc->block_read (dev_desc->dev, i, 1, (ulong *) tmpbuf) != 1)
- return (-1);
+ if (dev_desc->block_read(dev_desc, i, 1, (ulong *)tmpbuf) != 1)
+ return -1;
if(ppr->desctype==0x00)
break; /* boot entry found */
if(ppr->desctype==0xff) {
}
bootaddr=le32_to_int(pbr->pointer);
PRINTF(" Boot Entry at: %08lX\n",bootaddr);
- if (dev_desc->block_read (dev_desc->dev, bootaddr, 1, (ulong *) tmpbuf) != 1) {
+ if (dev_desc->block_read(dev_desc, bootaddr, 1, (ulong *)tmpbuf) != 1) {
if(verb)
printf ("** Can't read Boot Entry at %lX on %d:%d **\n",
bootaddr,dev_desc->dev, part_num);
n = 1; /* assuming at least one partition */
for (i=1; i<=n; ++i) {
- if ((dev_desc->block_read(dev_desc->dev, i, 1, (ulong *)mpart) != 1) ||
+ if ((dev_desc->block_read(dev_desc, i, 1,
+ (ulong *)mpart) != 1) ||
(mpart->signature != MAC_PARTITION_MAGIC) ) {
return (-1);
}
char c;
printf ("%4ld: ", i);
- if (dev_desc->block_read (dev_desc->dev, i, 1, (ulong *)mpart) != 1) {
+ if (dev_desc->block_read(dev_desc, i, 1, (ulong *)mpart) != 1) {
printf ("** Can't read Partition Map on %d:%ld **\n",
dev_desc->dev, i);
return;
*/
static int part_mac_read_ddb (block_dev_desc_t *dev_desc, mac_driver_desc_t *ddb_p)
{
- if (dev_desc->block_read(dev_desc->dev, 0, 1, (ulong *)ddb_p) != 1) {
+ if (dev_desc->block_read(dev_desc, 0, 1, (ulong *)ddb_p) != 1) {
printf ("** Can't read Driver Desriptor Block **\n");
return (-1);
}
* partition 1 first since this is the only way to
* know how many partitions we have.
*/
- if (dev_desc->block_read (dev_desc->dev, n, 1, (ulong *)pdb_p) != 1) {
+ if (dev_desc->block_read(dev_desc, n, 1, (ulong *)pdb_p) != 1) {
printf ("** Can't read Partition Map on %d:%d **\n",
dev_desc->dev, n);
return (-1);
return NULL;
}
-static unsigned long host_block_read(int dev, unsigned long start,
- lbaint_t blkcnt, void *buffer)
+static unsigned long host_block_read(block_dev_desc_t *block_dev,
+ unsigned long start, lbaint_t blkcnt,
+ void *buffer)
{
+ int dev = block_dev->dev;
struct host_block_dev *host_dev = find_host_device(dev);
if (!host_dev)
return -1;
}
-static unsigned long host_block_write(int dev, unsigned long start,
- lbaint_t blkcnt, const void *buffer)
+static unsigned long host_block_write(block_dev_desc_t *block_dev,
+ unsigned long start, lbaint_t blkcnt,
+ const void *buffer)
{
+ int dev = block_dev->dev;
struct host_block_dev *host_dev = find_host_device(dev);
if (os_lseek(host_dev->fd,
start * host_dev->blk_dev.blksz,
return in16(base + off);
}
-static unsigned long systemace_read(int dev, unsigned long start,
- lbaint_t blkcnt, void *buffer);
+static unsigned long systemace_read(block_dev_desc_t *block_dev,
+ unsigned long start, lbaint_t blkcnt,
+ void *buffer);
static block_dev_desc_t systemace_dev = { 0 };
* the dev_desc) to read blocks of data. The return value is the
* number of blocks read. A zero return indicates an error.
*/
-static unsigned long systemace_read(int dev, unsigned long start,
- lbaint_t blkcnt, void *buffer)
+static unsigned long systemace_read(block_dev_desc_t *block_dev,
+ unsigned long start, lbaint_t blkcnt,
+ void *buffer)
{
int retry;
unsigned blk_countdown;
bool "Support numbered aliases in device tree"
depends on DM
default y
+ help
+ Most boards will have a '/aliases' node containing the path to
+ numbered devices (e.g. serial0 = &serial0). This feature can be
+ disabled if it is not required.
+
+config SPL_DM_SEQ_ALIAS
+ bool "Support numbered aliases in device tree in SPL"
+ depends on DM
+ default n
help
Most boards will have a '/aliases' node containing the path to
numbered devices (e.g. serial0 = &serial0). This feature can be
dev->seq = -1;
dev->req_seq = -1;
- if (CONFIG_IS_ENABLED(OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) {
+ if (CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_SEQ_ALIAS)) {
/*
* Some devices, such as a SPI bus, I2C bus and serial ports
* are numbered using aliases.
static long dfu_file_buf_len;
static long dfu_file_buf_filled;
-static int mmc_access_part(struct dfu_entity *dfu, struct mmc *mmc, int part)
-{
- int ret;
-
- if (part == mmc->part_num)
- return 0;
-
- ret = mmc_switch_part(dfu->data.mmc.dev_num, part);
- if (ret) {
- error("Cannot switch to partition %d\n", part);
- return ret;
- }
- mmc->part_num = part;
-
- return 0;
-}
-
static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
u64 offset, void *buf, long *len)
{
}
if (dfu->data.mmc.hw_partition >= 0) {
- part_num_bkp = mmc->part_num;
- ret = mmc_access_part(dfu, mmc, dfu->data.mmc.hw_partition);
+ part_num_bkp = mmc->block_dev.hwpart;
+ ret = mmc_select_hwpart(dfu->data.mmc.dev_num,
+ dfu->data.mmc.hw_partition);
if (ret)
return ret;
}
dfu->data.mmc.dev_num, blk_start, blk_count, buf);
switch (op) {
case DFU_OP_READ:
- n = mmc->block_dev.block_read(dfu->data.mmc.dev_num, blk_start,
+ n = mmc->block_dev.block_read(&mmc->block_dev, blk_start,
blk_count, buf);
break;
case DFU_OP_WRITE:
- n = mmc->block_dev.block_write(dfu->data.mmc.dev_num, blk_start,
+ n = mmc->block_dev.block_write(&mmc->block_dev, blk_start,
blk_count, buf);
break;
default:
if (n != blk_count) {
error("MMC operation failed");
if (dfu->data.mmc.hw_partition >= 0)
- mmc_access_part(dfu, mmc, part_num_bkp);
+ mmc_select_hwpart(dfu->data.mmc.dev_num, part_num_bkp);
return -EIO;
}
if (dfu->data.mmc.hw_partition >= 0) {
- ret = mmc_access_part(dfu, mmc, part_num_bkp);
+ ret = mmc_select_hwpart(dfu->data.mmc.dev_num, part_num_bkp);
if (ret)
return ret;
}
blk_start = ALIGN(offs, mmc->read_bl_len) / mmc->read_bl_len;
blk_cnt = ALIGN(size, mmc->read_bl_len) / mmc->read_bl_len;
- err = mmc->block_dev.block_read(0, blk_start, blk_cnt, vdst);
+ err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
+ vdst);
if (err != blk_cnt) {
puts("spl: mmc read failed!!\n");
hang();
/*
* Read source addr from sd card
*/
- err = mmc->block_dev.block_read(0, CONFIG_CFG_DATA_SECTOR, 1, tmp_buf);
+ err = mmc->block_dev.block_read(&mmc->block_dev,
+ CONFIG_CFG_DATA_SECTOR, 1, tmp_buf);
if (err != 1) {
puts("spl: mmc read failed!!\n");
free(tmp_buf);
#endif
blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
- err = mmc->block_dev.block_read(0, blk_start, blk_cnt,
+ err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
if (err != blk_cnt) {
puts("spl: mmc read failed!!\n");
return blkcnt;
}
-static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
+static ulong mmc_bread(block_dev_desc_t *block_dev, lbaint_t start,
+ lbaint_t blkcnt, void *dst)
{
+ int dev_num = block_dev->dev;
+ int err;
lbaint_t cur, blocks_todo = blkcnt;
if (blkcnt == 0)
if (!mmc)
return 0;
+ err = mmc_select_hwpart(dev_num, block_dev->hwpart);
+ if (err < 0)
+ return 0;
+
if ((start + blkcnt) > mmc->block_dev.lba) {
#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
if (!mmc)
return -ENODEV;
- if (mmc->part_num == hwpart)
+ if (mmc->block_dev.hwpart == hwpart)
return 0;
if (mmc->part_config == MMCPART_NOAVAILABLE) {
if (ret)
return ret;
- mmc->part_num = hwpart;
-
return 0;
}
* Set the capacity if the switch succeeded or was intended
* to return to representing the raw device.
*/
- if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
+ if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
ret = mmc_set_capacity(mmc, part_num);
+ mmc->block_dev.hwpart = part_num;
+ }
return ret;
}
mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
}
- err = mmc_set_capacity(mmc, mmc->part_num);
+ err = mmc_set_capacity(mmc, mmc->block_dev.hwpart);
if (err)
return err;
/* fill in device description */
mmc->block_dev.lun = 0;
+ mmc->block_dev.hwpart = 0;
mmc->block_dev.type = 0;
mmc->block_dev.blksz = mmc->read_bl_len;
mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
return err;
/* The internal partition reset to user partition(0) at every CMD0*/
- mmc->part_num = 0;
+ mmc->block_dev.hwpart = 0;
/* Test for SD version 2 */
err = mmc_send_if_cond(mmc);
#ifndef CONFIG_SPL_BUILD
-extern unsigned long mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt);
+unsigned long mmc_berase(block_dev_desc_t *block_dev, lbaint_t start,
+ lbaint_t blkcnt);
-extern ulong mmc_bwrite(int dev_num, lbaint_t start, lbaint_t blkcnt,
- const void *src);
+unsigned long mmc_bwrite(block_dev_desc_t *block_dev, lbaint_t start,
+ lbaint_t blkcnt, const void *src);
#else /* CONFIG_SPL_BUILD */
/* SPL will never write or erase, declare dummies to reduce code size. */
-static inline unsigned long mmc_berase(int dev_num, lbaint_t start,
- lbaint_t blkcnt)
+static inline unsigned long mmc_berase(block_dev_desc_t *block_dev,
+ lbaint_t start, lbaint_t blkcnt)
{
return 0;
}
-static inline ulong mmc_bwrite(int dev_num, lbaint_t start, lbaint_t blkcnt,
- const void *src)
+static inline ulong mmc_bwrite(block_dev_desc_t *block_dev, lbaint_t start,
+ lbaint_t blkcnt, const void *src)
{
return 0;
}
return err;
}
-unsigned long mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt)
+unsigned long mmc_berase(block_dev_desc_t *block_dev, lbaint_t start,
+ lbaint_t blkcnt)
{
+ int dev_num = block_dev->dev;
int err = 0;
u32 start_rem, blkcnt_rem;
struct mmc *mmc = find_mmc_device(dev_num);
if (!mmc)
return -1;
+ err = mmc_select_hwpart(dev_num, block_dev->hwpart);
+ if (err < 0)
+ return -1;
+
/*
* We want to see if the requested start or total block count are
* unaligned. We discard the whole numbers and only care about the
return blkcnt;
}
-ulong mmc_bwrite(int dev_num, lbaint_t start, lbaint_t blkcnt, const void *src)
+ulong mmc_bwrite(block_dev_desc_t *block_dev, lbaint_t start, lbaint_t blkcnt,
+ const void *src)
{
+ int dev_num = block_dev->dev;
lbaint_t cur, blocks_todo = blkcnt;
+ int err;
struct mmc *mmc = find_mmc_device(dev_num);
if (!mmc)
return 0;
+ err = mmc_select_hwpart(dev_num, block_dev->hwpart);
+ if (err < 0)
+ return 0;
+
if (mmc_set_blocklen(mmc, mmc->write_bl_len))
return 0;
panic("Failed to allocate memory\n");
if (mmc_getcd(mmc) && mmc_init(mmc) == 0 &&
- mmc->block_dev.block_read(mmc->block_dev.dev, 16, 1, buf) == 1 &&
+ mmc->block_dev.block_read(&mmc->block_dev, 16, 1, buf) == 1 &&
strncmp(&buf[4], "eGON.BT0", 8) == 0)
valid_signature = 1;
eeprom->use_eerd = true;
eeprom->use_eewr = false;
break;
-
- /* ich8lan does not support currently. if needed, please
- * add corresponding code and functions.
- */
-#if 0
- case e1000_ich8lan:
- {
- int32_t i = 0;
-
- eeprom->type = e1000_eeprom_ich8;
- eeprom->use_eerd = false;
- eeprom->use_eewr = false;
- eeprom->word_size = E1000_SHADOW_RAM_WORDS;
- uint32_t flash_size = E1000_READ_ICH_FLASH_REG(hw,
- ICH_FLASH_GFPREG);
- /* Zero the shadow RAM structure. But don't load it from NVM
- * so as to save time for driver init */
- if (hw->eeprom_shadow_ram != NULL) {
- for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
- hw->eeprom_shadow_ram[i].modified = false;
- hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF;
- }
- }
-
- hw->flash_base_addr = (flash_size & ICH_GFPREG_BASE_MASK) *
- ICH_FLASH_SECTOR_SIZE;
-
- hw->flash_bank_size = ((flash_size >> 16)
- & ICH_GFPREG_BASE_MASK) + 1;
- hw->flash_bank_size -= (flash_size & ICH_GFPREG_BASE_MASK);
-
- hw->flash_bank_size *= ICH_FLASH_SECTOR_SIZE;
-
- hw->flash_bank_size /= 2 * sizeof(uint16_t);
- break;
- }
-#endif
default:
break;
}
if (eeprom->use_eerd == true)
return e1000_read_eeprom_eerd(hw, offset, words, data);
- /* ich8lan does not support currently. if needed, please
- * add corresponding code and functions.
- */
-#if 0
- /* ICH EEPROM access is done via the ICH flash controller */
- if (eeprom->type == e1000_eeprom_ich8)
- return e1000_read_eeprom_ich8(hw, offset, words, data);
-#endif
/* Set up the SPI or Microwire EEPROM for bit-bang reading. We have
* acquired the EEPROM at this point, so any returns should relase it */
if (eeprom->type == e1000_eeprom_spi) {
* occuring when accessing our register space */
E1000_WRITE_FLUSH(hw);
}
-#if 0
- /* Set the PCI priority bit correctly in the CTRL register. This
- * determines if the adapter gives priority to receives, or if it
- * gives equal priority to transmits and receives. Valid only on
- * 82542 and 82543 silicon.
- */
- if (hw->dma_fairness && hw->mac_type <= e1000_82543) {
- ctrl = E1000_READ_REG(hw, CTRL);
- E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PRIOR);
- }
-#endif
+
switch (hw->mac_type) {
case e1000_82545_rev_3:
case e1000_82546_rev_3:
break;
}
-#if 0
- /* Clear all of the statistics registers (clear on read). It is
- * important that we do this after we have tried to establish link
- * because the symbol error count will increment wildly if there
- * is no link.
- */
- e1000_clear_hw_cntrs(hw);
-
- /* ICH8 No-snoop bits are opposite polarity.
- * Set to snoop by default after reset. */
- if (hw->mac_type == e1000_ich8lan)
- e1000_set_pci_ex_no_snoop(hw, PCI_EX_82566_SNOOP_ALL);
-#endif
-
if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER ||
hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) {
ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
E1000_WRITE_REG(hw, RDH, 0);
E1000_WRITE_REG(hw, RDT, 0);
- /* put the card in its initial state */
-#if 0
- E1000_WRITE_REG(hw, CTRL, E1000_CTRL_RST);
-#endif
mdelay(10);
}
#ifndef CONFIG_E1000_NO_NVM
/* Validate the EEPROM and get chipset information */
-#if !defined(CONFIG_MVBC_1G)
if (e1000_init_eeprom_params(hw)) {
E1000_ERR(hw, "EEPROM is invalid!\n");
return -EINVAL;
if ((E1000_READ_REG(hw, I210_EECD) & E1000_EECD_FLUPD) &&
e1000_validate_eeprom_checksum(hw))
return -ENXIO;
-#endif
e1000_read_mac_addr(hw, enetaddr);
#endif
e1000_get_bus_type(hw);
e1000_media_type media_type;
e1000_fc_type fc;
e1000_bus_type bus_type;
-#if 0
- e1000_bus_speed bus_speed;
- e1000_bus_width bus_width;
- uint32_t io_base;
-#endif
uint32_t asf_firmware_present;
#ifndef CONFIG_E1000_NO_NVM
uint32_t eeprom_semaphore_present;
uint32_t original_fc;
uint32_t txcw;
uint32_t autoneg_failed;
-#if 0
- uint32_t max_frame_size;
- uint32_t min_frame_size;
- uint32_t mc_filter_type;
- uint32_t num_mc_addrs;
- uint32_t collision_delta;
- uint32_t tx_packet_delta;
- uint32_t ledctl_default;
- uint32_t ledctl_mode1;
- uint32_t ledctl_mode2;
-#endif
uint16_t autoneg_advertised;
uint16_t pci_cmd_word;
uint16_t fc_high_water;
uint16_t fc_low_water;
uint16_t fc_pause_time;
-#if 0
- uint16_t current_ifs_val;
- uint16_t ifs_min_val;
- uint16_t ifs_max_val;
- uint16_t ifs_step_size;
- uint16_t ifs_ratio;
-#endif
uint16_t device_id;
uint16_t vendor_id;
uint16_t subsystem_id;
uint8_t forced_speed_duplex;
uint8_t wait_autoneg_complete;
uint8_t dma_fairness;
-#if 0
- uint8_t perm_mac_addr[NODE_ADDRESS_SIZE];
-#endif
bool disable_polarity_correction;
bool speed_downgraded;
bool get_link_status;
bool report_tx_early;
bool phy_reset_disable;
bool initialize_hw_bits_disable;
-#if 0
- bool adaptive_ifs;
- bool ifs_params_forced;
- bool in_ifs_mode;
-#endif
e1000_smart_speed smart_speed;
e1000_dsp_config dsp_config_state;
};
* These have been tested to perform correctly, but they are not used by any
* of the EEPROM commands at this time.
*/
-#if 0
-static int e1000_spi_eeprom_disable_wr(struct e1000_hw *hw, bool intr)
+static __maybe_unused int e1000_spi_eeprom_disable_wr(struct e1000_hw *hw,
+ bool intr)
{
u8 op[] = { SPI_EEPROM_DISABLE_WR };
e1000_standby_eeprom(hw);
return e1000_spi_xfer(hw, 8*sizeof(op), op, NULL, intr);
}
-static int e1000_spi_eeprom_write_status(struct e1000_hw *hw,
- u8 status, bool intr)
+static __maybe_unused int e1000_spi_eeprom_write_status(struct e1000_hw *hw,
+ u8 status, bool intr)
{
u8 op[] = { SPI_EEPROM_WRITE_STATUS, status };
e1000_standby_eeprom(hw);
return e1000_spi_xfer(hw, 8*sizeof(op), op, NULL, intr);
}
-#endif
static int e1000_spi_eeprom_read_status(struct e1000_hw *hw, bool intr)
{
printf("\nMMC read: dev # %u, block # %u, count %u ...\n",
dev, blk, cnt);
mmc_init(mmc);
- (void)mmc->block_dev.block_read(dev, blk, cnt, addr);
+ (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
+ addr);
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512);
}
return -EFAULT;
}
+ /* write the phy and reg addressse into the MII address reg */
+ writel((phy_adr << MADR_PHY_OFFSET) | (reg_ofs << MADR_REG_OFFSET),
+ ®s->madr);
+
+ /* write data to the MII write register */
+ writel(data, ®s->mwtd);
+
/* wait till the MII is not busy */
timeout = MII_TIMEOUT;
do {
return -EFAULT;
}
- /* write the phy and reg addressse into the MII address reg */
- writel((phy_adr << MADR_PHY_OFFSET) | (reg_ofs << MADR_REG_OFFSET),
- ®s->madr);
-
- /* write data to the MII write register */
- writel(data, ®s->mwtd);
-
/*debug("%s:(adr %d, off %d) <= %04x\n", __func__, phy_adr,
reg_ofs, data);*/
printf("MMC read: dev # %u, block # %u, count %u ...\n",
dev, blk, cnt);
mmc_init(mmc);
- (void)mmc->block_dev.block_read(dev, blk, cnt, addr);
+ (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
+ addr);
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512);
}
/*
- * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com>
+ * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/uart.h>
-#include <asm/io.h>
+#include <dm.h>
#include <serial.h>
+#include <dm/platform_data/lpc32xx_hsuart.h>
+
+#include <asm/arch/uart.h>
#include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
-static struct hsuart_regs *hsuart = (struct hsuart_regs *)HS_UART_BASE;
+struct lpc32xx_hsuart_priv {
+ struct hsuart_regs *hsuart;
+};
-static void lpc32xx_serial_setbrg(void)
+static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
{
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
u32 div;
/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
- div = (get_serial_clock() / 14 + gd->baudrate / 2) / gd->baudrate - 1;
+ div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
if (div > 255)
div = 255;
writel(div, &hsuart->rate);
+
+ return 0;
}
-static int lpc32xx_serial_getc(void)
+static int lpc32xx_serial_getc(struct udevice *dev)
{
- while (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
- /* NOP */;
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
+
+ if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
+ return -EAGAIN;
return readl(&hsuart->rx) & HSUART_RX_DATA;
}
-static void lpc32xx_serial_putc(const char c)
+static int lpc32xx_serial_putc(struct udevice *dev, const char c)
{
- if (c == '\n')
- serial_putc('\r');
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
+
+ /* Wait for empty FIFO */
+ if (readl(&hsuart->level) & HSUART_LEVEL_TX)
+ return -EAGAIN;
writel(c, &hsuart->tx);
- /* Wait for character to be sent */
- while (readl(&hsuart->level) & HSUART_LEVEL_TX)
- /* NOP */;
+ return 0;
}
-static int lpc32xx_serial_tstc(void)
+static int lpc32xx_serial_pending(struct udevice *dev, bool input)
{
- if (readl(&hsuart->level) & HSUART_LEVEL_RX)
- return 1;
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
+
+ if (input) {
+ if (readl(&hsuart->level) & HSUART_LEVEL_RX)
+ return 1;
+ } else {
+ if (readl(&hsuart->level) & HSUART_LEVEL_TX)
+ return 1;
+ }
return 0;
}
-static int lpc32xx_serial_init(void)
+static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
{
- lpc32xx_serial_setbrg();
-
/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
&hsuart->ctrl);
+
return 0;
}
-static struct serial_device lpc32xx_serial_drv = {
- .name = "lpc32xx_serial",
- .start = lpc32xx_serial_init,
- .stop = NULL,
+static int lpc32xx_hsuart_probe(struct udevice *dev)
+{
+ struct lpc32xx_hsuart_platdata *platdata = dev_get_platdata(dev);
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+
+ priv->hsuart = (struct hsuart_regs *)platdata->base;
+
+ lpc32xx_serial_init(priv->hsuart);
+
+ return 0;
+}
+
+static const struct dm_serial_ops lpc32xx_hsuart_ops = {
.setbrg = lpc32xx_serial_setbrg,
- .putc = lpc32xx_serial_putc,
- .puts = default_serial_puts,
.getc = lpc32xx_serial_getc,
- .tstc = lpc32xx_serial_tstc,
+ .putc = lpc32xx_serial_putc,
+ .pending = lpc32xx_serial_pending,
};
-void lpc32xx_serial_initialize(void)
-{
- serial_register(&lpc32xx_serial_drv);
-}
-
-__weak struct serial_device *default_serial_console(void)
-{
- return &lpc32xx_serial_drv;
-}
+U_BOOT_DRIVER(lpc32xx_hsuart) = {
+ .name = "lpc32xx_hsuart",
+ .id = UCLASS_SERIAL,
+ .probe = lpc32xx_hsuart_probe,
+ .ops = &lpc32xx_hsuart_ops,
+ .priv_auto_alloc_size = sizeof(struct lpc32xx_hsuart_priv),
+ .flags = DM_FLAG_PRE_RELOC,
+};
/*-------------------------------------------------------------------------*/
-struct ums *ums;
-struct fsg_common *the_fsg_common;
+static struct ums *ums;
+static int ums_count;
+static struct fsg_common *the_fsg_common;
static int fsg_set_halt(struct fsg_dev *fsg, struct usb_ep *ep)
{
}
/* Perform the read */
- rc = ums->read_sector(ums,
+ rc = ums[common->lun].read_sector(&ums[common->lun],
file_offset / SECTOR_SIZE,
amount / SECTOR_SIZE,
(char __user *)bh->buf);
amount = bh->outreq->actual;
/* Perform the write */
- rc = ums->write_sector(ums,
+ rc = ums[common->lun].write_sector(&ums[common->lun],
file_offset / SECTOR_SIZE,
amount / SECTOR_SIZE,
(char __user *)bh->buf);
}
/* Perform the read */
- rc = ums->read_sector(ums,
+ rc = ums[common->lun].read_sector(&ums[common->lun],
file_offset / SECTOR_SIZE,
amount / SECTOR_SIZE,
(char __user *)bh->buf);
buf[4] = 31; /* Additional length */
/* No special options */
sprintf((char *) (buf + 8), "%-8s%-16s%04x", (char*) vendor_id ,
- ums->name, (u16) 0xffff);
+ ums[common->lun].name, (u16) 0xffff);
return 36;
}
int nluns, i, rc;
/* Find out how many LUNs there should be */
- nluns = 1;
+ nluns = ums_count;
if (nluns < 1 || nluns > FSG_MAX_LUNS) {
printf("invalid number of LUNs: %u\n", nluns);
return ERR_PTR(-EINVAL);
for (i = 0; i < nluns; i++) {
common->luns[i].removable = 1;
- rc = fsg_lun_open(&common->luns[i], "");
+ rc = fsg_lun_open(&common->luns[i], ums[i].num_sectors, "");
if (rc)
goto error_luns;
}
return fsg_bind_config(c->cdev, c, fsg_common);
}
-int fsg_init(struct ums *ums_dev)
+int fsg_init(struct ums *ums_devs, int count)
{
- ums = ums_dev;
+ ums = ums_devs;
+ ums_count = count;
return 0;
}
* the caller must own fsg->filesem for writing.
*/
-static int fsg_lun_open(struct fsg_lun *curlun, const char *filename)
+static int fsg_lun_open(struct fsg_lun *curlun, unsigned int num_sectors,
+ const char *filename)
{
int ro;
ro = curlun->initially_ro;
curlun->ro = ro;
- curlun->file_length = ums->num_sectors << 9;
- curlun->num_sectors = ums->num_sectors;
+ curlun->file_length = num_sectors << 9;
+ curlun->num_sectors = num_sectors;
debug("open backing file: %s\n", filename);
return 0;
if (byte_offset != 0) {
int readlen;
/* read first part which isn't aligned with start of sector */
- if (ext4fs_block_dev_desc->
- block_read(ext4fs_block_dev_desc->dev,
- part_info->start + sector, 1,
- (unsigned long *) sec_buf) != 1) {
+ if (ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc,
+ part_info->start + sector,
+ 1, (void *)sec_buf)
+ != 1) {
printf(" ** ext2fs_devread() read error **\n");
return 0;
}
ALLOC_CACHE_ALIGN_BUFFER(u8, p, ext4fs_block_dev_desc->blksz);
block_len = ext4fs_block_dev_desc->blksz;
- ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc->dev,
+ ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc,
part_info->start + sector,
- 1, (unsigned long *)p);
+ 1, (void *)p);
memcpy(buf, p, byte_len);
return 1;
}
- if (ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc->dev,
- part_info->start + sector,
- block_len >> log2blksz,
- (unsigned long *) buf) !=
- block_len >> log2blksz) {
+ if (ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc,
+ part_info->start + sector,
+ block_len >> log2blksz,
+ (void *)buf) !=
+ block_len >> log2blksz) {
printf(" ** %s read error - block\n", __func__);
return 0;
}
if (byte_len != 0) {
/* read rest of data which are not in whole sector */
- if (ext4fs_block_dev_desc->
- block_read(ext4fs_block_dev_desc->dev,
- part_info->start + sector, 1,
- (unsigned long *) sec_buf) != 1) {
+ if (ext4fs_block_dev_desc->block_read(ext4fs_block_dev_desc,
+ part_info->start + sector,
+ 1, (void *)sec_buf)
+ != 1) {
printf("* %s read error - last part\n", __func__);
return 0;
}
if (remainder) {
if (fs->dev_desc->block_read) {
- fs->dev_desc->block_read(fs->dev_desc->dev,
+ fs->dev_desc->block_read(fs->dev_desc,
startblock, 1, sec_buf);
temp_ptr = sec_buf;
memcpy((temp_ptr + remainder),
(unsigned char *)buf, size);
- fs->dev_desc->block_write(fs->dev_desc->dev,
+ fs->dev_desc->block_write(fs->dev_desc,
startblock, 1, sec_buf);
}
} else {
if (size >> log2blksz != 0) {
- fs->dev_desc->block_write(fs->dev_desc->dev,
+ fs->dev_desc->block_write(fs->dev_desc,
startblock,
size >> log2blksz,
(unsigned long *)buf);
} else {
- fs->dev_desc->block_read(fs->dev_desc->dev,
+ fs->dev_desc->block_read(fs->dev_desc,
startblock, 1, sec_buf);
temp_ptr = sec_buf;
memcpy(temp_ptr, buf, size);
- fs->dev_desc->block_write(fs->dev_desc->dev,
+ fs->dev_desc->block_write(fs->dev_desc,
startblock, 1,
(unsigned long *)sec_buf);
}
ti_gp_blockno = ext4fs_get_new_blk_no();
if (ti_gp_blockno == -1) {
printf("no block left to assign\n");
- goto fail;
+ return;
}
ti_gp_buff = zalloc(fs->blksz);
if (!ti_gp_buff)
- goto fail;
+ return;
ti_gp_buff_start_addr = ti_gp_buff;
(*no_blks_reqd)++;
ti_child_blockno = ext4fs_get_new_blk_no();
if (ti_child_blockno == -1) {
printf("no block left assign\n");
- goto fail;
+ goto fail1;
}
ti_child_buff = zalloc(fs->blksz);
if (!ti_child_buff)
- goto fail;
+ goto fail1;
ti_cbuff_start_addr = ti_child_buff;
*ti_parent_buff = ti_child_blockno;
ext4fs_get_new_blk_no();
if (actual_block_no == -1) {
printf("no block left\n");
- goto fail;
+ free(ti_cbuff_start_addr);
+ goto fail1;
}
*ti_child_buff = actual_block_no;
debug("TIAB %ld: %u\n", actual_block_no,
put_ext4(((uint64_t) ((uint64_t)ti_gp_blockno * (uint64_t)fs->blksz)),
ti_gp_buff_start_addr, fs->blksz);
file_inode->b.blocks.triple_indir_block = ti_gp_blockno;
+ free(ti_gp_buff_start_addr);
+ return;
}
+fail1:
+ free(ti_pbuff_start_addr);
fail:
free(ti_gp_buff_start_addr);
}
if (!cur_dev || !cur_dev->block_read)
return -1;
- ret = cur_dev->block_read(cur_dev->dev,
- cur_part_info.start + block, nr_blocks, buf);
+ ret = cur_dev->block_read(cur_dev, cur_part_info.start + block,
+ nr_blocks, buf);
if (nr_blocks && ret == 0)
return -1;
return -1;
}
- ret = cur_dev->block_write(cur_dev->dev,
- cur_part_info.start + block,
+ ret = cur_dev->block_write(cur_dev, cur_part_info.start + block,
nr_blocks, buf);
if (nr_blocks && ret == 0)
return -1;
if (byte_offset != 0) {
/* read first part which isn't aligned with start of sector */
- if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc->dev,
- part_info->start + sector, 1,
- (unsigned long *)sec_buf) != 1) {
+ if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc,
+ part_info->start +
+ sector,
+ 1, (void *)sec_buf)
+ != 1) {
printf (" ** reiserfs_devread() read error\n");
return 0;
}
/* read sector aligned part */
block_len = byte_len & ~(SECTOR_SIZE-1);
- if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc->dev,
- part_info->start + sector, block_len/SECTOR_SIZE,
- (unsigned long *)buf) != block_len/SECTOR_SIZE) {
+ if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc,
+ part_info->start + sector,
+ block_len / SECTOR_SIZE,
+ (void *)buf)
+ != block_len/SECTOR_SIZE) {
printf (" ** reiserfs_devread() read error - block\n");
return 0;
}
if ( byte_len != 0 ) {
/* read rest of data which are not in whole sector */
- if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc->dev,
- part_info->start + sector, 1,
- (unsigned long *)sec_buf) != 1) {
+ if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc,
+ part_info->start +
+ sector,
+ 1, (void *)sec_buf)
+ != 1) {
printf (" ** reiserfs_devread() read error - last part\n");
return 0;
}
if (byte_offset != 0) {
/* read first part which isn't aligned with start of sector */
- if (zfs_block_dev_desc->block_read(zfs_block_dev_desc->dev,
- part_info->start + sector, 1,
- (unsigned long *)sec_buf) != 1) {
+ if (zfs_block_dev_desc->block_read(zfs_block_dev_desc,
+ part_info->start + sector, 1,
+ (void *)sec_buf)
+ != 1) {
printf(" ** zfs_devread() read error **\n");
return 1;
}
u8 p[SECTOR_SIZE];
block_len = SECTOR_SIZE;
- zfs_block_dev_desc->block_read(zfs_block_dev_desc->dev,
- part_info->start + sector,
- 1, (unsigned long *)p);
+ zfs_block_dev_desc->block_read(zfs_block_dev_desc,
+ part_info->start + sector,
+ 1, (void *)p);
memcpy(buf, p, byte_len);
return 0;
}
- if (zfs_block_dev_desc->block_read(zfs_block_dev_desc->dev,
- part_info->start + sector, block_len / SECTOR_SIZE,
- (unsigned long *) buf) != block_len / SECTOR_SIZE) {
+ if (zfs_block_dev_desc->block_read(zfs_block_dev_desc,
+ part_info->start + sector,
+ block_len / SECTOR_SIZE,
+ (void *)buf)
+ != block_len / SECTOR_SIZE) {
printf(" ** zfs_devread() read error - block\n");
return 1;
}
if (byte_len != 0) {
/* read rest of data which are not in whole sector */
- if (zfs_block_dev_desc->
- block_read(zfs_block_dev_desc->dev,
- part_info->start + sector, 1,
- (unsigned long *) sec_buf) != 1) {
+ if (zfs_block_dev_desc->block_read(zfs_block_dev_desc,
+ part_info->start + sector,
+ 1, (void *)sec_buf) != 1) {
printf(" ** zfs_devread() read error - last part\n");
return 1;
}
char *const argv[]);
extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/*
* Error codes that commands return to cmd_process(). We use the standard 0
void board_init_r(gd_t *, ulong) __attribute__ ((noreturn));
/**
- * board_init_f_mem() - Allocate global data and set stack position
+ * ulong board_init_f_alloc_reserve - allocate reserved area
*
* This function is called by each architecture very early in the start-up
- * code to set up the environment for board_init_f(). It allocates space for
- * global_data (see include/asm-generic/global_data.h) and places the stack
- * below this.
+ * code to allow the C runtime to reserve space on the stack for writable
+ * 'globals' such as GD and the malloc arena.
*
- * This function requires a stack[1] Normally this is at @top. The function
- * starts allocating space from 64 bytes below @top. First it creates space
- * for global_data. Then it calls arch_setup_gd() which sets gd to point to
- * the global_data space and can reserve additional bytes of space if
- * required). Finally it allocates early malloc() memory
- * (CONFIG_SYS_MALLOC_F_LEN). The new top of the stack is just below this,
- * and it returned by this function.
+ * @top: top of the reserve area, growing down.
+ * @return: bottom of reserved area
+ */
+ulong board_init_f_alloc_reserve(ulong top);
+
+/**
+ * board_init_f_init_reserve - initialize the reserved area(s)
*
- * [1] Strictly speaking it would be possible to implement this function
- * in C on many archs such that it does not require a stack. However this
- * does not seem hugely important as only 64 byte are wasted. The 64 bytes
- * are used to handle the calling standard which generally requires pushing
- * addresses or registers onto the stack. We should be able to get away with
- * less if this becomes important.
+ * This function is called once the C runtime has allocated the reserved
+ * area on the stack. It must initialize the GD at the base of that area.
*
- * @top: Top of available memory, also normally the top of the stack
- * @return: New stack location
+ * @base: top from which reservation was done
*/
-ulong board_init_f_mem(ulong top);
+void board_init_f_init_reserve(ulong base);
/**
* arch_setup_gd() - Set up the global_data pointer
#endif
#undef CONFIG_DM_WARN
-#undef CONFIG_DM_SEQ_ALIAS
#undef CONFIG_DM_STDIO
#endif /* CONFIG_SPL_BUILD */
#include <configs/ti_am335x_common.h>
-/* Don't override the distro default bootdelay */
-#undef CONFIG_BOOTDELAY
-#include <config_distro_defaults.h>
-
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_FIT
# define CONFIG_FIT
#define CONFIG_SYS_MALLOC_LEN SZ_1M
#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_64M
-#define CONFIG_SYS_TEXT_BASE 0x83FA0000
+#define CONFIG_SYS_TEXT_BASE 0x83F00000
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M)
#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */
#define CONFIG_BAUDRATE 115200
+/*
+ * DMA
+ */
+#if !defined(CONFIG_SPL_BUILD)
+#define CONFIG_DMA_LPC32XX
+#endif
+
/*
* I2C
*/
#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_NAND
+/*
+ * USB
+ */
+#define CONFIG_USB_OHCI_LPC32XX
+#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
+
/*
* U-Boot General Configurations
*/
*/
#define CONFIG_PARTITION_UUIDS
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-
#define CONFIG_CMD_PART
-/*
- * Filesystems
- */
-
-#define CONFIG_CMD_FS_GENERIC
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_FAT
-
/*
* SPL
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr_r=0x82000000\0" \
+ "loadaddr=0x82000000\0" \
+ "fdt_addr_r=0x88000000\0" \
+ "fdtaddr=0x88000000\0" \
+ "ramdisk_addr_r=0x88080000\0" \
+ "pxefile_addr_r=0x80100000\0" \
+ "scriptaddr=0x80000000\0" \
+ "bootm_size=0x10000000\0" \
"boot_mmc_dev=0\0" \
"kernel_mmc_part=3\0" \
"recovery_mmc_part=4\0" \
+ "fdtfile=omap3-sniper.dtb\0" \
+ "bootfile=/boot/extlinux/extlinux.conf\0" \
"bootargs=console=ttyO2 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
/*
- * ATAGs / Device Tree
+ * ATAGs
*/
-#define CONFIG_OF_LIBFDT
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
*/
#define CONFIG_SYS_LOAD_ADDR 0x82000000
-#define CONFIG_BOOTDELAY 1
#define CONFIG_ANDROID_BOOT_IMAGE
*/
#include <config_defaults.h>
+#include <config_distro_defaults.h>
#endif
/* SPL QSPI boot support */
#ifdef CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_DM_SEQ_ALIAS 1
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#endif
#include <config_distro_defaults.h>
+#define CONFIG_CMD_EXT4_WRITE
#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */
/*
* Environment setup
*/
+#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
+ "bootcmd_" #devtypel #instance "=" \
+ "setenv mmcdev " #instance"; "\
+ "setenv bootpart " #instance":2 ; "\
+ "run mmcboot\0"
+
+#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
+ #devtypel #instance " "
+
+#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
+ #devtypel #instance " "
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(LEGACY_MMC, legacy_mmc, 0) \
+ func(MMC, mmc, 1) \
+ func(LEGACY_MMC, legacy_mmc, 1) \
+ func(PXE, pxe, na) \
+ func(DHCP, dhcp, na)
+
+#define CONFIG_BOOTCOMMAND \
+ "run findfdt; " \
+ "run distro_bootcmd"
+
+#include <config_distro_bootcmd.h>
+
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
DEFAULT_MMC_TI_ARGS \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine device tree to use; fi; \0" \
"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
-
-#define CONFIG_BOOTCOMMAND \
- "run findfdt; " \
- "mmc dev ${mmcdev}; if mmc rescan; then " \
- "echo SD/MMC found on device ${mmcdev};" \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loadbootenv; then " \
- "run importbootenv; " \
- "fi;" \
- "if test -n ${uenvcmd}; then " \
- "echo Running uenvcmd ...;" \
- "run uenvcmd;" \
- "fi;" \
- "fi;" \
- "if run loadimage; then " \
- "run loadfdt;" \
- "run mmcboot; " \
- "fi; " \
- "if run loaduimage; then " \
- "run uimageboot;" \
- "fi; " \
- "fi"
+ BOOTENV
/*
* Defines for SPL
--- /dev/null
+/*
+ * Copyright (c) 2015 Vladimir Zapolskiy <vz@mleia.com>
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _LPC32XX_HSUART_PLAT_H
+#define _LPC32XX_HSUART_PLAT_H
+
+/**
+ * struct lpc32xx_hsuart_platdata - NXP LPC32xx HSUART platform data
+ *
+ * @base: Base register address
+ */
+struct lpc32xx_hsuart_platdata {
+ unsigned long base;
+};
+
+#endif
int hash_block(const char *algo_name, const void *data, unsigned int len,
uint8_t *output, int *output_size);
-/**
- * hash_show() - Print out a hash algorithm and value
- *
- * You will get a message like this (without a newline at the end):
- *
- * "sha1 for 9eb3337c ... 9eb3338f ==> 7942ef1df479fd3130f716eb9613d107dab7e257"
- *
- * @algo: Algorithm used for hash
- * @addr: Address of data that was hashed
- * @len: Length of data that was hashed
- * @output: Hash value to display
- */
-void hash_show(struct hash_algo *algo, ulong addr, ulong len,
- uint8_t *output);
-
#endif /* !USE_HOSTCC */
/**
*/
void ide_init(void);
-ulong ide_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer);
-ulong ide_write(int device, lbaint_t blknr, lbaint_t blkcnt,
+typedef struct block_dev_desc block_dev_desc_t;
+ulong ide_read(block_dev_desc_t *block_dev, lbaint_t blknr, lbaint_t blkcnt,
+ void *buffer);
+ulong ide_write(block_dev_desc_t *block_dev, lbaint_t blknr, lbaint_t blkcnt,
const void *buffer);
#ifdef CONFIG_IDE_PREINIT
u8 part_attr;
u8 wr_rel_set;
char part_config;
- char part_num;
uint tran_speed;
uint read_bl_len;
uint write_bl_len;
extern struct eth_device *eth_current;
-static inline __attribute__((always_inline))
-struct eth_device *eth_get_dev(void)
+static __always_inline struct eth_device *eth_get_dev(void)
{
return eth_current;
}
/* Used only when NetConsole is enabled */
int eth_is_active(struct eth_device *dev); /* Test device for active state */
/* Set active state */
-static inline __attribute__((always_inline)) int eth_init_state_only(void)
+static __always_inline int eth_init_state_only(void)
{
eth_get_dev()->state = ETH_STATE_ACTIVE;
return 0;
}
/* Set passive state */
-static inline __attribute__((always_inline)) void eth_halt_state_only(void)
+static __always_inline void eth_halt_state_only(void)
{
eth_get_dev()->state = ETH_STATE_PASSIVE;
}
unsigned src_port, unsigned len);
#endif
-static inline __attribute__((always_inline)) int eth_is_on_demand_init(void)
+static __always_inline int eth_is_on_demand_init(void)
{
#ifdef CONFIG_NETCONSOLE
extern enum proto_t net_loop_last_protocol;
#include <ide.h>
#include <common.h>
-typedef struct block_dev_desc {
+typedef struct block_dev_desc block_dev_desc_t;
+
+struct block_dev_desc {
int if_type; /* type of the interface */
int dev; /* device number */
unsigned char part_type; /* partition type */
unsigned char target; /* target SCSI ID */
unsigned char lun; /* target LUN */
+ unsigned char hwpart; /* HW partition, e.g. for eMMC */
unsigned char type; /* device type */
unsigned char removable; /* removable device */
#ifdef CONFIG_LBA48
char vendor [40+1]; /* IDE model, SCSI Vendor */
char product[20+1]; /* IDE Serial no, SCSI product */
char revision[8+1]; /* firmware revision */
- unsigned long (*block_read)(int dev,
+ unsigned long (*block_read)(block_dev_desc_t *block_dev,
lbaint_t start,
lbaint_t blkcnt,
void *buffer);
- unsigned long (*block_write)(int dev,
+ unsigned long (*block_write)(block_dev_desc_t *block_dev,
lbaint_t start,
lbaint_t blkcnt,
const void *buffer);
- unsigned long (*block_erase)(int dev,
+ unsigned long (*block_erase)(block_dev_desc_t *block_dev,
lbaint_t start,
lbaint_t blkcnt);
void *priv; /* driver private struct pointer */
-}block_dev_desc_t;
+};
#define BLOCK_CNT(size, block_dev_desc) (PAD_COUNT(size, block_dev_desc->blksz))
#define PAD_TO_BLOCKSIZE(size, block_dev_desc) \
unsigned int start_sector;
unsigned int num_sectors;
const char *name;
- block_dev_desc_t *block_dev;
+ block_dev_desc_t block_dev;
};
-extern struct ums *ums;
-
-int fsg_init(struct ums *);
+int fsg_init(struct ums *ums_devs, int count);
void fsg_cleanup(void);
int fsg_main_thread(void *);
int fsg_add(struct usb_configuration *c);
gzwrite_progress(iteration++,
totalfilled,
szexpected);
- blocks_written = dev->block_write(dev->dev,
- outblock,
+ blocks_written = dev->block_write(dev, outblock,
writeblocks,
writebuf);
outblock += blocks_written;
/* Read a few blocks and look for the string we expect */
ut_asserteq(512, dev_desc->blksz);
memset(cmp, '\0', sizeof(cmp));
- ut_asserteq(2, dev_desc->block_read(dev_desc->dev, 0, 2, cmp));
+ ut_asserteq(2, dev_desc->block_read(dev_desc, 0, 2, cmp));
ut_assertok(strcmp(cmp, "this is a test"));
return 0;
# We save time by not deleting and recreating the file system images
function prepare_env() {
rm -f ${MD5_FILE}.* ${OUT}.*
- mkdir ${OUT_DIR}
+ mkdir -p ${OUT_DIR}
}
# 1st parameter is the name of the image file to be created
fi
if [ ! -f "$1" ]; then
fallocate -l 3G "$1" &> /dev/null
+ if [ $? -ne 0 ]; then
+ echo fallocate failed - using dd instead
+ dd if=/dev/zero of=$1 bs=1024 count=$((3 * 1024 * 1024))
+ if [ $? -ne 0 ]; then
+ echo Could not create empty disk image
+ exit $?
+ fi
+ fi
mkfs -t "$2" $MKFS_OPTION "$1" &> /dev/null
if [ $? -ne 0 -a "$2" = "fat" ]; then
# If we fail and we did fat, try vfat.
mkfs -t vfat $MKFS_OPTION "$1" &> /dev/null
fi
+ if [ $? -ne 0 ]; then
+ echo Could not create filesystem
+ exit $?
+ fi
fi
}
projects / u-boot / commitdiff