]> git.sur5r.net Git - u-boot/log
u-boot
6 years agox86: Add 64-bit memory-mapped I/O functions
Ivan Gorinov [Fri, 6 Apr 2018 21:43:04 +0000 (14:43 -0700)]
x86: Add 64-bit memory-mapped I/O functions

Add readq() and writeq() definitions for x86.

Please note: in 32-bit code readq/writeq will generate two 32-bit
memory access instructions instead of one atomic 64-bit operation.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agoMerge git://git.denx.de/u-boot-imx
Tom Rini [Sun, 15 Apr 2018 12:43:50 +0000 (08:43 -0400)]
Merge git://git.denx.de/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge git://git.denx.de/u-boot-net
Tom Rini [Sun, 15 Apr 2018 12:42:37 +0000 (08:42 -0400)]
Merge git://git.denx.de/u-boot-net

6 years agoMerge git://git.denx.de/u-boot-sh
Tom Rini [Sun, 15 Apr 2018 12:42:08 +0000 (08:42 -0400)]
Merge git://git.denx.de/u-boot-sh

6 years agomx6cuboxi: Fix some memory configuration errors
Jon Nettleton [Tue, 10 Apr 2018 20:05:35 +0000 (17:05 -0300)]
mx6cuboxi: Fix some memory configuration errors

These changes bring mainline back into line with the configurations
that were originally set in our stable BSP.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: Create distinct pre-processed mkimage config files
Trent Piepho [Sat, 7 Apr 2018 00:11:27 +0000 (17:11 -0700)]
imx: Create distinct pre-processed mkimage config files

Each imx image is created by a separate sub-make and during this process
the mkimage config file is run though cpp.

The cpp output is to the same file no matter what imx image is being
created.

This means if two imx images are generated in parallel they will attempt
to independently produce the same pre-processed mkimage config file at
the same time.

Avoid the problem by making the pre-processed config file name unique
based on the imx image it will be used in.  This way each image will
create a unique config file and they won't clobber each other when run
in parallel.

This should fixed the build bug referenced in b5b0e4e3 ("imximage:
Remove failure when no IVT offset is found").

Cc: Breno Lima <breno.lima@nxp.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agomx31ads: Delete
Tom Rini [Fri, 6 Apr 2018 20:27:55 +0000 (16:27 -0400)]
mx31ads: Delete

This platform has been marked as orphaned since September 2013, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoimx31_phycore: Delete
Tom Rini [Fri, 6 Apr 2018 20:27:54 +0000 (16:27 -0400)]
imx31_phycore: Delete

This platform has been marked as orphaned since September 2013, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agopico-imx7d: Replace fatload command
Vanessa Maegima [Fri, 6 Apr 2018 19:54:41 +0000 (16:54 -0300)]
pico-imx7d: Replace fatload command

Replace fatload with the fs generic loading interface ('load' command).

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: mx7: snvs: Add an SNVS init routine
Bryan O'Donoghue [Thu, 5 Apr 2018 18:46:06 +0000 (19:46 +0100)]
imx: mx7: snvs: Add an SNVS init routine

Working with HAB on the i.MX7 we've encountered a case where a board that
successfully authenticates u-boot when booting Linux via OPTEE subsequently
fails to properly bring up the RTC.

The RTC registers live in the low-power block of the Secure Non-Volatile
Storage (SNVS) block.

The root cause of the error has been traced to the HAB handing off the
SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the
Non-Privileged Software Access Enable bit is zero. In ordinary
circumstances this is OK since we typically do not run in TZ mode, however
when we boot via HAB and enablng TrustZone, it is required to set
HPCOMR::NPSWA_EN = 1 in order for the upstream Linux driver to have
sufficient permissions to manipulate the SNVS-LP block.

On our reference board it is the difference between Linux doing this:

root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000021 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000000 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x80002100 from SNVS_HPCOMR @ 0x00000004
snvs_rtc 30370000.snvs:snvs-rtc-lp: rtc core: registered
         30370000.snvs:snvs-rtc-lp as rtc0
snvs_rtc 30370000.snvs:snvs-rtc-lp: setting system clock to2018-04-01 00:51:04 UTC (1522543864)

and doing this:

root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000020 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000001 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x00002020 from SNVS_HPCOMR @ 0x00000004
snvs_rtc 30370000.snvs:snvs-rtc-lp: failed to enable rtc -110
snvs_rtc: probe of 30370000.snvs:snvs-rtc-lp failed with error -110
hctosys: unable to open rtc device (rtc0)

Note bit 1 of LPCR is not set in the second case and is set in the first
case and that bit 31 of HPCOMR is set in the second case but not in the
first.

Setting NPSWA_EN in HPCOMR allows us to boot through enabling TrustZone
and continue onto the kernel. The kernel then has the necessary permissions
to set LPCR::SRTC_ENV (RTC enable in the LP command register) whereas in
contrast - in the failing case the non-privileged kernel cannot do so.

This patch adds a simple init_snvs() call which sets the permission-bit
called from soc.c for the i.MX7. It may be possible, safe and desirable to
perform this on other i.MX processors but for now this is only tested on
i.MX7 as working.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
6 years agoboot: script: The boot.scr file for K+P's boards
Lukasz Majewski [Thu, 5 Apr 2018 07:04:39 +0000 (09:04 +0200)]
boot: script: The boot.scr file for K+P's boards

By using this file one can avoid cluttering <board>.h file with u-boot
HUSH commands necessary for booting target device.

With such approach the commands are stored only in one place and can be
reused if needed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agoimx: board: Add support for the K+P's kp_imx6q_tpc board
Lukasz Majewski [Thu, 5 Apr 2018 07:04:38 +0000 (09:04 +0200)]
imx: board: Add support for the K+P's kp_imx6q_tpc board

This commit provides support for Kieback & Peter GmbH IMX6Q based
TPC board.

U-boot console output:

U-Boot SPL 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
Trying to boot from MMC1

U-Boot 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)

CPU:   Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 37C
Reset cause: POR
Board: K+P KP_IMX6Q_TPC i.MX6Q
       Watchdog enabled
I2C:   ready
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Autoboot in 3 seconds

6 years agoboard: ge: bx50v3: enable backlight on demand
Ian Ray [Wed, 4 Apr 2018 08:50:17 +0000 (10:50 +0200)]
board: ge: bx50v3: enable backlight on demand

Enable display backlight only if a message needs to be displayed.
The kernel re-initializes the backlight, which results in some
unwanted artifacts.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoarm: imx: Add Winbond SPI-NOR support for Advantech DMS-BA16 board
Ken Lin [Fri, 30 Mar 2018 01:11:42 +0000 (09:11 +0800)]
arm: imx: Add Winbond SPI-NOR support for Advantech DMS-BA16 board

Windbond's been in the AVL list and need to enable the support

Signed-off-by: Ken Lin <yungching0725@gmail.com>
6 years agoimx: hab: Provide hab_auth_img_or_fail command
Bryan O'Donoghue [Mon, 26 Mar 2018 14:36:46 +0000 (15:36 +0100)]
imx: hab: Provide hab_auth_img_or_fail command

This patch adds hab_auth_img_or_fail() a command line function that
encapsulates a common usage of authenticate and failover, namely if
authenticate image fails, then drop to BootROM USB recovery mode.

For secure-boot systems, this type of locked down behavior is important to
ensure no unsigned images can be run.

It's possible to script this logic but, when done over and over again the
environment starts get very complex and repetitive, reducing that script
repetition down to a command line function makes sense.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
6 years agoimximage: Encase majority of header in __ASSEMBLY__ declaration
Bryan O'Donoghue [Mon, 26 Mar 2018 14:36:45 +0000 (15:36 +0100)]
imximage: Encase majority of header in __ASSEMBLY__ declaration

Subsequent patches will want to include imageimage.h but in doing so
include it on an assembly compile path causing a range of compile errors.
Fix the errors pre-emptively by encasing the majority of the declarations
in imximage.h inside an ifdef __ASSEMBLY__ block.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
6 years agowarp7: Set u-boot serial# based on OTP value
Bryan O'Donoghue [Mon, 26 Mar 2018 14:27:34 +0000 (15:27 +0100)]
warp7: Set u-boot serial# based on OTP value

u-boot has a standard "serial#" environment variable that is suitable
for storing the iSerial number we will supply via the USB device
descriptor. serial# is automatically picked up by the disk subsystem in
u-boot - thus providing a handy unique identifier in /dev/disk/by-id as
detailed below.

Storing the hardware serial identifier in serial# means we can change the
serial# if we want before USB enumeration - thus making iSerial automatic
via OTP but overridable if necessary.

This patch reads the defined OTP fuse and sets environment variable
"serial#" to the value read.

With this patch in place the USB mass storage device will appear in
/dev/disk/by-id with a unique name based on the OTP value. For example

/dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d3000001d4-0:0

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rui Miguel Silva <rui.silva@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: mx7: Add comment to describe OTP TESTER registers
Bryan O'Donoghue [Mon, 26 Mar 2018 14:27:33 +0000 (15:27 +0100)]
imx: mx7: Add comment to describe OTP TESTER registers

The tester registers provide a unique chip-level identifier which
get_board_serial() returns in a "struct tag_serialnr".

This patch documents the properties of the registers; in summary.

31:0 OCOTP_TESTER0 (most significant)
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

OCOTP_TESTER1 (least significant)
31:24
- The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
23:16
- The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
15:11
- The wafer number of the wafer on which the device was fabricated/SJC
  CHALLENGE/ Unique ID
10:0
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

The 64 bits of data generate a unique serial number per-chip.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: mx7: Fix CONFIG_SERIAL_TAG compilation
Bryan O'Donoghue [Mon, 26 Mar 2018 14:27:32 +0000 (15:27 +0100)]
imx: mx7: Fix CONFIG_SERIAL_TAG compilation

Currently when we define CONFIG_SERIAL_TAG we will barf with a failure to
define "struct tag_serialnr".

This structure is defined in <asm/setup.h>, this patch includes
<asm/setup.h> to fix.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoARM: mx6: ddr: Add write leveling correction code
Marek Vasut [Fri, 30 Mar 2018 01:04:43 +0000 (03:04 +0200)]
ARM: mx6: ddr: Add write leveling correction code

When the DDR calibration is enabled, a situation may happen that it
will fail on a few select boards out of a whole production lot. In
particular, after the first write leveling stage, the MPWLDECTRLx
registers will contain a value 0x1nn , for nn usually being 0x7f or
slightly lower.

What this means is that the HW write leveling detected that the DQS
rising edge on one or more bundles arrives slightly _after_ CLK and
therefore when the DDR DRAM samples CLK on the DQS rising edge, the
CLK signal is already high (cfr. AN4467 rev2 Figure 7 on page 18).

The HW write leveling then ends up adding almost an entire cycle (thus
the 0x17f) to the DQS delay, which indeed aligns it, but also triggers
subsequent calibration failure in DQS gating due to this massive offset.

There are two observations here:
- If the MPWLDECTRLx value is corrected from 0x17f to 0x0 , then the
  DQS gating passes, the entire calibration passes as well and the
  DRAM is perfectly stable even under massive load.
- When using the NXP DRAM calibrator for iMX6/7, the value 0x17f or so
  in MPWLDECTRx register is not there, but it is replaced by 0x0 as one
  would expect.

Someone from NXP finally explains why, quoting [1]:

    "
    Having said all that, the DDR Stress Test does something that we
    do not advertise to the users. The Stress Test iself looks at the
    values of the MPWLDECTRL0/1 fields before reporting results, and
    if it sees any filed with a value greater than 200/256 delay
    (reported as half-cycle = 0x1 and ABS_OFFSET > 0x48), the DDR
    Stress test will reset the Write Leveling delay for this lane
    to 0x000 and not report it in the log.

    The reason that the DDR Stress test does this is because a delay
    of more than 78% a clock cycle means that the DQS edge is arriving
    within the JEDEC tolerence of 25% of the clock edge. In most cases,
    DQS is arriving < 5% tCK of the SDCLK edge in the early case, and
    it does not make sense to delay the DQS strobe almost a full clock
    cycle and add extra latency to each Write burst just to make the
    two edges align exactly. In this case, we are guilty of making a
    decision for the customer without telling them we are doing it so
    that we don't have to provide the above explanation to every customer.
    They don't need to know it.
    "

This patch adds the correction described above, that is if the MPWLDECTRx
value is over 0x148, the value is corrected back to 0x0.

[1] https://community.nxp.com/thread/456246

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
6 years agotools/imximage: use 0x prefix in HAB Blocks line
Rasmus Villemoes [Fri, 23 Mar 2018 11:08:03 +0000 (12:08 +0100)]
tools/imximage: use 0x prefix in HAB Blocks line

The u-boot-ivt.img.log file contains 0x prefixes in the HAB Blocks line,
while the SPL.log does not. For consistency, and to make it easier to
extract and put into a .csf file for use with NXP's code signing tool,
add 0x prefixes here.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
6 years agoMakefile: always preserve output for images that can contain HAB Blocks
Rasmus Villemoes [Fri, 23 Mar 2018 11:08:02 +0000 (12:08 +0100)]
Makefile: always preserve output for images that can contain HAB Blocks

The current makefile logic disables creation of the
SPL.log/u-boot-ivt.img.log etc. files when V=1 is given on the command
line, the rationale presumably being that the user wants and gets the
information on the console.

However, from general principles, I don't think a higher V= level
should affect which build artifacts get generated (and certainly
shouldn't produce fewer). Concretely, it's also a problem that when
doing a V=1 build in a terminal, the relevant HAB blocks lines easily
drown in all the other V=1 output.

Moreover, build systems such as Yocto by default pass V=1, so in that
case the information gets hidden away in the do_compile log file, making
it nigh impossible to create a recipe for creating signed U-boot images
- I don't want to disable V=1, because having verbose output in the log
file is valuable when things go wrong, but OTOH trying to go digging in
the do_compile log file (and getting exactly the right lines) is not
pleasant to even think about.

So change the logic so that for V=0, the mkimage output is redirected
to MKIMAGEOUTPUT (which is also the current behaviour), while for any
other value of V, we _additionally_ write the information to make's
stdout, whatever that might be.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Breno Lima <breno.lima@nxp.com>
6 years agommc: tmio: Rename Matsushita to TMIO
Marek Vasut [Fri, 13 Apr 2018 21:51:33 +0000 (23:51 +0200)]
mmc: tmio: Rename Matsushita to TMIO

Synchronize the naming with Linux, call the common code TMIO.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: rmobile: Zap CONFIG_MMC_RENESAS_TUNING
Marek Vasut [Fri, 13 Apr 2018 22:01:19 +0000 (00:01 +0200)]
ARM: rmobile: Zap CONFIG_MMC_RENESAS_TUNING

Drop the CONFIG_MMC_RENESAS_TUNING symbol from Gen3 configs.
This symbol is no longer used after the Matsushita SDHI driver,
instead the renesas-sdhi driver uses CONFIG_MMC_HS200_SUPPORT
to discern whether the tuning support should be compiled in.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
--
V2: Submit this on top of configs which are actually in mainline

6 years agoARM: rmobile: Convert TPL to SPL
Marek Vasut [Fri, 13 Apr 2018 21:13:00 +0000 (23:13 +0200)]
ARM: rmobile: Convert TPL to SPL

There is currently no use for building the SPL anymore, since the
SPI loader can easily be replaced by TPL and TPL does load U-Boot
directly. Upgrade TPL to SPL and replace what used to be SPL with
it. This way we build the U-Boot sources only twice, not thrice.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Shrink the TPL
Marek Vasut [Fri, 13 Apr 2018 13:51:13 +0000 (15:51 +0200)]
ARM: rmobile: Shrink the TPL

Shrink the TPL by using tiny printf and tiny memset by default.
This removes the biggest symbol -- vsnprintf_internal -- from
the TPL and reduces the text segment by about 2 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Update H2 Stout
Marek Vasut [Thu, 12 Apr 2018 13:23:46 +0000 (15:23 +0200)]
ARM: rmobile: Update H2 Stout

The H2 Stout port was broken since some time. This patch updates
the H2 Stout port to use modern frameworks, DM, DT probing, SPL
and TPL for the preloading and puts it on par with the M2 Porter
board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Fix LBSC programming offset on M2 Porter
Marek Vasut [Thu, 12 Apr 2018 13:48:54 +0000 (15:48 +0200)]
ARM: rmobile: Fix LBSC programming offset on M2 Porter

The offset of CSWCRx starts at 0x30, fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Enable SCIFA0 early on H2 Stout
Marek Vasut [Thu, 12 Apr 2018 13:23:46 +0000 (15:23 +0200)]
ARM: rmobile: Enable SCIFA0 early on H2 Stout

The H2 Stout uses SCIFA0 for serial console, make sure it is
available very early on when probing from DT.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoserial: sh: Add SCIFA0 address entry
Marek Vasut [Thu, 12 Apr 2018 13:23:46 +0000 (15:23 +0200)]
serial: sh: Add SCIFA0 address entry

Add the SCIFA0 address entry so it can be used in TPL if needed
due to size restrictions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agonet: sh_eth: Add remaining Gen2 DT compatible
Marek Vasut [Thu, 12 Apr 2018 13:23:46 +0000 (15:23 +0200)]
net: sh_eth: Add remaining Gen2 DT compatible

Add compatible strings for R8A7790, R8A7793 and R8A7794, since the
contemporary DTs use those don't have a generic match value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
6 years agoclk: renesas: Minor clean up of the R8A7790 clock driver
Marek Vasut [Thu, 12 Apr 2018 13:23:46 +0000 (15:23 +0200)]
clk: renesas: Minor clean up of the R8A7790 clock driver

The initconst is not used in U-Boot, drop it. The r8a7790_crit_mod_clks
is also not used in U-Boot, so drop it too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agovexpress: fix syntax error in armv7_boot_nonsec_default()
Heinrich Schuchardt [Tue, 10 Apr 2018 21:11:53 +0000 (23:11 +0200)]
vexpress: fix syntax error in armv7_boot_nonsec_default()

With CONFIG_ARMV7_BOOT_SEC_DEFAULT=y a syntax error occurs.
Add the missing semicolon.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoconfigs: Fixup some CPSW-related items
Tom Rini [Tue, 10 Apr 2018 15:51:53 +0000 (11:51 -0400)]
configs: Fixup some CPSW-related items

- For am335x_pdu001 we do not want the CPSW driver, drop it
- Re-sync the defconfig for am43xx_evm_rtconly as it came in after the
  patch that converted CPSW to Kconfig was posted but before it was
  applied.
- Drop empty section / comments from pengwyn
- Drop empty section / comments from baltos and drop unused
  CONFIG_SPL_NET_VCI_STRING (it does not enable CONFIG_SPL_NET_SUPPORT
  currently and SPL_NET_VCI_STRING has been migrated already).

Cc: Felix Brack <fb@ltec.ch>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Fixes: f02b8d17619f ("Migrate CONFIG_DRIVER_TI_CPSW to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
6 years agovxworks: fixed cpu enable using PSCI on armv8
Vasyl Vavrychuk [Tue, 10 Apr 2018 09:36:36 +0000 (12:36 +0300)]
vxworks: fixed cpu enable using PSCI on armv8

Without armv8_setup_psci register VBAR_EL3 is not set up property which
makes SMC calls jump to invalid location.

smp_kick_all_cpus is required to make slave cpus leave gic_wait_for_interrupt.
Without this they will never pursue booting process.

Fix was applied to the two ways of booting VxWorks: bootvx and bootm commands.

This implementation is very similar to what is done in boot_jump_linux
in arch/arm/lib/bootm.c file.

Tested on VxWorks 7 release SR0520 2017-12-08 Intel Stratix 10 SX SoC
Development Kit board.

Signed-off-by: Vasyl Vavrychuk <vasyl.vavrychuk@globallogic.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agonet: phy: Don't limit phy addresses by default
Joe Hershberger [Fri, 30 Mar 2018 16:52:16 +0000 (11:52 -0500)]
net: phy: Don't limit phy addresses by default

Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agoxilinx: Only enable dist boot pxe when DHCP is enabled
Joe Hershberger [Fri, 13 Apr 2018 20:26:40 +0000 (15:26 -0500)]
xilinx: Only enable dist boot pxe when DHCP is enabled

Otherwise, we see this:
In file included from include/configs/zynq-common.h:183:0,
                 from include/config.h:5,
                 from include/common.h:21,
                 from env/common.c:11:
include/config_distro_bootcmd.h:319:2: error: expected ?}? before ?BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE?
  BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE
  ^
include/config_distro_bootcmd.h:319:2: note: in definition of macro ?BOOTENV_DEV_NAME_PXE?

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoRevert "Kconfig: cmd: Make networking command dependent on NET"
Joe Hershberger [Fri, 13 Apr 2018 20:26:39 +0000 (15:26 -0500)]
Revert "Kconfig: cmd: Make networking command dependent on NET"

This reverts the parts of commit 3b3ea2c56ec4bc5588281fd103c744e608f8b25c
where it changed the EFI dependency on NET.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
6 years agonet: Make core net code depend on NET instead of CMD_NET
Joe Hershberger [Fri, 13 Apr 2018 20:26:38 +0000 (15:26 -0500)]
net: Make core net code depend on NET instead of CMD_NET

No commands are necessary to have a network stack.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
6 years agonet: Make the BOOTP options default
Joe Hershberger [Fri, 13 Apr 2018 20:26:37 +0000 (15:26 -0500)]
net: Make the BOOTP options default

The BOOTP options used to be and should still be default for all boards
with CMD_NET enabled. One should not be forced to use DISTRO_DEFAULTS to
get them.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
6 years agonet: Improve BOOTP PXE config option
Joe Hershberger [Fri, 13 Apr 2018 20:26:36 +0000 (15:26 -0500)]
net: Improve BOOTP PXE config option

Improve the documentation and correct the listed dependencies.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
6 years agonet: Add the BOOTP_DNS2 option to Kconfig
Joe Hershberger [Fri, 13 Apr 2018 20:26:35 +0000 (15:26 -0500)]
net: Add the BOOTP_DNS2 option to Kconfig

Commit 3b3ea2c56ec4bc5 ("Kconfig: cmd: Make networking command dependent on NET")
removed the help documentation from the README but didn't add it back to Kconfig.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
6 years agonet: Improve menu options and help for BOOTP options
Joe Hershberger [Fri, 13 Apr 2018 20:26:34 +0000 (15:26 -0500)]
net: Improve menu options and help for BOOTP options

The options were pretty unhelpful, so improve them some.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
6 years agonet: Move the DHCP command below the BOOTP command
Joe Hershberger [Fri, 13 Apr 2018 20:26:33 +0000 (15:26 -0500)]
net: Move the DHCP command below the BOOTP command

Move DHCP to directly follow BOOTP so that Kconfig can show the
dependency as a hierarchy.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
6 years agonet: Move net command options to the cmd menu
Joe Hershberger [Fri, 13 Apr 2018 20:26:32 +0000 (15:26 -0500)]
net: Move net command options to the cmd menu

Options that controlled the tftp and bootp commands depended on their
commands, but lived in the net menu.

Move them so they are in a consistent location.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
6 years agonet: Fix distro default dependencies
Joe Hershberger [Fri, 13 Apr 2018 20:26:31 +0000 (15:26 -0500)]
net: Fix distro default dependencies

PING requires CMD_NET, not NET.
Also, CMD_NET already depends on NET, so no need to directly depend
on it.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Make CMD_NET a menuconfig
Joe Hershberger [Fri, 13 Apr 2018 20:26:30 +0000 (15:26 -0500)]
net: Make CMD_NET a menuconfig

Previously, CMD_NET was an alias for 2 commands (bootp and tftpboot) and
they we not able to be disabled. Separate out those 2 commands and move
CMD_NET up to the menu level, which more accurately represents the code.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
6 years agonet: sh_eth: Add remaining Gen2 DT compatible
Marek Vasut [Thu, 12 Apr 2018 19:54:37 +0000 (21:54 +0200)]
net: sh_eth: Add remaining Gen2 DT compatible

Add compatible strings for R8A7790, R8A7793 and R8A7794, since the
contemporary DTs use those don't have a generic match value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: zynq_gem: Use max-speed property from dt
Siva Durga Prasad Paladugu [Thu, 12 Apr 2018 10:22:17 +0000 (12:22 +0200)]
net: zynq_gem: Use max-speed property from dt

Add support to use max-speed property from dt for
determining the supported speed. Use 1000Mbps as
default.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: fec: Fix issue in DM probe timeout
Ye Li [Wed, 28 Mar 2018 12:54:16 +0000 (20:54 +0800)]
net: fec: Fix issue in DM probe timeout

Since the probe function has changed to reset FEC controller prior than
setup PHY. If reset FEC controller timeout, the priv->phydev is not
initialized, so can't free it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: fex_mxc: add i.MX6UL/SX/SL compatible
Peng Fan [Wed, 28 Mar 2018 12:54:15 +0000 (20:54 +0800)]
net: fex_mxc: add i.MX6UL/SX/SL compatible

Add i.MX6UL/SX/SL compatible.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: fec: sharing MDIO for two enet controllers
Peng Fan [Wed, 28 Mar 2018 12:54:14 +0000 (20:54 +0800)]
net: fec: sharing MDIO for two enet controllers

On i.MX6SX, 6UL and 7D, there are two enet controllers each has a
MDIO port. But Some boards share one MDIO port for the two enets. So
introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate
the MDIO port for sharing.
In Kconfig, user needs enable CONFIG_FEC_MXC_SHARE_MDIO first to enter
the CONFIG_FEC_MXC_MDIO_BASE.

To i.MX28, adapt to use the new config

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
6 years agonet: fec: set dev->seq to priv->dev_id
Peng Fan [Wed, 28 Mar 2018 12:54:13 +0000 (20:54 +0800)]
net: fec: set dev->seq to priv->dev_id

To platforms has two enet interface, using dev->seq could
avoid conflict.

i.MX6UL/ULL evk board net get the wrong MAC address from fuse,
eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the
priv->dev_id to device->seq as the real net interface alias id then
.fec_get_hwaddr() read the related MAC address from fuse.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: fec_mxc: simplify fec_get_miibus
Peng Fan [Wed, 28 Mar 2018 12:54:12 +0000 (20:54 +0800)]
net: fec_mxc: simplify fec_get_miibus

No need to provide two prototype for this function.
Use ulong for the first parameter, then this function
could be shared for DM/non DM case.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: fec_mxc: Fix DM driver issue in recv
Ye Li [Wed, 28 Mar 2018 12:54:11 +0000 (20:54 +0800)]
net: fec_mxc: Fix DM driver issue in recv

When using ethernet DM driver, the recv interface has a
change with non-DM interface, that driver needs to set
the packet pointer and provide it to upper layer to process.

In fec driver, the fecmxc_recv functions does not handle the
packet pointer parameter. This may cause crash in upper layer
processing because the packet pointer is not set.

This patch allocates a buffer for the packet pointer and free it
through free_pkt interface.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: mvneta: support setting hardware address
Matt Pelland [Tue, 27 Mar 2018 17:18:25 +0000 (13:18 -0400)]
net: mvneta: support setting hardware address

mvneta already supports setting the MAC address but this was only done
internally when some other part of U-Boot tries to actually use the
interface. This commit exposes this functionality to the ethernet core
code so that the MAC addresses of all interfaces are configured
correctly even if they are not used before loading Linux.

Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agokconfig: add CONFIG_CC_COVERAGE
Christian Gmeiner [Mon, 9 Apr 2018 15:11:45 +0000 (17:11 +0200)]
kconfig: add CONFIG_CC_COVERAGE

Make it possible to use gcc code coverage analysis.

v1 -> v2:
 - Kconfig: remove not needed 'default n'
 - Makefile: use consistent spacing

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoconfigs: dra7xx_evm/dra7xx_hs_evm: Enable AHCI and PIPE3
Jean-Jacques Hiblot [Fri, 6 Apr 2018 09:13:54 +0000 (11:13 +0200)]
configs: dra7xx_evm/dra7xx_hs_evm: Enable AHCI and PIPE3

Those options are required to enable support for SATA on DRA7 platforms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agodwc_ahci: Fix breakage
Jean-Jacques Hiblot [Fri, 6 Apr 2018 09:13:53 +0000 (11:13 +0200)]
dwc_ahci: Fix breakage

The dwc_ahci has been broken for quite some time now. The breakage has been
introduced by the series "dm: scsi: Enhance SCSI support for driver model"

Use ahci_bind_scsi() and ahci_probe_scsi() to properly bind and probe the
driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
6 years agoMerge git://git.denx.de/u-boot-sh
Tom Rini [Fri, 13 Apr 2018 13:23:53 +0000 (09:23 -0400)]
Merge git://git.denx.de/u-boot-sh

6 years agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Fri, 13 Apr 2018 13:22:56 +0000 (09:22 -0400)]
Merge git://git.denx.de/u-boot-usb

6 years agoARM: rmobile: Set maximum kernel size to 64 MiB on Gen3
Marek Vasut [Tue, 10 Apr 2018 14:06:40 +0000 (16:06 +0200)]
ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3

The Gen3 kernel images are often above 8 MiB, increase the
maximum kernel size to 64 MiB to future-proof it, just like
many other ARM64 boards do.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Fix the memory map on Gen3
Marek Vasut [Thu, 15 Feb 2018 12:19:33 +0000 (13:19 +0100)]
ARM: rmobile: Fix the memory map on Gen3

Fix up the memory map on Gen3 to match datasheet properly.
This simplifies the memory map setup as well, since we do
no longer need this massive complexity.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agospi: sh_qspi: Make use of the 32byte FIFO
Marek Vasut [Tue, 10 Apr 2018 14:43:47 +0000 (16:43 +0200)]
spi: sh_qspi: Make use of the 32byte FIFO

The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing
the SPI transmission 1 byte at time, if there is a 32byte chunk of
data to be transferred, fill the FIFO completely and then transfer
the data to/from the FIFO. This increases the SPI NOR access speed
significantly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 years agospi: sh_qspi: Replace ad hoc waiting with wait_for_bit
Marek Vasut [Tue, 10 Apr 2018 14:58:46 +0000 (16:58 +0200)]
spi: sh_qspi: Replace ad hoc waiting with wait_for_bit

Replace the ad-hoc endless loops with wait_for_bit() with
reasonable timeout. Note that the loops had internal 10uS
delays, although there is no reason for those on this HW,
so they are dropped.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 years agospi: sh_qspi: Drop SPBDCR wait
Marek Vasut [Tue, 10 Apr 2018 14:54:38 +0000 (16:54 +0200)]
spi: sh_qspi: Drop SPBDCR wait

Waiting for SPBDCR == 1 is not required and is covered by the
subsequent wait for SPSR_SPRFF, so drop this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 years agospi: sh_qspi: Replace data types with short ones
Marek Vasut [Tue, 10 Apr 2018 14:47:38 +0000 (16:47 +0200)]
spi: sh_qspi: Replace data types with short ones

Just replace unsigned {char,short,long} with u{8,16,32},
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 years agomtd: spi: Add Renesas RPC SPI-flash driver
Marek Vasut [Wed, 29 Nov 2017 05:29:46 +0000 (06:29 +0100)]
mtd: spi: Add Renesas RPC SPI-flash driver

Add driver for the RPC block in SPI-flash mode. This driver allows
access to a SPI NOR flash attached to the RPC block and does not
support RPC in Hyperflash mode. Note that this block is extremely
selective when communicating with the SPI NOR.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agomtd: rpc: Add Renesas RPC Hyperflash driver
Marek Vasut [Sat, 19 Aug 2017 21:24:08 +0000 (23:24 +0200)]
mtd: rpc: Add Renesas RPC Hyperflash driver

Add driver for the RPC block in Hyperflash mode. This driver allows
access to a CFI Hyperflash attached to the RPC block and does not
support RPC in SPI mode.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agommc: renesas-sdhi: Wait after reconfiguring pins
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: renesas-sdhi: Wait after reconfiguring pins

The IP requires some time to recuperate after the IO pin
properties were changed. Add a delay to assure this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Add missing else
Marek Vasut [Mon, 9 Apr 2018 23:44:23 +0000 (01:44 +0200)]
mmc: matsushita-common: Add missing else

Fix minor rebase omission, the else was missing which triggered
two accesses to the register on 64bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Wait for command completion
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: matsushita-common: Wait for command completion

Make sure to wait for the command to complete altogether, including
the trailing 8 clock cycles. This prevents the driver for accidentally
writing the CMD register too fast before the previous command fully
completed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Correctly set mode in 16bit
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: matsushita-common: Correctly set mode in 16bit

The HOST_MODE register must be set to 0 when the IP is operated in 16bit
mode, otherwise 16bit access to the data FIFO may fail.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Special case only select registers in 16bit
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: matsushita-common: Special case only select registers in 16bit

There are only a few registerse used in the 16bit mode which are
32bit internally. Special-case only those in the IO accessors and
always write both halves. Any other register access is protected
from accidentally overwriting neighboring register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: rmobile: Enable HS200 mode on RCar Gen3
Marek Vasut [Fri, 22 Dec 2017 08:37:04 +0000 (09:37 +0100)]
ARM: rmobile: Enable HS200 mode on RCar Gen3

Enable the HS200 on RCar Gen3 platforms, since the SDHI core supports it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agommc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support
Marek Vasut [Sun, 8 Apr 2018 17:09:17 +0000 (19:09 +0200)]
mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support

Add code for PHY tuning required for SDR104/HS200 support on Renesas RCar.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Export register access functions
Marek Vasut [Sun, 8 Apr 2018 17:56:46 +0000 (19:56 +0200)]
mmc: matsushita-common: Export register access functions

Export the matsu_sd_{read,write}l() common register access
functions, so that they can be used by other drivers sharing
the common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Properly handle pin voltage configuration
Marek Vasut [Mon, 25 Sep 2017 21:06:22 +0000 (23:06 +0200)]
mmc: matsushita-common: Properly handle pin voltage configuration

Factor out the regulator handling into set_ios and add support for
selecting pin configuration based on the voltage to support UHS modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Always check controller version
Marek Vasut [Sat, 23 Sep 2017 11:01:20 +0000 (13:01 +0200)]
mmc: matsushita-common: Always check controller version

Handle the controller version even if quirks are set. The controller in
Renesas Gen3 SoCs does provide the version register, which indicates a
controller v10 and the controller does support internal DMA and /1024
divider.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Handle bus width 0
Marek Vasut [Mon, 29 Jan 2018 23:41:42 +0000 (00:41 +0100)]
mmc: matsushita-common: Handle bus width 0

Handle bus width 0 as 1-bit bus to assure valid content of
MATSU_SD_OPTION register WIDTH field.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Handle DMA completion flag differences
Marek Vasut [Tue, 2 Jan 2018 18:40:49 +0000 (19:40 +0100)]
mmc: matsushita-common: Handle DMA completion flag differences

The DMA READ completion flag position differs on Socionext and Renesas
SoCs. It is bit 20 on Socionext SoCs and using bit 17 is a hardware bug
and forbidden. It is bit 17 on Renesas SoCs and bit 20 does not work on
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Handle Renesas div-by-1
Marek Vasut [Tue, 26 Sep 2017 18:34:35 +0000 (20:34 +0200)]
mmc: matsushita-common: Handle Renesas div-by-1

On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Add Renesas RCar quirks
Marek Vasut [Sun, 8 Apr 2018 16:49:52 +0000 (18:49 +0200)]
mmc: matsushita-common: Add Renesas RCar quirks

Add a quirk to identify that the controller is Renesas RCar variant
of the Matsushita SD IP and another quirk indicating it can support
Renesas RCar HS200/HS400/SDR104 modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: matsushita-common: Use mmc_of_parse()
Marek Vasut [Sat, 23 Sep 2017 11:22:14 +0000 (13:22 +0200)]
mmc: matsushita-common: Use mmc_of_parse()

Drop the ad-hoc DT caps parsing in favor of common framework function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: renesas-sdhi: Handle 16bit IP
Marek Vasut [Sun, 8 Apr 2018 16:14:22 +0000 (18:14 +0200)]
mmc: renesas-sdhi: Handle 16bit IP

The Renesas RCar Gen2 chips have a mix of 32bit and 16bit variants
of the IP. There is no DT property which allows discerning those,
so what Linux does is it checks the size of the register area and
if it is 0x100, the IP is 16bit, otherwise the IP is 32bit. Handle
the distinction the same way.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: uniphier: Allow passing quirks to the probe function
Marek Vasut [Sun, 8 Apr 2018 15:45:23 +0000 (17:45 +0200)]
mmc: uniphier: Allow passing quirks to the probe function

Certain instances of the SD IP require more elaborate digging
in the DT to figure out which variant of the SD IP is in use.
Allow explicit passing of the quirks into the probe function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: uniphier: Add support for 16bit variant
Marek Vasut [Sun, 8 Apr 2018 15:41:14 +0000 (17:41 +0200)]
mmc: uniphier: Add support for 16bit variant

Add support for 16bit mutation of the Matsushita SD IP. Since some
registers are internally 32bit, the matsu_sd_{read,write}l() has
to special-case this 16bit variant a bit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: uniphier: Drop useless check
Marek Vasut [Sun, 8 Apr 2018 15:25:49 +0000 (17:25 +0200)]
mmc: uniphier: Drop useless check

Drop useless check in matsu_sd_{read,write}q(), this is only ever
called to read the data from FIFO and only when 64bit variant of
the block is used anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: uniphier: Factor out FIFO accessors
Marek Vasut [Sun, 8 Apr 2018 15:14:42 +0000 (17:14 +0200)]
mmc: uniphier: Factor out FIFO accessors

Add macros to generate the FIFO accessors, since the code is almost
the same with only minor differences. This is done in preparation
for adding 16bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: rmobile: Switch to CONFIG_RENESAS_SDHI
Marek Vasut [Sun, 8 Apr 2018 17:17:55 +0000 (19:17 +0200)]
ARM: rmobile: Switch to CONFIG_RENESAS_SDHI

Since the Renesas SDHI has it's own custom driver sharing the
common code with Uniphier one, adjust the Kconfig entries.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: renesas-sdhi: Add Renesas SDHI Kconfig entry
Marek Vasut [Sat, 23 Sep 2017 11:30:30 +0000 (13:30 +0200)]
mmc: renesas-sdhi: Add Renesas SDHI Kconfig entry

Add Kconfig entry for the Renesas SDHI variant of the controller
and split the Makefile entries accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agommc: uniphier: Split out SoC specific bits from the driver
Marek Vasut [Sun, 8 Apr 2018 13:22:58 +0000 (15:22 +0200)]
mmc: uniphier: Split out SoC specific bits from the driver

Factor out common code from the uniphier SD driver, change the prefix
of the functions from uniphier_sd_ to matsu_sd_ and create separate
renesas-sdhi.c driver. Thus far, all the code is still compiled when
CONFIG_UNIPHIER_MMC is selected and there is no functional change.
This patch is a preparation for further split of the SoC specific
parts of the Matsushita SD driver, used both on Uniphier and R-Car.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: rmobile: Enable HUSH on M2 Porter
Marek Vasut [Sat, 7 Apr 2018 15:15:00 +0000 (17:15 +0200)]
ARM: rmobile: Enable HUSH on M2 Porter

Enable the HUSH shell, since it is far more capable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Add JTAG recovery support for M2 Porter
Marek Vasut [Sat, 7 Apr 2018 14:16:30 +0000 (16:16 +0200)]
ARM: rmobile: Add JTAG recovery support for M2 Porter

Add JTAG recovery support into the M2 Porter TPL. This allows the
TPL to be loaded over JTAG, initialize the system, wait for the
JTAG debugger to load U-Boot image into RAM and then resume and
start U-Boot from RAM.

The procedure is as follows:
1) Load u-boot-tpl.bin to 0xe6300000
2) Write magic number 0x1337c0de to 0xe6300020
   TPL checks for this particular magic and starts JTAG recovery
   if this number is present. This is not present by default.
3) Start U-Boot TPL from 0xe6300000
4) Wait for a message from TPL on UART indicating JTAG boot:
   "JTAG boot detected!"
5) Halt the system in JTAG debugger
6) Load U-Boot image (u-boot.img) to 0x4fffffc0
7) Write magic number 0xb33fc0de to 0xe6300024
   TPL checks for this particular magic to verify that the U-Boot
   image was loaded into DRAM by the JTAG debugger.
8) Resume the system in JTAG debugger

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Add TPL support on R8A7791 M2 Porter
Marek Vasut [Tue, 3 Apr 2018 10:52:48 +0000 (12:52 +0200)]
ARM: rmobile: Add TPL support on R8A7791 M2 Porter

Add and enable TPL on M2 Porter. The TPL must fit into 16 kiB due
to the Gen2 BootROM restriction. The TPL is running from MERAM and
is capable of performing the initial initialization of PFC, Clock,
GPIO, LBSC, DBSC and QSPI NOR. DBSC is responsible for bringing up
the DDR DRAM access. The TPL is capable of loading the next stage,
U-Boot, from either SPI NOR or UART as a fallback. If either does
provide a valid U-Boot uImage, the system stops, which allows the
operator to load U-Boot ie. via JTAG and start it manually.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Do not init caches in TPL before DRAM
Marek Vasut [Wed, 4 Apr 2018 21:32:44 +0000 (23:32 +0200)]
ARM: rmobile: Do not init caches in TPL before DRAM

Skip the cache initialization, which can be done later on in U-Boot
proper, since this interferes with early DRAM initialization in TPL.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Split U-Boot and SPL sources on Porter
Marek Vasut [Wed, 4 Apr 2018 11:34:40 +0000 (13:34 +0200)]
ARM: rmobile: Split U-Boot and SPL sources on Porter

Pull the SPL code from porter.c into a separate file in
preparation for the addition of system initialization code.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoMerge git://git.denx.de/u-boot-i2c
Tom Rini [Wed, 11 Apr 2018 21:00:52 +0000 (17:00 -0400)]
Merge git://git.denx.de/u-boot-i2c

6 years agospl: ram: Add TPL Kconfig symbols
Marek Vasut [Sat, 7 Apr 2018 15:03:45 +0000 (17:03 +0200)]
spl: ram: Add TPL Kconfig symbols

Add TPL config symbols for RAM loading matching the SPL ones.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
6 years agospl: ram: Convert to CONFIG_IS_ENABLED
Marek Vasut [Sat, 7 Apr 2018 15:03:28 +0000 (17:03 +0200)]
spl: ram: Convert to CONFIG_IS_ENABLED

This patch is a preparation for adding TPL support for RAM loading.
CONFIG_IS_ENABLED allows for proper handling of the U-Boot/SPL/TPL
differences in config symbol names.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>