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+++ /dev/null
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- <dictionary>\r
- <key>?name?</key>\r
- <value></value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.append_environment</key>\r
- <value>true</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.stopOnError</key>\r
- <value>true</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.buildCommand</key>\r
- <value>make</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.contents</key>\r
- <value>org.eclipse.cdt.make.core.activeConfigSettings</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.buildLocation</key>\r
- <value>${workspace_loc:/RTOSDemo}</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>\r
- <value>false</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.enableAutoBuild</key>\r
- <value>false</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.enableFullBuild</key>\r
- <value>true</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.buildArguments</key>\r
- <value></value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.fullBuildTarget</key>\r
- <value>all</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>?children?</key>\r
- <value>?name?=outputEntries\|?children?=?name?=entry\\\\\\\\\\\\\\\|\\\\\\\|\||</value>\r
- </dictionary>\r
- <dictionary>\r
- <key>org.eclipse.cdt.make.core.autoBuildTarget</key>\r
- <value>all</value>\r
- </dictionary>\r
- </arguments>\r
- </buildCommand>\r
- <buildCommand>\r
- <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>\r
- <arguments>\r
- </arguments>\r
- </buildCommand>\r
- </buildSpec>\r
- <natures>\r
- <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>\r
- <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>\r
- <nature>org.eclipse.cdt.core.cnature</nature>\r
- </natures>\r
- <linkedResources>\r
- <link>\r
- <name>Common Demo Files</name>\r
- <type>2</type>\r
- <locationURI>FreeRTOS_ROOT/Demo/Common</locationURI>\r
- </link>\r
- <link>\r
- <name>FreeRTOS.org Source</name>\r
- <type>2</type>\r
- <locationURI>FreeRTOS_ROOT/Source</locationURI>\r
- </link>\r
- </linkedResources>\r
-</projectDescription>\r
+++ /dev/null
-#Sun Aug 19 20:36:58 BST 2007\r
-eclipse.preferences.version=1\r
-org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef FREERTOS_CONFIG_H\r
-#define FREERTOS_CONFIG_H\r
-\r
-#include <stdio.h>\r
-#include "AT91SAM7X256.h"\r
-\r
-/*-----------------------------------------------------------\r
- * Application specific definitions.\r
- *\r
- * These definitions should be adjusted for your particular hardware and\r
- * application requirements.\r
- *\r
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. \r
- *\r
- * See http://www.freertos.org/a00110.html.\r
- *----------------------------------------------------------*/\r
-\r
-#define configUSE_PREEMPTION 1\r
-#define configUSE_IDLE_HOOK 0\r
-#define configUSE_TICK_HOOK 1\r
-#define configCPU_CLOCK_HZ ( ( unsigned long ) 47923200 )\r
-#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )\r
-#define configMAX_PRIORITIES ( 4 )\r
-#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 130 )\r
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 24 * 1024 ) )\r
-#define configMAX_TASK_NAME_LEN ( 10 )\r
-#define configUSE_TRACE_FACILITY 1\r
-#define configUSE_16_BIT_TICKS 0\r
-#define configIDLE_SHOULD_YIELD 1\r
-#define configUSE_MUTEXES 1\r
-\r
-/* Co-routine definitions. */\r
-#define configUSE_CO_ROUTINES 0\r
-#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
-\r
-\r
-/* Set the following definitions to 1 to include the API function, or zero\r
-to exclude the API function. */\r
-\r
-#define INCLUDE_vTaskPrioritySet 1\r
-#define INCLUDE_uxTaskPriorityGet 1\r
-#define INCLUDE_vTaskDelete 1\r
-#define INCLUDE_vTaskCleanUpResources 0\r
-#define INCLUDE_vTaskSuspend 1\r
-#define INCLUDE_vTaskDelayUntil 1\r
-#define INCLUDE_vTaskDelay 1\r
-#define INCLUDE_xTaskGetCurrentTaskHandle 1\r
-\r
-/* This demo makes use of one or more example stats formatting functions. These\r
-format the raw data provided by the uxTaskGetSystemState() function in to human\r
-readable ASCII form. See the notes in the implementation of vTaskList() within \r
-FreeRTOS/Source/tasks.c for limitations. */\r
-#define configUSE_STATS_FORMATTING_FUNCTIONS 1\r
-\r
-\r
-/* MAC address configuration. */\r
-#define uipMAC_ADDR0 0x00\r
-#define uipMAC_ADDR1 0x12\r
-#define uipMAC_ADDR2 0x13\r
-#define uipMAC_ADDR3 0x10\r
-#define uipMAC_ADDR4 0x15\r
-#define uipMAC_ADDR5 0x11\r
-\r
-/* IP address configuration. */\r
-#define uipIP_ADDR0 172\r
-#define uipIP_ADDR1 25\r
-#define uipIP_ADDR2 218\r
-#define uipIP_ADDR3 10 \r
-\r
-#endif /* FREERTOS_CONFIG_H */\r
+++ /dev/null
-#/*\r
-# FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
-# \r
-#\r
-# ***************************************************************************\r
-# * *\r
-# * FreeRTOS tutorial books are available in pdf and paperback. *\r
-# * Complete, revised, and edited pdf reference manuals are also *\r
-# * available. *\r
-# * *\r
-# * Purchasing FreeRTOS documentation will not only help you, by *\r
-# * ensuring you get running as quickly as possible and with an *\r
-# * in-depth knowledge of how to use FreeRTOS, it will also help *\r
-# * the FreeRTOS project to continue with its mission of providing *\r
-# * professional grade, cross platform, de facto standard solutions *\r
-# * for microcontrollers - completely free of charge! *\r
-# * *\r
-# * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
-# * *\r
-# * Thank you for using FreeRTOS, and thank you for your support! *\r
-# * *\r
-# ***************************************************************************\r
-#\r
-#\r
-# This file is part of the FreeRTOS distribution.\r
-#\r
-# FreeRTOS is free software; you can redistribute it and/or modify it under\r
-# the terms of the GNU General Public License (version 2) as published by the\r
-# Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-# >>>NOTE<<< The modification to the GPL is included to allow you to\r
-# distribute a combined work that includes FreeRTOS without being obliged to\r
-# provide the source code for proprietary components outside of the FreeRTOS\r
-# kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
-# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
-# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
-# more details. You should have received a copy of the GNU General Public\r
-# License and the FreeRTOS license exception along with FreeRTOS; if not it\r
-# can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
-# by writing to Richard Barry, contact details for whom are available on the\r
-# FreeRTOS WEB site.\r
-#\r
-# 1 tab == 4 spaces!\r
-#\r
-# http://www.FreeRTOS.org - Documentation, latest information, license and\r
-# contact details.\r
-#\r
-# http://www.SafeRTOS.com - A version that is certified for use in safety\r
-# critical systems.\r
-#\r
-# http://www.OpenRTOS.com - Commercial support, development, porting,\r
-# licensing and training services.\r
-#*/\r
-\r
-\r
-RTOS_SOURCE_DIR=../../../Source\r
-DEMO_COMMON_DIR=../../Common/Minimal\r
-DEMO_INCLUDE_DIR=../../Common/include\r
-UIP_COMMON_DIR=../../Common/ethernet/uIP/uip-1.0/uip\r
-\r
-CC=arm-elf-gcc\r
-OBJCOPY=arm-elf-objcopy\r
-LDSCRIPT=atmel-rom.ld\r
-\r
-LINKER_FLAGS=-mthumb -nostartfiles -Xlinker -oRTOSDemo.elf -Xlinker -M -Xlinker -Map=rtosdemo.map\r
-\r
-DEBUG=-g\r
-OPTIM=-O3\r
-\r
-\r
-CFLAGS= $(DEBUG) \\r
- $(OPTIM) \\r
- -T$(LDSCRIPT) \\r
- -I . \\r
- -I $(RTOS_SOURCE_DIR)/include \\r
- -I $(RTOS_SOURCE_DIR)/portable/GCC/ARM7_AT91SAM7S \\r
- -I $(DEMO_INCLUDE_DIR) \\r
- -I ./webserver \\r
- -I $(UIP_COMMON_DIR) \\r
- -I ./SrcAtmel \\r
- -I ./USB \\r
- -D SAM7_GCC \\r
- -D THUMB_INTERWORK \\r
- -mcpu=arm7tdmi \\r
- -D PACK_STRUCT_END=__attribute\(\(packed\)\) \\r
- -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) \\r
- -fomit-frame-pointer \\r
- -mthumb-interwork \\r
- -fno-strict-aliasing \\r
- -fno-dwarf2-cfi-asm\r
- \r
-THUMB_SOURCE= \\r
- main.c \\r
- ./ParTest/ParTest.c \\r
- $(DEMO_COMMON_DIR)/BlockQ.c \\r
- $(DEMO_COMMON_DIR)/blocktim.c \\r
- $(DEMO_COMMON_DIR)/flash.c \\r
- $(DEMO_COMMON_DIR)/integer.c \\r
- $(DEMO_COMMON_DIR)/GenQTest.c \\r
- $(DEMO_COMMON_DIR)/QPeek.c \\r
- $(DEMO_COMMON_DIR)/dynamic.c \\r
- ./webserver/uIP_Task.c \\r
- ./webserver/httpd.c \\r
- ./webserver/httpd-cgi.c \\r
- ./webserver/httpd-fs.c \\r
- ./webserver/http-strings.c \\r
- ./webserver/SAM7_EMAC.c \\r
- $(UIP_COMMON_DIR)/uip_arp.c \\r
- $(UIP_COMMON_DIR)/psock.c \\r
- $(UIP_COMMON_DIR)/timer.c \\r
- $(UIP_COMMON_DIR)/uip.c \\r
- $(RTOS_SOURCE_DIR)/list.c \\r
- $(RTOS_SOURCE_DIR)/queue.c \\r
- $(RTOS_SOURCE_DIR)/tasks.c \\r
- $(RTOS_SOURCE_DIR)/portable/GCC/ARM7_AT91SAM7S/port.c \\r
- $(RTOS_SOURCE_DIR)/portable/MemMang/heap_2.c \\r
- ./USB/USBSample.c \\r
- syscalls.c\r
-\r
-ARM_SOURCE= \\r
- $(RTOS_SOURCE_DIR)/portable/GCC/ARM7_AT91SAM7S/portISR.c \\r
- ./webserver/EMAC_ISR.c \\r
- ./SrcAtmel/Cstartup_SAM7.c \\r
- ./USB/USB_ISR.c\r
-\r
-THUMB_OBJS = $(THUMB_SOURCE:.c=.o)\r
-ARM_OBJS = $(ARM_SOURCE:.c=.o)\r
-\r
-\r
-all: RTOSDemo.bin\r
-\r
-RTOSDemo.bin : RTOSDemo.hex\r
- $(OBJCOPY) RTOSDemo.elf -O binary RTOSDemo.bin\r
- \r
-RTOSDemo.hex : RTOSDemo.elf\r
- $(OBJCOPY) RTOSDemo.elf -O ihex RTOSDemo.hex\r
-\r
-RTOSDemo.elf : $(THUMB_OBJS) $(ARM_OBJS) boot.s Makefile\r
- $(CC) $(CFLAGS) $(ARM_OBJS) $(THUMB_OBJS) $(LIBS) boot.s $(LINKER_FLAGS) \r
-\r
-$(THUMB_OBJS) : %.o : %.c Makefile FreeRTOSConfig.h\r
- $(CC) -c $(CFLAGS) -mthumb $< -o $@\r
-\r
-$(ARM_OBJS) : %.o : %.c Makefile FreeRTOSConfig.h\r
- $(CC) -c $(CFLAGS) $< -o $@\r
-\r
-clean :\r
- rm $(THUMB_OBJS)\r
- rm $(ARM_OBJS)\r
- touch Makefile\r
- rm RTOSDemo.elf\r
- rm RTOSDemo.hex\r
- \r
- \r
- \r
-\r
-\r
-\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-\r
-/* Demo application includes. */\r
-#include "partest.h"\r
-\r
-/*-----------------------------------------------------------\r
- * Simple parallel port IO routines for the LED's. LED's can be set, cleared\r
- * or toggled.\r
- *-----------------------------------------------------------*/\r
-\r
-#define partstNUM_LEDS ( 4 )\r
-#define partstALL_LEDS ( ulLED_Mask[ 0 ] | ulLED_Mask[ 1 ] | ulLED_Mask[ 2 ] | ulLED_Mask[ 3 ] )\r
-const unsigned long ulLED_Mask[ partstNUM_LEDS ]= { (1<<19), (1<<20), (1<<21), (1<<22) };\r
-\r
-\r
-void vParTestInitialise( void )\r
-{ \r
- /* Configure the PIO Lines corresponding to LED1 to LED4 to be outputs. */\r
- AT91C_BASE_PIOB->PIO_PER = partstALL_LEDS; \r
- AT91C_BASE_PIOB->PIO_OER = partstALL_LEDS; \r
-\r
- /* Start with all LED's off. */\r
- AT91C_BASE_PIOB->PIO_SODR = partstALL_LEDS;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
-{\r
- if( uxLED < ( portBASE_TYPE ) partstNUM_LEDS )\r
- {\r
- if( xValue )\r
- {\r
- AT91C_BASE_PIOB->PIO_SODR = ulLED_Mask[ uxLED ];\r
- }\r
- else\r
- {\r
- AT91C_BASE_PIOB->PIO_CODR = ulLED_Mask[ uxLED ];\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
-{\r
- if( uxLED < ( portBASE_TYPE ) partstNUM_LEDS )\r
- {\r
- if( AT91C_BASE_PIOB->PIO_PDSR & ulLED_Mask[ uxLED ] )\r
- {\r
- AT91C_BASE_PIOB->PIO_CODR = ulLED_Mask[ uxLED ];\r
- }\r
- else\r
- {\r
- AT91C_BASE_PIOB->PIO_SODR = ulLED_Mask[ uxLED ];\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-unsigned portBASE_TYPE uxParTestGetLED( void )\r
-{\r
- /* Return the value of LED DS4 for use by the WEB server. */\r
- return !( AT91C_BASE_PIOB->PIO_PDSR & ulLED_Mask[ partstNUM_LEDS - 1 ] );\r
-}\r
-\r
+++ /dev/null
-/*----------------------------------------------------------------------------\r
-* ATMEL Microcontroller Software Support - ROUSSET -\r
-*----------------------------------------------------------------------------\r
-* The software is delivered "AS IS" without warranty or condition of any\r
-* kind, either express, implied or statutory. This includes without\r
-* limitation any warranty or condition with respect to merchantability or\r
-* fitness for any particular purpose, or against the infringements of\r
-* intellectual property rights of others.\r
-*----------------------------------------------------------------------------\r
-* File Name : Board.h\r
-* Object : AT91SAM7X Evaluation Board Features Definition File.\r
-*\r
-* Creation : JG 20/Jun/2005\r
-*----------------------------------------------------------------------------\r
-*/\r
-#ifndef Board_h\r
-#define Board_h\r
-\r
-#include "AT91SAM7X256.h"\r
-#include "ioat91sam7x256.h"\r
-\r
-#define true -1\r
-#define false 0\r
-\r
-/*-------------------------------*/\r
-/* SAM7Board Memories Definition */\r
-/*-------------------------------*/\r
-// The AT91SAM7X128 embeds a 32-Kbyte SRAM bank, and 128K-Byte Flash\r
-\r
-#define FLASH_PAGE_NB 256\r
-#define FLASH_PAGE_SIZE 128\r
-\r
-/*-----------------*/\r
-/* Leds Definition */\r
-/*-----------------*/\r
-#define LED1 (1<<19) // PB19\r
-#define LED2 (1<<20) // PB20\r
-#define LED3 (1<<21) // PB21\r
-#define LED4 (1<<22) // PB22\r
-#define NB_LED 4\r
-\r
-#define LED_MASK (LED1|LED2|LED3|LED4)\r
-\r
-/*-------------------------*/\r
-/* Push Buttons Definition */\r
-/*-------------------------*/\r
-\r
-#define SW1_MASK (1<<21) // PA21\r
-#define SW2_MASK (1<<22) // PA22\r
-#define SW3_MASK (1<<23) // PA23\r
-#define SW4_MASK (1<<24) // PA24\r
-#define SW_MASK (SW1_MASK|SW2_MASK|SW3_MASK|SW4_MASK)\r
-\r
-\r
-#define SW1 (1<<21) // PA21\r
-#define SW2 (1<<22) // PA22\r
-#define SW3 (1<<23) // PA23\r
-#define SW4 (1<<24) // PA24\r
-#define SWPUSH (1<<25) // PA25\r
-/*--------------*/\r
-/* Master Clock */\r
-/*--------------*/\r
-\r
-#define EXT_OC 18432000 // Exetrnal ocilator MAINCK\r
-#define MCK 47923200 // MCK (PLLRC div by 2)\r
-#define MCKKHz (MCK/1000) //\r
-\r
-#endif /* Board_h */\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;- ATMEL Microcontroller Software Support - ROUSSET -\r
-;------------------------------------------------------------------------------\r
-; The software is delivered "AS IS" without warranty or condition of any\r
-; kind, either express, implied or statutory. This includes without\r
-; limitation any warranty or condition with respect to merchantability or\r
-; fitness for any particular purpose, or against the infringements of\r
-; intellectual property rights of others.\r
-;-----------------------------------------------------------------------------\r
-;- File source : Cstartup.s79\r
-;- Object : Generic CStartup for IAR No Use REMAP\r
-;- Compilation flag : None\r
-;-\r
-;- 1.0 15/Jun/04 JPP : Creation\r
-;------------------------------------------------------------------------------\r
-\r
-#include "AT91SAM7X256_inc.h"\r
-\r
-;------------------------------------------------------------------------------\r
-;- Area Definition\r
-;------------------------------------------------------------------------------\r
-\r
-;---------------------------------------------------------------\r
-; ?RESET\r
-; Reset Vector.\r
-; Normally, segment INTVEC is linked at address 0.\r
-; For debugging purposes, INTVEC may be placed at other\r
-; addresses.\r
-; A debugger that honors the entry point will start the\r
-; program in a normal way even if INTVEC is not at address 0.\r
-;-------------------------------------------------------------\r
-\r
- PROGRAM ?RESET\r
- RSEG INTRAMSTART_REMAP\r
- RSEG INTRAMEND_REMAP\r
-\r
- EXTERN vPortYieldProcessor\r
-\r
- RSEG ICODE:CODE:ROOT(2)\r
- CODE32 ; Always ARM mode after reset \r
- org 0 \r
-reset \r
-;------------------------------------------------------------------------------\r
-;- Exception vectors\r
-;--------------------\r
-;- These vectors can be read at address 0 or at RAM address\r
-;- They ABSOLUTELY requires to be in relative addresssing mode in order to\r
-;- guarantee a valid jump. For the moment, all are just looping.\r
-;- If an exception occurs before remap, this would result in an infinite loop.\r
-;- To ensure if a exeption occurs before start application to infinite loop.\r
-;------------------------------------------------------------------------------\r
-\r
- B InitReset ; 0x00 Reset handler\r
-undefvec:\r
- B undefvec ; 0x04 Undefined Instruction\r
-swivec:\r
- B vPortYieldProcessor ; 0x08 Software Interrupt\r
-pabtvec:\r
- B pabtvec ; 0x0C Prefetch Abort\r
-dabtvec:\r
- B dabtvec ; 0x10 Data Abort\r
-rsvdvec:\r
- B rsvdvec ; 0x14 reserved\r
-irqvec:\r
- LDR PC, [PC, #-0xF20] ; Jump directly to the address given by the AIC\r
-\r
-fiqvec: ; 0x1c FIQ\r
-\r
-;------------------------------------------------------------------------------\r
-;- Function : FIQ_Handler_Entry\r
-;- Treatments : FIQ Controller Interrupt Handler.\r
-;- Called Functions : AIC_FVR[interrupt]\r
-;------------------------------------------------------------------------------\r
-\r
-FIQ_Handler_Entry:\r
-\r
-;- Switch in SVC/User Mode to allow User Stack access for C code\r
-; because the FIQ is not yet acknowledged\r
-\r
-;- Save and r0 in FIQ_Register\r
- mov r9,r0\r
- ldr r0 , [r8, #AIC_FVR]\r
- msr CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC\r
-\r
-;- Save scratch/used registers and LR in User Stack\r
- stmfd sp!, { r1-r3, r12, lr}\r
-\r
-;- Branch to the routine pointed by the AIC_FVR\r
- mov r14, pc\r
- bx r0\r
-\r
-;- Restore scratch/used registers and LR from User Stack\r
- ldmia sp!, { r1-r3, r12, lr}\r
-\r
-;- Leave Interrupts disabled \ 4and switch back in FIQ mode\r
- msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ\r
-\r
-;- Restore the R0 ARM_MODE_SVC register\r
- mov r0,r9\r
-\r
-;- Restore the Program Counter using the LR_fiq directly in the PC\r
- subs pc,lr,#4\r
-\r
-InitReset:\r
-;------------------------------------------------------------------------------\r
-;- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit\r
-;------------------------------------------------------------------------------\r
- EXTERN AT91F_LowLevelInit\r
-\r
-#define __iramend SFB(INTRAMEND_REMAP)\r
-\r
-;- minumum C initialization\r
-;- call AT91F_LowLevelInit( void)\r
-\r
- ldr r13,=__iramend ; temporary stack in internal RAM\r
-;--Call Low level init function in ABSOLUTE through the Interworking\r
- ldr r0,=AT91F_LowLevelInit\r
- mov lr, pc\r
- bx r0\r
-;------------------------------------------------------------------------------\r
-;- Stack Sizes Definition\r
-;------------------------\r
-;- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using\r
-;- the vectoring. This assume that the IRQ management.\r
-;- The Interrupt Stack must be adjusted depending on the interrupt handlers.\r
-;- Fast Interrupt not requires stack If in your application it required you must\r
-;- be definehere.\r
-;- The System stack size is not defined and is limited by the free internal\r
-;- SRAM.\r
-;------------------------------------------------------------------------------\r
-\r
-;------------------------------------------------------------------------------\r
-;- Top of Stack Definition\r
-;-------------------------\r
-;- Interrupt and Supervisor Stack are located at the top of internal memory in\r
-;- order to speed the exception handling context saving and restoring.\r
-;- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.\r
-;------------------------------------------------------------------------------\r
-\r
-IRQ_STACK_SIZE EQU 300\r
-\r
-ARM_MODE_FIQ EQU 0x11\r
-ARM_MODE_IRQ EQU 0x12\r
-ARM_MODE_SVC EQU 0x13\r
-\r
-I_BIT EQU 0x80\r
-F_BIT EQU 0x40\r
-\r
-;------------------------------------------------------------------------------\r
-;- Setup the stack for each mode\r
-;-------------------------------\r
- ldr r0, =__iramend\r
-\r
-;- Set up Fast Interrupt Mode and set FIQ Mode Stack\r
- msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT\r
-;- Init the FIQ register\r
- ldr r8, =AT91C_BASE_AIC\r
-\r
-;- Set up Interrupt Mode and set IRQ Mode Stack\r
- msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT\r
- mov r13, r0 ; Init stack IRQ\r
- sub r0, r0, #IRQ_STACK_SIZE\r
-\r
-;- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack\r
- msr CPSR_c, #ARM_MODE_SVC\r
- mov r13, r0\r
-\r
-\r
-;---------------------------------------------------------------\r
-; ?CSTARTUP\r
-;---------------------------------------------------------------\r
- EXTERN __segment_init\r
- EXTERN main\r
-; Initialize segments.\r
-; __segment_init is assumed to use\r
-; instruction set and to be reachable by BL from the ICODE segment\r
-; (it is safest to link them in segment ICODE).\r
- ldr r0,=__segment_init\r
- mov lr, pc\r
- bx r0\r
-\r
- PUBLIC __main\r
-?jump_to_main:\r
- ldr lr,=?call_exit\r
- ldr r0,=main\r
-__main:\r
- bx r0\r
-\r
-;------------------------------------------------------------------------------\r
-;- Loop for ever\r
-;---------------\r
-;- End of application. Normally, never occur.\r
-;- Could jump on Software Reset ( B 0x0 ).\r
-;------------------------------------------------------------------------------\r
-?call_exit:\r
-End\r
- b End\r
-\r
-\r
-\r
-;---------------------------------------------------------------\r
-; ?EXEPTION_VECTOR\r
-; This module is only linked if needed for closing files.\r
-;---------------------------------------------------------------\r
- PUBLIC AT91F_Default_FIQ_handler\r
- PUBLIC AT91F_Default_IRQ_handler\r
- PUBLIC AT91F_Spurious_handler\r
-\r
- CODE32 ; Always ARM mode after exeption \r
-\r
-AT91F_Default_FIQ_handler\r
- b AT91F_Default_FIQ_handler\r
-\r
-AT91F_Default_IRQ_handler\r
- b AT91F_Default_IRQ_handler\r
-\r
-AT91F_Spurious_handler\r
- b AT91F_Spurious_handler\r
-\r
- ENDMOD\r
-\r
- END\r
-\r
+++ /dev/null
-//*----------------------------------------------------------------------------\r
-//* ATMEL Microcontroller Software Support - ROUSSET -\r
-//*----------------------------------------------------------------------------\r
-//* The software is delivered "AS IS" without warranty or condition of any\r
-//* kind, either express, implied or statutory. This includes without\r
-//* limitation any warranty or condition with respect to merchantability or\r
-//* fitness for any particular purpose, or against the infringements of\r
-//* intellectual property rights of others.\r
-//*----------------------------------------------------------------------------\r
-//* File Name : Cstartup_SAM7.c\r
-//* Object : Low level initializations written in C for IAR\r
-//* tools\r
-//* 1.0 08/Sep/04 JPP : Creation\r
-//* 1.10 10/Sep/04 JPP : Update AT91C_CKGR_PLLCOUNT filed\r
-//*----------------------------------------------------------------------------\r
-\r
-\r
-// Include the board file description\r
-#include "Board.h"\r
-\r
-//*----------------------------------------------------------------------------\r
-//* \fn AT91F_LowLevelInit\r
-//* \brief This function performs very low level HW initialization\r
-//* this function can be use a Stack, depending the compilation\r
-//* optimization mode\r
-//*----------------------------------------------------------------------------\r
-void AT91F_LowLevelInit( void);\r
-void AT91F_LowLevelInit( void )\r
-{\r
- AT91PS_PMC pPMC = AT91C_BASE_PMC;\r
-\r
- //* Set Flash Waite sate\r
- // Single Cycle Access at Up to 30 MHz, or 40\r
- // if MCK = 47923200 I have 50 Cycle for 1 useconde ( flied MC_FMR->FMCN\r
- AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(75 <<16)) | AT91C_MC_FWS_1FWS ;\r
-\r
- //* Watchdog Disable\r
- AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;\r
-\r
- //* Set MCK at 47 923 200\r
- // 1 Enabling the Main Oscillator:\r
- // SCK = 1/32768 = 30.51 uSeconde\r
- // Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms\r
- pPMC->PMC_MOR = ((( AT91C_CKGR_OSCOUNT & (0x06 <<8)) | AT91C_CKGR_MOSCEN ));\r
- // Wait the startup time\r
- while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));\r
- // 2 Checking the Main Oscillator Frequency (Optional)\r
- // 3 Setting PLL and divider:\r
- // - div by 5 Fin = 3,6864 =(18,432 / 5)\r
- // - Mul 25+1: Fout = 95,8464 =(3,6864 *26)\r
- // for 96 MHz the erroe is 0.16%\r
- //eld out NOT USED = 0 Fi\r
- pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 5) |\r
- (AT91C_CKGR_PLLCOUNT & (28<<8)) |\r
- (AT91C_CKGR_MUL & (25<<16)));\r
-\r
- // Wait the startup time\r
- while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));\r
- // 4. Selection of Master Clock and Processor Clock\r
- // select the PLL clock divided by 2\r
- pPMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 ;\r
- while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));\r
-\r
- pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;\r
- while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));\r
-}\r
-\r
-\r
-\r
+++ /dev/null
-//*----------------------------------------------------------------------------\r
-//* ATMEL Microcontroller Software Support - ROUSSET -\r
-//*----------------------------------------------------------------------------\r
-//* The software is delivered "AS IS" without warranty or condition of any\r
-//* kind, either express, implied or statutory. This includes without\r
-//* limitation any warranty or condition with respect to merchantability or\r
-//* fitness for any particular purpose, or against the infringements of\r
-//* intellectual property rights of others.\r
-//*----------------------------------------------------------------------------\r
-//* File Name : Emac.h\r
-//* Object : Emac header file\r
-//* Creation : Hi 11/18/2002\r
-//*\r
-//*----------------------------------------------------------------------------\r
-#ifndef AT91C_EMAC_H\r
-#define AT91C_EMAC_H\r
-\r
-\r
-//* Allows to display all IP header in the main.c\r
-//* If not defined, only ICMP packets are displayed\r
-#define AT91C_DISPLAY_ALL_IPHEADER 0\r
-\r
-#define NB_RX_BUFFERS 25 //* Number of receive buffers\r
-#define ETH_RX_BUFFER_SIZE 128 //*\r
-\r
-#define NB_TX_BUFFERS 2 //* Number of Transmit buffers\r
-#define ETH_TX_BUFFER_SIZE UIP_BUFSIZE //*\r
-\r
-#define AT91C_NO_IPPACKET 0\r
-#define AT91C_IPPACKET 1\r
-\r
-#define ARP_REQUEST 0x0001\r
-#define ARP_REPLY 0x0002\r
-#define PROT_ARP 0x0806\r
-#define PROT_IP 0x0800\r
-#define PROT_ICMP 0x01\r
-#define ICMP_ECHO_REQUEST 0x08\r
-#define ICMP_ECHO_REPLY 0x00\r
-\r
-#define AT91C_EMAC_CLKEN 0x2\r
-#define SWAP16(x) (((x & 0xff) << 8) | (x >> 8))\r
-\r
-#if 0\r
-//* Transfer descriptor structure\r
-typedef struct _AT91S_TdDescriptor {\r
- unsigned int addr;\r
- unsigned int status;\r
-}AT91S_TdDescriptor, *AT91PS_TdDescriptor;\r
-#endif\r
-\r
-//* Receive Transfer descriptor structure\r
-typedef struct _AT91S_RxTdDescriptor {\r
- unsigned int addr;\r
- union\r
- {\r
- unsigned int status;\r
- struct {\r
- unsigned int Length:11;\r
- unsigned int Res0:1;\r
- unsigned int Rxbuf_off:2;\r
- unsigned int StartOfFrame:1;\r
- unsigned int EndOfFrame:1;\r
- unsigned int Cfi:1;\r
- unsigned int VlanPriority:3;\r
- unsigned int PriorityTag:1;\r
- unsigned int VlanTag:1;\r
- unsigned int TypeID:1;\r
- unsigned int Sa4Match:1;\r
- unsigned int Sa3Match:1;\r
- unsigned int Sa2Match:1;\r
- unsigned int Sa1Match:1;\r
- unsigned int Res1:1;\r
- unsigned int ExternalAdd:1;\r
- unsigned int UniCast:1;\r
- unsigned int MultiCast:1;\r
- unsigned int BroadCast:1;\r
- }S_Status; \r
- }U_Status;\r
-}AT91S_RxTdDescriptor, *AT91PS_RxTdDescriptor;\r
-\r
-\r
-//* Transmit Transfer descriptor structure\r
-typedef struct _AT91S_TxTdDescriptor {\r
- unsigned int addr;\r
- union\r
- {\r
- unsigned int status;\r
- struct {\r
- unsigned int Length:11;\r
- unsigned int Res0:4;\r
- unsigned int LastBuff:1;\r
- unsigned int NoCrc:1;\r
- unsigned int Res1:10;\r
- unsigned int BufExhausted:1;\r
- unsigned int TransmitUnderrun:1;\r
- unsigned int TransmitError:1;\r
- unsigned int Wrap:1;\r
- unsigned int BuffUsed:1;\r
- }S_Status; \r
- }U_Status;\r
-}AT91S_TxTdDescriptor, *AT91PS_TxTdDescriptor;\r
-\r
-#define AT91C_OWNERSHIP_BIT 0x00000001\r
-\r
-/* Receive status defintion */\r
-#define AT91C_BROADCAST_ADDR ((unsigned int) (1 << 31)) //* Broadcat address detected\r
-#define AT91C_MULTICAST_HASH ((unsigned int) (1 << 30)) //* MultiCast hash match\r
-#define AT91C_UNICAST_HASH ((unsigned int) (1 << 29)) //* UniCast hash match\r
-#define AT91C_EXTERNAL_ADDR ((unsigned int) (1 << 28)) //* External Address match\r
-#define AT91C_SA1_ADDR ((unsigned int) (1 << 26)) //* Specific address 1 match\r
-#define AT91C_SA2_ADDR ((unsigned int) (1 << 25)) //* Specific address 2 match\r
-#define AT91C_SA3_ADDR ((unsigned int) (1 << 24)) //* Specific address 3 match\r
-#define AT91C_SA4_ADDR ((unsigned int) (1 << 23)) //* Specific address 4 match\r
-#define AT91C_TYPE_ID ((unsigned int) (1 << 22)) //* Type ID match\r
-#define AT91C_VLAN_TAG ((unsigned int) (1 << 21)) //* VLAN tag detected\r
-#define AT91C_PRIORITY_TAG ((unsigned int) (1 << 20)) //* PRIORITY tag detected\r
-#define AT91C_VLAN_PRIORITY ((unsigned int) (7 << 17)) //* PRIORITY Mask\r
-#define AT91C_CFI_IND ((unsigned int) (1 << 16)) //* CFI indicator\r
-#define AT91C_EOF ((unsigned int) (1 << 15)) //* EOF\r
-#define AT91C_SOF ((unsigned int) (1 << 14)) //* SOF\r
-#define AT91C_RBF_OFFSET ((unsigned int) (3 << 12)) //* Receive Buffer Offset Mask\r
-#define AT91C_LENGTH_FRAME ((unsigned int) 0x07FF) //* Length of frame\r
-\r
-/* Transmit Status definition */\r
-#define AT91C_TRANSMIT_OK ((unsigned int) (1 << 31)) //*\r
-#define AT91C_TRANSMIT_WRAP ((unsigned int) (1 << 30)) //* Wrap bit: mark the last descriptor\r
-#define AT91C_TRANSMIT_ERR ((unsigned int) (1 << 29)) //* RLE:transmit error\r
-#define AT91C_TRANSMIT_UND ((unsigned int) (1 << 28)) //* Transmit Underrun\r
-#define AT91C_BUF_EX ((unsigned int) (1 << 27)) //* Buffers exhausted in mid frame\r
-#define AT91C_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) //* No CRC will be appended to the current frame\r
-#define AT91C_LAST_BUFFER ((unsigned int) (1 << 15)) //*\r
-\r
-#define ARP_ETHER 1 /* Ethernet hardware address */\r
-#define ARPOP_REQUEST 1 /* Request to resolve address */\r
-#define ARPOP_REPLY 2 /* Response to previous request */\r
-#define RARPOP_REQUEST 3 /* Request to resolve address */\r
-#define RARPOP_REPLY 4 /* Response to previous request */\r
-\r
-\r
-typedef struct _AT91S_EthHdr\r
-{\r
- unsigned char et_dest[6]; /* Destination node */\r
- unsigned char et_src[6]; /* Source node */\r
- unsigned short et_protlen; /* Protocol or length */\r
-} AT91S_EthHdr, *AT91PS_EthHdr;\r
-\r
-typedef struct _AT91S_ArpHdr\r
-{\r
- unsigned short ar_hrd; /* Format of hardware address */\r
- unsigned short ar_pro; /* Format of protocol address */\r
- unsigned char ar_hln; /* Length of hardware address */\r
- unsigned char ar_pln; /* Length of protocol address */\r
- unsigned short ar_op; /* Operation */\r
- unsigned char ar_sha[6]; /* Sender hardware address */\r
- unsigned char ar_spa[4]; /* Sender protocol address */\r
- unsigned char ar_tha[6]; /* Target hardware address */\r
- unsigned char ar_tpa[4]; /* Target protocol address */\r
-} AT91S_ArpHdr, *AT91PS_ArpHdr;\r
-\r
-//* IP Header structure\r
-typedef struct _AT91S_IPheader {\r
- unsigned char ip_hl_v; /* header length and version */\r
- unsigned char ip_tos; /* type of service */\r
- unsigned short ip_len; /* total length */\r
- unsigned short ip_id; /* identification */\r
- unsigned short ip_off; /* fragment offset field */\r
- unsigned char ip_ttl; /* time to live */\r
- unsigned char ip_p; /* protocol */\r
- unsigned short ip_sum; /* checksum */\r
- unsigned char ip_src[4]; /* Source IP address */\r
- unsigned char ip_dst[4]; /* Destination IP address */\r
- unsigned short udp_src; /* UDP source port */\r
- unsigned short udp_dst; /* UDP destination port */\r
- unsigned short udp_len; /* Length of UDP packet */\r
- unsigned short udp_xsum; /* Checksum */\r
-} AT91S_IPheader, *AT91PS_IPheader;\r
-\r
-//* ICMP echo header structure\r
-typedef struct _AT91S_IcmpEchoHdr {\r
- unsigned char type; /* type of message */\r
- unsigned char code; /* type subcode */\r
- unsigned short cksum; /* ones complement cksum of struct */\r
- unsigned short id; /* identifier */\r
- unsigned short seq; /* sequence number */\r
-}AT91S_IcmpEchoHdr, *AT91PS_IcmpEchoHdr;\r
-\r
-\r
-typedef struct _AT91S_EthPack\r
-{\r
- AT91S_EthHdr EthHdr;\r
- AT91S_ArpHdr ArpHdr;\r
-} AT91S_EthPack, *AT91PS_EthPack;\r
-\r
-\r
-#endif //* AT91C_EMAC_H\r
+++ /dev/null
-/* Generic MII registers. */\r
-\r
-#define MII_BMCR 0x00 /* Basic mode control register */\r
-#define MII_BMSR 0x01 /* Basic mode status register */\r
-#define MII_PHYSID1 0x02 /* PHYS ID 1 */\r
-#define MII_PHYSID2 0x03 /* PHYS ID 2 */\r
-#define MII_ADVERTISE 0x04 /* Advertisement control reg */\r
-#define MII_LPA 0x05 /* Link partner ability reg */\r
-#define MII_EXPANSION 0x06 /* Expansion register */\r
-#define MII_DCOUNTER 0x12 /* Disconnect counter */\r
-#define MII_FCSCOUNTER 0x13 /* False carrier counter */\r
-#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */\r
-#define MII_RERRCOUNTER 0x15 /* Receive error counter */\r
-#define MII_SREVISION 0x16 /* Silicon revision */\r
-#define MII_RESV1 0x17 /* Reserved... */\r
-#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */\r
-#define MII_PHYADDR 0x19 /* PHY address */\r
-#define MII_RESV2 0x1a /* Reserved... */\r
-#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */\r
-#define MII_NCONFIG 0x1c /* Network interface config */\r
-\r
-/* Basic mode control register. */\r
-#define BMCR_RESV 0x007f /* Unused... */\r
-#define BMCR_CTST 0x0080 /* Collision test */\r
-#define BMCR_FULLDPLX 0x0100 /* Full duplex */\r
-#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */\r
-#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */\r
-#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */\r
-#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */\r
-#define BMCR_SPEED100 0x2000 /* Select 100Mbps */\r
-#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */\r
-#define BMCR_RESET 0x8000 /* Reset the DP83840 */\r
-\r
-/* Basic mode status register. */\r
-#define BMSR_ERCAP 0x0001 /* Ext-reg capability */\r
-#define BMSR_JCD 0x0002 /* Jabber detected */\r
-#define BMSR_LSTATUS 0x0004 /* Link status */\r
-#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */\r
-#define BMSR_RFAULT 0x0010 /* Remote fault detected */\r
-#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */\r
-#define BMSR_RESV 0x07c0 /* Unused... */\r
-#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */\r
-#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */\r
-#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */\r
-#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */\r
-#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */\r
-\r
-/* Advertisement control register. */\r
-#define ADVERTISE_SLCT 0x001f /* Selector bits */\r
-#define ADVERTISE_CSMA 0x0001 /* Only selector supported */\r
-#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */\r
-#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */\r
-#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */\r
-#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */\r
-#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */\r
-#define ADVERTISE_RESV 0x1c00 /* Unused... */\r
-#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */\r
-#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */\r
-#define ADVERTISE_NPAGE 0x8000 /* Next page bit */\r
-\r
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \\r
- ADVERTISE_CSMA)\r
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \\r
- ADVERTISE_100HALF | ADVERTISE_100FULL)\r
-\r
-/* Link partner ability register. */\r
-#define LPA_SLCT 0x001f /* Same as advertise selector */\r
-#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */\r
-#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */\r
-#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */\r
-#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */\r
-#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */\r
-#define LPA_RESV 0x1c00 /* Unused... */\r
-#define LPA_RFAULT 0x2000 /* Link partner faulted */\r
-#define LPA_LPACK 0x4000 /* Link partner acked us */\r
-#define LPA_NPAGE 0x8000 /* Next page bit */\r
-\r
-#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)\r
-#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)\r
-\r
-/* Expansion register for auto-negotiation. */\r
-#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */\r
-#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */\r
-#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */\r
-#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */\r
-#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */\r
-#define EXPANSION_RESV 0xffe0 /* Unused... */\r
-\r
-/* N-way test register. */\r
-#define NWAYTEST_RESV1 0x00ff /* Unused... */\r
-#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */\r
-#define NWAYTEST_RESV2 0xfe00 /* Unused... */\r
-\r
-#define SPEED_10 10\r
-#define SPEED_100 100\r
-\r
-/* Duplex, half or full. */\r
-#define DUPLEX_HALF 0x00\r
-#define DUPLEX_FULL 0x01\r
-\r
-/* PHY ID */\r
-#define MII_DM9161_ID 0x0181b8a0\r
-#define MII_AM79C875_ID 0x00225540 /* 0x00225541 */\r
-\r
-#define AT91C_PHY_ADDR 31\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/*\r
- Sample interrupt driven mouse device driver. This is a minimal implementation \r
- for demonstration only. Although functional, it may not be a fully and \r
- compliant implementation. The small joystick on the SAM7X EK can be used to\r
- move the mouse cursor, pressing the joystick transmits mouse clicks. Note\r
- that it might be necessary to run the demo stand along (without the \r
- debugger) in order for the USB device to be recognised by the host computer.\r
-\r
- The interrupt handler itself is contained within USB_ISR.c.\r
- \r
- See the FreeRTOS.org online documentation for more information.\r
-*/\r
-\r
-/* Standard includes. */\r
-#include <string.h>\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "queue.h"\r
-\r
-/* Demo application includes. */\r
-#include "USBSample.h"\r
-\r
-/* Joystick inputs used to move the 'mouse' cursor. */\r
-#define usbSW1 ( 1 << 21 ) /* PA21 */\r
-#define usbSW2 ( 1 << 22 ) /* PA22 */\r
-#define usbSW3 ( 1 << 23 ) /* PA23 */\r
-#define usbSW4 ( 1 << 24 ) /* PA24 */\r
-#define usbSW_CLICK ( 1 << 25 ) /* PA25 */\r
-\r
-/* Descriptor type definitions. */\r
-#define usbDESCRIPTOR_TYPE_DEVICE ( 0x01 )\r
-#define usbDESCRIPTOR_TYPE_CONFIGURATION ( 0x02 )\r
-#define usbDESCRIPTOR_TYPE_STRING ( 0x03 )\r
-\r
-/* USB request type definitions. */\r
-#define usbGET_REPORT_REQUEST ( 0x01 )\r
-#define usbGET_IDLE_REQUEST ( 0x02 )\r
-#define usbGET_PROTOCOL_REQUEST ( 0x03 )\r
-#define usbSET_REPORT_REQUEST ( 0x09 )\r
-#define usbSET_IDLE_REQUEST ( 0x0A )\r
-#define usbSET_PROTOCOL_REQUEST ( 0x0B )\r
-#define usbGET_CONFIGURATION_REQUEST ( 0x08 )\r
-#define usbGET_STATUS_REQUEST ( 0x00 )\r
-#define usbCLEAR_FEATURE_REQUEST ( 0x01 )\r
-#define usbSET_FEATURE_REQUEST ( 0x03 )\r
-#define usbSET_ADDRESS_REQUEST ( 0x05 )\r
-#define usbGET_DESCRIPTOR_REQUEST ( 0x06 )\r
-#define usbSET_CONFIGURATION_REQUEST ( 0x09 )\r
-#define usbGET_INTERFACE_REQUEST ( 0x0A )\r
-#define usbSET_INTERFACE_REQUEST ( 0x0B )\r
-\r
-\r
-/* Misc USB definitions. */\r
-#define usbDEVICE_CLASS_VENDOR_SPECIFIC ( 0xFF )\r
-#define usbBUS_POWERED ( 0x80 )\r
-#define usbHID_REPORT_DESCRIPTOR ( 0x22 )\r
-#define AT91C_UDP_TRANSCEIVER_ENABLE ( *( ( unsigned long * ) 0xfffb0074 ) )\r
-\r
-/* Index to the various string. */\r
-#define usbLANGUAGE_STRING ( 0 )\r
-#define usbMANUFACTURER_STRING ( 1 )\r
-#define usbPRODUCT_STRING ( 2 )\r
-#define usbCONFIGURATION_STRING ( 3 )\r
-#define usbINTERFACE_STRING ( 4 )\r
-\r
-/* Data indexes for reading the request from the xISRStatus.ucFifoData[]\r
-into xUSB_REQUEST. The data order is designed for speed - so looks a \r
-little odd. */\r
-#define usbREQUEST_TYPE_INDEX ( 7 )\r
-#define usbREQUEST_INDEX ( 6 )\r
-#define usbVALUE_HIGH_BYTE ( 4 )\r
-#define usbVALUE_LOW_BYTE ( 5 )\r
-#define usbINDEX_HIGH_BYTE ( 2 )\r
-#define usbINDEX_LOW_BYTE ( 3 )\r
-#define usbLENGTH_HIGH_BYTE ( 0 )\r
-#define usbLENGTH_LOW_BYTE ( 1 )\r
-\r
-/* Misc application definitions. */\r
-#define usbINTERRUPT_PRIORITY ( 3 )\r
-#define usbFIFO_LENGTH ( ( unsigned long ) 8 )\r
-#define usbXUP ( 1 )\r
-#define usbXDOWN ( 2 )\r
-#define usbYUP ( 3 )\r
-#define usbYDOWN ( 4 )\r
-#define usbMAX_COORD ( 120 )\r
-#define usbMAX_TX_MESSAGE_SIZE ( 128 )\r
-#define usbSHORTEST_DELAY ( ( TickType_t ) 1 )\r
-#define usbINIT_DELAY ( ( TickType_t ) 1000 / portTICK_PERIOD_MS )\r
-#define usbSHORT_DELAY ( ( TickType_t ) 50 / portTICK_PERIOD_MS )\r
-#define usbEND_POINT_RESET_MASK ( ( unsigned long ) 0x0f )\r
-#define usbDATA_INC ( ( char ) 5 )\r
-#define usbEXPECTED_NUMBER_OF_BYTES ( ( unsigned long ) 8 )\r
-\r
-/* Control request types. */\r
-#define usbSTANDARD_DEVICE_REQUEST ( 0 )\r
-#define usbSTANDARD_INTERFACE_REQUEST ( 1 )\r
-#define usbSTANDARD_END_POINT_REQUEST ( 2 )\r
-#define usbCLASS_INTERFACE_REQUEST ( 5 )\r
-\r
-/* Structure used to hold the received requests. */\r
-typedef struct \r
-{\r
- unsigned char ucReqType;\r
- unsigned char ucRequest;\r
- unsigned short usValue;\r
- unsigned short usIndex;\r
- unsigned short usLength;\r
-} xUSB_REQUEST;\r
-\r
-typedef enum\r
-{\r
- eNOTHING,\r
- eJUST_RESET,\r
- eJUST_GOT_CONFIG,\r
- eJUST_GOT_ADDRESS,\r
- eSENDING_EVEN_DESCRIPTOR,\r
- eREADY_TO_SEND\r
-} eDRIVER_STATE;\r
-\r
-/* Structure used to control the data being sent to the host. */\r
-typedef struct\r
-{\r
- unsigned char ucTxBuffer[ usbMAX_TX_MESSAGE_SIZE ];\r
- unsigned long ulNextCharIndex;\r
- unsigned long ulTotalDataLength;\r
-} xTX_MESSAGE;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* \r
- * The USB interrupt service routine. This takes a snapshot of the USB\r
- * device at the time of the interrupt, clears the interrupts, and posts\r
- * the data to the USB processing task. This is implemented in USB_ISR.c.\r
- */\r
-extern void vUSB_ISR_Wrapper( void );\r
-\r
-/*\r
- * Called after the bus reset interrupt - this function readies all the\r
- * end points for communication.\r
- */\r
-static void prvResetEndPoints( void );\r
-\r
-/*\r
- * Setup the USB hardware, install the interrupt service routine and \r
- * initialise all the state variables.\r
- */\r
-static void vInitUSBInterface( void );\r
-\r
-/*\r
- * Decode and act upon an interrupt generated by the control end point.\r
- */\r
-static void prvProcessEndPoint0Interrupt( xISRStatus *pxMessage );\r
-\r
-/* \r
- * For simplicity requests are separated into device, interface, class \r
- * interface and end point requests.\r
- *\r
- * Decode and handle standard device requests originating on the control\r
- * end point. \r
- */\r
-static void prvHandleStandardDeviceRequest( xUSB_REQUEST *pxRequest );\r
-\r
-/*\r
- * For simplicity requests are separated into device, interface, class \r
- * interface and end point requests.\r
- *\r
- * Decode and handle standard interface requests originating on the control\r
- * end point.\r
- */\r
-static void prvHandleStandardInterfaceRequest( xUSB_REQUEST *pxRequest );\r
-\r
-/*\r
- * For simplicity requests are separated into device, interface, class \r
- * interface and end point requests.\r
- *\r
- * Decode and handle standard end point requests originating on the control\r
- * end point.\r
- */\r
-static void prvHandleStandardEndPointRequest( xUSB_REQUEST *pxRequest );\r
-\r
-/*\r
- * For simplicity requests are separated into device, interface, class \r
- * interface and end point requests.\r
- *\r
- * Decode and handle the class interface requests.\r
- */\r
-static void prvHandleClassInterfaceRequest( xUSB_REQUEST *pxRequest );\r
-\r
-/*\r
- * Setup the Tx buffer to send data in response to a control request.\r
- *\r
- * The data to be transmitted is buffered, the state variables are updated,\r
- * then prvSendNextSegment() is called to start the transmission off. Once\r
- * the first segment has been sent the remaining segments are transmitted\r
- * in response to TXCOMP interrupts until the entire buffer has been\r
- * sent.\r
- */\r
-static void prvSendControlData( unsigned char *pucData, unsigned short usRequestedLength, unsigned long ulLengthLeftToSend, long lSendingDescriptor );\r
-\r
-/*\r
- * Examine the Tx buffer to see if there is any more data to be transmitted.\r
- * \r
- * If there is data to be transmitted then send the next segment. A segment\r
- * can have a maximum of 8 bytes (this is defined as the maximum for the end\r
- * point by the descriptor). The final segment may be less than 8 bytes if\r
- * the total data length was not an exact multiple of 8.\r
- */\r
-static void prvSendNextSegment( void );\r
-\r
-/*\r
- * A stall condition is forced each time the host makes a request that is not\r
- * supported by this minimal implementation.\r
- * \r
- * A stall is forced by setting the appropriate bit in the end points control\r
- * and status register. \r
- */\r
-static void prvSendStall( void );\r
-\r
-/*\r
- * A NULL (or zero length packet) is transmitted in acknowledge the reception \r
- * of certain events from the host.\r
- */\r
-static void prvUSBTransmitNull( void );\r
-\r
-/* \r
- * When the host requests a descriptor this function is called to determine \r
- * which descriptor is being requested and start its transmission.\r
- */\r
-static void prvGetStandardInterfaceDescriptor( xUSB_REQUEST *pxRequest );\r
-\r
-/*\r
- * Transmit movement and clicks on the EK joystick as mouse inputs.\r
- */\r
-static void prvTransmitSampleValues( void );\r
-\r
-/*\r
- * The created task to handle the USB demo functionality. \r
- */\r
-static void vUSBDemoTask( void *pvParameters );\r
-\r
-/*\r
- * Simple algorithm to ramp up the mouse cursor speed to make it easier to\r
- * use.\r
- */\r
-static void prvControlCursorSpeed( signed char *cVal, unsigned long ulInput, unsigned long ulSwitch1, unsigned long ulSwitch2 );\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- - DESCRIPTOR DEFINITIONS -\r
-*/\r
-\r
-/* String descriptors used during the enumeration process.\r
-These take the form:\r
-\r
-{\r
- Length of descriptor,\r
- Descriptor type,\r
- Data\r
-}\r
-*/\r
-const char pxLanguageStringDescriptor[] =\r
-{\r
- 4,\r
- usbDESCRIPTOR_TYPE_STRING,\r
- 0x09, 0x04\r
-};\r
-\r
-const char pxManufacturerStringDescriptor[] = \r
-{\r
- 18,\r
- usbDESCRIPTOR_TYPE_STRING,\r
-\r
- 'F', 0x00,\r
- 'r', 0x00,\r
- 'e', 0x00,\r
- 'e', 0x00,\r
- 'R', 0x00,\r
- 'T', 0x00,\r
- 'O', 0x00,\r
- 'S', 0x00 \r
-};\r
-\r
-const char pxProductStringDescriptor[] = \r
-{\r
- 38,\r
- usbDESCRIPTOR_TYPE_STRING,\r
-\r
- 'F', 0x00,\r
- 'r', 0x00,\r
- 'e', 0x00,\r
- 'e', 0x00,\r
- 'R', 0x00,\r
- 'T', 0x00,\r
- 'O', 0x00,\r
- 'S', 0x00,\r
- '.', 0x00,\r
- 'o', 0x00,\r
- 'r', 0x00,\r
- 'g', 0x00,\r
- ' ', 0x00,\r
- 'M', 0x00,\r
- 'o', 0x00,\r
- 'u', 0x00,\r
- 's', 0x00,\r
- 'e', 0x00\r
-};\r
-\r
-const char pxConfigurationStringDescriptor[] = \r
-{\r
- 38,\r
- usbDESCRIPTOR_TYPE_STRING,\r
-\r
- 'C', 0x00,\r
- 'o', 0x00,\r
- 'n', 0x00,\r
- 'f', 0x00,\r
- 'i', 0x00,\r
- 'g', 0x00,\r
- 'u', 0x00,\r
- 'r', 0x00,\r
- 'a', 0x00,\r
- 't', 0x00,\r
- 'i', 0x00,\r
- 'o', 0x00,\r
- 'n', 0x00,\r
- ' ', 0x00,\r
- 'N', 0x00,\r
- 'a', 0x00,\r
- 'm', 0x00,\r
- 'e', 0x00\r
-};\r
-\r
-const char pxInterfaceStringDescriptor[] = \r
-{\r
- 30,\r
- usbDESCRIPTOR_TYPE_STRING,\r
-\r
- 'I', 0x00,\r
- 'n', 0x00,\r
- 't', 0x00,\r
- 'e', 0x00,\r
- 'r', 0x00,\r
- 'f', 0x00,\r
- 'a', 0x00,\r
- 'c', 0x00,\r
- 'e', 0x00,\r
- ' ', 0x00,\r
- 'N', 0x00,\r
- 'a', 0x00,\r
- 'm', 0x00,\r
- 'e', 0x00\r
-};\r
-\r
-/* Enumeration descriptors. */\r
-const char pxReportDescriptor[] =\r
-{\r
- 0x05, 0x01, /* USAGE_PAGE (Generic Desktop) */\r
- 0x09, 0x02, /* USAGE (Mouse) */\r
- 0xa1, 0x01, /* COLLECTION (Application) */\r
- 0x09, 0x01, /* USAGE (Pointer) */\r
- 0xa1, 0x00, /* COLLECTION (Physical) */\r
- 0x95, 0x03, /* REPORT_COUNT (3) */\r
- 0x75, 0x01, /* REPORT_SIZE (1) */\r
- 0x05, 0x09, /* USAGE_PAGE (Button) */\r
- 0x19, 0x01, /* USAGE_MINIMUM (Button 1) */\r
- 0x29, 0x03, /* USAGE_MAXIMUM (Button 3) */\r
- 0x15, 0x00, /* LOGICAL_MINIMUM (0) */\r
- 0x25, 0x01, /* LOGICAL_MAXIMUM (1) */\r
- 0x81, 0x02, /* INPUT (Data,Var,Abs) */\r
- 0x95, 0x01, /* REPORT_COUNT (1) */\r
- 0x75, 0x05, /* REPORT_SIZE (5) */\r
- 0x81, 0x01, /* INPUT (Cnst,Ary,Abs) */\r
- 0x75, 0x08, /* REPORT_SIZE (8) */\r
- 0x95, 0x02, /* REPORT_COUNT (2) */\r
- 0x05, 0x01, /* USAGE_PAGE (Generic Desktop) */\r
- 0x09, 0x30, /* USAGE (X) */\r
- 0x09, 0x31, /* USAGE (Y) */\r
- 0x15, 0x81, /* LOGICAL_MINIMUM (-127) */\r
- 0x25, 0x7f, /* LOGICAL_MAXIMUM (127) */\r
- 0x81, 0x06, /* INPUT (Data,Var,Rel) */\r
- 0xc0, /* END_COLLECTION */\r
- 0xc0 /* END_COLLECTION */\r
-};\r
-\r
-\r
-\r
-const char pxDeviceDescriptor[] = \r
-{\r
- /* Device descriptor */\r
- 0x12, /* bLength */\r
- 0x01, /* bDescriptorType */\r
- 0x10, 0x01, /* bcdUSBL */\r
- usbDEVICE_CLASS_VENDOR_SPECIFIC, /* bDeviceClass: */\r
- 0x00, /* bDeviceSubclass: */\r
- 0x00, /* bDeviceProtocol: */\r
- 0x08, /* bMaxPacketSize0 */\r
- 0xFF, 0xFF, /* idVendorL */\r
- 0x02, 0x00, /* idProductL */\r
- 0x00, 0x01, /* bcdDeviceL */\r
- usbMANUFACTURER_STRING, /* iManufacturer */\r
- usbPRODUCT_STRING, /* iProduct */\r
- 0x00, /* SerialNumber */\r
- 0x01 /* bNumConfigs */\r
-};\r
-\r
-\r
-const char pxConfigDescriptor[] = {\r
- /* Configuration 1 descriptor */\r
- 0x09, /* CbLength */\r
- 0x02, /* CbDescriptorType */\r
- 0x22, 0x00, /* CwTotalLength 2 EP + Control */\r
- 0x01, /* CbNumInterfaces */\r
- 0x01, /* CbConfigurationValue */\r
- usbCONFIGURATION_STRING,/* CiConfiguration */\r
- usbBUS_POWERED, /* CbmAttributes Bus powered + Remote Wakeup*/\r
- 0x32, /* CMaxPower: 100mA */\r
-\r
- /* Mouse Interface Descriptor Requirement */\r
- 0x09, /* bLength */\r
- 0x04, /* bDescriptorType */\r
- 0x00, /* bInterfaceNumber */\r
- 0x00, /* bAlternateSetting */\r
- 0x01, /* bNumEndpoints */\r
- 0x03, /* bInterfaceClass: HID code */\r
- 0x01, /* bInterfaceSubclass boot */\r
- 0x02, /* bInterfaceProtocol mouse boot */\r
- usbINTERFACE_STRING,/* iInterface */\r
-\r
- /* HID Descriptor */\r
- 0x09, /* bLength */\r
- 0x21, /* bDescriptor type: HID Descriptor Type */\r
- 0x00, 0x01, /* bcdHID */\r
- 0x00, /* bCountryCode */\r
- 0x01, /* bNumDescriptors */\r
- usbHID_REPORT_DESCRIPTOR, /* bDescriptorType */\r
- sizeof( pxReportDescriptor ), 0x00, /* wItemLength */\r
-\r
- /* Endpoint 1 descriptor */\r
- 0x07, /* bLength */\r
- 0x05, /* bDescriptorType */\r
- 0x81, /* bEndpointAddress, Endpoint 01 - IN */\r
- 0x03, /* bmAttributes INT */\r
- 0x08, 0x00, /* wMaxPacketSize: 8? */\r
- 0x0A /* bInterval */\r
-};\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* File scope state variables. */\r
-static unsigned char ucUSBConfig = ( unsigned char ) 0;\r
-static unsigned long ulReceivedAddress = ( unsigned long ) 0;\r
-static eDRIVER_STATE eDriverState = eNOTHING;\r
-\r
-/* Structure used to control the characters being sent to the host. */\r
-static xTX_MESSAGE pxCharsForTx;\r
-\r
-/* Queue used to pass messages between the ISR and the task. */\r
-QueueHandle_t xUSBInterruptQueue; \r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void vStartUSBTask( unsigned portBASE_TYPE uxPriority )\r
-{\r
- /* Create the queue used to communicate between the USB ISR and task. */\r
- xUSBInterruptQueue = xQueueCreate( usbQUEUE_LENGTH + 1, sizeof( xISRStatus * ) );\r
-\r
- /* Create the task itself. */\r
- xTaskCreate( vUSBDemoTask, "USB", configMINIMAL_STACK_SIZE, NULL, uxPriority, NULL );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void vUSBDemoTask( void *pvParameters )\r
-{\r
-xISRStatus *pxMessage;\r
-\r
- /* The parameters are not used in this task. */\r
- ( void ) pvParameters;\r
-\r
- /* Init USB device */\r
- portENTER_CRITICAL();\r
- vInitUSBInterface();\r
- portEXIT_CRITICAL();\r
-\r
- /* Process interrupts as they arrive. The ISR takes a snapshot of the \r
- interrupt status then posts the information on this queue for processing\r
- at the task level. This simple demo implementation only processes\r
- a few interrupt sources. */\r
- for( ;; )\r
- {\r
- if( xQueueReceive( xUSBInterruptQueue, &pxMessage, usbSHORT_DELAY ) )\r
- {\r
- if( pxMessage->ulISR & AT91C_UDP_EPINT0 )\r
- {\r
- /* Process end point 0 interrupt. */\r
- prvProcessEndPoint0Interrupt( pxMessage );\r
- }\r
-\r
- if( pxMessage->ulISR & AT91C_UDP_ENDBUSRES )\r
- {\r
- /* Process an end of bus reset interrupt. */\r
- prvResetEndPoints(); \r
- }\r
- }\r
- else\r
- {\r
- /* The ISR did not post any data for us to process on the queue, so\r
- just generate and send some sample data. */\r
- if( eDriverState == eREADY_TO_SEND )\r
- {\r
- prvTransmitSampleValues();\r
- }\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvControlCursorSpeed( signed char *cVal, unsigned long ulInput, unsigned long ulSwitch1, unsigned long ulSwitch2 )\r
-{\r
-const char cSpeed = 20;\r
-\r
- if( !( ulInput & ulSwitch1 ) )\r
- {\r
- /* We are going in the decreasing y direction. */\r
- if( *cVal > 0 )\r
- {\r
- /* We have changed direction since last time so start from\r
- 0 again. */\r
- *cVal = 0;\r
- }\r
- \r
- if( *cVal > -cSpeed )\r
- {\r
- /* Ramp y down to the max speed. */\r
- (*cVal)--;\r
- }\r
- }\r
- else if( !( ulInput & ulSwitch2 ) )\r
- {\r
- /* We are going in the increasing y direction. */\r
- if( *cVal < 0 )\r
- {\r
- /* We have changed direction since last time, so start from\r
- 0 again. */\r
- *cVal = 0;\r
- }\r
- \r
- if( *cVal < cSpeed )\r
- {\r
- /* Ramp y up to the max speed again. */\r
- (*cVal)++;\r
- }\r
- }\r
- else\r
- {\r
- *cVal = 0;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvTransmitSampleValues( void )\r
-{\r
-/* Variables to hold dummy x, y and z joystick axis data. */\r
-static signed char x = 0, y = 0, z = 0;\r
-unsigned long ulStatus;\r
-\r
- ulStatus = AT91C_BASE_PIOA->PIO_PDSR;\r
-\r
- prvControlCursorSpeed( &y, ulStatus, ( unsigned long ) usbSW1, ( unsigned long ) usbSW2 );\r
- prvControlCursorSpeed( &x, ulStatus, ( unsigned long ) usbSW3, ( unsigned long ) usbSW4 );\r
- \r
- /* Just make the z axis go up and down. */\r
- z = ( ( ulStatus & usbSW_CLICK ) == 0 );\r
-\r
- /* Can we place data in the fifo? */\r
- if( !( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] & AT91C_UDP_TXPKTRDY ) )\r
- {\r
- /* Write our sample data to the fifo. */\r
- AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_1 ] = z;\r
- AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_1 ] = x;\r
- AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_1 ] = y;\r
- \r
- /* Send the data. */\r
- portENTER_CRITICAL();\r
- {\r
- ulStatus = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ];\r
- usbCSR_SET_BIT( &ulStatus, ( AT91C_UDP_TXPKTRDY ) );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] = ulStatus;\r
- }\r
- portEXIT_CRITICAL();\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvUSBTransmitNull( void )\r
-{\r
-unsigned long ulStatus;\r
-\r
- /* Wait until the FIFO is free - even though we are not going to use it.\r
- THERE IS NO TIMEOUT HERE! */\r
- while( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_TXPKTRDY )\r
- {\r
- vTaskDelay( usbSHORTEST_DELAY );\r
- }\r
-\r
- portENTER_CRITICAL();\r
- {\r
- /* Set the length of data to send to equal the index of the next byte\r
- to send. This will prevent the ACK to this NULL packet causing any\r
- further data transmissions. */\r
- pxCharsForTx.ulTotalDataLength = pxCharsForTx.ulNextCharIndex;\r
-\r
- /* Set the TXPKTRDY bit to cause a transmission with no data. */\r
- ulStatus = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];\r
- usbCSR_SET_BIT( &ulStatus, ( AT91C_UDP_TXPKTRDY ) );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulStatus;\r
- }\r
- portEXIT_CRITICAL();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSendStall( void )\r
-{\r
-unsigned long ulStatus;\r
-\r
- portENTER_CRITICAL();\r
- {\r
- /* Force a stall by simply setting the FORCESTALL bit in the CSR. */\r
- ulStatus = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];\r
- usbCSR_SET_BIT( &ulStatus, AT91C_UDP_FORCESTALL );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulStatus;\r
- }\r
- portEXIT_CRITICAL();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvResetEndPoints( void )\r
-{\r
-unsigned long ulTemp;\r
-\r
- eDriverState = eJUST_RESET;\r
-\r
- /* Reset all the end points. */\r
- AT91C_BASE_UDP->UDP_RSTEP = usbEND_POINT_RESET_MASK;\r
- AT91C_BASE_UDP->UDP_RSTEP = ( unsigned long ) 0x00;\r
-\r
- /* Enable data to be sent and received. */\r
- AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN;\r
-\r
- /* Repair the configuration end point. */\r
- portENTER_CRITICAL();\r
- {\r
- ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];\r
- usbCSR_SET_BIT( &ulTemp, ( ( unsigned long ) ( AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL ) ) );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;\r
- AT91C_BASE_UDP->UDP_IER = AT91C_UDP_EPINT0;\r
- }\r
- portEXIT_CRITICAL();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvProcessEndPoint0Interrupt( xISRStatus *pxMessage )\r
-{\r
- if( pxMessage->ulCSR0 & AT91C_UDP_RX_DATA_BK0 )\r
- { \r
- /* We only expect to receive zero length data here as ACK's. \r
- Set the data pointer to the end of the current Tx packet to\r
- ensure we don't send out any more data. */ \r
- pxCharsForTx.ulNextCharIndex = pxCharsForTx.ulTotalDataLength;\r
- }\r
-\r
- if( pxMessage->ulCSR0 & AT91C_UDP_TXCOMP )\r
- {\r
- /* We received a TX complete interrupt. What we do depends on\r
- what we sent to get this interrupt. */\r
-\r
- if( eDriverState == eJUST_GOT_CONFIG )\r
- {\r
- /* We sent an acknowledgement of a SET_CONFIG request. We\r
- are now at the end of the enumeration. */\r
- AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_CONFG;\r
-\r
- /* Read the end point for data transfer. */\r
- portENTER_CRITICAL();\r
- {\r
- unsigned long ulTemp;\r
-\r
- ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ]; \r
- usbCSR_SET_BIT( &ulTemp, AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_INT_IN );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] = ulTemp; \r
- AT91C_BASE_UDP->UDP_IER = AT91C_UDP_EPINT1;\r
- }\r
- portEXIT_CRITICAL();\r
-\r
- eDriverState = eREADY_TO_SEND;\r
- } \r
- else if( eDriverState == eJUST_GOT_ADDRESS )\r
- {\r
- /* We sent an acknowledgement of a SET_ADDRESS request. Move\r
- to the addressed state. */\r
- if( ulReceivedAddress != ( unsigned long ) 0 )\r
- { \r
- AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;\r
- }\r
- else\r
- {\r
- AT91C_BASE_UDP->UDP_GLBSTATE = 0;\r
- } \r
-\r
- AT91C_BASE_UDP->UDP_FADDR = ( AT91C_UDP_FEN | ulReceivedAddress ); \r
- eDriverState = eNOTHING;\r
- }\r
- else\r
- { \r
- /* The TXCOMP was not for any special type of transmission. See\r
- if there is any more data to send. */\r
- prvSendNextSegment();\r
- }\r
- }\r
-\r
- if( pxMessage->ulCSR0 & AT91C_UDP_RXSETUP )\r
- {\r
- xUSB_REQUEST xRequest;\r
- unsigned char ucRequest;\r
- unsigned long ulRxBytes;\r
-\r
- /* A data packet is available. */ \r
- ulRxBytes = pxMessage->ulCSR0 >> 16;\r
- ulRxBytes &= usbRX_COUNT_MASK;\r
-\r
- if( ulRxBytes >= usbEXPECTED_NUMBER_OF_BYTES )\r
- {\r
- /* Create an xUSB_REQUEST variable from the raw bytes array. */\r
-\r
- xRequest.ucReqType = pxMessage->ucFifoData[ usbREQUEST_TYPE_INDEX ];\r
- xRequest.ucRequest = pxMessage->ucFifoData[ usbREQUEST_INDEX ];\r
-\r
- /* NOT PORTABLE CODE! */\r
- xRequest.usValue = pxMessage->ucFifoData[ usbVALUE_HIGH_BYTE ];\r
- xRequest.usValue <<= 8;\r
- xRequest.usValue |= pxMessage->ucFifoData[ usbVALUE_LOW_BYTE ];\r
- \r
- xRequest.usIndex = pxMessage->ucFifoData[ usbINDEX_HIGH_BYTE ];\r
- xRequest.usIndex <<= 8;\r
- xRequest.usIndex |= pxMessage->ucFifoData[ usbINDEX_LOW_BYTE ];\r
- \r
- xRequest.usLength = pxMessage->ucFifoData[ usbLENGTH_HIGH_BYTE ];\r
- xRequest.usLength <<= 8;\r
- xRequest.usLength |= pxMessage->ucFifoData[ usbLENGTH_LOW_BYTE ];\r
- \r
- /* Manipulate the ucRequestType and the ucRequest parameters to \r
- generate a zero based request selection. This is just done to \r
- break up the requests into subsections for clarity. The \r
- alternative would be to have more huge switch statement that would\r
- be difficult to optimise. */\r
- ucRequest = ( ( xRequest.ucReqType & 0x60 ) >> 3 );\r
- ucRequest |= ( xRequest.ucReqType & 0x03 );\r
-\r
- switch( ucRequest )\r
- {\r
- case usbSTANDARD_DEVICE_REQUEST: \r
- /* Standard Device request */\r
- prvHandleStandardDeviceRequest( &xRequest );\r
- break;\r
- \r
- case usbSTANDARD_INTERFACE_REQUEST: \r
- /* Standard Interface request */\r
- prvHandleStandardInterfaceRequest( &xRequest );\r
- break;\r
- \r
- case usbSTANDARD_END_POINT_REQUEST: \r
- /* Standard Endpoint request */\r
- prvHandleStandardEndPointRequest( &xRequest );\r
- break;\r
- \r
- case usbCLASS_INTERFACE_REQUEST: \r
- /* Class Interface request */\r
- prvHandleClassInterfaceRequest( &xRequest );\r
- break;\r
- \r
- default: /* This is not something we want to respond to. */\r
- prvSendStall(); \r
- }\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvGetStandardDeviceDescriptor( xUSB_REQUEST *pxRequest )\r
-{\r
- /* The type is in the high byte. Return whatever has been requested. */\r
- switch( ( pxRequest->usValue & 0xff00 ) >> 8 )\r
- {\r
- case usbDESCRIPTOR_TYPE_DEVICE:\r
- prvSendControlData( ( unsigned char * ) &pxDeviceDescriptor, pxRequest->usLength, sizeof( pxDeviceDescriptor ), pdTRUE );\r
- break;\r
- \r
- case usbDESCRIPTOR_TYPE_CONFIGURATION:\r
- prvSendControlData( ( unsigned char * ) &( pxConfigDescriptor ), pxRequest->usLength, sizeof( pxConfigDescriptor ), pdTRUE );\r
- break;\r
-\r
- case usbDESCRIPTOR_TYPE_STRING:\r
-\r
- /* The index to the string descriptor is the lower byte. */\r
- switch( pxRequest->usValue & 0xff )\r
- { \r
- case usbLANGUAGE_STRING:\r
- prvSendControlData( ( unsigned char * ) &pxLanguageStringDescriptor, pxRequest->usLength, sizeof(pxLanguageStringDescriptor), pdTRUE );\r
- break;\r
-\r
- case usbMANUFACTURER_STRING:\r
- prvSendControlData( ( unsigned char * ) &pxManufacturerStringDescriptor, pxRequest->usLength, sizeof( pxManufacturerStringDescriptor ), pdTRUE );\r
- break;\r
-\r
- case usbPRODUCT_STRING:\r
- prvSendControlData( ( unsigned char * ) &pxProductStringDescriptor, pxRequest->usLength, sizeof( pxProductStringDescriptor ), pdTRUE );\r
- break;\r
-\r
- case usbCONFIGURATION_STRING:\r
- prvSendControlData( ( unsigned char * ) &pxConfigurationStringDescriptor, pxRequest->usLength, sizeof( pxConfigurationStringDescriptor ), pdTRUE );\r
- break;\r
-\r
- case usbINTERFACE_STRING:\r
- prvSendControlData( ( unsigned char * ) &pxInterfaceStringDescriptor, pxRequest->usLength, sizeof( pxInterfaceStringDescriptor ), pdTRUE );\r
- break;\r
-\r
- default:\r
- /* Don't know what this string is. */\r
- prvSendStall();\r
- break;\r
- }\r
-\r
- break;\r
-\r
- default:\r
- /* We are not responding to anything else. */\r
- prvSendStall();\r
- break;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvHandleStandardDeviceRequest( xUSB_REQUEST *pxRequest )\r
-{\r
-unsigned short usStatus = 0;\r
-\r
- switch( pxRequest->ucRequest )\r
- {\r
- case usbGET_STATUS_REQUEST:\r
- /* Just send two byte dummy status. */\r
- prvSendControlData( ( unsigned char * ) &usStatus, sizeof( usStatus ), sizeof( usStatus ), pdFALSE );\r
- break;\r
-\r
- case usbGET_DESCRIPTOR_REQUEST:\r
- /* Send device descriptor */\r
- prvGetStandardDeviceDescriptor( pxRequest );\r
- break;\r
-\r
- case usbGET_CONFIGURATION_REQUEST:\r
- /* Send selected device configuration */\r
- prvSendControlData( ( unsigned char * ) &ucUSBConfig, sizeof( ucUSBConfig ), sizeof( ucUSBConfig ), pdFALSE );\r
- break;\r
-\r
- case usbSET_FEATURE_REQUEST:\r
- prvUSBTransmitNull();\r
- break;\r
-\r
- case usbSET_ADDRESS_REQUEST:\r
- \r
- /* Acknowledge the SET_ADDRESS, but (according to the manual) we\r
- cannot actually move to the addressed state until we get a TXCOMP\r
- interrupt from this NULL packet. Therefore we just remember the\r
- address and set our state so we know we have received the address. */\r
- prvUSBTransmitNull(); \r
- eDriverState = eJUST_GOT_ADDRESS; \r
- ulReceivedAddress = ( unsigned long ) pxRequest->usValue;\r
- break;\r
-\r
- case usbSET_CONFIGURATION_REQUEST:\r
-\r
- /* Acknowledge the SET_CONFIGURATION, but (according to the manual) \r
- we cannot actually move to the configured state until we get a \r
- TXCOMP interrupt from this NULL packet. Therefore we just remember the\r
- config and set our state so we know we have received the go ahead. */ \r
- ucUSBConfig = ( unsigned char ) ( pxRequest->usValue & 0xff );\r
- eDriverState = eJUST_GOT_CONFIG;\r
- prvUSBTransmitNull();\r
- break;\r
-\r
- default:\r
-\r
- /* We don't answer to anything else. */\r
- prvSendStall();\r
- break;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvHandleClassInterfaceRequest( xUSB_REQUEST *pxRequest )\r
-{\r
- switch( pxRequest->ucRequest )\r
- {\r
- case usbSET_IDLE_REQUEST:\r
- prvUSBTransmitNull();\r
- break;\r
-\r
- /* This minimal implementation ignores these. */\r
- case usbGET_REPORT_REQUEST:\r
- case usbGET_IDLE_REQUEST:\r
- case usbGET_PROTOCOL_REQUEST:\r
- case usbSET_REPORT_REQUEST:\r
- case usbSET_PROTOCOL_REQUEST: \r
- default:\r
-\r
- prvSendStall();\r
- break;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvGetStandardInterfaceDescriptor( xUSB_REQUEST *pxRequest )\r
-{\r
- switch( ( pxRequest->usValue & ( unsigned short ) 0xff00 ) >> 8 )\r
- {\r
- case usbHID_REPORT_DESCRIPTOR:\r
- prvSendControlData( ( unsigned char * ) pxReportDescriptor, pxRequest->usLength, sizeof( pxReportDescriptor ), pdTRUE );\r
- break;\r
-\r
- default:\r
-\r
- /* Don't expect to send any others. */\r
- prvSendStall();\r
- break;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvHandleStandardInterfaceRequest( xUSB_REQUEST *pxRequest )\r
-{\r
-unsigned short usStatus = 0;\r
-\r
- switch( pxRequest->ucRequest )\r
- {\r
- case usbGET_STATUS_REQUEST:\r
- /* Send dummy 2 bytes. */\r
- prvSendControlData( ( unsigned char * ) &usStatus, sizeof( usStatus ), sizeof( usStatus ), pdFALSE );\r
- break;\r
-\r
- case usbGET_DESCRIPTOR_REQUEST:\r
- prvGetStandardInterfaceDescriptor( pxRequest ); \r
- break;\r
-\r
- /* This minimal implementation does not respond to these. */\r
- case usbGET_INTERFACE_REQUEST:\r
- case usbSET_FEATURE_REQUEST:\r
- case usbSET_INTERFACE_REQUEST: \r
-\r
- default:\r
- prvSendStall();\r
- break;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvHandleStandardEndPointRequest( xUSB_REQUEST *pxRequest )\r
-{\r
- switch( pxRequest->ucRequest )\r
- {\r
- /* This minimal implementation does not expect to respond to these. */\r
- case usbGET_STATUS_REQUEST:\r
- case usbCLEAR_FEATURE_REQUEST: \r
- case usbSET_FEATURE_REQUEST:\r
-\r
- default: \r
- prvSendStall();\r
- break;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void vInitUSBInterface( void )\r
-{\r
-volatile unsigned long ulTemp;\r
-\r
- /* Initialise a few state variables. */\r
- pxCharsForTx.ulNextCharIndex = ( unsigned long ) 0;\r
- ucUSBConfig = ( unsigned char ) 0;\r
- eDriverState = eNOTHING;\r
-\r
- /* HARDWARE SETUP */\r
-\r
- /* Set the PLL USB Divider */\r
- AT91C_BASE_CKGR->CKGR_PLLR |= AT91C_CKGR_USBDIV_1;\r
-\r
- /* Enables the 48MHz USB clock UDPCK and System Peripheral USB Clock. */\r
- AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP;\r
- AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDP);\r
-\r
- /* Setup the PIO for the USB pull up resistor. */\r
- AT91C_BASE_PIOA->PIO_PER = AT91C_PIO_PA16;\r
- AT91C_BASE_PIOA->PIO_OER = AT91C_PIO_PA16;\r
- \r
-\r
- /* Start without the pullup - this will get set at the end of this \r
- function. */\r
- AT91C_BASE_PIOA->PIO_SODR = AT91C_PIO_PA16;\r
-\r
- /* When using the USB debugger the peripheral registers do not always get\r
- set to the correct default values. To make sure set the relevant registers\r
- manually here. */\r
- AT91C_BASE_UDP->UDP_IDR = ( unsigned long ) 0xffffffff;\r
- AT91C_BASE_UDP->UDP_ICR = ( unsigned long ) 0xffffffff;\r
- AT91C_BASE_UDP->UDP_CSR[ 0 ] = ( unsigned long ) 0x00;\r
- AT91C_BASE_UDP->UDP_CSR[ 1 ] = ( unsigned long ) 0x00;\r
- AT91C_BASE_UDP->UDP_GLBSTATE = 0;\r
- AT91C_BASE_UDP->UDP_FADDR = 0;\r
-\r
- /* Enable the transceiver. */\r
- AT91C_UDP_TRANSCEIVER_ENABLE = 0;\r
-\r
- /* Enable the USB interrupts - other interrupts get enabled as the \r
- enumeration process progresses. */\r
- AT91F_AIC_ConfigureIt( AT91C_ID_UDP, usbINTERRUPT_PRIORITY, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, ( void (*)( void ) ) vUSB_ISR_Wrapper );\r
- AT91C_BASE_AIC->AIC_IECR = 0x1 << AT91C_ID_UDP;\r
-\r
- /* Wait a short while before making our presence known. */\r
- vTaskDelay( usbINIT_DELAY );\r
- AT91C_BASE_PIOA->PIO_CODR = AT91C_PIO_PA16;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSendControlData( unsigned char *pucData, unsigned short usRequestedLength, unsigned long ulLengthToSend, long lSendingDescriptor )\r
-{\r
- if( ( ( unsigned long ) usRequestedLength < ulLengthToSend ) )\r
- {\r
- /* Cap the data length to that requested. */\r
- ulLengthToSend = ( unsigned short ) usRequestedLength;\r
- }\r
- else if( ( ulLengthToSend < ( unsigned long ) usRequestedLength ) && lSendingDescriptor )\r
- {\r
- /* We are sending a descriptor. If the descriptor is an exact \r
- multiple of the FIFO length then it will have to be terminated\r
- with a NULL packet. Set the state to indicate this if\r
- necessary. */\r
- if( ( ulLengthToSend % usbFIFO_LENGTH ) == 0 )\r
- {\r
- eDriverState = eSENDING_EVEN_DESCRIPTOR;\r
- }\r
- }\r
-\r
- /* Here we assume that the previous message has been sent. THERE IS NO\r
- BUFFER OVERFLOW PROTECTION HERE.\r
-\r
- Copy the data to send into the buffer as we cannot send it all at once\r
- (if it is greater than 8 bytes in length). */\r
- memcpy( pxCharsForTx.ucTxBuffer, pucData, ulLengthToSend );\r
-\r
- /* Reinitialise the buffer index so we start sending from the start of \r
- the data. */\r
- pxCharsForTx.ulTotalDataLength = ulLengthToSend;\r
- pxCharsForTx.ulNextCharIndex = ( unsigned long ) 0;\r
-\r
- /* Send the first 8 bytes now. The rest will get sent in response to \r
- TXCOMP interrupts. */\r
- prvSendNextSegment();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSendNextSegment( void )\r
-{\r
-volatile unsigned long ulNextLength, ulStatus, ulLengthLeftToSend;\r
-\r
- /* Is there any data to send? */\r
- if( pxCharsForTx.ulTotalDataLength > pxCharsForTx.ulNextCharIndex )\r
- {\r
- ulLengthLeftToSend = pxCharsForTx.ulTotalDataLength - pxCharsForTx.ulNextCharIndex;\r
- \r
- /* We can only send 8 bytes to the fifo at a time. */\r
- if( ulLengthLeftToSend > usbFIFO_LENGTH )\r
- {\r
- ulNextLength = usbFIFO_LENGTH;\r
- }\r
- else\r
- {\r
- ulNextLength = ulLengthLeftToSend;\r
- }\r
-\r
- /* Wait until we can place data in the fifo. THERE IS NO TIMEOUT\r
- HERE! */\r
- while( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_TXPKTRDY )\r
- {\r
- vTaskDelay( usbSHORTEST_DELAY );\r
- }\r
-\r
- /* Write the data to the FIFO. */\r
- while( ulNextLength > ( unsigned long ) 0 )\r
- {\r
- AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ] = pxCharsForTx.ucTxBuffer[ pxCharsForTx.ulNextCharIndex ];\r
- \r
- ulNextLength--;\r
- pxCharsForTx.ulNextCharIndex++;\r
- }\r
- \r
- /* Start the transmission. */\r
- portENTER_CRITICAL();\r
- {\r
- ulStatus = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];\r
- usbCSR_SET_BIT( &ulStatus, ( ( unsigned long ) 0x10 ) );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulStatus;\r
- }\r
- portEXIT_CRITICAL();\r
- }\r
- else\r
- {\r
- /* There is no data to send. If we were sending a descriptor and the \r
- descriptor was an exact multiple of the max packet size then we need\r
- to send a null to terminate the transmission. */\r
- if( eDriverState == eSENDING_EVEN_DESCRIPTOR )\r
- {\r
- prvUSBTransmitNull();\r
- eDriverState = eNOTHING;\r
- }\r
- }\r
-}\r
-\r
-\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef USB_DEMO_H\r
-#define USB_DEMO_H\r
-\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-#define usbQUEUE_LENGTH ( 0x3 ) /* Must have all bits set! */\r
-#define usbEND_POINT_0 ( 0 )\r
-#define usbEND_POINT_1 ( 1 )\r
-#define usbRX_COUNT_MASK ( ( unsigned long ) 0x7ff )\r
-#define AT91C_UDP_STALLSENT AT91C_UDP_ISOERROR\r
-\r
-/* Structure used to take a snapshot of the USB status from within the ISR. */\r
-typedef struct X_ISR_STATUS\r
-{\r
- unsigned long ulISR;\r
- unsigned long ulCSR0;\r
- unsigned char ucFifoData[ 8 ];\r
-} xISRStatus;\r
-\r
-/* Macros to manipulate the control and status registers. These registers \r
-cannot be accessed using a direct read modify write operation outside of the \r
-ISR as some bits are left unchanged by writing with a 0, and some are left \r
-unchanged by writing with a 1. */\r
-\r
-#define usbCSR_SET_BIT( pulValueNow, ulBit ) \\r
-{ \\r
- /* Set TXCOMP, RX_DATA_BK0, RXSETUP, */ \\r
- /* STALLSENT and RX_DATA_BK1 to 1 so the */ \\r
- /* write has no effect. */ \\r
- ( * ( ( unsigned long * ) pulValueNow ) ) |= ( unsigned long ) 0x4f; \\r
- \\r
- /* Clear the FORCE_STALL and TXPKTRDY bits */ \\r
- /* so the write has no effect. */ \\r
- ( * ( ( unsigned long * ) pulValueNow ) ) &= ( unsigned long ) 0xffffffcf; \\r
- \\r
- /* Set whichever bit we want set. */ \\r
- ( * ( ( unsigned long * ) pulValueNow ) ) |= ( ulBit ); \\r
-}\r
-\r
-/*\r
- * Creates the queue used to communicate between the USB task and the USB ISR, then\r
- * createst the task that manages the USB peripheral.\r
- */\r
-void vStartUSBTask( unsigned portBASE_TYPE uxPriority );\r
-\r
-#endif\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "queue.h"\r
-\r
-/* Demo app includes. */\r
-#include "USBSample.h"\r
-\r
-#define usbINT_CLEAR_MASK (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )\r
-\r
-#define usbCSR_CLEAR_BIT( pulValueNow, ulBit ) \\r
-{ \\r
- /* Set TXCOMP, RX_DATA_BK0, RXSETUP, */ \\r
- /* STALLSENT and RX_DATA_BK1 to 1 so the */ \\r
- /* write has no effect. */ \\r
- ( * ( ( unsigned long * ) pulValueNow ) ) |= ( unsigned long ) 0x4f; \\r
- \\r
- /* Clear the FORCE_STALL and TXPKTRDY bits */ \\r
- /* so the write has no effect. */ \\r
- ( * ( ( unsigned long * ) pulValueNow ) ) &= ( unsigned long ) 0xffffffcf; \\r
- \\r
- /* Clear whichever bit we want clear. */ \\r
- ( * ( ( unsigned long * ) pulValueNow ) ) &= ( ~ulBit ); \\r
-}\r
-\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * ISR entry point.\r
- */\r
-\r
-void vUSB_ISR_Wrapper( void ) __attribute__((naked));\r
-\r
-/*\r
- * Actual ISR handler. This must be separate from the entry point as the stack\r
- * is used.\r
- */\r
-void vUSB_ISR_Handler( void ) __attribute__((noinline));\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Array in which the USB interrupt status is passed between the ISR and task. */\r
-static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];\r
-\r
-/* Queue used to pass messages between the ISR and the task. */\r
-extern QueueHandle_t xUSBInterruptQueue; \r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void vUSB_ISR_Handler( void )\r
-{\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; \r
-static volatile unsigned long ulNextMessage = 0;\r
-xISRStatus *pxMessage;\r
-unsigned long ulTemp, ulRxBytes;\r
-\r
- /* To reduce the amount of time spent in this interrupt it would be \r
- possible to defer the majority of this processing to an 'interrupt task',\r
- that is a task that runs at a higher priority than any of the application\r
- tasks. */\r
-\r
- /* Take the next message from the queue. Note that usbQUEUE_LENGTH *must*\r
- be all 1's, as in 0x01, 0x03, 0x07, etc. */\r
- pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );\r
- ulNextMessage++;\r
-\r
- /* Take a snapshot of the current USB state for processing at the task\r
- level. */\r
- pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;\r
- pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];\r
-\r
- /* Clear the interrupts from the ICR register. The bus end interrupt is\r
- cleared separately as it does not appear in the mask register. */\r
- AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;\r
- \r
- /* If there are bytes in the FIFO then we have to retrieve them here. \r
- Ideally this would be done at the task level. However we need to clear the\r
- RXSETUP interrupt before leaving the ISR, and this may cause the data in\r
- the FIFO to be overwritten. Also the DIR bit has to be changed before the\r
- RXSETUP bit is cleared (as per the SAM7 manual). */\r
- ulTemp = pxMessage->ulCSR0;\r
- \r
- /* Are there any bytes in the FIFO? */\r
- ulRxBytes = ulTemp >> 16;\r
- ulRxBytes &= usbRX_COUNT_MASK;\r
- \r
- /* With this minimal implementation we are only interested in receiving \r
- setup bytes on the control end point. */\r
- if( ( ulRxBytes > 0 ) && ( ulTemp & AT91C_UDP_RXSETUP ) )\r
- {\r
- /* Take off 1 for a zero based index. */\r
- while( ulRxBytes > 0 )\r
- {\r
- ulRxBytes--;\r
- pxMessage->ucFifoData[ ulRxBytes ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ]; \r
- }\r
- \r
- /* The direction must be changed first. */\r
- usbCSR_SET_BIT( &ulTemp, ( AT91C_UDP_DIR ) );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;\r
- }\r
- \r
- /* Must write zero's to TXCOMP, STALLSENT, RXSETUP, and the RX DATA\r
- registers to clear the interrupts in the CSR register. */\r
- usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );\r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;\r
-\r
- /* Also clear the interrupts in the CSR1 register. */\r
- ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ];\r
- usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK ); \r
- AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] = ulTemp;\r
-\r
- /* The message now contains the entire state and optional data from\r
- the USB interrupt. This can now be posted on the Rx queue ready for\r
- processing at the task level. */\r
- xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );\r
-\r
- /* We may want to switch to the USB task, if this message has made\r
- it the highest priority task that is ready to execute. */\r
- if( xHigherPriorityTaskWoken )\r
- {\r
- portYIELD_FROM_ISR();\r
- }\r
-\r
- /* Clear the AIC ready for the next interrupt. */ \r
- AT91C_BASE_AIC->AIC_EOICR = 0;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vUSB_ISR_Wrapper( void )\r
-{\r
- /* Save the context of the interrupted task. */\r
- portSAVE_CONTEXT();\r
-\r
- /* Call the handler itself. This must be a separate function as it uses\r
- the stack. */\r
- __asm volatile ("bl vUSB_ISR_Handler");\r
-\r
- /* Restore the context of the task that is going to \r
- execute next. This might not be the same as the originally \r
- interrupted task.*/\r
- portRESTORE_CONTEXT();\r
-}\r
+++ /dev/null
-MEMORY \r
-{\r
- flash : ORIGIN = 0x00100000, LENGTH = 256K\r
- ram : ORIGIN = 0x00200000, LENGTH = 64K\r
-}\r
-\r
-__stack_end__ = 0x00200000 + 64K - 4;\r
-\r
-SECTIONS \r
-{\r
- . = 0;\r
- startup : { *(.startup)} >flash\r
-\r
- prog : \r
- {\r
- *(.text)\r
- *(.rodata)\r
- *(.rodata*)\r
- *(.glue_7)\r
- *(.glue_7t)\r
- } >flash\r
-\r
- __end_of_text__ = .;\r
- __data_beg_src__ = __end_of_text__;\r
-\r
- .data : \r
- {\r
- __data_beg__ = .; \r
- *(.data)\r
- __data_end__ = .;\r
- } >ram AT>flash\r
-\r
- .bss : \r
- {\r
- __bss_beg__ = .;\r
- *(.bss)\r
- } >ram\r
-\r
- . = ALIGN(4);\r
- .eh_frame :\r
- {\r
- KEEP (*(.eh_frame))\r
- } > ram\r
- \r
- /* Align here to ensure that the .bss section occupies space up to\r
- _end. Align after .bss to ensure correct alignment even if the\r
- .bss section disappears because there are no input sections. */\r
- . = ALIGN(32 / 8);\r
-}\r
- . = ALIGN(32 / 8);\r
- _end = .;\r
- _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;\r
- PROVIDE (end = .);\r
-\r
-\r
+++ /dev/null
- /* Sample initialization file */\r
-\r
- .extern main\r
- .extern exit\r
- .extern AT91F_LowLevelInit\r
- .extern vPortYieldProcessor\r
-\r
- .text\r
- .code 32\r
-\r
-\r
- .align 0\r
-\r
- .extern __stack_end__\r
- .extern __bss_beg__\r
- .extern __bss_end__\r
- .extern __data_beg__\r
- .extern __data_end__\r
- .extern __data+beg_src__\r
-\r
- .global start\r
- .global endless_loop\r
-\r
- /* Stack Sizes */\r
- .set UND_STACK_SIZE, 0x00000004\r
- .set ABT_STACK_SIZE, 0x00000004\r
- .set FIQ_STACK_SIZE, 0x00000004\r
- .set IRQ_STACK_SIZE, 0X00000400\r
- .set SVC_STACK_SIZE, 0x00000400\r
-\r
- /* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */\r
- .set MODE_USR, 0x10 /* User Mode */\r
- .set MODE_FIQ, 0x11 /* FIQ Mode */\r
- .set MODE_IRQ, 0x12 /* IRQ Mode */\r
- .set MODE_SVC, 0x13 /* Supervisor Mode */\r
- .set MODE_ABT, 0x17 /* Abort Mode */\r
- .set MODE_UND, 0x1B /* Undefined Mode */\r
- .set MODE_SYS, 0x1F /* System Mode */\r
-\r
- .equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */\r
- .equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */\r
-\r
-\r
-start:\r
-_start:\r
-_mainCRTStartup:\r
-\r
- /* Setup a stack for each mode - note that this only sets up a usable stack\r
- for system/user, SWI and IRQ modes. Also each mode is setup with\r
- interrupts initially disabled. */\r
- ldr r0, .LC6\r
- msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */\r
- mov sp, r0\r
- sub r0, r0, #UND_STACK_SIZE\r
- msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */\r
- mov sp, r0\r
- sub r0, r0, #ABT_STACK_SIZE\r
- msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */\r
- mov sp, r0\r
- sub r0, r0, #FIQ_STACK_SIZE\r
- msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */\r
- mov sp, r0\r
- sub r0, r0, #IRQ_STACK_SIZE\r
- msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */\r
- mov sp, r0\r
- sub r0, r0, #SVC_STACK_SIZE\r
- msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */\r
- mov sp, r0\r
-\r
- /* We want to start in supervisor mode. Operation will switch to system\r
- mode when the first task starts. */\r
- msr CPSR_c, #MODE_SVC|I_BIT|F_BIT\r
-\r
- bl AT91F_LowLevelInit\r
-\r
- /* Clear BSS. */\r
-\r
- mov a2, #0 /* Fill value */\r
- mov fp, a2 /* Null frame pointer */\r
- mov r7, a2 /* Null frame pointer for Thumb */\r
-\r
- ldr r1, .LC1 /* Start of memory block */\r
- ldr r3, .LC2 /* End of memory block */\r
- subs r3, r3, r1 /* Length of block */\r
- beq .end_clear_loop\r
- mov r2, #0\r
-\r
-.clear_loop:\r
- strb r2, [r1], #1\r
- subs r3, r3, #1\r
- bgt .clear_loop\r
-\r
-.end_clear_loop:\r
-\r
- /* Initialise data. */\r
-\r
- ldr r1, .LC3 /* Start of memory block */\r
- ldr r2, .LC4 /* End of memory block */\r
- ldr r3, .LC5\r
- subs r3, r3, r1 /* Length of block */\r
- beq .end_set_loop\r
-\r
-.set_loop:\r
- ldrb r4, [r2], #1\r
- strb r4, [r1], #1\r
- subs r3, r3, #1\r
- bgt .set_loop\r
-\r
-.end_set_loop:\r
-\r
- mov r0, #0 /* no arguments */\r
- mov r1, #0 /* no argv either */\r
-\r
- ldr lr, =main \r
- bx lr\r
-\r
-endless_loop:\r
- b endless_loop\r
-\r
-\r
- .align 0\r
-\r
- .LC1:\r
- .word __bss_beg__\r
- .LC2:\r
- .word __bss_end__\r
- .LC3:\r
- .word __data_beg__\r
- .LC4:\r
- .word __data_beg_src__\r
- .LC5:\r
- .word __data_end__\r
- .LC6:\r
- .word __stack_end__\r
-\r
-\r
- /* Setup vector table. Note that undf, pabt, dabt, fiq just execute\r
- a null loop. */\r
-\r
-.section .startup,"ax"\r
- .code 32\r
- .align 0\r
-\r
- b _start /* reset - _start */\r
- ldr pc, _undf /* undefined - _undf */\r
- ldr pc, _swi /* SWI - _swi */\r
- ldr pc, _pabt /* program abort - _pabt */\r
- ldr pc, _dabt /* data abort - _dabt */\r
- nop /* reserved */\r
- ldr pc, [pc,#-0xF20] /* IRQ - read the AIC */\r
- ldr pc, _fiq /* FIQ - _fiq */\r
-\r
-_undf: .word __undf /* undefined */\r
-_swi: .word vPortYieldProcessor /* SWI */\r
-_pabt: .word __pabt /* program abort */\r
-_dabt: .word __dabt /* data abort */\r
-_fiq: .word __fiq /* FIQ */\r
-\r
-__undf: b . /* undefined */\r
-__pabt: b . /* program abort */\r
-__dabt: b . /* data abort */\r
-__fiq: b . /* FIQ */\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/*\r
- NOTE : Tasks run in System mode and the scheduler runs in Supervisor mode.\r
- The processor MUST be in supervisor mode when vTaskStartScheduler is\r
- called. The demo applications included in the FreeRTOS.org download switch\r
- to supervisor mode prior to main being called. If you are not using one of\r
- these demo application projects then ensure Supervisor mode is used.\r
-*/\r
-\r
-/*\r
- * This demo includes a (basic) USB mouse driver and a WEB server. It is\r
- * targeted for the AT91SAM7X EK prototyping board which includes a small\r
- * joystick to provide the mouse inputs. The WEB interface provides some basic\r
- * interactivity through the use of a check box to turn on and off an LED.\r
- *\r
- * main() creates the WEB server, USB, and a set of the standard demo tasks\r
- * before starting the scheduler. See the online FreeRTOS.org documentation \r
- * for more information on the standard demo tasks. \r
- *\r
- * LEDs D1 to D3 are controlled by the standard 'flash' tasks - each will \r
- * toggle at a different fixed frequency.\r
- *\r
- * A tick hook function is used to monitor the standard demo tasks - with LED\r
- * D4 being used to indicate the system status. D4 toggling every 5 seconds\r
- * indicates that all the standard demo tasks are executing without error. The\r
- * toggle rate increasing to 500ms is indicative of an error having been found\r
- * in at least one demo task.\r
- *\r
- * See the online documentation page that accompanies this demo for full setup\r
- * and usage information.\r
- */\r
-\r
-/* Standard includes. */\r
-#include <stdlib.h>\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-\r
-/* Demo application includes. */\r
-#include "partest.h"\r
-#include "USBSample.h"\r
-#include "uIP_Task.h"\r
-#include "BlockQ.h"\r
-#include "blocktim.h"\r
-#include "flash.h"\r
-#include "QPeek.h"\r
-#include "dynamic.h"\r
-\r
-/* Priorities for the demo application tasks. */\r
-#define mainUIP_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainUSB_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
-#define mainFLASH_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY ) \r
-\r
-/* The task allocated to the uIP task is large to account for its use of the\r
-sprintf() library function. Use of a cut down printf() library would allow\r
-the stack usage to be greatly reduced. */\r
-#define mainUIP_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 6 )\r
-\r
-/* The LED toggle by the tick hook should an error have been found in a task. */\r
-#define mainERROR_LED ( 3 )\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Configure the processor for use with the Atmel demo board. Setup is minimal\r
- * as the low level init function (called from the startup asm file) takes care\r
- * of most things.\r
- */\r
-static void prvSetupHardware( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Starts all the other tasks, then starts the scheduler.\r
- */\r
-int main( void )\r
-{\r
- /* Setup any hardware that has not already been configured by the low\r
- level init routines. */\r
- prvSetupHardware();\r
-\r
- /* Start the task that handles the TCP/IP and WEB server functionality. */\r
- xTaskCreate( vuIP_Task, "uIP", mainUIP_TASK_STACK_SIZE, NULL, mainUIP_PRIORITY, NULL );\r
- \r
- /* Also start the USB demo which is just for the SAM7. */\r
- vStartUSBTask( mainUSB_PRIORITY );\r
- \r
- /* Start the standard demo tasks. */\r
- vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
- vCreateBlockTimeTasks();\r
- vStartLEDFlashTasks( mainFLASH_PRIORITY );\r
- vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
- vStartQueuePeekTasks(); \r
- vStartDynamicPriorityTasks();\r
-\r
- /* Start the scheduler.\r
-\r
- NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.\r
- The processor MUST be in supervisor mode when vTaskStartScheduler is\r
- called. The demo applications included in the FreeRTOS.org download switch\r
- to supervisor mode prior to main being called. If you are not using one of\r
- these demo application projects then ensure Supervisor mode is used here. */\r
-\r
- vTaskStartScheduler();\r
-\r
- /* We should never get here as control is now taken by the scheduler. */\r
- return 0;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSetupHardware( void )\r
-{\r
- portDISABLE_INTERRUPTS();\r
- \r
- /* When using the JTAG debugger the hardware is not always initialised to\r
- the correct default state. This line just ensures that this does not\r
- cause all interrupts to be masked at the start. */\r
- AT91C_BASE_AIC->AIC_EOICR = 0;\r
- \r
- /* Most setup is performed by the low level init function called from the\r
- startup asm file. */\r
-\r
- /* Enable the peripheral clock. */\r
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA;\r
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOB;\r
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_EMAC;\r
-\r
- /* Initialise the LED outputs for use by the demo application tasks. */\r
- vParTestInitialise();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vApplicationTickHook( void )\r
-{\r
-static unsigned long ulCallCount = 0, ulErrorFound = pdFALSE;\r
-\r
-/* The rate at which LED D4 will toggle if an error has been found in one or \r
-more of the standard demo tasks. */\r
-const unsigned long ulErrorFlashRate = 500 / portTICK_PERIOD_MS;\r
-\r
-/* The rate at which LED D4 will toggle if no errors have been found in any\r
-of the standard demo tasks. */\r
-const unsigned long ulNoErrorCheckRate = 5000 / portTICK_PERIOD_MS;\r
-\r
- ulCallCount++;\r
-\r
- if( ulErrorFound != pdFALSE )\r
- {\r
- /* We have already found an error, so flash the LED with the appropriate\r
- frequency. */\r
- if( ulCallCount > ulErrorFlashRate )\r
- {\r
- ulCallCount = 0;\r
- vParTestToggleLED( mainERROR_LED );\r
- }\r
- }\r
- else\r
- {\r
- if( ulCallCount > ulNoErrorCheckRate )\r
- {\r
- ulCallCount = 0;\r
- \r
- /* We have not yet found an error. Check all the demo tasks to ensure\r
- this is still the case. */\r
- \r
- if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound |= 0x01;\r
- }\r
- \r
- if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound |= 0x02;\r
- }\r
- \r
- if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound |= 0x04;\r
- }\r
- \r
- if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound |= 0x08;\r
- }\r
- \r
- if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound |= 0x10;\r
- }\r
- \r
- vParTestToggleLED( mainERROR_LED );\r
- }\r
- }\r
-}\r
-\r
-\r
-\r
-\r
+++ /dev/null
-/****************************************************************************
-* Copyright (c) 2009 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-* History:
-*
-* 28.03.09 mifi First Version, based on the original syscall.c from
-* newlib version 1.17.0
-****************************************************************************/
-
-#include <stdlib.h>
-#include <errno.h>
-#include <string.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-
-/***************************************************************************/
-
-int _read_r (struct _reent *r, int file, char * ptr, int len)
-{
- r = r;
- file = file;
- ptr = ptr;
- len = len;
-
- errno = EINVAL;
- return -1;
-}
-
-/***************************************************************************/
-
-int _lseek_r (struct _reent *r, int file, int ptr, int dir)
-{
- r = r;
- file = file;
- ptr = ptr;
- dir = dir;
-
- return 0;
-}
-
-/***************************************************************************/
-
-int _write_r (struct _reent *r, int file, char * ptr, int len)
-{
- r = r;
- file = file;
- ptr = ptr;
-
-#if 0
- int index;
-
- /* For example, output string by UART */
- for(index=0; index<len; index++)
- {
- if (ptr[index] == '\n')
- {
- uart_putc('\r');
- }
-
- uart_putc(ptr[index]);
- }
-#endif
-
- return len;
-}
-
-/***************************************************************************/
-
-int _close_r (struct _reent *r, int file)
-{
- return 0;
-}
-
-/***************************************************************************/
-
-/* Register name faking - works in collusion with the linker. */
-register char * stack_ptr asm ("sp");
-
-caddr_t _sbrk_r (struct _reent *r, int incr)
-{
- extern char end asm ("end"); /* Defined by the linker. */
- static char * heap_end;
- char * prev_heap_end;
-
- if (heap_end == NULL)
- heap_end = & end;
-
- prev_heap_end = heap_end;
-
- if (heap_end + incr > stack_ptr)
- {
- /* Some of the libstdc++-v3 tests rely upon detecting
- out of memory errors, so do not abort here. */
-#if 0
- extern void abort (void);
-
- _write (1, "_sbrk: Heap and stack collision\n", 32);
-
- abort ();
-#else
- errno = ENOMEM;
- return (caddr_t) -1;
-#endif
- }
-
- heap_end += incr;
-
- return (caddr_t) prev_heap_end;
-}
-
-/***************************************************************************/
-
-int _fstat_r (struct _reent *r, int file, struct stat * st)
-{
- r = r;
- file = file;
-
- memset (st, 0, sizeof (* st));
- st->st_mode = S_IFCHR;
- return 0;
-}
-
-/***************************************************************************/
-
-int _isatty_r(struct _reent *r, int fd)
-{
- r = r;
- fd = fd;
-
- return 1;
-}
-
-/*** EOF ***/
-
-
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#include "FreeRTOS.h"\r
-#include "semphr.h"\r
-#include "task.h"\r
-\r
-/* Wrapper for the EMAC interrupt. */\r
-void vEMACISR_Wrapper( void ) __attribute__((naked));\r
-\r
-/* Handler called by the ISR wrapper. This must be kept a separate\r
-function to ensure the stack frame is correctly set up. */\r
-void vEMACISR_Handler( void ) __attribute__((noinline));\r
-\r
-static SemaphoreHandle_t xEMACSemaphore;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void vPassEMACSemaphore( SemaphoreHandle_t xSemaphore )\r
-{\r
- xEMACSemaphore = xSemaphore;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vEMACISR_Handler( void )\r
-{\r
-volatile unsigned long ulIntStatus, ulRxStatus;\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
-\r
- ulIntStatus = AT91C_BASE_EMAC->EMAC_ISR;\r
- ulRxStatus = AT91C_BASE_EMAC->EMAC_RSR;\r
-\r
- if( ( ulIntStatus & AT91C_EMAC_RCOMP ) || ( ulRxStatus & AT91C_EMAC_REC ) )\r
- {\r
- /* A frame has been received, signal the uIP task so it can process\r
- the Rx descriptors. */\r
- xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );\r
- AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;\r
- }\r
-\r
- /* Clear the interrupt. */\r
- AT91C_BASE_AIC->AIC_EOICR = 0;\r
- \r
- /* Switch to the uIP task. */\r
- if( xHigherPriorityTaskWoken )\r
- {\r
- /* If a task of higher priority than the interrupted task was\r
- unblocked by the ISR then this call will ensure that the \r
- unblocked task is the task the ISR returns to. */\r
- portYIELD_FROM_ISR();\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vEMACISR_Wrapper( void )\r
-{\r
- /* Save the context of the interrupted task. */\r
- portSAVE_CONTEXT();\r
- \r
- /* Call the handler task to do the actual work. This must be a separate\r
- function to ensure the stack frame is correctly set up. */\r
- __asm volatile ("bl vEMACISR_Handler");\r
- \r
- /* Restore the context of whichever task is the next to run. */\r
- portRESTORE_CONTEXT();\r
-}\r
-\r
-\r
+++ /dev/null
-APP_SOURCES += httpd.c http-strings.c httpd-fs.c httpd-cgi.c\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/* Standard includes. */\r
-#include <string.h>\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "semphr.h"\r
-#include "task.h"\r
-\r
-/* Demo application includes. */\r
-#include "SAM7_EMAC.h"\r
-\r
-/* uIP includes. */\r
-#include "uip.h"\r
-\r
-/* Hardware specific includes. */\r
-#include "Emac.h"\r
-#include "mii.h"\r
-#include "AT91SAM7X256.h"\r
-\r
-\r
-/* USE_RMII_INTERFACE must be defined as 1 to use an RMII interface, or 0\r
-to use an MII interface. */\r
-#define USE_RMII_INTERFACE 0\r
-\r
-/* The buffer addresses written into the descriptors must be aligned so the\r
-last few bits are zero. These bits have special meaning for the EMAC\r
-peripheral and cannot be used as part of the address. */\r
-#define emacADDRESS_MASK ( ( unsigned long ) 0xFFFFFFFC )\r
-\r
-/* Bit used within the address stored in the descriptor to mark the last\r
-descriptor in the array. */\r
-#define emacRX_WRAP_BIT ( ( unsigned long ) 0x02 )\r
-\r
-/* Bit used within the Tx descriptor status to indicate whether the\r
-descriptor is under the control of the EMAC or the software. */\r
-#define emacTX_BUF_USED ( ( unsigned long ) 0x80000000 )\r
-\r
-/* A short delay is used to wait for a buffer to become available, should\r
-one not be immediately available when trying to transmit a frame. */\r
-#define emacBUFFER_WAIT_DELAY ( 2 )\r
-#define emacMAX_WAIT_CYCLES ( configTICK_RATE_HZ / 40 )\r
-\r
-/* Misc defines. */\r
-#define emacINTERRUPT_LEVEL ( 5 )\r
-#define emacNO_DELAY ( 0 )\r
-#define emacTOTAL_FRAME_HEADER_SIZE ( 54 )\r
-#define emacPHY_INIT_DELAY ( 5000 / portTICK_PERIOD_MS )\r
-#define emacRESET_KEY ( ( unsigned long ) 0xA5000000 )\r
-#define emacRESET_LENGTH ( ( unsigned long ) ( 0x01 << 8 ) )\r
-\r
-/* The Atmel header file only defines the TX frame length mask. */\r
-#define emacRX_LENGTH_FRAME ( 0xfff )\r
-\r
-/* Peripheral setup for the EMAC. */\r
-#define emacPERIPHERAL_A_SETUP ( ( unsigned long ) AT91C_PB2_ETX0 ) | \\r
- ( ( unsigned long ) AT91C_PB12_ETXER ) | \\r
- ( ( unsigned long ) AT91C_PB16_ECOL ) | \\r
- ( ( unsigned long ) AT91C_PB11_ETX3 ) | \\r
- ( ( unsigned long ) AT91C_PB6_ERX1 ) | \\r
- ( ( unsigned long ) AT91C_PB15_ERXDV ) | \\r
- ( ( unsigned long ) AT91C_PB13_ERX2 ) | \\r
- ( ( unsigned long ) AT91C_PB3_ETX1 ) | \\r
- ( ( unsigned long ) AT91C_PB8_EMDC ) | \\r
- ( ( unsigned long ) AT91C_PB5_ERX0 ) | \\r
- ( ( unsigned long ) AT91C_PB14_ERX3 ) | \\r
- ( ( unsigned long ) AT91C_PB4_ECRS_ECRSDV ) | \\r
- ( ( unsigned long ) AT91C_PB1_ETXEN ) | \\r
- ( ( unsigned long ) AT91C_PB10_ETX2 ) | \\r
- ( ( unsigned long ) AT91C_PB0_ETXCK_EREFCK ) | \\r
- ( ( unsigned long ) AT91C_PB9_EMDIO ) | \\r
- ( ( unsigned long ) AT91C_PB7_ERXER ) | \\r
- ( ( unsigned long ) AT91C_PB17_ERXCK );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Prototype for the EMAC interrupt function - called by the asm wrapper.\r
- */\r
-extern void vEMACISR_Wrapper( void ) __attribute__((naked));\r
-\r
-/*\r
- * Initialise both the Tx and Rx descriptors used by the EMAC.\r
- */\r
-static void prvSetupDescriptors(void);\r
-\r
-/*\r
- * Write our MAC address into the EMAC. The MAC address is set as one of the\r
- * uip options.\r
- */\r
-static void prvSetupMACAddress( void );\r
-\r
-/*\r
- * Configure the EMAC and AIC for EMAC interrupts.\r
- */\r
-static void prvSetupEMACInterrupt( void );\r
-\r
-/*\r
- * Some initialisation functions taken from the Atmel EMAC sample code.\r
- */\r
-static void vReadPHY( unsigned char ucPHYAddress, unsigned char ucAddress, unsigned long *pulValue );\r
-#if USE_RMII_INTERFACE != 1\r
- static void vWritePHY( unsigned char ucPHYAddress, unsigned char ucAddress, unsigned long ulValue);\r
-#endif\r
-static portBASE_TYPE xGetLinkSpeed( void );\r
-static portBASE_TYPE prvProbePHY( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Buffer written to by the EMAC DMA. Must be aligned as described by the\r
-comment above the emacADDRESS_MASK definition. */\r
-#pragma data_alignment=8\r
-static volatile char pcRxBuffer[ NB_RX_BUFFERS * ETH_RX_BUFFER_SIZE ];\r
-\r
-/* Buffer read by the EMAC DMA. Must be aligned as described by he comment\r
-above the emacADDRESS_MASK definition. */\r
-#pragma data_alignment=8\r
-static char pcTxBuffer[ NB_TX_BUFFERS * ETH_TX_BUFFER_SIZE ];\r
-\r
-/* Descriptors used to communicate between the program and the EMAC peripheral.\r
-These descriptors hold the locations and state of the Rx and Tx buffers. */\r
-static volatile AT91S_TxTdDescriptor xTxDescriptors[ NB_TX_BUFFERS ];\r
-static volatile AT91S_RxTdDescriptor xRxDescriptors[ NB_RX_BUFFERS ];\r
-\r
-/* The IP and Ethernet addresses are read from the uIP setup. */\r
-const char cMACAddress[ 6 ] = { uipMAC_ADDR0, uipMAC_ADDR1, uipMAC_ADDR2, uipMAC_ADDR3, uipMAC_ADDR4, uipMAC_ADDR5 };\r
-const unsigned char ucIPAddress[ 4 ] = { uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 };\r
-\r
-/* The semaphore used by the EMAC ISR to wake the EMAC task. */\r
-static SemaphoreHandle_t xSemaphore = NULL;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-SemaphoreHandle_t xEMACInit( void )\r
-{\r
- /* Code supplied by Atmel -------------------------------*/\r
-\r
- /* Disable pull up on RXDV => PHY normal mode (not in test mode),\r
- PHY has internal pull down. */\r
- AT91C_BASE_PIOB->PIO_PPUDR = 1 << 15;\r
-\r
- #if USE_RMII_INTERFACE != 1\r
- /* PHY has internal pull down : set MII mode. */\r
- AT91C_BASE_PIOB->PIO_PPUDR = 1 << 16;\r
- #endif\r
-\r
- /* Clear PB18 <=> PHY powerdown. */\r
- AT91C_BASE_PIOB->PIO_PER = 1 << 18;\r
- AT91C_BASE_PIOB->PIO_OER = 1 << 18;\r
- AT91C_BASE_PIOB->PIO_CODR = 1 << 18;\r
-\r
- /* After PHY power up, hardware reset. */\r
- AT91C_BASE_RSTC->RSTC_RMR = emacRESET_KEY | emacRESET_LENGTH;\r
- AT91C_BASE_RSTC->RSTC_RCR = emacRESET_KEY | AT91C_RSTC_EXTRST;\r
-\r
- /* Wait for hardware reset end. */\r
- while( !( AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL ) )\r
- {\r
- __asm volatile ( "NOP" );\r
- }\r
- __asm volatile ( "NOP" );\r
-\r
- /* Setup the pins. */\r
- AT91C_BASE_PIOB->PIO_ASR = emacPERIPHERAL_A_SETUP;\r
- AT91C_BASE_PIOB->PIO_PDR = emacPERIPHERAL_A_SETUP;\r
-\r
- /* Enable com between EMAC PHY.\r
-\r
- Enable management port. */\r
- AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_MPE; \r
-\r
- /* MDC = MCK/32. */\r
- AT91C_BASE_EMAC->EMAC_NCFGR |= ( 2 ) << 10; \r
-\r
- /* Wait for PHY auto init end (rather crude delay!). */\r
- vTaskDelay( emacPHY_INIT_DELAY );\r
-\r
- /* PHY configuration. */\r
- #if USE_RMII_INTERFACE != 1\r
- {\r
- unsigned long ulControl;\r
-\r
- /* PHY has internal pull down : disable MII isolate. */\r
- vReadPHY( AT91C_PHY_ADDR, MII_BMCR, &ulControl );\r
- vReadPHY( AT91C_PHY_ADDR, MII_BMCR, &ulControl );\r
- ulControl &= ~BMCR_ISOLATE;\r
- vWritePHY( AT91C_PHY_ADDR, MII_BMCR, ulControl );\r
- }\r
- #endif\r
-\r
- /* Disable management port again. */\r
- AT91C_BASE_EMAC->EMAC_NCR &= ~AT91C_EMAC_MPE;\r
-\r
- #if USE_RMII_INTERFACE != 1\r
- /* Enable EMAC in MII mode, enable clock ERXCK and ETXCK. */\r
- AT91C_BASE_EMAC->EMAC_USRIO = AT91C_EMAC_CLKEN ;\r
- #else\r
- /* Enable EMAC in RMII mode, enable RMII clock (50MHz from oscillator\r
- on ERFCK). */\r
- AT91C_BASE_EMAC->EMAC_USRIO = AT91C_EMAC_RMII | AT91C_EMAC_CLKEN ;\r
- #endif\r
-\r
- /* End of code supplied by Atmel ------------------------*/\r
-\r
- /* Setup the buffers and descriptors. */\r
- prvSetupDescriptors();\r
- \r
- /* Load our MAC address into the EMAC. */\r
- prvSetupMACAddress();\r
-\r
- /* Are we connected? */\r
- if( prvProbePHY() )\r
- {\r
- /* Enable the interrupt! */\r
- portENTER_CRITICAL();\r
- {\r
- prvSetupEMACInterrupt();\r
- vPassEMACSemaphore( xSemaphore );\r
- }\r
- portEXIT_CRITICAL();\r
- }\r
-\r
- return xSemaphore;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-long lEMACSend( void )\r
-{\r
-static unsigned portBASE_TYPE uxTxBufferIndex = 0;\r
-portBASE_TYPE xWaitCycles = 0;\r
-long lReturn = pdPASS;\r
-char *pcBuffer;\r
-\r
- /* Is a buffer available? */\r
- while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AT91C_TRANSMIT_OK ) )\r
- {\r
- /* There is no room to write the Tx data to the Tx buffer. Wait a\r
- short while, then try again. */\r
- xWaitCycles++;\r
- if( xWaitCycles > emacMAX_WAIT_CYCLES )\r
- {\r
- /* Give up. */\r
- lReturn = pdFAIL;\r
- break;\r
- }\r
- else\r
- {\r
- vTaskDelay( emacBUFFER_WAIT_DELAY );\r
- }\r
- }\r
-\r
- /* lReturn will only be pdPASS if a buffer is available. */\r
- if( lReturn == pdPASS )\r
- {\r
- /* Copy the headers into the Tx buffer. These will be in the uIP buffer. */\r
- pcBuffer = ( char * ) xTxDescriptors[ uxTxBufferIndex ].addr;\r
- memcpy( ( void * ) pcBuffer, ( void * ) uip_buf, emacTOTAL_FRAME_HEADER_SIZE );\r
-\r
- /* If there is room, also copy in the application data if any. */\r
- if( ( uip_len > emacTOTAL_FRAME_HEADER_SIZE ) && ( uip_len <= ( ETH_TX_BUFFER_SIZE - emacTOTAL_FRAME_HEADER_SIZE ) ) )\r
- {\r
- memcpy( ( void * ) &( pcBuffer[ emacTOTAL_FRAME_HEADER_SIZE ] ), ( void * ) uip_appdata, ( uip_len - emacTOTAL_FRAME_HEADER_SIZE ) );\r
- }\r
-\r
- /* Send. */ \r
- portENTER_CRITICAL();\r
- {\r
- if( uxTxBufferIndex >= ( NB_TX_BUFFERS - 1 ) )\r
- {\r
- /* Fill out the necessary in the descriptor to get the data sent. */\r
- xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( uip_len & ( unsigned long ) AT91C_LENGTH_FRAME )\r
- | AT91C_LAST_BUFFER\r
- | AT91C_TRANSMIT_WRAP;\r
- uxTxBufferIndex = 0;\r
- }\r
- else\r
- {\r
- /* Fill out the necessary in the descriptor to get the data sent. */\r
- xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( uip_len & ( unsigned long ) AT91C_LENGTH_FRAME )\r
- | AT91C_LAST_BUFFER;\r
- uxTxBufferIndex++;\r
- }\r
- \r
- AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_TSTART;\r
- }\r
- portEXIT_CRITICAL();\r
- }\r
-\r
- return lReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-unsigned long ulEMACPoll( void )\r
-{\r
-static unsigned portBASE_TYPE ulNextRxBuffer = 0;\r
-unsigned long ulSectionLength = 0, ulLengthSoFar = 0, ulEOF = pdFALSE;\r
-char *pcSource;\r
-\r
- /* Skip any fragments. */\r
- while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AT91C_OWNERSHIP_BIT ) && !( xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AT91C_SOF ) )\r
- {\r
- /* Mark the buffer as free again. */\r
- xRxDescriptors[ ulNextRxBuffer ].addr &= ~( AT91C_OWNERSHIP_BIT ); \r
- ulNextRxBuffer++;\r
- if( ulNextRxBuffer >= NB_RX_BUFFERS )\r
- {\r
- ulNextRxBuffer = 0;\r
- }\r
- }\r
-\r
- /* Is there a packet ready? */\r
-\r
- while( ( xRxDescriptors[ ulNextRxBuffer ].addr & AT91C_OWNERSHIP_BIT ) && !ulSectionLength )\r
- {\r
- pcSource = ( char * )( xRxDescriptors[ ulNextRxBuffer ].addr & emacADDRESS_MASK );\r
- ulSectionLength = xRxDescriptors[ ulNextRxBuffer ].U_Status.status & emacRX_LENGTH_FRAME;\r
-\r
- if( ulSectionLength == 0 )\r
- {\r
- /* The frame is longer than the buffer pointed to by this\r
- descriptor so copy the entire buffer to uIP - then move onto\r
- the next descriptor to get the rest of the frame. */\r
- if( ( ulLengthSoFar + ETH_RX_BUFFER_SIZE ) <= UIP_BUFSIZE )\r
- {\r
- memcpy( &( uip_buf[ ulLengthSoFar ] ), pcSource, ETH_RX_BUFFER_SIZE );\r
- ulLengthSoFar += ETH_RX_BUFFER_SIZE;\r
- } \r
- }\r
- else\r
- {\r
- /* This is the last section of the frame. Copy the section to\r
- uIP. */\r
- if( ulSectionLength < UIP_BUFSIZE )\r
- {\r
- /* The section length holds the length of the entire frame.\r
- ulLengthSoFar holds the length of the frame sections already\r
- copied to uIP, so the length of the final section is\r
- ulSectionLength - ulLengthSoFar; */\r
- if( ulSectionLength > ulLengthSoFar )\r
- {\r
- memcpy( &( uip_buf[ ulLengthSoFar ] ), pcSource, ( ulSectionLength - ulLengthSoFar ) );\r
- }\r
- } \r
-\r
- /* Is this the last buffer for the frame? If not why? */\r
- ulEOF = xRxDescriptors[ ulNextRxBuffer ].U_Status.status & AT91C_EOF;\r
- }\r
-\r
- /* Mark the buffer as free again. */\r
- xRxDescriptors[ ulNextRxBuffer ].addr &= ~( AT91C_OWNERSHIP_BIT );\r
-\r
- /* Increment to the next buffer, wrapping if necessary. */\r
- ulNextRxBuffer++;\r
- if( ulNextRxBuffer >= NB_RX_BUFFERS )\r
- {\r
- ulNextRxBuffer = 0;\r
- }\r
- }\r
-\r
- /* If we obtained data but for some reason did not find the end of the\r
- frame then discard the data as it must contain an error. */\r
- if( !ulEOF )\r
- {\r
- ulSectionLength = 0;\r
- }\r
-\r
- return ulSectionLength;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSetupDescriptors(void)\r
-{\r
-unsigned portBASE_TYPE xIndex;\r
-unsigned long ulAddress;\r
-\r
- /* Initialise xRxDescriptors descriptor. */\r
- for( xIndex = 0; xIndex < NB_RX_BUFFERS; ++xIndex )\r
- {\r
- /* Calculate the address of the nth buffer within the array. */\r
- ulAddress = ( unsigned long )( pcRxBuffer + ( xIndex * ETH_RX_BUFFER_SIZE ) );\r
-\r
- /* Write the buffer address into the descriptor. The DMA will place\r
- the data at this address when this descriptor is being used. Mask off\r
- the bottom bits of the address as these have special meaning. */\r
- xRxDescriptors[ xIndex ].addr = ulAddress & emacADDRESS_MASK;\r
- } \r
-\r
- /* The last buffer has the wrap bit set so the EMAC knows to wrap back\r
- to the first buffer. */\r
- xRxDescriptors[ NB_RX_BUFFERS - 1 ].addr |= emacRX_WRAP_BIT;\r
-\r
- /* Initialise xTxDescriptors. */\r
- for( xIndex = 0; xIndex < NB_TX_BUFFERS; ++xIndex )\r
- {\r
- /* Calculate the address of the nth buffer within the array. */\r
- ulAddress = ( unsigned long )( pcTxBuffer + ( xIndex * ETH_TX_BUFFER_SIZE ) );\r
-\r
- /* Write the buffer address into the descriptor. The DMA will read\r
- data from here when the descriptor is being used. */\r
- xTxDescriptors[ xIndex ].addr = ulAddress & emacADDRESS_MASK;\r
- xTxDescriptors[ xIndex ].U_Status.status = AT91C_TRANSMIT_OK;\r
- } \r
-\r
- /* The last buffer has the wrap bit set so the EMAC knows to wrap back\r
- to the first buffer. */\r
- xTxDescriptors[ NB_TX_BUFFERS - 1 ].U_Status.status = AT91C_TRANSMIT_WRAP | AT91C_TRANSMIT_OK;\r
-\r
- /* Tell the EMAC where to find the descriptors. */\r
- AT91C_BASE_EMAC->EMAC_RBQP = ( unsigned long ) xRxDescriptors;\r
- AT91C_BASE_EMAC->EMAC_TBQP = ( unsigned long ) xTxDescriptors;\r
- \r
- /* Clear all the bits in the receive status register. */\r
- AT91C_BASE_EMAC->EMAC_RSR = ( AT91C_EMAC_OVR | AT91C_EMAC_REC | AT91C_EMAC_BNA );\r
-\r
- /* Enable the copy of data into the buffers, ignore broadcasts,\r
- and don't copy FCS. */\r
- AT91C_BASE_EMAC->EMAC_NCFGR |= ( AT91C_EMAC_CAF | AT91C_EMAC_NBC | AT91C_EMAC_DRFCS);\r
-\r
- /* Enable Rx and Tx, plus the stats register. */\r
- AT91C_BASE_EMAC->EMAC_NCR |= ( AT91C_EMAC_TE | AT91C_EMAC_RE | AT91C_EMAC_WESTAT );\r
-} \r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSetupMACAddress( void )\r
-{\r
- /* Must be written SA1L then SA1H. */\r
- AT91C_BASE_EMAC->EMAC_SA1L = ( ( unsigned long ) cMACAddress[ 3 ] << 24 ) |\r
- ( ( unsigned long ) cMACAddress[ 2 ] << 16 ) |\r
- ( ( unsigned long ) cMACAddress[ 1 ] << 8 ) |\r
- cMACAddress[ 0 ];\r
-\r
- AT91C_BASE_EMAC->EMAC_SA1H = ( ( unsigned long ) cMACAddress[ 5 ] << 8 ) |\r
- cMACAddress[ 4 ];\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSetupEMACInterrupt( void )\r
-{\r
- /* Create the semaphore used to trigger the EMAC task. */\r
- vSemaphoreCreateBinary( xSemaphore );\r
- if( xSemaphore )\r
- {\r
- /* We start by 'taking' the semaphore so the ISR can 'give' it when the\r
- first interrupt occurs. */\r
- xSemaphoreTake( xSemaphore, emacNO_DELAY );\r
- portENTER_CRITICAL();\r
- {\r
- /* We want to interrupt on Rx events. */\r
- AT91C_BASE_EMAC->EMAC_IER = AT91C_EMAC_RCOMP;\r
-\r
- /* Enable the interrupts in the AIC. */\r
- AT91F_AIC_ConfigureIt( AT91C_ID_EMAC, emacINTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, ( void (*)( void ) ) vEMACISR_Wrapper );\r
- AT91C_BASE_AIC->AIC_IECR = 0x1 << AT91C_ID_EMAC;\r
- }\r
- portEXIT_CRITICAL();\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-\r
-\r
-\r
-/*\r
- * The following functions are initialisation functions taken from the Atmel\r
- * EMAC sample code.\r
- */\r
-\r
-static portBASE_TYPE prvProbePHY( void )\r
-{\r
-unsigned long ulPHYId1, ulPHYId2, ulStatus;\r
-portBASE_TYPE xReturn = pdPASS;\r
- \r
- /* Code supplied by Atmel (reformatted) -----------------*/\r
-\r
- /* Enable management port */\r
- AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_MPE; \r
- AT91C_BASE_EMAC->EMAC_NCFGR |= ( 2 ) << 10;\r
-\r
- /* Read the PHY ID. */\r
- vReadPHY( AT91C_PHY_ADDR, MII_PHYSID1, &ulPHYId1 );\r
- vReadPHY( AT91C_PHY_ADDR, MII_PHYSID2, &ulPHYId2 );\r
-\r
- /* AMD AM79C875:\r
- PHY_ID1 = 0x0022\r
- PHY_ID2 = 0x5541\r
- Bits 3:0 Revision Number Four bit manufacturer\92s revision number.\r
- 0001 stands for Rev. A, etc.\r
- */\r
- if( ( ( ulPHYId1 << 16 ) | ( ulPHYId2 & 0xfff0 ) ) != MII_DM9161_ID )\r
- {\r
- /* Did not expect this ID. */\r
- xReturn = pdFAIL;\r
- }\r
- else\r
- {\r
- ulStatus = xGetLinkSpeed();\r
-\r
- if( ulStatus != pdPASS )\r
- {\r
- xReturn = pdFAIL;\r
- }\r
- }\r
-\r
- /* Disable management port */\r
- AT91C_BASE_EMAC->EMAC_NCR &= ~AT91C_EMAC_MPE; \r
-\r
- /* End of code supplied by Atmel ------------------------*/\r
-\r
- return xReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void vReadPHY( unsigned char ucPHYAddress, unsigned char ucAddress, unsigned long *pulValue )\r
-{\r
- /* Code supplied by Atmel (reformatted) ----------------------*/\r
-\r
- AT91C_BASE_EMAC->EMAC_MAN = (AT91C_EMAC_SOF & (0x01<<30))\r
- | (2 << 16) | (2 << 28)\r
- | ((ucPHYAddress & 0x1f) << 23)\r
- | (ucAddress << 18);\r
-\r
- /* Wait until IDLE bit in Network Status register is cleared. */\r
- while( !( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE ) )\r
- {\r
- __asm( "NOP" );\r
- }\r
-\r
- *pulValue = ( AT91C_BASE_EMAC->EMAC_MAN & 0x0000ffff ); \r
-\r
- /* End of code supplied by Atmel ------------------------*/\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-#if USE_RMII_INTERFACE != 1\r
-static void vWritePHY( unsigned char ucPHYAddress, unsigned char ucAddress, unsigned long ulValue )\r
-{\r
- /* Code supplied by Atmel (reformatted) ----------------------*/\r
-\r
- AT91C_BASE_EMAC->EMAC_MAN = (( AT91C_EMAC_SOF & (0x01<<30))\r
- | (2 << 16) | (1 << 28)\r
- | ((ucPHYAddress & 0x1f) << 23)\r
- | (ucAddress << 18))\r
- | (ulValue & 0xffff);\r
-\r
- /* Wait until IDLE bit in Network Status register is cleared */\r
- while( !( AT91C_BASE_EMAC->EMAC_NSR & AT91C_EMAC_IDLE ) )\r
- {\r
- __asm( "NOP" );\r
- };\r
-\r
- /* End of code supplied by Atmel ------------------------*/\r
-}\r
-#endif\r
-/*-----------------------------------------------------------*/\r
-\r
-static portBASE_TYPE xGetLinkSpeed( void )\r
-{\r
- unsigned long ulBMSR, ulBMCR, ulLPA, ulMACCfg, ulSpeed, ulDuplex;\r
-\r
- /* Code supplied by Atmel (reformatted) -----------------*/\r
-\r
- /* Link status is latched, so read twice to get current value */\r
- vReadPHY(AT91C_PHY_ADDR, MII_BMSR, &ulBMSR);\r
- vReadPHY(AT91C_PHY_ADDR, MII_BMSR, &ulBMSR);\r
-\r
- if( !( ulBMSR & BMSR_LSTATUS ) )\r
- { \r
- /* No Link. */\r
- return pdFAIL;\r
- }\r
-\r
- vReadPHY(AT91C_PHY_ADDR, MII_BMCR, &ulBMCR);\r
- if (ulBMCR & BMCR_ANENABLE)\r
- { \r
- /* AutoNegotiation is enabled. */\r
- if (!(ulBMSR & BMSR_ANEGCOMPLETE))\r
- {\r
- /* Auto-negotiation in progress. */\r
- return pdFAIL; \r
- } \r
-\r
- vReadPHY(AT91C_PHY_ADDR, MII_LPA, &ulLPA);\r
- if( ( ulLPA & LPA_100FULL ) || ( ulLPA & LPA_100HALF ) )\r
- {\r
- ulSpeed = SPEED_100;\r
- }\r
- else\r
- {\r
- ulSpeed = SPEED_10;\r
- }\r
-\r
- if( ( ulLPA & LPA_100FULL ) || ( ulLPA & LPA_10FULL ) )\r
- {\r
- ulDuplex = DUPLEX_FULL;\r
- }\r
- else\r
- {\r
- ulDuplex = DUPLEX_HALF;\r
- }\r
- }\r
- else\r
- {\r
- ulSpeed = ( ulBMCR & BMCR_SPEED100 ) ? SPEED_100 : SPEED_10;\r
- ulDuplex = ( ulBMCR & BMCR_FULLDPLX ) ? DUPLEX_FULL : DUPLEX_HALF;\r
- }\r
-\r
- /* Update the MAC */\r
- ulMACCfg = AT91C_BASE_EMAC->EMAC_NCFGR & ~( AT91C_EMAC_SPD | AT91C_EMAC_FD );\r
- if( ulSpeed == SPEED_100 )\r
- {\r
- if( ulDuplex == DUPLEX_FULL )\r
- {\r
- /* 100 Full Duplex */\r
- AT91C_BASE_EMAC->EMAC_NCFGR = ulMACCfg | AT91C_EMAC_SPD | AT91C_EMAC_FD;\r
- }\r
- else\r
- { \r
- /* 100 Half Duplex */\r
- AT91C_BASE_EMAC->EMAC_NCFGR = ulMACCfg | AT91C_EMAC_SPD;\r
- }\r
- }\r
- else\r
- {\r
- if (ulDuplex == DUPLEX_FULL)\r
- {\r
- /* 10 Full Duplex */\r
- AT91C_BASE_EMAC->EMAC_NCFGR = ulMACCfg | AT91C_EMAC_FD;\r
- }\r
- else\r
- {\r
- /* 10 Half Duplex */\r
- AT91C_BASE_EMAC->EMAC_NCFGR = ulMACCfg;\r
- }\r
- }\r
-\r
- /* End of code supplied by Atmel ------------------------*/\r
-\r
- return pdPASS;\r
-}\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef SAM_7_EMAC_H\r
-#define SAM_7_EMAC_H\r
-\r
-\r
-/*\r
- * Initialise the EMAC driver. If successful a semaphore is returned that\r
- * is used by the EMAC ISR to indicate that Rx packets have been received.\r
- * If the initialisation fails then NULL is returned.\r
- */\r
-SemaphoreHandle_t xEMACInit( void );\r
-\r
-/*\r
- * Send the current uIP buffer. This copies the uIP buffer to one of the\r
- * EMAC Tx buffers, then indicates to the EMAC that the buffer is ready.\r
- */\r
-long lEMACSend( void );\r
-\r
-/*\r
- * Called in response to an EMAC Rx interrupt. Copies the received frame\r
- * into the uIP buffer.\r
- */\r
-unsigned long ulEMACPoll( void );\r
-\r
-#endif\r
+++ /dev/null
-/*\r
- * Copyright (c) 2006, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack\r
- *\r
- * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $\r
- */\r
-\r
-#ifndef __CLOCK_ARCH_H__\r
-#define __CLOCK_ARCH_H__\r
-\r
-#include "FreeRTOS.h"\r
-\r
-typedef unsigned long clock_time_t;\r
-#define CLOCK_CONF_SECOND configTICK_RATE_HZ\r
-\r
-#endif /* __CLOCK_ARCH_H__ */\r
+++ /dev/null
-//*----------------------------------------------------------------------------\r
-//* ATMEL Microcontroller Software Support - ROUSSET -\r
-//*----------------------------------------------------------------------------\r
-//* The software is delivered "AS IS" without warranty or condition of any\r
-//* kind, either express, implied or statutory. This includes without\r
-//* limitation any warranty or condition with respect to merchantability or\r
-//* fitness for any particular purpose, or against the infringements of\r
-//* intellectual property rights of others.\r
-//*----------------------------------------------------------------------------\r
-//* File Name : Emac.h\r
-//* Object : Emac header file\r
-//* Creation : Hi 11/18/2002\r
-//*\r
-//*----------------------------------------------------------------------------\r
-#ifndef AT91C_EMAC_H\r
-#define AT91C_EMAC_H\r
-\r
-\r
-//* Allows to display all IP header in the main.c\r
-//* If not defined, only ICMP packets are displayed\r
-#define AT91C_DISPLAY_ALL_IPHEADER 0\r
-\r
-#define NB_RX_BUFFERS 25 //* Number of receive buffers\r
-#define ETH_RX_BUFFER_SIZE 128 //*\r
-\r
-#define NB_TX_BUFFERS 2 //* Number of Transmit buffers\r
-#define ETH_TX_BUFFER_SIZE UIP_BUFSIZE //*\r
-\r
-#define AT91C_NO_IPPACKET 0\r
-#define AT91C_IPPACKET 1\r
-\r
-#define ARP_REQUEST 0x0001\r
-#define ARP_REPLY 0x0002\r
-#define PROT_ARP 0x0806\r
-#define PROT_IP 0x0800\r
-#define PROT_ICMP 0x01\r
-#define ICMP_ECHO_REQUEST 0x08\r
-#define ICMP_ECHO_REPLY 0x00\r
-\r
-#define AT91C_EMAC_CLKEN 0x2\r
-#define SWAP16(x) (((x & 0xff) << 8) | (x >> 8))\r
-\r
-#if 0\r
-//* Transfer descriptor structure\r
-typedef struct _AT91S_TdDescriptor {\r
- unsigned int addr;\r
- unsigned int status;\r
-}AT91S_TdDescriptor, *AT91PS_TdDescriptor;\r
-#endif\r
-\r
-//* Receive Transfer descriptor structure\r
-typedef struct _AT91S_RxTdDescriptor {\r
- unsigned int addr;\r
- union\r
- {\r
- unsigned int status;\r
- struct {\r
- unsigned int Length:11;\r
- unsigned int Res0:1;\r
- unsigned int Rxbuf_off:2;\r
- unsigned int StartOfFrame:1;\r
- unsigned int EndOfFrame:1;\r
- unsigned int Cfi:1;\r
- unsigned int VlanPriority:3;\r
- unsigned int PriorityTag:1;\r
- unsigned int VlanTag:1;\r
- unsigned int TypeID:1;\r
- unsigned int Sa4Match:1;\r
- unsigned int Sa3Match:1;\r
- unsigned int Sa2Match:1;\r
- unsigned int Sa1Match:1;\r
- unsigned int Res1:1;\r
- unsigned int ExternalAdd:1;\r
- unsigned int UniCast:1;\r
- unsigned int MultiCast:1;\r
- unsigned int BroadCast:1;\r
- }S_Status; \r
- }U_Status;\r
-}AT91S_RxTdDescriptor, *AT91PS_RxTdDescriptor;\r
-\r
-\r
-//* Transmit Transfer descriptor structure\r
-typedef struct _AT91S_TxTdDescriptor {\r
- unsigned int addr;\r
- union\r
- {\r
- unsigned int status;\r
- struct {\r
- unsigned int Length:11;\r
- unsigned int Res0:4;\r
- unsigned int LastBuff:1;\r
- unsigned int NoCrc:1;\r
- unsigned int Res1:10;\r
- unsigned int BufExhausted:1;\r
- unsigned int TransmitUnderrun:1;\r
- unsigned int TransmitError:1;\r
- unsigned int Wrap:1;\r
- unsigned int BuffUsed:1;\r
- }S_Status; \r
- }U_Status;\r
-}AT91S_TxTdDescriptor, *AT91PS_TxTdDescriptor;\r
-\r
-#define AT91C_OWNERSHIP_BIT 0x00000001\r
-\r
-/* Receive status defintion */\r
-#define AT91C_BROADCAST_ADDR ((unsigned int) (1 << 31)) //* Broadcat address detected\r
-#define AT91C_MULTICAST_HASH ((unsigned int) (1 << 30)) //* MultiCast hash match\r
-#define AT91C_UNICAST_HASH ((unsigned int) (1 << 29)) //* UniCast hash match\r
-#define AT91C_EXTERNAL_ADDR ((unsigned int) (1 << 28)) //* External Address match\r
-#define AT91C_SA1_ADDR ((unsigned int) (1 << 26)) //* Specific address 1 match\r
-#define AT91C_SA2_ADDR ((unsigned int) (1 << 25)) //* Specific address 2 match\r
-#define AT91C_SA3_ADDR ((unsigned int) (1 << 24)) //* Specific address 3 match\r
-#define AT91C_SA4_ADDR ((unsigned int) (1 << 23)) //* Specific address 4 match\r
-#define AT91C_TYPE_ID ((unsigned int) (1 << 22)) //* Type ID match\r
-#define AT91C_VLAN_TAG ((unsigned int) (1 << 21)) //* VLAN tag detected\r
-#define AT91C_PRIORITY_TAG ((unsigned int) (1 << 20)) //* PRIORITY tag detected\r
-#define AT91C_VLAN_PRIORITY ((unsigned int) (7 << 17)) //* PRIORITY Mask\r
-#define AT91C_CFI_IND ((unsigned int) (1 << 16)) //* CFI indicator\r
-#define AT91C_EOF ((unsigned int) (1 << 15)) //* EOF\r
-#define AT91C_SOF ((unsigned int) (1 << 14)) //* SOF\r
-#define AT91C_RBF_OFFSET ((unsigned int) (3 << 12)) //* Receive Buffer Offset Mask\r
-#define AT91C_LENGTH_FRAME ((unsigned int) 0x07FF) //* Length of frame\r
-\r
-/* Transmit Status definition */\r
-#define AT91C_TRANSMIT_OK ((unsigned int) (1 << 31)) //*\r
-#define AT91C_TRANSMIT_WRAP ((unsigned int) (1 << 30)) //* Wrap bit: mark the last descriptor\r
-#define AT91C_TRANSMIT_ERR ((unsigned int) (1 << 29)) //* RLE:transmit error\r
-#define AT91C_TRANSMIT_UND ((unsigned int) (1 << 28)) //* Transmit Underrun\r
-#define AT91C_BUF_EX ((unsigned int) (1 << 27)) //* Buffers exhausted in mid frame\r
-#define AT91C_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) //* No CRC will be appended to the current frame\r
-#define AT91C_LAST_BUFFER ((unsigned int) (1 << 15)) //*\r
-\r
-#define ARP_ETHER 1 /* Ethernet hardware address */\r
-#define ARPOP_REQUEST 1 /* Request to resolve address */\r
-#define ARPOP_REPLY 2 /* Response to previous request */\r
-#define RARPOP_REQUEST 3 /* Request to resolve address */\r
-#define RARPOP_REPLY 4 /* Response to previous request */\r
-\r
-\r
-typedef struct _AT91S_EthHdr\r
-{\r
- unsigned char et_dest[6]; /* Destination node */\r
- unsigned char et_src[6]; /* Source node */\r
- unsigned short et_protlen; /* Protocol or length */\r
-} AT91S_EthHdr, *AT91PS_EthHdr;\r
-\r
-typedef struct _AT91S_ArpHdr\r
-{\r
- unsigned short ar_hrd; /* Format of hardware address */\r
- unsigned short ar_pro; /* Format of protocol address */\r
- unsigned char ar_hln; /* Length of hardware address */\r
- unsigned char ar_pln; /* Length of protocol address */\r
- unsigned short ar_op; /* Operation */\r
- unsigned char ar_sha[6]; /* Sender hardware address */\r
- unsigned char ar_spa[4]; /* Sender protocol address */\r
- unsigned char ar_tha[6]; /* Target hardware address */\r
- unsigned char ar_tpa[4]; /* Target protocol address */\r
-} AT91S_ArpHdr, *AT91PS_ArpHdr;\r
-\r
-//* IP Header structure\r
-typedef struct _AT91S_IPheader {\r
- unsigned char ip_hl_v; /* header length and version */\r
- unsigned char ip_tos; /* type of service */\r
- unsigned short ip_len; /* total length */\r
- unsigned short ip_id; /* identification */\r
- unsigned short ip_off; /* fragment offset field */\r
- unsigned char ip_ttl; /* time to live */\r
- unsigned char ip_p; /* protocol */\r
- unsigned short ip_sum; /* checksum */\r
- unsigned char ip_src[4]; /* Source IP address */\r
- unsigned char ip_dst[4]; /* Destination IP address */\r
- unsigned short udp_src; /* UDP source port */\r
- unsigned short udp_dst; /* UDP destination port */\r
- unsigned short udp_len; /* Length of UDP packet */\r
- unsigned short udp_xsum; /* Checksum */\r
-} AT91S_IPheader, *AT91PS_IPheader;\r
-\r
-//* ICMP echo header structure\r
-typedef struct _AT91S_IcmpEchoHdr {\r
- unsigned char type; /* type of message */\r
- unsigned char code; /* type subcode */\r
- unsigned short cksum; /* ones complement cksum of struct */\r
- unsigned short id; /* identifier */\r
- unsigned short seq; /* sequence number */\r
-}AT91S_IcmpEchoHdr, *AT91PS_IcmpEchoHdr;\r
-\r
-\r
-typedef struct _AT91S_EthPack\r
-{\r
- AT91S_EthHdr EthHdr;\r
- AT91S_ArpHdr ArpHdr;\r
-} AT91S_EthPack, *AT91PS_EthPack;\r
-\r
-\r
-#endif //* AT91C_EMAC_H\r
+++ /dev/null
-http_http "http://"\r
-http_200 "200 "\r
-http_301 "301 "\r
-http_302 "302 "\r
-http_get "GET "\r
-http_10 "HTTP/1.0"\r
-http_11 "HTTP/1.1"\r
-http_content_type "content-type: "\r
-http_texthtml "text/html"\r
-http_location "location: "\r
-http_host "host: "\r
-http_crnl "\r\n"\r
-http_index_html "/index.html"\r
-http_404_html "/404.html"\r
-http_referer "Referer:"\r
-http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
-http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
-http_content_type_plain "Content-type: text/plain\r\n\r\n"\r
-http_content_type_html "Content-type: text/html\r\n\r\n"\r
-http_content_type_css "Content-type: text/css\r\n\r\n"\r
-http_content_type_text "Content-type: text/text\r\n\r\n"\r
-http_content_type_png "Content-type: image/png\r\n\r\n"\r
-http_content_type_gif "Content-type: image/gif\r\n\r\n"\r
-http_content_type_jpg "Content-type: image/jpeg\r\n\r\n"\r
-http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"\r
-http_html ".html"\r
-http_shtml ".shtml"\r
-http_htm ".htm"\r
-http_css ".css"\r
-http_png ".png"\r
-http_gif ".gif"\r
-http_jpg ".jpg"\r
-http_text ".txt"\r
-http_txt ".txt"\r
-\r
+++ /dev/null
-const char http_http[8] = \r
-/* "http://" */\r
-{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };\r
-const char http_200[5] = \r
-/* "200 " */\r
-{0x32, 0x30, 0x30, 0x20, };\r
-const char http_301[5] = \r
-/* "301 " */\r
-{0x33, 0x30, 0x31, 0x20, };\r
-const char http_302[5] = \r
-/* "302 " */\r
-{0x33, 0x30, 0x32, 0x20, };\r
-const char http_get[5] = \r
-/* "GET " */\r
-{0x47, 0x45, 0x54, 0x20, };\r
-const char http_10[9] = \r
-/* "HTTP/1.0" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };\r
-const char http_11[9] = \r
-/* "HTTP/1.1" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };\r
-const char http_content_type[15] = \r
-/* "content-type: " */\r
-{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };\r
-const char http_texthtml[10] = \r
-/* "text/html" */\r
-{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_location[11] = \r
-/* "location: " */\r
-{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };\r
-const char http_host[7] = \r
-/* "host: " */\r
-{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };\r
-const char http_crnl[3] = \r
-/* "\r\n" */\r
-{0xd, 0xa, };\r
-const char http_index_html[12] = \r
-/* "/index.html" */\r
-{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_404_html[10] = \r
-/* "/404.html" */\r
-{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_referer[9] = \r
-/* "Referer:" */\r
-{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };\r
-const char http_header_200[84] = \r
-/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
-const char http_header_404[91] = \r
-/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
-const char http_content_type_plain[29] = \r
-/* "Content-type: text/plain\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_html[28] = \r
-/* "Content-type: text/html\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_css [27] = \r
-/* "Content-type: text/css\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_text[28] = \r
-/* "Content-type: text/text\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_png [28] = \r
-/* "Content-type: image/png\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_gif [28] = \r
-/* "Content-type: image/gif\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_jpg [29] = \r
-/* "Content-type: image/jpeg\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_binary[43] = \r
-/* "Content-type: application/octet-stream\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_html[6] = \r
-/* ".html" */\r
-{0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_shtml[7] = \r
-/* ".shtml" */\r
-{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_htm[5] = \r
-/* ".htm" */\r
-{0x2e, 0x68, 0x74, 0x6d, };\r
-const char http_css[5] = \r
-/* ".css" */\r
-{0x2e, 0x63, 0x73, 0x73, };\r
-const char http_png[5] = \r
-/* ".png" */\r
-{0x2e, 0x70, 0x6e, 0x67, };\r
-const char http_gif[5] = \r
-/* ".gif" */\r
-{0x2e, 0x67, 0x69, 0x66, };\r
-const char http_jpg[5] = \r
-/* ".jpg" */\r
-{0x2e, 0x6a, 0x70, 0x67, };\r
-const char http_text[5] = \r
-/* ".txt" */\r
-{0x2e, 0x74, 0x78, 0x74, };\r
-const char http_txt[5] = \r
-/* ".txt" */\r
-{0x2e, 0x74, 0x78, 0x74, };\r
+++ /dev/null
-extern const char http_http[8];\r
-extern const char http_200[5];\r
-extern const char http_301[5];\r
-extern const char http_302[5];\r
-extern const char http_get[5];\r
-extern const char http_10[9];\r
-extern const char http_11[9];\r
-extern const char http_content_type[15];\r
-extern const char http_texthtml[10];\r
-extern const char http_location[11];\r
-extern const char http_host[7];\r
-extern const char http_crnl[3];\r
-extern const char http_index_html[12];\r
-extern const char http_404_html[10];\r
-extern const char http_referer[9];\r
-extern const char http_header_200[84];\r
-extern const char http_header_404[91];\r
-extern const char http_content_type_plain[29];\r
-extern const char http_content_type_html[28];\r
-extern const char http_content_type_css [27];\r
-extern const char http_content_type_text[28];\r
-extern const char http_content_type_png [28];\r
-extern const char http_content_type_gif [28];\r
-extern const char http_content_type_jpg [29];\r
-extern const char http_content_type_binary[43];\r
-extern const char http_html[6];\r
-extern const char http_shtml[7];\r
-extern const char http_htm[5];\r
-extern const char http_css[5];\r
-extern const char http_png[5];\r
-extern const char http_gif[5];\r
-extern const char http_jpg[5];\r
-extern const char http_text[5];\r
-extern const char http_txt[5];\r
+++ /dev/null
-/**\r
- * \addtogroup httpd\r
- * @{\r
- */\r
-\r
-/**\r
- * \file\r
- * Web server script interface\r
- * \author\r
- * Adam Dunkels <adam@sics.se>\r
- *\r
- */\r
-\r
-/*\r
- * Copyright (c) 2001-2006, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $\r
- *\r
- */\r
-\r
-#include "uip.h"\r
-#include "psock.h"\r
-#include "httpd.h"\r
-#include "httpd-cgi.h"\r
-#include "httpd-fs.h"\r
-\r
-#include <stdio.h>\r
-#include <string.h>\r
-\r
-HTTPD_CGI_CALL(file, "file-stats", file_stats);\r
-HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);\r
-HTTPD_CGI_CALL(net, "net-stats", net_stats);\r
-HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );\r
-HTTPD_CGI_CALL(io, "led-io", led_io );\r
-\r
-\r
-static const struct httpd_cgi_call * const calls[] = { &file, &tcp, &net, &rtos, &io, NULL };\r
-\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-httpd_cgifunction\r
-httpd_cgi(char *name)\r
-{\r
- const struct httpd_cgi_call **f;\r
-\r
- /* Find the matching name in the table, return the function. */\r
- for(f = calls; *f != NULL; ++f) {\r
- if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {\r
- return (*f)->function;\r
- }\r
- }\r
- return nullfunction;\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static unsigned short\r
-generate_file_stats(void *arg)\r
-{\r
- char *f = (char *)arg;\r
- return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(file_stats(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static const char closed[] = /* "CLOSED",*/\r
-{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};\r
-static const char syn_rcvd[] = /* "SYN-RCVD",*/\r
-{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,\r
- 0x44, 0};\r
-static const char syn_sent[] = /* "SYN-SENT",*/\r
-{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,\r
- 0x54, 0};\r
-static const char established[] = /* "ESTABLISHED",*/\r
-{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,\r
- 0x45, 0x44, 0};\r
-static const char fin_wait_1[] = /* "FIN-WAIT-1",*/\r
-{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
- 0x54, 0x2d, 0x31, 0};\r
-static const char fin_wait_2[] = /* "FIN-WAIT-2",*/\r
-{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
- 0x54, 0x2d, 0x32, 0};\r
-static const char closing[] = /* "CLOSING",*/\r
-{0x43, 0x4c, 0x4f, 0x53, 0x49,\r
- 0x4e, 0x47, 0};\r
-static const char time_wait[] = /* "TIME-WAIT,"*/\r
-{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,\r
- 0x49, 0x54, 0};\r
-static const char last_ack[] = /* "LAST-ACK"*/\r
-{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,\r
- 0x4b, 0};\r
-\r
-static const char *states[] = {\r
- closed,\r
- syn_rcvd,\r
- syn_sent,\r
- established,\r
- fin_wait_1,\r
- fin_wait_2,\r
- closing,\r
- time_wait,\r
- last_ack};\r
-\r
-\r
-static unsigned short\r
-generate_tcp_stats(void *arg)\r
-{\r
- struct uip_conn *conn;\r
- struct httpd_state *s = (struct httpd_state *)arg;\r
-\r
- conn = &uip_conns[s->count];\r
- return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
- "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",\r
- htons(conn->lport),\r
- htons(conn->ripaddr[0]) >> 8,\r
- htons(conn->ripaddr[0]) & 0xff,\r
- htons(conn->ripaddr[1]) >> 8,\r
- htons(conn->ripaddr[1]) & 0xff,\r
- htons(conn->rport),\r
- states[conn->tcpstateflags & UIP_TS_MASK],\r
- conn->nrtx,\r
- conn->timer,\r
- (uip_outstanding(conn))? '*':' ',\r
- (uip_stopped(conn))? '!':' ');\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))\r
-{\r
-\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- for(s->count = 0; s->count < UIP_CONNS; ++s->count) {\r
- if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);\r
- }\r
- }\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static unsigned short\r
-generate_net_stats(void *arg)\r
-{\r
- struct httpd_state *s = (struct httpd_state *)arg;\r
- return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
- "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);\r
-}\r
-\r
-static\r
-PT_THREAD(net_stats(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
-\r
-#if UIP_STATISTICS\r
-\r
- for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);\r
- ++s->count) {\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);\r
- }\r
-\r
-#endif /* UIP_STATISTICS */\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-extern void vTaskList( char *pcWriteBuffer );\r
-static char cCountBuf[ 32 ];\r
-long lRefreshCount = 0;\r
-static unsigned short\r
-generate_rtos_stats(void *arg)\r
-{\r
- lRefreshCount++;\r
- sprintf( cCountBuf, "<p><br>Refresh count = %ld", lRefreshCount );\r
- vTaskList( ( char * ) uip_appdata );\r
- strcat( uip_appdata, cCountBuf );\r
-\r
- return strlen( uip_appdata );\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-\r
-static\r
-PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-char *pcStatus;\r
-unsigned long ulString;\r
-extern unsigned long uxParTextGetLED( unsigned long uxLED );\r
-\r
-static unsigned short generate_io_state( void *arg )\r
-{\r
- if( uxParTestGetLED() )\r
- {\r
- pcStatus = "checked";\r
- }\r
- else\r
- {\r
- pcStatus = "";\r
- }\r
-\r
- sprintf( uip_appdata,\r
- "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED DS4,"\\r
- "<p>",\r
- pcStatus );\r
-\r
- return strlen( uip_appdata );\r
-}\r
-\r
-static PT_THREAD(led_io(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);\r
- PSOCK_END(&s->sout);\r
-}\r
-\r
-/** @} */\r
-\r
-\r
-\r
-\r
-\r
-\r
+++ /dev/null
-/**\r
- * \addtogroup httpd\r
- * @{\r
- */\r
-\r
-/**\r
- * \file\r
- * Web server script interface header file\r
- * \author\r
- * Adam Dunkels <adam@sics.se>\r
- *\r
- */\r
-\r
-\r
-\r
-/*\r
- * Copyright (c) 2001, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- *\r
- */\r
-\r
-#ifndef __HTTPD_CGI_H__\r
-#define __HTTPD_CGI_H__\r
-\r
-#include "psock.h"\r
-#include "httpd.h"\r
-\r
-typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));\r
-\r
-httpd_cgifunction httpd_cgi(char *name);\r
-\r
-struct httpd_cgi_call {\r
- const char *name;\r
- const httpd_cgifunction function;\r
-};\r
-\r
-/**\r
- * \brief HTTPD CGI function declaration\r
- * \param name The C variable name of the function\r
- * \param str The string name of the function, used in the script file\r
- * \param function A pointer to the function that implements it\r
- *\r
- * This macro is used for declaring a HTTPD CGI\r
- * function. This function is then added to the list of\r
- * HTTPD CGI functions with the httpd_cgi_add() function.\r
- *\r
- * \hideinitializer\r
- */\r
-#define HTTPD_CGI_CALL(name, str, function) \\r
-static PT_THREAD(function(struct httpd_state *, char *)); \\r
-static const struct httpd_cgi_call name = {str, function}\r
-\r
-void httpd_cgi_init(void);\r
-#endif /* __HTTPD_CGI_H__ */\r
-\r
-/** @} */\r
+++ /dev/null
-/*\r
- * Copyright (c) 2001, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the lwIP TCP/IP stack.\r
- *\r
- * Author: Adam Dunkels <adam@sics.se>\r
- *\r
- * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $\r
- */\r
-\r
-#include "httpd.h"\r
-#include "httpd-fs.h"\r
-#include "httpd-fsdata.h"\r
-\r
-#ifndef NULL\r
-#define NULL 0\r
-#endif /* NULL */\r
-\r
-#include "httpd-fsdata.c"\r
-\r
-#if HTTPD_FS_STATISTICS\r
-static u16_t count[HTTPD_FS_NUMFILES];\r
-#endif /* HTTPD_FS_STATISTICS */\r
-\r
-/*-----------------------------------------------------------------------------------*/\r
-static u8_t\r
-httpd_fs_strcmp(const char *str1, const char *str2)\r
-{\r
- u8_t i;\r
- i = 0;\r
- loop:\r
-\r
- if(str2[i] == 0 ||\r
- str1[i] == '\r' ||\r
- str1[i] == '\n') {\r
- return 0;\r
- }\r
-\r
- if(str1[i] != str2[i]) {\r
- return 1;\r
- }\r
-\r
-\r
- ++i;\r
- goto loop;\r
-}\r
-/*-----------------------------------------------------------------------------------*/\r
-int\r
-httpd_fs_open(const char *name, struct httpd_fs_file *file)\r
-{\r
-#if HTTPD_FS_STATISTICS\r
- u16_t i = 0;\r
-#endif /* HTTPD_FS_STATISTICS */\r
- struct httpd_fsdata_file_noconst *f;\r
-\r
- for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
- f != NULL;\r
- f = (struct httpd_fsdata_file_noconst *)f->next) {\r
-\r
- if(httpd_fs_strcmp(name, f->name) == 0) {\r
- file->data = f->data;\r
- file->len = f->len;\r
-#if HTTPD_FS_STATISTICS\r
- ++count[i];\r
-#endif /* HTTPD_FS_STATISTICS */\r
- return 1;\r
- }\r
-#if HTTPD_FS_STATISTICS\r
- ++i;\r
-#endif /* HTTPD_FS_STATISTICS */\r
-\r
- }\r
- return 0;\r
-}\r
-/*-----------------------------------------------------------------------------------*/\r
-void\r
-httpd_fs_init(void)\r
-{\r
-#if HTTPD_FS_STATISTICS\r
- u16_t i;\r
- for(i = 0; i < HTTPD_FS_NUMFILES; i++) {\r
- count[i] = 0;\r
- }\r
-#endif /* HTTPD_FS_STATISTICS */\r
-}\r
-/*-----------------------------------------------------------------------------------*/\r
-#if HTTPD_FS_STATISTICS\r
-u16_t httpd_fs_count\r
-(char *name)\r
-{\r
- struct httpd_fsdata_file_noconst *f;\r
- u16_t i;\r
-\r
- i = 0;\r
- for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
- f != NULL;\r
- f = (struct httpd_fsdata_file_noconst *)f->next) {\r
-\r
- if(httpd_fs_strcmp(name, f->name) == 0) {\r
- return count[i];\r
- }\r
- ++i;\r
- }\r
- return 0;\r
-}\r
-#endif /* HTTPD_FS_STATISTICS */\r
-/*-----------------------------------------------------------------------------------*/\r
+++ /dev/null
-/*\r
- * Copyright (c) 2001, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the lwIP TCP/IP stack.\r
- *\r
- * Author: Adam Dunkels <adam@sics.se>\r
- *\r
- * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
- */\r
-#ifndef __HTTPD_FS_H__\r
-#define __HTTPD_FS_H__\r
-\r
-#define HTTPD_FS_STATISTICS 1\r
-\r
-struct httpd_fs_file {\r
- char *data;\r
- int len;\r
-};\r
-\r
-/* file must be allocated by caller and will be filled in\r
- by the function. */\r
-int httpd_fs_open(const char *name, struct httpd_fs_file *file);\r
-\r
-#ifdef HTTPD_FS_STATISTICS\r
-#if HTTPD_FS_STATISTICS == 1\r
-u16_t httpd_fs_count(char *name);\r
-#endif /* HTTPD_FS_STATISTICS */\r
-#endif /* HTTPD_FS_STATISTICS */\r
-\r
-void httpd_fs_init(void);\r
-\r
-#endif /* __HTTPD_FS_H__ */\r
+++ /dev/null
-<html>\r
- <body bgcolor="white">\r
- <center>\r
- <h1>404 - file not found</h1>\r
- <h3>Go <a href="/">here</a> instead.</h3>\r
- </center>\r
- </body>\r
-</html>
\ No newline at end of file
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY onLoad="window.setTimeout("location.href='index.shtml'",100)"bgcolor="#CCCCff">\r
-<font face="arial">\r
-Loading index.shtml. Click <a href="index.shtml">here</a> if not automatically redirected.\r
-</font>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY onLoad="window.setTimeout("location.href='index.shtml'",2000)"bgcolor="#CCCCff">\r
-<font face="arial">\r
-<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<br><p>\r
-<h2>Task statistics</h2>\r
-Page will refresh evey 2 seconds.<p>\r
-<font face="courier"><pre>Task State Priority Stack #<br>************************************************<br>\r
-%! rtos-stats\r
-</pre></font>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY bgcolor="#CCCCff">\r
-<font face="arial">\r
-<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<b>LED IO</b><br>\r
-\r
-<p>\r
-\r
-Use the check box to set the LED state, then click "Update IO" to send the new state to the microcontroller.\r
-\r
-\r
-<p>\r
-<form name="aForm" action="/io.shtml" method="get">\r
-%! led-io\r
-<p>\r
-<input type="submit" value="Update IO">\r
-</form>\r
-<br><p>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY bgcolor="#CCCCff">\r
-<font face="arial">\r
-<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<br><p>\r
-<h2>Network statistics</h2>\r
-<table width="300" border="0">\r
-<tr><td align="left"><font face="courier"><pre>\r
-IP Packets dropped\r
- Packets received\r
- Packets sent\r
-IP errors IP version/header length\r
- IP length, high byte\r
- IP length, low byte\r
- IP fragments\r
- Header checksum\r
- Wrong protocol\r
-ICMP Packets dropped\r
- Packets received\r
- Packets sent\r
- Type errors\r
-TCP Packets dropped\r
- Packets received\r
- Packets sent\r
- Checksum errors\r
- Data packets without ACKs\r
- Resets\r
- Retransmissions\r
- No connection avaliable\r
- Connection attempts to closed ports\r
-</pre></font></td><td><pre>%! net-stats\r
-</pre></table>\r
-</font>\r
-</body>\r
-</html>\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY bgcolor="#CCCCff">\r
-<font face="arial">\r
-<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<br>\r
-<h2>Network connections</h2>\r
-<p>\r
-<table>\r
-<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>\r
-%! tcp-connections\r
-</pre></font>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
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-static const unsigned char data_io_shtml[] = {
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-
-static const unsigned char data_tcp_shtml[] = {
- /* /tcp.shtml */
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- 0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd,
- 0xa, 0xd, 0xa, 0};
-
-const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};
-
-const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
-
-const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};
-
-const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};
-
-const struct httpd_fsdata_file file_stats_shtml[] = {{file_io_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};
-
-const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};
-
-#define HTTPD_FS_ROOT file_tcp_shtml
-
-#define HTTPD_FS_NUMFILES 6
+++ /dev/null
-/*\r
- * Copyright (c) 2001, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the lwIP TCP/IP stack.\r
- *\r
- * Author: Adam Dunkels <adam@sics.se>\r
- *\r
- * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
- */\r
-#ifndef __HTTPD_FSDATA_H__\r
-#define __HTTPD_FSDATA_H__\r
-\r
-#include "uip.h"\r
-\r
-struct httpd_fsdata_file {\r
- const struct httpd_fsdata_file *next;\r
- const char *name;\r
- const char *data;\r
- const int len;\r
-#ifdef HTTPD_FS_STATISTICS\r
-#if HTTPD_FS_STATISTICS == 1\r
- u16_t count;\r
-#endif /* HTTPD_FS_STATISTICS */\r
-#endif /* HTTPD_FS_STATISTICS */\r
-};\r
-\r
-struct httpd_fsdata_file_noconst {\r
- struct httpd_fsdata_file *next;\r
- char *name;\r
- char *data;\r
- int len;\r
-#ifdef HTTPD_FS_STATISTICS\r
-#if HTTPD_FS_STATISTICS == 1\r
- u16_t count;\r
-#endif /* HTTPD_FS_STATISTICS */\r
-#endif /* HTTPD_FS_STATISTICS */\r
-};\r
-\r
-#endif /* __HTTPD_FSDATA_H__ */\r
+++ /dev/null
-/*$T httpd.c GC 1.138 11/17/07 13:10:22 */\r
-\r
-/*\r
- * \addtogroup apps @{ £\r
- * \defgroup httpd Web server @{ The uIP web server is a very simplistic\r
- * implementation of an HTTP server. It can serve web pages and files from a\r
- * read-only ROM filesystem, and provides a very small scripting language. £\r
- * \file Web server \author Adam Dunkels <adam@sics.se> £\r
- * Copyright (c) 2004, Adam Dunkels. All rights reserved. Redistribution and use\r
- * in source and binary forms, with or without modification, are permitted\r
- * provided that the following conditions are met: 1. Redistributions of source\r
- * code must retain the above copyright notice, this list of conditions and the\r
- * following disclaimer. 2. Redistributions in binary form must reproduce the\r
- * above copyright notice, this list of conditions and the following disclaimer in\r
- * the documentation and/or other materials provided with the distribution. 3.\r
- * Neither the name of the Institute nor the names of its contributors may be used\r
- * to endorse or promote products derived from this software without specific\r
- * prior written permission. THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND\r
- * CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT\r
- * NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A\r
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR\r
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT\r
- * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING\r
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY\r
- * OF SUCH DAMAGE. This file is part of the uIP TCP/IP stack. Author: Adam Dunkels\r
- * <adam@sics.se> $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- */\r
-#include "uip.h"\r
-#include "httpd.h"\r
-#include "httpd-fs.h"\r
-#include "httpd-cgi.h"\r
-#include "http-strings.h"\r
-\r
-#include <string.h>\r
-\r
-#define STATE_WAITING 0\r
-#define STATE_OUTPUT 1\r
-\r
-#define ISO_nl 0x0a\r
-#define ISO_space 0x20\r
-#define ISO_bang 0x21\r
-#define ISO_percent 0x25\r
-#define ISO_period 0x2e\r
-#define ISO_slash 0x2f\r
-#define ISO_colon 0x3a\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static unsigned short generate_part_of_file(void *state)\r
-{\r
- /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/\r
- struct httpd_state *s = (struct httpd_state *) state;\r
- /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/\r
-\r
- if(s->file.len > uip_mss())\r
- {\r
- s->len = uip_mss();\r
- }\r
- else\r
- {\r
- s->len = s->file.len;\r
- }\r
-\r
- memcpy(uip_appdata, s->file.data, s->len);\r
-\r
- return s->len;\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static PT_THREAD(send_file (struct httpd_state *s))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- do\r
- {\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);\r
- s->file.len -= s->len;\r
- s->file.data += s->len;\r
- } while(s->file.len > 0);\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static PT_THREAD(send_part_of_file (struct httpd_state *s))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- PSOCK_SEND(&s->sout, s->file.data, s->len);\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static void next_scriptstate(struct httpd_state *s)\r
-{\r
- /*~~~~~~~*/\r
- char *p;\r
- /*~~~~~~~*/\r
-\r
- p = strchr(s->scriptptr, ISO_nl) + 1;\r
- s->scriptlen -= (unsigned short) (p - s->scriptptr);\r
- s->scriptptr = p;\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static PT_THREAD(handle_script (struct httpd_state *s))\r
-{\r
- /*~~~~~~~~~*/\r
- char *ptr;\r
- /*~~~~~~~~~*/\r
-\r
- PT_BEGIN(&s->scriptpt);\r
-\r
- while(s->file.len > 0)\r
- {\r
- /* Check if we should start executing a script. */\r
- if(*s->file.data == ISO_percent && *(s->file.data + 1) == ISO_bang)\r
- {\r
- s->scriptptr = s->file.data + 3;\r
- s->scriptlen = s->file.len - 3;\r
- if(*(s->scriptptr - 1) == ISO_colon)\r
- {\r
- httpd_fs_open(s->scriptptr + 1, &s->file);\r
- PT_WAIT_THREAD(&s->scriptpt, send_file(s));\r
- }\r
- else\r
- {\r
- PT_WAIT_THREAD(&s->scriptpt, httpd_cgi(s->scriptptr) (s, s->scriptptr));\r
- }\r
-\r
- next_scriptstate(s);\r
-\r
- /*\r
- * The script is over, so we reset the pointers and continue sending the rest of\r
- * the file.\r
- */\r
- s->file.data = s->scriptptr;\r
- s->file.len = s->scriptlen;\r
- }\r
- else\r
- {\r
- /* See if we find the start of script marker in the block of HTML to be sent. */\r
- if(s->file.len > uip_mss())\r
- {\r
- s->len = uip_mss();\r
- }\r
- else\r
- {\r
- s->len = s->file.len;\r
- }\r
-\r
- if(*s->file.data == ISO_percent)\r
- {\r
- ptr = strchr(s->file.data + 1, ISO_percent);\r
- }\r
- else\r
- {\r
- ptr = strchr(s->file.data, ISO_percent);\r
- }\r
-\r
- if(ptr != NULL && ptr != s->file.data)\r
- {\r
- s->len = (int) (ptr - s->file.data);\r
- if(s->len >= uip_mss())\r
- {\r
- s->len = uip_mss();\r
- }\r
- }\r
-\r
- PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));\r
- s->file.data += s->len;\r
- s->file.len -= s->len;\r
- }\r
- }\r
-\r
- PT_END(&s->scriptpt);\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static PT_THREAD(send_headers (struct httpd_state *s, const char *statushdr))\r
-{\r
- /*~~~~~~~~~*/\r
- char *ptr;\r
- /*~~~~~~~~~*/\r
-\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- PSOCK_SEND_STR(&s->sout, statushdr);\r
-\r
- ptr = strrchr(s->filename, ISO_period);\r
- if(ptr == NULL)\r
- {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_binary);\r
- }\r
- else if(strncmp(http_html, ptr, 5) == 0 || strncmp(http_shtml, ptr, 6) == 0)\r
- {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_html);\r
- }\r
- else if(strncmp(http_css, ptr, 4) == 0)\r
- {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_css);\r
- }\r
- else if(strncmp(http_png, ptr, 4) == 0)\r
- {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_png);\r
- }\r
- else if(strncmp(http_gif, ptr, 4) == 0)\r
- {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_gif);\r
- }\r
- else if(strncmp(http_jpg, ptr, 4) == 0)\r
- {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_jpg);\r
- }\r
- else\r
- {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_plain);\r
- }\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static PT_THREAD(handle_output (struct httpd_state *s))\r
-{\r
- /*~~~~~~~~~*/\r
- char *ptr;\r
- /*~~~~~~~~~*/\r
-\r
- PT_BEGIN(&s->outputpt);\r
-\r
- if(!httpd_fs_open(s->filename, &s->file))\r
- {\r
- httpd_fs_open(http_404_html, &s->file);\r
- strcpy(s->filename, http_404_html);\r
- PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_404));\r
- PT_WAIT_THREAD(&s->outputpt, send_file(s));\r
- }\r
- else\r
- {\r
- PT_WAIT_THREAD(&s->outputpt, send_headers(s, http_header_200));\r
- ptr = strchr(s->filename, ISO_period);\r
- if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0)\r
- {\r
- vProcessInput( s->filename );\r
- PT_INIT(&s->scriptpt);\r
- PT_WAIT_THREAD(&s->outputpt, handle_script(s));\r
- }\r
- else\r
- {\r
- PT_WAIT_THREAD(&s->outputpt, send_file(s));\r
- }\r
- }\r
-\r
- PSOCK_CLOSE(&s->sout);\r
- PT_END(&s->outputpt);\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static PT_THREAD(handle_input (struct httpd_state *s))\r
-{\r
- PSOCK_BEGIN(&s->sin);\r
-\r
- PSOCK_READTO(&s->sin, ISO_space);\r
-\r
- if(strncmp(s->inputbuf, http_get, 4) != 0)\r
- {\r
- PSOCK_CLOSE_EXIT(&s->sin);\r
- }\r
-\r
- PSOCK_READTO(&s->sin, ISO_space);\r
-\r
- if(s->inputbuf[0] != ISO_slash)\r
- {\r
- PSOCK_CLOSE_EXIT(&s->sin);\r
- }\r
-\r
- if(s->inputbuf[1] == ISO_space)\r
- {\r
- strncpy(s->filename, http_index_html, sizeof(s->filename));\r
- }\r
- else\r
- {\r
- s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;\r
-\r
- /* Process any form input being sent to the server. */\r
- {\r
- /*\r
- * extern void vApplicationProcessFormInput( char *pcInputString, long\r
- * xInputLength ); £\r
- * vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );\r
- */\r
- }\r
-\r
- strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));\r
- }\r
-\r
- /* httpd_log_file(uip_conn->ripaddr, s->filename); */\r
- s->state = STATE_OUTPUT;\r
-\r
- while(1)\r
- {\r
- PSOCK_READTO(&s->sin, ISO_nl);\r
-\r
- if(strncmp(s->inputbuf, http_referer, 8) == 0)\r
- {\r
- s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;\r
-\r
- /* httpd_log(&s->inputbuf[9]); */\r
- }\r
- }\r
-\r
- PSOCK_END(&s->sin);\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-static void handle_connection(struct httpd_state *s)\r
-{\r
- handle_input(s);\r
- if(s->state == STATE_OUTPUT)\r
- {\r
- handle_output(s);\r
- }\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- =======================================================================================================================\r
- */\r
-void httpd_appcall(void)\r
-{\r
- /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/\r
- struct httpd_state *s = (struct httpd_state *) &(uip_conn->appstate);\r
- /*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/\r
-\r
- if(uip_closed() || uip_aborted() || uip_timedout())\r
- {\r
- }\r
- else if(uip_connected())\r
- {\r
- PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);\r
- PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);\r
- PT_INIT(&s->outputpt);\r
- s->state = STATE_WAITING;\r
-\r
- /* timer_set(&s->timer, CLOCK_SECOND * 100); */\r
- s->timer = 0;\r
- handle_connection(s);\r
- }\r
- else if(s != NULL)\r
- {\r
- if(uip_poll())\r
- {\r
- ++s->timer;\r
- if(s->timer >= 20)\r
- {\r
- uip_abort();\r
- }\r
- }\r
- else\r
- {\r
- s->timer = 0;\r
- }\r
-\r
- handle_connection(s);\r
- }\r
- else\r
- {\r
- uip_abort();\r
- }\r
-}\r
-\r
-/*\r
- =======================================================================================================================\r
- \brief Initialize the web server This function initializes the web server and should be called at system boot-up.\r
- =======================================================================================================================\r
- */\r
-void httpd_init(void)\r
-{\r
- uip_listen(HTONS(80));\r
-}\r
-\r
-/* @} */\r
+++ /dev/null
-/*\r
- * Copyright (c) 2001-2005, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- *\r
- */\r
-\r
-#ifndef __HTTPD_H__\r
-#define __HTTPD_H__\r
-\r
-#include "psock.h"\r
-#include "httpd-fs.h"\r
-\r
-struct httpd_state {\r
- unsigned char timer;\r
- struct psock sin, sout;\r
- struct pt outputpt, scriptpt;\r
- char inputbuf[50];\r
- char filename[20];\r
- char state;\r
- struct httpd_fs_file file;\r
- int len;\r
- char *scriptptr;\r
- int scriptlen;\r
- \r
- unsigned short count;\r
-};\r
-\r
-void httpd_init(void);\r
-void httpd_appcall(void);\r
-\r
-void httpd_log(char *msg);\r
-void httpd_log_file(u16_t *requester, char *file);\r
-\r
-#endif /* __HTTPD_H__ */\r
+++ /dev/null
-#!/usr/bin/perl\r
-\r
-open(OUTPUT, "> httpd-fsdata.c");\r
-\r
-chdir("httpd-fs");\r
-\r
-opendir(DIR, ".");\r
-@files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
-closedir(DIR);\r
-\r
-foreach $file (@files) { \r
- \r
- if(-d $file && $file !~ /^\./) {\r
- print "Processing directory $file\n";\r
- opendir(DIR, $file);\r
- @newfiles = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
- closedir(DIR);\r
- printf "Adding files @newfiles\n";\r
- @files = (@files, map { $_ = "$file/$_" } @newfiles);\r
- next;\r
- }\r
-}\r
-\r
-foreach $file (@files) {\r
- if(-f $file) {\r
- \r
- print "Adding file $file\n";\r
- \r
- open(FILE, $file) || die "Could not open file $file\n";\r
-\r
- $file =~ s-^-/-;\r
- $fvar = $file;\r
- $fvar =~ s-/-_-g;\r
- $fvar =~ s-\.-_-g;\r
- # for AVR, add PROGMEM here\r
- print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");\r
- print(OUTPUT "\t/* $file */\n\t");\r
- for($j = 0; $j < length($file); $j++) {\r
- printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));\r
- }\r
- printf(OUTPUT "0,\n");\r
- \r
- \r
- $i = 0; \r
- while(read(FILE, $data, 1)) {\r
- if($i == 0) {\r
- print(OUTPUT "\t");\r
- }\r
- printf(OUTPUT "%#02x, ", unpack("C", $data));\r
- $i++;\r
- if($i == 10) {\r
- print(OUTPUT "\n");\r
- $i = 0;\r
- }\r
- }\r
- print(OUTPUT "0};\n\n");\r
- close(FILE);\r
- push(@fvars, $fvar);\r
- push(@pfiles, $file);\r
- }\r
-}\r
-\r
-for($i = 0; $i < @fvars; $i++) {\r
- $file = $pfiles[$i];\r
- $fvar = $fvars[$i];\r
-\r
- if($i == 0) {\r
- $prevfile = "NULL";\r
- } else {\r
- $prevfile = "file" . $fvars[$i - 1];\r
- }\r
- print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");\r
- print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");\r
- print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");\r
-}\r
-\r
-print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");\r
-print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");\r
+++ /dev/null
-#!/usr/bin/perl\r
-\r
-\r
-sub stringify {\r
- my $name = shift(@_);\r
- open(OUTPUTC, "> $name.c");\r
- open(OUTPUTH, "> $name.h");\r
- \r
- open(FILE, "$name");\r
- \r
- while(<FILE>) {\r
- if(/(.+) "(.+)"/) {\r
- $var = $1;\r
- $data = $2;\r
- \r
- $datan = $data;\r
- $datan =~ s/\\r/\r/g;\r
- $datan =~ s/\\n/\n/g;\r
- $datan =~ s/\\01/\01/g; \r
- $datan =~ s/\\0/\0/g;\r
- \r
- printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);\r
- printf(OUTPUTC "/* \"$data\" */\n");\r
- printf(OUTPUTC "{");\r
- for($j = 0; $j < length($datan); $j++) {\r
- printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));\r
- }\r
- printf(OUTPUTC "};\n");\r
- \r
- printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);\r
- \r
- }\r
- }\r
- close(OUTPUTC);\r
- close(OUTPUTH);\r
-}\r
-stringify("http-strings");\r
-\r
-exit 0;\r
-\r
+++ /dev/null
-/*\r
- * Modified from an original work that is Copyright (c) 2001-2003, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * $Id: main.c,v 1.10.2.4 2003/10/21 21:27:51 adam Exp $\r
- *\r
- */\r
-\r
-/* Standard includes. */\r
-#include <stdlib.h>\r
-#include <string.h>\r
-#include <stdio.h>\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "semphr.h"\r
-\r
-/* uip includes. */\r
-#include "uip.h"\r
-#include "uip_arp.h"\r
-#include "httpd.h"\r
-#include "timer.h"\r
-#include "clock-arch.h"\r
-\r
-/* Demo includes. */\r
-#include "SAM7_EMAC.h"\r
-#include "partest.h"\r
-\r
-/* How long to wait before attempting to connect the MAC again. */\r
-#define uipINIT_WAIT ( 100 / portTICK_PERIOD_MS )\r
-\r
-/* Shortcut to the header within the Rx buffer. */\r
-#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
-\r
-/* The semaphore used by the ISR to wake the uIP task. */\r
-static SemaphoreHandle_t xEMACSemaphore;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void vuIP_Task( void *pvParameters )\r
-{\r
-portBASE_TYPE i;\r
-uip_ipaddr_t xIPAddr;\r
-struct timer periodic_timer, arp_timer;\r
-\r
- /* Initialise the uIP stack. */\r
- timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );\r
- timer_set( &arp_timer, configTICK_RATE_HZ * 10 );\r
- uip_init();\r
- uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );\r
- uip_sethostaddr( xIPAddr );\r
- httpd_init();\r
-\r
- /* Initialise the MAC. */\r
- do\r
- {\r
- vTaskDelay( uipINIT_WAIT );\r
- xEMACSemaphore = xEMACInit(); \r
- } while( xEMACSemaphore == NULL );\r
-\r
- for( ;; )\r
- {\r
- /* Is there received data ready to be processed? */\r
- uip_len = ulEMACPoll();\r
- \r
- if( uip_len > 0 )\r
- {\r
- /* Standard uIP loop taken from the uIP manual. */\r
- if( xHeader->type == htons( UIP_ETHTYPE_IP ) )\r
- {\r
- uip_arp_ipin();\r
- uip_input();\r
-\r
- /* If the above function invocation resulted in data that \r
- should be sent out on the network, the global variable \r
- uip_len is set to a value > 0. */\r
- if( uip_len > 0 )\r
- {\r
- uip_arp_out();\r
- lEMACSend();\r
- }\r
- }\r
- else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )\r
- {\r
- uip_arp_arpin();\r
-\r
- /* If the above function invocation resulted in data that \r
- should be sent out on the network, the global variable \r
- uip_len is set to a value > 0. */\r
- if( uip_len > 0 )\r
- {\r
- lEMACSend();\r
- }\r
- }\r
- }\r
- else\r
- {\r
- if( timer_expired( &periodic_timer ) )\r
- {\r
- timer_reset( &periodic_timer );\r
- for( i = 0; i < UIP_CONNS; i++ )\r
- {\r
- uip_periodic( i );\r
- \r
- /* If the above function invocation resulted in data that \r
- should be sent out on the network, the global variable \r
- uip_len is set to a value > 0. */\r
- if( uip_len > 0 )\r
- {\r
- uip_arp_out();\r
- lEMACSend();\r
- }\r
- } \r
- \r
- /* Call the ARP timer function every 10 seconds. */\r
- if( timer_expired( &arp_timer ) )\r
- {\r
- timer_reset( &arp_timer );\r
- uip_arp_timer();\r
- }\r
- }\r
- else\r
- { \r
- /* We did not receive a packet, and there was no periodic\r
- processing to perform. Block for a fixed period. If a packet\r
- is received during this period we will be woken by the ISR\r
- giving us the Semaphore. */\r
- xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 ); \r
- }\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------------------------------*/\r
-\r
-void clock_init(void)\r
-{\r
- /* This is done when the scheduler starts. */\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-clock_time_t clock_time( void )\r
-{\r
- return xTaskGetTickCount();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vProcessInput( char *pcInput )\r
-{\r
-char *c;\r
-\r
- /* Turn the LED on or off depending on the checkbox status. */\r
-\r
- c = strstr( pcInput, "?" );\r
- if( c )\r
- {\r
- if( strstr( c, "LED0=1" ) != NULL )\r
- {\r
- vParTestSetLED( 3, 0 );\r
- }\r
- else\r
- {\r
- vParTestSetLED( 3, 1 );\r
- } \r
- }\r
-}\r
-\r
-\r
-\r
-\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef UIP_TASK_H\r
-#define UIP_TASK_H\r
-\r
-/* The task that handles all uIP data. */\r
-void vuIP_Task( void *pvParameters );\r
-\r
-#endif\r
-\r
+++ /dev/null
-/**\r
- * \addtogroup uipopt\r
- * @{\r
- */\r
-\r
-/**\r
- * \name Project-specific configuration options\r
- * @{\r
- *\r
- * uIP has a number of configuration options that can be overridden\r
- * for each project. These are kept in a project-specific uip-conf.h\r
- * file and all configuration names have the prefix UIP_CONF.\r
- */\r
-\r
-/*\r
- * Copyright (c) 2006, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack\r
- *\r
- * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $\r
- */\r
-\r
-/**\r
- * \file\r
- * An example uIP configuration file\r
- * \author\r
- * Adam Dunkels <adam@sics.se>\r
- */\r
-\r
-#ifndef __UIP_CONF_H__\r
-#define __UIP_CONF_H__\r
-\r
-#include <stdint.h>\r
-\r
-/**\r
- * 8 bit datatype\r
- *\r
- * This typedef defines the 8-bit type used throughout uIP.\r
- *\r
- * \hideinitializer\r
- */\r
-typedef uint8_t u8_t;\r
-\r
-/**\r
- * 16 bit datatype\r
- *\r
- * This typedef defines the 16-bit type used throughout uIP.\r
- *\r
- * \hideinitializer\r
- */\r
-typedef uint16_t u16_t;\r
-\r
-/**\r
- * Statistics datatype\r
- *\r
- * This typedef defines the dataype used for keeping statistics in\r
- * uIP.\r
- *\r
- * \hideinitializer\r
- */\r
-typedef unsigned short uip_stats_t;\r
-\r
-/**\r
- * Maximum number of TCP connections.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_MAX_CONNECTIONS 40\r
-\r
-/**\r
- * Maximum number of listening TCP ports.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_MAX_LISTENPORTS 40\r
-\r
-/**\r
- * uIP buffer size.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_BUFFER_SIZE 1480\r
-\r
-/**\r
- * CPU byte order.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_BYTE_ORDER LITTLE_ENDIAN\r
-\r
-/**\r
- * Logging on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_LOGGING 0\r
-\r
-/**\r
- * UDP support on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_UDP 0\r
-\r
-/**\r
- * UDP checksums on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_UDP_CHECKSUMS 1\r
-\r
-/**\r
- * uIP statistics on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_STATISTICS 1\r
-\r
-/* Here we include the header file for the application(s) we use in\r
- our project. */\r
-/*#include "smtp.h"*/\r
-/*#include "hello-world.h"*/\r
-/*#include "telnetd.h"*/\r
-#include "webserver.h"\r
-/*#include "dhcpc.h"*/\r
-/*#include "resolv.h"*/\r
-/*#include "webclient.h"*/\r
-\r
-#endif /* __UIP_CONF_H__ */\r
-\r
-/** @} */\r
-/** @} */\r
+++ /dev/null
-/*\r
- * Copyright (c) 2002, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above\r
- * copyright notice, this list of conditions and the following\r
- * disclaimer in the documentation and/or other materials provided\r
- * with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack\r
- *\r
- * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- *\r
- */\r
-#ifndef __WEBSERVER_H__\r
-#define __WEBSERVER_H__\r
-\r
-#include "httpd.h"\r
-\r
-typedef struct httpd_state uip_tcp_appstate_t;\r
-/* UIP_APPCALL: the name of the application function. This function\r
- must return void and take no arguments (i.e., C type "void\r
- appfunc(void)"). */\r
-#ifndef UIP_APPCALL\r
-#define UIP_APPCALL httpd_appcall\r
-#endif\r
-\r
-\r
-#endif /* __WEBSERVER_H__ */\r
--- /dev/null
+If you need the demo that used to be in this directory then download FreeRTOS V8.2.3\r
+from http://sourceforge.net/projects/freertos/files/FreeRTOS/\r
+\r
+++ /dev/null
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface parport\r
-parport_port 0x378\r
-parport_cable wiggler\r
-jtag_speed 2\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config trst_and_srst srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-working_area 0 0x40000000 0x40000 nobackup\r
-\r
-#flash configuration\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-target_script 0 reset program.script\r
+++ /dev/null
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface parport\r
-parport_port 0x378\r
-parport_cable wiggler\r
-jtag_speed 2\r
-reset_config srst_only\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little reset_halt 0 arm7tdmi\r
-target_script 0 reset at91sam7_ecr.script\r
-working_area 0 0x40000000 0x40000 nobackup\r
-\r
-#flash configuration\r
-flash bank at91sam7 0 0 0 0 0\r
+++ /dev/null
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-#interface
-interface at91rm9200
-at91rm9200_device rea_ecr
-jtag_speed 0
-reset_config srst_only
-
-#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-#target configuration
-daemon_startup reset
-
-#target <type> <startup mode>
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
-target arm7tdmi little reset_halt 0 arm7tdmi
-target_script 0 reset at91sam7_ecr.script
-working_area 0 0x40000000 0x40000 nobackup
-
-#flash configuration
-flash bank at91sam7 0 0 0 0 0
+++ /dev/null
-halt\r
-wait_halt\r
-sleep 10\r
-mww 0xfffffd44 0x00008000 # disable watchdog
-mww 0xfffffd08 0xa5000001 # enable user reset
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
-sleep 10
-mww 0xfffffc2c 0x12560a64 # CKGR_PLLR: 119.8MHz (DIV=100,MUL=598+1)
-sleep 10
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 = 59.9MHz
-sleep 10
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
-arm7_9 force_hw_bkpts enable # program resides in flash
+++ /dev/null
-arm7_9 dcc_downloads enable\r
-halt\r
-wait_halt\r
-sleep 10\r
-poll\r
-flash probe 0\r
-#flash protect 0 0 26 'off'\r
-flash erase 0 0 15\r
-flash write 0 ./RTOSDemo/RTOSDemo.bin 0x0\r
-sleep 10\r
-shutdown\r
+++ /dev/null
-*** SESSION Aug 19, 2007 15:19:16.906 ------------------------------------------\r
-*** SESSION Aug 19, 2007 20:47:55.734 ------------------------------------------\r
-*** SESSION Aug 19, 2007 20:58:19.953 ------------------------------------------\r
-*** SESSION Aug 20, 2007 10:30:54.968 ------------------------------------------\r
-*** SESSION Aug 20, 2007 15:43:10.859 ------------------------------------------\r
-*** SESSION Aug 21, 2007 13:05:50.828 ------------------------------------------\r
-*** SESSION Aug 21, 2007 19:01:46.812 ------------------------------------------\r
-*** SESSION Aug 22, 2007 14:47:56.156 ------------------------------------------\r
-*** SESSION Aug 23, 2007 11:52:49.406 ------------------------------------------\r
-*** SESSION Aug 23, 2007 19:24:16.984 ------------------------------------------\r
-*** SESSION Aug 23, 2007 22:26:06.78 -------------------------------------------\r
-*** SESSION Aug 24, 2007 12:43:08.578 ------------------------------------------\r
-*** SESSION Aug 24, 2007 17:08:36.187 ------------------------------------------\r
-*** SESSION Aug 26, 2007 11:13:57.906 ------------------------------------------\r
-*** SESSION Aug 26, 2007 14:24:42.656 ------------------------------------------\r
-*** SESSION Aug 26, 2007 14:34:02.93 -------------------------------------------\r
-*** SESSION Aug 26, 2007 17:35:44.937 ------------------------------------------\r
-*** SESSION Aug 27, 2007 10:56:42.953 ------------------------------------------\r
-*** SESSION Aug 27, 2007 13:13:37.593 ------------------------------------------\r
-*** SESSION May 19, 2009 12:45:26.544 ------------------------------------------\r
-*** SESSION May 19, 2009 14:04:21.908 ------------------------------------------\r
-*** SESSION May 19, 2009 14:10:00.66 -------------------------------------------\r
-*** SESSION May 21, 2009 13:38:50.32 -------------------------------------------\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8" standalone="no"?><SharedRoot><SharedProperty id="" value=""/></SharedRoot>
\ No newline at end of file
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
-<?scdStore version="2"?>\r
-\r
-<scannerInfo id="org.eclipse.cdt.make.core.discoveredScannerInfo">\r
-<instance id="0.1109417601">\r
-<collector id="org.eclipse.cdt.make.core.PerProjectSICollector">\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy3/Source/include"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy3/Source/portable/GCC/ARM_CM3"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/Common/include"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/Common/ethernet/uIP/uip-1.0/uip"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/CORTEX_LM3Sxxxx_Eclipse/RTOSDemo/webserver"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/Common/drivers/LuminaryMicro"/>\r
-<includePath path="c:\devtools\codesourcery\sourcery g++ lite arm\bin\../lib/gcc/arm-none-eabi/4.3.2/include"/>\r
-<includePath path="c:\devtools\codesourcery\sourcery g++ lite arm\bin\../lib/gcc/arm-none-eabi/4.3.2/include-fixed"/>\r
-<includePath path="c:\devtools\codesourcery\sourcery g++ lite arm\bin\../lib/gcc/arm-none-eabi/4.3.2/../../../../arm-none-eabi/include"/>\r
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-<includePath path="c:/devtools/codesourcery/sourcery g++ lite/lib/gcc/../../lib/gcc/arm-none-eabi/4.2.0/../../../../arm-none-eabi/include"/>\r
-<definedSymbol symbol="__STDC__=1"/>\r
-<definedSymbol symbol="__STDC_HOSTED__=1"/>\r
-<definedSymbol symbol="__GNUC__=4"/>\r
-<definedSymbol symbol="__GNUC_MINOR__=2"/>\r
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-<definedSymbol symbol="__GNUC_PATCHLEVEL__=2"/>\r
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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-#Sun Aug 19 20:36:58 BST 2007\r
-eclipse.preferences.version=1\r
-org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef FREERTOS_CONFIG_H\r
-#define FREERTOS_CONFIG_H\r
-\r
-/*-----------------------------------------------------------\r
- * Application specific definitions.\r
- *\r
- * These definitions should be adjusted for your particular hardware and\r
- * application requirements.\r
- *\r
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
- *\r
- * See http://www.freertos.org/a00110.html.\r
- *----------------------------------------------------------*/\r
-\r
-#define configUSE_PREEMPTION 1\r
-#define configUSE_IDLE_HOOK 0\r
-#define configUSE_TICK_HOOK 1\r
-#define configCPU_CLOCK_HZ ( ( unsigned long ) 50000000 )\r
-#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )\r
-#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 80 )\r
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 24000 ) )\r
-#define configMAX_TASK_NAME_LEN ( 12 )\r
-#define configUSE_TRACE_FACILITY 1\r
-#define configUSE_16_BIT_TICKS 0\r
-#define configIDLE_SHOULD_YIELD 0\r
-#define configUSE_CO_ROUTINES 0\r
-#define configUSE_MUTEXES 1\r
-#define configCHECK_FOR_STACK_OVERFLOW 2\r
-#define configUSE_RECURSIVE_MUTEXES 1\r
-#define configQUEUE_REGISTRY_SIZE 10\r
-#define configGENERATE_RUN_TIME_STATS 1\r
-\r
-#define configMAX_PRIORITIES ( 5 )\r
-#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
-\r
-/* Set the following definitions to 1 to include the API function, or zero\r
-to exclude the API function. */\r
-\r
-#define INCLUDE_vTaskPrioritySet 1\r
-#define INCLUDE_uxTaskPriorityGet 1\r
-#define INCLUDE_vTaskDelete 1\r
-#define INCLUDE_vTaskCleanUpResources 0\r
-#define INCLUDE_vTaskSuspend 1\r
-#define INCLUDE_vTaskDelayUntil 1\r
-#define INCLUDE_vTaskDelay 1\r
-#define INCLUDE_uxTaskGetStackHighWaterMark 1\r
-#define INCLUDE_eTaskGetState 1\r
-\r
-/* This demo makes use of one or more example stats formatting functions. These\r
-format the raw data provided by the uxTaskGetSystemState() function in to human\r
-readable ASCII form. See the notes in the implementation of vTaskList() within \r
-FreeRTOS/Source/tasks.c for limitations. */\r
-#define configUSE_STATS_FORMATTING_FUNCTIONS 1\r
-\r
-#define configKERNEL_INTERRUPT_PRIORITY ( ( unsigned char ) 7 << ( unsigned char ) 5 ) /* Priority 7, or 255 as only the top three bits are implemented. This is the lowest priority. */\r
-/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!\r
-See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */\r
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( ( unsigned char ) 5 << ( unsigned char ) 5 ) /* Priority 5, or 160 as only the top three bits are implemented. */\r
-\r
-extern volatile unsigned long ulHighFrequencyTimerTicks;\r
-/* There is already a high frequency timer running - just reset its count back\r
-to zero. */\r
-#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() ( ulHighFrequencyTimerTicks = 0UL )\r
-#define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTimerTicks\r
-\r
-#endif /* FREERTOS_CONFIG_H */\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-\r
-/* Demo includes. */\r
-#include "IntQueueTimer.h"\r
-#include "IntQueue.h"\r
-\r
-/* Library includes. */\r
-#include "hw_ints.h"\r
-#include "hw_memmap.h"\r
-#include "hw_types.h"\r
-#include "interrupt.h"\r
-#include "sysctl.h"\r
-#include "lmi_timer.h"\r
-\r
-#define tmrTIMER_2_FREQUENCY ( 2000UL )\r
-#define tmrTIMER_3_FREQUENCY ( 2001UL )\r
-\r
-void vInitialiseTimerForIntQueueTest( void )\r
-{\r
-unsigned long ulFrequency;\r
-\r
- /* Timer 2 and 3 are utilised for this test. */\r
- SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER2 );\r
- SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER3 );\r
- TimerConfigure( TIMER2_BASE, TIMER_CFG_32_BIT_PER );\r
- TimerConfigure( TIMER3_BASE, TIMER_CFG_32_BIT_PER );\r
- \r
- /* Set the timer interrupts to be above the kernel. The interrupts are\r
- assigned different priorities so they nest with each other. */\r
- IntPrioritySet( INT_TIMER2A, configMAX_SYSCALL_INTERRUPT_PRIORITY + ( 1 << 5 ) ); /* Shift left 5 as only the top 3 bits are implemented. */\r
- IntPrioritySet( INT_TIMER3A, configMAX_SYSCALL_INTERRUPT_PRIORITY );\r
-\r
- /* Ensure interrupts do not start until the scheduler is running. */\r
- portDISABLE_INTERRUPTS();\r
- \r
- /* The rate at which the timers will interrupt. */\r
- ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_2_FREQUENCY; \r
- TimerLoadSet( TIMER2_BASE, TIMER_A, ulFrequency );\r
- IntEnable( INT_TIMER2A );\r
- TimerIntEnable( TIMER2_BASE, TIMER_TIMA_TIMEOUT );\r
-\r
- /* The rate at which the timers will interrupt. */\r
- ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_3_FREQUENCY; \r
- TimerLoadSet( TIMER3_BASE, TIMER_A, ulFrequency );\r
- IntEnable( INT_TIMER3A );\r
- TimerIntEnable( TIMER3_BASE, TIMER_TIMA_TIMEOUT );\r
-\r
- /* Enable both timers. */ \r
- TimerEnable( TIMER2_BASE, TIMER_A );\r
- TimerEnable( TIMER3_BASE, TIMER_A );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vT2InterruptHandler( void )\r
-{\r
- TimerIntClear( TIMER2_BASE, TIMER_TIMA_TIMEOUT ); \r
- portEND_SWITCHING_ISR( xFirstTimerHandler() );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vT3InterruptHandler( void )\r
-{\r
- TimerIntClear( TIMER3_BASE, TIMER_TIMA_TIMEOUT );\r
- portEND_SWITCHING_ISR( xSecondTimerHandler() );\r
-}\r
-\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef INT_QUEUE_TIMER_H\r
-#define INT_QUEUE_TIMER_H\r
-\r
-void vInitialiseTimerForIntQueueTest( void );\r
-portBASE_TYPE xTimer0Handler( void );\r
-portBASE_TYPE xTimer1Handler( void );\r
-\r
-#endif\r
-\r
+++ /dev/null
-#/*\r
-# FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
-# \r
-#\r
-# ***************************************************************************\r
-# * *\r
-# * FreeRTOS tutorial books are available in pdf and paperback. *\r
-# * Complete, revised, and edited pdf reference manuals are also *\r
-# * available. *\r
-# * *\r
-# * Purchasing FreeRTOS documentation will not only help you, by *\r
-# * ensuring you get running as quickly as possible and with an *\r
-# * in-depth knowledge of how to use FreeRTOS, it will also help *\r
-# * the FreeRTOS project to continue with its mission of providing *\r
-# * professional grade, cross platform, de facto standard solutions *\r
-# * for microcontrollers - completely free of charge! *\r
-# * *\r
-# * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
-# * *\r
-# * Thank you for using FreeRTOS, and thank you for your support! *\r
-# * *\r
-# ***************************************************************************\r
-#\r
-#\r
-# This file is part of the FreeRTOS distribution.\r
-#\r
-# FreeRTOS is free software; you can redistribute it and/or modify it under\r
-# the terms of the GNU General Public License (version 2) as published by the\r
-# Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-# >>>NOTE<<< The modification to the GPL is included to allow you to\r
-# distribute a combined work that includes FreeRTOS without being obliged to\r
-# provide the source code for proprietary components outside of the FreeRTOS\r
-# kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
-# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
-# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
-# more details. You should have received a copy of the GNU General Public\r
-# License and the FreeRTOS license exception along with FreeRTOS; if not it\r
-# can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
-# by writing to Richard Barry, contact details for whom are available on the\r
-# FreeRTOS WEB site.\r
-#\r
-# 1 tab == 4 spaces!\r
-#\r
-# http://www.FreeRTOS.org - Documentation, latest information, license and\r
-# contact details.\r
-#\r
-# http://www.SafeRTOS.com - A version that is certified for use in safety\r
-# critical systems.\r
-#\r
-# http://www.OpenRTOS.com - Commercial support, development, porting,\r
-# licensing and training services.\r
-#*/\r
-\r
-\r
-#/************************************************************************* \r
-# * Please ensure to read http://www.freertos.org/portLM3Sxxxx_Eclipse.html\r
-# * which provides information on configuring and running this demo for the\r
-# * various Luminary Micro EKs.\r
-# *************************************************************************/\r
-\r
-RTOS_SOURCE_DIR=../../../Source\r
-DEMO_COMMON_DIR=../../Common/Minimal\r
-DEMO_INCLUDE_DIR=../../Common/include\r
-UIP_COMMON_DIR=../../Common/ethernet/uIP/uip-1.0/uip\r
-LUMINARY_DRIVER_DIR=../../Common/drivers/LuminaryMicro\r
-\r
-CC=arm-none-eabi-gcc\r
-OBJCOPY=arm-none-eabi-objcopy\r
-LDSCRIPT=standalone.ld\r
-\r
-# should use --gc-sections but the debugger does not seem to be able to cope with the option.\r
-LINKER_FLAGS=-nostartfiles -Xlinker -oRTOSDemo.axf -Xlinker -M -Xlinker -Map=rtosdemo.map -Xlinker --no-gc-sections\r
-\r
-DEBUG=-g\r
-OPTIM=-O0\r
-\r
-\r
-CFLAGS=$(DEBUG) -I . -I $(RTOS_SOURCE_DIR)/include -I $(RTOS_SOURCE_DIR)/portable/GCC/ARM_CM3 \\r
- -I $(DEMO_INCLUDE_DIR) -D GCC_ARMCM3_LM3S102 -D inline= -mthumb -mcpu=cortex-m3 $(OPTIM) -T$(LDSCRIPT) \\r
- -D PACK_STRUCT_END=__attribute\(\(packed\)\) -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\) -D sprintf=usprintf -D snprintf=usnprintf -D printf=uipprintf \\r
- -I $(UIP_COMMON_DIR) -I ./webserver -ffunction-sections -fdata-sections -I $(LUMINARY_DRIVER_DIR)\r
-\r
-SOURCE= main.c \\r
- timertest.c \\r
- ./ParTest/ParTest.c \\r
- rit128x96x4.c \\r
- osram128x64x4.c \\r
- formike128x128x16.c \\r
- $(LUMINARY_DRIVER_DIR)/ustdlib.c \\r
- $(DEMO_COMMON_DIR)/BlockQ.c \\r
- $(DEMO_COMMON_DIR)/blocktim.c \\r
- $(DEMO_COMMON_DIR)/death.c \\r
- $(DEMO_COMMON_DIR)/integer.c \\r
- $(DEMO_COMMON_DIR)/PollQ.c \\r
- $(DEMO_COMMON_DIR)/semtest.c \\r
- $(DEMO_COMMON_DIR)/GenQTest.c \\r
- $(DEMO_COMMON_DIR)/QPeek.c \\r
- $(DEMO_COMMON_DIR)/recmutex.c \\r
- $(DEMO_COMMON_DIR)/IntQueue.c \\r
- ./IntQueueTimer.c \\r
- ./webserver/uIP_Task.c \\r
- ./webserver/emac.c \\r
- ./webserver/httpd.c \\r
- ./webserver/httpd-cgi.c \\r
- ./webserver/httpd-fs.c \\r
- ./webserver/http-strings.c \\r
- $(UIP_COMMON_DIR)/uip_arp.c \\r
- $(UIP_COMMON_DIR)/psock.c \\r
- $(UIP_COMMON_DIR)/timer.c \\r
- $(UIP_COMMON_DIR)/uip.c \\r
- $(RTOS_SOURCE_DIR)/list.c \\r
- $(RTOS_SOURCE_DIR)/queue.c \\r
- $(RTOS_SOURCE_DIR)/tasks.c \\r
- $(RTOS_SOURCE_DIR)/portable/GCC/ARM_CM3/port.c \\r
- $(RTOS_SOURCE_DIR)/portable/MemMang/heap_2.c\r
-\r
-LIBS= $(LUMINARY_DRIVER_DIR)/arm-none-eabi-gcc/libdriver.a $(LUMINARY_DRIVER_DIR)/arm-none-eabi-gcc/libgr.a\r
-\r
-OBJS = $(SOURCE:.c=.o)\r
-\r
-all: RTOSDemo.bin\r
- \r
-RTOSDemo.bin : RTOSDemo.axf\r
- $(OBJCOPY) RTOSDemo.axf -O binary RTOSDemo.bin\r
-\r
-RTOSDemo.axf : $(OBJS) startup.o Makefile\r
- $(CC) $(CFLAGS) $(OBJS) startup.o $(LIBS) $(LINKER_FLAGS)\r
-\r
-$(OBJS) : %.o : %.c Makefile FreeRTOSConfig.h\r
- $(CC) -c $(CFLAGS) $< -o $@\r
-\r
-startup.o : startup.c Makefile\r
- $(CC) -c $(CFLAGS) -O1 startup.c -o startup.o\r
- \r
-clean :\r
- touch Makefile\r
- cs-rm $(OBJS)\r
- \r
-\r
-\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/*-----------------------------------------------------------\r
- * Simple parallel port IO routines.\r
- *-----------------------------------------------------------*/\r
-\r
-/*\r
-*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-\r
-/* Demo includes. */\r
-#include "partest.h"\r
-\r
-/* Library includes. */\r
-#include "hw_types.h"\r
-#include "gpio.h"\r
-#include "hw_memmap.h"\r
-\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestInitialise( void )\r
-{\r
- GPIODirModeSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT );\r
- GPIOPadConfigSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );\r
- GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, 0 );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
-{\r
- /* There is only one LED. */\r
- ( void ) uxLED;\r
- \r
- GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, xValue );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-unsigned portBASE_TYPE uxParTestGetLED( unsigned portBASE_TYPE uxLED )\r
-{\r
- /* There is only one LED. */\r
- ( void ) uxLED;\r
-\r
- return GPIOPinRead( GPIO_PORTF_BASE, GPIO_PIN_0 ); \r
-}\r
-\r
-\r
+++ /dev/null
-#ifndef BITMAP_H\r
-#define BITMAP_H\r
-\r
-#define bmpBITMAP_HEIGHT 50\r
-#define bmpBITMAP_WIDTH 128\r
-\r
-const unsigned char pucBasicBitmap[] =\r
-{\r
-0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
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-0x88, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x77, 0x77, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
-0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x0f, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0x00, 0x07, 0x70, 0x07,\r
-0x88, 0x88, 0x88, 0xff, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
-0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,\r
-0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa,\r
-0xaa, 0xaf, 0xff, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
-0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xf7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x70, 0x00, 0x00, 0x00,\r
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
-0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,\r
-0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\r
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,\r
-0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x00,\r
-0x00 };\r
-\r
-const unsigned char pucGrLibBitmap[] =\r
-{\r
- IMAGE_FMT_4BPP_COMP,\r
- 124, 0,\r
- 49, 0,\r
-\r
- 15,\r
- 0x00, 0x00, 0x00,\r
- 0x00, 0x0c, 0x00,\r
- 0x20, 0x44, 0x20,\r
- 0x00, 0x75, 0x00,\r
- 0x69, 0x69, 0x69,\r
- 0x00, 0xc2, 0x00,\r
- 0x00, 0xd2, 0x00,\r
- 0x38, 0xb6, 0x38,\r
- 0x00, 0xea, 0x00,\r
- 0x00, 0xf2, 0x00,\r
- 0xaa, 0xb2, 0xaa,\r
- 0x65, 0xff, 0x65,\r
- 0x69, 0xff, 0x69,\r
- 0x6d, 0xff, 0x6d,\r
- 0x71, 0xff, 0x71,\r
- 0xff, 0xff, 0xff,\r
-\r
- 0x03, 0x21, 0x33, 0x53, 0x33, 0x33, 0x33, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f,\r
- 0x17, 0x07, 0x06, 0x35, 0x33, 0x12, 0x03, 0x23, 0x96, 0x68, 0x88, 0x88,\r
- 0x88, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f, 0x17, 0x07, 0x06, 0x86, 0x69, 0x32,\r
- 0x03, 0x29, 0x66, 0x65, 0x66, 0x66, 0x66, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f,\r
- 0x17, 0x07, 0x06, 0x56, 0x66, 0x92, 0x07, 0x78, 0x63, 0x11, 0x11, 0x11,\r
- 0xe9, 0xd4, 0xa7, 0xf0, 0x5f, 0x17, 0x07, 0x07, 0x11, 0x36, 0x87, 0x78,\r
- 0x0f, 0x63, 0x00, 0x00, 0x00, 0xe9, 0xd4, 0xa7, 0x5f, 0xe0, 0x17, 0x07,\r
- 0x07, 0x00, 0x36, 0x87, 0x78, 0x63, 0xfe, 0x07, 0x07, 0x77, 0x2f, 0x07,\r
- 0x07, 0x02, 0x36, 0x1e, 0x87, 0x78, 0x63, 0x07, 0x07, 0x77, 0x2f, 0x00,\r
- 0x10, 0x01, 0x22, 0x20, 0x07, 0x00, 0x00, 0x22, 0x21, 0x84, 0x03, 0x36,\r
- 0x87, 0x78, 0x63, 0x02, 0x02, 0xaa, 0x01, 0xa2, 0x22, 0x20, 0x02, 0x77,\r
- 0x77, 0x77, 0xe9, 0x3a, 0x22, 0x22, 0x7a, 0xa4, 0x71, 0x20, 0x0a, 0x27,\r
- 0xb8, 0x29, 0x72, 0xb2, 0x9e, 0x93, 0x36, 0x87, 0x78, 0x40, 0x63, 0x62,\r
- 0x2a, 0xff, 0xf2, 0xaa, 0x40, 0x07, 0x08, 0xad, 0xdd, 0xdd, 0xdd, 0xe9,\r
- 0xd7, 0x72, 0x00, 0x40, 0x00, 0xa6, 0xdd, 0xda, 0x70, 0x00, 0x00, 0x02,\r
- 0x00, 0x77, 0xdd, 0xdc, 0xcc, 0xcd, 0xde, 0xc7, 0x20, 0x00, 0x00, 0x00,\r
- 0x00, 0x00, 0x01, 0x27, 0xde, 0xdc, 0x08, 0xcc, 0xcc, 0xdd, 0xea, 0x99,\r
- 0x36, 0x87, 0x78, 0x40, 0x63, 0x69, 0x02, 0xaf, 0xaa, 0xf2, 0x2f, 0xa0,\r
- 0x04, 0x02, 0xdb, 0xbb, 0xbb, 0xbb, 0xe9, 0xbc, 0xe7, 0x10, 0x20, 0x00,\r
- 0x07, 0xa5, 0xbb, 0xbd, 0x70, 0x00, 0x10, 0x00, 0x27, 0xec, 0x3b, 0xcd,\r
- 0xd7, 0x00, 0x00, 0x80, 0x9f, 0xbd, 0x20, 0x00, 0x00, 0x36, 0x87, 0x78,\r
- 0x40, 0x63, 0x69, 0x02, 0xfa, 0x2a, 0xf2, 0x2f, 0xa0, 0x31, 0x02, 0xdb,\r
- 0x43, 0x31, 0x42, 0x00, 0x07, 0xa7, 0x0a, 0x70, 0x00, 0x02, 0xdd, 0x41,\r
- 0xcc, 0x21, 0xce, 0x04, 0x70, 0x00, 0x00, 0x02, 0x7d, 0x39, 0xbc, 0xcb,\r
- 0x00, 0xbb, 0xbd, 0x20, 0x00, 0x00, 0x36, 0x87, 0x78, 0x20, 0x63, 0x00,\r
- 0x69, 0xfa, 0x0a, 0xf2, 0x2f, 0xa0, 0x01, 0x02, 0xdb, 0xbb, 0xbb, 0xdd,\r
- 0xdd, 0xdc, 0x11, 0x08, 0xe7, 0x00, 0x07, 0xad, 0xbb, 0xcd, 0xdd, 0xda,\r
- 0x09, 0x70, 0x00, 0x2d, 0xcb, 0x41, 0xcc, 0xdd, 0xd1, 0x04, 0xe7, 0x00,\r
- 0x00, 0x07, 0xeb, 0x51, 0xdc, 0xcd, 0x00, 0xdd, 0xdd, 0x20, 0x00, 0x00,\r
- 0x36, 0x87, 0x78, 0x00, 0x63, 0x00, 0x00, 0x00, 0x02, 0xfa, 0x2a, 0xf2,\r
- 0x00, 0xaf, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x72, 0x22, 0x00, 0x77, 0xdc,\r
- 0xbb, 0xbb, 0xc7, 0x20, 0x07, 0x77, 0x04, 0x77, 0x77, 0xcb, 0xbb, 0xbc,\r
- 0xd1, 0x20, 0x01, 0x28, 0x7d, 0xbb, 0x42, 0x27, 0x41, 0xcd, 0x20, 0x00,\r
- 0x40, 0x27, 0x51, 0x72, 0x22, 0x22, 0x27, 0x7c, 0x20, 0x00, 0x00, 0x00,\r
- 0x36, 0x87, 0x78, 0x63, 0x00, 0x00, 0x00, 0x00, 0x02, 0xaf, 0xaa, 0xfa,\r
- 0xff, 0x20, 0x02, 0x10, 0xdb, 0xbb, 0xbe, 0x61, 0x2d, 0xbb, 0xbb, 0xcc,\r
- 0xa8, 0x29, 0x00, 0x89, 0xbd, 0xc3, 0xeb, 0xbb, 0xbb, 0x00, 0xd7, 0x10,\r
- 0x00, 0x00, 0x2c, 0xcb, 0xbb, 0xbd, 0x58, 0x70, 0x12, 0xc7, 0x13, 0x29,\r
- 0x36, 0x87, 0x78, 0x40, 0x63, 0xa9, 0x00, 0xaf, 0xff, 0xff, 0xfa, 0x20,\r
- 0x08, 0x02, 0xdb, 0xbb, 0xbd, 0x39, 0x07, 0xdb, 0xbb, 0x72, 0xcc, 0x03,\r
- 0x8c, 0x82, 0xbd, 0x70, 0x84, 0xbc, 0x03, 0xd2, 0x00, 0x2d, 0xbb, 0xbb,\r
- 0xd7, 0x19, 0x01, 0x02, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0xa2, 0x0a,\r
- 0x10, 0xaf, 0xff, 0xa2, 0x0a, 0xbd, 0x20, 0x00, 0x00, 0x0c, 0x07, 0xdb,\r
- 0xbb, 0xc7, 0xc9, 0x8e, 0x00, 0x2c, 0x40, 0xcb, 0xc4, 0x00, 0x7c, 0xbb,\r
- 0xbb, 0xe7, 0x00, 0x06, 0x2d, 0xbb, 0xbb, 0xc7, 0x10, 0x92, 0x31, 0x36,\r
- 0x10, 0x87, 0x78, 0x63, 0xab, 0x22, 0x22, 0x00, 0x00, 0x00, 0x02, 0xdb,\r
- 0xbb, 0xbd, 0x20, 0x00, 0x00, 0x07, 0x18, 0xcb, 0xbb, 0xd7, 0x0a, 0x8d,\r
- 0x00, 0x2d, 0xbb, 0x23, 0xbb, 0xc7, 0x82, 0x00, 0x2e, 0xbb, 0x39, 0x91,\r
- 0x20, 0xbd, 0x72, 0x8b, 0x00, 0x00, 0x36, 0x87, 0x78, 0x48, 0x63, 0x33,\r
- 0x02, 0x20, 0xe1, 0xdb, 0xbb, 0xbd, 0x01, 0x20, 0x00, 0x02, 0x7d, 0xbb,\r
- 0xbb, 0xe2, 0x6b, 0x94, 0x8b, 0x00, 0x00, 0x81, 0xd7, 0x82, 0x00, 0x2d,\r
- 0x00, 0xbb, 0xbb, 0xc7, 0x20, 0x2c, 0xcb, 0xbb, 0xbb, 0x10, 0xdd, 0x77,\r
- 0x22, 0x7b, 0x36, 0x87, 0x78, 0x63, 0x80, 0x32, 0x02, 0xaa, 0xf2, 0x22,\r
- 0x20, 0x02, 0xdb, 0x00, 0xbb, 0xbc, 0x77, 0x77, 0x77, 0xdb, 0xbb, 0xce,\r
- 0x42, 0x71, 0x63, 0xdb, 0xbb, 0xbd, 0x20, 0x19, 0x7d, 0x10, 0xbb, 0xbb,\r
- 0xd2, 0x82, 0x00, 0x27, 0xcb, 0xbb, 0x00, 0xc7, 0x20, 0x07, 0xeb, 0xbb,\r
- 0xbb, 0xbb, 0xcd, 0x21, 0xd7, 0x72, 0x72, 0x36, 0x87, 0x78, 0x63, 0x32,\r
- 0x01, 0x4f, 0xff, 0xf2, 0xaf, 0xa0, 0x02, 0xdb, 0x41, 0x03, 0xdd, 0xdc,\r
- 0xbb, 0xbc, 0xd7, 0x20, 0x22, 0x89, 0x42, 0xbd, 0xba, 0x7d, 0xbb, 0xbb,\r
- 0xd2, 0x82, 0x00, 0x02, 0x27, 0xcb, 0xbb, 0xcc, 0x20, 0x02, 0x89, 0xbb,\r
- 0x08, 0xbb, 0xbc, 0xdd, 0x72, 0x31, 0x36, 0x87, 0x78, 0x40, 0x63, 0x31,\r
- 0x02, 0xaf, 0xaa, 0xf2, 0x2f, 0xa0, 0x21, 0x02, 0xdb, 0x3a, 0xbb, 0xbb,\r
- 0xc7, 0x20, 0x31, 0x88, 0x59, 0xdb, 0xbb, 0xbd, 0xb2, 0x7d, 0xbb, 0xbb,\r
- 0x40, 0xd2, 0x7b, 0x27, 0xcb, 0xbb, 0xcc, 0x20, 0x00, 0x00, 0x27, 0xec,\r
- 0xbb, 0xbb, 0xbb, 0xbb, 0xbc, 0xe7, 0x84, 0x29, 0x36, 0x87, 0x78, 0x63,\r
- 0x31, 0x02, 0xfa, 0x02, 0x0a, 0xf2, 0x2f, 0xa0, 0x02, 0xdb, 0x42, 0xbb,\r
- 0x31, 0xbb, 0xc7, 0x39, 0x5a, 0xdb, 0xbb, 0xbd, 0xb2, 0x08, 0x7d, 0xbb,\r
- 0xbb, 0xd2, 0x7b, 0x27, 0xcb, 0xbb, 0x00, 0xcc, 0x20, 0x00, 0x02, 0x77,\r
- 0xed, 0xcb, 0xbb, 0x00, 0xbb, 0xbb, 0xbd, 0x71, 0x00, 0x00, 0x36, 0x87,\r
- 0x20, 0x78, 0x63, 0x31, 0x02, 0xfa, 0x0a, 0xf2, 0x2f, 0x00, 0xa0, 0x02,\r
- 0xdb, 0xbb, 0xbb, 0xcd, 0xdd, 0xcb, 0x18, 0xbb, 0xbc, 0xe2, 0x69, 0x59,\r
- 0xdb, 0xbb, 0xbd, 0x42, 0x20, 0x19, 0x7d, 0xbb, 0xbb, 0xd2, 0x7b, 0x27,\r
- 0x10, 0xcb, 0xbb, 0xcb, 0x79, 0x02, 0x27, 0x7d, 0xdc, 0x00, 0xbb, 0xbb,\r
- 0xbb, 0xe2, 0x00, 0x00, 0x36, 0x87, 0x20, 0x78, 0x63, 0x31, 0x02, 0xfa,\r
- 0x2a, 0xf2, 0xaf, 0x00, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x72, 0x27, 0x4c,\r
- 0x1d, 0xbb, 0xbb, 0xd7, 0x69, 0x59, 0x89, 0x20, 0x19, 0x42, 0x7d, 0x7e,\r
- 0x2c, 0xbb, 0xbb, 0xc7, 0x7a, 0x00, 0x10, 0x22, 0x7c, 0xcb, 0x63, 0x36,\r
- 0x87, 0x78, 0x63, 0x80, 0x31, 0x02, 0xaf, 0xfa, 0xff, 0xff, 0x20, 0x02,\r
- 0x00, 0xdb, 0xbb, 0xbd, 0x20, 0x00, 0x2c, 0xcb, 0xbb, 0x28, 0xcb, 0x20,\r
- 0x61, 0x00, 0x8c, 0x00, 0x00, 0x2d, 0x12, 0xbb, 0xbb, 0xd7, 0x82, 0x00,\r
- 0x2e, 0xbe, 0x00, 0x21, 0x02, 0x7c, 0x63, 0x36, 0x87, 0x78, 0x63, 0x32,\r
- 0x00, 0x2f, 0xff, 0xff, 0xfa, 0x00, 0x02, 0xdb, 0xbb, 0x00, 0xbd, 0x20,\r
- 0x00, 0x07, 0xdb, 0xbb, 0xbe, 0x20, 0xc2, 0x62, 0x8c, 0x00, 0x00, 0x2c,\r
- 0xcb, 0xc4, 0x00, 0x0c, 0x7d, 0xbb, 0xbb, 0xe7, 0x3a, 0x19, 0x2d, 0xbb,\r
- 0x00, 0xbb, 0xc7, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0x80, 0x3a, 0x02,\r
- 0xaa, 0xaa, 0x40, 0x00, 0x02, 0xdb, 0x00, 0xbb, 0xbd, 0x20, 0x00, 0x02,\r
- 0xcc, 0xbb, 0xbd, 0x63, 0x70, 0x63, 0x8b, 0x00, 0x00, 0x07, 0x49, 0x7a,\r
- 0x98, 0x09, 0xbb, 0xd2, 0x3a, 0x19, 0x2d, 0xbb, 0xbb, 0x01, 0xd7, 0x00,\r
- 0x00, 0x36, 0x87, 0x78, 0x63, 0x3a, 0x14, 0xaa, 0x22, 0x20, 0x0b, 0xbd,\r
- 0xc9, 0x7d, 0xbb, 0x30, 0xbb, 0xd2, 0x61, 0x8e, 0x00, 0x02, 0xeb, 0xbb,\r
- 0x20, 0xbb, 0xd7, 0x79, 0x27, 0xcb, 0xbb, 0xbd, 0x70, 0x24, 0x00, 0x02,\r
- 0x6a, 0x00, 0x7d, 0x6b, 0x36, 0x87, 0x24, 0x78, 0x63, 0x39, 0x02, 0xff,\r
- 0x62, 0x02, 0xdb, 0x21, 0xbb, 0xbd, 0x21, 0x2e, 0xbb, 0xbb, 0xe7, 0x61,\r
- 0x80, 0x8e, 0x00, 0x02, 0x7d, 0xbb, 0xbb, 0xbd, 0x72, 0x00, 0x22, 0x27,\r
- 0xcc, 0xbb, 0xbb, 0xcd, 0x20, 0x00, 0x08, 0x07, 0xe7, 0x72, 0x22, 0xa3,\r
- 0xe2, 0x00, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0x00, 0x00, 0x00, 0x02,\r
- 0x20, 0xaf, 0xa0, 0xd2, 0xdb, 0xbb, 0xbd, 0x20, 0x00, 0x03, 0x00, 0x2b,\r
- 0xcb, 0xbb, 0xc7, 0x10, 0x8f, 0x11, 0x01, 0x2d, 0xcb, 0xbb, 0xbb, 0xdd,\r
- 0xb7, 0xcd, 0xd1, 0x00, 0xe7, 0x00, 0x00, 0x07, 0xdc, 0xdd, 0xcb, 0x7b,\r
- 0x00, 0xdd, 0xcb, 0xbb, 0xbc, 0x72, 0x00, 0x00, 0x36, 0x10, 0x87, 0x78,\r
- 0x63, 0x01, 0x00, 0x2a, 0xfa, 0x42, 0x01, 0x22, 0x20, 0x02, 0xdb, 0xbb,\r
- 0xbd, 0x20, 0x01, 0xb0, 0xcc, 0x00, 0x8d, 0xb9, 0xec, 0xbb, 0xbb, 0xbb,\r
- 0x00, 0xcc, 0xcb, 0xbb, 0xbb, 0xbe, 0x71, 0x00, 0x00, 0x05, 0x27, 0xcb,\r
- 0xbb, 0xcc, 0xcc, 0x81, 0xce, 0x29, 0x08, 0x36, 0x87, 0x78, 0x63, 0x02,\r
- 0xaa, 0xff, 0xff, 0x02, 0xff, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x61, 0x02,\r
- 0x0e, 0xeb, 0xbb, 0xbd, 0x70, 0x5a, 0x8c, 0x09, 0x27, 0x00, 0xec, 0xbb,\r
- 0xbb, 0xbb, 0xbb, 0xbb, 0xbd, 0xd7, 0x54, 0x10, 0xa1, 0xcb, 0xa4, 0xd2,\r
- 0x31, 0x36, 0x87, 0x20, 0x78, 0x63, 0x01, 0x02, 0xff, 0xff, 0xff, 0xff,\r
- 0x02, 0xa0, 0x07, 0xad, 0xdd, 0xda, 0x20, 0x99, 0xde, 0x1c, 0xdd, 0xde,\r
- 0xc2, 0x21, 0x8d, 0x0a, 0x7c, 0xed, 0x04, 0xcc, 0xcc, 0xcc, 0xde, 0xd7,\r
- 0x92, 0x2c, 0xed, 0x40, 0xdc, 0xa7, 0x36, 0x87, 0x78, 0x63, 0x00, 0x02,\r
- 0x00, 0x22, 0x02, 0xaa, 0xaa, 0xaa, 0xaa, 0x20, 0x02, 0x1b, 0x77, 0x77,\r
- 0x77, 0x5a, 0xc9, 0x72, 0x21, 0x8e, 0x88, 0xaa, 0x27, 0x77, 0x7b, 0x9d,\r
- 0x12, 0x27, 0x77, 0x20, 0x77, 0xb7, 0x3d, 0x36, 0x87, 0x78, 0x63, 0x00,\r
- 0x3e, 0x02, 0xaa, 0x43, 0x22, 0xc6, 0x87, 0x3e, 0x12, 0x21, 0x22, 0x22,\r
- 0x06, 0x01, 0x22, 0x22, 0x21, 0x04, 0x00, 0x36, 0x87, 0x78, 0x63, 0x00,\r
- 0x02, 0xfa, 0x22, 0x3f, 0xaa, 0x20, 0x26, 0xc6, 0x87, 0x3f, 0x07, 0x07,\r
- 0x00, 0x36, 0x87, 0x78, 0x63, 0x00, 0x02, 0xfa, 0x02, 0x7e, 0xff, 0x07,\r
- 0x07, 0x77, 0x2f, 0x07, 0x06, 0x36, 0x00, 0x87, 0x78, 0x63, 0x00, 0x02,\r
- 0xff, 0xaa, 0xfa, 0x07, 0x44, 0x44, 0x44, 0x20, 0x02, 0xd9, 0xc1, 0xd4,\r
- 0xf0, 0xa7, 0x5f, 0x17, 0x04, 0x42, 0x00, 0x00, 0x36, 0x00, 0x87, 0x78,\r
- 0x63, 0x00, 0x02, 0xff, 0xff, 0xff, 0x9f, 0xe9, 0xa0, 0x0a, 0xc4, 0x94,\r
- 0xa7, 0x5f, 0x17, 0x80, 0x04, 0xfa, 0x20, 0x00, 0x36, 0x87, 0x78, 0x63,\r
- 0x13, 0x00, 0x00, 0xaf, 0x03, 0xa0, 0x0a, 0x07, 0xbf, 0xe0, 0x77, 0x2f,\r
- 0x07, 0xfa, 0x20, 0x00, 0x36, 0x87, 0x00, 0x78, 0x63, 0x00, 0x00, 0x02,\r
- 0xaa, 0xfa, 0xaa, 0x0f, 0xaa, 0xaa, 0x20, 0x02, 0xd9, 0xc1, 0xd4, 0xa7,\r
- 0xe0, 0x5f, 0x17, 0x05, 0x00, 0x00, 0x36, 0x87, 0x78, 0x03, 0x63, 0x00,\r
- 0x00, 0x00, 0x02, 0xff, 0xd9, 0xc1, 0xfc, 0xd4, 0xa7, 0x5f, 0x17, 0x07,\r
- 0x03, 0x36, 0x87, 0x23, 0x78, 0x63, 0x01, 0x02, 0x44, 0x20, 0x07, 0x07,\r
- 0xf0, 0x77, 0x2f, 0x07, 0x05, 0x36, 0x87, 0x78, 0x63, 0xfe, 0x07, 0x07,\r
- 0x77, 0x2f, 0x07, 0x07, 0x02, 0x36, 0x1f, 0x87, 0x78, 0x63, 0x07, 0x07,\r
- 0x77, 0x2f, 0x07, 0xc0, 0x07, 0x02, 0x36, 0x87, 0x78, 0x63, 0x11, 0x11,\r
- 0x7f, 0x11, 0xe9, 0xd4, 0xa7, 0x5f, 0x17, 0x07, 0x07, 0x00, 0x11, 0x36,\r
- 0x87, 0x29, 0x66, 0x55, 0x55, 0x55, 0xfe, 0xe9, 0xd4, 0xa7, 0x5f, 0x17,\r
- 0x07, 0x07, 0x55, 0x00, 0x66, 0x92, 0x23, 0x96, 0x68, 0x88, 0x88, 0x88,\r
- 0xfe, 0xe9, 0xd4, 0xa7, 0x5f, 0x17, 0x07, 0x06, 0x86, 0x01, 0x69, 0x32,\r
- 0x21, 0x33, 0x55, 0x55, 0x55, 0xe9, 0xfc, 0xd4, 0xa7, 0x5f, 0x17, 0x07,\r
- 0x07, 0x55, 0x33, 0x00, 0x12,\r
-};\r
-\r
-\r
-#endif\r
+++ /dev/null
-//*****************************************************************************\r
-//\r
-// formike128x128x16.c - Display driver for the Formike Electronic\r
-// KWH015C04-F01 CSTN panel with an ST7637 controller.\r
-//\r
-// Copyright (c) 2008 Luminary Micro, Inc. All rights reserved.\r
-// \r
-// Software License Agreement\r
-// \r
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
-// exclusively on LMI's microcontroller products.\r
-// \r
-// The software is owned by LMI and/or its suppliers, and is protected under\r
-// applicable copyright laws. All rights are reserved. You may not combine\r
-// this software with "viral" open-source software in order to form a larger\r
-// program. Any use in violation of the foregoing restrictions may subject\r
-// the user to criminal sanctions under applicable laws, as well as to civil\r
-// liability for the breach of the terms and conditions of this license.\r
-// \r
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
-// \r
-// This is part of revision 2523 of the Stellaris Peripheral Driver Library.\r
-//\r
-//*****************************************************************************\r
-\r
-//*****************************************************************************\r
-//\r
-//! \addtogroup ek_lm3s3748_api\r
-//! @{\r
-//\r
-//*****************************************************************************\r
-\r
-#include "hw_gpio.h"\r
-#include "hw_memmap.h"\r
-#include "hw_types.h"\r
-#include "gpio.h"\r
-#include "sysctl.h"\r
-#include "rom.h"\r
-#include "grlib.h"\r
-#include "formike128x128x16.h"\r
-#include <string.h>\r
-\r
-//*****************************************************************************\r
-//\r
-// Defines for the pins that are used to communicate with the ST7637.\r
-//\r
-//*****************************************************************************\r
-#define LCD_A0_BASE GPIO_PORTB_BASE\r
-#define LCD_A0_PIN GPIO_PIN_2\r
-#define LCD_WR_BASE GPIO_PORTC_BASE\r
-#define LCD_WR_PIN GPIO_PIN_4\r
-#define LCD_RD_BASE GPIO_PORTC_BASE\r
-#define LCD_RD_PIN GPIO_PIN_5\r
-#define LCD_BL_BASE GPIO_PORTF_BASE\r
-#define LCD_BL_PIN GPIO_PIN_1\r
-#define LCD_DATA_BASE GPIO_PORTG_BASE\r
-\r
-//*****************************************************************************\r
-//\r
-// Translates a 24-bit RGB color to a display driver-specific color.\r
-//\r
-// \param c is the 24-bit RGB color. The least-significant byte is the blue\r
-// channel, the next byte is the green channel, and the third byte is the red\r
-// channel.\r
-//\r
-// This macro translates a 24-bit RGB color into a value that can be written\r
-// into the display's frame buffer in order to reproduce that color, or the\r
-// closest possible approximation of that color.\r
-//\r
-// \return Returns the display-driver specific color.\r
-//\r
-//*****************************************************************************\r
-#define DPYCOLORTRANSLATE(c) ((((c) & 0x00ff0000) >> 19) | \\r
- ((((c) & 0x0000ff00) >> 5) & 0x000007e0) | \\r
- ((((c) & 0x000000ff) << 8) & 0x0000f800))\r
-\r
-//*****************************************************************************\r
-//\r
-// Writes a data word to the ST7637.\r
-//\r
-//*****************************************************************************\r
-static void\r
-WriteData(unsigned char ucData)\r
-{\r
- //\r
- // Write the data to the data bus.\r
- //\r
- HWREG(LCD_DATA_BASE + GPIO_O_DATA + (0xff << 2)) = ucData;\r
-\r
- //\r
- // Assert the write enable signal.\r
- //\r
- HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = 0;\r
-\r
- //\r
- // Deassert the write enable signal.\r
- //\r
- HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = LCD_WR_PIN;\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// Writes a command to the ST7637.\r
-//\r
-//*****************************************************************************\r
-static void\r
-WriteCommand(unsigned char ucData)\r
-{\r
- //\r
- // Write the command to the data bus.\r
- //\r
- HWREG(LCD_DATA_BASE + GPIO_O_DATA + (0xff << 2)) = ucData;\r
-\r
- //\r
- // Set the A0 signal low, indicating a command.\r
- //\r
- HWREG(LCD_A0_BASE + GPIO_O_DATA + (LCD_A0_PIN << 2)) = 0;\r
-\r
- //\r
- // Assert the write enable signal.\r
- //\r
- HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = 0;\r
-\r
- //\r
- // Deassert the write enable signal.\r
- //\r
- HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = LCD_WR_PIN;\r
-\r
- //\r
- // Set the A0 signal high, indicating that following writes are data.\r
- //\r
- HWREG(LCD_A0_BASE + GPIO_O_DATA + (LCD_A0_PIN << 2)) = LCD_A0_PIN;\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Initializes the display driver.\r
-//!\r
-//! This function initializes the ST7637 display controller on the panel,\r
-//! preparing it to display data.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-Formike128x128x16Init(void)\r
-{\r
- unsigned long ulClockMS, ulCount;\r
-\r
- //\r
- // Get the value to pass to SysCtlDelay() in order to delay for 1 ms.\r
- //\r
- ulClockMS = SysCtlClockGet() / (3 * 1000);\r
-\r
- //\r
- // Enable the GPIO peripherals used to interface to the ST7637.\r
- //\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);\r
-\r
- //\r
- // Configure the pins that connect to the LCD as GPIO outputs.\r
- //\r
- GPIOPinTypeGPIOOutput(LCD_A0_BASE, LCD_A0_PIN);\r
- GPIOPinTypeGPIOOutput(LCD_WR_BASE, LCD_WR_PIN);\r
- GPIOPinTypeGPIOOutput(LCD_RD_BASE, LCD_RD_PIN);\r
- GPIOPinTypeGPIOOutput(LCD_BL_BASE, LCD_BL_PIN);\r
- GPIOPinTypeGPIOOutput(LCD_DATA_BASE, 0xff);\r
-\r
- //\r
- // Set the LCD control pins to their default values.\r
- //\r
- GPIOPinWrite(LCD_A0_BASE, LCD_A0_PIN, LCD_A0_PIN);\r
- GPIOPinWrite(LCD_WR_BASE, LCD_WR_PIN | LCD_RD_PIN,\r
- LCD_WR_PIN | LCD_RD_PIN);\r
- GPIOPinWrite(LCD_BL_BASE, LCD_BL_PIN, 0);\r
- GPIOPinWrite(LCD_DATA_BASE, 0xff, 0x00);\r
-\r
- //\r
- // Perform a software reset of the ST7637.\r
- //\r
- WriteCommand(0x01);\r
-\r
- //\r
- // Delay for 120ms.\r
- //\r
- SysCtlDelay(ulClockMS * 120);\r
-\r
- //\r
- // Disable auto-load of mask rom data.\r
- //\r
- WriteCommand(0xD7);\r
- WriteData(0xBF);\r
-\r
- //\r
- // Set the OTP control mode to read.\r
- //\r
- WriteCommand(0xE0);\r
- WriteData(0x00);\r
-\r
- //\r
- // Delay for 10ms.\r
- //\r
- SysCtlDelay(ulClockMS * 10);\r
-\r
- //\r
- // Start the OTP read.\r
- //\r
- WriteCommand(0xE3);\r
-\r
- //\r
- // Delay for 20ms.\r
- //\r
- SysCtlDelay(ulClockMS * 20);\r
-\r
- //\r
- // Cancel the OTP read (it should have finished by now).\r
- //\r
- WriteCommand(0xE1);\r
-\r
- //\r
- // Turn off the display.\r
- //\r
- WriteCommand(0x28);\r
-\r
- //\r
- // Exit sleep mode.\r
- //\r
- WriteCommand(0x11);\r
-\r
- //\r
- // Delay for 50ms.\r
- //\r
- SysCtlDelay(ulClockMS * 50);\r
-\r
- //\r
- // Program the LCD supply voltage V0 to 14V.\r
- //\r
- WriteCommand(0xC0);\r
- WriteData(0x04);\r
- WriteData(0x01);\r
-\r
- //\r
- // Select an LCD bias voltage ratio of 1/12.\r
- //\r
- WriteCommand(0xC3);\r
- WriteData(0x00);\r
-\r
- //\r
- // Enable the x8 booster circuit.\r
- //\r
- WriteCommand(0xC4);\r
- WriteData(0x07);\r
-\r
- //\r
- // Invert the column scan direction for the panel.\r
- //\r
- WriteCommand(0xB7);\r
- WriteData(0xC0);\r
-\r
- //\r
- // Select 16bpp, 5-6-5 data input mode.\r
- //\r
- WriteCommand(0x3A);\r
- WriteData(0x05);\r
-\r
- //\r
- // Select the memory scanning direction. The scanning mode does not matter\r
- // for this driver since the row/column selects will constrain the writes\r
- // to the desired area of the display.\r
- //\r
- WriteCommand(0x36);\r
- WriteData(0x00);\r
-\r
- //\r
- // Turn on the display.\r
- //\r
- WriteCommand(0x29);\r
-\r
- //\r
- // Clear the contents of the display buffer.\r
- //\r
- WriteCommand(0x2A);\r
- WriteData(0x00);\r
- WriteData(0x7F);\r
- WriteCommand(0x2B);\r
- WriteData(0x01);\r
- WriteData(0x80);\r
- WriteCommand(0x2c);\r
- for(ulCount = 0; ulCount < (128 * 128); ulCount++)\r
- {\r
- WriteData(0x00);\r
- WriteData(0x00);\r
- }\r
-\r
- //\r
- // Enable normal operation of the LCD.\r
- //\r
- WriteCommand(0x13);\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Turns on the backlight.\r
-//!\r
-//! This function turns on the backlight on the display.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-Formike128x128x16BacklightOn(void)\r
-{\r
- //\r
- // Assert the signal that turns on the backlight.\r
- //\r
- HWREG(LCD_BL_BASE + GPIO_O_DATA + (LCD_BL_PIN << 2)) = LCD_BL_PIN;\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Turns off the backlight.\r
-//!\r
-//! This function turns off the backlight on the display.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-Formike128x128x16BacklightOff(void)\r
-{\r
- //\r
- // Deassert the signal that turns on the backlight.\r
- //\r
- HWREG(LCD_BL_BASE + GPIO_O_DATA + (LCD_BL_PIN << 2)) = 0;\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Draws a pixel on the screen.\r
-//!\r
-//! \param pvDisplayData is a pointer to the driver-specific data for this\r
-//! display driver.\r
-//! \param lX is the X coordinate of the pixel.\r
-//! \param lY is the Y coordinate of the pixel.\r
-//! \param ulValue is the color of the pixel.\r
-//!\r
-//! This function sets the given pixel to a particular color. The coordinates\r
-//! of the pixel are assumed to be within the extents of the display.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-Formike128x128x16PixelDraw(void *pvDisplayData, long lX, long lY,\r
- unsigned long ulValue)\r
-{\r
- //\r
- // Set the X address of the display cursor.\r
- //\r
- WriteCommand(0x2a);\r
- WriteData(lX);\r
- WriteData(lX);\r
-\r
- //\r
- // Set the Y address of the display cursor.\r
- //\r
- WriteCommand(0x2b);\r
- WriteData(lY + 1);\r
- WriteData(lY + 1);\r
-\r
- //\r
- // Write the pixel value.\r
- //\r
- WriteCommand(0x2c);\r
- WriteData(ulValue >> 8);\r
- WriteData(ulValue);\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Draws a horizontal sequence of pixels on the screen.\r
-//!\r
-//! \param pvDisplayData is a pointer to the driver-specific data for this\r
-//! display driver.\r
-//! \param lX is the X coordinate of the first pixel.\r
-//! \param lY is the Y coordinate of the first pixel.\r
-//! \param lX0 is sub-pixel offset within the pixel data, which is valid for 1\r
-//! or 4 bit per pixel formats.\r
-//! \param lCount is the number of pixels to draw.\r
-//! \param lBPP is the number of bits per pixel; must be 1, 4, or 8.\r
-//! \param pucData is a pointer to the pixel data. For 1 and 4 bit per pixel\r
-//! formats, the most significant bit(s) represent the left-most pixel.\r
-//! \param pucPalette is a pointer to the palette used to draw the pixels.\r
-//!\r
-//! This function draws a horizontal sequence of pixels on the screen, using\r
-//! the supplied palette. For 1 bit per pixel format, the palette contains\r
-//! pre-translated colors; for 4 and 8 bit per pixel formats, the palette\r
-//! contains 24-bit RGB values that must be translated before being written to\r
-//! the display.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-Formike128x128x16PixelDrawMultiple(void *pvDisplayData, long lX, long lY,\r
- long lX0, long lCount, long lBPP,\r
- const unsigned char *pucData,\r
- const unsigned char *pucPalette)\r
-{\r
- unsigned long ulByte;\r
-\r
- //\r
- // Set the extent of the line along the X axis.\r
- //\r
- WriteCommand(0x2a);\r
- WriteData(lX);\r
- WriteData(lX + lCount - 1);\r
-\r
- //\r
- // Set the Y address of the display cursor.\r
- //\r
- WriteCommand(0x2b);\r
- WriteData(lY + 1);\r
- WriteData(lY + 1);\r
-\r
- //\r
- // Write the data RAM write command.\r
- //\r
- WriteCommand(0x2c);\r
-\r
- //\r
- // Determine how to interpret the pixel data based on the number of bits\r
- // per pixel.\r
- //\r
- switch(lBPP)\r
- {\r
- //\r
- // The pixel data is in 1 bit per pixel format.\r
- //\r
- case 1:\r
- {\r
- //\r
- // Loop while there are more pixels to draw.\r
- //\r
- while(lCount)\r
- {\r
- //\r
- // Get the next byte of image data.\r
- //\r
- ulByte = *pucData++;\r
-\r
- //\r
- // Loop through the pixels in this byte of image data.\r
- //\r
- for(; (lX0 < 8) && lCount; lX0++, lCount--)\r
- {\r
- //\r
- // Draw this pixel in the appropriate color.\r
- //\r
- lBPP = ((unsigned long *)pucPalette)[(ulByte >>\r
- (7 - lX0)) & 1];\r
- WriteData(lBPP >> 8);\r
- WriteData(lBPP);\r
- }\r
-\r
- //\r
- // Start at the beginning of the next byte of image data.\r
- //\r
- lX0 = 0;\r
- }\r
-\r
- //\r
- // The image data has been drawn.\r
- //\r
- break;\r
- }\r
-\r
- //\r
- // The pixel data is in 4 bit per pixel format.\r
- //\r
- case 4:\r
- {\r
- //\r
- // Loop while there are more pixels to draw. "Duff's device" is\r
- // used to jump into the middle of the loop if the first nibble of\r
- // the pixel data should not be used. Duff's device makes use of\r
- // the fact that a case statement is legal anywhere within a\r
- // sub-block of a switch statement. See\r
- // http://en.wikipedia.org/wiki/Duff's_device for detailed\r
- // information about Duff's device.\r
- //\r
- switch(lX0 & 1)\r
- {\r
- case 0:\r
- while(lCount)\r
- {\r
- //\r
- // Get the upper nibble of the next byte of pixel data\r
- // and extract the corresponding entry from the\r
- // palette.\r
- //\r
- ulByte = (*pucData >> 4) * 3;\r
- ulByte = (*(unsigned long *)(pucPalette + ulByte) &\r
- 0x00ffffff);\r
-\r
- //\r
- // Translate this palette entry and write it to the\r
- // screen.\r
- //\r
- ulByte = DPYCOLORTRANSLATE(ulByte);\r
- WriteData(ulByte >> 8);\r
- WriteData(ulByte);\r
-\r
- //\r
- // Decrement the count of pixels to draw.\r
- //\r
- lCount--;\r
-\r
- //\r
- // See if there is another pixel to draw.\r
- //\r
- if(lCount)\r
- {\r
- case 1:\r
- //\r
- // Get the lower nibble of the next byte of pixel\r
- // data and extract the corresponding entry from\r
- // the palette.\r
- //\r
- ulByte = (*pucData++ & 15) * 3;\r
- ulByte = (*(unsigned long *)(pucPalette + ulByte) &\r
- 0x00ffffff);\r
-\r
- //\r
- // Translate this palette entry and write it to the\r
- // screen.\r
- //\r
- ulByte = DPYCOLORTRANSLATE(ulByte);\r
- WriteData(ulByte >> 8);\r
- WriteData(ulByte);\r
-\r
- //\r
- // Decrement the count of pixels to draw.\r
- //\r
- lCount--;\r
- }\r
- }\r
- }\r
-\r
- //\r
- // The image data has been drawn.\r
- //\r
- break;\r
- }\r
-\r
- //\r
- // The pixel data is in 8 bit per pixel format.\r
- //\r
- case 8:\r
- {\r
- //\r
- // Loop while there are more pixels to draw.\r
- //\r
- while(lCount--)\r
- {\r
- //\r
- // Get the next byte of pixel data and extract the\r
- // corresponding entry from the palette.\r
- //\r
- ulByte = *pucData++ * 3;\r
- ulByte = *(unsigned long *)(pucPalette + ulByte) & 0x00ffffff;\r
-\r
- //\r
- // Translate this palette entry and write it to the screen.\r
- //\r
- ulByte = DPYCOLORTRANSLATE(ulByte);\r
- WriteData(ulByte >> 8);\r
- WriteData(ulByte);\r
- }\r
-\r
- //\r
- // The image data has been drawn.\r
- //\r
- break;\r
- }\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Flushes any cached drawing operations.\r
-//!\r
-//! \param pvDisplayData is a pointer to the driver-specific data for this\r
-//! display driver.\r
-//!\r
-//! This functions flushes any cached drawing operations to the display. This\r
-//! is useful when a local frame buffer is used for drawing operations, and the\r
-//! flush would copy the local frame buffer to the display. For the ST7637\r
-//! driver, the flush is a no operation.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-Formike128x128x16Flush(void *pvDisplayData)\r
-{\r
- //\r
- // There is nothing to be done.\r
- //\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Draws a horizontal line.\r
-//!\r
-//! \param pvDisplayData is a pointer to the driver-specific data for this\r
-//! display driver.\r
-//! \param lX1 is the X coordinate of the start of the line.\r
-//! \param lX2 is the X coordinate of the end of the line.\r
-//! \param lY is the Y coordinate of the line.\r
-//! \param ulValue is the color of the line.\r
-//!\r
-//! This function draws a horizontal line on the display. The coordinates of\r
-//! the line are assumed to be within the extents of the display.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-Formike128x128x16LineDrawH(void *pvDisplayData, long lX1, long lX2, long lY,\r
- unsigned long ulValue)\r
-{\r
- //\r
- // Set the extent of the line along the X axis.\r
- //\r
- WriteCommand(0x2a);\r
- WriteData(lX1);\r
- WriteData(lX2);\r
-\r
- //\r
- // Set the Y address of the display cursor.\r
- //\r
- WriteCommand(0x2b);\r
- WriteData(lY + 1);\r
- WriteData(lY + 1);\r
-\r
- //\r
- // Write the data RAM write command.\r
- //\r
- WriteCommand(0x2c);\r
-\r
- //\r
- // Loop through the pixels of this horizontal line.\r
- //\r
- while(lX1++ <= lX2)\r
- {\r
- //\r
- // Write the pixel value.\r
- //\r
- WriteData(ulValue >> 8);\r
- WriteData(ulValue);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Draws a vertical line.\r
-//!\r
-//! \param pvDisplayData is a pointer to the driver-specific data for this\r
-//! display driver.\r
-//! \param lX is the X coordinate of the line.\r
-//! \param lY1 is the Y coordinate of the start of the line.\r
-//! \param lY2 is the Y coordinate of the end of the line.\r
-//! \param ulValue is the color of the line.\r
-//!\r
-//! This function draws a vertical line on the display. The coordinates of the\r
-//! line are assumed to be within the extents of the display.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-Formike128x128x16LineDrawV(void *pvDisplayData, long lX, long lY1, long lY2,\r
- unsigned long ulValue)\r
-{\r
- //\r
- // Set the X address of the display cursor.\r
- //\r
- WriteCommand(0x2a);\r
- WriteData(lX);\r
- WriteData(lX);\r
-\r
- //\r
- // Set the extent of the line along the Y axis.\r
- //\r
- WriteCommand(0x2b);\r
- WriteData(lY1 + 1);\r
- WriteData(lY2 + 1);\r
-\r
- //\r
- // Write the data RAM write command.\r
- //\r
- WriteCommand(0x2c);\r
-\r
- //\r
- // Loop through the pixels of this vertical line.\r
- //\r
- while(lY1++ <= lY2)\r
- {\r
- //\r
- // Write the pixel value.\r
- //\r
- WriteData(ulValue >> 8);\r
- WriteData(ulValue);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Fills a rectangle.\r
-//!\r
-//! \param pvDisplayData is a pointer to the driver-specific data for this\r
-//! display driver.\r
-//! \param pRect is a pointer to the structure describing the rectangle.\r
-//! \param ulValue is the color of the rectangle.\r
-//!\r
-//! This function fills a rectangle on the display. The coordinates of the\r
-//! rectangle are assumed to be within the extents of the display, and the\r
-//! rectangle specification is fully inclusive (i.e. both sXMin and sXMax are\r
-//! drawn, along with sYMin and sYMax).\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-Formike128x128x16RectFill(void *pvDisplayData, const tRectangle *pRect,\r
- unsigned long ulValue)\r
-{\r
- long lCount;\r
-\r
- //\r
- // Set the extent of the rectangle along the X axis.\r
- //\r
- WriteCommand(0x2a);\r
- WriteData(pRect->sXMin);\r
- WriteData(pRect->sXMax);\r
-\r
- //\r
- // Set the extent of the rectangle along the Y axis.\r
- //\r
- WriteCommand(0x2b);\r
- WriteData(pRect->sYMin + 1);\r
- WriteData(pRect->sYMax + 1);\r
-\r
- //\r
- // Write the data RAM write command.\r
- //\r
- WriteCommand(0x2c);\r
-\r
- //\r
- // Loop through the pixels in this rectangle.\r
- //\r
- for(lCount = ((pRect->sXMax - pRect->sXMin + 1) *\r
- (pRect->sYMax - pRect->sYMin + 1)); lCount > 0; lCount--)\r
- {\r
- //\r
- // Write the pixel value.\r
- //\r
- WriteData(ulValue >> 8);\r
- WriteData(ulValue);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Translates a 24-bit RGB color to a display driver-specific color.\r
-//!\r
-//! \param pvDisplayData is a pointer to the driver-specific data for this\r
-//! display driver.\r
-//! \param ulValue is the 24-bit RGB color. The least-significant byte is the\r
-//! blue channel, the next byte is the green channel, and the third byte is the\r
-//! red channel.\r
-//!\r
-//! This function translates a 24-bit RGB color into a value that can be\r
-//! written into the display's frame buffer in order to reproduce that color,\r
-//! or the closest possible approximation of that color.\r
-//!\r
-//! \return Returns the display-driver specific color.\r
-//\r
-//*****************************************************************************\r
-static unsigned long\r
-Formike128x128x16ColorTranslate(void *pvDisplayData, unsigned long ulValue)\r
-{\r
- //\r
- // Translate from a 24-bit RGB color to a 5-6-5 RGB color.\r
- //\r
- return(DPYCOLORTRANSLATE(ulValue));\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! The display structure that describes the driver for the Formike Electronic\r
-//! KWH015C04-F01 CSTN panel with an ST7637 controller.\r
-//\r
-//*****************************************************************************\r
-const tDisplay g_sFormike128x128x16 =\r
-{\r
- sizeof(tDisplay),\r
- 0,\r
- 128,\r
- 128,\r
- Formike128x128x16PixelDraw,\r
- Formike128x128x16PixelDrawMultiple,\r
- Formike128x128x16LineDrawH,\r
- Formike128x128x16LineDrawV,\r
- Formike128x128x16RectFill,\r
- Formike128x128x16ColorTranslate,\r
- Formike128x128x16Flush\r
-};\r
-\r
-//*****************************************************************************\r
-//\r
-// Close the Doxygen group.\r
-//! @}\r
-//\r
-//*****************************************************************************\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-/* FreeRTOS.org demo wrappers. These are required so the prototypes for the\r
-functions are the same as for the display drivers used by other evaluation\r
-kits. */\r
-\r
-static tContext sContext;\r
-\r
-void vFormike128x128x16Clear( void )\r
-{\r
-const tRectangle xRectangle = { 0, 0, 127, 127 };\r
-\r
- GrContextForegroundSet( &sContext, ClrBlack );\r
- GrRectFill( &sContext, &xRectangle );\r
- GrContextForegroundSet(&sContext, ClrWhite);\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vFormike128x128x16StringDraw( const char *pcString, unsigned long lX, unsigned long lY, unsigned char ucColor )\r
-{\r
- GrContextForegroundSet(&sContext, ClrWhite);\r
- GrStringDraw( &sContext, pcString, strlen( pcString ), lX, lY, false );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vFormike128x128x16Init( unsigned long ul )\r
-{\r
-tRectangle rectScreen;\r
-const unsigned char *pcAppName = "www.FreeRTOS.org";\r
-\r
- ( void ) ul;\r
- \r
- Formike128x128x16Init();\r
- Formike128x128x16BacklightOn();\r
- GrContextInit(&sContext, &g_sFormike128x128x16);\r
- GrContextFontSet(&sContext, &g_sFontCmss12);\r
- rectScreen.sXMin = 0;\r
-\r
- /* Fill the screen with a black rectangle. */\r
- rectScreen.sYMin = 0;\r
- rectScreen.sXMax = g_sFormike128x128x16.usWidth - 1;\r
- rectScreen.sYMax = g_sFormike128x128x16.usHeight - 1;\r
- GrContextForegroundSet(&sContext, ClrBlack);\r
- GrRectFill(&sContext, &rectScreen);\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vFormike128x128x16ImageDraw( const unsigned char *pucImage, unsigned long ulX, unsigned long ulY, unsigned long ulWidth, unsigned long ulHeight )\r
-{\r
- GrImageDraw( &sContext, pucImage, ( long ) ulX, ( long ) ulY);\r
-}\r
-\r
-\r
-\r
-\r
+++ /dev/null
-//*****************************************************************************\r
-//\r
-// formike128x128x16.h - Prototypes for the Formike Electronic KWH015C04-F01\r
-// display driver.\r
-//\r
-// Copyright (c) 2008 Luminary Micro, Inc. All rights reserved.\r
-// \r
-// Software License Agreement\r
-// \r
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
-// exclusively on LMI's microcontroller products.\r
-// \r
-// The software is owned by LMI and/or its suppliers, and is protected under\r
-// applicable copyright laws. All rights are reserved. You may not combine\r
-// this software with "viral" open-source software in order to form a larger\r
-// program. Any use in violation of the foregoing restrictions may subject\r
-// the user to criminal sanctions under applicable laws, as well as to civil\r
-// liability for the breach of the terms and conditions of this license.\r
-// \r
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
-// \r
-// This is part of revision 2523 of the Stellaris Peripheral Driver Library.\r
-//\r
-//*****************************************************************************\r
-\r
-#ifndef __FORMIKE128X128X16_H__\r
-#define __FORMIKE128X128X16_H__\r
-\r
-//*****************************************************************************\r
-//\r
-// Prototypes for the globals exported by this driver.\r
-//\r
-//*****************************************************************************\r
-extern void Formike128x128x16Init(void);\r
-extern void Formike128x128x16BacklightOn(void);\r
-extern void Formike128x128x16BacklightOff(void);\r
-extern const tDisplay g_sFormike128x128x16;\r
-\r
-/* FreeRTOS.org demo wrappers. These are required so the prototypes for the\r
-functions are the same as for the display drivers used by other evaluation\r
-kits. */\r
-void vFormike128x128x16Clear( void );\r
-void vFormike128x128x16StringDraw( const char *pcString, unsigned long lX, unsigned long lY, unsigned char ucColor );\r
-void vFormike128x128x16Init( unsigned long ul );\r
-void vFormike128x128x16ImageDraw( const unsigned char *pucImage, unsigned long ulX, unsigned long ulY, unsigned long ulWidth, unsigned long ulHeight );\r
-\r
-#endif // __FORMIKE128X128X16_H__\r
+++ /dev/null
-#ifndef LCD_MESSAGE_H\r
-#define LCD_MESSAGE_H\r
-\r
-typedef struct\r
-{\r
- char *pcMessage;\r
-} xOLEDMessage;\r
-\r
-#endif /* LCD_MESSAGE_H */\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-\r
-/*\r
- * Creates all the demo application tasks, then starts the scheduler. The WEB\r
- * documentation provides more details of the standard demo application tasks.\r
- * In addition to the standard demo tasks, the following tasks and tests are\r
- * defined and/or created within this file:\r
- *\r
- * "Fast Interrupt Test" - A high frequency periodic interrupt is generated\r
- * using a free running timer to demonstrate the use of the\r
- * configKERNEL_INTERRUPT_PRIORITY configuration constant. The interrupt\r
- * service routine measures the number of processor clocks that occur between\r
- * each interrupt - and in so doing measures the jitter in the interrupt timing.\r
- * The maximum measured jitter time is latched in the ulMaxJitter variable, and\r
- * displayed on the OLED display by the 'OLED' task as described below. The\r
- * fast interrupt is configured and handled in the timertest.c source file.\r
- *\r
- * "OLED" task - the OLED task is a 'gatekeeper' task. It is the only task that\r
- * is permitted to access the display directly. Other tasks wishing to write a\r
- * message to the OLED send the message on a queue to the OLED task instead of\r
- * accessing the OLED themselves. The OLED task just blocks on the queue waiting\r
- * for messages - waking and displaying the messages as they arrive.\r
- *\r
- * "Check" hook - This only executes every five seconds from the tick hook.\r
- * Its main function is to check that all the standard demo tasks are still\r
- * operational. Should any unexpected behaviour within a demo task be discovered\r
- * the tick hook will write an error to the OLED (via the OLED task). If all the\r
- * demo tasks are executing with their expected behaviour then the check task\r
- * writes PASS to the OLED (again via the OLED task), as described above.\r
- *\r
- * "uIP" task - This is the task that handles the uIP stack. All TCP/IP\r
- * processing is performed in this task.\r
- */\r
-\r
-\r
-\r
-\r
-/*************************************************************************\r
- * Please ensure to read http://www.freertos.org/portLM3Sxxxx_Eclipse.html\r
- * which provides information on configuring and running this demo for the\r
- * various Luminary Micro EKs.\r
- *************************************************************************/\r
-\r
-\r
-\r
-\r
-/* Standard includes. */\r
-#include <stdio.h>\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "queue.h"\r
-#include "semphr.h"\r
-\r
-/* Hardware library includes. */\r
-#include "hw_memmap.h"\r
-#include "hw_types.h"\r
-#include "hw_sysctl.h"\r
-#include "sysctl.h"\r
-#include "gpio.h"\r
-#include "grlib.h"\r
-#include "rit128x96x4.h"\r
-#include "osram128x64x4.h"\r
-#include "formike128x128x16.h"\r
-\r
-/* Demo app includes. */\r
-#include "BlockQ.h"\r
-#include "death.h"\r
-#include "integer.h"\r
-#include "blocktim.h"\r
-#include "flash.h"\r
-#include "partest.h"\r
-#include "semtest.h"\r
-#include "PollQ.h"\r
-#include "lcd_message.h"\r
-#include "bitmap.h"\r
-#include "GenQTest.h"\r
-#include "QPeek.h"\r
-#include "recmutex.h"\r
-#include "IntQueue.h"\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The time between cycles of the 'check' functionality (defined within the\r
-tick hook. */\r
-#define mainCHECK_DELAY ( ( TickType_t ) 5000 / portTICK_PERIOD_MS )\r
-\r
-/* Size of the stack allocated to the uIP task. */\r
-#define mainBASIC_WEB_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )\r
-\r
-/* The OLED task uses the sprintf function so requires a little more stack too. */\r
-#define mainOLED_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE + 50 )\r
-\r
-/* Task priorities. */\r
-#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
-#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
-#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
-#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-\r
-/* The maximum number of message that can be waiting for display at any one\r
-time. */\r
-#define mainOLED_QUEUE_SIZE ( 3 )\r
-\r
-/* Dimensions the buffer into which the jitter time is written. */\r
-#define mainMAX_MSG_LEN 25\r
-\r
-/* The period of the system clock in nano seconds. This is used to calculate\r
-the jitter time in nano seconds. */\r
-#define mainNS_PER_CLOCK ( ( unsigned long ) ( ( 1.0 / ( double ) configCPU_CLOCK_HZ ) * 1000000000.0 ) )\r
-\r
-/* Constants used when writing strings to the display. */\r
-#define mainCHARACTER_HEIGHT ( 9 )\r
-#define mainMAX_ROWS_128 ( mainCHARACTER_HEIGHT * 14 )\r
-#define mainMAX_ROWS_96 ( mainCHARACTER_HEIGHT * 10 )\r
-#define mainMAX_ROWS_64 ( mainCHARACTER_HEIGHT * 7 )\r
-#define mainFULL_SCALE ( 15 )\r
-#define ulSSI_FREQUENCY ( 3500000UL )\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * The task that handles the uIP stack. All TCP/IP processing is performed in\r
- * this task.\r
- */\r
-extern void vuIP_Task( void *pvParameters );\r
-\r
-/*\r
- * The display is written two by more than one task so is controlled by a\r
- * 'gatekeeper' task. This is the only task that is actually permitted to\r
- * access the display directly. Other tasks wanting to display a message send\r
- * the message to the gatekeeper.\r
- */\r
-static void vOLEDTask( void *pvParameters );\r
-\r
-/*\r
- * Configure the hardware for the demo.\r
- */\r
-static void prvSetupHardware( void );\r
-\r
-/*\r
- * Configures the high frequency timers - those used to measure the timing\r
- * jitter while the real time kernel is executing.\r
- */\r
-extern void vSetupHighFrequencyTimer( void );\r
-\r
-/*\r
- * The idle hook is used to run a test of the scheduler context switch\r
- * mechanism.\r
- */\r
-void vApplicationIdleHook( void ) __attribute__((naked));\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The queue used to send messages to the OLED task. */\r
-QueueHandle_t xOLEDQueue;\r
-\r
-/* The welcome text. */\r
-const char * const pcWelcomeMessage = " www.FreeRTOS.org";\r
-\r
-/* Variables used to detect the test in the idle hook failing. */\r
-unsigned long ulIdleError = pdFALSE;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*************************************************************************\r
- * Please ensure to read http://www.freertos.org/portLM3Sxxxx_Eclipse.html\r
- * which provides information on configuring and running this demo for the\r
- * various Luminary Micro EKs.\r
- *************************************************************************/\r
-int main( void )\r
-{\r
- prvSetupHardware();\r
-\r
- /* Create the queue used by the OLED task. Messages for display on the OLED\r
- are received via this queue. */\r
- xOLEDQueue = xQueueCreate( mainOLED_QUEUE_SIZE, sizeof( xOLEDMessage ) );\r
-\r
- /* Create the uIP task if running on a processor that includes a MAC and\r
- PHY. */\r
- if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
- {\r
- xTaskCreate( vuIP_Task, "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
- }\r
-\r
- /* Start the standard demo tasks. */\r
- vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
- vCreateBlockTimeTasks();\r
- vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
- vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
- vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
- vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
- vStartQueuePeekTasks();\r
- vStartRecursiveMutexTasks();\r
- vStartInterruptQueueTasks();\r
-\r
- /* Start the tasks defined within this file/specific to this demo. */\r
- xTaskCreate( vOLEDTask, "OLED", mainOLED_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
-\r
- /* The suicide tasks must be created last as they need to know how many\r
- tasks were running prior to their creation in order to ascertain whether\r
- or not the correct/expected number of tasks are running at any given time. */\r
- vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
-\r
- /* Configure the high frequency interrupt used to measure the interrupt\r
- jitter time. */\r
- vSetupHighFrequencyTimer();\r
-\r
- /* Start the scheduler. */\r
- vTaskStartScheduler();\r
-\r
- /* Will only get here if there was insufficient memory to create the idle\r
- task. */\r
- for( ;; );\r
- return 0;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void prvSetupHardware( void )\r
-{\r
- /* If running on Rev A2 silicon, turn the LDO voltage up to 2.75V. This is\r
- a workaround to allow the PLL to operate reliably. */\r
- if( DEVICE_IS_REVA2 )\r
- {\r
- SysCtlLDOSet( SYSCTL_LDO_2_75V );\r
- }\r
-\r
- /* Set the clocking to run from the PLL at 50 MHz */\r
- SysCtlClockSet( SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ );\r
-\r
- /* Enable Port F for Ethernet LEDs\r
- LED0 Bit 3 Output\r
- LED1 Bit 2 Output */\r
- SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOF );\r
- GPIODirModeSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3), GPIO_DIR_MODE_HW );\r
- GPIOPadConfigSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3 ), GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );\r
-\r
- vParTestInitialise();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vApplicationTickHook( void )\r
-{\r
-static xOLEDMessage xMessage = { "PASS" };\r
-static unsigned long ulTicksSinceLastDisplay = 0;\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
-\r
- /* Called from every tick interrupt. Have enough ticks passed to make it\r
- time to perform our health status check again? */\r
- ulTicksSinceLastDisplay++;\r
- if( ulTicksSinceLastDisplay >= mainCHECK_DELAY )\r
- {\r
- ulTicksSinceLastDisplay = 0;\r
-\r
- /* Has an error been found in any task? */\r
- if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN GEN Q";\r
- }\r
- else if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN PEEK Q";\r
- }\r
- else if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN BLOCK Q";\r
- }\r
- else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN BLOCK TIME";\r
- }\r
- else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN SEMAPHORE";\r
- }\r
- else if( xArePollingQueuesStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN POLL Q";\r
- }\r
- else if( xIsCreateTaskStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN CREATE";\r
- }\r
- else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN MATH";\r
- }\r
- else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN REC MUTEX";\r
- }\r
- else if( ulIdleError != pdFALSE )\r
- {\r
- xMessage.pcMessage = "ERROR IN HOOK";\r
- }\r
- else if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
- {\r
- xMessage.pcMessage = "ERROR IN INT QUEUE";\r
- }\r
-\r
-\r
- /* Send the message to the OLED gatekeeper for display. */\r
- xHigherPriorityTaskWoken = pdFALSE;\r
- xQueueSendFromISR( xOLEDQueue, &xMessage, &xHigherPriorityTaskWoken );\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vOLEDTask( void *pvParameters )\r
-{\r
-xOLEDMessage xMessage;\r
-unsigned long ulY, ulMaxY;\r
-static char cMessage[ mainMAX_MSG_LEN ];\r
-extern volatile unsigned long ulMaxJitter;\r
-unsigned portBASE_TYPE uxUnusedStackOnEntry, uxUnusedStackNow;\r
-const unsigned char *pucImage;\r
-\r
-/* Functions to access the OLED. The one used depends on the dev kit\r
-being used. */\r
-void ( *vOLEDInit )( unsigned long ) = NULL;\r
-void ( *vOLEDStringDraw )( const char *, unsigned long, unsigned long, unsigned char ) = NULL;\r
-void ( *vOLEDImageDraw )( const unsigned char *, unsigned long, unsigned long, unsigned long, unsigned long ) = NULL;\r
-void ( *vOLEDClear )( void ) = NULL;\r
-\r
- /* Just for demo purposes. */\r
- uxUnusedStackOnEntry = uxTaskGetStackHighWaterMark( NULL );\r
-\r
- /* Map the OLED access functions to the driver functions that are appropriate\r
- for the evaluation kit being used. */\r
- switch( HWREG( SYSCTL_DID1 ) & SYSCTL_DID1_PRTNO_MASK )\r
- {\r
- case SYSCTL_DID1_PRTNO_6965 :\r
- case SYSCTL_DID1_PRTNO_2965 : vOLEDInit = OSRAM128x64x4Init;\r
- vOLEDStringDraw = OSRAM128x64x4StringDraw;\r
- vOLEDImageDraw = OSRAM128x64x4ImageDraw;\r
- vOLEDClear = OSRAM128x64x4Clear;\r
- ulMaxY = mainMAX_ROWS_64;\r
- pucImage = pucBasicBitmap;\r
- break;\r
-\r
- case SYSCTL_DID1_PRTNO_1968 :\r
- case SYSCTL_DID1_PRTNO_8962 : vOLEDInit = RIT128x96x4Init;\r
- vOLEDStringDraw = RIT128x96x4StringDraw;\r
- vOLEDImageDraw = RIT128x96x4ImageDraw;\r
- vOLEDClear = RIT128x96x4Clear;\r
- ulMaxY = mainMAX_ROWS_96;\r
- pucImage = pucBasicBitmap;\r
- break;\r
-\r
- default : vOLEDInit = vFormike128x128x16Init;\r
- vOLEDStringDraw = vFormike128x128x16StringDraw;\r
- vOLEDImageDraw = vFormike128x128x16ImageDraw;\r
- vOLEDClear = vFormike128x128x16Clear;\r
- ulMaxY = mainMAX_ROWS_128;\r
- pucImage = pucGrLibBitmap;\r
- break;\r
- }\r
-\r
- ulY = ulMaxY;\r
-\r
- /* Initialise the OLED and display a startup message. */\r
- vOLEDInit( ulSSI_FREQUENCY );\r
- vOLEDStringDraw( "POWERED BY FreeRTOS", 0, 0, mainFULL_SCALE );\r
- vOLEDImageDraw( pucImage, 0, mainCHARACTER_HEIGHT + 1, bmpBITMAP_WIDTH, bmpBITMAP_HEIGHT );\r
-\r
- for( ;; )\r
- {\r
- /* Wait for a message to arrive that requires displaying. */\r
- xQueueReceive( xOLEDQueue, &xMessage, portMAX_DELAY );\r
-\r
- /* Write the message on the next available row. */\r
- ulY += mainCHARACTER_HEIGHT;\r
- if( ulY >= ulMaxY )\r
- {\r
- ulY = mainCHARACTER_HEIGHT;\r
- vOLEDClear();\r
- vOLEDStringDraw( pcWelcomeMessage, 0, 0, mainFULL_SCALE );\r
- }\r
-\r
- /* Display the message along with the maximum jitter time from the\r
- high priority time test. */\r
- sprintf( cMessage, "%s [%uns]", xMessage.pcMessage, ulMaxJitter * mainNS_PER_CLOCK );\r
- vOLEDStringDraw( cMessage, 0, ulY, mainFULL_SCALE );\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vApplicationStackOverflowHook( TaskHandle_t *pxTask, signed char *pcTaskName )\r
-{\r
- for( ;; );\r
-}\r
-\r
-\r
+++ /dev/null
-//*****************************************************************************\r
-//\r
-// osram128x64x4.c - Driver for the OSRAM 128x64x4 graphical OLED display.\r
-//\r
-// Copyright (c) 2006-2007 Luminary Micro, Inc. All rights reserved.\r
-// \r
-// Software License Agreement\r
-// \r
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
-// exclusively on LMI's microcontroller products.\r
-// \r
-// The software is owned by LMI and/or its suppliers, and is protected under\r
-// applicable copyright laws. All rights are reserved. Any use in violation\r
-// of the foregoing restrictions may subject the user to criminal sanctions\r
-// under applicable laws, as well as to civil liability for the breach of the\r
-// terms and conditions of this license.\r
-// \r
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
-// \r
-// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
-//\r
-//*****************************************************************************\r
-\r
-//*****************************************************************************\r
-//\r
-//! \addtogroup ek_lm3sx965_api\r
-//! @{\r
-//\r
-//*****************************************************************************\r
-\r
-#include "hw_ssi.h"\r
-#include "hw_memmap.h"\r
-#include "hw_sysctl.h"\r
-#include "hw_types.h"\r
-#include "debug.h"\r
-#include "gpio.h"\r
-#include "ssi.h"\r
-#include "sysctl.h"\r
-#include "osram128x64x4.h"\r
-\r
-//*****************************************************************************\r
-//\r
-// Flag to indicate if SSI port is enabled for OSRAM usage.\r
-//\r
-//*****************************************************************************\r
-static volatile tBoolean g_bSSIEnabled = false;\r
-\r
-//*****************************************************************************\r
-//\r
-// Define the OSRAM 128x64x4 Remap Setting(s). This will be used in\r
-// several places in the code to switch between vertical and horizontal\r
-// address incrementing.\r
-//\r
-// The Remap Command (0xA0) takes one 8-bit parameter. The parameter is\r
-// defined as follows.\r
-//\r
-// Bit 7: Reserved\r
-// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
-// When enabled, the COM signals are split Odd on one side, even on\r
-// the other. Otherwise, they are split 0-39 on one side, 40-79 on\r
-// the other.\r
-// Bit 5: Reserved\r
-// Bit 4: Disable(0)/Enable(1) COM Remap\r
-// When Enabled, ROW 0-79 map to COM 79-0 (i.e. reverse row order)\r
-// Bit 3: Reserved\r
-// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
-// When set, data RAM address will increment along the column rather\r
-// than along the row.\r
-// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
-// When enabled, the upper and lower nibbles in the DATA bus for access\r
-// to the data RAM are swapped.\r
-// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
-// When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
-// 127-0.\r
-//\r
-//*****************************************************************************\r
-#define OSRAM_INIT_REMAP 0x52\r
-#define OSRAM_INIT_OFFSET 0x4C\r
-static const unsigned char g_pucOSRAM128x64x4VerticalInc[] = { 0xA0, 0x56 };\r
-static const unsigned char g_pucOSRAM128x64x4HorizontalInc[] = { 0xA0, 0x52 };\r
-\r
-//*****************************************************************************\r
-//\r
-// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
-// table) for displaying text on the OLED display. The data is organized as\r
-// bytes from the left column to the right column, with each byte containing\r
-// the top row in the LSB and the bottom row in the MSB.\r
-//\r
-// Note: This is the same font data that is used in the EK-LM3S811\r
-// osram96x16x1 driver. The single bit-per-pixel is expaned in the StringDraw\r
-// function to the appropriate four bit-per-pixel gray scale format.\r
-//\r
-//*****************************************************************************\r
-static const unsigned char g_pucFont[96][5] =\r
-{\r
- { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
- { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
- { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
- { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
- { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
- { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
- { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
- { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
- { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
- { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
- { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
- { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
- { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
- { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
- { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
- { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
- { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
- { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
- { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
- { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
- { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
- { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
- { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
- { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
- { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
- { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
- { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
- { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
- { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
- { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
- { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
- { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
- { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
- { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
- { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
- { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
- { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
- { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
- { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
- { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
- { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
- { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
- { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
- { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
- { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
- { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
- { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
- { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
- { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
- { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
- { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
- { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
- { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
- { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
- { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
- { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
- { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
- { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
- { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
- { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
- { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
- { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
- { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
- { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
- { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
- { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
- { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
- { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
- { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
- { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
- { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
- { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
- { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
- { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
- { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
- { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
- { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
- { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
- { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
- { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
- { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
- { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
- { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
- { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
- { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
- { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
- { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
- { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
- { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
- { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
- { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
- { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
- { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
- { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
- { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
- { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
-};\r
-\r
-//*****************************************************************************\r
-//\r
-// The sequence of commands used to initialize the SSD0303 controller. Each\r
-// command is described as follows: there is a byte specifying the number of\r
-// bytes in the command sequence, followed by that many bytes of command data.\r
-// Note: This initialization sequence is derived from OSRAM App Note AN018.\r
-//\r
-//*****************************************************************************\r
-static const unsigned char g_pucOSRAM128x64x4Init[] =\r
-{\r
- //\r
- // Column Address\r
- //\r
- 4, 0x15, 0, 63, 0xe3,\r
-\r
- //\r
- // Row Address\r
- //\r
- 4, 0x75, 0, 63, 0xe3,\r
-\r
- //\r
- // Contrast Control\r
- //\r
- 3, 0x81, 50, 0xe3,\r
-\r
- //\r
- // Half Current Range\r
- //\r
- 2, 0x85, 0xe3,\r
-\r
- //\r
- // Display Re-map\r
- //\r
- 3, 0xA0, OSRAM_INIT_REMAP, 0xe3,\r
-\r
- //\r
- // Display Start Line\r
- //\r
- 3, 0xA1, 0, 0xe3,\r
-\r
- //\r
- // Display Offset\r
- //\r
- 3, 0xA2, OSRAM_INIT_OFFSET, 0xe3,\r
-\r
- //\r
- // Display Mode Normal\r
- //\r
- 2, 0xA4, 0xe3,\r
-\r
- //\r
- // Multiplex Ratio\r
- //\r
- 3, 0xA8, 63, 0xe3,\r
-\r
- //\r
- // Phase Length\r
- //\r
- 3, 0xB1, 0x22, 0xe3,\r
-\r
- //\r
- // Row Period\r
- //\r
- 3, 0xB2, 70, 0xe3,\r
-\r
- //\r
- // Display Clock Divide\r
- //\r
- 3, 0xB3, 0xF1, 0xe3,\r
-\r
- //\r
- // VSL\r
- //\r
- 3, 0xBF, 0x0D, 0xe3,\r
-\r
- //\r
- // VCOMH\r
- //\r
- 3, 0xBE, 0x02, 0xe3,\r
-\r
- //\r
- // VP\r
- //\r
- 3, 0xBC, 0x10, 0xe3,\r
-\r
- //\r
- // Gamma\r
- //\r
- 10, 0xB8, 0x01, 0x11, 0x22, 0x32, 0x43, 0x54, 0x65, 0x76, 0xe3,\r
-\r
- //\r
- // Set DC-DC\r
- 3, 0xAD, 0x03, 0xe3,\r
-\r
- //\r
- // Display ON/OFF\r
- //\r
- 2, 0xAF, 0xe3,\r
-};\r
-\r
-//*****************************************************************************\r
-//\r
-//! \internal\r
-//!\r
-//! Write a sequence of command bytes to the SSD0323 controller.\r
-//!\r
-//! The data is written in a polled fashion; this function will not return\r
-//! until the entire byte sequence has been written to the controller.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-OSRAMWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Return iff SSI port is not enabled for OSRAM.\r
- //\r
- if(!g_bSSIEnabled)\r
- {\r
- return;\r
- }\r
-\r
- //\r
- // Clear the command/control bit to enable command mode.\r
- //\r
- GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);\r
-\r
- //\r
- // Loop while there are more bytes left to be transferred.\r
- //\r
- while(ulCount != 0)\r
- {\r
- //\r
- // Write the next byte to the controller.\r
- //\r
- SSIDataPut(SSI0_BASE, *pucBuffer++);\r
-\r
- //\r
- // Dummy read to drain the fifo and time the GPIO signal.\r
- //\r
- SSIDataGet(SSI0_BASE, &ulTemp);\r
-\r
- //\r
- // Decrement the BYTE counter.\r
- //\r
- ulCount--;\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! \internal\r
-//!\r
-//! Write a sequence of data bytes to the SSD0323 controller.\r
-//!\r
-//! The data is written in a polled fashion; this function will not return\r
-//! until the entire byte sequence has been written to the controller.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-OSRAMWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Return iff SSI port is not enabled for OSRAM.\r
- //\r
- if(!g_bSSIEnabled)\r
- {\r
- return;\r
- }\r
-\r
- //\r
- // Set the command/control bit to enable data mode.\r
- //\r
- GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
-\r
- //\r
- // Loop while there are more bytes left to be transferred.\r
- //\r
- while(ulCount != 0)\r
- {\r
- //\r
- // Write the next byte to the controller.\r
- //\r
- SSIDataPut(SSI0_BASE, *pucBuffer++);\r
-\r
- //\r
- // Dummy read to drain the fifo and time the GPIO signal.\r
- //\r
- SSIDataGet(SSI0_BASE, &ulTemp);\r
-\r
- //\r
- // Decrement the BYTE counter.\r
- //\r
- ulCount--;\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Clears the OLED display.\r
-//!\r
-//! This function will clear the display RAM. All pixels in the display will\r
-//! be turned off.\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4Clear(void)\r
-{\r
- static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
- static const unsigned char pucCommand2[] = { 0x75, 0, 79 };\r
- unsigned long ulRow, ulColumn;\r
- static unsigned char pucZeroBuffer[8] = { 0, 0, 0, 0, 0, 0, 0, 0};\r
-\r
- //\r
- // Set the window to fill the entire display.\r
- //\r
- OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
- OSRAMWriteCommand(pucCommand2, sizeof(pucCommand2));\r
- OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
- sizeof(g_pucOSRAM128x64x4VerticalInc));\r
-\r
- //\r
- // In vertical address increment mode, loop through each column, filling\r
- // each row with 0.\r
- //\r
- for(ulColumn = 0; ulColumn < (128/2); ulColumn++)\r
- {\r
- //\r
- // 8 rows (bytes) per row of text.\r
- //\r
- for(ulRow = 0; ulRow < 80; ulRow += 8)\r
- {\r
- OSRAMWriteData(pucZeroBuffer, sizeof(pucZeroBuffer));\r
- }\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Displays a string on the OLED display.\r
-//!\r
-//! \param pcStr is a pointer to the string to display.\r
-//! \param ulX is the horizontal position to display the string, specified in\r
-//! columns from the left edge of the display.\r
-//! \param ulY is the vertical position to display the string, specified in\r
-//! rows from the top edge of the display.\r
-//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
-//!\r
-//! This function will draw a string on the display. Only the ASCII characters\r
-//! between 32 (space) and 126 (tilde) are supported; other characters will\r
-//! result in random data being draw on the display (based on whatever appears\r
-//! before/after the font in memory). The font is mono-spaced, so characters\r
-//! such as "i" and "l" have more white space around them than characters such\r
-//! as "m" or "w".\r
-//!\r
-//! If the drawing of the string reaches the right edge of the display, no more\r
-//! characters will be drawn. Therefore, special care is not required to avoid\r
-//! supplying a string that is "too long" to display.\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
-//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4StringDraw(const char *pcStr, unsigned long ulX,\r
- unsigned long ulY, unsigned char ucLevel)\r
-{\r
- static unsigned char pucBuffer[8];\r
- unsigned long ulIdx1, ulIdx2;\r
- unsigned char ucTemp;\r
-\r
- //\r
- // Check the arguments.\r
- //\r
- ASSERT(ulX < 128);\r
- ASSERT((ulX & 1) == 0);\r
- ASSERT(ulY < 64);\r
- ASSERT(ucLevel < 16);\r
-\r
- //\r
- // Setup a window starting at the specified column and row, ending\r
- // at the right edge of the display and 8 rows down (single character row).\r
- //\r
- pucBuffer[0] = 0x15;\r
- pucBuffer[1] = ulX / 2;\r
- pucBuffer[2] = 63;\r
- OSRAMWriteCommand(pucBuffer, 3);\r
- pucBuffer[0] = 0x75;\r
- pucBuffer[1] = ulY;\r
- pucBuffer[2] = ulY + 7;\r
- OSRAMWriteCommand(pucBuffer, 3);\r
- OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,\r
- sizeof(g_pucOSRAM128x64x4VerticalInc));\r
-\r
- //\r
- // Loop while there are more characters in the string.\r
- //\r
- while(*pcStr != 0)\r
- {\r
- //\r
- // Get a working copy of the current character and convert to an\r
- // index into the character bit-map array.\r
- //\r
- ucTemp = *pcStr;\r
- ucTemp &= 0x7F;\r
- if(ucTemp < ' ')\r
- {\r
- ucTemp = ' ';\r
- }\r
- else\r
- {\r
- ucTemp -= ' ';\r
- }\r
-\r
- //\r
- // Build and display the character buffer.\r
- //\r
- for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
- {\r
- //\r
- // Convert two columns of 1-bit font data into a single data\r
- // byte column of 4-bit font data.\r
- //\r
- for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
- {\r
- pucBuffer[ulIdx2] = 0;\r
- if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
- {\r
- pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
- }\r
- if((ulIdx1 < 2) &&\r
- (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
- {\r
- pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
- }\r
- }\r
-\r
- //\r
- // If there is room, dump the single data byte column to the\r
- // display. Otherwise, bail out.\r
- //\r
- if(ulX < 126)\r
- {\r
- OSRAMWriteData(pucBuffer, 8);\r
- ulX += 2;\r
- }\r
- else\r
- {\r
- return;\r
- }\r
- }\r
-\r
- //\r
- // Advance to the next character.\r
- //\r
- pcStr++;\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Displays an image on the OLED display.\r
-//!\r
-//! \param pucImage is a pointer to the image data.\r
-//! \param ulX is the horizontal position to display this image, specified in\r
-//! columns from the left edge of the display.\r
-//! \param ulY is the vertical position to display this image, specified in\r
-//! rows from the top of the display.\r
-//! \param ulWidth is the width of the image, specified in columns.\r
-//! \param ulHeight is the height of the image, specified in rows.\r
-//!\r
-//! This function will display a bitmap graphic on the display. Because of the\r
-//! format of the display RAM, the starting column (/e ulX) and the number of\r
-//! columns (/e ulWidth) must be an integer multiple of two.\r
-//!\r
-//! The image data is organized with the first row of image data appearing left\r
-//! to right, followed immediately by the second row of image data. Each byte\r
-//! contains the data for two columns in the current row, with the leftmost\r
-//! column being contained in bits 7:4 and the rightmost column being contained\r
-//! in bits 3:0.\r
-//!\r
-//! For example, an image six columns wide and seven scan lines tall would\r
-//! be arranged as follows (showing how the twenty one bytes of the image would\r
-//! appear on the display):\r
-//!\r
-//! \verbatim\r
-//! +-------------------+-------------------+-------------------+\r
-//! | Byte 0 | Byte 1 | Byte 2 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 3 | Byte 4 | Byte 5 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 6 | Byte 7 | Byte 8 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 9 | Byte 10 | Byte 11 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 12 | Byte 13 | Byte 14 |\r
-//! +---------+---------+---------+--3------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 15 | Byte 16 | Byte 17 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 18 | Byte 19 | Byte 20 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! \endverbatim\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by`\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
- unsigned long ulY, unsigned long ulWidth,\r
- unsigned long ulHeight)\r
-{\r
- static unsigned char pucBuffer[8];\r
-\r
- //\r
- // Check the arguments.\r
- //\r
- ASSERT(ulX < 128);\r
- ASSERT((ulX & 1) == 0);\r
- ASSERT(ulY < 64);\r
- ASSERT((ulX + ulWidth) <= 128);\r
- ASSERT((ulY + ulHeight) <= 64);\r
- ASSERT((ulWidth & 1) == 0);\r
-\r
- //\r
- // Setup a window starting at the specified column and row, and ending\r
- // at the column + width and row+height.\r
- //\r
- pucBuffer[0] = 0x15;\r
- pucBuffer[1] = ulX / 2;\r
- pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
- OSRAMWriteCommand(pucBuffer, 3);\r
- pucBuffer[0] = 0x75;\r
- pucBuffer[1] = ulY;\r
- pucBuffer[2] = ulY + ulHeight - 1;\r
- OSRAMWriteCommand(pucBuffer, 3);\r
- OSRAMWriteCommand(g_pucOSRAM128x64x4HorizontalInc,\r
- sizeof(g_pucOSRAM128x64x4HorizontalInc));\r
-\r
- //\r
- // Loop while there are more rows to display.\r
- //\r
- while(ulHeight--)\r
- {\r
- //\r
- // Write this row of image data.\r
- //\r
- OSRAMWriteData(pucImage, (ulWidth / 2));\r
-\r
- //\r
- // Advance to the next row of the image.\r
- //\r
- pucImage += (ulWidth / 2);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Enable the SSI component of the OLED display driver.\r
-//!\r
-//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
-//!\r
-//! This function initializes the SSI interface to the OLED display.\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4Enable(unsigned long ulFrequency)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Disable the SSI port.\r
- //\r
- SSIDisable(SSI0_BASE);\r
-\r
- //\r
- // Configure the SSI0 port for master mode.\r
- //\r
- SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
-\r
- //\r
- // (Re)Enable SSI control of the FSS pin.\r
- //\r
- GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD_WPU);\r
-\r
- //\r
- // Enable the SSI port.\r
- //\r
- SSIEnable(SSI0_BASE);\r
-\r
- //\r
- // Drain the receive fifo.\r
- //\r
- while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
- {\r
- }\r
-\r
- //\r
- // Indicate that the OSRAM driver can use the SSI Port.\r
- //\r
- g_bSSIEnabled = true;\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Enable the SSI component of the OLED display driver.\r
-//!\r
-//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
-//!\r
-//! This function initializes the SSI interface to the OLED display.\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4Disable(void)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Indicate that the OSRAM driver can no longer use the SSI Port.\r
- //\r
- g_bSSIEnabled = false;\r
-\r
- //\r
- // Drain the receive fifo.\r
- //\r
- while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
- {\r
- }\r
-\r
- //\r
- // Disable the SSI port.\r
- //\r
- SSIDisable(SSI0_BASE);\r
-\r
- //\r
- // Disable SSI control of the FSS pin.\r
- //\r
- GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_DIR_MODE_OUT);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD_WPU);\r
- GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
-\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Initialize the OLED display.\r
-//!\r
-//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
-//!\r
-//! This function initializes the SSI interface to the OLED display and\r
-//! configures the SSD0323 controller on the panel.\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4Init(unsigned long ulFrequency)\r
-{\r
- unsigned long ulIdx;\r
-\r
- //\r
- // Enable the SSI0 and GPIO port blocks as they are needed by this driver.\r
- //\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);\r
-\r
- //\r
- // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
- //\r
- GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD_WPU);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD_WPU);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_5, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD_WPU);\r
-\r
- //\r
- // Configure the PC7 pin as a D/Cn signal for OLED device.\r
- //\r
- GPIODirModeSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_DIR_MODE_OUT);\r
- GPIOPadConfigSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD);\r
- GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);\r
-\r
- //\r
- // Configure and enable the SSI0 port for master mode.\r
- //\r
- OSRAM128x64x4Enable(ulFrequency);\r
-\r
- //\r
- // Clear the frame buffer.\r
- //\r
- OSRAM128x64x4Clear();\r
-\r
- //\r
- // Initialize the SSD0323 controller. Loop through the initialization\r
- // sequence array, sending each command "string" to the controller.\r
- //\r
- for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
- ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
- {\r
- //\r
- // Send this command.\r
- //\r
- OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
- g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Turns on the OLED display.\r
-//!\r
-//! This function will turn on the OLED display, causing it to display the\r
-//! contents of its internal frame buffer.\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4DisplayOn(void)\r
-{\r
- unsigned long ulIdx;\r
-\r
- //\r
- // Initialize the SSD0323 controller. Loop through the initialization\r
- // sequence array, sending each command "string" to the controller.\r
- //\r
- for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);\r
- ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)\r
- {\r
- //\r
- // Send this command.\r
- //\r
- OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,\r
- g_pucOSRAM128x64x4Init[ulIdx] - 1);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Turns off the OLED display.\r
-//!\r
-//! This function will turn off the OLED display. This will stop the scanning\r
-//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
-//! the panel due to burn-in (it has similar characters to a CRT in this\r
-//! respect).\r
-//!\r
-//! This function is contained in <tt>osram128x64x4.c</tt>, with\r
-//! <tt>osram128x64x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-OSRAM128x64x4DisplayOff(void)\r
-{\r
- static const unsigned char pucCommand1[] =\r
- {\r
- 0xAE, 0xAD, 0x02\r
- };\r
-\r
- //\r
- // Turn off the DC-DC converter and the display.\r
- //\r
- OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// Close the Doxygen group.\r
-//! @}\r
-//\r
-//*****************************************************************************\r
+++ /dev/null
-//*****************************************************************************\r
-//\r
-// osram128x64x4.h - Prototypes for the driver for the OSRAM 128x64x4 graphical\r
-// OLED display.\r
-//\r
-// Copyright (c) 2006-2007 Luminary Micro, Inc. All rights reserved.\r
-// \r
-// Software License Agreement\r
-// \r
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
-// exclusively on LMI's microcontroller products.\r
-// \r
-// The software is owned by LMI and/or its suppliers, and is protected under\r
-// applicable copyright laws. All rights are reserved. Any use in violation\r
-// of the foregoing restrictions may subject the user to criminal sanctions\r
-// under applicable laws, as well as to civil liability for the breach of the\r
-// terms and conditions of this license.\r
-// \r
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
-// \r
-// This is part of revision 1408 of the Stellaris Peripheral Driver Library.\r
-//\r
-//*****************************************************************************\r
-\r
-#ifndef __OSRAM128X64X4_H__\r
-#define __OSRAM128X64X4_H__\r
-\r
-//*****************************************************************************\r
-//\r
-// Prototypes for the driver APIs.\r
-//\r
-//*****************************************************************************\r
-extern void OSRAM128x64x4Clear(void);\r
-extern void OSRAM128x64x4StringDraw(const char *pcStr,\r
- unsigned long ulX,\r
- unsigned long ulY,\r
- unsigned char ucLevel);\r
-extern void OSRAM128x64x4ImageDraw(const unsigned char *pucImage,\r
- unsigned long ulX,\r
- unsigned long ulY,\r
- unsigned long ulWidth,\r
- unsigned long ulHeight);\r
-extern void OSRAM128x64x4Init(unsigned long ulFrequency);\r
-extern void OSRAM128x64x4Enable(unsigned long ulFrequency);\r
-extern void OSRAM128x64x4Disable(void);\r
-extern void OSRAM128x64x4DisplayOn(void);\r
-extern void OSRAM128x64x4DisplayOff(void);\r
-\r
-//*****************************************************************************\r
-//\r
-// The following macro(s) map old names for the OSRAM functions to the new\r
-// names. In new code, the new names should be used in favor of the old names.\r
-//\r
-//*****************************************************************************\r
-#ifndef DEPRECATED\r
-#define OSRAM128x64x1InitSSI OSRAM128x64x4Enable\r
-#endif\r
-\r
-#endif // __OSRAM128X64X4_H__\r
+++ /dev/null
-/* Note used by this port of uIP, but required for compilation. */\r
-\r
+++ /dev/null
-/* Note used by this port of uIP, but required for compilation. */\r
-\r
+++ /dev/null
-//*****************************************************************************\r
-//\r
-// rit128x96x4.c - Driver for the RIT 128x96x4 graphical OLED display.\r
-//\r
-// Copyright (c) 2007 Luminary Micro, Inc. All rights reserved.\r
-// \r
-// Software License Agreement\r
-// \r
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
-// exclusively on LMI's microcontroller products.\r
-// \r
-// The software is owned by LMI and/or its suppliers, and is protected under\r
-// applicable copyright laws. All rights are reserved. Any use in violation\r
-// of the foregoing restrictions may subject the user to criminal sanctions\r
-// under applicable laws, as well as to civil liability for the breach of the\r
-// terms and conditions of this license.\r
-// \r
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
-// \r
-// This is part of revision 1504-conf of the Stellaris Peripheral Driver Library.\r
-//\r
-//*****************************************************************************\r
-\r
-//*****************************************************************************\r
-//\r
-//! \addtogroup ek_lm3sLM3S8962_api\r
-//! @{\r
-//\r
-//*****************************************************************************\r
-\r
-#include "hw_ssi.h"\r
-#include "hw_memmap.h"\r
-#include "hw_sysctl.h"\r
-#include "hw_types.h"\r
-#include "debug.h"\r
-#include "gpio.h"\r
-#include "ssi.h"\r
-#include "sysctl.h"\r
-#include "rit128x96x4.h"\r
-\r
-//*****************************************************************************\r
-//\r
-// Macros that define the peripheral, port, and pin used for the OLEDDC\r
-// panel control signal.\r
-//\r
-//*****************************************************************************\r
-\r
-unsigned long ulGPIOId = 0, ulGPIOBase = 0, ulOLEDDC_PIN = 0, ulOLEDEN_PIN = 0;\r
-\r
-#define LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC SYSCTL_PERIPH_GPIOA\r
-#define LM3S8962_GPIO_OLEDDC_BASE GPIO_PORTA_BASE\r
-#define LM3S8962_GPIO_OLEDDC_PIN GPIO_PIN_6\r
-#define LM3S8962_GPIO_OLEDEN_PIN GPIO_PIN_7\r
-\r
-#define LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC SYSCTL_PERIPH_GPIOH\r
-#define LM3S1968_GPIO_OLEDDC_BASE GPIO_PORTH_BASE\r
-#define LM3S1968_GPIO_OLEDDC_PIN GPIO_PIN_2\r
-#define LM3S1968_GPIO_OLEDEN_PIN GPIO_PIN_3\r
-\r
-\r
-//*****************************************************************************\r
-//\r
-// Flag to indicate if SSI port is enabled for display usage.\r
-//\r
-//*****************************************************************************\r
-static volatile tBoolean g_bSSIEnabled = false;\r
-\r
-//*****************************************************************************\r
-//\r
-// Buffer for storing sequences of command and data for the display.\r
-//\r
-//*****************************************************************************\r
-static unsigned char g_pucBuffer[8];\r
-\r
-//*****************************************************************************\r
-//\r
-// Define the SSD1329 128x96x4 Remap Setting(s). This will be used in\r
-// several places in the code to switch between vertical and horizontal\r
-// address incrementing. Note that the controller support 128 rows while\r
-// the RIT display only uses 96.\r
-//\r
-// The Remap Command (0xA0) takes one 8-bit parameter. The parameter is\r
-// defined as follows.\r
-//\r
-// Bit 7: Reserved\r
-// Bit 6: Disable(0)/Enable(1) COM Split Odd Even\r
-// When enabled, the COM signals are split Odd on one side, even on\r
-// the other. Otherwise, they are split 0-63 on one side, 64-127 on\r
-// the other.\r
-// Bit 5: Reserved\r
-// Bit 4: Disable(0)/Enable(1) COM Remap\r
-// When Enabled, ROW 0-127 map to COM 127-0 (i.e. reverse row order)\r
-// Bit 3: Reserved\r
-// Bit 2: Horizontal(0)/Vertical(1) Address Increment\r
-// When set, data RAM address will increment along the column rather\r
-// than along the row.\r
-// Bit 1: Disable(0)/Enable(1) Nibble Remap\r
-// When enabled, the upper and lower nibbles in the DATA bus for access\r
-// to the data RAM are swapped.\r
-// Bit 0: Disable(0)/Enable(1) Column Address Remap\r
-// When enabled, DATA RAM columns 0-63 are remapped to Segment Columns\r
-// 127-0.\r
-//\r
-//*****************************************************************************\r
-#define RIT_INIT_REMAP 0x52 // app note says 0x51\r
-#define RIT_INIT_OFFSET 0x00\r
-static const unsigned char g_pucRIT128x96x4VerticalInc[] = { 0xA0, 0x56 };\r
-static const unsigned char g_pucRIT128x96x4HorizontalInc[] = { 0xA0, 0x52 };\r
-\r
-//*****************************************************************************\r
-//\r
-// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this\r
-// table) for displaying text on the OLED display. The data is organized as\r
-// bytes from the left column to the right column, with each byte containing\r
-// the top row in the LSB and the bottom row in the MSB.\r
-//\r
-// Note: This is the same font data that is used in the EK-LM3S811\r
-// osram96x16x1 driver. The single bit-per-pixel is expaned in the StringDraw\r
-// function to the appropriate four bit-per-pixel gray scale format.\r
-//\r
-//*****************************************************************************\r
-static const unsigned char g_pucFont[96][5] =\r
-{\r
- { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "\r
- { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !\r
- { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "\r
- { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #\r
- { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $\r
- { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %\r
- { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &\r
- { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '\r
- { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (\r
- { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )\r
- { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *\r
- { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +\r
- { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,\r
- { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -\r
- { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .\r
- { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /\r
- { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0\r
- { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1\r
- { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2\r
- { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3\r
- { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4\r
- { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5\r
- { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6\r
- { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7\r
- { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8\r
- { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9\r
- { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :\r
- { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;\r
- { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <\r
- { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =\r
- { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >\r
- { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?\r
- { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @\r
- { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A\r
- { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B\r
- { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C\r
- { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D\r
- { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E\r
- { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F\r
- { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G\r
- { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H\r
- { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I\r
- { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J\r
- { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K\r
- { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L\r
- { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M\r
- { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N\r
- { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O\r
- { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P\r
- { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q\r
- { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R\r
- { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S\r
- { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T\r
- { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U\r
- { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V\r
- { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W\r
- { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X\r
- { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y\r
- { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z\r
- { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [\r
- { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"\r
- { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]\r
- { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^\r
- { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _\r
- { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `\r
- { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a\r
- { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b\r
- { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c\r
- { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d\r
- { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e\r
- { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f\r
- { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g\r
- { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h\r
- { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i\r
- { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j\r
- { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k\r
- { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l\r
- { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m\r
- { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n\r
- { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o\r
- { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p\r
- { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q\r
- { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r\r
- { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s\r
- { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t\r
- { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u\r
- { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v\r
- { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w\r
- { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x\r
- { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y\r
- { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z\r
- { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {\r
- { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |\r
- { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }\r
- { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
- { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~\r
-};\r
-\r
-//*****************************************************************************\r
-//\r
-// The sequence of commands used to initialize the SSD1329 controller. Each\r
-// command is described as follows: there is a byte specifying the number of\r
-// bytes in the command sequence, followed by that many bytes of command data.\r
-// Note: This initialization sequence is derived from RIT App Note for\r
-// the P14201. Values used are from the RIT app note, except where noted.\r
-//\r
-//*****************************************************************************\r
-static const unsigned char g_pucRIT128x96x4Init[] =\r
-{\r
- //\r
- // Unlock commands\r
- //\r
- 3, 0xFD, 0x12, 0xe3,\r
-\r
- //\r
- // Display off\r
- //\r
- 2, 0xAE, 0xe3,\r
-\r
- //\r
- // Icon off\r
- //\r
- 3, 0x94, 0, 0xe3,\r
-\r
- //\r
- // Multiplex ratio\r
- //\r
- 3, 0xA8, 95, 0xe3,\r
-\r
- //\r
- // Contrast\r
- //\r
- 3, 0x81, 0xb7, 0xe3,\r
-\r
- //\r
- // Pre-charge current\r
- //\r
- 3, 0x82, 0x3f, 0xe3,\r
-\r
- //\r
- // Display Re-map\r
- //\r
- 3, 0xA0, RIT_INIT_REMAP, 0xe3,\r
-\r
- //\r
- // Display Start Line\r
- //\r
- 3, 0xA1, 0, 0xe3,\r
-\r
- //\r
- // Display Offset\r
- //\r
- 3, 0xA2, RIT_INIT_OFFSET, 0xe3,\r
-\r
- //\r
- // Display Mode Normal\r
- //\r
- 2, 0xA4, 0xe3,\r
-\r
- //\r
- // Phase Length\r
- //\r
- 3, 0xB1, 0x11, 0xe3,\r
-\r
- //\r
- // Frame frequency\r
- //\r
- 3, 0xB2, 0x23, 0xe3,\r
-\r
- //\r
- // Front Clock Divider\r
- //\r
- 3, 0xB3, 0xe2, 0xe3,\r
-\r
- //\r
- // Set gray scale table. App note uses default command:\r
- // 2, 0xB7, 0xe3\r
- // This gray scale attempts some gamma correction to reduce the\r
- // the brightness of the low levels.\r
- //\r
- 17, 0xB8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3,\r
-\r
- //\r
- // Second pre-charge period. App note uses value 0x04.\r
- //\r
- 3, 0xBB, 0x01, 0xe3,\r
-\r
- //\r
- // Pre-charge voltage\r
- //\r
- 3, 0xBC, 0x3f, 0xe3,\r
-\r
- //\r
- // Display ON\r
- //\r
- 2, 0xAF, 0xe3,\r
-};\r
-\r
-//*****************************************************************************\r
-//\r
-//! \internal\r
-//!\r
-//! Write a sequence of command bytes to the SSD1329 controller.\r
-//!\r
-//! The data is written in a polled fashion; this function will not return\r
-//! until the entire byte sequence has been written to the controller.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-RITWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Return if SSI port is not enabled for RIT display.\r
- //\r
- if(!g_bSSIEnabled)\r
- {\r
- return;\r
- }\r
-\r
- //\r
- // Clear the command/control bit to enable command mode.\r
- //\r
- GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, 0); \r
-\r
- //\r
- // Loop while there are more bytes left to be transferred.\r
- //\r
- while(ulCount != 0)\r
- {\r
- //\r
- // Write the next byte to the controller.\r
- //\r
- SSIDataPut(SSI0_BASE, *pucBuffer++);\r
-\r
- //\r
- // Dummy read to drain the fifo and time the GPIO signal.\r
- //\r
- SSIDataGet(SSI0_BASE, &ulTemp);\r
-\r
- //\r
- // Decrement the BYTE counter.\r
- //\r
- ulCount--;\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! \internal\r
-//!\r
-//! Write a sequence of data bytes to the SSD1329 controller.\r
-//!\r
-//! The data is written in a polled fashion; this function will not return\r
-//! until the entire byte sequence has been written to the controller.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-static void\r
-RITWriteData(const unsigned char *pucBuffer, unsigned long ulCount)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Return if SSI port is not enabled for RIT display.\r
- //\r
- if(!g_bSSIEnabled)\r
- {\r
- return;\r
- }\r
-\r
- //\r
- // Set the command/control bit to enable data mode.\r
- //\r
- GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, ulOLEDDC_PIN);\r
-\r
- //\r
- // Loop while there are more bytes left to be transferred.\r
- //\r
- while(ulCount != 0)\r
- {\r
- //\r
- // Write the next byte to the controller.\r
- //\r
- SSIDataPut(SSI0_BASE, *pucBuffer++);\r
-\r
- //\r
- // Dummy read to drain the fifo and time the GPIO signal.\r
- //\r
- SSIDataGet(SSI0_BASE, &ulTemp);\r
-\r
- //\r
- // Decrement the BYTE counter.\r
- //\r
- ulCount--;\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Clears the OLED display.\r
-//!\r
-//! This function will clear the display RAM. All pixels in the display will\r
-//! be turned off.\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4Clear(void)\r
-{\r
- static const unsigned char pucCommand1[] = { 0x15, 0, 63 };\r
- static const unsigned char pucCommand2[] = { 0x75, 0, 127 };\r
- unsigned long ulRow, ulColumn;\r
-\r
- //\r
- // Clear out the buffer used for sending bytes to the display.\r
- *(unsigned long *)&g_pucBuffer[0] = 0;\r
- *(unsigned long *)&g_pucBuffer[4] = 0;\r
-\r
- //\r
- // Set the window to fill the entire display.\r
- //\r
- RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
- RITWriteCommand(pucCommand2, sizeof(pucCommand2));\r
- RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
- sizeof(g_pucRIT128x96x4HorizontalInc));\r
-\r
- //\r
- // Loop through the rows\r
- //\r
- for(ulRow = 0; ulRow < 96; ulRow++)\r
- {\r
- //\r
- // Loop through the columns. Each byte is two pixels,\r
- // and the buffer hold 8 bytes, so 16 pixels are cleared\r
- // at a time.\r
- //\r
- for(ulColumn = 0; ulColumn < 128; ulColumn += 8 * 2)\r
- {\r
- //\r
- // Write 8 clearing bytes to the display, which will\r
- // clear 16 pixels across.\r
- //\r
- RITWriteData(g_pucBuffer, sizeof(g_pucBuffer));\r
- }\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Displays a string on the OLED display.\r
-//!\r
-//! \param pcStr is a pointer to the string to display.\r
-//! \param ulX is the horizontal position to display the string, specified in\r
-//! columns from the left edge of the display.\r
-//! \param ulY is the vertical position to display the string, specified in\r
-//! rows from the top edge of the display.\r
-//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.\r
-//!\r
-//! This function will draw a string on the display. Only the ASCII characters\r
-//! between 32 (space) and 126 (tilde) are supported; other characters will\r
-//! result in random data being draw on the display (based on whatever appears\r
-//! before/after the font in memory). The font is mono-spaced, so characters\r
-//! such as "i" and "l" have more white space around them than characters such\r
-//! as "m" or "w".\r
-//!\r
-//! If the drawing of the string reaches the right edge of the display, no more\r
-//! characters will be drawn. Therefore, special care is not required to avoid\r
-//! supplying a string that is "too long" to display.\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \note Because the OLED display packs 2 pixels of data in a single byte, the\r
-//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4StringDraw(const char *pcStr, unsigned long ulX,\r
- unsigned long ulY, unsigned char ucLevel)\r
-{\r
- unsigned long ulIdx1, ulIdx2;\r
- unsigned char ucTemp;\r
-\r
- //\r
- // Check the arguments.\r
- //\r
- ASSERT(ulX < 128);\r
- ASSERT((ulX & 1) == 0);\r
- ASSERT(ulY < 96);\r
- ASSERT(ucLevel < 16);\r
-\r
- //\r
- // Setup a window starting at the specified column and row, ending\r
- // at the right edge of the display and 8 rows down (single character row).\r
- //\r
- g_pucBuffer[0] = 0x15;\r
- g_pucBuffer[1] = ulX / 2;\r
- g_pucBuffer[2] = 63;\r
- RITWriteCommand(g_pucBuffer, 3);\r
- g_pucBuffer[0] = 0x75;\r
- g_pucBuffer[1] = ulY;\r
- g_pucBuffer[2] = ulY + 7;\r
- RITWriteCommand(g_pucBuffer, 3);\r
- RITWriteCommand(g_pucRIT128x96x4VerticalInc,\r
- sizeof(g_pucRIT128x96x4VerticalInc));\r
-\r
- //\r
- // Loop while there are more characters in the string.\r
- //\r
- while(*pcStr != 0)\r
- {\r
- //\r
- // Get a working copy of the current character and convert to an\r
- // index into the character bit-map array.\r
- //\r
- ucTemp = *pcStr;\r
- ucTemp &= 0x7F;\r
- if(ucTemp < ' ')\r
- {\r
- ucTemp = ' ';\r
- }\r
- else\r
- {\r
- ucTemp -= ' ';\r
- }\r
-\r
- //\r
- // Build and display the character buffer.\r
- //\r
- for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)\r
- {\r
- //\r
- // Convert two columns of 1-bit font data into a single data\r
- // byte column of 4-bit font data.\r
- //\r
- for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)\r
- {\r
- g_pucBuffer[ulIdx2] = 0;\r
- if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))\r
- {\r
- g_pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);\r
- }\r
- if((ulIdx1 < 2) &&\r
- (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))\r
- {\r
- g_pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);\r
- }\r
- }\r
-\r
- //\r
- // If there is room, dump the single data byte column to the\r
- // display. Otherwise, bail out.\r
- //\r
- if(ulX < 126)\r
- {\r
- RITWriteData(g_pucBuffer, 8);\r
- ulX += 2;\r
- }\r
- else\r
- {\r
- return;\r
- }\r
- }\r
-\r
- //\r
- // Advance to the next character.\r
- //\r
- pcStr++;\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Displays an image on the OLED display.\r
-//!\r
-//! \param pucImage is a pointer to the image data.\r
-//! \param ulX is the horizontal position to display this image, specified in\r
-//! columns from the left edge of the display.\r
-//! \param ulY is the vertical position to display this image, specified in\r
-//! rows from the top of the display.\r
-//! \param ulWidth is the width of the image, specified in columns.\r
-//! \param ulHeight is the height of the image, specified in rows.\r
-//!\r
-//! This function will display a bitmap graphic on the display. Because of the\r
-//! format of the display RAM, the starting column (\e ulX) and the number of\r
-//! columns (\e ulWidth) must be an integer multiple of two.\r
-//!\r
-//! The image data is organized with the first row of image data appearing left\r
-//! to right, followed immediately by the second row of image data. Each byte\r
-//! contains the data for two columns in the current row, with the leftmost\r
-//! column being contained in bits 7:4 and the rightmost column being contained\r
-//! in bits 3:0.\r
-//!\r
-//! For example, an image six columns wide and seven scan lines tall would\r
-//! be arranged as follows (showing how the twenty one bytes of the image would\r
-//! appear on the display):\r
-//!\r
-//! \verbatim\r
-//! +-------------------+-------------------+-------------------+\r
-//! | Byte 0 | Byte 1 | Byte 2 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 3 | Byte 4 | Byte 5 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 6 | Byte 7 | Byte 8 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 9 | Byte 10 | Byte 11 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 12 | Byte 13 | Byte 14 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 15 | Byte 16 | Byte 17 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | Byte 18 | Byte 19 | Byte 20 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |\r
-//! +---------+---------+---------+---------+---------+---------+\r
-//! \endverbatim\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,\r
- unsigned long ulY, unsigned long ulWidth,\r
- unsigned long ulHeight)\r
-{\r
- //\r
- // Check the arguments.\r
- //\r
- ASSERT(ulX < 128);\r
- ASSERT((ulX & 1) == 0);\r
- ASSERT(ulY < 96);\r
- ASSERT((ulX + ulWidth) <= 128);\r
- ASSERT((ulY + ulHeight) <= 96);\r
- ASSERT((ulWidth & 1) == 0);\r
-\r
- //\r
- // Setup a window starting at the specified column and row, and ending\r
- // at the column + width and row+height.\r
- //\r
- g_pucBuffer[0] = 0x15;\r
- g_pucBuffer[1] = ulX / 2;\r
- g_pucBuffer[2] = (ulX + ulWidth - 2) / 2;\r
- RITWriteCommand(g_pucBuffer, 3);\r
- g_pucBuffer[0] = 0x75;\r
- g_pucBuffer[1] = ulY;\r
- g_pucBuffer[2] = ulY + ulHeight - 1;\r
- RITWriteCommand(g_pucBuffer, 3);\r
- RITWriteCommand(g_pucRIT128x96x4HorizontalInc,\r
- sizeof(g_pucRIT128x96x4HorizontalInc));\r
-\r
- //\r
- // Loop while there are more rows to display.\r
- //\r
- while(ulHeight--)\r
- {\r
- //\r
- // Write this row of image data.\r
- //\r
- RITWriteData(pucImage, (ulWidth / 2));\r
-\r
- //\r
- // Advance to the next row of the image.\r
- //\r
- pucImage += (ulWidth / 2);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Enable the SSI component of the OLED display driver.\r
-//!\r
-//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
-//!\r
-//! This function initializes the SSI interface to the OLED display.\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4Enable(unsigned long ulFrequency)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Disable the SSI port.\r
- //\r
- SSIDisable(SSI0_BASE);\r
-\r
- //\r
- // Configure the SSI0 port for master mode.\r
- //\r
- SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);\r
-\r
- //\r
- // (Re)Enable SSI control of the FSS pin.\r
- //\r
- GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD_WPU);\r
-\r
- //\r
- // Enable the SSI port.\r
- //\r
- SSIEnable(SSI0_BASE);\r
-\r
- //\r
- // Drain the receive fifo.\r
- //\r
- while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
- {\r
- }\r
-\r
- //\r
- // Indicate that the RIT driver can use the SSI Port.\r
- //\r
- g_bSSIEnabled = true;\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Enable the SSI component of the OLED display driver.\r
-//!\r
-//! This function initializes the SSI interface to the OLED display.\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4Disable(void)\r
-{\r
- unsigned long ulTemp;\r
-\r
- //\r
- // Indicate that the RIT driver can no longer use the SSI Port.\r
- //\r
- g_bSSIEnabled = false;\r
-\r
- //\r
- // Drain the receive fifo.\r
- //\r
- while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)\r
- {\r
- }\r
-\r
- //\r
- // Disable the SSI port.\r
- //\r
- SSIDisable(SSI0_BASE);\r
-\r
- //\r
- // Disable SSI control of the FSS pin.\r
- //\r
- GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,\r
- GPIO_PIN_TYPE_STD_WPU);\r
- GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Initialize the OLED display.\r
-//!\r
-//! \param ulFrequency specifies the SSI Clock Frequency to be used.\r
-//!\r
-//! This function initializes the SSI interface to the OLED display and\r
-//! configures the SSD1329 controller on the panel.\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4Init(unsigned long ulFrequency)\r
-{\r
- unsigned long ulIdx;\r
-\r
-\r
- /* Determine which board is being used. */\r
- if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )\r
- {\r
- /* Ethernet is present, we must be using the LM3S8962 EK. */\r
- ulGPIOId = LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC;\r
- ulGPIOBase = LM3S8962_GPIO_OLEDDC_BASE;\r
- ulOLEDDC_PIN = GPIO_PIN_6;\r
- ulOLEDEN_PIN = GPIO_PIN_7;\r
- }\r
- else\r
- {\r
- /* Ethernet is not present, we must be using the LM3S1968 EK. */\r
- ulGPIOId = LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC;\r
- ulGPIOBase = LM3S1968_GPIO_OLEDDC_BASE;\r
- ulOLEDDC_PIN = GPIO_PIN_2;\r
- ulOLEDEN_PIN = GPIO_PIN_3;\r
- }\r
-\r
- //\r
- // Enable the SSI0 and GPIO port blocks as they are needed by this driver.\r
- //\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);\r
- SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);\r
- SysCtlPeripheralEnable(ulGPIOId); \r
-\r
- //\r
- // Configure the SSI0CLK and SSIOTX pins for SSI operation.\r
- //\r
- GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);\r
- GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5,\r
- GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU);\r
-\r
- //\r
- // Configure the GPIO port pin used as a D/Cn signal for OLED device,\r
- // and the port pin used to enable power to the OLED panel.\r
- //\r
- GPIOPinTypeGPIOOutput(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN);\r
- GPIOPadConfigSet(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
- GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);\r
- GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,\r
- ulOLEDDC_PIN | ulOLEDEN_PIN);\r
-\r
- //\r
- // Configure and enable the SSI0 port for master mode.\r
- //\r
- RIT128x96x4Enable(ulFrequency);\r
-\r
- //\r
- // Clear the frame buffer.\r
- //\r
- RIT128x96x4Clear();\r
-\r
- //\r
- // Initialize the SSD1329 controller. Loop through the initialization\r
- // sequence array, sending each command "string" to the controller.\r
- //\r
- for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
- ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
- {\r
- //\r
- // Send this command.\r
- //\r
- RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
- g_pucRIT128x96x4Init[ulIdx] - 1);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Turns on the OLED display.\r
-//!\r
-//! This function will turn on the OLED display, causing it to display the\r
-//! contents of its internal frame buffer.\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4DisplayOn(void)\r
-{\r
- unsigned long ulIdx;\r
-\r
- //\r
- // Initialize the SSD1329 controller. Loop through the initialization\r
- // sequence array, sending each command "string" to the controller.\r
- //\r
- for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);\r
- ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)\r
- {\r
- //\r
- // Send this command.\r
- //\r
- RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,\r
- g_pucRIT128x96x4Init[ulIdx] - 1);\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-//! Turns off the OLED display.\r
-//!\r
-//! This function will turn off the OLED display. This will stop the scanning\r
-//! of the panel and turn off the on-chip DC-DC converter, preventing damage to\r
-//! the panel due to burn-in (it has similar characters to a CRT in this\r
-//! respect).\r
-//!\r
-//! This function is contained in <tt>rit128x96x4.c</tt>, with\r
-//! <tt>rit128x96x4.h</tt> containing the API definition for use by\r
-//! applications.\r
-//!\r
-//! \return None.\r
-//\r
-//*****************************************************************************\r
-void\r
-RIT128x96x4DisplayOff(void)\r
-{\r
- static const unsigned char pucCommand1[] =\r
- {\r
- 0xAE, 0xe3\r
- };\r
-\r
- //\r
- // Put the display to sleep.\r
- //\r
- RITWriteCommand(pucCommand1, sizeof(pucCommand1));\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// Close the Doxygen group.\r
-//! @}\r
-//\r
-//*****************************************************************************\r
+++ /dev/null
-/******************************************************************************\r
- *\r
- * standalone.ld - Linker script for applications using startup.c and\r
- * DriverLib.\r
- *\r
- * Copyright (c) 2005-2007 Luminary Micro, Inc. All rights reserved.\r
- * \r
- * Software License Agreement\r
- * \r
- * Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
- * exclusively on LMI's microcontroller products.\r
- * \r
- * The software is owned by LMI and/or its suppliers, and is protected under\r
- * applicable copyright laws. All rights are reserved. Any use in violation\r
- * of the foregoing restrictions may subject the user to criminal sanctions\r
- * under applicable laws, as well as to civil liability for the breach of the\r
- * terms and conditions of this license.\r
- * \r
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
- * LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
- * \r
- * This is part of revision 1392 of the Stellaris Peripheral Driver Library.\r
- *\r
- *****************************************************************************/\r
-\r
-MEMORY\r
-{\r
- FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K\r
- SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K\r
-}\r
-\r
-SECTIONS\r
-{\r
- .text :\r
- {\r
- KEEP(*(.isr_vector))\r
- *(.text*)\r
- *(.rodata*)\r
- _etext = .;\r
- } > FLASH\r
-\r
- .data : AT (ADDR(.text) + SIZEOF(.text))\r
- {\r
- _data = .;\r
- *(vtable)\r
- *(.data*)\r
- _edata = .;\r
- } > SRAM\r
-\r
- .bss :\r
- {\r
- _bss = .;\r
- *(.bss*)\r
- *(COMMON)\r
- _ebss = .;\r
- } > SRAM\r
-}\r
+++ /dev/null
-//*****************************************************************************\r
-//\r
-// startup.c - Boot code for Stellaris.\r
-//\r
-// Copyright (c) 2005-2007 Luminary Micro, Inc. All rights reserved.\r
-// \r
-// Software License Agreement\r
-// \r
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
-// exclusively on LMI's microcontroller products.\r
-// \r
-// The software is owned by LMI and/or its suppliers, and is protected under\r
-// applicable copyright laws. All rights are reserved. Any use in violation\r
-// of the foregoing restrictions may subject the user to criminal sanctions\r
-// under applicable laws, as well as to civil liability for the breach of the\r
-// terms and conditions of this license.\r
-// \r
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
-// \r
-// This is part of revision 1392 of the Stellaris Peripheral Driver Library.\r
-//\r
-//*****************************************************************************\r
-\r
-//*****************************************************************************\r
-//\r
-// Forward declaration of the default fault handlers.\r
-//\r
-//*****************************************************************************\r
-void ResetISR(void);\r
-static void NmiSR(void);\r
-static void FaultISR(void);\r
-static void IntDefaultHandler(void);\r
-\r
-//*****************************************************************************\r
-//\r
-// The entry point for the application.\r
-//\r
-//*****************************************************************************\r
-extern int main(void);\r
-extern void xPortPendSVHandler(void);\r
-extern void xPortSysTickHandler(void);\r
-extern void vPortSVCHandler( void );\r
-extern void Timer0IntHandler( void );\r
-extern void vT2InterruptHandler( void );\r
-extern void vT3InterruptHandler( void );\r
-extern void vEMAC_ISR(void);\r
-\r
-//*****************************************************************************\r
-//\r
-// Reserve space for the system stack.\r
-//\r
-//*****************************************************************************\r
-#ifndef STACK_SIZE\r
-#define STACK_SIZE 120\r
-#endif\r
-static unsigned long pulStack[STACK_SIZE];\r
-\r
-//*****************************************************************************\r
-//\r
-// The minimal vector table for a Cortex-M3. Note that the proper constructs\r
-// must be placed on this to ensure that it ends up at physical address\r
-// 0x0000.0000.\r
-//\r
-//*****************************************************************************\r
-__attribute__ ((section(".isr_vector")))\r
-void (* const g_pfnVectors[])(void) =\r
-{\r
- (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),\r
- // The initial stack pointer\r
- ResetISR, // The reset handler\r
- NmiSR, // The NMI handler\r
- FaultISR, // The hard fault handler\r
- IntDefaultHandler, // The MPU fault handler\r
- IntDefaultHandler, // The bus fault handler\r
- IntDefaultHandler, // The usage fault handler\r
- 0, // Reserved\r
- 0, // Reserved\r
- 0, // Reserved\r
- 0, // Reserved\r
- vPortSVCHandler, // SVCall handler\r
- IntDefaultHandler, // Debug monitor handler\r
- 0, // Reserved\r
- xPortPendSVHandler, // The PendSV handler\r
- xPortSysTickHandler, // The SysTick handler\r
- IntDefaultHandler, // GPIO Port A\r
- IntDefaultHandler, // GPIO Port B\r
- IntDefaultHandler, // GPIO Port C\r
- IntDefaultHandler, // GPIO Port D\r
- IntDefaultHandler, // GPIO Port E\r
- IntDefaultHandler, // UART0 Rx and Tx\r
- IntDefaultHandler, // UART1 Rx and Tx\r
- IntDefaultHandler, // SSI Rx and Tx\r
- IntDefaultHandler, // I2C Master and Slave\r
- IntDefaultHandler, // PWM Fault\r
- IntDefaultHandler, // PWM Generator 0\r
- IntDefaultHandler, // PWM Generator 1\r
- IntDefaultHandler, // PWM Generator 2\r
- IntDefaultHandler, // Quadrature Encoder\r
- IntDefaultHandler, // ADC Sequence 0\r
- IntDefaultHandler, // ADC Sequence 1\r
- IntDefaultHandler, // ADC Sequence 2\r
- IntDefaultHandler, // ADC Sequence 3\r
- IntDefaultHandler, // Watchdog timer\r
- Timer0IntHandler, // Timer 0 subtimer A\r
- IntDefaultHandler, // Timer 0 subtimer B\r
- IntDefaultHandler, // Timer 1 subtimer A\r
- IntDefaultHandler, // Timer 1 subtimer B\r
- vT2InterruptHandler, // Timer 2 subtimer A\r
- IntDefaultHandler, // Timer 2 subtimer B\r
- IntDefaultHandler, // Analog Comparator 0\r
- IntDefaultHandler, // Analog Comparator 1\r
- IntDefaultHandler, // Analog Comparator 2\r
- IntDefaultHandler, // System Control (PLL, OSC, BO)\r
- IntDefaultHandler, // FLASH Control\r
- IntDefaultHandler, // GPIO Port F\r
- IntDefaultHandler, // GPIO Port G\r
- IntDefaultHandler, // GPIO Port H\r
- IntDefaultHandler, // UART2 Rx and Tx\r
- IntDefaultHandler, // SSI1 Rx and Tx\r
- vT3InterruptHandler, // Timer 3 subtimer A\r
- IntDefaultHandler, // Timer 3 subtimer B\r
- IntDefaultHandler, // I2C1 Master and Slave\r
- IntDefaultHandler, // Quadrature Encoder 1\r
- IntDefaultHandler, // CAN0\r
- IntDefaultHandler, // CAN1\r
- 0, // Reserved\r
- vEMAC_ISR, // Ethernet\r
- IntDefaultHandler // Hibernate\r
-};\r
-\r
-//*****************************************************************************\r
-//\r
-// The following are constructs created by the linker, indicating where the\r
-// the "data" and "bss" segments reside in memory. The initializers for the\r
-// for the "data" segment resides immediately following the "text" segment.\r
-//\r
-//*****************************************************************************\r
-extern unsigned long _etext;\r
-extern unsigned long _data;\r
-extern unsigned long _edata;\r
-extern unsigned long _bss;\r
-extern unsigned long _ebss;\r
-\r
-//*****************************************************************************\r
-//\r
-// This is the code that gets called when the processor first starts execution\r
-// following a reset event. Only the absolutely necessary set is performed,\r
-// after which the application supplied main() routine is called. Any fancy\r
-// actions (such as making decisions based on the reset cause register, and\r
-// resetting the bits in that register) are left solely in the hands of the\r
-// application.\r
-//\r
-//*****************************************************************************\r
-void\r
-ResetISR(void)\r
-{\r
- unsigned long *pulSrc, *pulDest;\r
-\r
- //\r
- // Copy the data segment initializers from flash to SRAM.\r
- //\r
- pulSrc = &_etext;\r
- for(pulDest = &_data; pulDest < &_edata; )\r
- {\r
- *pulDest++ = *pulSrc++;\r
- }\r
-\r
- //\r
- // Zero fill the bss segment.\r
- //\r
- for(pulDest = &_bss; pulDest < &_ebss; )\r
- {\r
- *pulDest++ = 0;\r
- }\r
-\r
- //\r
- // Call the application's entry point.\r
- //\r
- main();\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// This is the code that gets called when the processor receives a NMI. This\r
-// simply enters an infinite loop, preserving the system state for examination\r
-// by a debugger.\r
-//\r
-//*****************************************************************************\r
-static void\r
-NmiSR(void)\r
-{\r
- //\r
- // Enter an infinite loop.\r
- //\r
- while(1)\r
- {\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// This is the code that gets called when the processor receives a fault\r
-// interrupt. This simply enters an infinite loop, preserving the system state\r
-// for examination by a debugger.\r
-//\r
-//*****************************************************************************\r
-static void\r
-FaultISR(void)\r
-{\r
- //\r
- // Enter an infinite loop.\r
- //\r
- while(1)\r
- {\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// This is the code that gets called when the processor receives an unexpected\r
-// interrupt. This simply enters an infinite loop, preserving the system state\r
-// for examination by a debugger.\r
-//\r
-//*****************************************************************************\r
-static void\r
-IntDefaultHandler(void)\r
-{\r
- //\r
- // Go into an infinite loop.\r
- //\r
- while(1)\r
- {\r
- }\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// A dummy printf function to satisfy the calls to printf from uip. This\r
-// avoids pulling in the run-time library.\r
-//\r
-//*****************************************************************************\r
-int\r
-uipprintf(const char *fmt, ...)\r
-{\r
- return(0);\r
-}\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/* High speed timer test as described in main.c. */\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-\r
-/* Library includes. */\r
-#include "hw_ints.h"\r
-#include "hw_memmap.h"\r
-#include "hw_types.h"\r
-#include "interrupt.h"\r
-#include "sysctl.h"\r
-#include "lmi_timer.h"\r
-\r
-/* The set frequency of the interrupt. Deviations from this are measured as\r
-the jitter. */\r
-#define timerINTERRUPT_FREQUENCY ( 20000UL )\r
-\r
-/* The expected time between each of the timer interrupts - if the jitter was\r
-zero. */\r
-#define timerEXPECTED_DIFFERENCE_VALUE ( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )\r
-\r
-/* The highest available interrupt priority. */\r
-#define timerHIGHEST_PRIORITY ( 0 )\r
-\r
-/* Misc defines. */\r
-#define timerMAX_32BIT_VALUE ( 0xffffffffUL )\r
-#define timerTIMER_1_COUNT_VALUE ( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Interrupt handler in which the jitter is measured. */\r
-void Timer0IntHandler( void );\r
-\r
-/* Stores the value of the maximum recorded jitter between interrupts. */\r
-volatile unsigned long ulMaxJitter = 0UL;\r
-\r
-/* Counts the total number of times that the high frequency timer has 'ticked'.\r
-This value is used by the run time stats function to work out what percentage\r
-of CPU time each task is taking. */\r
-volatile unsigned long ulHighFrequencyTimerTicks = 0UL;\r
-/*-----------------------------------------------------------*/\r
-\r
-void vSetupHighFrequencyTimer( void )\r
-{\r
-unsigned long ulFrequency;\r
-\r
- /* Timer zero is used to generate the interrupts, and timer 1 is used\r
- to measure the jitter. */\r
- SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER0 );\r
- SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER1 );\r
- TimerConfigure( TIMER0_BASE, TIMER_CFG_32_BIT_PER );\r
- TimerConfigure( TIMER1_BASE, TIMER_CFG_32_BIT_PER );\r
-\r
- /* Set the timer interrupt to be above the kernel - highest. */\r
- IntPrioritySet( INT_TIMER0A, timerHIGHEST_PRIORITY );\r
-\r
- /* Just used to measure time. */\r
- TimerLoadSet(TIMER1_BASE, TIMER_A, timerMAX_32BIT_VALUE );\r
-\r
- /* Ensure interrupts do not start until the scheduler is running. */\r
- portDISABLE_INTERRUPTS();\r
-\r
- /* The rate at which the timer will interrupt. */\r
- ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;\r
- TimerLoadSet( TIMER0_BASE, TIMER_A, ulFrequency );\r
- IntEnable( INT_TIMER0A );\r
- TimerIntEnable( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
-\r
- /* Enable both timers. */\r
- TimerEnable( TIMER0_BASE, TIMER_A );\r
- TimerEnable( TIMER1_BASE, TIMER_A );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void Timer0IntHandler( void )\r
-{\r
-unsigned long ulDifference;\r
-volatile unsigned long ulCurrentCount;\r
-static unsigned long ulMaxDifference = 0, ulLastCount = 0;\r
-\r
- /* We use the timer 1 counter value to measure the clock cycles between\r
- the timer 0 interrupts. */\r
- ulCurrentCount = timerTIMER_1_COUNT_VALUE;\r
-\r
- TimerIntClear( TIMER0_BASE, TIMER_TIMA_TIMEOUT );\r
-\r
- if( ulCurrentCount < ulLastCount )\r
- {\r
- /* How many times has timer 1 counted since the last interrupt? */\r
- ulDifference = ulLastCount - ulCurrentCount;\r
-\r
- /* Is this the largest difference we have measured yet? */\r
- if( ulDifference > ulMaxDifference )\r
- {\r
- ulMaxDifference = ulDifference;\r
- ulMaxJitter = ulMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;\r
- }\r
- }\r
-\r
- ulLastCount = ulCurrentCount;\r
-\r
- /* Keep a count of the total number of 20KHz ticks. This is used by the\r
- run time stats functionality to calculate how much CPU time is used by\r
- each task. */\r
- ulHighFrequencyTimerTicks++;\r
-}\r
-\r
-\r
-\r
-\r
-\r
+++ /dev/null
-APP_SOURCES += httpd.c http-strings.c httpd-fs.c httpd-cgi.c\r
+++ /dev/null
-/*\r
- * Copyright (c) 2006, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack\r
- *\r
- * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $\r
- */\r
-\r
-#ifndef __CLOCK_ARCH_H__\r
-#define __CLOCK_ARCH_H__\r
-\r
-#include "FreeRTOS.h"\r
-\r
-typedef unsigned long clock_time_t;\r
-#define CLOCK_CONF_SECOND configTICK_RATE_HZ\r
-\r
-#endif /* __CLOCK_ARCH_H__ */\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/* Kernel includes. */\r
-#include "FreeRTOS.h"\r
-#include "semphr.h"\r
-#include "task.h"\r
-\r
-/* Demo includes. */\r
-#include "emac.h"\r
-\r
-/* uIP includes. */\r
-#include "uip.h"\r
-\r
-/* Hardware library includes. */\r
-#include "hw_types.h"\r
-#include "hw_memmap.h"\r
-#include "hw_ints.h"\r
-#include "hw_ethernet.h"\r
-#include "ethernet.h"\r
-#include "interrupt.h"\r
-\r
-#define emacNUM_RX_BUFFERS 5\r
-#define emacFRAM_SIZE_BYTES 2\r
-#define macNEGOTIATE_DELAY 2000\r
-#define macWAIT_SEND_TIME ( 10 )\r
-\r
-/* The task that handles the MAC peripheral. This is created at a high\r
-priority and is effectively a deferred interrupt handler. The peripheral\r
-handling is deferred to a task to prevent the entire FIFO having to be read\r
-from within an ISR. */\r
-void vMACHandleTask( void *pvParameters );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The semaphore used to wake the uIP task when data arrives. */\r
-SemaphoreHandle_t xEMACSemaphore = NULL;\r
-\r
-/* The semaphore used to wake the interrupt handler task. The peripheral\r
-is processed at the task level to prevent the need to read the entire FIFO from\r
-within the ISR itself. */\r
-SemaphoreHandle_t xMACInterruptSemaphore = NULL;\r
-\r
-/* The buffer used by the uIP stack. In this case the pointer is used to\r
-point to one of the Rx buffers. */\r
-unsigned char *uip_buf;\r
-\r
-/* Buffers into which Rx data is placed. */\r
-static unsigned char ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ];\r
-\r
-/* The length of the data within each of the Rx buffers. */\r
-static unsigned long ulRxLength[ emacNUM_RX_BUFFERS ];\r
-\r
-/* Used to keep a track of the number of bytes to transmit. */\r
-static unsigned long ulNextTxSpace;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-portBASE_TYPE vInitEMAC( void )\r
-{\r
-unsigned long ulTemp;\r
-portBASE_TYPE xReturn;\r
-\r
- /* Ensure all interrupts are disabled. */\r
- EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));\r
-\r
- /* Clear any interrupts that were already pending. */\r
- ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
- EthernetIntClear( ETH_BASE, ulTemp );\r
-\r
- /* Initialise the MAC and connect. */\r
- EthernetInit( ETH_BASE );\r
- EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );\r
- EthernetEnable( ETH_BASE );\r
-\r
- /* Mark each Rx buffer as empty. */\r
- for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )\r
- {\r
- ulRxLength[ ulTemp ] = 0;\r
- }\r
-\r
- /* Create the queue and task used to defer the MAC processing to the\r
- task level. */\r
- vSemaphoreCreateBinary( xMACInterruptSemaphore );\r
- xSemaphoreTake( xMACInterruptSemaphore, 0 );\r
- xReturn = xTaskCreate( vMACHandleTask, "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );\r
- vTaskDelay( macNEGOTIATE_DELAY );\r
-\r
- /* We are only interested in Rx interrupts. */\r
- IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );\r
- IntEnable( INT_ETH );\r
- EthernetIntEnable(ETH_BASE, ETH_INT_RX);\r
-\r
- return xReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-unsigned int uiGetEMACRxData( unsigned char *ucBuffer )\r
-{\r
-static unsigned long ulNextRxBuffer = 0;\r
-unsigned int iLen;\r
-\r
- iLen = ulRxLength[ ulNextRxBuffer ];\r
-\r
- if( iLen != 0 )\r
- {\r
- /* Leave room for the size at the start of the buffer. */\r
- uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );\r
-\r
- ulRxLength[ ulNextRxBuffer ] = 0;\r
-\r
- ulNextRxBuffer++;\r
- if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
- {\r
- ulNextRxBuffer = 0;\r
- }\r
- }\r
-\r
- return iLen;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vInitialiseSend( void )\r
-{\r
- /* Set the index to the first byte to send - skipping over the size\r
- bytes. */\r
- ulNextTxSpace = 2;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vIncrementTxLength( unsigned long ulLength )\r
-{\r
- ulNextTxSpace += ulLength;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vSendBufferToMAC( void )\r
-{\r
-unsigned long *pulSource;\r
-unsigned short * pus;\r
-unsigned long ulNextWord;\r
-\r
- /* Locate the data to be send. */\r
- pus = ( unsigned short * ) uip_buf;\r
-\r
- /* Add in the size of the data. */\r
- pus--;\r
- *pus = ulNextTxSpace;\r
-\r
- /* Wait for data to be sent if there is no space immediately. */\r
- while( !EthernetSpaceAvail( ETH_BASE ) )\r
- {\r
- vTaskDelay( macWAIT_SEND_TIME );\r
- }\r
-\r
- pulSource = ( unsigned long * ) pus;\r
-\r
- for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned long ) )\r
- {\r
- HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;\r
- pulSource++;\r
- }\r
-\r
- /* Go. */\r
- HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vEMAC_ISR( void )\r
-{\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
-unsigned long ulTemp;\r
-\r
- /* Clear the interrupt. */\r
- ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );\r
- EthernetIntClear( ETH_BASE, ulTemp );\r
-\r
- /* Was it an Rx interrupt? */\r
- if( ulTemp & ETH_INT_RX )\r
- {\r
- xSemaphoreGiveFromISR( xMACInterruptSemaphore, &xHigherPriorityTaskWoken );\r
- EthernetIntDisable( ETH_BASE, ETH_INT_RX );\r
- }\r
-\r
- /* Switch to the uIP task. */\r
- portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vMACHandleTask( void *pvParameters )\r
-{\r
-unsigned long ulLen = 0, i;\r
-unsigned long ulLength, ulInt;\r
-unsigned long *pulBuffer;\r
-static unsigned long ulNextRxBuffer = 0;\r
-portBASE_TYPE xSwitchRequired = pdFALSE;\r
-\r
- for( ;; )\r
- {\r
- /* Wait for something to do. */\r
- xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );\r
-\r
- while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )\r
- {\r
- ulLength = HWREG( ETH_BASE + MAC_O_DATA );\r
-\r
- /* Leave room at the start of the buffer for the size. */\r
- pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );\r
- *pulBuffer = ( ulLength >> 16 );\r
-\r
- /* Get the size of the data. */\r
- pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );\r
- ulLength &= 0xFFFF;\r
-\r
- if( ulLength > 4 )\r
- {\r
- ulLength -= 4;\r
-\r
- if( ulLength >= UIP_BUFSIZE )\r
- {\r
- /* The data won't fit in our buffer. Ensure we don't\r
- try to write into the buffer. */\r
- ulLength = 0;\r
- }\r
-\r
- /* Read out the data into our buffer. */\r
- for( i = 0; i < ulLength; i += sizeof( unsigned long ) )\r
- {\r
- *pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );\r
- pulBuffer++;\r
- }\r
-\r
- /* Store the length of the data into the separate array. */\r
- ulRxLength[ ulNextRxBuffer ] = ulLength;\r
-\r
- /* Use the next buffer the next time through. */\r
- ulNextRxBuffer++;\r
- if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )\r
- {\r
- ulNextRxBuffer = 0;\r
- }\r
-\r
- /* Ensure the uIP task is not blocked as data has arrived. */\r
- xSemaphoreGive( xEMACSemaphore );\r
- }\r
- }\r
-\r
- EthernetIntEnable( ETH_BASE, ETH_INT_RX );\r
- }\r
-}\r
-\r
+++ /dev/null
-/*----------------------------------------------------------------------------\r
- * LPC2378 Ethernet Definitions\r
- *----------------------------------------------------------------------------\r
- * Name: EMAC.H\r
- * Purpose: Philips LPC2378 EMAC hardware definitions\r
- *----------------------------------------------------------------------------\r
- * Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.\r
- *---------------------------------------------------------------------------*/\r
-#ifndef __EMAC_H\r
-#define __EMAC_H\r
-\r
-/* MAC address definition. The MAC address must be unique on the network. */\r
-#define emacETHADDR0 0\r
-#define emacETHADDR1 0xbd\r
-#define emacETHADDR2 0x33\r
-#define emacETHADDR3 0x02\r
-#define emacETHADDR4 0x64\r
-#define emacETHADDR5 0x24\r
-\r
-\r
-/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */\r
-#define NUM_RX_FRAG 4 /* Num.of RX Fragments 4*1536= 6.0kB */\r
-#define NUM_TX_FRAG 2 /* Num.of TX Fragments 2*1536= 3.0kB */\r
-#define ETH_FRAG_SIZE 1536 /* Packet Fragment size 1536 Bytes */\r
-\r
-#define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */\r
-\r
-/* EMAC variables located in 16K Ethernet SRAM */\r
-#define RX_DESC_BASE 0x7FE00000\r
-#define RX_STAT_BASE (RX_DESC_BASE + NUM_RX_FRAG*8)\r
-#define TX_DESC_BASE (RX_STAT_BASE + NUM_RX_FRAG*8)\r
-#define TX_STAT_BASE (TX_DESC_BASE + NUM_TX_FRAG*8)\r
-#define RX_BUF_BASE (TX_STAT_BASE + NUM_TX_FRAG*4)\r
-#define TX_BUF_BASE (RX_BUF_BASE + NUM_RX_FRAG*ETH_FRAG_SIZE)\r
-\r
-/* RX and TX descriptor and status definitions. */\r
-#define RX_DESC_PACKET(i) (*(unsigned int *)(RX_DESC_BASE + 8*i))\r
-#define RX_DESC_CTRL(i) (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))\r
-#define RX_STAT_INFO(i) (*(unsigned int *)(RX_STAT_BASE + 8*i))\r
-#define RX_STAT_HASHCRC(i) (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))\r
-#define TX_DESC_PACKET(i) (*(unsigned int *)(TX_DESC_BASE + 8*i))\r
-#define TX_DESC_CTRL(i) (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))\r
-#define TX_STAT_INFO(i) (*(unsigned int *)(TX_STAT_BASE + 4*i))\r
-#define RX_BUF(i) (RX_BUF_BASE + ETH_FRAG_SIZE*i)\r
-#define TX_BUF(i) (TX_BUF_BASE + ETH_FRAG_SIZE*i)\r
-\r
-/* MAC Configuration Register 1 */\r
-#define MAC1_REC_EN 0x00000001 /* Receive Enable */\r
-#define MAC1_PASS_ALL 0x00000002 /* Pass All Receive Frames */\r
-#define MAC1_RX_FLOWC 0x00000004 /* RX Flow Control */\r
-#define MAC1_TX_FLOWC 0x00000008 /* TX Flow Control */\r
-#define MAC1_LOOPB 0x00000010 /* Loop Back Mode */\r
-#define MAC1_RES_TX 0x00000100 /* Reset TX Logic */\r
-#define MAC1_RES_MCS_TX 0x00000200 /* Reset MAC TX Control Sublayer */\r
-#define MAC1_RES_RX 0x00000400 /* Reset RX Logic */\r
-#define MAC1_RES_MCS_RX 0x00000800 /* Reset MAC RX Control Sublayer */\r
-#define MAC1_SIM_RES 0x00004000 /* Simulation Reset */\r
-#define MAC1_SOFT_RES 0x00008000 /* Soft Reset MAC */\r
-\r
-/* MAC Configuration Register 2 */\r
-#define MAC2_FULL_DUP 0x00000001 /* Full Duplex Mode */\r
-#define MAC2_FRM_LEN_CHK 0x00000002 /* Frame Length Checking */\r
-#define MAC2_HUGE_FRM_EN 0x00000004 /* Huge Frame Enable */\r
-#define MAC2_DLY_CRC 0x00000008 /* Delayed CRC Mode */\r
-#define MAC2_CRC_EN 0x00000010 /* Append CRC to every Frame */\r
-#define MAC2_PAD_EN 0x00000020 /* Pad all Short Frames */\r
-#define MAC2_VLAN_PAD_EN 0x00000040 /* VLAN Pad Enable */\r
-#define MAC2_ADET_PAD_EN 0x00000080 /* Auto Detect Pad Enable */\r
-#define MAC2_PPREAM_ENF 0x00000100 /* Pure Preamble Enforcement */\r
-#define MAC2_LPREAM_ENF 0x00000200 /* Long Preamble Enforcement */\r
-#undef MAC2_NO_BACKOFF /* Remove compiler warning. */\r
-#define MAC2_NO_BACKOFF 0x00001000 /* No Backoff Algorithm */\r
-#define MAC2_BACK_PRESSURE 0x00002000 /* Backoff Presurre / No Backoff */\r
-#define MAC2_EXCESS_DEF 0x00004000 /* Excess Defer */\r
-\r
-/* Back-to-Back Inter-Packet-Gap Register */\r
-#define IPGT_FULL_DUP 0x00000015 /* Recommended value for Full Duplex */\r
-#define IPGT_HALF_DUP 0x00000012 /* Recommended value for Half Duplex */\r
-\r
-/* Non Back-to-Back Inter-Packet-Gap Register */\r
-#define IPGR_DEF 0x00000012 /* Recommended value */\r
-\r
-/* Collision Window/Retry Register */\r
-#define CLRT_DEF 0x0000370F /* Default value */\r
-\r
-/* PHY Support Register */\r
-#undef SUPP_SPEED /* Remove compiler warning. */\r
-#define SUPP_SPEED 0x00000100 /* Reduced MII Logic Current Speed */\r
-#define SUPP_RES_RMII 0x00000800 /* Reset Reduced MII Logic */\r
-\r
-/* Test Register */\r
-#define TEST_SHCUT_PQUANTA 0x00000001 /* Shortcut Pause Quanta */\r
-#define TEST_TST_PAUSE 0x00000002 /* Test Pause */\r
-#define TEST_TST_BACKP 0x00000004 /* Test Back Pressure */\r
-\r
-/* MII Management Configuration Register */\r
-#define MCFG_SCAN_INC 0x00000001 /* Scan Increment PHY Address */\r
-#define MCFG_SUPP_PREAM 0x00000002 /* Suppress Preamble */\r
-#define MCFG_CLK_SEL 0x0000001C /* Clock Select Mask */\r
-#define MCFG_RES_MII 0x00008000 /* Reset MII Management Hardware */\r
-\r
-/* MII Management Command Register */\r
-#undef MCMD_READ /* Remove compiler warning. */\r
-#define MCMD_READ 0x00000001 /* MII Read */\r
-#undef MCMD_SCAN /* Remove compiler warning. */\r
-#define MCMD_SCAN 0x00000002 /* MII Scan continuously */\r
-\r
-#define MII_WR_TOUT 0x00050000 /* MII Write timeout count */\r
-#define MII_RD_TOUT 0x00050000 /* MII Read timeout count */\r
-\r
-/* MII Management Address Register */\r
-#define MADR_REG_ADR 0x0000001F /* MII Register Address Mask */\r
-#define MADR_PHY_ADR 0x00001F00 /* PHY Address Mask */\r
-\r
-/* MII Management Indicators Register */\r
-#undef MIND_BUSY /* Remove compiler warning. */\r
-#define MIND_BUSY 0x00000001 /* MII is Busy */\r
-#define MIND_SCAN 0x00000002 /* MII Scanning in Progress */\r
-#define MIND_NOT_VAL 0x00000004 /* MII Read Data not valid */\r
-#define MIND_MII_LINK_FAIL 0x00000008 /* MII Link Failed */\r
-\r
-/* Command Register */\r
-#define CR_RX_EN 0x00000001 /* Enable Receive */\r
-#define CR_TX_EN 0x00000002 /* Enable Transmit */\r
-#define CR_REG_RES 0x00000008 /* Reset Host Registers */\r
-#define CR_TX_RES 0x00000010 /* Reset Transmit Datapath */\r
-#define CR_RX_RES 0x00000020 /* Reset Receive Datapath */\r
-#define CR_PASS_RUNT_FRM 0x00000040 /* Pass Runt Frames */\r
-#define CR_PASS_RX_FILT 0x00000080 /* Pass RX Filter */\r
-#define CR_TX_FLOW_CTRL 0x00000100 /* TX Flow Control */\r
-#define CR_RMII 0x00000200 /* Reduced MII Interface */\r
-#define CR_FULL_DUP 0x00000400 /* Full Duplex */\r
-\r
-/* Status Register */\r
-#define SR_RX_EN 0x00000001 /* Enable Receive */\r
-#define SR_TX_EN 0x00000002 /* Enable Transmit */\r
-\r
-/* Transmit Status Vector 0 Register */\r
-#define TSV0_CRC_ERR 0x00000001 /* CRC error */\r
-#define TSV0_LEN_CHKERR 0x00000002 /* Length Check Error */\r
-#define TSV0_LEN_OUTRNG 0x00000004 /* Length Out of Range */\r
-#define TSV0_DONE 0x00000008 /* Tramsmission Completed */\r
-#define TSV0_MCAST 0x00000010 /* Multicast Destination */\r
-#define TSV0_BCAST 0x00000020 /* Broadcast Destination */\r
-#define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */\r
-#define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */\r
-#define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */\r
-#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */\r
-#define TSV0_GIANT 0x00000400 /* Giant Frame */\r
-#define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */\r
-#define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */\r
-#define TSV0_CTRL_FRAME 0x10000000 /* Control Frame */\r
-#define TSV0_PAUSE 0x20000000 /* Pause Frame */\r
-#define TSV0_BACK_PRESS 0x40000000 /* Backpressure Method Applied */\r
-#define TSV0_VLAN 0x80000000 /* VLAN Frame */\r
-\r
-/* Transmit Status Vector 1 Register */\r
-#define TSV1_BYTE_CNT 0x0000FFFF /* Transmit Byte Count */\r
-#define TSV1_COLL_CNT 0x000F0000 /* Transmit Collision Count */\r
-\r
-/* Receive Status Vector Register */\r
-#define RSV_BYTE_CNT 0x0000FFFF /* Receive Byte Count */\r
-#define RSV_PKT_IGNORED 0x00010000 /* Packet Previously Ignored */\r
-#define RSV_RXDV_SEEN 0x00020000 /* RXDV Event Previously Seen */\r
-#define RSV_CARR_SEEN 0x00040000 /* Carrier Event Previously Seen */\r
-#define RSV_REC_CODEV 0x00080000 /* Receive Code Violation */\r
-#define RSV_CRC_ERR 0x00100000 /* CRC Error */\r
-#define RSV_LEN_CHKERR 0x00200000 /* Length Check Error */\r
-#define RSV_LEN_OUTRNG 0x00400000 /* Length Out of Range */\r
-#define RSV_REC_OK 0x00800000 /* Frame Received OK */\r
-#define RSV_MCAST 0x01000000 /* Multicast Frame */\r
-#define RSV_BCAST 0x02000000 /* Broadcast Frame */\r
-#define RSV_DRIB_NIBB 0x04000000 /* Dribble Nibble */\r
-#define RSV_CTRL_FRAME 0x08000000 /* Control Frame */\r
-#define RSV_PAUSE 0x10000000 /* Pause Frame */\r
-#define RSV_UNSUPP_OPC 0x20000000 /* Unsupported Opcode */\r
-#define RSV_VLAN 0x40000000 /* VLAN Frame */\r
-\r
-/* Flow Control Counter Register */\r
-#define FCC_MIRR_CNT 0x0000FFFF /* Mirror Counter */\r
-#define FCC_PAUSE_TIM 0xFFFF0000 /* Pause Timer */\r
-\r
-/* Flow Control Status Register */\r
-#define FCS_MIRR_CNT 0x0000FFFF /* Mirror Counter Current */\r
-\r
-/* Receive Filter Control Register */\r
-#define RFC_UCAST_EN 0x00000001 /* Accept Unicast Frames Enable */\r
-#define RFC_BCAST_EN 0x00000002 /* Accept Broadcast Frames Enable */\r
-#define RFC_MCAST_EN 0x00000004 /* Accept Multicast Frames Enable */\r
-#define RFC_UCAST_HASH_EN 0x00000008 /* Accept Unicast Hash Filter Frames */\r
-#define RFC_MCAST_HASH_EN 0x00000010 /* Accept Multicast Hash Filter Fram.*/\r
-#define RFC_PERFECT_EN 0x00000020 /* Accept Perfect Match Enable */\r
-#define RFC_MAGP_WOL_EN 0x00001000 /* Magic Packet Filter WoL Enable */\r
-#define RFC_PFILT_WOL_EN 0x00002000 /* Perfect Filter WoL Enable */\r
-\r
-/* Receive Filter WoL Status/Clear Registers */\r
-#define WOL_UCAST 0x00000001 /* Unicast Frame caused WoL */\r
-#define WOL_BCAST 0x00000002 /* Broadcast Frame caused WoL */\r
-#define WOL_MCAST 0x00000004 /* Multicast Frame caused WoL */\r
-#define WOL_UCAST_HASH 0x00000008 /* Unicast Hash Filter Frame WoL */\r
-#define WOL_MCAST_HASH 0x00000010 /* Multicast Hash Filter Frame WoL */\r
-#define WOL_PERFECT 0x00000020 /* Perfect Filter WoL */\r
-#define WOL_RX_FILTER 0x00000080 /* RX Filter caused WoL */\r
-#define WOL_MAG_PACKET 0x00000100 /* Magic Packet Filter caused WoL */\r
-\r
-/* Interrupt Status/Enable/Clear/Set Registers */\r
-#define INT_RX_OVERRUN 0x00000001 /* Overrun Error in RX Queue */\r
-#define INT_RX_ERR 0x00000002 /* Receive Error */\r
-#define INT_RX_FIN 0x00000004 /* RX Finished Process Descriptors */\r
-#define INT_RX_DONE 0x00000008 /* Receive Done */\r
-#define INT_TX_UNDERRUN 0x00000010 /* Transmit Underrun */\r
-#define INT_TX_ERR 0x00000020 /* Transmit Error */\r
-#define INT_TX_FIN 0x00000040 /* TX Finished Process Descriptors */\r
-#define INT_TX_DONE 0x00000080 /* Transmit Done */\r
-#define INT_SOFT_INT 0x00001000 /* Software Triggered Interrupt */\r
-#define INT_WAKEUP 0x00002000 /* Wakeup Event Interrupt */\r
-\r
-/* Power Down Register */\r
-#define PD_POWER_DOWN 0x80000000 /* Power Down MAC */\r
-\r
-/* RX Descriptor Control Word */\r
-#define RCTRL_SIZE 0x000007FF /* Buffer size mask */\r
-#define RCTRL_INT 0x80000000 /* Generate RxDone Interrupt */\r
-\r
-/* RX Status Hash CRC Word */\r
-#define RHASH_SA 0x000001FF /* Hash CRC for Source Address */\r
-#define RHASH_DA 0x001FF000 /* Hash CRC for Destination Address */\r
-\r
-/* RX Status Information Word */\r
-#define RINFO_SIZE 0x000007FF /* Data size in bytes */\r
-#define RINFO_CTRL_FRAME 0x00040000 /* Control Frame */\r
-#define RINFO_VLAN 0x00080000 /* VLAN Frame */\r
-#define RINFO_FAIL_FILT 0x00100000 /* RX Filter Failed */\r
-#define RINFO_MCAST 0x00200000 /* Multicast Frame */\r
-#define RINFO_BCAST 0x00400000 /* Broadcast Frame */\r
-#define RINFO_CRC_ERR 0x00800000 /* CRC Error in Frame */\r
-#define RINFO_SYM_ERR 0x01000000 /* Symbol Error from PHY */\r
-#define RINFO_LEN_ERR 0x02000000 /* Length Error */\r
-#define RINFO_RANGE_ERR 0x04000000 /* Range Error (exceeded max. size) */\r
-#define RINFO_ALIGN_ERR 0x08000000 /* Alignment Error */\r
-#define RINFO_OVERRUN 0x10000000 /* Receive overrun */\r
-#define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */\r
-#define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */\r
-#define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */\r
-\r
-#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | \\r
- RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN)\r
-\r
-/* TX Descriptor Control Word */\r
-#define TCTRL_SIZE 0x000007FF /* Size of data buffer in bytes */\r
-#define TCTRL_OVERRIDE 0x04000000 /* Override Default MAC Registers */\r
-#define TCTRL_HUGE 0x08000000 /* Enable Huge Frame */\r
-#define TCTRL_PAD 0x10000000 /* Pad short Frames to 64 bytes */\r
-#define TCTRL_CRC 0x20000000 /* Append a hardware CRC to Frame */\r
-#define TCTRL_LAST 0x40000000 /* Last Descriptor for TX Frame */\r
-#define TCTRL_INT 0x80000000 /* Generate TxDone Interrupt */\r
-\r
-/* TX Status Information Word */\r
-#define TINFO_COL_CNT 0x01E00000 /* Collision Count */\r
-#define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */\r
-#define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */\r
-#define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */\r
-#define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */\r
-#define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */\r
-#define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */\r
-#define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */\r
-\r
-/* DP83848C PHY Registers */\r
-#define PHY_REG_BMCR 0x00 /* Basic Mode Control Register */\r
-#define PHY_REG_BMSR 0x01 /* Basic Mode Status Register */\r
-#define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */\r
-#define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */\r
-#define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */\r
-#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */\r
-#define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */\r
-#define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */\r
-\r
-/* PHY Extended Registers */\r
-#define PHY_REG_STS 0x10 /* Status Register */\r
-#define PHY_REG_MICR 0x11 /* MII Interrupt Control Register */\r
-#define PHY_REG_MISR 0x12 /* MII Interrupt Status Register */\r
-#define PHY_REG_FCSCR 0x14 /* False Carrier Sense Counter */\r
-#define PHY_REG_RECR 0x15 /* Receive Error Counter */\r
-#define PHY_REG_PCSR 0x16 /* PCS Sublayer Config. and Status */\r
-#define PHY_REG_RBR 0x17 /* RMII and Bypass Register */\r
-#define PHY_REG_LEDCR 0x18 /* LED Direct Control Register */\r
-#define PHY_REG_PHYCR 0x19 /* PHY Control Register */\r
-#define PHY_REG_10BTSCR 0x1A /* 10Base-T Status/Control Register */\r
-#define PHY_REG_CDCTRL1 0x1B /* CD Test Control and BIST Extens. */\r
-#define PHY_REG_EDCR 0x1D /* Energy Detect Control Register */\r
-\r
-#define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */\r
-#define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */\r
-#define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */\r
-#define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */\r
-#define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */\r
-\r
-#define DP83848C_DEF_ADR 0x0100 /* Default PHY device address */\r
-#define DP83848C_ID 0x20005C90 /* PHY Identifier */\r
-\r
-// prototypes\r
-portBASE_TYPE vInitEMAC(void);\r
-unsigned short ReadFrameBE_EMAC(void);\r
-void vIncrementTxLength(unsigned long ulLength);\r
-void CopyFromFrame_EMAC(void *Dest, unsigned short Size);\r
-void DummyReadFrame_EMAC(unsigned short Size);\r
-unsigned short StartReadFrame(void);\r
-void EndReadFrame(void);\r
-unsigned int CheckFrameReceived(void);\r
-void vInitialiseSend(void);\r
-unsigned int Rdy4Tx(void);\r
-void vSendBufferToMAC(void);\r
-void vEMACWaitForInput( void );\r
-unsigned int uiGetEMACRxData( unsigned char *ucBuffer );\r
-\r
-\r
-#endif\r
-\r
-/*----------------------------------------------------------------------------\r
- * end of file\r
- *---------------------------------------------------------------------------*/\r
-\r
+++ /dev/null
-http_http "http://"\r
-http_200 "200 "\r
-http_301 "301 "\r
-http_302 "302 "\r
-http_get "GET "\r
-http_10 "HTTP/1.0"\r
-http_11 "HTTP/1.1"\r
-http_content_type "content-type: "\r
-http_texthtml "text/html"\r
-http_location "location: "\r
-http_host "host: "\r
-http_crnl "\r\n"\r
-http_index_html "/index.html"\r
-http_404_html "/404.html"\r
-http_referer "Referer:"\r
-http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
-http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"\r
-http_content_type_plain "Content-type: text/plain\r\n\r\n"\r
-http_content_type_html "Content-type: text/html\r\n\r\n"\r
-http_content_type_css "Content-type: text/css\r\n\r\n"\r
-http_content_type_text "Content-type: text/text\r\n\r\n"\r
-http_content_type_png "Content-type: image/png\r\n\r\n"\r
-http_content_type_gif "Content-type: image/gif\r\n\r\n"\r
-http_content_type_jpg "Content-type: image/jpeg\r\n\r\n"\r
-http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"\r
-http_html ".html"\r
-http_shtml ".shtml"\r
-http_htm ".htm"\r
-http_css ".css"\r
-http_png ".png"\r
-http_gif ".gif"\r
-http_jpg ".jpg"\r
-http_text ".txt"\r
-http_txt ".txt"\r
-\r
+++ /dev/null
-const char http_http[8] = \r
-/* "http://" */\r
-{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };\r
-const char http_200[5] = \r
-/* "200 " */\r
-{0x32, 0x30, 0x30, 0x20, };\r
-const char http_301[5] = \r
-/* "301 " */\r
-{0x33, 0x30, 0x31, 0x20, };\r
-const char http_302[5] = \r
-/* "302 " */\r
-{0x33, 0x30, 0x32, 0x20, };\r
-const char http_get[5] = \r
-/* "GET " */\r
-{0x47, 0x45, 0x54, 0x20, };\r
-const char http_10[9] = \r
-/* "HTTP/1.0" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };\r
-const char http_11[9] = \r
-/* "HTTP/1.1" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };\r
-const char http_content_type[15] = \r
-/* "content-type: " */\r
-{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };\r
-const char http_texthtml[10] = \r
-/* "text/html" */\r
-{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_location[11] = \r
-/* "location: " */\r
-{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };\r
-const char http_host[7] = \r
-/* "host: " */\r
-{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };\r
-const char http_crnl[3] = \r
-/* "\r\n" */\r
-{0xd, 0xa, };\r
-const char http_index_html[12] = \r
-/* "/index.html" */\r
-{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_404_html[10] = \r
-/* "/404.html" */\r
-{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_referer[9] = \r
-/* "Referer:" */\r
-{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };\r
-const char http_header_200[84] = \r
-/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
-const char http_header_404[91] = \r
-/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */\r
-{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };\r
-const char http_content_type_plain[29] = \r
-/* "Content-type: text/plain\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_html[28] = \r
-/* "Content-type: text/html\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_css [27] = \r
-/* "Content-type: text/css\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_text[28] = \r
-/* "Content-type: text/text\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_png [28] = \r
-/* "Content-type: image/png\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_gif [28] = \r
-/* "Content-type: image/gif\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_jpg [29] = \r
-/* "Content-type: image/jpeg\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_content_type_binary[43] = \r
-/* "Content-type: application/octet-stream\r\n\r\n" */\r
-{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };\r
-const char http_html[6] = \r
-/* ".html" */\r
-{0x2e, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_shtml[7] = \r
-/* ".shtml" */\r
-{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };\r
-const char http_htm[5] = \r
-/* ".htm" */\r
-{0x2e, 0x68, 0x74, 0x6d, };\r
-const char http_css[5] = \r
-/* ".css" */\r
-{0x2e, 0x63, 0x73, 0x73, };\r
-const char http_png[5] = \r
-/* ".png" */\r
-{0x2e, 0x70, 0x6e, 0x67, };\r
-const char http_gif[5] = \r
-/* ".gif" */\r
-{0x2e, 0x67, 0x69, 0x66, };\r
-const char http_jpg[5] = \r
-/* ".jpg" */\r
-{0x2e, 0x6a, 0x70, 0x67, };\r
-const char http_text[5] = \r
-/* ".txt" */\r
-{0x2e, 0x74, 0x78, 0x74, };\r
-const char http_txt[5] = \r
-/* ".txt" */\r
-{0x2e, 0x74, 0x78, 0x74, };\r
+++ /dev/null
-extern const char http_http[8];\r
-extern const char http_200[5];\r
-extern const char http_301[5];\r
-extern const char http_302[5];\r
-extern const char http_get[5];\r
-extern const char http_10[9];\r
-extern const char http_11[9];\r
-extern const char http_content_type[15];\r
-extern const char http_texthtml[10];\r
-extern const char http_location[11];\r
-extern const char http_host[7];\r
-extern const char http_crnl[3];\r
-extern const char http_index_html[12];\r
-extern const char http_404_html[10];\r
-extern const char http_referer[9];\r
-extern const char http_header_200[84];\r
-extern const char http_header_404[91];\r
-extern const char http_content_type_plain[29];\r
-extern const char http_content_type_html[28];\r
-extern const char http_content_type_css [27];\r
-extern const char http_content_type_text[28];\r
-extern const char http_content_type_png [28];\r
-extern const char http_content_type_gif [28];\r
-extern const char http_content_type_jpg [29];\r
-extern const char http_content_type_binary[43];\r
-extern const char http_html[6];\r
-extern const char http_shtml[7];\r
-extern const char http_htm[5];\r
-extern const char http_css[5];\r
-extern const char http_png[5];\r
-extern const char http_gif[5];\r
-extern const char http_jpg[5];\r
-extern const char http_text[5];\r
-extern const char http_txt[5];\r
+++ /dev/null
-/**\r
- * \addtogroup httpd\r
- * @{\r
- */\r
-\r
-/**\r
- * \file\r
- * Web server script interface\r
- * \author\r
- * Adam Dunkels <adam@sics.se>\r
- *\r
- */\r
-\r
-/*\r
- * Copyright (c) 2001-2006, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $\r
- *\r
- */\r
-\r
-#include "uip.h"\r
-#include "psock.h"\r
-#include "httpd.h"\r
-#include "httpd-cgi.h"\r
-#include "httpd-fs.h"\r
-\r
-#include <stdio.h>\r
-#include <string.h>\r
-\r
-HTTPD_CGI_CALL(file, "file-stats", file_stats);\r
-HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);\r
-HTTPD_CGI_CALL(net, "net-stats", net_stats);\r
-HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );\r
-HTTPD_CGI_CALL(run, "run-time", run_time );\r
-HTTPD_CGI_CALL(io, "led-io", led_io );\r
-\r
-\r
-static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &run, &io, NULL };\r
-\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-httpd_cgifunction\r
-httpd_cgi(char *name)\r
-{\r
- const struct httpd_cgi_call **f;\r
-\r
- /* Find the matching name in the table, return the function. */\r
- for(f = calls; *f != NULL; ++f) {\r
- if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {\r
- return (*f)->function;\r
- }\r
- }\r
- return nullfunction;\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static unsigned short\r
-generate_file_stats(void *arg)\r
-{\r
- char *f = (char *)arg;\r
- return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(file_stats(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static const char closed[] = /* "CLOSED",*/\r
-{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};\r
-static const char syn_rcvd[] = /* "SYN-RCVD",*/\r
-{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,\r
- 0x44, 0};\r
-static const char syn_sent[] = /* "SYN-SENT",*/\r
-{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,\r
- 0x54, 0};\r
-static const char established[] = /* "ESTABLISHED",*/\r
-{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,\r
- 0x45, 0x44, 0};\r
-static const char fin_wait_1[] = /* "FIN-WAIT-1",*/\r
-{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
- 0x54, 0x2d, 0x31, 0};\r
-static const char fin_wait_2[] = /* "FIN-WAIT-2",*/\r
-{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,\r
- 0x54, 0x2d, 0x32, 0};\r
-static const char closing[] = /* "CLOSING",*/\r
-{0x43, 0x4c, 0x4f, 0x53, 0x49,\r
- 0x4e, 0x47, 0};\r
-static const char time_wait[] = /* "TIME-WAIT,"*/\r
-{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,\r
- 0x49, 0x54, 0};\r
-static const char last_ack[] = /* "LAST-ACK"*/\r
-{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,\r
- 0x4b, 0};\r
-\r
-static const char *states[] = {\r
- closed,\r
- syn_rcvd,\r
- syn_sent,\r
- established,\r
- fin_wait_1,\r
- fin_wait_2,\r
- closing,\r
- time_wait,\r
- last_ack};\r
-\r
-\r
-static unsigned short\r
-generate_tcp_stats(void *arg)\r
-{\r
- struct uip_conn *conn;\r
- struct httpd_state *s = (struct httpd_state *)arg;\r
-\r
- conn = &uip_conns[s->count];\r
- return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
- "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",\r
- htons(conn->lport),\r
- htons(conn->ripaddr[0]) >> 8,\r
- htons(conn->ripaddr[0]) & 0xff,\r
- htons(conn->ripaddr[1]) >> 8,\r
- htons(conn->ripaddr[1]) & 0xff,\r
- htons(conn->rport),\r
- states[conn->tcpstateflags & UIP_TS_MASK],\r
- conn->nrtx,\r
- conn->timer,\r
- (uip_outstanding(conn))? '*':' ',\r
- (uip_stopped(conn))? '!':' ');\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))\r
-{\r
-\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- for(s->count = 0; s->count < UIP_CONNS; ++s->count) {\r
- if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);\r
- }\r
- }\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static unsigned short\r
-generate_net_stats(void *arg)\r
-{\r
- struct httpd_state *s = (struct httpd_state *)arg;\r
- return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,\r
- "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);\r
-}\r
-\r
-static\r
-PT_THREAD(net_stats(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
-\r
-#if UIP_STATISTICS\r
-\r
- for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);\r
- ++s->count) {\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);\r
- }\r
-\r
-#endif /* UIP_STATISTICS */\r
-\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-extern void vTaskList( char *pcWriteBuffer );\r
-static char cCountBuf[ 32 ];\r
-long lRefreshCount = 0;\r
-static unsigned short\r
-generate_rtos_stats(void *arg)\r
-{\r
- lRefreshCount++;\r
- sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );\r
- vTaskList( ( char * ) uip_appdata );\r
- strcat( uip_appdata, cCountBuf );\r
-\r
- return strlen( uip_appdata );\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-\r
-static\r
-PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-char *pcStatus;\r
-extern unsigned long uxParTestGetLED( unsigned long uxLED );\r
-\r
-static unsigned short generate_io_state( void *arg )\r
-{\r
- if( uxParTestGetLED( 0 ) )\r
- {\r
- pcStatus = "checked";\r
- }\r
- else\r
- {\r
- pcStatus = "";\r
- }\r
-\r
- sprintf( uip_appdata,\r
- "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED"\\r
- "<p>"\\r
- "<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",\r
- pcStatus );\r
-\r
- return strlen( uip_appdata );\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-extern void vTaskGetRunTimeStats( char *pcWriteBuffer );\r
-static unsigned short\r
-generate_runtime_stats(void *arg)\r
-{\r
- lRefreshCount++;\r
- sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );\r
- vTaskGetRunTimeStats( ( char * ) uip_appdata );\r
- strcat( uip_appdata, cCountBuf );\r
-\r
- return strlen( uip_appdata );\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-\r
-static\r
-PT_THREAD(run_time(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_runtime_stats, NULL);\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-\r
-static PT_THREAD(led_io(struct httpd_state *s, char *ptr))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);\r
- PSOCK_END(&s->sout);\r
-}\r
-\r
-/** @} */\r
-\r
-\r
-\r
-\r
-\r
-\r
+++ /dev/null
-/**\r
- * \addtogroup httpd\r
- * @{\r
- */\r
-\r
-/**\r
- * \file\r
- * Web server script interface header file\r
- * \author\r
- * Adam Dunkels <adam@sics.se>\r
- *\r
- */\r
-\r
-\r
-\r
-/*\r
- * Copyright (c) 2001, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- *\r
- */\r
-\r
-#ifndef __HTTPD_CGI_H__\r
-#define __HTTPD_CGI_H__\r
-\r
-#include "psock.h"\r
-#include "httpd.h"\r
-\r
-typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));\r
-\r
-httpd_cgifunction httpd_cgi(char *name);\r
-\r
-struct httpd_cgi_call {\r
- const char *name;\r
- const httpd_cgifunction function;\r
-};\r
-\r
-/**\r
- * \brief HTTPD CGI function declaration\r
- * \param name The C variable name of the function\r
- * \param str The string name of the function, used in the script file\r
- * \param function A pointer to the function that implements it\r
- *\r
- * This macro is used for declaring a HTTPD CGI\r
- * function. This function is then added to the list of\r
- * HTTPD CGI functions with the httpd_cgi_add() function.\r
- *\r
- * \hideinitializer\r
- */\r
-#define HTTPD_CGI_CALL(name, str, function) \\r
-static PT_THREAD(function(struct httpd_state *, char *)); \\r
-static const struct httpd_cgi_call name = {str, function}\r
-\r
-void httpd_cgi_init(void);\r
-#endif /* __HTTPD_CGI_H__ */\r
-\r
-/** @} */\r
+++ /dev/null
-/*\r
- * Copyright (c) 2001, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the lwIP TCP/IP stack.\r
- *\r
- * Author: Adam Dunkels <adam@sics.se>\r
- *\r
- * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $\r
- */\r
-\r
-#include "httpd.h"\r
-#include "httpd-fs.h"\r
-#include "httpd-fsdata.h"\r
-\r
-#ifndef NULL\r
-#define NULL 0\r
-#endif /* NULL */\r
-\r
-#include "httpd-fsdata.c"\r
-\r
-#if HTTPD_FS_STATISTICS\r
-static u16_t count[HTTPD_FS_NUMFILES];\r
-#endif /* HTTPD_FS_STATISTICS */\r
-\r
-/*-----------------------------------------------------------------------------------*/\r
-static u8_t\r
-httpd_fs_strcmp(const char *str1, const char *str2)\r
-{\r
- u8_t i;\r
- i = 0;\r
- loop:\r
-\r
- if(str2[i] == 0 ||\r
- str1[i] == '\r' ||\r
- str1[i] == '\n') {\r
- return 0;\r
- }\r
-\r
- if(str1[i] != str2[i]) {\r
- return 1;\r
- }\r
-\r
-\r
- ++i;\r
- goto loop;\r
-}\r
-/*-----------------------------------------------------------------------------------*/\r
-int\r
-httpd_fs_open(const char *name, struct httpd_fs_file *file)\r
-{\r
-#if HTTPD_FS_STATISTICS\r
- u16_t i = 0;\r
-#endif /* HTTPD_FS_STATISTICS */\r
- struct httpd_fsdata_file_noconst *f;\r
-\r
- for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
- f != NULL;\r
- f = (struct httpd_fsdata_file_noconst *)f->next) {\r
-\r
- if(httpd_fs_strcmp(name, f->name) == 0) {\r
- file->data = f->data;\r
- file->len = f->len;\r
-#if HTTPD_FS_STATISTICS\r
- ++count[i];\r
-#endif /* HTTPD_FS_STATISTICS */\r
- return 1;\r
- }\r
-#if HTTPD_FS_STATISTICS\r
- ++i;\r
-#endif /* HTTPD_FS_STATISTICS */\r
-\r
- }\r
- return 0;\r
-}\r
-/*-----------------------------------------------------------------------------------*/\r
-void\r
-httpd_fs_init(void)\r
-{\r
-#if HTTPD_FS_STATISTICS\r
- u16_t i;\r
- for(i = 0; i < HTTPD_FS_NUMFILES; i++) {\r
- count[i] = 0;\r
- }\r
-#endif /* HTTPD_FS_STATISTICS */\r
-}\r
-/*-----------------------------------------------------------------------------------*/\r
-#if HTTPD_FS_STATISTICS\r
-u16_t httpd_fs_count\r
-(char *name)\r
-{\r
- struct httpd_fsdata_file_noconst *f;\r
- u16_t i;\r
-\r
- i = 0;\r
- for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;\r
- f != NULL;\r
- f = (struct httpd_fsdata_file_noconst *)f->next) {\r
-\r
- if(httpd_fs_strcmp(name, f->name) == 0) {\r
- return count[i];\r
- }\r
- ++i;\r
- }\r
- return 0;\r
-}\r
-#endif /* HTTPD_FS_STATISTICS */\r
-/*-----------------------------------------------------------------------------------*/\r
+++ /dev/null
-/*\r
- * Copyright (c) 2001, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the lwIP TCP/IP stack.\r
- *\r
- * Author: Adam Dunkels <adam@sics.se>\r
- *\r
- * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
- */\r
-#ifndef __HTTPD_FS_H__\r
-#define __HTTPD_FS_H__\r
-\r
-#define HTTPD_FS_STATISTICS 1\r
-\r
-struct httpd_fs_file {\r
- char *data;\r
- int len;\r
-};\r
-\r
-/* file must be allocated by caller and will be filled in\r
- by the function. */\r
-int httpd_fs_open(const char *name, struct httpd_fs_file *file);\r
-\r
-#ifdef HTTPD_FS_STATISTICS\r
-#if HTTPD_FS_STATISTICS == 1\r
-u16_t httpd_fs_count(char *name);\r
-#endif /* HTTPD_FS_STATISTICS */\r
-#endif /* HTTPD_FS_STATISTICS */\r
-\r
-void httpd_fs_init(void);\r
-\r
-#endif /* __HTTPD_FS_H__ */\r
+++ /dev/null
-<html>\r
- <body bgcolor="white">\r
- <center>\r
- <h1>404 - file not found</h1>\r
- <h3>Go <a href="/">here</a> instead.</h3>\r
- </center>\r
- </body>\r
-</html>
\ No newline at end of file
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY onLoad="window.setTimeout("location.href='index.shtml'",100)">\r
-<font face="arial">\r
-Loading index.shtml. Click <a href="index.shtml">here</a> if not automatically redirected.\r
-</font>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY onLoad="window.setTimeout("location.href='index.shtml'",2000)">\r
-<font face="arial">\r
-<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<br><p>\r
-<h2>Task statistics</h2>\r
-Page will refresh every 2 seconds.<p>\r
-<font face="courier"><pre>Task State Priority Stack #<br>************************************************<br>\r
-%! rtos-stats\r
-</pre></font>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY>\r
-<font face="arial">\r
-<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<b>LED and LCD IO</b><br>\r
-\r
-<p>\r
-\r
-Use the check box to turn on or off the LED, enter text to display on the OLED display, then click "Update IO".\r
-\r
-\r
-<p>\r
-<form name="aForm" action="/io.shtml" method="get">\r
-%! led-io\r
-<p>\r
-<input type="submit" value="Update IO">\r
-</form>\r
-<br><p>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY onLoad="window.setTimeout("location.href='runtime.shtml'",2000)">\r
-<font face="arial">\r
-<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<br><p>\r
-<h2>Run-time statistics</h2>\r
-Page will refresh every 2 seconds.<p>\r
-<font face="courier"><pre>Task Abs Time % Time<br>****************************************<br>\r
-%! run-time\r
-</pre></font>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY>\r
-<font face="arial">\r
-<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<br><p>\r
-<h2>Network statistics</h2>\r
-<table width="300" border="0">\r
-<tr><td align="left"><font face="courier"><pre>\r
-IP Packets dropped\r
- Packets received\r
- Packets sent\r
-IP errors IP version/header length\r
- IP length, high byte\r
- IP length, low byte\r
- IP fragments\r
- Header checksum\r
- Wrong protocol\r
-ICMP Packets dropped\r
- Packets received\r
- Packets sent\r
- Type errors\r
-TCP Packets dropped\r
- Packets received\r
- Packets sent\r
- Checksum errors\r
- Data packets without ACKs\r
- Resets\r
- Retransmissions\r
- No connection avaliable\r
- Connection attempts to closed ports\r
-</pre></font></td><td><pre>%! net-stats\r
-</pre></table>\r
-</font>\r
-</body>\r
-</html>\r
+++ /dev/null
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">\r
-<html>\r
- <head>\r
- <title>FreeRTOS.org uIP WEB server demo</title>\r
- </head>\r
- <BODY>\r
-<font face="arial">\r
-<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>\r
-<br><p>\r
-<hr>\r
-<br>\r
-<h2>Network connections</h2>\r
-<p>\r
-<table>\r
-<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>\r
-%! tcp-connections\r
-</pre></font>\r
-</font>\r
-</body>\r
-</html>\r
-\r
+++ /dev/null
-static const unsigned char data_404_html[] = {\r
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-static const unsigned char data_index_html[] = {\r
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-\r
-static const unsigned char data_index_shtml[] = {\r
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-\r
-static const unsigned char data_tcp_shtml[] = {\r
- /* /tcp.shtml */\r
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-\r
-const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};\r
-\r
-const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};\r
-\r
-const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};\r
-\r
-const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};\r
-\r
-const struct httpd_fsdata_file file_runtime_shtml[] = {{file_io_shtml, data_runtime_shtml, data_runtime_shtml + 15, sizeof(data_runtime_shtml) - 15}};\r
-\r
-const struct httpd_fsdata_file file_stats_shtml[] = {{file_runtime_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};\r
-\r
-const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};\r
-\r
-#define HTTPD_FS_ROOT file_tcp_shtml\r
-\r
-#define HTTPD_FS_NUMFILES 7\r
+++ /dev/null
-/*\r
- * Copyright (c) 2001, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the lwIP TCP/IP stack.\r
- *\r
- * Author: Adam Dunkels <adam@sics.se>\r
- *\r
- * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $\r
- */\r
-#ifndef __HTTPD_FSDATA_H__\r
-#define __HTTPD_FSDATA_H__\r
-\r
-#include "uip.h"\r
-\r
-struct httpd_fsdata_file {\r
- const struct httpd_fsdata_file *next;\r
- const char *name;\r
- const char *data;\r
- const int len;\r
-#ifdef HTTPD_FS_STATISTICS\r
-#if HTTPD_FS_STATISTICS == 1\r
- u16_t count;\r
-#endif /* HTTPD_FS_STATISTICS */\r
-#endif /* HTTPD_FS_STATISTICS */\r
-};\r
-\r
-struct httpd_fsdata_file_noconst {\r
- struct httpd_fsdata_file *next;\r
- char *name;\r
- char *data;\r
- int len;\r
-#ifdef HTTPD_FS_STATISTICS\r
-#if HTTPD_FS_STATISTICS == 1\r
- u16_t count;\r
-#endif /* HTTPD_FS_STATISTICS */\r
-#endif /* HTTPD_FS_STATISTICS */\r
-};\r
-\r
-#endif /* __HTTPD_FSDATA_H__ */\r
+++ /dev/null
-/**\r
- * \addtogroup apps\r
- * @{\r
- */\r
-\r
-/**\r
- * \defgroup httpd Web server\r
- * @{\r
- * The uIP web server is a very simplistic implementation of an HTTP\r
- * server. It can serve web pages and files from a read-only ROM\r
- * filesystem, and provides a very small scripting language.\r
-\r
- */\r
-\r
-/**\r
- * \file\r
- * Web server\r
- * \author\r
- * Adam Dunkels <adam@sics.se>\r
- */\r
-\r
-\r
-/*\r
- * Copyright (c) 2004, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * Author: Adam Dunkels <adam@sics.se>\r
- *\r
- * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- */\r
-\r
-#include "uip.h"\r
-#include "httpd.h"\r
-#include "httpd-fs.h"\r
-#include "httpd-cgi.h"\r
-#include "http-strings.h"\r
-\r
-#include <string.h>\r
-\r
-#define STATE_WAITING 0\r
-#define STATE_OUTPUT 1\r
-\r
-#define ISO_nl 0x0a\r
-#define ISO_space 0x20\r
-#define ISO_bang 0x21\r
-#define ISO_percent 0x25\r
-#define ISO_period 0x2e\r
-#define ISO_slash 0x2f\r
-#define ISO_colon 0x3a\r
-\r
-\r
-/*---------------------------------------------------------------------------*/\r
-static unsigned short\r
-generate_part_of_file(void *state)\r
-{\r
- struct httpd_state *s = (struct httpd_state *)state;\r
-\r
- if(s->file.len > uip_mss()) {\r
- s->len = uip_mss();\r
- } else {\r
- s->len = s->file.len;\r
- }\r
- memcpy(uip_appdata, s->file.data, s->len);\r
- \r
- return s->len;\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(send_file(struct httpd_state *s))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
- \r
- do {\r
- PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);\r
- s->file.len -= s->len;\r
- s->file.data += s->len;\r
- } while(s->file.len > 0);\r
- \r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(send_part_of_file(struct httpd_state *s))\r
-{\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- PSOCK_SEND(&s->sout, s->file.data, s->len);\r
- \r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static void\r
-next_scriptstate(struct httpd_state *s)\r
-{\r
- char *p;\r
- p = strchr(s->scriptptr, ISO_nl) + 1;\r
- s->scriptlen -= (unsigned short)(p - s->scriptptr);\r
- s->scriptptr = p;\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(handle_script(struct httpd_state *s))\r
-{\r
- char *ptr;\r
- \r
- PT_BEGIN(&s->scriptpt);\r
-\r
-\r
- while(s->file.len > 0) {\r
-\r
- /* Check if we should start executing a script. */\r
- if(*s->file.data == ISO_percent &&\r
- *(s->file.data + 1) == ISO_bang) {\r
- s->scriptptr = s->file.data + 3;\r
- s->scriptlen = s->file.len - 3;\r
- if(*(s->scriptptr - 1) == ISO_colon) {\r
- httpd_fs_open(s->scriptptr + 1, &s->file);\r
- PT_WAIT_THREAD(&s->scriptpt, send_file(s));\r
- } else {\r
- PT_WAIT_THREAD(&s->scriptpt,\r
- httpd_cgi(s->scriptptr)(s, s->scriptptr));\r
- }\r
- next_scriptstate(s);\r
- \r
- /* The script is over, so we reset the pointers and continue\r
- sending the rest of the file. */\r
- s->file.data = s->scriptptr;\r
- s->file.len = s->scriptlen;\r
- } else {\r
- /* See if we find the start of script marker in the block of HTML\r
- to be sent. */\r
-\r
- if(s->file.len > uip_mss()) {\r
- s->len = uip_mss();\r
- } else {\r
- s->len = s->file.len;\r
- }\r
-\r
- if(*s->file.data == ISO_percent) {\r
- ptr = strchr(s->file.data + 1, ISO_percent);\r
- } else {\r
- ptr = strchr(s->file.data, ISO_percent);\r
- }\r
- if(ptr != NULL &&\r
- ptr != s->file.data) {\r
- s->len = (int)(ptr - s->file.data);\r
- if(s->len >= uip_mss()) {\r
- s->len = uip_mss();\r
- }\r
- }\r
- PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));\r
- s->file.data += s->len;\r
- s->file.len -= s->len;\r
- \r
- }\r
- }\r
- \r
- PT_END(&s->scriptpt);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))\r
-{\r
- char *ptr;\r
-\r
- PSOCK_BEGIN(&s->sout);\r
-\r
- PSOCK_SEND_STR(&s->sout, statushdr);\r
-\r
- ptr = strrchr(s->filename, ISO_period);\r
- if(ptr == NULL) {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_binary);\r
- } else if(strncmp(http_html, ptr, 5) == 0 ||\r
- strncmp(http_shtml, ptr, 6) == 0) {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_html);\r
- } else if(strncmp(http_css, ptr, 4) == 0) {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_css);\r
- } else if(strncmp(http_png, ptr, 4) == 0) {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_png);\r
- } else if(strncmp(http_gif, ptr, 4) == 0) {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_gif);\r
- } else if(strncmp(http_jpg, ptr, 4) == 0) {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_jpg);\r
- } else {\r
- PSOCK_SEND_STR(&s->sout, http_content_type_plain);\r
- }\r
- PSOCK_END(&s->sout);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(handle_output(struct httpd_state *s))\r
-{\r
- char *ptr;\r
- \r
- PT_BEGIN(&s->outputpt);\r
- \r
- if(!httpd_fs_open(s->filename, &s->file)) {\r
- httpd_fs_open(http_404_html, &s->file);\r
- strcpy(s->filename, http_404_html);\r
- PT_WAIT_THREAD(&s->outputpt,\r
- send_headers(s,\r
- http_header_404));\r
- PT_WAIT_THREAD(&s->outputpt,\r
- send_file(s));\r
- } else {\r
- PT_WAIT_THREAD(&s->outputpt,\r
- send_headers(s,\r
- http_header_200));\r
- ptr = strchr(s->filename, ISO_period);\r
- if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {\r
- PT_INIT(&s->scriptpt);\r
- PT_WAIT_THREAD(&s->outputpt, handle_script(s));\r
- } else {\r
- PT_WAIT_THREAD(&s->outputpt,\r
- send_file(s));\r
- }\r
- }\r
- PSOCK_CLOSE(&s->sout);\r
- PT_END(&s->outputpt);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static\r
-PT_THREAD(handle_input(struct httpd_state *s))\r
-{\r
- PSOCK_BEGIN(&s->sin);\r
-\r
- PSOCK_READTO(&s->sin, ISO_space);\r
-\r
- \r
- if(strncmp(s->inputbuf, http_get, 4) != 0) {\r
- PSOCK_CLOSE_EXIT(&s->sin);\r
- }\r
- PSOCK_READTO(&s->sin, ISO_space);\r
-\r
- if(s->inputbuf[0] != ISO_slash) {\r
- PSOCK_CLOSE_EXIT(&s->sin);\r
- }\r
-\r
- if(s->inputbuf[1] == ISO_space) {\r
- strncpy(s->filename, http_index_html, sizeof(s->filename));\r
- } else {\r
-\r
- s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;\r
-\r
- /* Process any form input being sent to the server. */\r
- {\r
- extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );\r
- vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );\r
- }\r
-\r
- strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));\r
- }\r
-\r
- /* httpd_log_file(uip_conn->ripaddr, s->filename);*/\r
- \r
- s->state = STATE_OUTPUT;\r
-\r
- while(1) {\r
- PSOCK_READTO(&s->sin, ISO_nl);\r
-\r
- if(strncmp(s->inputbuf, http_referer, 8) == 0) {\r
- s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;\r
- /* httpd_log(&s->inputbuf[9]);*/\r
- }\r
- }\r
- \r
- PSOCK_END(&s->sin);\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-static void\r
-handle_connection(struct httpd_state *s)\r
-{\r
- handle_input(s);\r
- if(s->state == STATE_OUTPUT) {\r
- handle_output(s);\r
- }\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-void\r
-httpd_appcall(void)\r
-{\r
- struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);\r
-\r
- if(uip_closed() || uip_aborted() || uip_timedout()) {\r
- } else if(uip_connected()) {\r
- PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);\r
- PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);\r
- PT_INIT(&s->outputpt);\r
- s->state = STATE_WAITING;\r
- /* timer_set(&s->timer, CLOCK_SECOND * 100);*/\r
- s->timer = 0;\r
- handle_connection(s);\r
- } else if(s != NULL) {\r
- if(uip_poll()) {\r
- ++s->timer;\r
- if(s->timer >= 20) {\r
- uip_abort();\r
- }\r
- } else {\r
- s->timer = 0;\r
- }\r
- handle_connection(s);\r
- } else {\r
- uip_abort();\r
- }\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-/**\r
- * \brief Initialize the web server\r
- *\r
- * This function initializes the web server and should be\r
- * called at system boot-up.\r
- */\r
-void\r
-httpd_init(void)\r
-{\r
- uip_listen(HTONS(80));\r
-}\r
-/*---------------------------------------------------------------------------*/\r
-/** @} */\r
+++ /dev/null
-/*\r
- * Copyright (c) 2001-2005, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack.\r
- *\r
- * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- *\r
- */\r
-\r
-#ifndef __HTTPD_H__\r
-#define __HTTPD_H__\r
-\r
-#include "psock.h"\r
-#include "httpd-fs.h"\r
-\r
-struct httpd_state {\r
- unsigned char timer;\r
- struct psock sin, sout;\r
- struct pt outputpt, scriptpt;\r
- char inputbuf[50];\r
- char filename[20];\r
- char state;\r
- struct httpd_fs_file file;\r
- int len;\r
- char *scriptptr;\r
- int scriptlen;\r
- \r
- unsigned short count;\r
-};\r
-\r
-void httpd_init(void);\r
-void httpd_appcall(void);\r
-\r
-void httpd_log(char *msg);\r
-void httpd_log_file(u16_t *requester, char *file);\r
-\r
-#endif /* __HTTPD_H__ */\r
+++ /dev/null
-#!/usr/bin/perl\r
-\r
-open(OUTPUT, "> httpd-fsdata.c");\r
-\r
-chdir("httpd-fs");\r
-\r
-opendir(DIR, ".");\r
-@files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
-closedir(DIR);\r
-\r
-foreach $file (@files) { \r
- \r
- if(-d $file && $file !~ /^\./) {\r
- print "Processing directory $file\n";\r
- opendir(DIR, $file);\r
- @newfiles = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);\r
- closedir(DIR);\r
- printf "Adding files @newfiles\n";\r
- @files = (@files, map { $_ = "$file/$_" } @newfiles);\r
- next;\r
- }\r
-}\r
-\r
-foreach $file (@files) {\r
- if(-f $file) {\r
- \r
- print "Adding file $file\n";\r
- \r
- open(FILE, $file) || die "Could not open file $file\n";\r
-\r
- $file =~ s-^-/-;\r
- $fvar = $file;\r
- $fvar =~ s-/-_-g;\r
- $fvar =~ s-\.-_-g;\r
- # for AVR, add PROGMEM here\r
- print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");\r
- print(OUTPUT "\t/* $file */\n\t");\r
- for($j = 0; $j < length($file); $j++) {\r
- printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));\r
- }\r
- printf(OUTPUT "0,\n");\r
- \r
- \r
- $i = 0; \r
- while(read(FILE, $data, 1)) {\r
- if($i == 0) {\r
- print(OUTPUT "\t");\r
- }\r
- printf(OUTPUT "%#02x, ", unpack("C", $data));\r
- $i++;\r
- if($i == 10) {\r
- print(OUTPUT "\n");\r
- $i = 0;\r
- }\r
- }\r
- print(OUTPUT "0};\n\n");\r
- close(FILE);\r
- push(@fvars, $fvar);\r
- push(@pfiles, $file);\r
- }\r
-}\r
-\r
-for($i = 0; $i < @fvars; $i++) {\r
- $file = $pfiles[$i];\r
- $fvar = $fvars[$i];\r
-\r
- if($i == 0) {\r
- $prevfile = "NULL";\r
- } else {\r
- $prevfile = "file" . $fvars[$i - 1];\r
- }\r
- print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");\r
- print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");\r
- print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");\r
-}\r
-\r
-print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");\r
-print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");\r
+++ /dev/null
-#!/usr/bin/perl\r
-\r
-\r
-sub stringify {\r
- my $name = shift(@_);\r
- open(OUTPUTC, "> $name.c");\r
- open(OUTPUTH, "> $name.h");\r
- \r
- open(FILE, "$name");\r
- \r
- while(<FILE>) {\r
- if(/(.+) "(.+)"/) {\r
- $var = $1;\r
- $data = $2;\r
- \r
- $datan = $data;\r
- $datan =~ s/\\r/\r/g;\r
- $datan =~ s/\\n/\n/g;\r
- $datan =~ s/\\01/\01/g; \r
- $datan =~ s/\\0/\0/g;\r
- \r
- printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);\r
- printf(OUTPUTC "/* \"$data\" */\n");\r
- printf(OUTPUTC "{");\r
- for($j = 0; $j < length($datan); $j++) {\r
- printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));\r
- }\r
- printf(OUTPUTC "};\n");\r
- \r
- printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);\r
- \r
- }\r
- }\r
- close(OUTPUTC);\r
- close(OUTPUTH);\r
-}\r
-stringify("http-strings");\r
-\r
-exit 0;\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-/* Standard includes. */\r
-#include <string.h>\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "semphr.h"\r
-\r
-#include "lcd_message.h"\r
-\r
-/* uip includes. */\r
-#include "hw_types.h"\r
-\r
-#include "uip.h"\r
-#include "uip_arp.h"\r
-#include "httpd.h"\r
-#include "timer.h"\r
-#include "clock-arch.h"\r
-#include "hw_ethernet.h"\r
-#include "ethernet.h"\r
-#include "hw_memmap.h"\r
-#include "lmi_flash.h"\r
-#include "sysctl.h"\r
-\r
-/* Demo includes. */\r
-#include "emac.h"\r
-#include "partest.h"\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* IP address configuration. */\r
-#define uipIP_ADDR0 172\r
-#define uipIP_ADDR1 25\r
-#define uipIP_ADDR2 218\r
-#define uipIP_ADDR3 19 \r
-\r
-/* How long to wait before attempting to connect the MAC again. */\r
-#define uipINIT_WAIT 100\r
-\r
-/* Shortcut to the header within the Rx buffer. */\r
-#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])\r
-\r
-/* Standard constant. */\r
-#define uipTOTAL_FRAME_HEADER_SIZE 54\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * Send the uIP buffer to the MAC.\r
- */\r
-static void prvENET_Send(void);\r
-\r
-/*\r
- * Setup the MAC address in the MAC itself, and in the uIP stack.\r
- */\r
-static void prvSetMACAddress( void );\r
-\r
-/*\r
- * Port functions required by the uIP stack.\r
- */\r
-void clock_init( void );\r
-clock_time_t clock_time( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The semaphore used by the ISR to wake the uIP task. */\r
-extern SemaphoreHandle_t xEMACSemaphore;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void clock_init(void)\r
-{\r
- /* This is done when the scheduler starts. */\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-clock_time_t clock_time( void )\r
-{\r
- return xTaskGetTickCount();\r
-}\r
-\r
-\r
-void vuIP_Task( void *pvParameters )\r
-{\r
-portBASE_TYPE i;\r
-uip_ipaddr_t xIPAddr;\r
-struct timer periodic_timer, arp_timer;\r
-extern void ( vEMAC_ISR )( void );\r
-\r
- /* Enable/Reset the Ethernet Controller */\r
- SysCtlPeripheralEnable( SYSCTL_PERIPH_ETH );\r
- SysCtlPeripheralReset( SYSCTL_PERIPH_ETH );\r
-\r
- /* Create the semaphore used by the ISR to wake this task. */\r
- vSemaphoreCreateBinary( xEMACSemaphore );\r
- \r
- /* Initialise the uIP stack. */\r
- timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );\r
- timer_set( &arp_timer, configTICK_RATE_HZ * 10 );\r
- uip_init();\r
- uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );\r
- uip_sethostaddr( xIPAddr );\r
- httpd_init();\r
-\r
- while( vInitEMAC() != pdPASS )\r
- {\r
- vTaskDelay( uipINIT_WAIT );\r
- }\r
- prvSetMACAddress(); \r
- \r
-\r
- for( ;; )\r
- {\r
- /* Is there received data ready to be processed? */\r
- uip_len = uiGetEMACRxData( uip_buf );\r
- \r
- if( uip_len > 0 )\r
- {\r
- /* Standard uIP loop taken from the uIP manual. */\r
-\r
- if( xHeader->type == htons( UIP_ETHTYPE_IP ) )\r
- {\r
- uip_arp_ipin();\r
- uip_input();\r
-\r
- /* If the above function invocation resulted in data that\r
- should be sent out on the network, the global variable\r
- uip_len is set to a value > 0. */\r
- if( uip_len > 0 )\r
- {\r
- uip_arp_out();\r
- prvENET_Send();\r
- }\r
- }\r
- else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )\r
- {\r
- uip_arp_arpin();\r
-\r
- /* If the above function invocation resulted in data that\r
- should be sent out on the network, the global variable\r
- uip_len is set to a value > 0. */\r
- if( uip_len > 0 )\r
- {\r
- prvENET_Send();\r
- }\r
- }\r
- }\r
- else\r
- {\r
- if( timer_expired( &periodic_timer ) )\r
- {\r
- timer_reset( &periodic_timer );\r
- for( i = 0; i < UIP_CONNS; i++ )\r
- {\r
- uip_periodic( i );\r
- \r
- /* If the above function invocation resulted in data that\r
- should be sent out on the network, the global variable\r
- uip_len is set to a value > 0. */\r
- if( uip_len > 0 )\r
- {\r
- uip_arp_out();\r
- prvENET_Send();\r
- }\r
- } \r
- \r
- /* Call the ARP timer function every 10 seconds. */\r
- if( timer_expired( &arp_timer ) )\r
- {\r
- timer_reset( &arp_timer );\r
- uip_arp_timer();\r
- }\r
- }\r
- else\r
- { \r
- /* We did not receive a packet, and there was no periodic\r
- processing to perform. Block for a fixed period. If a packet\r
- is received during this period we will be woken by the ISR\r
- giving us the Semaphore. */\r
- xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 ); \r
- }\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvENET_Send(void)\r
-{\r
- vInitialiseSend();\r
- vIncrementTxLength( uip_len );\r
- vSendBufferToMAC();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvSetMACAddress( void )\r
-{\r
-unsigned long ulUser0, ulUser1;\r
-unsigned char pucMACArray[8];\r
-struct uip_eth_addr xAddr;\r
-\r
- /* Get the device MAC address from flash */\r
- FlashUserGet(&ulUser0, &ulUser1);\r
-\r
- /* Convert the MAC address from flash into sequence of bytes. */\r
- pucMACArray[0] = ((ulUser0 >> 0) & 0xff);\r
- pucMACArray[1] = ((ulUser0 >> 8) & 0xff);\r
- pucMACArray[2] = ((ulUser0 >> 16) & 0xff);\r
- pucMACArray[3] = ((ulUser1 >> 0) & 0xff);\r
- pucMACArray[4] = ((ulUser1 >> 8) & 0xff);\r
- pucMACArray[5] = ((ulUser1 >> 16) & 0xff);\r
-\r
- /* Program the MAC address. */\r
- EthernetMACAddrSet(ETH_BASE, pucMACArray);\r
-\r
- xAddr.addr[ 0 ] = pucMACArray[0];\r
- xAddr.addr[ 1 ] = pucMACArray[1];\r
- xAddr.addr[ 2 ] = pucMACArray[2];\r
- xAddr.addr[ 3 ] = pucMACArray[3];\r
- xAddr.addr[ 4 ] = pucMACArray[4];\r
- xAddr.addr[ 5 ] = pucMACArray[5];\r
- uip_setethaddr( xAddr );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vApplicationProcessFormInput( char *pcInputString, portBASE_TYPE xInputLength )\r
-{\r
-char *c, *pcText;\r
-static char cMessageForDisplay[ 32 ];\r
-extern QueueHandle_t xOLEDQueue;\r
-xOLEDMessage xOLEDMessage;\r
-\r
- /* Process the form input sent by the IO page of the served HTML. */\r
-\r
- c = strstr( pcInputString, "?" );\r
-\r
- if( c )\r
- {\r
- /* Turn LED's on or off in accordance with the check box status. */\r
- if( strstr( c, "LED0=1" ) != NULL )\r
- {\r
- vParTestSetLED( 0, 1 );\r
- }\r
- else\r
- {\r
- vParTestSetLED( 0, 0 );\r
- } \r
- \r
- /* Find the start of the text to be displayed on the LCD. */\r
- pcText = strstr( c, "LCD=" );\r
- pcText += strlen( "LCD=" );\r
-\r
- /* Terminate the file name for further processing within uIP. */\r
- *c = 0x00;\r
-\r
- /* Terminate the LCD string. */\r
- c = strstr( pcText, " " );\r
- if( c != NULL )\r
- {\r
- *c = 0x00;\r
- }\r
-\r
- /* Add required spaces. */\r
- while( ( c = strstr( pcText, "+" ) ) != NULL )\r
- {\r
- *c = ' ';\r
- }\r
-\r
- /* Write the message to the LCD. */\r
- strcpy( cMessageForDisplay, pcText );\r
- xOLEDMessage.pcMessage = cMessageForDisplay;\r
- xQueueSend( xOLEDQueue, &xOLEDMessage, portMAX_DELAY );\r
- }\r
-}\r
-\r
+++ /dev/null
-/**\r
- * \addtogroup uipopt\r
- * @{\r
- */\r
-\r
-/**\r
- * \name Project-specific configuration options\r
- * @{\r
- *\r
- * uIP has a number of configuration options that can be overridden\r
- * for each project. These are kept in a project-specific uip-conf.h\r
- * file and all configuration names have the prefix UIP_CONF.\r
- */\r
-\r
-/*\r
- * Copyright (c) 2006, Swedish Institute of Computer Science.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. Neither the name of the Institute nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack\r
- *\r
- * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $\r
- */\r
-\r
-/**\r
- * \file\r
- * An example uIP configuration file\r
- * \author\r
- * Adam Dunkels <adam@sics.se>\r
- */\r
-\r
-#ifndef __UIP_CONF_H__\r
-#define __UIP_CONF_H__\r
-\r
-#include <stdint.h>\r
-\r
-/**\r
- * 8 bit datatype\r
- *\r
- * This typedef defines the 8-bit type used throughout uIP.\r
- *\r
- * \hideinitializer\r
- */\r
-typedef uint8_t u8_t;\r
-\r
-/**\r
- * 16 bit datatype\r
- *\r
- * This typedef defines the 16-bit type used throughout uIP.\r
- *\r
- * \hideinitializer\r
- */\r
-typedef uint16_t u16_t;\r
-\r
-/**\r
- * Statistics datatype\r
- *\r
- * This typedef defines the dataype used for keeping statistics in\r
- * uIP.\r
- *\r
- * \hideinitializer\r
- */\r
-typedef unsigned short uip_stats_t;\r
-\r
-/**\r
- * Maximum number of TCP connections.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_MAX_CONNECTIONS 40\r
-\r
-/**\r
- * Maximum number of listening TCP ports.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_MAX_LISTENPORTS 40\r
-\r
-/**\r
- * uIP buffer size.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_BUFFER_SIZE 1500\r
-\r
-/**\r
- * CPU byte order.\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_BYTE_ORDER LITTLE_ENDIAN\r
-\r
-/**\r
- * Logging on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_LOGGING 0\r
-\r
-/**\r
- * UDP support on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_UDP 0\r
-\r
-/**\r
- * UDP checksums on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_UDP_CHECKSUMS 1\r
-\r
-/**\r
- * uIP statistics on or off\r
- *\r
- * \hideinitializer\r
- */\r
-#define UIP_CONF_STATISTICS 1\r
-\r
-/* Here we include the header file for the application(s) we use in\r
- our project. */\r
-/*#include "smtp.h"*/\r
-/*#include "hello-world.h"*/\r
-/*#include "telnetd.h"*/\r
-#include "webserver.h"\r
-/*#include "dhcpc.h"*/\r
-/*#include "resolv.h"*/\r
-/*#include "webclient.h"*/\r
-\r
-#define UIP_CONF_EXTERNAL_BUFFER\r
-\r
-#endif /* __UIP_CONF_H__ */\r
-\r
-/** @} */\r
-/** @} */\r
+++ /dev/null
-/*\r
- * Copyright (c) 2002, Adam Dunkels.\r
- * All rights reserved.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above\r
- * copyright notice, this list of conditions and the following\r
- * disclaimer in the documentation and/or other materials provided\r
- * with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote\r
- * products derived from this software without specific prior\r
- * written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS\r
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\r
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY\r
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE\r
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- * This file is part of the uIP TCP/IP stack\r
- *\r
- * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $\r
- *\r
- */\r
-#ifndef __WEBSERVER_H__\r
-#define __WEBSERVER_H__\r
-\r
-#include "httpd.h"\r
-\r
-typedef struct httpd_state uip_tcp_appstate_t;\r
-/* UIP_APPCALL: the name of the application function. This function\r
- must return void and take no arguments (i.e., C type "void\r
- appfunc(void)"). */\r
-#ifndef UIP_APPCALL\r
-#define UIP_APPCALL httpd_appcall\r
-#endif\r
-\r
-\r
-#endif /* __WEBSERVER_H__ */\r
--- /dev/null
+If you need the demo that used to be in this directory then download FreeRTOS V8.2.3\r
+from http://sourceforge.net/projects/freertos/files/FreeRTOS/\r
+\r
+++ /dev/null
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Stellaris Evaluation Board A"\r
-ft2232_layout evb_lm3s811\r
-ft2232_vid_pid 0x0403 0xbcd9\r
-jtag_speed 40\r
-#LM3S811 Evaluation Board has only srst\r
-reset_config srst_only separate\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup attach\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target cortex_m3 little run_and_halt 0\r
-# 4k working area at base of ram\r
-working_area 0 0x20000800 0x1200 nobackup\r
-#target_script 0 reset ../doc/scripts/evb_lm3s811_test.script \r
-\r
-#flash configuration\r
-flash bank stellaris 0 0 0 0 0\r
+++ /dev/null
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Stellaris Evaluation Board A"\r
-ft2232_layout evb_lm3s811\r
-ft2232_vid_pid 0x0403 0xbcd9\r
-jtag_speed 40\r
-#LM3S811 Evaluation Board has only srst\r
-reset_config srst_only separate\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target cortex_m3 little run_and_init 0\r
-# 4k working area at base of ram\r
-working_area 0 0x20000800 0x1200 nobackup\r
-#target_script 0 reset ../doc/scripts/evb_lm3s811_test.script \r
-\r
-target_script 0 reset program.script\r
-\r
-\r
-#flash configuration\r
-flash bank stellaris 0 0 0 0 0\r
-\r
-\r
-\r
+++ /dev/null
-halt\r
-sleep 200\r
-wait_halt\r
-flash probe 0\r
-#sleep 500\r
-flash info 0\r
-#sleep 500\r
-#flash protect 0 0 31 off\r
-#sleep 500\r
-flash erase 0 0 255\r
-sleep 200\r
-flash write 0 ./RTOSDemo/RTOSDemo.bin 0\r
-sleep 200\r
-reset run\r
-shutdown\r
-\r
-\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8" standalone="no"?><SharedRoot><SharedProperty id="" value=""/></SharedRoot>
\ No newline at end of file
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
-<?scdStore version="2"?>\r
-\r
-<scannerInfo id="org.eclipse.cdt.make.core.discoveredScannerInfo">\r
-<instance id="0.1348192838">\r
-<collector id="org.eclipse.cdt.make.core.PerProjectSICollector">\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Source/include"/>\r
-<includePath path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF5282_Eclipse\RTOSDemo\include" removed="true"/>\r
-<includePath path="C:\devtools\cygwin\include" removed="true"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/include"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/ColdFire_V2"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/ethernet/lwIP_130/src/include"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/ethernet/lwIP_130/contrib/port/FreeRTOS/ColdFire_MCF5282"/>\r
-<includePath path="C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/ethernet/lwIP_130/src/include/ipv4"/>\r
-<includePath path="C:\devtools\cygwin\lib\gcc\i686-pc-cygwin\3.4.4\include"/>\r
-<includePath path="C:\devtools\cygwin\usr\include"/>\r
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-<definedSymbol symbol="__STDC_HOSTED__=1"/>\r
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-<definedSymbol symbol="__USER_LABEL_PREFIX__=_"/>\r
-<definedSymbol symbol="__VERSION__="3.4.4 (cygming special) (gdc 0.12, using dmd 0.125)""/>\r
-<definedSymbol symbol="__NO_INLINE__=1"/>\r
-<definedSymbol symbol="__FINITE_MATH_ONLY__=0"/>\r
-<definedSymbol symbol="__i386=1"/>\r
-<definedSymbol symbol="__i386__=1"/>\r
-<definedSymbol symbol="i386=1"/>\r
-<definedSymbol symbol="__tune_i686__=1"/>\r
-<definedSymbol symbol="__tune_pentiumpro__=1"/>\r
-<definedSymbol symbol="_X86_=1"/>\r
-<definedSymbol symbol="__stdcall=__attribute__((__stdcall__))"/>\r
-<definedSymbol symbol="__fastcall=__attribute__((__fastcall__))"/>\r
-<definedSymbol symbol="__cdecl=__attribute__((__cdecl__))"/>\r
-<definedSymbol symbol="__declspec(x)=__attribute__((x))"/>\r
-<definedSymbol symbol="_stdcall=__attribute__((__stdcall__))"/>\r
-<definedSymbol symbol="_fastcall=__attribute__((__fastcall__))"/>\r
-<definedSymbol symbol="_cdecl=__attribute__((__cdecl__))"/>\r
-<definedSymbol symbol="__CYGWIN32__=1"/>\r
-<definedSymbol symbol="__CYGWIN__=1"/>\r
-<definedSymbol symbol="unix=1"/>\r
-<definedSymbol symbol="__unix__=1"/>\r
-<definedSymbol symbol="__unix=1"/>\r
-<definedSymbol symbol="COLDFIRE_V2_GCC=1"/>\r
-</collector>\r
-</instance>\r
-</scannerInfo>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
- <section name="org.eclipse.cdt.internal.ui.MakeView">\r
- </section>\r
-</section>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
- <section name="completion_proposal_size">\r
- </section>\r
- <section name="PDOMSearchPage">\r
- <item value="227191" key="searchFlags"/>\r
- <item value="false" key="caseSensitive"/>\r
- <list key="previousPatterns">\r
- <item value="CACR"/>\r
- </list>\r
- </section>\r
- <section name="org.eclipse.cdt.ui.text.hover.CMacroExpansion">\r
- </section>\r
- <section name="org.eclipse.cdt.ui.text.hover.CMacroExpansionExploration">\r
- <item value="573" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_Y_ORIGIN"/>\r
- <item value="71" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_HEIGHT"/>\r
- <item value="367" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_WIDTH"/>\r
- <item value="62" key="org.eclipse.cdt.internal.ui.text.c.hover.CMacroExpansionExplorationControlDIALOG_X_ORIGIN"/>\r
- </section>\r
-</section>\r
+++ /dev/null
-\ 2
\ No newline at end of file
+++ /dev/null
-\ 1
\ No newline at end of file
+++ /dev/null
-#Tue Aug 05 14:13:37 BST 2008\r
-eclipse.preferences.version=1\r
-environment/workspace=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<environment append\="true" appendContributed\="true"/>\r\n\r
+++ /dev/null
-#Tue Aug 05 11:49:38 BST 2008\r
-eclipse.preferences.version=1\r
-indexer/preferenceScope=0\r
+++ /dev/null
-#Tue Aug 05 11:54:06 BST 2008\r
-org.eclipse.cdt.debug.core.cDebug.common_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<sourceLookupDirector>\r\n<sourceContainers duplicates\="false"/>\r\n</sourceLookupDirector>\r\n\r
-eclipse.preferences.version=1\r
+++ /dev/null
-#Fri Aug 08 13:44:18 BST 2008\r
-org.eclipse.debug.ui.DebugView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true\r
-columnOrderKeyEXE=0,1,2,3,4,5\r
-visibleColumnsKeySF=1,1,0,0,0,0\r
-org.eclipse.debug.ui.BreakpointView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true\r
-visibleColumnsKeyEXE=1,1,1,0,0,0\r
-columnSortDirectionKeyEXE=128\r
-eclipse.preferences.version=1\r
-columnOrderKeySF=0,1,2,3,4,5\r
-columnSortDirectionKeySF=128\r
+++ /dev/null
-#Thu Aug 14 13:44:43 BST 2008\r
-eclipse.preferences.version=1\r
-properties/RTOSDemo.null.38326818/0.1348192838=\#\r\n\#Thu Aug 14 13\:44\:43 BST 2008\r\norg.eclipse.cdt.build.core.settings.holder.1053974197\=\\\#\\r\\n\\\#Thu Aug 14 13\\\:44\\\:43 BST 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.804763436\=\\\#\\r\\n\\\#Thu Aug 14 13\\\:44\\\:43 BST 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.libs.1997217404\=\\\#\\r\\n\\\#Thu Aug 14 13\\\:44\\\:43 BST 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.99587291\=\\\#\\r\\n\\\#Thu Aug 14 13\\\:44\\\:43 BST 2008\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.prefbase.toolchain.1423010524\=\\\#\\r\\n\\\#Thu Aug 14 13\\\:44\\\:43 BST 2008\\r\\nrebuildState\\\=false\\r\\n\r\n0.1348192838\=\\\#\\r\\n\\\#Thu Aug 14 13\\\:44\\\:43 BST 2008\\r\\nrcState\\\=0\\r\\nrebuildState\\\=false\\r\\n\r\n\r
+++ /dev/null
-#Tue Aug 05 17:26:23 BST 2008\r
-org.eclipse.mylyn.ui.first.run.0_4_9=false\r
-eclipse.preferences.version=1\r
+++ /dev/null
-#Tue Aug 05 14:13:37 BST 2008\r
-useQuickDiffPrefPage=true\r
-closeBrackets=false\r
-useAnnotationsPrefPage=true\r
-spelling_locale=en_GB\r
-sourceHoverBackgroundColor=255,255,225\r
-org.eclipse.cdt.ui.text.custom_code_templates=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?><templates/>\r
-closeAngularBrackets=false\r
-spelling_locale_initialized=true\r
-eclipse.preferences.version=1\r
-org.eclipse.cdt.ui.text.templates.custom=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?><templates/>\r
-content_assist_disabled_computers=org.eclipse.cdt.ui.cdtNoTypeProposalCategory\u0000org.eclipse.cdt.ui.cdtTypeProposalCategory\u0000org.eclipse.cdt.ui.textProposalCategory\u0000org.eclipse.cdt.ui.templateProposalCategory\u0000\r
-closeBraces=false\r
-closeStrings=false\r
+++ /dev/null
-#Wed Aug 06 16:58:53 BST 2008\r
-version=1\r
-eclipse.preferences.version=1\r
-pathvariable.FREERTOS_ROOT=C\:/E/Dev/FreeRTOS/WorkingCopy2\r
-description.autobuilding=false\r
+++ /dev/null
-#Thu Aug 14 12:45:14 BST 2008\r
-prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions/>\r\n\r
-eclipse.preferences.version=1\r
+++ /dev/null
-#Thu Aug 14 13:47:55 BST 2008\r
-org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n\r
-pref_state_memento.org.eclipse.debug.ui.VariableView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684">\r\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.VariableView"/>\r\n</VariablesViewMemento>\r
-pref_state_memento.org.eclipse.debug.ui.RegisterView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="136" org.eclipse.debug.ui.SASH_VIEW_PART\="863">\r\n<COLUMN_SIZES IMemento.internal.id\="org.eclipse.debug.ui.VARIALBE_COLUMN_PRESENTATION.COL_VAR_NAME" SIZE\="130"/>\r\n<COLUMN_SIZES IMemento.internal.id\="org.eclipse.debug.ui.VARIALBE_COLUMN_PRESENTATION.COL_VAR_VALUE" SIZE\="414"/>\r\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.RegisterView"/>\r\n</VariablesViewMemento>\r
-org.eclipse.debug.ui.memory.columnSize\:org.eclipse.cdt.debug.core=4\r
-pref_state_memento.org.eclipse.debug.ui.ExpressionView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684"/>\r
-preferredDetailPanes=DefaultDetailPane\:DefaultDetailPane|\r
-org.eclipse.debug.ui.switch_perspective_on_suspend=always\r
-eclipse.preferences.version=1\r
-org.eclipse.debug.ui.memory.rowSize\:org.eclipse.cdt.debug.core=16\r
-org.eclipse.debug.ui.user_view_bindings=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<viewBindings>\r\n<view id\="org.eclipse.debug.ui.MemoryView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="closed"/>\r\n</view>\r\n<view id\="org.eclipse.debug.ui.RegisterView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="closed"/>\r\n</view>\r\n<view id\="org.eclipse.debug.ui.DebugView">\r\n<perspective id\="org.eclipse.cdt.ui.CPerspective" userAction\="closed"/>\r\n</view>\r\n<view id\="org.eclipse.debug.ui.ExpressionView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n<perspective id\="org.eclipse.cdt.ui.CPerspective" userAction\="closed"/>\r\n</view>\r\n<view id\="org.eclipse.ui.console.ConsoleView">\r\n<perspective id\="org.eclipse.cdt.ui.CPerspective" userAction\="opened"/>\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n</view>\r\n</viewBindings>\r\n\r
+++ /dev/null
-#Tue Aug 05 11:47:31 BST 2008\r
-eclipse.preferences.version=1\r
-autoUpdateInit=true\r
+++ /dev/null
-#Tue Aug 05 11:54:43 BST 2008\r
-eclipse.preferences.version=1\r
-org.eclipse.jdt.core.builder.resourceCopyExclusionFilter=*.launch\r
+++ /dev/null
-#Mon Aug 11 13:09:15 BST 2008\r
-org.eclipse.debug.ui.VariableView.org.eclipse.jdt.debug.ui.show_null_entries=true\r
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-org.eclipse.debug.ui.ExpressionView.org.eclipse.jdt.debug.ui.show_null_entries=true\r
+++ /dev/null
-#Tue Aug 05 13:17:49 BST 2008\r
-useQuickDiffPrefPage=true\r
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-spelling_locale=en_GB\r
-org.eclipse.jdt.internal.ui.navigator.layout=2\r
-org.eclipse.jface.textfont=1|Courier New|10.0|0|WINDOWS|1|0|0|0|0|0|0|0|0|1|0|0|0|0|Courier New;\r
-org.eclipse.jdt.ui.editor.tab.width=\r
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+++ /dev/null
-#Tue Aug 05 11:47:26 BST 2008\r
-eclipse.preferences.version=1\r
-mylyn.attention.migrated=true\r
+++ /dev/null
-#Mon Aug 11 07:30:25 BST 2008\r
-org.eclipse.search.defaultPerspective=org.eclipse.search.defaultPerspective.none\r
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+++ /dev/null
-#Fri Aug 08 13:44:18 BST 2008\r
-eclipse.preferences.version=1\r
-org.eclipse.team.ui.first_time=false\r
+++ /dev/null
-#Thu Aug 14 11:07:33 BST 2008\r
-eclipse.preferences.version=1\r
-internalWebBrowserHistory=http\://www.eclipse.org/|*|http\://www.eclipse.org|*|C\:\\E\\Dev\\FreeRTOS\\DOC\\CurrentWebSite\\banners\\ColdFire-RTOS-Port-Using-Eclipse.html|*|file\:/C\:/E/Dev/FreeRTOS/DOC/CurrentWebSite/banners/ColdFire-RTOS-Port-Using-Eclipse.html|*|\r
+++ /dev/null
-#Tue Aug 05 11:56:04 BST 2008\r
-eclipse.preferences.version=1\r
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+++ /dev/null
-#Thu Aug 14 14:16:27 BST 2008\r
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+++ /dev/null
-#Tue Aug 12 16:13:20 BST 2008\r
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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+++ /dev/null
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- <item value="<?xml version="1.0" encoding="UTF-8"?>
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<child filterId="org.eclipse.jdt.ui.PackageExplorer.NonJavaProjectsFilter" isEnabled="false"/>
<child filterId="org.eclipse.jdt.internal.ui.PackageExplorer.EmptyInnerPackageFilter" isEnabled="true"/>
<child filterId="org.eclipse.jdt.ui.PackageExplorer.PackageDeclarationFilter" isEnabled="true"/>
<child filterId="org.eclipse.jdt.internal.ui.PackageExplorer.EmptyPackageFilter" isEnabled="false"/>
<child filterId="org.eclipse.jdt.ui.PackageExplorer.ImportDeclarationFilter" isEnabled="true"/>
<child filterId="org.eclipse.jdt.ui.PackageExplorer.FieldsFilter" isEnabled="false"/>
<child filterId="org.eclipse.jdt.internal.ui.PackageExplorer.HideInnerClassFilesFilter" isEnabled="true"/>
<child filterId="org.eclipse.jdt.ui.PackageExplorer.NonPublicFilter" isEnabled="false"/>
<child filterId="org.eclipse.jdt.ui.PackageExplorer_patternFilterId_.*" isEnabled="true"/>
<child filterId="org.eclipse.jdt.ui.PackageExplorer.EmptyLibraryContainerFilter" isEnabled="true"/>
<child filterId="org.eclipse.pde.ui.BinaryProjectFilter1" isEnabled="false"/>
<child filterId="org.eclipse.jdt.ui.PackageExplorer.SyntheticMembersFilter" isEnabled="true"/>
</xmlDefinedFilters>
</customFilters>
</packageExplorer>" key="memento"/>\r
- </section>\r
- <section name="JavaElementSearchActions">\r
- </section>\r
-</section>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
-</section>\r
+++ /dev/null
-#Cached timestamps\r
-#Tue Aug 05 11:56:05 BST 2008\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
- <section name="DialogBounds_SearchDialog">\r
- <item value="519" key="DIALOG_WIDTH"/>\r
- <item value="259" key="DIALOG_Y_ORIGIN"/>\r
- <item value="385" key="DIALOG_HEIGHT"/>\r
- <item value="445" key="DIALOG_X_ORIGIN"/>\r
- <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
- </section>\r
- <section name="Search">\r
- <list key="Search.processedPageIds">\r
- <item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>\r
- <item value="org.eclipse.mylyn.tasks.ui.search.page"/>\r
- <item value="org.eclipse.cdt.ui.pdomSearchPage"/>\r
- <item value="org.eclipse.jdt.ui.JavaSearchPage"/>\r
- <item value="org.eclipse.pde.internal.ui.search.SearchPage"/>\r
- </list>\r
- <list key="Search.enabledPageIds">\r
- <item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>\r
- <item value="org.eclipse.mylyn.tasks.ui.search.page"/>\r
- <item value="org.eclipse.cdt.ui.pdomSearchPage"/>\r
- <item value="org.eclipse.jdt.ui.JavaSearchPage"/>\r
- <item value="org.eclipse.pde.internal.ui.search.SearchPage"/>\r
- </list>\r
- </section>\r
- <section name="org.eclipse.cdt.ui.pdomSearchViewPage">\r
- </section>\r
- <section name="SearchDialog.ScopePart">\r
- <item value="0" key="scope"/>\r
- </section>\r
-</section>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
- <section name="SaveAsDialogSettings">\r
- <item value="438" key="DIALOG_WIDTH"/>\r
- <item value="147" key="DIALOG_Y_ORIGIN"/>\r
- <item value="625" key="DIALOG_X_ORIGIN"/>\r
- <item value="553" key="DIALOG_HEIGHT"/>\r
- <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
- </section>\r
- <section name="NewWizardAction">\r
- <item value="org.eclipse.cdt.ui.wizards.NewCWizard2" key="NewWizardSelectionPage.STORE_SELECTED_ID"/>\r
- <list key="NewWizardSelectionPage.STORE_EXPANDED_CATEGORIES_ID">\r
- <item value="org.eclipse.cdt.ui.newCWizards"/>\r
- </list>\r
- </section>\r
- <section name="CleanDialogSettings">\r
- <item value="411" key="DIALOG_WIDTH"/>\r
- <item value="false" key="BUILD_NOW"/>\r
- <item value="275" key="DIALOG_Y_ORIGIN"/>\r
- <item value="true" key="BUILD_ALL"/>\r
- <item value="635" key="DIALOG_X_ORIGIN"/>\r
- <item value="417" key="DIALOG_HEIGHT"/>\r
- <item value="false" key="TOGGLE_SELECTED"/>\r
- </section>\r
-</section>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
- <item value="1024" key="introLaunchBar.location"/>\r
-</section>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
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- </section>\r
- <section name="org.eclipse.ui.texteditor.FindReplaceDialog">\r
- <item value="true" key="wrap"/>\r
- <item value="false" key="casesensitive"/>\r
- <item value="false" key="isRegEx"/>\r
- <item value="false" key="incremental"/>\r
- <item value="false" key="wholeword"/>\r
- <item value="xTaskCreate" key="selection"/>\r
- <list key="findhistory">\r
- <item value="xTaskCreate"/>\r
- <item value="prvQueueAccessLogError"/>\r
- <item value="criticalnest"/>\r
- <item value="0x200075ec"/>\r
- <item value="0x200075e8"/>\r
- <item value="ulPrevPendedValue"/>\r
- <item value=""nop""/>\r
- <item value="uxTopReadyPriority"/>\r
- </list>\r
- <list key="replacehistory">\r
- <item value="0x20007fdc"/>\r
- <item value="0x200075ec"/>\r
- <item value="0x01"/>\r
- <item value="mainERROR_PERIOD"/>\r
- <item value="french_cheese"/>\r
- <item value="taskEXIT_CRITICAL"/>\r
- <item value="taskENTER_CRITICAL"/>\r
- <item value="COMMON_DEMO_CODE_DIR"/>\r
- </list>\r
- </section>\r
-</section>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
-<section name="Workbench">\r
- <section name="FileSystemImportWizard">\r
- <item value="false" key="WizardFileSystemResourceImportPage1.STORE_OVERWRITE_EXISTING_RESOURCES_ID"/>\r
- <item value="false" key="WizardFileSystemResourceImportPage1.STORE_CREATE_CONTAINER_STRUCTURE_ID"/>\r
- <list key="WizardFileSystemResourceImportPage1.STORE_SOURCE_NAMES_ID">\r
- <item value="C:\Temp\RTOSDemo"/>\r
- </list>\r
- </section>\r
- <section name="WorkbenchPreferenceDialogSettings">\r
- <item value="157" key="DIALOG_Y_ORIGIN"/>\r
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- <item value="rtos.openrtos.viewer.views.TaskTable" key="ShowViewDialog.STORE_SELECTED_VIEW_ID"/>\r
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- <item value="704" key="DIALOG_X_ORIGIN"/>\r
- <item value="415" key="DIALOG_HEIGHT"/>\r
- <item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>\r
- <list key="ShowViewDialog.STORE_EXPANDED_CATEGORIES_ID">\r
- <item value="rtos.openrtos.viewer"/>\r
- </list>\r
- </section>\r
- <section name="org.eclipse.ui.preferences.keysPreferencePage">\r
- <item value="true" key="uncategorizedFilter"/>\r
- <item value="true" key="internalFilter"/>\r
- <item value="true" key="actionSetFilter"/>\r
- </section>\r
- <section name="ImportExportAction">\r
- <item value="org.eclipse.ui.wizards.import.FileSystem" key="ImportExportPage.STORE_SELECTED_IMPORT_WIZARD_ID"/>\r
- <list key="ImportExportPage.STORE_EXPANDED_IMPORT_CATEGORIES">\r
- <item value="org.eclipse.ui.Basic"/>\r
- </list>\r
- </section>\r
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+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>\r
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-<perspectiveBar>\r
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-<coolItem id="org.eclipse.ui.browser.editor" itemType="typePlaceholder" x="-1" y="-1"/>\r
-<coolItem id="org.eclipse.cdt.ui.editor.asm.AsmEditor" itemType="typePlaceholder" x="-1" y="-1"/>\r
-<coolItem id="org.eclipse.ui.DefaultTextEditor" itemType="typePlaceholder" x="-1" y="-1"/>\r
-<coolItem id="org.eclipse.cdt.ui.editor.CEditor" itemType="typePlaceholder" x="-1" y="-1"/>\r
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-<page aggregateWorkingSetId="Aggregate for window 1217933244875" focus="true" label="Workspace - C/C++">\r
-<editors>\r
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-<folder appearance="1" expanded="2">\r
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-</folder>\r
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-<view id="org.eclipse.cdt.ui.CView" partName="C/C++ Projects">\r
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-<expanded>\r
-<element path="C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ColdFire_MCF5282_Eclipse\RTOSDemo"/>\r
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-<customFilters userDefinedPatternsEnabled="false">\r
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-<child filterId="org.eclipse.cdt.ui.CView_patternFilterId_.*" isEnabled="true"/>\r
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-<expanded>
<category IMemento.internal.id="Warnings (1 item)"/>\r
-<category IMemento.internal.id="Warnings"/>\r
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-<visible IMemento.internal.id="org.eclipse.ui.ide.severityAndDescriptionField"/>\r
-<visible IMemento.internal.id="org.eclipse.ui.ide.resourceField"/>\r
-<visible IMemento.internal.id="org.eclipse.ui.ide.pathField"/>\r
-<visible IMemento.internal.id="org.eclipse.ui.ide.locationField"/>\r
-<visible IMemento.internal.id="org.eclipse.ui.ide.markerType"/>\r
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-<visible IMemento.internal.id="org.eclipse.ui.ide.completionField"/>\r
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-<visible IMemento.internal.id="org.eclipse.ui.ide.descriptionField"/>\r
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-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef FREERTOS_CONFIG_H\r
-#define FREERTOS_CONFIG_H\r
-\r
-#include "MCF5282.h"\r
-\r
-/*-----------------------------------------------------------\r
- * Application specific definitions.\r
- *\r
- * These definitions should be adjusted for your particular hardware and\r
- * application requirements.\r
- *\r
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. \r
- *\r
- * See http://www.freertos.org/a00110.html.\r
- *----------------------------------------------------------*/\r
-\r
-#define configUSE_PREEMPTION 1\r
-#define configUSE_IDLE_HOOK 0\r
-#define configUSE_TICK_HOOK 0\r
-#define configCPU_CLOCK_HZ ( ( unsigned long ) 64000000 )\r
-#define configTICK_RATE_HZ ( ( TickType_t ) 100 )\r
-#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 190 )\r
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 40000 ) )\r
-#define configMAX_TASK_NAME_LEN ( 12 )\r
-#define configUSE_TRACE_FACILITY 1\r
-#define configUSE_16_BIT_TICKS 0\r
-#define configIDLE_SHOULD_YIELD 0\r
-#define configUSE_CO_ROUTINES 0\r
-#define configUSE_MUTEXES 1\r
-#define configCHECK_FOR_STACK_OVERFLOW 1\r
-#define configUSE_RECURSIVE_MUTEXES 1\r
-#define configQUEUE_REGISTRY_SIZE 10\r
-#define configUSE_COUNTING_SEMAPHORES 0\r
-\r
-#define configMAX_PRIORITIES ( 6 )\r
-#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
-\r
-/* Set the following definitions to 1 to include the API function, or zero\r
-to exclude the API function. */\r
-\r
-#define INCLUDE_vTaskPrioritySet 1\r
-#define INCLUDE_uxTaskPriorityGet 1\r
-#define INCLUDE_vTaskDelete 1\r
-#define INCLUDE_vTaskCleanUpResources 0\r
-#define INCLUDE_vTaskSuspend 1\r
-#define INCLUDE_vTaskDelayUntil 1\r
-#define INCLUDE_vTaskDelay 1\r
-#define INCLUDE_uxTaskGetStackHighWaterMark 1\r
-#define INCLUDE_eTaskGetState 1\r
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-#define configYIELD_INTERRUPT_VECTOR 16UL\r
-#define configKERNEL_INTERRUPT_PRIORITY 1\r
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4\r
-\r
-void vApplicationSetupInterrupts( void );\r
-\r
-#endif /* FREERTOS_CONFIG_H */\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-\r
-/* Constants used to configure the interrupts. */\r
-#define portPRESCALE_VALUE 64\r
-#define portPRESCALE_REG_SETTING ( 5 << 8 )\r
-#define portPIT_INTERRUPT_ENABLED ( 0x08 )\r
-#define configPIT0_INTERRUPT_VECTOR ( 55 )\r
-\r
-/*\r
- * FreeRTOS.org requires two interrupts - a tick interrupt generated from a\r
- * timer source, and a spare interrupt vector used for context switching.\r
- * The configuration below uses PIT0 for the former, and vector 16 for the\r
- * latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO\r
- * NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided\r
- * here for using alternative interrupt sources.\r
- *\r
- * To change the tick interrupt source:\r
- *\r
- * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever\r
- * peripheral is to be used to generate the tick interrupt.\r
- *\r
- * 2) Change the name of the function __cs3_isr_interrupt_119() defined within\r
- * this file to be correct for the interrupt vector used by the timer peripheral.\r
- * The name of the function should contain the vector number, so by default vector\r
- * number 119 is being used.\r
- *\r
- * 3) Make sure the tick interrupt is cleared within the interrupt handler function.\r
- * Currently __cs3_isr_interrupt_119() clears the PIT0 interrupt.\r
- *\r
- * To change the spare interrupt source:\r
- *\r
- * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever\r
- * interrupt vector is to be used. Make sure you use a spare interrupt on interrupt\r
- * controller 0, otherwise the register used to request context switches will also\r
- * require modification. By default vector 16 is used which is free on most MCF52xxx\r
- * devices.\r
- *\r
- * 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h\r
- * to be correct for your chosen interrupt vector.\r
- *\r
- * 3) Change the name of the function __cs3_isr_interrupt_80() within portasm.S\r
- * to be correct for whichever vector number is being used. By default interrupt\r
- * controller 0 vector number 16 is used, which corresponds to vector number 80.\r
- */\r
-void vApplicationSetupInterrupts( void )\r
-{\r
-const unsigned short usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );\r
-\r
- /* Configure interrupt priority and level and unmask interrupt for PIT0. */\r
- MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );\r
- MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );\r
-\r
- /* Do the same for vector 16 (interrupt controller 0). I don't think the\r
- write to MCF_INTC0_IMRH is actually required here but is included for\r
- completeness. */\r
- MCF_INTC0_ICR16 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );\r
- MCF_INTC0_IMRH &= ~( MCF_INTC_IPRL_INT16 );\r
-\r
- /* Configure PIT0 to generate the RTOS tick. */\r
- MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;\r
- MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );\r
- MCF_PIT0_PMR = usCompareMatchValue;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void __attribute__ ((interrupt)) __cs3_isr_interrupt_119( void )\r
-{\r
-unsigned long ulSavedInterruptMask;\r
-\r
- /* Clear the PIT0 interrupt. */\r
- MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;\r
-\r
- /* Increment the RTOS tick. */\r
- ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
- if( xTaskIncrementTick() != pdFALSE )\r
- {\r
- taskYIELD();\r
- }\r
- portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );\r
-}\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#include "FreeRTOS.h"\r
-#include "IntQueueTimer.h"\r
-#include "IntQueue.h"\r
-\r
-#define timerINTERRUPT1_FREQUENCY ( 2000UL )\r
-#define timerINTERRUPT2_FREQUENCY ( 2001UL )\r
-#define timerPRESCALE_VALUE ( 2 )\r
-\r
-void vInitialiseTimerForIntQueueTest( void )\r
-{\r
-const unsigned short usCompareMatchValue1 = ( unsigned short ) ( ( configCPU_CLOCK_HZ / timerPRESCALE_VALUE ) / timerINTERRUPT1_FREQUENCY );\r
-const unsigned short usCompareMatchValue2 = ( unsigned short ) ( ( configCPU_CLOCK_HZ / timerPRESCALE_VALUE ) / timerINTERRUPT2_FREQUENCY );\r
-\r
- /* Configure interrupt priority and level and unmask interrupt. */\r
- MCF_INTC0_ICR56 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 1 ) << 3 );\r
- MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK56 );\r
-\r
- MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;\r
- MCF_PIT1_PCSR = ( MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );\r
- MCF_PIT1_PMR = usCompareMatchValue1;\r
-\r
- MCF_INTC0_ICR57 = ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 3 );\r
- MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK57 );\r
-\r
- MCF_PIT2_PCSR |= MCF_PIT_PCSR_PIF;\r
- MCF_PIT2_PCSR = ( MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );\r
- MCF_PIT2_PMR = usCompareMatchValue2;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void __attribute__ ((interrupt)) __cs3_isr_interrupt_120( void )\r
-{\r
- MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;\r
- portEND_SWITCHING_ISR( xFirstTimerHandler() );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void __attribute__ ((interrupt)) __cs3_isr_interrupt_121( void )\r
-{\r
- MCF_PIT2_PCSR |= MCF_PIT_PCSR_PIF;\r
- portEND_SWITCHING_ISR( xSecondTimerHandler() );\r
-}\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-#ifndef INT_QUEUE_TIMER_H\r
-#define INT_QUEUE_TIMER_H\r
-\r
-void vInitialiseTimerForIntQueueTest( void );\r
-portBASE_TYPE xTimer0Handler( void );\r
-portBASE_TYPE xTimer1Handler( void );\r
-\r
-#endif\r
-\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_H__\r
-#define __MCF5282_H__\r
-\r
-\r
-/********************************************************************/\r
-/*\r
- * The basic data types\r
- */\r
-\r
-typedef unsigned char uint8; /* 8 bits */\r
-typedef unsigned short int uint16; /* 16 bits */\r
-typedef unsigned long int uint32; /* 32 bits */\r
-\r
-typedef signed char int8; /* 8 bits */\r
-typedef signed short int int16; /* 16 bits */\r
-typedef signed long int int32; /* 32 bits */\r
-\r
-typedef volatile uint8 vuint8; /* 8 bits */\r
-typedef volatile uint16 vuint16; /* 16 bits */\r
-typedef volatile uint32 vuint32; /* 32 bits */\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#if 0\r
-#pragma define_section system ".system" far_absolute RW\r
-\r
-/***\r
- * MCF5282 Derivative Memory map definitions from linker command files:\r
- * __IPSBAR, __FLASHBAR, __FLASHBAR_SIZE, __RAMBAR, __RAMBAR_SIZE\r
- * linker symbols must be defined in the linker command file.\r
- */\r
-\r
-extern __declspec(system) uint8 __IPSBAR[];\r
-extern __declspec(system) uint8 __FLASHBAR[];\r
-extern __declspec(system) uint8 __FLASHBAR_SIZE[];\r
-extern __declspec(system) uint8 __RAMBAR[];\r
-extern __declspec(system) uint8 __RAMBAR_SIZE[];\r
-#endif\r
-\r
-#define __IPSBAR ((uint8*)0x40000000)\r
-\r
-#define IPSBAR_ADDRESS (uint32)__IPSBAR\r
-#define FLASHBAR_ADDRESS (uint32)__FLASHBAR\r
-#define FLASHBAR_SIZE (uint32)__FLASHBAR_SIZE\r
-#define RAMBAR_ADDRESS (uint32)__RAMBAR\r
-#define RAMBAR_SIZE (uint32)__RAMBAR_SIZE\r
-\r
-\r
-#include "MCF5282_SCM.h"\r
-#include "MCF5282_SDRAMC.h"\r
-#include "MCF5282_CS.h"\r
-#include "MCF5282_DMA.h"\r
-#include "MCF5282_UART.h"\r
-#include "MCF5282_I2C.h"\r
-#include "MCF5282_QSPI.h"\r
-#include "MCF5282_DTIM.h"\r
-#include "MCF5282_INTC.h"\r
-#include "MCF5282_GIACR.h"\r
-#include "MCF5282_FEC.h"\r
-#include "MCF5282_GPIO.h"\r
-#include "MCF5282_PAD.h"\r
-#include "MCF5282_RCM.h"\r
-#include "MCF5282_PMM.h"\r
-#include "MCF5282_CCM.h"\r
-#include "MCF5282_CLOCK.h"\r
-#include "MCF5282_EPORT.h"\r
-#include "MCF5282_WTM.h"\r
-#include "MCF5282_PIT.h"\r
-#include "MCF5282_QADC.h"\r
-#include "MCF5282_GPTA.h"\r
-#include "MCF5282_GPTB.h"\r
-#include "MCF5282_FlexCAN.h"\r
-#include "MCF5282_CFM.h"\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#define MCF5XXX_CACR_CENB (0x80000000)\r
-#define MCF5XXX_CACR_CPDI (0x10000000)\r
-#define MCF5XXX_CACR_CPD (0x10000000)\r
-#define MCF5XXX_CACR_CFRZ (0x08000000)\r
-#define MCF5XXX_CACR_CINV (0x01000000)\r
-#define MCF5XXX_CACR_DIDI (0x00800000)\r
-#define MCF5XXX_CACR_DISD (0x00400000)\r
-#define MCF5XXX_CACR_INVI (0x00200000)\r
-#define MCF5XXX_CACR_INVD (0x00100000)\r
-#define MCF5XXX_CACR_CEIB (0x00000400)\r
-#define MCF5XXX_CACR_DCM_WR (0x00000000)\r
-#define MCF5XXX_CACR_DCM_CB (0x00000100)\r
-#define MCF5XXX_CACR_DCM_IP (0x00000200)\r
-#define MCF5XXX_CACR_DCM (0x00000200)\r
-#define MCF5XXX_CACR_DCM_II (0x00000300)\r
-#define MCF5XXX_CACR_DBWE (0x00000100)\r
-#define MCF5XXX_CACR_DWP (0x00000020)\r
-#define MCF5XXX_CACR_EUST (0x00000010)\r
-#define MCF5XXX_CACR_CLNF_00 (0x00000000)\r
-#define MCF5XXX_CACR_CLNF_01 (0x00000002)\r
-#define MCF5XXX_CACR_CLNF_10 (0x00000004)\r
-#define MCF5XXX_CACR_CLNF_11 (0x00000006)\r
-\r
-#endif /* __MCF5282_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_CCM_H__\r
-#define __MCF5282_CCM_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Chip Configuration Module (CCM)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_CCM_CCR (*(vuint16*)(&__IPSBAR[0x110004]))\r
-#define MCF_CCM_RCON (*(vuint16*)(&__IPSBAR[0x110008]))\r
-#define MCF_CCM_CIR (*(vuint16*)(&__IPSBAR[0x11000A]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_CCM_CCR */\r
-#define MCF_CCM_CCR_BMT(x) (((x)&0x7)<<0)\r
-#define MCF_CCM_CCR_BMT_65536 (0)\r
-#define MCF_CCM_CCR_BMT_32768 (0x1)\r
-#define MCF_CCM_CCR_BMT_16384 (0x2)\r
-#define MCF_CCM_CCR_BMT_8192 (0x3)\r
-#define MCF_CCM_CCR_BMT_4096 (0x4)\r
-#define MCF_CCM_CCR_BMT_2048 (0x5)\r
-#define MCF_CCM_CCR_BMT_1024 (0x6)\r
-#define MCF_CCM_CCR_BMT_512 (0x7)\r
-#define MCF_CCM_CCR_BME (0x8)\r
-#define MCF_CCM_CCR_PSTEN (0x20)\r
-#define MCF_CCM_CCR_SZEN (0x40)\r
-#define MCF_CCM_CCR_MODE(x) (((x)&0x7)<<0x8)\r
-#define MCF_CCM_CCR_LOAD (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_CCM_RCON */\r
-#define MCF_CCM_RCON_MODE (0x1)\r
-#define MCF_CCM_RCON_BOOTSEL (0x4)\r
-#define MCF_CCM_RCON_BOOTPS(x) (((x)&0x3)<<0x3)\r
-#define MCF_CCM_RCON_RLOAD (0x20)\r
-#define MCF_CCM_RCON_RPLLREF (0x40)\r
-#define MCF_CCM_RCON_RPLLSEL (0x80)\r
-#define MCF_CCM_RCON_RCSC(x) (((x)&0x3)<<0x8)\r
-\r
-/* Bit definitions and macros for MCF_CCM_CIR */\r
-#define MCF_CCM_CIR_PRN(x) (((x)&0xFF)<<0)\r
-#define MCF_CCM_CIR_PIN(x) (((x)&0xFF)<<0x8)\r
-\r
-\r
-#endif /* __MCF5282_CCM_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_CFM_H__\r
-#define __MCF5282_CFM_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* ColdFire Flash Module (CFM)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_CFM_CFMMCR (*(vuint16*)(&__IPSBAR[0x1D0000]))\r
-#define MCF_CFM_CFMCLKD (*(vuint8 *)(&__IPSBAR[0x1D0002]))\r
-#define MCF_CFM_CFMSEC (*(vuint32*)(&__IPSBAR[0x1D0008]))\r
-#define MCF_CFM_CFMPROT (*(vuint32*)(&__IPSBAR[0x1D0010]))\r
-#define MCF_CFM_CFMSACC (*(vuint32*)(&__IPSBAR[0x1D0014]))\r
-#define MCF_CFM_CFMDACC (*(vuint32*)(&__IPSBAR[0x1D0018]))\r
-#define MCF_CFM_CFMUSTAT (*(vuint8 *)(&__IPSBAR[0x1D0020]))\r
-#define MCF_CFM_CFMCMD (*(vuint8 *)(&__IPSBAR[0x1D0024]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMMCR */\r
-#define MCF_CFM_CFMMCR_KEYACC (0x20)\r
-#define MCF_CFM_CFMMCR_CCIE (0x40)\r
-#define MCF_CFM_CFMMCR_CBEIE (0x80)\r
-#define MCF_CFM_CFMMCR_AEIE (0x100)\r
-#define MCF_CFM_CFMMCR_PVIE (0x200)\r
-#define MCF_CFM_CFMMCR_LOCK (0x400)\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMCLKD */\r
-#define MCF_CFM_CFMCLKD_DIV(x) (((x)&0x3F)<<0)\r
-#define MCF_CFM_CFMCLKD_PRDIV8 (0x40)\r
-#define MCF_CFM_CFMCLKD_DIVLD (0x80)\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMSEC */\r
-#define MCF_CFM_CFMSEC_SEC(x) (((x)&0xFFFF)<<0)\r
-#define MCF_CFM_CFMSEC_SECSTAT (0x40000000)\r
-#define MCF_CFM_CFMSEC_KEYEN (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMPROT */\r
-#define MCF_CFM_CFMPROT_PROT(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMSACC */\r
-#define MCF_CFM_CFMSACC_SUPV(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMDACC */\r
-#define MCF_CFM_CFMDACC_DATA(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMUSTAT */\r
-#define MCF_CFM_CFMUSTAT_BLANK (0x4)\r
-#define MCF_CFM_CFMUSTAT_ACCERR (0x10)\r
-#define MCF_CFM_CFMUSTAT_PVIOL (0x20)\r
-#define MCF_CFM_CFMUSTAT_CCIF (0x40)\r
-#define MCF_CFM_CFMUSTAT_CBEIF (0x80)\r
-\r
-/* Bit definitions and macros for MCF_CFM_CFMCMD */\r
-#define MCF_CFM_CFMCMD_CMD(x) (((x)&0x7F)<<0)\r
-#define MCF_CFM_CFMCMD_BLANK_CHECK (0x5)\r
-#define MCF_CFM_CFMCMD_PAGE_ERASE_VERIFY (0x6)\r
-#define MCF_CFM_CFMCMD_WORD_PROGRAM (0x20)\r
-#define MCF_CFM_CFMCMD_PAGE_ERASE (0x40)\r
-#define MCF_CFM_CFMCMD_MASS_ERASE (0x41)\r
-\r
-\r
-#endif /* __MCF5282_CFM_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_CLOCK_H__\r
-#define __MCF5282_CLOCK_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Clock Module (CLOCK)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_CLOCK_SYNCR (*(vuint16*)(&__IPSBAR[0x120000]))\r
-#define MCF_CLOCK_SYNSR (*(vuint8 *)(&__IPSBAR[0x120002]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_CLOCK_SYNCR */\r
-#define MCF_CLOCK_SYNCR_STPMD0 (0x4)\r
-#define MCF_CLOCK_SYNCR_STPMD1 (0x8)\r
-#define MCF_CLOCK_SYNCR_FWKUP (0x20)\r
-#define MCF_CLOCK_SYNCR_DISCLK (0x40)\r
-#define MCF_CLOCK_SYNCR_LOCEN (0x80)\r
-#define MCF_CLOCK_SYNCR_RFD(x) (((x)&0x7)<<0x8)\r
-#define MCF_CLOCK_SYNCR_LOCRE (0x800)\r
-#define MCF_CLOCK_SYNCR_MFD(x) (((x)&0x7)<<0xC)\r
-#define MCF_CLOCK_SYNCR_LOLRE (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_CLOCK_SYNSR */\r
-#define MCF_CLOCK_SYNSR_LOCS (0x4)\r
-#define MCF_CLOCK_SYNSR_LOCK (0x8)\r
-#define MCF_CLOCK_SYNSR_LOCKS (0x10)\r
-#define MCF_CLOCK_SYNSR_PLLREF (0x20)\r
-#define MCF_CLOCK_SYNSR_PLLSEL (0x40)\r
-#define MCF_CLOCK_SYNSR_PLLMODE (0x80)\r
-\r
-\r
-#endif /* __MCF5282_CLOCK_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_CS_H__\r
-#define __MCF5282_CS_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Chip Select Module (CS)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_CS0_CSAR (*(vuint16*)(&__IPSBAR[0x80]))\r
-#define MCF_CS0_CSMR (*(vuint32*)(&__IPSBAR[0x84]))\r
-#define MCF_CS0_CSCR (*(vuint16*)(&__IPSBAR[0x8A]))\r
-\r
-#define MCF_CS1_CSAR (*(vuint16*)(&__IPSBAR[0x8C]))\r
-#define MCF_CS1_CSMR (*(vuint32*)(&__IPSBAR[0x90]))\r
-#define MCF_CS1_CSCR (*(vuint16*)(&__IPSBAR[0x96]))\r
-\r
-#define MCF_CS2_CSAR (*(vuint16*)(&__IPSBAR[0x98]))\r
-#define MCF_CS2_CSMR (*(vuint32*)(&__IPSBAR[0x9C]))\r
-#define MCF_CS2_CSCR (*(vuint16*)(&__IPSBAR[0xA2]))\r
-\r
-#define MCF_CS3_CSAR (*(vuint16*)(&__IPSBAR[0xA4]))\r
-#define MCF_CS3_CSMR (*(vuint32*)(&__IPSBAR[0xA8]))\r
-#define MCF_CS3_CSCR (*(vuint16*)(&__IPSBAR[0xAE]))\r
-\r
-#define MCF_CS4_CSAR (*(vuint16*)(&__IPSBAR[0xB0]))\r
-#define MCF_CS4_CSMR (*(vuint32*)(&__IPSBAR[0xB4]))\r
-#define MCF_CS4_CSCR (*(vuint16*)(&__IPSBAR[0xBA]))\r
-\r
-#define MCF_CS5_CSAR (*(vuint16*)(&__IPSBAR[0xBC]))\r
-#define MCF_CS5_CSMR (*(vuint32*)(&__IPSBAR[0xC0]))\r
-#define MCF_CS5_CSCR (*(vuint16*)(&__IPSBAR[0xC6]))\r
-\r
-#define MCF_CS6_CSAR (*(vuint16*)(&__IPSBAR[0xC8]))\r
-#define MCF_CS6_CSMR (*(vuint32*)(&__IPSBAR[0xCC]))\r
-#define MCF_CS6_CSCR (*(vuint16*)(&__IPSBAR[0xD2]))\r
-\r
-#define MCF_CS_CSAR(x) (*(vuint16*)(&__IPSBAR[0x80 + ((x)*0xC)]))\r
-#define MCF_CS_CSMR(x) (*(vuint32*)(&__IPSBAR[0x84 + ((x)*0xC)]))\r
-#define MCF_CS_CSCR(x) (*(vuint16*)(&__IPSBAR[0x8A + ((x)*0xC)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_CS_CSAR */\r
-#define MCF_CS_CSAR_BA(x) (vuint16)(((x)&0xFFFF0000)>>0x10)\r
-\r
-/* Bit definitions and macros for MCF_CS_CSMR */\r
-#define MCF_CS_CSMR_V (0x1)\r
-#define MCF_CS_CSMR_UD (0x2)\r
-#define MCF_CS_CSMR_UC (0x4)\r
-#define MCF_CS_CSMR_SD (0x8)\r
-#define MCF_CS_CSMR_SC (0x10)\r
-#define MCF_CS_CSMR_CI (0x20)\r
-#define MCF_CS_CSMR_AM (0x40)\r
-#define MCF_CS_CSMR_WP (0x100)\r
-#define MCF_CS_CSMR_BAM(x) (((x)&0xFFFF)<<0x10)\r
-#define MCF_CS_CSMR_BAM_4G (0xFFFF0000)\r
-#define MCF_CS_CSMR_BAM_2G (0x7FFF0000)\r
-#define MCF_CS_CSMR_BAM_1G (0x3FFF0000)\r
-#define MCF_CS_CSMR_BAM_1024M (0x3FFF0000)\r
-#define MCF_CS_CSMR_BAM_512M (0x1FFF0000)\r
-#define MCF_CS_CSMR_BAM_256M (0xFFF0000)\r
-#define MCF_CS_CSMR_BAM_128M (0x7FF0000)\r
-#define MCF_CS_CSMR_BAM_64M (0x3FF0000)\r
-#define MCF_CS_CSMR_BAM_32M (0x1FF0000)\r
-#define MCF_CS_CSMR_BAM_16M (0xFF0000)\r
-#define MCF_CS_CSMR_BAM_8M (0x7F0000)\r
-#define MCF_CS_CSMR_BAM_4M (0x3F0000)\r
-#define MCF_CS_CSMR_BAM_2M (0x1F0000)\r
-#define MCF_CS_CSMR_BAM_1M (0xF0000)\r
-#define MCF_CS_CSMR_BAM_1024K (0xF0000)\r
-#define MCF_CS_CSMR_BAM_512K (0x70000)\r
-#define MCF_CS_CSMR_BAM_256K (0x30000)\r
-#define MCF_CS_CSMR_BAM_128K (0x10000)\r
-#define MCF_CS_CSMR_BAM_64K (0)\r
-\r
-/* Bit definitions and macros for MCF_CS_CSCR */\r
-#define MCF_CS_CSCR_BSTW (0x8)\r
-#define MCF_CS_CSCR_BSTR (0x10)\r
-#define MCF_CS_CSCR_BEM (0x20)\r
-#define MCF_CS_CSCR_PS(x) (((x)&0x3)<<0x6)\r
-#define MCF_CS_CSCR_PS_32 (0)\r
-#define MCF_CS_CSCR_PS_8 (0x40)\r
-#define MCF_CS_CSCR_PS_16 (0x80)\r
-#define MCF_CS_CSCR_AA (0x100)\r
-#define MCF_CS_CSCR_WS(x) (((x)&0xF)<<0xA)\r
-\r
-\r
-#endif /* __MCF5282_CS_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_DMA_H__\r
-#define __MCF5282_DMA_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* DMA Controller (DMA)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_DMA0_SAR (*(vuint32*)(&__IPSBAR[0x100]))\r
-#define MCF_DMA0_DAR (*(vuint32*)(&__IPSBAR[0x104]))\r
-#define MCF_DMA0_DCR (*(vuint32*)(&__IPSBAR[0x108]))\r
-#define MCF_DMA0_BCR (*(vuint32*)(&__IPSBAR[0x10C]))\r
-#define MCF_DMA0_DSR (*(vuint8 *)(&__IPSBAR[0x110]))\r
-\r
-#define MCF_DMA1_SAR (*(vuint32*)(&__IPSBAR[0x140]))\r
-#define MCF_DMA1_DAR (*(vuint32*)(&__IPSBAR[0x144]))\r
-#define MCF_DMA1_DCR (*(vuint32*)(&__IPSBAR[0x148]))\r
-#define MCF_DMA1_BCR (*(vuint32*)(&__IPSBAR[0x14C]))\r
-#define MCF_DMA1_DSR (*(vuint8 *)(&__IPSBAR[0x150]))\r
-\r
-#define MCF_DMA2_SAR (*(vuint32*)(&__IPSBAR[0x180]))\r
-#define MCF_DMA2_DAR (*(vuint32*)(&__IPSBAR[0x184]))\r
-#define MCF_DMA2_DCR (*(vuint32*)(&__IPSBAR[0x188]))\r
-#define MCF_DMA2_BCR (*(vuint32*)(&__IPSBAR[0x18C]))\r
-#define MCF_DMA2_DSR (*(vuint8 *)(&__IPSBAR[0x190]))\r
-\r
-#define MCF_DMA3_SAR (*(vuint32*)(&__IPSBAR[0x1C0]))\r
-#define MCF_DMA3_DAR (*(vuint32*)(&__IPSBAR[0x1C4]))\r
-#define MCF_DMA3_DCR (*(vuint32*)(&__IPSBAR[0x1C8]))\r
-#define MCF_DMA3_BCR (*(vuint32*)(&__IPSBAR[0x1CC]))\r
-#define MCF_DMA3_DSR (*(vuint8 *)(&__IPSBAR[0x1D0]))\r
-\r
-#define MCF_DMA_SAR(x) (*(vuint32*)(&__IPSBAR[0x100 + ((x)*0x40)]))\r
-#define MCF_DMA_DAR(x) (*(vuint32*)(&__IPSBAR[0x104 + ((x)*0x40)]))\r
-#define MCF_DMA_DCR(x) (*(vuint32*)(&__IPSBAR[0x108 + ((x)*0x40)]))\r
-#define MCF_DMA_BCR(x) (*(vuint32*)(&__IPSBAR[0x10C + ((x)*0x40)]))\r
-#define MCF_DMA_DSR(x) (*(vuint8 *)(&__IPSBAR[0x110 + ((x)*0x40)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_DMA_SAR */\r
-#define MCF_DMA_SAR_SAR(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_DMA_DAR */\r
-#define MCF_DMA_DAR_DAR(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_DMA_DCR */\r
-#define MCF_DMA_DCR_AT (0x8000)\r
-#define MCF_DMA_DCR_START (0x10000)\r
-#define MCF_DMA_DCR_DSIZE(x) (((x)&0x3)<<0x11)\r
-#define MCF_DMA_DCR_DSIZE_LONG (0)\r
-#define MCF_DMA_DCR_DSIZE_BYTE (0x1)\r
-#define MCF_DMA_DCR_DSIZE_WORD (0x2)\r
-#define MCF_DMA_DCR_DSIZE_LINE (0x3)\r
-#define MCF_DMA_DCR_DINC (0x80000)\r
-#define MCF_DMA_DCR_SSIZE(x) (((x)&0x3)<<0x14)\r
-#define MCF_DMA_DCR_SSIZE_LONG (0)\r
-#define MCF_DMA_DCR_SSIZE_BYTE (0x1)\r
-#define MCF_DMA_DCR_SSIZE_WORD (0x2)\r
-#define MCF_DMA_DCR_SSIZE_LINE (0x3)\r
-#define MCF_DMA_DCR_SINC (0x400000)\r
-#define MCF_DMA_DCR_BWC(x) (((x)&0x7)<<0x19)\r
-#define MCF_DMA_DCR_AA (0x10000000)\r
-#define MCF_DMA_DCR_CS (0x20000000)\r
-#define MCF_DMA_DCR_EEXT (0x40000000)\r
-#define MCF_DMA_DCR_INT (0x80000000)\r
-#define MCF_DMA_DCR_BWC_DMA (0)\r
-#define MCF_DMA_DCR_BWC_512 (0x2000000)\r
-#define MCF_DMA_DCR_BWC_1024 (0x4000000)\r
-#define MCF_DMA_DCR_BWC_2048 (0x6000000)\r
-#define MCF_DMA_DCR_BWC_4096 (0x8000000)\r
-#define MCF_DMA_DCR_BWC_8192 (0xA000000)\r
-#define MCF_DMA_DCR_BWC_16384 (0xC000000)\r
-#define MCF_DMA_DCR_BWC_32768 (0xE000000)\r
-\r
-/* Bit definitions and macros for MCF_DMA_BCR */\r
-#define MCF_DMA_BCR_BCR(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_DMA_DSR */\r
-#define MCF_DMA_DSR_DONE (0x1)\r
-#define MCF_DMA_DSR_BSY (0x2)\r
-#define MCF_DMA_DSR_REQ (0x4)\r
-#define MCF_DMA_DSR_BED (0x10)\r
-#define MCF_DMA_DSR_BES (0x20)\r
-#define MCF_DMA_DSR_CE (0x40)\r
-\r
-\r
-#endif /* __MCF5282_DMA_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_DTIM_H__\r
-#define __MCF5282_DTIM_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* DMA Timers (DTIM)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_DTIM0_DTMR (*(vuint16*)(&__IPSBAR[0x400]))\r
-#define MCF_DTIM0_DTXMR (*(vuint8 *)(&__IPSBAR[0x402]))\r
-#define MCF_DTIM0_DTER (*(vuint8 *)(&__IPSBAR[0x403]))\r
-#define MCF_DTIM0_DTRR (*(vuint32*)(&__IPSBAR[0x404]))\r
-#define MCF_DTIM0_DTCR (*(vuint32*)(&__IPSBAR[0x408]))\r
-#define MCF_DTIM0_DTCN (*(vuint32*)(&__IPSBAR[0x40C]))\r
-\r
-#define MCF_DTIM1_DTMR (*(vuint16*)(&__IPSBAR[0x440]))\r
-#define MCF_DTIM1_DTXMR (*(vuint8 *)(&__IPSBAR[0x442]))\r
-#define MCF_DTIM1_DTER (*(vuint8 *)(&__IPSBAR[0x443]))\r
-#define MCF_DTIM1_DTRR (*(vuint32*)(&__IPSBAR[0x444]))\r
-#define MCF_DTIM1_DTCR (*(vuint32*)(&__IPSBAR[0x448]))\r
-#define MCF_DTIM1_DTCN (*(vuint32*)(&__IPSBAR[0x44C]))\r
-\r
-#define MCF_DTIM2_DTMR (*(vuint16*)(&__IPSBAR[0x480]))\r
-#define MCF_DTIM2_DTXMR (*(vuint8 *)(&__IPSBAR[0x482]))\r
-#define MCF_DTIM2_DTER (*(vuint8 *)(&__IPSBAR[0x483]))\r
-#define MCF_DTIM2_DTRR (*(vuint32*)(&__IPSBAR[0x484]))\r
-#define MCF_DTIM2_DTCR (*(vuint32*)(&__IPSBAR[0x488]))\r
-#define MCF_DTIM2_DTCN (*(vuint32*)(&__IPSBAR[0x48C]))\r
-\r
-#define MCF_DTIM3_DTMR (*(vuint16*)(&__IPSBAR[0x4C0]))\r
-#define MCF_DTIM3_DTXMR (*(vuint8 *)(&__IPSBAR[0x4C2]))\r
-#define MCF_DTIM3_DTER (*(vuint8 *)(&__IPSBAR[0x4C3]))\r
-#define MCF_DTIM3_DTRR (*(vuint32*)(&__IPSBAR[0x4C4]))\r
-#define MCF_DTIM3_DTCR (*(vuint32*)(&__IPSBAR[0x4C8]))\r
-#define MCF_DTIM3_DTCN (*(vuint32*)(&__IPSBAR[0x4CC]))\r
-\r
-#define MCF_DTIM_DTMR(x) (*(vuint16*)(&__IPSBAR[0x400 + ((x)*0x40)]))\r
-#define MCF_DTIM_DTXMR(x) (*(vuint8 *)(&__IPSBAR[0x402 + ((x)*0x40)]))\r
-#define MCF_DTIM_DTER(x) (*(vuint8 *)(&__IPSBAR[0x403 + ((x)*0x40)]))\r
-#define MCF_DTIM_DTRR(x) (*(vuint32*)(&__IPSBAR[0x404 + ((x)*0x40)]))\r
-#define MCF_DTIM_DTCR(x) (*(vuint32*)(&__IPSBAR[0x408 + ((x)*0x40)]))\r
-#define MCF_DTIM_DTCN(x) (*(vuint32*)(&__IPSBAR[0x40C + ((x)*0x40)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_DTIM_DTMR */\r
-#define MCF_DTIM_DTMR_RST (0x1)\r
-#define MCF_DTIM_DTMR_CLK(x) (((x)&0x3)<<0x1)\r
-#define MCF_DTIM_DTMR_CLK_STOP (0)\r
-#define MCF_DTIM_DTMR_CLK_DIV1 (0x2)\r
-#define MCF_DTIM_DTMR_CLK_DIV16 (0x4)\r
-#define MCF_DTIM_DTMR_CLK_DTIN (0x6)\r
-#define MCF_DTIM_DTMR_FRR (0x8)\r
-#define MCF_DTIM_DTMR_ORRI (0x10)\r
-#define MCF_DTIM_DTMR_OM (0x20)\r
-#define MCF_DTIM_DTMR_CE(x) (((x)&0x3)<<0x6)\r
-#define MCF_DTIM_DTMR_CE_NONE (0)\r
-#define MCF_DTIM_DTMR_CE_RISE (0x40)\r
-#define MCF_DTIM_DTMR_CE_FALL (0x80)\r
-#define MCF_DTIM_DTMR_CE_ANY (0xC0)\r
-#define MCF_DTIM_DTMR_PS(x) (((x)&0xFF)<<0x8)\r
-\r
-/* Bit definitions and macros for MCF_DTIM_DTXMR */\r
-#define MCF_DTIM_DTXMR_MODE16 (0x1)\r
-#define MCF_DTIM_DTXMR_DMAEN (0x80)\r
-\r
-/* Bit definitions and macros for MCF_DTIM_DTER */\r
-#define MCF_DTIM_DTER_CAP (0x1)\r
-#define MCF_DTIM_DTER_REF (0x2)\r
-\r
-/* Bit definitions and macros for MCF_DTIM_DTRR */\r
-#define MCF_DTIM_DTRR_REF(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_DTIM_DTCR */\r
-#define MCF_DTIM_DTCR_CAP(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_DTIM_DTCN */\r
-#define MCF_DTIM_DTCN_CNT(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_DTIM_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_EPORT_H__\r
-#define __MCF5282_EPORT_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Edge Port Module (EPORT)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_EPORT_EPPAR (*(vuint16*)(&__IPSBAR[0x130000]))\r
-#define MCF_EPORT_EPDDR (*(vuint8 *)(&__IPSBAR[0x130002]))\r
-#define MCF_EPORT_EPIER (*(vuint8 *)(&__IPSBAR[0x130003]))\r
-#define MCF_EPORT_EPDR (*(vuint8 *)(&__IPSBAR[0x130004]))\r
-#define MCF_EPORT_EPPDR (*(vuint8 *)(&__IPSBAR[0x130005]))\r
-#define MCF_EPORT_EPFR (*(vuint8 *)(&__IPSBAR[0x130006]))\r
-\r
-\r
-\r
-/* Bit definitions and macros for MCF_EPORT_EPPAR */\r
-#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x3)<<0x2)\r
-#define MCF_EPORT_EPPAR_EPPA1_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_EPPA1_RISING (0x4)\r
-#define MCF_EPORT_EPPAR_EPPA1_FALLING (0x8)\r
-#define MCF_EPORT_EPPAR_EPPA1_BOTH (0xC)\r
-#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x3)<<0x4)\r
-#define MCF_EPORT_EPPAR_EPPA2_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_EPPA2_RISING (0x10)\r
-#define MCF_EPORT_EPPAR_EPPA2_FALLING (0x20)\r
-#define MCF_EPORT_EPPAR_EPPA2_BOTH (0x30)\r
-#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x3)<<0x6)\r
-#define MCF_EPORT_EPPAR_EPPA3_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_EPPA3_RISING (0x40)\r
-#define MCF_EPORT_EPPAR_EPPA3_FALLING (0x80)\r
-#define MCF_EPORT_EPPAR_EPPA3_BOTH (0xC0)\r
-#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x3)<<0x8)\r
-#define MCF_EPORT_EPPAR_EPPA4_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_EPPA4_RISING (0x100)\r
-#define MCF_EPORT_EPPAR_EPPA4_FALLING (0x200)\r
-#define MCF_EPORT_EPPAR_EPPA4_BOTH (0x300)\r
-#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x3)<<0xA)\r
-#define MCF_EPORT_EPPAR_EPPA5_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_EPPA5_RISING (0x400)\r
-#define MCF_EPORT_EPPAR_EPPA5_FALLING (0x800)\r
-#define MCF_EPORT_EPPAR_EPPA5_BOTH (0xC00)\r
-#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x3)<<0xC)\r
-#define MCF_EPORT_EPPAR_EPPA6_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_EPPA6_RISING (0x1000)\r
-#define MCF_EPORT_EPPAR_EPPA6_FALLING (0x2000)\r
-#define MCF_EPORT_EPPAR_EPPA6_BOTH (0x3000)\r
-#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x3)<<0xE)\r
-#define MCF_EPORT_EPPAR_EPPA7_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_EPPA7_RISING (0x4000)\r
-#define MCF_EPORT_EPPAR_EPPA7_FALLING (0x8000)\r
-#define MCF_EPORT_EPPAR_EPPA7_BOTH (0xC000)\r
-#define MCF_EPORT_EPPAR_LEVEL (0)\r
-#define MCF_EPORT_EPPAR_RISING (0x1)\r
-#define MCF_EPORT_EPPAR_FALLING (0x2)\r
-#define MCF_EPORT_EPPAR_BOTH (0x3)\r
-\r
-/* Bit definitions and macros for MCF_EPORT_EPDDR */\r
-#define MCF_EPORT_EPDDR_EPDD1 (0x2)\r
-#define MCF_EPORT_EPDDR_EPDD2 (0x4)\r
-#define MCF_EPORT_EPDDR_EPDD3 (0x8)\r
-#define MCF_EPORT_EPDDR_EPDD4 (0x10)\r
-#define MCF_EPORT_EPDDR_EPDD5 (0x20)\r
-#define MCF_EPORT_EPDDR_EPDD6 (0x40)\r
-#define MCF_EPORT_EPDDR_EPDD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_EPORT_EPIER */\r
-#define MCF_EPORT_EPIER_EPIE1 (0x2)\r
-#define MCF_EPORT_EPIER_EPIE2 (0x4)\r
-#define MCF_EPORT_EPIER_EPIE3 (0x8)\r
-#define MCF_EPORT_EPIER_EPIE4 (0x10)\r
-#define MCF_EPORT_EPIER_EPIE5 (0x20)\r
-#define MCF_EPORT_EPIER_EPIE6 (0x40)\r
-#define MCF_EPORT_EPIER_EPIE7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_EPORT_EPDR */\r
-#define MCF_EPORT_EPDR_EPD1 (0x2)\r
-#define MCF_EPORT_EPDR_EPD2 (0x4)\r
-#define MCF_EPORT_EPDR_EPD3 (0x8)\r
-#define MCF_EPORT_EPDR_EPD4 (0x10)\r
-#define MCF_EPORT_EPDR_EPD5 (0x20)\r
-#define MCF_EPORT_EPDR_EPD6 (0x40)\r
-#define MCF_EPORT_EPDR_EPD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_EPORT_EPPDR */\r
-#define MCF_EPORT_EPPDR_EPPD1 (0x2)\r
-#define MCF_EPORT_EPPDR_EPPD2 (0x4)\r
-#define MCF_EPORT_EPPDR_EPPD3 (0x8)\r
-#define MCF_EPORT_EPPDR_EPPD4 (0x10)\r
-#define MCF_EPORT_EPPDR_EPPD5 (0x20)\r
-#define MCF_EPORT_EPPDR_EPPD6 (0x40)\r
-#define MCF_EPORT_EPPDR_EPPD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_EPORT_EPFR */\r
-#define MCF_EPORT_EPFR_EPF1 (0x2)\r
-#define MCF_EPORT_EPFR_EPF2 (0x4)\r
-#define MCF_EPORT_EPFR_EPF3 (0x8)\r
-#define MCF_EPORT_EPFR_EPF4 (0x10)\r
-#define MCF_EPORT_EPFR_EPF5 (0x20)\r
-#define MCF_EPORT_EPFR_EPF6 (0x40)\r
-#define MCF_EPORT_EPFR_EPF7 (0x80)\r
-\r
-\r
-#endif /* __MCF5282_EPORT_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_FEC_H__\r
-#define __MCF5282_FEC_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Fast Ethernet Controller(FEC)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_FEC_EIR (*(vuint32*)(&__IPSBAR[0x1004]))\r
-#define MCF_FEC_EIMR (*(vuint32*)(&__IPSBAR[0x1008]))\r
-#define MCF_FEC_RDAR (*(vuint32*)(&__IPSBAR[0x1010]))\r
-#define MCF_FEC_TDAR (*(vuint32*)(&__IPSBAR[0x1014]))\r
-#define MCF_FEC_ECR (*(vuint32*)(&__IPSBAR[0x1024]))\r
-#define MCF_FEC_MMFR (*(vuint32*)(&__IPSBAR[0x1040]))\r
-#define MCF_FEC_MSCR (*(vuint32*)(&__IPSBAR[0x1044]))\r
-#define MCF_FEC_MIBC (*(vuint32*)(&__IPSBAR[0x1064]))\r
-#define MCF_FEC_RCR (*(vuint32*)(&__IPSBAR[0x1084]))\r
-#define MCF_FEC_TCR (*(vuint32*)(&__IPSBAR[0x10C4]))\r
-#define MCF_FEC_PALR (*(vuint32*)(&__IPSBAR[0x10E4]))\r
-#define MCF_FEC_PAUR (*(vuint32*)(&__IPSBAR[0x10E8]))\r
-#define MCF_FEC_OPD (*(vuint32*)(&__IPSBAR[0x10EC]))\r
-#define MCF_FEC_IAUR (*(vuint32*)(&__IPSBAR[0x1118]))\r
-#define MCF_FEC_IALR (*(vuint32*)(&__IPSBAR[0x111C]))\r
-#define MCF_FEC_GAUR (*(vuint32*)(&__IPSBAR[0x1120]))\r
-#define MCF_FEC_GALR (*(vuint32*)(&__IPSBAR[0x1124]))\r
-#define MCF_FEC_TFWR (*(vuint32*)(&__IPSBAR[0x1144]))\r
-#define MCF_FEC_FRBR (*(vuint32*)(&__IPSBAR[0x114C]))\r
-#define MCF_FEC_FRSR (*(vuint32*)(&__IPSBAR[0x1150]))\r
-#define MCF_FEC_ERDSR (*(vuint32*)(&__IPSBAR[0x1180]))\r
-#define MCF_FEC_ETSDR (*(vuint32*)(&__IPSBAR[0x1184]))\r
-#define MCF_FEC_EMRBR (*(vuint32*)(&__IPSBAR[0x1188]))\r
-#define MCF_FEC_RMON_T_DROP (*(vuint32*)(&__IPSBAR[0x1200]))\r
-#define MCF_FEC_RMON_T_PACKETS (*(vuint32*)(&__IPSBAR[0x1204]))\r
-#define MCF_FEC_RMON_T_BC_PKT (*(vuint32*)(&__IPSBAR[0x1208]))\r
-#define MCF_FEC_RMON_T_MC_PKT (*(vuint32*)(&__IPSBAR[0x120C]))\r
-#define MCF_FEC_RMON_T_CRC_ALIGN (*(vuint32*)(&__IPSBAR[0x1210]))\r
-#define MCF_FEC_RMON_T_UNDERSIZE (*(vuint32*)(&__IPSBAR[0x1214]))\r
-#define MCF_FEC_RMON_T_OVERSIZE (*(vuint32*)(&__IPSBAR[0x1218]))\r
-#define MCF_FEC_RMON_T_FRAG (*(vuint32*)(&__IPSBAR[0x121C]))\r
-#define MCF_FEC_RMON_T_JAB (*(vuint32*)(&__IPSBAR[0x1220]))\r
-#define MCF_FEC_RMON_T_COL (*(vuint32*)(&__IPSBAR[0x1224]))\r
-#define MCF_FEC_RMON_T_P64 (*(vuint32*)(&__IPSBAR[0x1228]))\r
-#define MCF_FEC_RMON_T_P65TO127 (*(vuint32*)(&__IPSBAR[0x122C]))\r
-#define MCF_FEC_RMON_T_P128TO255 (*(vuint32*)(&__IPSBAR[0x1230]))\r
-#define MCF_FEC_RMON_T_P256TO511 (*(vuint32*)(&__IPSBAR[0x1234]))\r
-#define MCF_FEC_RMON_T_P512TO1023 (*(vuint32*)(&__IPSBAR[0x1238]))\r
-#define MCF_FEC_RMON_T_P1024TO2047 (*(vuint32*)(&__IPSBAR[0x123C]))\r
-#define MCF_FEC_RMON_T_P_GTE2048 (*(vuint32*)(&__IPSBAR[0x1240]))\r
-#define MCF_FEC_RMON_T_OCTETS (*(vuint32*)(&__IPSBAR[0x1244]))\r
-#define MCF_FEC_IEEE_T_DROP (*(vuint32*)(&__IPSBAR[0x1248]))\r
-#define MCF_FEC_IEEE_T_FRAME_OK (*(vuint32*)(&__IPSBAR[0x124C]))\r
-#define MCF_FEC_IEEE_T_1COL (*(vuint32*)(&__IPSBAR[0x1250]))\r
-#define MCF_FEC_IEEE_T_MCOL (*(vuint32*)(&__IPSBAR[0x1254]))\r
-#define MCF_FEC_IEEE_T_DEF (*(vuint32*)(&__IPSBAR[0x1258]))\r
-#define MCF_FEC_IEEE_T_LCOL (*(vuint32*)(&__IPSBAR[0x125C]))\r
-#define MCF_FEC_IEEE_T_EXCOL (*(vuint32*)(&__IPSBAR[0x1260]))\r
-#define MCF_FEC_IEEE_T_MACERR (*(vuint32*)(&__IPSBAR[0x1264]))\r
-#define MCF_FEC_IEEE_T_CSERR (*(vuint32*)(&__IPSBAR[0x1268]))\r
-#define MCF_FEC_IEEE_T_SQE (*(vuint32*)(&__IPSBAR[0x126C]))\r
-#define MCF_FEC_IEEE_T_FDXFC (*(vuint32*)(&__IPSBAR[0x1270]))\r
-#define MCF_FEC_IEEE_T_OCTETS_OK (*(vuint32*)(&__IPSBAR[0x1274]))\r
-#define MCF_FEC_RMON_R_PACKETS (*(vuint32*)(&__IPSBAR[0x1284]))\r
-#define MCF_FEC_RMON_R_BC_PKT (*(vuint32*)(&__IPSBAR[0x1288]))\r
-#define MCF_FEC_RMON_R_MC_PKT (*(vuint32*)(&__IPSBAR[0x128C]))\r
-#define MCF_FEC_RMON_R_CRC_ALIGN (*(vuint32*)(&__IPSBAR[0x1290]))\r
-#define MCF_FEC_RMON_R_UNDERSIZE (*(vuint32*)(&__IPSBAR[0x1294]))\r
-#define MCF_FEC_RMON_R_OVERSIZE (*(vuint32*)(&__IPSBAR[0x1298]))\r
-#define MCF_FEC_RMON_R_FRAG (*(vuint32*)(&__IPSBAR[0x129C]))\r
-#define MCF_FEC_RMON_R_JAB (*(vuint32*)(&__IPSBAR[0x12A0]))\r
-#define MCF_FEC_RMON_R_RESVD_0 (*(vuint32*)(&__IPSBAR[0x12A4]))\r
-#define MCF_FEC_RMON_R_P64 (*(vuint32*)(&__IPSBAR[0x12A8]))\r
-#define MCF_FEC_RMON_R_P65TO127 (*(vuint32*)(&__IPSBAR[0x12AC]))\r
-#define MCF_FEC_RMON_R_P128TO255 (*(vuint32*)(&__IPSBAR[0x12B0]))\r
-#define MCF_FEC_RMON_R_P256TO511 (*(vuint32*)(&__IPSBAR[0x12B4]))\r
-#define MCF_FEC_RMON_R_P512TO1023 (*(vuint32*)(&__IPSBAR[0x12B8]))\r
-#define MCF_FEC_RMON_R_P1024TO2047 (*(vuint32*)(&__IPSBAR[0x12BC]))\r
-#define MCF_FEC_RMON_R_P_GTE2048 (*(vuint32*)(&__IPSBAR[0x12C0]))\r
-#define MCF_FEC_RMON_R_OCTETS (*(vuint32*)(&__IPSBAR[0x12C4]))\r
-#define MCF_FEC_IEEE_R_DROP (*(vuint32*)(&__IPSBAR[0x12C8]))\r
-#define MCF_FEC_IEEE_R_FRAME_OK (*(vuint32*)(&__IPSBAR[0x12CC]))\r
-#define MCF_FEC_IEEE_R_CRC (*(vuint32*)(&__IPSBAR[0x12D0]))\r
-#define MCF_FEC_IEEE_R_ALIGN (*(vuint32*)(&__IPSBAR[0x12D4]))\r
-#define MCF_FEC_IEEE_R_MACERR (*(vuint32*)(&__IPSBAR[0x12D8]))\r
-#define MCF_FEC_IEEE_R_FDXFC (*(vuint32*)(&__IPSBAR[0x12DC]))\r
-#define MCF_FEC_IEEE_R_OCTETS_OK (*(vuint32*)(&__IPSBAR[0x12E0]))\r
-\r
-\r
-\r
-/* Bit definitions and macros for MCF_FEC_EIR */\r
-#define MCF_FEC_EIR_UN (0x80000)\r
-#define MCF_FEC_EIR_RL (0x100000)\r
-#define MCF_FEC_EIR_LC (0x200000)\r
-#define MCF_FEC_EIR_EBERR (0x400000)\r
-#define MCF_FEC_EIR_MII (0x800000)\r
-#define MCF_FEC_EIR_RXB (0x1000000)\r
-#define MCF_FEC_EIR_RXF (0x2000000)\r
-#define MCF_FEC_EIR_TXB (0x4000000)\r
-#define MCF_FEC_EIR_TXF (0x8000000)\r
-#define MCF_FEC_EIR_GRA (0x10000000)\r
-#define MCF_FEC_EIR_BABT (0x20000000)\r
-#define MCF_FEC_EIR_BABR (0x40000000)\r
-#define MCF_FEC_EIR_HBERR (0x80000000)\r
-#define MCF_FEC_EIR_CLEAR_ALL (0xFFFFFFFF)\r
-\r
-/* Bit definitions and macros for MCF_FEC_EIMR */\r
-#define MCF_FEC_EIMR_UN (0x80000)\r
-#define MCF_FEC_EIMR_RL (0x100000)\r
-#define MCF_FEC_EIMR_LC (0x200000)\r
-#define MCF_FEC_EIMR_EBERR (0x400000)\r
-#define MCF_FEC_EIMR_MII (0x800000)\r
-#define MCF_FEC_EIMR_RXB (0x1000000)\r
-#define MCF_FEC_EIMR_RXF (0x2000000)\r
-#define MCF_FEC_EIMR_TXB (0x4000000)\r
-#define MCF_FEC_EIMR_TXF (0x8000000)\r
-#define MCF_FEC_EIMR_GRA (0x10000000)\r
-#define MCF_FEC_EIMR_BABT (0x20000000)\r
-#define MCF_FEC_EIMR_BABR (0x40000000)\r
-#define MCF_FEC_EIMR_HBERR (0x80000000)\r
-#define MCF_FEC_EIMR_MASK_ALL (0)\r
-#define MCF_FEC_EIMR_UNMASK_ALL (0xFFFFFFFF)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RDAR */\r
-#define MCF_FEC_RDAR_R_DES_ACTIVE (0x1000000)\r
-\r
-/* Bit definitions and macros for MCF_FEC_TDAR */\r
-#define MCF_FEC_TDAR_X_DES_ACTIVE (0x1000000)\r
-\r
-/* Bit definitions and macros for MCF_FEC_ECR */\r
-#define MCF_FEC_ECR_RESET (0x1)\r
-#define MCF_FEC_ECR_ETHER_EN (0x2)\r
-\r
-/* Bit definitions and macros for MCF_FEC_MMFR */\r
-#define MCF_FEC_MMFR_DATA(x) (((x)&0xFFFF)<<0)\r
-#define MCF_FEC_MMFR_TA(x) (((x)&0x3)<<0x10)\r
-#define MCF_FEC_MMFR_TA_10 (0x20000)\r
-#define MCF_FEC_MMFR_RA(x) (((x)&0x1F)<<0x12)\r
-#define MCF_FEC_MMFR_PA(x) (((x)&0x1F)<<0x17)\r
-#define MCF_FEC_MMFR_OP(x) (((x)&0x3)<<0x1C)\r
-#define MCF_FEC_MMFR_OP_READ (0x20000000)\r
-#define MCF_FEC_MMFR_OP_WRITE (0x10000000)\r
-#define MCF_FEC_MMFR_ST(x) (((x)&0x3)<<0x1E)\r
-#define MCF_FEC_MMFR_ST_01 (0x40000000)\r
-\r
-/* Bit definitions and macros for MCF_FEC_MSCR */\r
-#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x3F)<<0x1)\r
-#define MCF_FEC_MSCR_DIS_PREAMBLE (0x80)\r
-\r
-/* Bit definitions and macros for MCF_FEC_MIBC */\r
-#define MCF_FEC_MIBC_MIB_IDLE (0x40000000)\r
-#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RCR */\r
-#define MCF_FEC_RCR_LOOP (0x1)\r
-#define MCF_FEC_RCR_DRT (0x2)\r
-#define MCF_FEC_RCR_MII_MODE (0x4)\r
-#define MCF_FEC_RCR_PROM (0x8)\r
-#define MCF_FEC_RCR_BC_REJ (0x10)\r
-#define MCF_FEC_RCR_FCE (0x20)\r
-#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x7FF)<<0x10)\r
-\r
-/* Bit definitions and macros for MCF_FEC_TCR */\r
-#define MCF_FEC_TCR_GTS (0x1)\r
-#define MCF_FEC_TCR_HBC (0x2)\r
-#define MCF_FEC_TCR_FDEN (0x4)\r
-#define MCF_FEC_TCR_TFC_PAUSE (0x8)\r
-#define MCF_FEC_TCR_RFC_PAUSE (0x10)\r
-\r
-/* Bit definitions and macros for MCF_FEC_PALR */\r
-#define MCF_FEC_PALR_PADDR1(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_PAUR */\r
-#define MCF_FEC_PAUR_TYPE(x) (((x)&0xFFFF)<<0)\r
-#define MCF_FEC_PAUR_PADDR2(x) (((x)&0xFFFF)<<0x10)\r
-\r
-/* Bit definitions and macros for MCF_FEC_OPD */\r
-#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0xFFFF)<<0)\r
-#define MCF_FEC_OPD_OPCODE(x) (((x)&0xFFFF)<<0x10)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IAUR */\r
-#define MCF_FEC_IAUR_IADDR1(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IALR */\r
-#define MCF_FEC_IALR_IADDR2(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_GAUR */\r
-#define MCF_FEC_GAUR_GADDR1(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_GALR */\r
-#define MCF_FEC_GALR_GADDR2(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_TFWR */\r
-#define MCF_FEC_TFWR_X_WMRK(x) (((x)&0x3)<<0)\r
-#define MCF_FEC_TFWR_X_WMRK_64 (0)\r
-#define MCF_FEC_TFWR_X_WMRK_128 (0x2)\r
-#define MCF_FEC_TFWR_X_WMRK_192 (0x3)\r
-\r
-/* Bit definitions and macros for MCF_FEC_FRBR */\r
-#define MCF_FEC_FRBR_R_BOUND(x) (((x)&0xFF)<<0x2)\r
-\r
-/* Bit definitions and macros for MCF_FEC_FRSR */\r
-#define MCF_FEC_FRSR_R_FSTART(x) (((x)&0xFF)<<0x2)\r
-\r
-/* Bit definitions and macros for MCF_FEC_ERDSR */\r
-#define MCF_FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<0x2)\r
-\r
-/* Bit definitions and macros for MCF_FEC_ETSDR */\r
-#define MCF_FEC_ETSDR_X_DES_START(x) (((x)&0x3FFFFFFF)<<0x2)\r
-\r
-/* Bit definitions and macros for MCF_FEC_EMRBR */\r
-#define MCF_FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x7F)<<0x4)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_DROP */\r
-#define MCF_FEC_RMON_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_PACKETS */\r
-#define MCF_FEC_RMON_T_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_BC_PKT */\r
-#define MCF_FEC_RMON_T_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_MC_PKT */\r
-#define MCF_FEC_RMON_T_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_CRC_ALIGN */\r
-#define MCF_FEC_RMON_T_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_UNDERSIZE */\r
-#define MCF_FEC_RMON_T_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_OVERSIZE */\r
-#define MCF_FEC_RMON_T_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_FRAG */\r
-#define MCF_FEC_RMON_T_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_JAB */\r
-#define MCF_FEC_RMON_T_JAB_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_COL */\r
-#define MCF_FEC_RMON_T_COL_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_P64 */\r
-#define MCF_FEC_RMON_T_P64_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_P65TO127 */\r
-#define MCF_FEC_RMON_T_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_P128TO255 */\r
-#define MCF_FEC_RMON_T_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_P256TO511 */\r
-#define MCF_FEC_RMON_T_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_P512TO1023 */\r
-#define MCF_FEC_RMON_T_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_P1024TO2047 */\r
-#define MCF_FEC_RMON_T_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_P_GTE2048 */\r
-#define MCF_FEC_RMON_T_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_T_OCTETS */\r
-#define MCF_FEC_RMON_T_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_DROP */\r
-#define MCF_FEC_IEEE_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_FRAME_OK */\r
-#define MCF_FEC_IEEE_T_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_1COL */\r
-#define MCF_FEC_IEEE_T_1COL_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_MCOL */\r
-#define MCF_FEC_IEEE_T_MCOL_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_DEF */\r
-#define MCF_FEC_IEEE_T_DEF_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_LCOL */\r
-#define MCF_FEC_IEEE_T_LCOL_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_EXCOL */\r
-#define MCF_FEC_IEEE_T_EXCOL_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_MACERR */\r
-#define MCF_FEC_IEEE_T_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_CSERR */\r
-#define MCF_FEC_IEEE_T_CSERR_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_SQE */\r
-#define MCF_FEC_IEEE_T_SQE_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_FDXFC */\r
-#define MCF_FEC_IEEE_T_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_T_OCTETS_OK */\r
-#define MCF_FEC_IEEE_T_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_PACKETS */\r
-#define MCF_FEC_RMON_R_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_BC_PKT */\r
-#define MCF_FEC_RMON_R_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_MC_PKT */\r
-#define MCF_FEC_RMON_R_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_CRC_ALIGN */\r
-#define MCF_FEC_RMON_R_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_UNDERSIZE */\r
-#define MCF_FEC_RMON_R_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_OVERSIZE */\r
-#define MCF_FEC_RMON_R_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_FRAG */\r
-#define MCF_FEC_RMON_R_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_JAB */\r
-#define MCF_FEC_RMON_R_JAB_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_RESVD_0 */\r
-#define MCF_FEC_RMON_R_RESVD_0_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_P64 */\r
-#define MCF_FEC_RMON_R_P64_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_P65TO127 */\r
-#define MCF_FEC_RMON_R_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_P128TO255 */\r
-#define MCF_FEC_RMON_R_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_P256TO511 */\r
-#define MCF_FEC_RMON_R_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_P512TO1023 */\r
-#define MCF_FEC_RMON_R_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_P1024TO2047 */\r
-#define MCF_FEC_RMON_R_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_P_GTE2048 */\r
-#define MCF_FEC_RMON_R_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_RMON_R_OCTETS */\r
-#define MCF_FEC_RMON_R_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_R_DROP */\r
-#define MCF_FEC_IEEE_R_DROP_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_R_FRAME_OK */\r
-#define MCF_FEC_IEEE_R_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_R_CRC */\r
-#define MCF_FEC_IEEE_R_CRC_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_R_ALIGN */\r
-#define MCF_FEC_IEEE_R_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_R_MACERR */\r
-#define MCF_FEC_IEEE_R_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_R_FDXFC */\r
-#define MCF_FEC_IEEE_R_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FEC_IEEE_R_OCTETS_OK */\r
-#define MCF_FEC_IEEE_R_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_FEC_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_FlexCAN_H__\r
-#define __MCF5282_FlexCAN_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Flex Controller Area Network (FlexCAN)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_FlexCAN_CANMCR (*(vuint16*)(&__IPSBAR[0x1C0000]))\r
-#define MCF_FlexCAN_CANCTRL0 (*(vuint8 *)(&__IPSBAR[0x1C0006]))\r
-#define MCF_FlexCAN_CANCTRL1 (*(vuint8 *)(&__IPSBAR[0x1C0007]))\r
-#define MCF_FlexCAN_PRESDIV (*(vuint8 *)(&__IPSBAR[0x1C0008]))\r
-#define MCF_FlexCAN_CANCTRL2 (*(vuint8 *)(&__IPSBAR[0x1C0009]))\r
-#define MCF_FlexCAN_TIMER (*(vuint16*)(&__IPSBAR[0x1C000A]))\r
-#define MCF_FlexCAN_RXGMASK (*(vuint32*)(&__IPSBAR[0x1C0010]))\r
-#define MCF_FlexCAN_RX14MASK (*(vuint32*)(&__IPSBAR[0x1C0014]))\r
-#define MCF_FlexCAN_RX15MASK (*(vuint32*)(&__IPSBAR[0x1C0018]))\r
-#define MCF_FlexCAN_ESTAT (*(vuint16*)(&__IPSBAR[0x1C0020]))\r
-#define MCF_FlexCAN_IMASK (*(vuint16*)(&__IPSBAR[0x1C0022]))\r
-#define MCF_FlexCAN_IFLAG (*(vuint16*)(&__IPSBAR[0x1C0024]))\r
-#define MCF_FlexCAN_RXECTR (*(vuint8 *)(&__IPSBAR[0x1C0026]))\r
-#define MCF_FlexCAN_TXECTR (*(vuint8 *)(&__IPSBAR[0x1C0028]))\r
-\r
-\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_CANMCR */\r
-#define MCF_FlexCAN_CANMCR_STOPACK (0x10)\r
-#define MCF_FlexCAN_CANMCR_APS (0x20)\r
-#define MCF_FlexCAN_CANMCR_SELFWAKE (0x40)\r
-#define MCF_FlexCAN_CANMCR_SUPV (0x80)\r
-#define MCF_FlexCAN_CANMCR_FRZACK (0x100)\r
-#define MCF_FlexCAN_CANMCR_SOFTRST (0x200)\r
-#define MCF_FlexCAN_CANMCR_WAKEMSK (0x400)\r
-#define MCF_FlexCAN_CANMCR_NOTRDY (0x800)\r
-#define MCF_FlexCAN_CANMCR_HALT (0x1000)\r
-#define MCF_FlexCAN_CANMCR_FRZ (0x4000)\r
-#define MCF_FlexCAN_CANMCR_STOP (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_CANCTRL0 */\r
-#define MCF_FlexCAN_CANCTRL0_TXMODE(x) (((x)&0x3)<<0)\r
-#define MCF_FlexCAN_CANCTRL0_RXMODE (0x4)\r
-#define MCF_FlexCAN_CANCTRL0_ERRMSK (0x40)\r
-#define MCF_FlexCAN_CANCTRL0_BOFFMSK (0x80)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_CANCTRL1 */\r
-#define MCF_FlexCAN_CANCTRL1_PROPSEG(x) (((x)&0x7)<<0)\r
-#define MCF_FlexCAN_CANCTRL1_LOM (0x8)\r
-#define MCF_FlexCAN_CANCTRL1_LBUF (0x10)\r
-#define MCF_FlexCAN_CANCTRL1_TSYNC (0x20)\r
-#define MCF_FlexCAN_CANCTRL1_SAMP (0x80)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_PRESDIV */\r
-#define MCF_FlexCAN_PRESDIV_PRES_DIV(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_CANCTRL2 */\r
-#define MCF_FlexCAN_CANCTRL2_PSEG2(x) (((x)&0x7)<<0)\r
-#define MCF_FlexCAN_CANCTRL2_PSEG1(x) (((x)&0x7)<<0x3)\r
-#define MCF_FlexCAN_CANCTRL2_RJW(x) (((x)&0x3)<<0x6)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_TIMER */\r
-#define MCF_FlexCAN_TIMER_TIMER(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_RXGMASK */\r
-#define MCF_FlexCAN_RXGMASK_MID(x) (((x)&0x7FFFFFFF)<<0x1)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_RX14MASK */\r
-#define MCF_FlexCAN_RX14MASK_MID(x) (((x)&0x7FFFFFFF)<<0x1)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_RX15MASK */\r
-#define MCF_FlexCAN_RX15MASK_MID(x) (((x)&0x7FFFFFFF)<<0x1)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_ESTAT */\r
-#define MCF_FlexCAN_ESTAT_WAKEINT (0x1)\r
-#define MCF_FlexCAN_ESTAT_BOFFINT (0x2)\r
-#define MCF_FlexCAN_ESTAT_ERRINT (0x4)\r
-#define MCF_FlexCAN_ESTAT_FCS(x) (((x)&0x3)<<0x4)\r
-#define MCF_FlexCAN_ESTAT_FCS_ACTIVE (0)\r
-#define MCF_FlexCAN_ESTAT_FCS_PASSIVE (0x10)\r
-#define MCF_FlexCAN_ESTAT_TXRX (0x40)\r
-#define MCF_FlexCAN_ESTAT_IDLE (0x80)\r
-#define MCF_FlexCAN_ESTAT_RXWARN (0x100)\r
-#define MCF_FlexCAN_ESTAT_TXWARN (0x200)\r
-#define MCF_FlexCAN_ESTAT_STUFFERR (0x400)\r
-#define MCF_FlexCAN_ESTAT_FORMERR (0x800)\r
-#define MCF_FlexCAN_ESTAT_CRCERR (0x1000)\r
-#define MCF_FlexCAN_ESTAT_ACKERR (0x2000)\r
-#define MCF_FlexCAN_ESTAT_BITERR(x) (((x)&0x3)<<0xE)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_IMASK */\r
-#define MCF_FlexCAN_IMASK_BUF0M (0x1)\r
-#define MCF_FlexCAN_IMASK_BUF1M (0x2)\r
-#define MCF_FlexCAN_IMASK_BUF2M (0x4)\r
-#define MCF_FlexCAN_IMASK_BUF3M (0x8)\r
-#define MCF_FlexCAN_IMASK_BUF4M (0x10)\r
-#define MCF_FlexCAN_IMASK_BUF5M (0x20)\r
-#define MCF_FlexCAN_IMASK_BUF6M (0x40)\r
-#define MCF_FlexCAN_IMASK_BUF7M (0x80)\r
-#define MCF_FlexCAN_IMASK_BUF8M (0x100)\r
-#define MCF_FlexCAN_IMASK_BUF9M (0x200)\r
-#define MCF_FlexCAN_IMASK_BUF10M (0x400)\r
-#define MCF_FlexCAN_IMASK_BUF11M (0x800)\r
-#define MCF_FlexCAN_IMASK_BUF12M (0x1000)\r
-#define MCF_FlexCAN_IMASK_BUF13M (0x2000)\r
-#define MCF_FlexCAN_IMASK_BUF14M (0x4000)\r
-#define MCF_FlexCAN_IMASK_BUF15M (0x8000)\r
-#define MCF_FlexCAN_IMASK_BUF(x) (0x1<<(x))\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_IFLAG */\r
-#define MCF_FlexCAN_IFLAG_BUF0I (0x1)\r
-#define MCF_FlexCAN_IFLAG_BUF1I (0x2)\r
-#define MCF_FlexCAN_IFLAG_BUF2I (0x4)\r
-#define MCF_FlexCAN_IFLAG_BUF3I (0x8)\r
-#define MCF_FlexCAN_IFLAG_BUF4I (0x10)\r
-#define MCF_FlexCAN_IFLAG_BUF5I (0x20)\r
-#define MCF_FlexCAN_IFLAG_BUF6I (0x40)\r
-#define MCF_FlexCAN_IFLAG_BUF7I (0x80)\r
-#define MCF_FlexCAN_IFLAG_BUF8I (0x100)\r
-#define MCF_FlexCAN_IFLAG_BUF9I (0x200)\r
-#define MCF_FlexCAN_IFLAG_BUF10I (0x400)\r
-#define MCF_FlexCAN_IFLAG_BUF11I (0x800)\r
-#define MCF_FlexCAN_IFLAG_BUF12I (0x1000)\r
-#define MCF_FlexCAN_IFLAG_BUF13I (0x2000)\r
-#define MCF_FlexCAN_IFLAG_BUF14I (0x4000)\r
-#define MCF_FlexCAN_IFLAG_BUF15I (0x8000)\r
-#define MCF_FlexCAN_IFLAG_BUF(x) (0x1<<(x))\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_RXECTR */\r
-#define MCF_FlexCAN_RXECTR_RXECTR(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_FlexCAN_TXECTR */\r
-#define MCF_FlexCAN_TXECTR_TXECTR(x) (((x)&0xFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_FlexCAN_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_GIACR_H__\r
-#define __MCF5282_GIACR_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Global Interrupt Acknowledge Control Registers Module (GIACR)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_GIACR_GSWIACK (*(vuint8 *)(&__IPSBAR[0xFE0]))\r
-#define MCF_GIACR_GL1IACK (*(vuint8 *)(&__IPSBAR[0xFE4]))\r
-#define MCF_GIACR_GL2IACK (*(vuint8 *)(&__IPSBAR[0xFE8]))\r
-#define MCF_GIACR_GL3IACK (*(vuint8 *)(&__IPSBAR[0xFEC]))\r
-#define MCF_GIACR_GL4IACK (*(vuint8 *)(&__IPSBAR[0xFF0]))\r
-#define MCF_GIACR_GL5IACK (*(vuint8 *)(&__IPSBAR[0xFF4]))\r
-#define MCF_GIACR_GL6IACK (*(vuint8 *)(&__IPSBAR[0xFF8]))\r
-#define MCF_GIACR_GL7IACK (*(vuint8 *)(&__IPSBAR[0xFFC]))\r
-#define MCF_GIACR_GLIACK(x) (*(vuint8 *)(&__IPSBAR[0xFE4 + ((x-1)*0x4)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_GIACR_GSWIACK */\r
-#define MCF_GIACR_GSWIACK_VECTOR(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_GIACR_GLIACK */\r
-#define MCF_GIACR_GLIACK_VECTOR(x) (((x)&0xFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_GIACR_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_GPIO_H__\r
-#define __MCF5282_GPIO_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* General Purpose I/O (GPIO)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_GPIO_PORTA (*(vuint8 *)(&__IPSBAR[0x100000]))\r
-#define MCF_GPIO_DDRA (*(vuint8 *)(&__IPSBAR[0x100014]))\r
-#define MCF_GPIO_SETA (*(vuint8 *)(&__IPSBAR[0x100028]))\r
-#define MCF_GPIO_CLRA (*(vuint8 *)(&__IPSBAR[0x10003C]))\r
-\r
-#define MCF_GPIO_PORTB (*(vuint8 *)(&__IPSBAR[0x100001]))\r
-#define MCF_GPIO_DDRB (*(vuint8 *)(&__IPSBAR[0x100015]))\r
-#define MCF_GPIO_SETB (*(vuint8 *)(&__IPSBAR[0x100029]))\r
-#define MCF_GPIO_CLRB (*(vuint8 *)(&__IPSBAR[0x10003D]))\r
-\r
-#define MCF_GPIO_PORTC (*(vuint8 *)(&__IPSBAR[0x100002]))\r
-#define MCF_GPIO_DDRC (*(vuint8 *)(&__IPSBAR[0x100016]))\r
-#define MCF_GPIO_SETC (*(vuint8 *)(&__IPSBAR[0x10002A]))\r
-#define MCF_GPIO_CLRC (*(vuint8 *)(&__IPSBAR[0x10003E]))\r
-\r
-#define MCF_GPIO_PORTD (*(vuint8 *)(&__IPSBAR[0x100003]))\r
-#define MCF_GPIO_DDRD (*(vuint8 *)(&__IPSBAR[0x100017]))\r
-#define MCF_GPIO_SETD (*(vuint8 *)(&__IPSBAR[0x10002B]))\r
-#define MCF_GPIO_CLRD (*(vuint8 *)(&__IPSBAR[0x10003F]))\r
-\r
-#define MCF_GPIO_PORTE (*(vuint8 *)(&__IPSBAR[0x100004]))\r
-#define MCF_GPIO_DDRE (*(vuint8 *)(&__IPSBAR[0x100018]))\r
-#define MCF_GPIO_SETE (*(vuint8 *)(&__IPSBAR[0x10002C]))\r
-#define MCF_GPIO_CLRE (*(vuint8 *)(&__IPSBAR[0x100040]))\r
-\r
-#define MCF_GPIO_PORTF (*(vuint8 *)(&__IPSBAR[0x100005]))\r
-#define MCF_GPIO_DDRF (*(vuint8 *)(&__IPSBAR[0x100019]))\r
-#define MCF_GPIO_SETF (*(vuint8 *)(&__IPSBAR[0x10002D]))\r
-#define MCF_GPIO_CLRF (*(vuint8 *)(&__IPSBAR[0x100041]))\r
-\r
-#define MCF_GPIO_PORTG (*(vuint8 *)(&__IPSBAR[0x100006]))\r
-#define MCF_GPIO_DDRG (*(vuint8 *)(&__IPSBAR[0x10001A]))\r
-#define MCF_GPIO_SETG (*(vuint8 *)(&__IPSBAR[0x10002E]))\r
-#define MCF_GPIO_CLRG (*(vuint8 *)(&__IPSBAR[0x100042]))\r
-\r
-#define MCF_GPIO_PORTH (*(vuint8 *)(&__IPSBAR[0x100007]))\r
-#define MCF_GPIO_DDRH (*(vuint8 *)(&__IPSBAR[0x10001B]))\r
-#define MCF_GPIO_SETH (*(vuint8 *)(&__IPSBAR[0x10002F]))\r
-#define MCF_GPIO_CLRH (*(vuint8 *)(&__IPSBAR[0x100043]))\r
-\r
-#define MCF_GPIO_PORTJ (*(vuint8 *)(&__IPSBAR[0x100008]))\r
-#define MCF_GPIO_DDRJ (*(vuint8 *)(&__IPSBAR[0x10001C]))\r
-#define MCF_GPIO_SETJ (*(vuint8 *)(&__IPSBAR[0x100030]))\r
-#define MCF_GPIO_CLRJ (*(vuint8 *)(&__IPSBAR[0x100044]))\r
-\r
-#define MCF_GPIO_PORTDD (*(vuint8 *)(&__IPSBAR[0x100009]))\r
-#define MCF_GPIO_DDRDD (*(vuint8 *)(&__IPSBAR[0x10001D]))\r
-#define MCF_GPIO_SETDD (*(vuint8 *)(&__IPSBAR[0x100031]))\r
-#define MCF_GPIO_CLRDD (*(vuint8 *)(&__IPSBAR[0x100045]))\r
-\r
-#define MCF_GPIO_PORTEH (*(vuint8 *)(&__IPSBAR[0x10000A]))\r
-#define MCF_GPIO_DDREH (*(vuint8 *)(&__IPSBAR[0x10001E]))\r
-#define MCF_GPIO_SETEH (*(vuint8 *)(&__IPSBAR[0x100032]))\r
-#define MCF_GPIO_CLREH (*(vuint8 *)(&__IPSBAR[0x100046]))\r
-\r
-#define MCF_GPIO_PORTEL (*(vuint8 *)(&__IPSBAR[0x10000B]))\r
-#define MCF_GPIO_DDREL (*(vuint8 *)(&__IPSBAR[0x10001F]))\r
-#define MCF_GPIO_SETEL (*(vuint8 *)(&__IPSBAR[0x100033]))\r
-#define MCF_GPIO_CLREL (*(vuint8 *)(&__IPSBAR[0x100047]))\r
-\r
-#define MCF_GPIO_PORTAS (*(vuint8 *)(&__IPSBAR[0x10000C]))\r
-#define MCF_GPIO_DDRAS (*(vuint8 *)(&__IPSBAR[0x100020]))\r
-#define MCF_GPIO_SETAS (*(vuint8 *)(&__IPSBAR[0x100034]))\r
-#define MCF_GPIO_CLRAS (*(vuint8 *)(&__IPSBAR[0x100048]))\r
-\r
-#define MCF_GPIO_PORTQS (*(vuint8 *)(&__IPSBAR[0x10000D]))\r
-#define MCF_GPIO_DDRQS (*(vuint8 *)(&__IPSBAR[0x100021]))\r
-#define MCF_GPIO_SETQS (*(vuint8 *)(&__IPSBAR[0x100035]))\r
-#define MCF_GPIO_CLRQS (*(vuint8 *)(&__IPSBAR[0x100049]))\r
-\r
-#define MCF_GPIO_PORTSD (*(vuint8 *)(&__IPSBAR[0x10000E]))\r
-#define MCF_GPIO_DDRSD (*(vuint8 *)(&__IPSBAR[0x100022]))\r
-#define MCF_GPIO_SETSD (*(vuint8 *)(&__IPSBAR[0x100036]))\r
-#define MCF_GPIO_CLRSD (*(vuint8 *)(&__IPSBAR[0x10004A]))\r
-\r
-#define MCF_GPIO_PORTTC (*(vuint8 *)(&__IPSBAR[0x10000F]))\r
-#define MCF_GPIO_DDRTC (*(vuint8 *)(&__IPSBAR[0x100023]))\r
-#define MCF_GPIO_SETTC (*(vuint8 *)(&__IPSBAR[0x100037]))\r
-#define MCF_GPIO_CLRTC (*(vuint8 *)(&__IPSBAR[0x10004B]))\r
-\r
-#define MCF_GPIO_PORTTD (*(vuint8 *)(&__IPSBAR[0x100010]))\r
-#define MCF_GPIO_DDRTD (*(vuint8 *)(&__IPSBAR[0x100024]))\r
-#define MCF_GPIO_SETTD (*(vuint8 *)(&__IPSBAR[0x100038]))\r
-#define MCF_GPIO_CLRTD (*(vuint8 *)(&__IPSBAR[0x10004C]))\r
-\r
-#define MCF_GPIO_PORTUA (*(vuint8 *)(&__IPSBAR[0x100011]))\r
-#define MCF_GPIO_DDRUA (*(vuint8 *)(&__IPSBAR[0x100025]))\r
-#define MCF_GPIO_SETUA (*(vuint8 *)(&__IPSBAR[0x100039]))\r
-#define MCF_GPIO_CLRUA (*(vuint8 *)(&__IPSBAR[0x10004D]))\r
-\r
-\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTA */\r
-#define MCF_GPIO_PORTA_PORTA0 (0x1)\r
-#define MCF_GPIO_PORTA_PORTA1 (0x2)\r
-#define MCF_GPIO_PORTA_PORTA2 (0x4)\r
-#define MCF_GPIO_PORTA_PORTA3 (0x8)\r
-#define MCF_GPIO_PORTA_PORTA4 (0x10)\r
-#define MCF_GPIO_PORTA_PORTA5 (0x20)\r
-#define MCF_GPIO_PORTA_PORTA6 (0x40)\r
-#define MCF_GPIO_PORTA_PORTA7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRA */\r
-#define MCF_GPIO_DDRA_DDRA0 (0x1)\r
-#define MCF_GPIO_DDRA_DDRA1 (0x2)\r
-#define MCF_GPIO_DDRA_DDRA2 (0x4)\r
-#define MCF_GPIO_DDRA_DDRA3 (0x8)\r
-#define MCF_GPIO_DDRA_DDRA4 (0x10)\r
-#define MCF_GPIO_DDRA_DDRA5 (0x20)\r
-#define MCF_GPIO_DDRA_DDRA6 (0x40)\r
-#define MCF_GPIO_DDRA_DDRA7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETA */\r
-#define MCF_GPIO_SETA_SETA0 (0x1)\r
-#define MCF_GPIO_SETA_SETA1 (0x2)\r
-#define MCF_GPIO_SETA_SETA2 (0x4)\r
-#define MCF_GPIO_SETA_SETA3 (0x8)\r
-#define MCF_GPIO_SETA_SETA4 (0x10)\r
-#define MCF_GPIO_SETA_SETA5 (0x20)\r
-#define MCF_GPIO_SETA_SETA6 (0x40)\r
-#define MCF_GPIO_SETA_SETA7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRA */\r
-#define MCF_GPIO_CLRA_CLRA0 (0x1)\r
-#define MCF_GPIO_CLRA_CLRA1 (0x2)\r
-#define MCF_GPIO_CLRA_CLRA2 (0x4)\r
-#define MCF_GPIO_CLRA_CLRA3 (0x8)\r
-#define MCF_GPIO_CLRA_CLRA4 (0x10)\r
-#define MCF_GPIO_CLRA_CLRA5 (0x20)\r
-#define MCF_GPIO_CLRA_CLRA6 (0x40)\r
-#define MCF_GPIO_CLRA_CLRA7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTB */\r
-#define MCF_GPIO_PORTB_PORTB0 (0x1)\r
-#define MCF_GPIO_PORTB_PORTB1 (0x2)\r
-#define MCF_GPIO_PORTB_PORTB2 (0x4)\r
-#define MCF_GPIO_PORTB_PORTB3 (0x8)\r
-#define MCF_GPIO_PORTB_PORTB4 (0x10)\r
-#define MCF_GPIO_PORTB_PORTB5 (0x20)\r
-#define MCF_GPIO_PORTB_PORTB6 (0x40)\r
-#define MCF_GPIO_PORTB_PORTB7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRB */\r
-#define MCF_GPIO_DDRB_DDRB0 (0x1)\r
-#define MCF_GPIO_DDRB_DDRB1 (0x2)\r
-#define MCF_GPIO_DDRB_DDRB2 (0x4)\r
-#define MCF_GPIO_DDRB_DDRB3 (0x8)\r
-#define MCF_GPIO_DDRB_DDRB4 (0x10)\r
-#define MCF_GPIO_DDRB_DDRB5 (0x20)\r
-#define MCF_GPIO_DDRB_DDRB6 (0x40)\r
-#define MCF_GPIO_DDRB_DDRB7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETB */\r
-#define MCF_GPIO_SETB_SETB0 (0x1)\r
-#define MCF_GPIO_SETB_SETB1 (0x2)\r
-#define MCF_GPIO_SETB_SETB2 (0x4)\r
-#define MCF_GPIO_SETB_SETB3 (0x8)\r
-#define MCF_GPIO_SETB_SETB4 (0x10)\r
-#define MCF_GPIO_SETB_SETB5 (0x20)\r
-#define MCF_GPIO_SETB_SETB6 (0x40)\r
-#define MCF_GPIO_SETB_SETB7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRB */\r
-#define MCF_GPIO_CLRB_CLRB0 (0x1)\r
-#define MCF_GPIO_CLRB_CLRB1 (0x2)\r
-#define MCF_GPIO_CLRB_CLRB2 (0x4)\r
-#define MCF_GPIO_CLRB_CLRB3 (0x8)\r
-#define MCF_GPIO_CLRB_CLRB4 (0x10)\r
-#define MCF_GPIO_CLRB_CLRB5 (0x20)\r
-#define MCF_GPIO_CLRB_CLRB6 (0x40)\r
-#define MCF_GPIO_CLRB_CLRB7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTC */\r
-#define MCF_GPIO_PORTC_PORTC0 (0x1)\r
-#define MCF_GPIO_PORTC_PORTC1 (0x2)\r
-#define MCF_GPIO_PORTC_PORTC2 (0x4)\r
-#define MCF_GPIO_PORTC_PORTC3 (0x8)\r
-#define MCF_GPIO_PORTC_PORTC4 (0x10)\r
-#define MCF_GPIO_PORTC_PORTC5 (0x20)\r
-#define MCF_GPIO_PORTC_PORTC6 (0x40)\r
-#define MCF_GPIO_PORTC_PORTC7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRC */\r
-#define MCF_GPIO_DDRC_DDRC0 (0x1)\r
-#define MCF_GPIO_DDRC_DDRC1 (0x2)\r
-#define MCF_GPIO_DDRC_DDRC2 (0x4)\r
-#define MCF_GPIO_DDRC_DDRC3 (0x8)\r
-#define MCF_GPIO_DDRC_DDRC4 (0x10)\r
-#define MCF_GPIO_DDRC_DDRC5 (0x20)\r
-#define MCF_GPIO_DDRC_DDRC6 (0x40)\r
-#define MCF_GPIO_DDRC_DDRC7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETC */\r
-#define MCF_GPIO_SETC_SETC0 (0x1)\r
-#define MCF_GPIO_SETC_SETC1 (0x2)\r
-#define MCF_GPIO_SETC_SETC2 (0x4)\r
-#define MCF_GPIO_SETC_SETC3 (0x8)\r
-#define MCF_GPIO_SETC_SETC4 (0x10)\r
-#define MCF_GPIO_SETC_SETC5 (0x20)\r
-#define MCF_GPIO_SETC_SETC6 (0x40)\r
-#define MCF_GPIO_SETC_SETC7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRC */\r
-#define MCF_GPIO_CLRC_CLRC0 (0x1)\r
-#define MCF_GPIO_CLRC_CLRC1 (0x2)\r
-#define MCF_GPIO_CLRC_CLRC2 (0x4)\r
-#define MCF_GPIO_CLRC_CLRC3 (0x8)\r
-#define MCF_GPIO_CLRC_CLRC4 (0x10)\r
-#define MCF_GPIO_CLRC_CLRC5 (0x20)\r
-#define MCF_GPIO_CLRC_CLRC6 (0x40)\r
-#define MCF_GPIO_CLRC_CLRC7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTD */\r
-#define MCF_GPIO_PORTD_PORTD0 (0x1)\r
-#define MCF_GPIO_PORTD_PORTD1 (0x2)\r
-#define MCF_GPIO_PORTD_PORTD2 (0x4)\r
-#define MCF_GPIO_PORTD_PORTD3 (0x8)\r
-#define MCF_GPIO_PORTD_PORTD4 (0x10)\r
-#define MCF_GPIO_PORTD_PORTD5 (0x20)\r
-#define MCF_GPIO_PORTD_PORTD6 (0x40)\r
-#define MCF_GPIO_PORTD_PORTD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRD */\r
-#define MCF_GPIO_DDRD_DDRD0 (0x1)\r
-#define MCF_GPIO_DDRD_DDRD1 (0x2)\r
-#define MCF_GPIO_DDRD_DDRD2 (0x4)\r
-#define MCF_GPIO_DDRD_DDRD3 (0x8)\r
-#define MCF_GPIO_DDRD_DDRD4 (0x10)\r
-#define MCF_GPIO_DDRD_DDRD5 (0x20)\r
-#define MCF_GPIO_DDRD_DDRD6 (0x40)\r
-#define MCF_GPIO_DDRD_DDRD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETD */\r
-#define MCF_GPIO_SETD_SETD0 (0x1)\r
-#define MCF_GPIO_SETD_SETD1 (0x2)\r
-#define MCF_GPIO_SETD_SETD2 (0x4)\r
-#define MCF_GPIO_SETD_SETD3 (0x8)\r
-#define MCF_GPIO_SETD_SETD4 (0x10)\r
-#define MCF_GPIO_SETD_SETD5 (0x20)\r
-#define MCF_GPIO_SETD_SETD6 (0x40)\r
-#define MCF_GPIO_SETD_SETD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRD */\r
-#define MCF_GPIO_CLRD_CLRD0 (0x1)\r
-#define MCF_GPIO_CLRD_CLRD1 (0x2)\r
-#define MCF_GPIO_CLRD_CLRD2 (0x4)\r
-#define MCF_GPIO_CLRD_CLRD3 (0x8)\r
-#define MCF_GPIO_CLRD_CLRD4 (0x10)\r
-#define MCF_GPIO_CLRD_CLRD5 (0x20)\r
-#define MCF_GPIO_CLRD_CLRD6 (0x40)\r
-#define MCF_GPIO_CLRD_CLRD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTE */\r
-#define MCF_GPIO_PORTE_PORTE0 (0x1)\r
-#define MCF_GPIO_PORTE_PORTE1 (0x2)\r
-#define MCF_GPIO_PORTE_PORTE2 (0x4)\r
-#define MCF_GPIO_PORTE_PORTE3 (0x8)\r
-#define MCF_GPIO_PORTE_PORTE4 (0x10)\r
-#define MCF_GPIO_PORTE_PORTE5 (0x20)\r
-#define MCF_GPIO_PORTE_PORTE6 (0x40)\r
-#define MCF_GPIO_PORTE_PORTE7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRE */\r
-#define MCF_GPIO_DDRE_DDRE0 (0x1)\r
-#define MCF_GPIO_DDRE_DDRE1 (0x2)\r
-#define MCF_GPIO_DDRE_DDRE2 (0x4)\r
-#define MCF_GPIO_DDRE_DDRE3 (0x8)\r
-#define MCF_GPIO_DDRE_DDRE4 (0x10)\r
-#define MCF_GPIO_DDRE_DDRE5 (0x20)\r
-#define MCF_GPIO_DDRE_DDRE6 (0x40)\r
-#define MCF_GPIO_DDRE_DDRE7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETE */\r
-#define MCF_GPIO_SETE_SETE0 (0x1)\r
-#define MCF_GPIO_SETE_SETE1 (0x2)\r
-#define MCF_GPIO_SETE_SETE2 (0x4)\r
-#define MCF_GPIO_SETE_SETE3 (0x8)\r
-#define MCF_GPIO_SETE_SETE4 (0x10)\r
-#define MCF_GPIO_SETE_SETE5 (0x20)\r
-#define MCF_GPIO_SETE_SETE6 (0x40)\r
-#define MCF_GPIO_SETE_SETE7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRE */\r
-#define MCF_GPIO_CLRE_CLRE0 (0x1)\r
-#define MCF_GPIO_CLRE_CLRE1 (0x2)\r
-#define MCF_GPIO_CLRE_CLRE2 (0x4)\r
-#define MCF_GPIO_CLRE_CLRE3 (0x8)\r
-#define MCF_GPIO_CLRE_CLRE4 (0x10)\r
-#define MCF_GPIO_CLRE_CLRE5 (0x20)\r
-#define MCF_GPIO_CLRE_CLRE6 (0x40)\r
-#define MCF_GPIO_CLRE_CLRE7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTF */\r
-#define MCF_GPIO_PORTF_PORTF0 (0x1)\r
-#define MCF_GPIO_PORTF_PORTF1 (0x2)\r
-#define MCF_GPIO_PORTF_PORTF2 (0x4)\r
-#define MCF_GPIO_PORTF_PORTF3 (0x8)\r
-#define MCF_GPIO_PORTF_PORTF4 (0x10)\r
-#define MCF_GPIO_PORTF_PORTF5 (0x20)\r
-#define MCF_GPIO_PORTF_PORTF6 (0x40)\r
-#define MCF_GPIO_PORTF_PORTF7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRF */\r
-#define MCF_GPIO_DDRF_DDRF0 (0x1)\r
-#define MCF_GPIO_DDRF_DDRF1 (0x2)\r
-#define MCF_GPIO_DDRF_DDRF2 (0x4)\r
-#define MCF_GPIO_DDRF_DDRF3 (0x8)\r
-#define MCF_GPIO_DDRF_DDRF4 (0x10)\r
-#define MCF_GPIO_DDRF_DDRF5 (0x20)\r
-#define MCF_GPIO_DDRF_DDRF6 (0x40)\r
-#define MCF_GPIO_DDRF_DDRF7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETF */\r
-#define MCF_GPIO_SETF_SETF0 (0x1)\r
-#define MCF_GPIO_SETF_SETF1 (0x2)\r
-#define MCF_GPIO_SETF_SETF2 (0x4)\r
-#define MCF_GPIO_SETF_SETF3 (0x8)\r
-#define MCF_GPIO_SETF_SETF4 (0x10)\r
-#define MCF_GPIO_SETF_SETF5 (0x20)\r
-#define MCF_GPIO_SETF_SETF6 (0x40)\r
-#define MCF_GPIO_SETF_SETF7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRF */\r
-#define MCF_GPIO_CLRF_CLRF0 (0x1)\r
-#define MCF_GPIO_CLRF_CLRF1 (0x2)\r
-#define MCF_GPIO_CLRF_CLRF2 (0x4)\r
-#define MCF_GPIO_CLRF_CLRF3 (0x8)\r
-#define MCF_GPIO_CLRF_CLRF4 (0x10)\r
-#define MCF_GPIO_CLRF_CLRF5 (0x20)\r
-#define MCF_GPIO_CLRF_CLRF6 (0x40)\r
-#define MCF_GPIO_CLRF_CLRF7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTG */\r
-#define MCF_GPIO_PORTG_PORTG0 (0x1)\r
-#define MCF_GPIO_PORTG_PORTG1 (0x2)\r
-#define MCF_GPIO_PORTG_PORTG2 (0x4)\r
-#define MCF_GPIO_PORTG_PORTG3 (0x8)\r
-#define MCF_GPIO_PORTG_PORTG4 (0x10)\r
-#define MCF_GPIO_PORTG_PORTG5 (0x20)\r
-#define MCF_GPIO_PORTG_PORTG6 (0x40)\r
-#define MCF_GPIO_PORTG_PORTG7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRG */\r
-#define MCF_GPIO_DDRG_DDRG0 (0x1)\r
-#define MCF_GPIO_DDRG_DDRG1 (0x2)\r
-#define MCF_GPIO_DDRG_DDRG2 (0x4)\r
-#define MCF_GPIO_DDRG_DDRG3 (0x8)\r
-#define MCF_GPIO_DDRG_DDRG4 (0x10)\r
-#define MCF_GPIO_DDRG_DDRG5 (0x20)\r
-#define MCF_GPIO_DDRG_DDRG6 (0x40)\r
-#define MCF_GPIO_DDRG_DDRG7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETG */\r
-#define MCF_GPIO_SETG_SETG0 (0x1)\r
-#define MCF_GPIO_SETG_SETG1 (0x2)\r
-#define MCF_GPIO_SETG_SETG2 (0x4)\r
-#define MCF_GPIO_SETG_SETG3 (0x8)\r
-#define MCF_GPIO_SETG_SETG4 (0x10)\r
-#define MCF_GPIO_SETG_SETG5 (0x20)\r
-#define MCF_GPIO_SETG_SETG6 (0x40)\r
-#define MCF_GPIO_SETG_SETG7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRG */\r
-#define MCF_GPIO_CLRG_CLRG0 (0x1)\r
-#define MCF_GPIO_CLRG_CLRG1 (0x2)\r
-#define MCF_GPIO_CLRG_CLRG2 (0x4)\r
-#define MCF_GPIO_CLRG_CLRG3 (0x8)\r
-#define MCF_GPIO_CLRG_CLRG4 (0x10)\r
-#define MCF_GPIO_CLRG_CLRG5 (0x20)\r
-#define MCF_GPIO_CLRG_CLRG6 (0x40)\r
-#define MCF_GPIO_CLRG_CLRG7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTH */\r
-#define MCF_GPIO_PORTH_PORTH0 (0x1)\r
-#define MCF_GPIO_PORTH_PORTH1 (0x2)\r
-#define MCF_GPIO_PORTH_PORTH2 (0x4)\r
-#define MCF_GPIO_PORTH_PORTH3 (0x8)\r
-#define MCF_GPIO_PORTH_PORTH4 (0x10)\r
-#define MCF_GPIO_PORTH_PORTH5 (0x20)\r
-#define MCF_GPIO_PORTH_PORTH6 (0x40)\r
-#define MCF_GPIO_PORTH_PORTH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRH */\r
-#define MCF_GPIO_DDRH_DDRH0 (0x1)\r
-#define MCF_GPIO_DDRH_DDRH1 (0x2)\r
-#define MCF_GPIO_DDRH_DDRH2 (0x4)\r
-#define MCF_GPIO_DDRH_DDRH3 (0x8)\r
-#define MCF_GPIO_DDRH_DDRH4 (0x10)\r
-#define MCF_GPIO_DDRH_DDRH5 (0x20)\r
-#define MCF_GPIO_DDRH_DDRH6 (0x40)\r
-#define MCF_GPIO_DDRH_DDRH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETH */\r
-#define MCF_GPIO_SETH_SETH0 (0x1)\r
-#define MCF_GPIO_SETH_SETH1 (0x2)\r
-#define MCF_GPIO_SETH_SETH2 (0x4)\r
-#define MCF_GPIO_SETH_SETH3 (0x8)\r
-#define MCF_GPIO_SETH_SETH4 (0x10)\r
-#define MCF_GPIO_SETH_SETH5 (0x20)\r
-#define MCF_GPIO_SETH_SETH6 (0x40)\r
-#define MCF_GPIO_SETH_SETH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRH */\r
-#define MCF_GPIO_CLRH_CLRH0 (0x1)\r
-#define MCF_GPIO_CLRH_CLRH1 (0x2)\r
-#define MCF_GPIO_CLRH_CLRH2 (0x4)\r
-#define MCF_GPIO_CLRH_CLRH3 (0x8)\r
-#define MCF_GPIO_CLRH_CLRH4 (0x10)\r
-#define MCF_GPIO_CLRH_CLRH5 (0x20)\r
-#define MCF_GPIO_CLRH_CLRH6 (0x40)\r
-#define MCF_GPIO_CLRH_CLRH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTJ */\r
-#define MCF_GPIO_PORTJ_PORTJ0 (0x1)\r
-#define MCF_GPIO_PORTJ_PORTJ1 (0x2)\r
-#define MCF_GPIO_PORTJ_PORTJ2 (0x4)\r
-#define MCF_GPIO_PORTJ_PORTJ3 (0x8)\r
-#define MCF_GPIO_PORTJ_PORTJ4 (0x10)\r
-#define MCF_GPIO_PORTJ_PORTJ5 (0x20)\r
-#define MCF_GPIO_PORTJ_PORTJ6 (0x40)\r
-#define MCF_GPIO_PORTJ_PORTJ7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRJ */\r
-#define MCF_GPIO_DDRJ_DDRJ0 (0x1)\r
-#define MCF_GPIO_DDRJ_DDRJ1 (0x2)\r
-#define MCF_GPIO_DDRJ_DDRJ2 (0x4)\r
-#define MCF_GPIO_DDRJ_DDRJ3 (0x8)\r
-#define MCF_GPIO_DDRJ_DDRJ4 (0x10)\r
-#define MCF_GPIO_DDRJ_DDRJ5 (0x20)\r
-#define MCF_GPIO_DDRJ_DDRJ6 (0x40)\r
-#define MCF_GPIO_DDRJ_DDRJ7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETJ */\r
-#define MCF_GPIO_SETJ_SETJ0 (0x1)\r
-#define MCF_GPIO_SETJ_SETJ1 (0x2)\r
-#define MCF_GPIO_SETJ_SETJ2 (0x4)\r
-#define MCF_GPIO_SETJ_SETJ3 (0x8)\r
-#define MCF_GPIO_SETJ_SETJ4 (0x10)\r
-#define MCF_GPIO_SETJ_SETJ5 (0x20)\r
-#define MCF_GPIO_SETJ_SETJ6 (0x40)\r
-#define MCF_GPIO_SETJ_SETJ7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRJ */\r
-#define MCF_GPIO_CLRJ_CLRJ0 (0x1)\r
-#define MCF_GPIO_CLRJ_CLRJ1 (0x2)\r
-#define MCF_GPIO_CLRJ_CLRJ2 (0x4)\r
-#define MCF_GPIO_CLRJ_CLRJ3 (0x8)\r
-#define MCF_GPIO_CLRJ_CLRJ4 (0x10)\r
-#define MCF_GPIO_CLRJ_CLRJ5 (0x20)\r
-#define MCF_GPIO_CLRJ_CLRJ6 (0x40)\r
-#define MCF_GPIO_CLRJ_CLRJ7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTDD */\r
-#define MCF_GPIO_PORTDD_PORTDD0 (0x1)\r
-#define MCF_GPIO_PORTDD_PORTDD1 (0x2)\r
-#define MCF_GPIO_PORTDD_PORTDD2 (0x4)\r
-#define MCF_GPIO_PORTDD_PORTDD3 (0x8)\r
-#define MCF_GPIO_PORTDD_PORTDD4 (0x10)\r
-#define MCF_GPIO_PORTDD_PORTDD5 (0x20)\r
-#define MCF_GPIO_PORTDD_PORTDD6 (0x40)\r
-#define MCF_GPIO_PORTDD_PORTDD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRDD */\r
-#define MCF_GPIO_DDRDD_DDRDD0 (0x1)\r
-#define MCF_GPIO_DDRDD_DDRDD1 (0x2)\r
-#define MCF_GPIO_DDRDD_DDRDD2 (0x4)\r
-#define MCF_GPIO_DDRDD_DDRDD3 (0x8)\r
-#define MCF_GPIO_DDRDD_DDRDD4 (0x10)\r
-#define MCF_GPIO_DDRDD_DDRDD5 (0x20)\r
-#define MCF_GPIO_DDRDD_DDRDD6 (0x40)\r
-#define MCF_GPIO_DDRDD_DDRDD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETDD */\r
-#define MCF_GPIO_SETDD_SETDD0 (0x1)\r
-#define MCF_GPIO_SETDD_SETDD1 (0x2)\r
-#define MCF_GPIO_SETDD_SETDD2 (0x4)\r
-#define MCF_GPIO_SETDD_SETDD3 (0x8)\r
-#define MCF_GPIO_SETDD_SETDD4 (0x10)\r
-#define MCF_GPIO_SETDD_SETDD5 (0x20)\r
-#define MCF_GPIO_SETDD_SETDD6 (0x40)\r
-#define MCF_GPIO_SETDD_SETDD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRDD */\r
-#define MCF_GPIO_CLRDD_CLRDD0 (0x1)\r
-#define MCF_GPIO_CLRDD_CLRDD1 (0x2)\r
-#define MCF_GPIO_CLRDD_CLRDD2 (0x4)\r
-#define MCF_GPIO_CLRDD_CLRDD3 (0x8)\r
-#define MCF_GPIO_CLRDD_CLRDD4 (0x10)\r
-#define MCF_GPIO_CLRDD_CLRDD5 (0x20)\r
-#define MCF_GPIO_CLRDD_CLRDD6 (0x40)\r
-#define MCF_GPIO_CLRDD_CLRDD7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTEH */\r
-#define MCF_GPIO_PORTEH_PORTEH0 (0x1)\r
-#define MCF_GPIO_PORTEH_PORTEH1 (0x2)\r
-#define MCF_GPIO_PORTEH_PORTEH2 (0x4)\r
-#define MCF_GPIO_PORTEH_PORTEH3 (0x8)\r
-#define MCF_GPIO_PORTEH_PORTEH4 (0x10)\r
-#define MCF_GPIO_PORTEH_PORTEH5 (0x20)\r
-#define MCF_GPIO_PORTEH_PORTEH6 (0x40)\r
-#define MCF_GPIO_PORTEH_PORTEH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDREH */\r
-#define MCF_GPIO_DDREH_DDREH0 (0x1)\r
-#define MCF_GPIO_DDREH_DDREH1 (0x2)\r
-#define MCF_GPIO_DDREH_DDREH2 (0x4)\r
-#define MCF_GPIO_DDREH_DDREH3 (0x8)\r
-#define MCF_GPIO_DDREH_DDREH4 (0x10)\r
-#define MCF_GPIO_DDREH_DDREH5 (0x20)\r
-#define MCF_GPIO_DDREH_DDREH6 (0x40)\r
-#define MCF_GPIO_DDREH_DDREH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETEH */\r
-#define MCF_GPIO_SETEH_SETEH0 (0x1)\r
-#define MCF_GPIO_SETEH_SETEH1 (0x2)\r
-#define MCF_GPIO_SETEH_SETEH2 (0x4)\r
-#define MCF_GPIO_SETEH_SETEH3 (0x8)\r
-#define MCF_GPIO_SETEH_SETEH4 (0x10)\r
-#define MCF_GPIO_SETEH_SETEH5 (0x20)\r
-#define MCF_GPIO_SETEH_SETEH6 (0x40)\r
-#define MCF_GPIO_SETEH_SETEH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLREH */\r
-#define MCF_GPIO_CLREH_CLREH0 (0x1)\r
-#define MCF_GPIO_CLREH_CLREH1 (0x2)\r
-#define MCF_GPIO_CLREH_CLREH2 (0x4)\r
-#define MCF_GPIO_CLREH_CLREH3 (0x8)\r
-#define MCF_GPIO_CLREH_CLREH4 (0x10)\r
-#define MCF_GPIO_CLREH_CLREH5 (0x20)\r
-#define MCF_GPIO_CLREH_CLREH6 (0x40)\r
-#define MCF_GPIO_CLREH_CLREH7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTEL */\r
-#define MCF_GPIO_PORTEL_PORTEL0 (0x1)\r
-#define MCF_GPIO_PORTEL_PORTEL1 (0x2)\r
-#define MCF_GPIO_PORTEL_PORTEL2 (0x4)\r
-#define MCF_GPIO_PORTEL_PORTEL3 (0x8)\r
-#define MCF_GPIO_PORTEL_PORTEL4 (0x10)\r
-#define MCF_GPIO_PORTEL_PORTEL5 (0x20)\r
-#define MCF_GPIO_PORTEL_PORTEL6 (0x40)\r
-#define MCF_GPIO_PORTEL_PORTEL7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDREL */\r
-#define MCF_GPIO_DDREL_DDREL0 (0x1)\r
-#define MCF_GPIO_DDREL_DDREL1 (0x2)\r
-#define MCF_GPIO_DDREL_DDREL2 (0x4)\r
-#define MCF_GPIO_DDREL_DDREL3 (0x8)\r
-#define MCF_GPIO_DDREL_DDREL4 (0x10)\r
-#define MCF_GPIO_DDREL_DDREL5 (0x20)\r
-#define MCF_GPIO_DDREL_DDREL6 (0x40)\r
-#define MCF_GPIO_DDREL_DDREL7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETEL */\r
-#define MCF_GPIO_SETEL_SETEL0 (0x1)\r
-#define MCF_GPIO_SETEL_SETEL1 (0x2)\r
-#define MCF_GPIO_SETEL_SETEL2 (0x4)\r
-#define MCF_GPIO_SETEL_SETEL3 (0x8)\r
-#define MCF_GPIO_SETEL_SETEL4 (0x10)\r
-#define MCF_GPIO_SETEL_SETEL5 (0x20)\r
-#define MCF_GPIO_SETEL_SETEL6 (0x40)\r
-#define MCF_GPIO_SETEL_SETEL7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLREL */\r
-#define MCF_GPIO_CLREL_CLREL0 (0x1)\r
-#define MCF_GPIO_CLREL_CLREL1 (0x2)\r
-#define MCF_GPIO_CLREL_CLREL2 (0x4)\r
-#define MCF_GPIO_CLREL_CLREL3 (0x8)\r
-#define MCF_GPIO_CLREL_CLREL4 (0x10)\r
-#define MCF_GPIO_CLREL_CLREL5 (0x20)\r
-#define MCF_GPIO_CLREL_CLREL6 (0x40)\r
-#define MCF_GPIO_CLREL_CLREL7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTAS */\r
-#define MCF_GPIO_PORTAS_PORTAS0 (0x1)\r
-#define MCF_GPIO_PORTAS_PORTAS1 (0x2)\r
-#define MCF_GPIO_PORTAS_PORTAS2 (0x4)\r
-#define MCF_GPIO_PORTAS_PORTAS3 (0x8)\r
-#define MCF_GPIO_PORTAS_PORTAS4 (0x10)\r
-#define MCF_GPIO_PORTAS_PORTAS5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRAS */\r
-#define MCF_GPIO_DDRAS_DDRAS0 (0x1)\r
-#define MCF_GPIO_DDRAS_DDRAS1 (0x2)\r
-#define MCF_GPIO_DDRAS_DDRAS2 (0x4)\r
-#define MCF_GPIO_DDRAS_DDRAS3 (0x8)\r
-#define MCF_GPIO_DDRAS_DDRAS4 (0x10)\r
-#define MCF_GPIO_DDRAS_DDRAS5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETAS */\r
-#define MCF_GPIO_SETAS_SETAS0 (0x1)\r
-#define MCF_GPIO_SETAS_SETAS1 (0x2)\r
-#define MCF_GPIO_SETAS_SETAS2 (0x4)\r
-#define MCF_GPIO_SETAS_SETAS3 (0x8)\r
-#define MCF_GPIO_SETAS_SETAS4 (0x10)\r
-#define MCF_GPIO_SETAS_SETAS5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRAS */\r
-#define MCF_GPIO_CLRAS_CLRAS0 (0x1)\r
-#define MCF_GPIO_CLRAS_CLRAS1 (0x2)\r
-#define MCF_GPIO_CLRAS_CLRAS2 (0x4)\r
-#define MCF_GPIO_CLRAS_CLRAS3 (0x8)\r
-#define MCF_GPIO_CLRAS_CLRAS4 (0x10)\r
-#define MCF_GPIO_CLRAS_CLRAS5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTQS */\r
-#define MCF_GPIO_PORTQS_PORTQS0 (0x1)\r
-#define MCF_GPIO_PORTQS_PORTQS1 (0x2)\r
-#define MCF_GPIO_PORTQS_PORTQS2 (0x4)\r
-#define MCF_GPIO_PORTQS_PORTQS3 (0x8)\r
-#define MCF_GPIO_PORTQS_PORTQS4 (0x10)\r
-#define MCF_GPIO_PORTQS_PORTQS5 (0x20)\r
-#define MCF_GPIO_PORTQS_PORTQS6 (0x40)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRQS */\r
-#define MCF_GPIO_DDRQS_DDRQS0 (0x1)\r
-#define MCF_GPIO_DDRQS_DDRQS1 (0x2)\r
-#define MCF_GPIO_DDRQS_DDRQS2 (0x4)\r
-#define MCF_GPIO_DDRQS_DDRQS3 (0x8)\r
-#define MCF_GPIO_DDRQS_DDRQS4 (0x10)\r
-#define MCF_GPIO_DDRQS_DDRQS5 (0x20)\r
-#define MCF_GPIO_DDRQS_DDRQS6 (0x40)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETQS */\r
-#define MCF_GPIO_SETQS_SETQS0 (0x1)\r
-#define MCF_GPIO_SETQS_SETQS1 (0x2)\r
-#define MCF_GPIO_SETQS_SETQS2 (0x4)\r
-#define MCF_GPIO_SETQS_SETQS3 (0x8)\r
-#define MCF_GPIO_SETQS_SETQS4 (0x10)\r
-#define MCF_GPIO_SETQS_SETQS5 (0x20)\r
-#define MCF_GPIO_SETQS_SETQS6 (0x40)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRQS */\r
-#define MCF_GPIO_CLRQS_CLRQS0 (0x1)\r
-#define MCF_GPIO_CLRQS_CLRQS1 (0x2)\r
-#define MCF_GPIO_CLRQS_CLRQS2 (0x4)\r
-#define MCF_GPIO_CLRQS_CLRQS3 (0x8)\r
-#define MCF_GPIO_CLRQS_CLRQS4 (0x10)\r
-#define MCF_GPIO_CLRQS_CLRQS5 (0x20)\r
-#define MCF_GPIO_CLRQS_CLRQS6 (0x40)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTSD */\r
-#define MCF_GPIO_PORTSD_PORTSD0 (0x1)\r
-#define MCF_GPIO_PORTSD_PORTSD1 (0x2)\r
-#define MCF_GPIO_PORTSD_PORTSD2 (0x4)\r
-#define MCF_GPIO_PORTSD_PORTSD3 (0x8)\r
-#define MCF_GPIO_PORTSD_PORTSD4 (0x10)\r
-#define MCF_GPIO_PORTSD_PORTSD5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRSD */\r
-#define MCF_GPIO_DDRSD_DDRSD0 (0x1)\r
-#define MCF_GPIO_DDRSD_DDRSD1 (0x2)\r
-#define MCF_GPIO_DDRSD_DDRSD2 (0x4)\r
-#define MCF_GPIO_DDRSD_DDRSD3 (0x8)\r
-#define MCF_GPIO_DDRSD_DDRSD4 (0x10)\r
-#define MCF_GPIO_DDRSD_DDRSD5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETSD */\r
-#define MCF_GPIO_SETSD_SETSD0 (0x1)\r
-#define MCF_GPIO_SETSD_SETSD1 (0x2)\r
-#define MCF_GPIO_SETSD_SETSD2 (0x4)\r
-#define MCF_GPIO_SETSD_SETSD3 (0x8)\r
-#define MCF_GPIO_SETSD_SETSD4 (0x10)\r
-#define MCF_GPIO_SETSD_SETSD5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRSD */\r
-#define MCF_GPIO_CLRSD_CLRSD0 (0x1)\r
-#define MCF_GPIO_CLRSD_CLRSD1 (0x2)\r
-#define MCF_GPIO_CLRSD_CLRSD2 (0x4)\r
-#define MCF_GPIO_CLRSD_CLRSD3 (0x8)\r
-#define MCF_GPIO_CLRSD_CLRSD4 (0x10)\r
-#define MCF_GPIO_CLRSD_CLRSD5 (0x20)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTTC */\r
-#define MCF_GPIO_PORTTC_PORTTC0 (0x1)\r
-#define MCF_GPIO_PORTTC_PORTTC1 (0x2)\r
-#define MCF_GPIO_PORTTC_PORTTC2 (0x4)\r
-#define MCF_GPIO_PORTTC_PORTTC3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRTC */\r
-#define MCF_GPIO_DDRTC_DDRTC0 (0x1)\r
-#define MCF_GPIO_DDRTC_DDRTC1 (0x2)\r
-#define MCF_GPIO_DDRTC_DDRTC2 (0x4)\r
-#define MCF_GPIO_DDRTC_DDRTC3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETTC */\r
-#define MCF_GPIO_SETTC_SETTC0 (0x1)\r
-#define MCF_GPIO_SETTC_SETTC1 (0x2)\r
-#define MCF_GPIO_SETTC_SETTC2 (0x4)\r
-#define MCF_GPIO_SETTC_SETTC3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRTC */\r
-#define MCF_GPIO_CLRTC_CLRTC0 (0x1)\r
-#define MCF_GPIO_CLRTC_CLRTC1 (0x2)\r
-#define MCF_GPIO_CLRTC_CLRTC2 (0x4)\r
-#define MCF_GPIO_CLRTC_CLRTC3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTTD */\r
-#define MCF_GPIO_PORTTD_PORTTD0 (0x1)\r
-#define MCF_GPIO_PORTTD_PORTTD1 (0x2)\r
-#define MCF_GPIO_PORTTD_PORTTD2 (0x4)\r
-#define MCF_GPIO_PORTTD_PORTTD3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRTD */\r
-#define MCF_GPIO_DDRTD_DDRTD0 (0x1)\r
-#define MCF_GPIO_DDRTD_DDRTD1 (0x2)\r
-#define MCF_GPIO_DDRTD_DDRTD2 (0x4)\r
-#define MCF_GPIO_DDRTD_DDRTD3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETTD */\r
-#define MCF_GPIO_SETTD_SETTD0 (0x1)\r
-#define MCF_GPIO_SETTD_SETTD1 (0x2)\r
-#define MCF_GPIO_SETTD_SETTD2 (0x4)\r
-#define MCF_GPIO_SETTD_SETTD3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRTD */\r
-#define MCF_GPIO_CLRTD_CLRTD0 (0x1)\r
-#define MCF_GPIO_CLRTD_CLRTD1 (0x2)\r
-#define MCF_GPIO_CLRTD_CLRTD2 (0x4)\r
-#define MCF_GPIO_CLRTD_CLRTD3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_PORTUA */\r
-#define MCF_GPIO_PORTUA_PORTUA0 (0x1)\r
-#define MCF_GPIO_PORTUA_PORTUA1 (0x2)\r
-#define MCF_GPIO_PORTUA_PORTUA2 (0x4)\r
-#define MCF_GPIO_PORTUA_PORTUA3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_DDRUA */\r
-#define MCF_GPIO_DDRUA_DDRUA0 (0x1)\r
-#define MCF_GPIO_DDRUA_DDRUA1 (0x2)\r
-#define MCF_GPIO_DDRUA_DDRUA2 (0x4)\r
-#define MCF_GPIO_DDRUA_DDRUA3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_SETUA */\r
-#define MCF_GPIO_SETUA_SETUA0 (0x1)\r
-#define MCF_GPIO_SETUA_SETUA1 (0x2)\r
-#define MCF_GPIO_SETUA_SETUA2 (0x4)\r
-#define MCF_GPIO_SETUA_SETUA3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPIO_CLRUA */\r
-#define MCF_GPIO_CLRUA_CLRUA0 (0x1)\r
-#define MCF_GPIO_CLRUA_CLRUA1 (0x2)\r
-#define MCF_GPIO_CLRUA_CLRUA2 (0x4)\r
-#define MCF_GPIO_CLRUA_CLRUA3 (0x8)\r
-\r
-\r
-#endif /* __MCF5282_GPIO_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_GPTA_H__\r
-#define __MCF5282_GPTA_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* General Purpose Timer Module (GPT)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_GPTA_GPTIOS (*(vuint8 *)(&__IPSBAR[0x1A0000]))\r
-#define MCF_GPTA_GPTCFORC (*(vuint8 *)(&__IPSBAR[0x1A0001]))\r
-#define MCF_GPTA_GPTOC3M (*(vuint8 *)(&__IPSBAR[0x1A0002]))\r
-#define MCF_GPTA_GPTOC3D (*(vuint8 *)(&__IPSBAR[0x1A0003]))\r
-#define MCF_GPTA_GPTCNT (*(vuint16*)(&__IPSBAR[0x1A0004]))\r
-#define MCF_GPTA_GPTSCR1 (*(vuint8 *)(&__IPSBAR[0x1A0006]))\r
-#define MCF_GPTA_GPTTOV (*(vuint8 *)(&__IPSBAR[0x1A0008]))\r
-#define MCF_GPTA_GPTCTL1 (*(vuint8 *)(&__IPSBAR[0x1A0009]))\r
-#define MCF_GPTA_GPTCTL2 (*(vuint8 *)(&__IPSBAR[0x1A000B]))\r
-#define MCF_GPTA_GPTIE (*(vuint8 *)(&__IPSBAR[0x1A000C]))\r
-#define MCF_GPTA_GPTSCR2 (*(vuint8 *)(&__IPSBAR[0x1A000D]))\r
-#define MCF_GPTA_GPTFLG1 (*(vuint8 *)(&__IPSBAR[0x1A000E]))\r
-#define MCF_GPTA_GPTFLG2 (*(vuint8 *)(&__IPSBAR[0x1A000F]))\r
-#define MCF_GPTA_GPTC0 (*(vuint16*)(&__IPSBAR[0x1A0010]))\r
-#define MCF_GPTA_GPTC1 (*(vuint16*)(&__IPSBAR[0x1A0012]))\r
-#define MCF_GPTA_GPTC2 (*(vuint16*)(&__IPSBAR[0x1A0014]))\r
-#define MCF_GPTA_GPTC3 (*(vuint16*)(&__IPSBAR[0x1A0016]))\r
-#define MCF_GPTA_GPTPACTL (*(vuint8 *)(&__IPSBAR[0x1A0018]))\r
-#define MCF_GPTA_GPTPAFLG (*(vuint8 *)(&__IPSBAR[0x1A0019]))\r
-#define MCF_GPTA_GPTPACNT (*(vuint16*)(&__IPSBAR[0x1A001A]))\r
-#define MCF_GPTA_GPTPORT (*(vuint8 *)(&__IPSBAR[0x1A001D]))\r
-#define MCF_GPTA_GPTDDR (*(vuint8 *)(&__IPSBAR[0x1A001E]))\r
-#define MCF_GPTA_GPTC(x) (*(vuint16*)(&__IPSBAR[0x1A0010 + ((x)*0x2)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTIOS */\r
-#define MCF_GPTA_GPTIOS_IOS0 (0x1)\r
-#define MCF_GPTA_GPTIOS_IOS1 (0x2)\r
-#define MCF_GPTA_GPTIOS_IOS2 (0x4)\r
-#define MCF_GPTA_GPTIOS_IOS3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTCFORC */\r
-#define MCF_GPTA_GPTCFORC_FOC0 (0x1)\r
-#define MCF_GPTA_GPTCFORC_FOC1 (0x2)\r
-#define MCF_GPTA_GPTCFORC_FOC2 (0x4)\r
-#define MCF_GPTA_GPTCFORC_FOC3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTOC3M */\r
-#define MCF_GPTA_GPTOC3M_OC3M0 (0x1)\r
-#define MCF_GPTA_GPTOC3M_OC3M1 (0x2)\r
-#define MCF_GPTA_GPTOC3M_OC3M2 (0x4)\r
-#define MCF_GPTA_GPTOC3M_OC3M3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTOC3D */\r
-#define MCF_GPTA_GPTOC3D_OC3D0 (0x1)\r
-#define MCF_GPTA_GPTOC3D_OC3D1 (0x2)\r
-#define MCF_GPTA_GPTOC3D_OC3D2 (0x4)\r
-#define MCF_GPTA_GPTOC3D_OC3D3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTCNT */\r
-#define MCF_GPTA_GPTCNT_CNTR(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTSCR1 */\r
-#define MCF_GPTA_GPTSCR1_TFFCA (0x10)\r
-#define MCF_GPTA_GPTSCR1_GPTEN (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTTOV */\r
-#define MCF_GPTA_GPTTOV_TOV0 (0x1)\r
-#define MCF_GPTA_GPTTOV_TOV1 (0x2)\r
-#define MCF_GPTA_GPTTOV_TOV2 (0x4)\r
-#define MCF_GPTA_GPTTOV_TOV3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTCTL1 */\r
-#define MCF_GPTA_GPTCTL1_OL0 (0x1)\r
-#define MCF_GPTA_GPTCTL1_OM0 (0x2)\r
-#define MCF_GPTA_GPTCTL1_OL1 (0x4)\r
-#define MCF_GPTA_GPTCTL1_OM1 (0x8)\r
-#define MCF_GPTA_GPTCTL1_OL2 (0x10)\r
-#define MCF_GPTA_GPTCTL1_OM2 (0x20)\r
-#define MCF_GPTA_GPTCTL1_OL3 (0x40)\r
-#define MCF_GPTA_GPTCTL1_OM3 (0x80)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT0_NOTHING (0)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT0_TOGGLE (0x1)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT0_CLEAR (0x2)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT0_SET (0x3)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT1_NOTHING (0)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT1_TOGGLE (0x4)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT1_CLEAR (0x8)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT1_SET (0xC)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT2_NOTHING (0)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT2_TOGGLE (0x10)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT2_CLEAR (0x20)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT2_SET (0x30)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT3_NOTHING (0)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT3_TOGGLE (0x40)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT3_CLEAR (0x80)\r
-#define MCF_GPTA_GPTCTL1_OUTPUT3_SET (0xC0)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTCTL2 */\r
-#define MCF_GPTA_GPTCTL2_EDG0A (0x1)\r
-#define MCF_GPTA_GPTCTL2_EDG0B (0x2)\r
-#define MCF_GPTA_GPTCTL2_EDG1A (0x4)\r
-#define MCF_GPTA_GPTCTL2_EDG1B (0x8)\r
-#define MCF_GPTA_GPTCTL2_EDG2A (0x10)\r
-#define MCF_GPTA_GPTCTL2_EDG2B (0x20)\r
-#define MCF_GPTA_GPTCTL2_EDG3A (0x40)\r
-#define MCF_GPTA_GPTCTL2_EDG3B (0x80)\r
-#define MCF_GPTA_GPTCTL2_INPUT0_DISABLED (0)\r
-#define MCF_GPTA_GPTCTL2_INPUT0_RISING (0x1)\r
-#define MCF_GPTA_GPTCTL2_INPUT0_FALLING (0x2)\r
-#define MCF_GPTA_GPTCTL2_INPUT0_ANY (0x3)\r
-#define MCF_GPTA_GPTCTL2_INPUT1_DISABLED (0)\r
-#define MCF_GPTA_GPTCTL2_INPUT1_RISING (0x4)\r
-#define MCF_GPTA_GPTCTL2_INPUT1_FALLING (0x8)\r
-#define MCF_GPTA_GPTCTL2_INPUT1_ANY (0xC)\r
-#define MCF_GPTA_GPTCTL2_INPUT2_DISABLED (0)\r
-#define MCF_GPTA_GPTCTL2_INPUT2_RISING (0x10)\r
-#define MCF_GPTA_GPTCTL2_INPUT2_FALLING (0x20)\r
-#define MCF_GPTA_GPTCTL2_INPUT2_ANY (0x30)\r
-#define MCF_GPTA_GPTCTL2_INPUT3_DISABLED (0)\r
-#define MCF_GPTA_GPTCTL2_INPUT3_RISING (0x40)\r
-#define MCF_GPTA_GPTCTL2_INPUT3_FALLING (0x80)\r
-#define MCF_GPTA_GPTCTL2_INPUT3_ANY (0xC0)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTIE */\r
-#define MCF_GPTA_GPTIE_CI0 (0x1)\r
-#define MCF_GPTA_GPTIE_CI1 (0x2)\r
-#define MCF_GPTA_GPTIE_CI2 (0x4)\r
-#define MCF_GPTA_GPTIE_CI3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTSCR2 */\r
-#define MCF_GPTA_GPTSCR2_PR(x) (((x)&0x7)<<0)\r
-#define MCF_GPTA_GPTSCR2_PR_1 (0)\r
-#define MCF_GPTA_GPTSCR2_PR_2 (0x1)\r
-#define MCF_GPTA_GPTSCR2_PR_4 (0x2)\r
-#define MCF_GPTA_GPTSCR2_PR_8 (0x3)\r
-#define MCF_GPTA_GPTSCR2_PR_16 (0x4)\r
-#define MCF_GPTA_GPTSCR2_PR_32 (0x5)\r
-#define MCF_GPTA_GPTSCR2_PR_64 (0x6)\r
-#define MCF_GPTA_GPTSCR2_PR_128 (0x7)\r
-#define MCF_GPTA_GPTSCR2_TCRE (0x8)\r
-#define MCF_GPTA_GPTSCR2_RDPT (0x10)\r
-#define MCF_GPTA_GPTSCR2_PUPT (0x20)\r
-#define MCF_GPTA_GPTSCR2_TOI (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTFLG1 */\r
-#define MCF_GPTA_GPTFLG1_CF0 (0x1)\r
-#define MCF_GPTA_GPTFLG1_CF1 (0x2)\r
-#define MCF_GPTA_GPTFLG1_CF2 (0x4)\r
-#define MCF_GPTA_GPTFLG1_CF3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTFLG2 */\r
-#define MCF_GPTA_GPTFLG2_TOF (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTC */\r
-#define MCF_GPTA_GPTC_CCNT(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTPACTL */\r
-#define MCF_GPTA_GPTPACTL_PAI (0x1)\r
-#define MCF_GPTA_GPTPACTL_PAOVI (0x2)\r
-#define MCF_GPTA_GPTPACTL_CLK(x) (((x)&0x3)<<0x2)\r
-#define MCF_GPTA_GPTPACTL_CLK_GPTPR (0)\r
-#define MCF_GPTA_GPTPACTL_CLK_PACLK (0x1)\r
-#define MCF_GPTA_GPTPACTL_CLK_PACLK_256 (0x2)\r
-#define MCF_GPTA_GPTPACTL_CLK_PACLK_65536 (0x3)\r
-#define MCF_GPTA_GPTPACTL_PEDGE (0x10)\r
-#define MCF_GPTA_GPTPACTL_PAMOD (0x20)\r
-#define MCF_GPTA_GPTPACTL_PAE (0x40)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTPAFLG */\r
-#define MCF_GPTA_GPTPAFLG_PAIF (0x1)\r
-#define MCF_GPTA_GPTPAFLG_PAOVF (0x2)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTPACNT */\r
-#define MCF_GPTA_GPTPACNT_PACNT(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTPORT */\r
-#define MCF_GPTA_GPTPORT_PORTT0 (0x1)\r
-#define MCF_GPTA_GPTPORT_PORTT1 (0x2)\r
-#define MCF_GPTA_GPTPORT_PORTT2 (0x4)\r
-#define MCF_GPTA_GPTPORT_PORTT3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTA_GPTDDR */\r
-#define MCF_GPTA_GPTDDR_DDRT0 (0x1)\r
-#define MCF_GPTA_GPTDDR_DDRT1 (0x2)\r
-#define MCF_GPTA_GPTDDR_DDRT2 (0x4)\r
-#define MCF_GPTA_GPTDDR_DDRT3 (0x8)\r
-\r
-\r
-#endif /* __MCF5282_GPTA_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_GPTB_H__\r
-#define __MCF5282_GPTB_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* General Purpose Timer Module (GPT)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_GPTB_GPTIOS (*(vuint8 *)(&__IPSBAR[0x1B0000]))\r
-#define MCF_GPTB_GPTCFORC (*(vuint8 *)(&__IPSBAR[0x1B0001]))\r
-#define MCF_GPTB_GPTOC3M (*(vuint8 *)(&__IPSBAR[0x1B0002]))\r
-#define MCF_GPTB_GPTOC3D (*(vuint8 *)(&__IPSBAR[0x1B0003]))\r
-#define MCF_GPTB_GPTCNT (*(vuint16*)(&__IPSBAR[0x1B0004]))\r
-#define MCF_GPTB_GPTSCR1 (*(vuint8 *)(&__IPSBAR[0x1B0006]))\r
-#define MCF_GPTB_GPTTOV (*(vuint8 *)(&__IPSBAR[0x1B0008]))\r
-#define MCF_GPTB_GPTCTL1 (*(vuint8 *)(&__IPSBAR[0x1B0009]))\r
-#define MCF_GPTB_GPTCTL2 (*(vuint8 *)(&__IPSBAR[0x1B000B]))\r
-#define MCF_GPTB_GPTIE (*(vuint8 *)(&__IPSBAR[0x1B000C]))\r
-#define MCF_GPTB_GPTSCR2 (*(vuint8 *)(&__IPSBAR[0x1B000D]))\r
-#define MCF_GPTB_GPTFLG1 (*(vuint8 *)(&__IPSBAR[0x1B000E]))\r
-#define MCF_GPTB_GPTFLG2 (*(vuint8 *)(&__IPSBAR[0x1B000F]))\r
-#define MCF_GPTB_GPTC0 (*(vuint16*)(&__IPSBAR[0x1B0010]))\r
-#define MCF_GPTB_GPTC1 (*(vuint16*)(&__IPSBAR[0x1B0012]))\r
-#define MCF_GPTB_GPTC2 (*(vuint16*)(&__IPSBAR[0x1B0014]))\r
-#define MCF_GPTB_GPTC3 (*(vuint16*)(&__IPSBAR[0x1B0016]))\r
-#define MCF_GPTB_GPTPACTL (*(vuint8 *)(&__IPSBAR[0x1B0018]))\r
-#define MCF_GPTB_GPTPAFLG (*(vuint8 *)(&__IPSBAR[0x1B0019]))\r
-#define MCF_GPTB_GPTPACNT (*(vuint16*)(&__IPSBAR[0x1B001A]))\r
-#define MCF_GPTB_GPTPORT (*(vuint8 *)(&__IPSBAR[0x1B001D]))\r
-#define MCF_GPTB_GPTDDR (*(vuint8 *)(&__IPSBAR[0x1B001E]))\r
-#define MCF_GPTB_GPTC(x) (*(vuint16*)(&__IPSBAR[0x1B0010 + ((x)*0x2)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTIOS */\r
-#define MCF_GPTB_GPTIOS_IOS0 (0x1)\r
-#define MCF_GPTB_GPTIOS_IOS1 (0x2)\r
-#define MCF_GPTB_GPTIOS_IOS2 (0x4)\r
-#define MCF_GPTB_GPTIOS_IOS3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTCFORC */\r
-#define MCF_GPTB_GPTCFORC_FOC0 (0x1)\r
-#define MCF_GPTB_GPTCFORC_FOC1 (0x2)\r
-#define MCF_GPTB_GPTCFORC_FOC2 (0x4)\r
-#define MCF_GPTB_GPTCFORC_FOC3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTOC3M */\r
-#define MCF_GPTB_GPTOC3M_OC3M0 (0x1)\r
-#define MCF_GPTB_GPTOC3M_OC3M1 (0x2)\r
-#define MCF_GPTB_GPTOC3M_OC3M2 (0x4)\r
-#define MCF_GPTB_GPTOC3M_OC3M3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTOC3D */\r
-#define MCF_GPTB_GPTOC3D_OC3D0 (0x1)\r
-#define MCF_GPTB_GPTOC3D_OC3D1 (0x2)\r
-#define MCF_GPTB_GPTOC3D_OC3D2 (0x4)\r
-#define MCF_GPTB_GPTOC3D_OC3D3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTCNT */\r
-#define MCF_GPTB_GPTCNT_CNTR(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTSCR1 */\r
-#define MCF_GPTB_GPTSCR1_TFFCA (0x10)\r
-#define MCF_GPTB_GPTSCR1_GPTEN (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTTOV */\r
-#define MCF_GPTB_GPTTOV_TOV0 (0x1)\r
-#define MCF_GPTB_GPTTOV_TOV1 (0x2)\r
-#define MCF_GPTB_GPTTOV_TOV2 (0x4)\r
-#define MCF_GPTB_GPTTOV_TOV3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTCTL1 */\r
-#define MCF_GPTB_GPTCTL1_OL0 (0x1)\r
-#define MCF_GPTB_GPTCTL1_OM0 (0x2)\r
-#define MCF_GPTB_GPTCTL1_OL1 (0x4)\r
-#define MCF_GPTB_GPTCTL1_OM1 (0x8)\r
-#define MCF_GPTB_GPTCTL1_OL2 (0x10)\r
-#define MCF_GPTB_GPTCTL1_OM2 (0x20)\r
-#define MCF_GPTB_GPTCTL1_OL3 (0x40)\r
-#define MCF_GPTB_GPTCTL1_OM3 (0x80)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT0_NOTHING (0)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT0_TOGGLE (0x1)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT0_CLEAR (0x2)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT0_SET (0x3)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT1_NOTHING (0)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT1_TOGGLE (0x4)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT1_CLEAR (0x8)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT1_SET (0xC)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT2_NOTHING (0)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT2_TOGGLE (0x10)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT2_CLEAR (0x20)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT2_SET (0x30)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT3_NOTHING (0)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT3_TOGGLE (0x40)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT3_CLEAR (0x80)\r
-#define MCF_GPTB_GPTCTL1_OUTPUT3_SET (0xC0)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTCTL2 */\r
-#define MCF_GPTB_GPTCTL2_EDG0A (0x1)\r
-#define MCF_GPTB_GPTCTL2_EDG0B (0x2)\r
-#define MCF_GPTB_GPTCTL2_EDG1A (0x4)\r
-#define MCF_GPTB_GPTCTL2_EDG1B (0x8)\r
-#define MCF_GPTB_GPTCTL2_EDG2A (0x10)\r
-#define MCF_GPTB_GPTCTL2_EDG2B (0x20)\r
-#define MCF_GPTB_GPTCTL2_EDG3A (0x40)\r
-#define MCF_GPTB_GPTCTL2_EDG3B (0x80)\r
-#define MCF_GPTB_GPTCTL2_INPUT0_DISABLED (0)\r
-#define MCF_GPTB_GPTCTL2_INPUT0_RISING (0x1)\r
-#define MCF_GPTB_GPTCTL2_INPUT0_FALLING (0x2)\r
-#define MCF_GPTB_GPTCTL2_INPUT0_ANY (0x3)\r
-#define MCF_GPTB_GPTCTL2_INPUT1_DISABLED (0)\r
-#define MCF_GPTB_GPTCTL2_INPUT1_RISING (0x4)\r
-#define MCF_GPTB_GPTCTL2_INPUT1_FALLING (0x8)\r
-#define MCF_GPTB_GPTCTL2_INPUT1_ANY (0xC)\r
-#define MCF_GPTB_GPTCTL2_INPUT2_DISABLED (0)\r
-#define MCF_GPTB_GPTCTL2_INPUT2_RISING (0x10)\r
-#define MCF_GPTB_GPTCTL2_INPUT2_FALLING (0x20)\r
-#define MCF_GPTB_GPTCTL2_INPUT2_ANY (0x30)\r
-#define MCF_GPTB_GPTCTL2_INPUT3_DISABLED (0)\r
-#define MCF_GPTB_GPTCTL2_INPUT3_RISING (0x40)\r
-#define MCF_GPTB_GPTCTL2_INPUT3_FALLING (0x80)\r
-#define MCF_GPTB_GPTCTL2_INPUT3_ANY (0xC0)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTIE */\r
-#define MCF_GPTB_GPTIE_CI0 (0x1)\r
-#define MCF_GPTB_GPTIE_CI1 (0x2)\r
-#define MCF_GPTB_GPTIE_CI2 (0x4)\r
-#define MCF_GPTB_GPTIE_CI3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTSCR2 */\r
-#define MCF_GPTB_GPTSCR2_PR(x) (((x)&0x7)<<0)\r
-#define MCF_GPTB_GPTSCR2_PR_1 (0)\r
-#define MCF_GPTB_GPTSCR2_PR_2 (0x1)\r
-#define MCF_GPTB_GPTSCR2_PR_4 (0x2)\r
-#define MCF_GPTB_GPTSCR2_PR_8 (0x3)\r
-#define MCF_GPTB_GPTSCR2_PR_16 (0x4)\r
-#define MCF_GPTB_GPTSCR2_PR_32 (0x5)\r
-#define MCF_GPTB_GPTSCR2_PR_64 (0x6)\r
-#define MCF_GPTB_GPTSCR2_PR_128 (0x7)\r
-#define MCF_GPTB_GPTSCR2_TCRE (0x8)\r
-#define MCF_GPTB_GPTSCR2_RDPT (0x10)\r
-#define MCF_GPTB_GPTSCR2_PUPT (0x20)\r
-#define MCF_GPTB_GPTSCR2_TOI (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTFLG1 */\r
-#define MCF_GPTB_GPTFLG1_CF0 (0x1)\r
-#define MCF_GPTB_GPTFLG1_CF1 (0x2)\r
-#define MCF_GPTB_GPTFLG1_CF2 (0x4)\r
-#define MCF_GPTB_GPTFLG1_CF3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTFLG2 */\r
-#define MCF_GPTB_GPTFLG2_TOF (0x80)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTC */\r
-#define MCF_GPTB_GPTC_CCNT(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTPACTL */\r
-#define MCF_GPTB_GPTPACTL_PAI (0x1)\r
-#define MCF_GPTB_GPTPACTL_PAOVI (0x2)\r
-#define MCF_GPTB_GPTPACTL_CLK(x) (((x)&0x3)<<0x2)\r
-#define MCF_GPTB_GPTPACTL_CLK_GPTPR (0)\r
-#define MCF_GPTB_GPTPACTL_CLK_PACLK (0x1)\r
-#define MCF_GPTB_GPTPACTL_CLK_PACLK_256 (0x2)\r
-#define MCF_GPTB_GPTPACTL_CLK_PACLK_65536 (0x3)\r
-#define MCF_GPTB_GPTPACTL_PEDGE (0x10)\r
-#define MCF_GPTB_GPTPACTL_PAMOD (0x20)\r
-#define MCF_GPTB_GPTPACTL_PAE (0x40)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTPAFLG */\r
-#define MCF_GPTB_GPTPAFLG_PAIF (0x1)\r
-#define MCF_GPTB_GPTPAFLG_PAOVF (0x2)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTPACNT */\r
-#define MCF_GPTB_GPTPACNT_PACNT(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTPORT */\r
-#define MCF_GPTB_GPTPORT_PORTT0 (0x1)\r
-#define MCF_GPTB_GPTPORT_PORTT1 (0x2)\r
-#define MCF_GPTB_GPTPORT_PORTT2 (0x4)\r
-#define MCF_GPTB_GPTPORT_PORTT3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_GPTB_GPTDDR */\r
-#define MCF_GPTB_GPTDDR_DDRT0 (0x1)\r
-#define MCF_GPTB_GPTDDR_DDRT1 (0x2)\r
-#define MCF_GPTB_GPTDDR_DDRT2 (0x4)\r
-#define MCF_GPTB_GPTDDR_DDRT3 (0x8)\r
-\r
-\r
-#endif /* __MCF5282_GPTB_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_I2C_H__\r
-#define __MCF5282_I2C_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* I2C Module (I2C)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_I2C_I2ADR (*(vuint8 *)(&__IPSBAR[0x300]))\r
-#define MCF_I2C_I2FDR (*(vuint8 *)(&__IPSBAR[0x304]))\r
-#define MCF_I2C_I2CR (*(vuint8 *)(&__IPSBAR[0x308]))\r
-#define MCF_I2C_I2SR (*(vuint8 *)(&__IPSBAR[0x30C]))\r
-#define MCF_I2C_I2DR (*(vuint8 *)(&__IPSBAR[0x310]))\r
-\r
-\r
-\r
-/* Bit definitions and macros for MCF_I2C_I2ADR */\r
-#define MCF_I2C_I2ADR_ADR(x) (((x)&0x7F)<<0x1)\r
-\r
-/* Bit definitions and macros for MCF_I2C_I2FDR */\r
-#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0)\r
-\r
-/* Bit definitions and macros for MCF_I2C_I2CR */\r
-#define MCF_I2C_I2CR_RSTA (0x4)\r
-#define MCF_I2C_I2CR_TXAK (0x8)\r
-#define MCF_I2C_I2CR_MTX (0x10)\r
-#define MCF_I2C_I2CR_MSTA (0x20)\r
-#define MCF_I2C_I2CR_IIEN (0x40)\r
-#define MCF_I2C_I2CR_IEN (0x80)\r
-\r
-/* Bit definitions and macros for MCF_I2C_I2SR */\r
-#define MCF_I2C_I2SR_RXAK (0x1)\r
-#define MCF_I2C_I2SR_IIF (0x2)\r
-#define MCF_I2C_I2SR_SRW (0x4)\r
-#define MCF_I2C_I2SR_IAL (0x10)\r
-#define MCF_I2C_I2SR_IBB (0x20)\r
-#define MCF_I2C_I2SR_IAAS (0x40)\r
-#define MCF_I2C_I2SR_ICF (0x80)\r
-\r
-/* Bit definitions and macros for MCF_I2C_I2DR */\r
-#define MCF_I2C_I2DR_DATA(x) (((x)&0xFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_I2C_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_INTC_H__\r
-#define __MCF5282_INTC_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Interrupt Controller (INTC)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_INTC0_IPRH (*(vuint32*)(&__IPSBAR[0xC00]))\r
-#define MCF_INTC0_IPRL (*(vuint32*)(&__IPSBAR[0xC04]))\r
-#define MCF_INTC0_IMRH (*(vuint32*)(&__IPSBAR[0xC08]))\r
-#define MCF_INTC0_IMRL (*(vuint32*)(&__IPSBAR[0xC0C]))\r
-#define MCF_INTC0_INTFRCH (*(vuint32*)(&__IPSBAR[0xC10]))\r
-#define MCF_INTC0_INTFRCL (*(vuint32*)(&__IPSBAR[0xC14]))\r
-#define MCF_INTC0_IRLR (*(vuint8 *)(&__IPSBAR[0xC18]))\r
-#define MCF_INTC0_IACKLPR (*(vuint8 *)(&__IPSBAR[0xC19]))\r
-#define MCF_INTC0_ICR01 (*(vuint8 *)(&__IPSBAR[0xC41]))\r
-#define MCF_INTC0_ICR02 (*(vuint8 *)(&__IPSBAR[0xC42]))\r
-#define MCF_INTC0_ICR03 (*(vuint8 *)(&__IPSBAR[0xC43]))\r
-#define MCF_INTC0_ICR04 (*(vuint8 *)(&__IPSBAR[0xC44]))\r
-#define MCF_INTC0_ICR05 (*(vuint8 *)(&__IPSBAR[0xC45]))\r
-#define MCF_INTC0_ICR06 (*(vuint8 *)(&__IPSBAR[0xC46]))\r
-#define MCF_INTC0_ICR07 (*(vuint8 *)(&__IPSBAR[0xC47]))\r
-#define MCF_INTC0_ICR08 (*(vuint8 *)(&__IPSBAR[0xC48]))\r
-#define MCF_INTC0_ICR09 (*(vuint8 *)(&__IPSBAR[0xC49]))\r
-#define MCF_INTC0_ICR10 (*(vuint8 *)(&__IPSBAR[0xC4A]))\r
-#define MCF_INTC0_ICR11 (*(vuint8 *)(&__IPSBAR[0xC4B]))\r
-#define MCF_INTC0_ICR12 (*(vuint8 *)(&__IPSBAR[0xC4C]))\r
-#define MCF_INTC0_ICR13 (*(vuint8 *)(&__IPSBAR[0xC4D]))\r
-#define MCF_INTC0_ICR14 (*(vuint8 *)(&__IPSBAR[0xC4E]))\r
-#define MCF_INTC0_ICR15 (*(vuint8 *)(&__IPSBAR[0xC4F]))\r
-#define MCF_INTC0_ICR16 (*(vuint8 *)(&__IPSBAR[0xC50]))\r
-#define MCF_INTC0_ICR17 (*(vuint8 *)(&__IPSBAR[0xC51]))\r
-#define MCF_INTC0_ICR18 (*(vuint8 *)(&__IPSBAR[0xC52]))\r
-#define MCF_INTC0_ICR19 (*(vuint8 *)(&__IPSBAR[0xC53]))\r
-#define MCF_INTC0_ICR20 (*(vuint8 *)(&__IPSBAR[0xC54]))\r
-#define MCF_INTC0_ICR21 (*(vuint8 *)(&__IPSBAR[0xC55]))\r
-#define MCF_INTC0_ICR22 (*(vuint8 *)(&__IPSBAR[0xC56]))\r
-#define MCF_INTC0_ICR23 (*(vuint8 *)(&__IPSBAR[0xC57]))\r
-#define MCF_INTC0_ICR24 (*(vuint8 *)(&__IPSBAR[0xC58]))\r
-#define MCF_INTC0_ICR25 (*(vuint8 *)(&__IPSBAR[0xC59]))\r
-#define MCF_INTC0_ICR26 (*(vuint8 *)(&__IPSBAR[0xC5A]))\r
-#define MCF_INTC0_ICR27 (*(vuint8 *)(&__IPSBAR[0xC5B]))\r
-#define MCF_INTC0_ICR28 (*(vuint8 *)(&__IPSBAR[0xC5C]))\r
-#define MCF_INTC0_ICR29 (*(vuint8 *)(&__IPSBAR[0xC5D]))\r
-#define MCF_INTC0_ICR30 (*(vuint8 *)(&__IPSBAR[0xC5E]))\r
-#define MCF_INTC0_ICR31 (*(vuint8 *)(&__IPSBAR[0xC5F]))\r
-#define MCF_INTC0_ICR32 (*(vuint8 *)(&__IPSBAR[0xC60]))\r
-#define MCF_INTC0_ICR33 (*(vuint8 *)(&__IPSBAR[0xC61]))\r
-#define MCF_INTC0_ICR34 (*(vuint8 *)(&__IPSBAR[0xC62]))\r
-#define MCF_INTC0_ICR35 (*(vuint8 *)(&__IPSBAR[0xC63]))\r
-#define MCF_INTC0_ICR36 (*(vuint8 *)(&__IPSBAR[0xC64]))\r
-#define MCF_INTC0_ICR37 (*(vuint8 *)(&__IPSBAR[0xC65]))\r
-#define MCF_INTC0_ICR38 (*(vuint8 *)(&__IPSBAR[0xC66]))\r
-#define MCF_INTC0_ICR39 (*(vuint8 *)(&__IPSBAR[0xC67]))\r
-#define MCF_INTC0_ICR40 (*(vuint8 *)(&__IPSBAR[0xC68]))\r
-#define MCF_INTC0_ICR41 (*(vuint8 *)(&__IPSBAR[0xC69]))\r
-#define MCF_INTC0_ICR42 (*(vuint8 *)(&__IPSBAR[0xC6A]))\r
-#define MCF_INTC0_ICR43 (*(vuint8 *)(&__IPSBAR[0xC6B]))\r
-#define MCF_INTC0_ICR44 (*(vuint8 *)(&__IPSBAR[0xC6C]))\r
-#define MCF_INTC0_ICR45 (*(vuint8 *)(&__IPSBAR[0xC6D]))\r
-#define MCF_INTC0_ICR46 (*(vuint8 *)(&__IPSBAR[0xC6E]))\r
-#define MCF_INTC0_ICR47 (*(vuint8 *)(&__IPSBAR[0xC6F]))\r
-#define MCF_INTC0_ICR48 (*(vuint8 *)(&__IPSBAR[0xC70]))\r
-#define MCF_INTC0_ICR49 (*(vuint8 *)(&__IPSBAR[0xC71]))\r
-#define MCF_INTC0_ICR50 (*(vuint8 *)(&__IPSBAR[0xC72]))\r
-#define MCF_INTC0_ICR51 (*(vuint8 *)(&__IPSBAR[0xC73]))\r
-#define MCF_INTC0_ICR52 (*(vuint8 *)(&__IPSBAR[0xC74]))\r
-#define MCF_INTC0_ICR53 (*(vuint8 *)(&__IPSBAR[0xC75]))\r
-#define MCF_INTC0_ICR54 (*(vuint8 *)(&__IPSBAR[0xC76]))\r
-#define MCF_INTC0_ICR55 (*(vuint8 *)(&__IPSBAR[0xC77]))\r
-#define MCF_INTC0_ICR56 (*(vuint8 *)(&__IPSBAR[0xC78]))\r
-#define MCF_INTC0_ICR57 (*(vuint8 *)(&__IPSBAR[0xC79]))\r
-#define MCF_INTC0_ICR58 (*(vuint8 *)(&__IPSBAR[0xC7A]))\r
-#define MCF_INTC0_ICR59 (*(vuint8 *)(&__IPSBAR[0xC7B]))\r
-#define MCF_INTC0_ICR60 (*(vuint8 *)(&__IPSBAR[0xC7C]))\r
-#define MCF_INTC0_ICR61 (*(vuint8 *)(&__IPSBAR[0xC7D]))\r
-#define MCF_INTC0_ICR62 (*(vuint8 *)(&__IPSBAR[0xC7E]))\r
-#define MCF_INTC0_ICR63 (*(vuint8 *)(&__IPSBAR[0xC7F]))\r
-#define MCF_INTC0_SWIACK (*(vuint8 *)(&__IPSBAR[0xCE0]))\r
-#define MCF_INTC0_L1IACK (*(vuint8 *)(&__IPSBAR[0xCE4]))\r
-#define MCF_INTC0_L2IACK (*(vuint8 *)(&__IPSBAR[0xCE8]))\r
-#define MCF_INTC0_L3IACK (*(vuint8 *)(&__IPSBAR[0xCEC]))\r
-#define MCF_INTC0_L4IACK (*(vuint8 *)(&__IPSBAR[0xCF0]))\r
-#define MCF_INTC0_L5IACK (*(vuint8 *)(&__IPSBAR[0xCF4]))\r
-#define MCF_INTC0_L6IACK (*(vuint8 *)(&__IPSBAR[0xCF8]))\r
-#define MCF_INTC0_L7IACK (*(vuint8 *)(&__IPSBAR[0xCFC]))\r
-#define MCF_INTC0_ICR(x) (*(vuint8 *)(&__IPSBAR[0xC41 + ((x-1)*0x1)]))\r
-#define MCF_INTC0_LIACK(x) (*(vuint8 *)(&__IPSBAR[0xCE4 + ((x-1)*0x4)]))\r
-\r
-#define MCF_INTC1_IPRH (*(vuint32*)(&__IPSBAR[0xD00]))\r
-#define MCF_INTC1_IPRL (*(vuint32*)(&__IPSBAR[0xD04]))\r
-#define MCF_INTC1_IMRH (*(vuint32*)(&__IPSBAR[0xD08]))\r
-#define MCF_INTC1_IMRL (*(vuint32*)(&__IPSBAR[0xD0C]))\r
-#define MCF_INTC1_INTFRCH (*(vuint32*)(&__IPSBAR[0xD10]))\r
-#define MCF_INTC1_INTFRCL (*(vuint32*)(&__IPSBAR[0xD14]))\r
-#define MCF_INTC1_IRLR (*(vuint8 *)(&__IPSBAR[0xD18]))\r
-#define MCF_INTC1_IACKLPR (*(vuint8 *)(&__IPSBAR[0xD19]))\r
-#define MCF_INTC1_ICR01 (*(vuint8 *)(&__IPSBAR[0xD41]))\r
-#define MCF_INTC1_ICR02 (*(vuint8 *)(&__IPSBAR[0xD42]))\r
-#define MCF_INTC1_ICR03 (*(vuint8 *)(&__IPSBAR[0xD43]))\r
-#define MCF_INTC1_ICR04 (*(vuint8 *)(&__IPSBAR[0xD44]))\r
-#define MCF_INTC1_ICR05 (*(vuint8 *)(&__IPSBAR[0xD45]))\r
-#define MCF_INTC1_ICR06 (*(vuint8 *)(&__IPSBAR[0xD46]))\r
-#define MCF_INTC1_ICR07 (*(vuint8 *)(&__IPSBAR[0xD47]))\r
-#define MCF_INTC1_ICR08 (*(vuint8 *)(&__IPSBAR[0xD48]))\r
-#define MCF_INTC1_ICR09 (*(vuint8 *)(&__IPSBAR[0xD49]))\r
-#define MCF_INTC1_ICR10 (*(vuint8 *)(&__IPSBAR[0xD4A]))\r
-#define MCF_INTC1_ICR11 (*(vuint8 *)(&__IPSBAR[0xD4B]))\r
-#define MCF_INTC1_ICR12 (*(vuint8 *)(&__IPSBAR[0xD4C]))\r
-#define MCF_INTC1_ICR13 (*(vuint8 *)(&__IPSBAR[0xD4D]))\r
-#define MCF_INTC1_ICR14 (*(vuint8 *)(&__IPSBAR[0xD4E]))\r
-#define MCF_INTC1_ICR15 (*(vuint8 *)(&__IPSBAR[0xD4F]))\r
-#define MCF_INTC1_ICR16 (*(vuint8 *)(&__IPSBAR[0xD50]))\r
-#define MCF_INTC1_ICR17 (*(vuint8 *)(&__IPSBAR[0xD51]))\r
-#define MCF_INTC1_ICR18 (*(vuint8 *)(&__IPSBAR[0xD52]))\r
-#define MCF_INTC1_ICR19 (*(vuint8 *)(&__IPSBAR[0xD53]))\r
-#define MCF_INTC1_ICR20 (*(vuint8 *)(&__IPSBAR[0xD54]))\r
-#define MCF_INTC1_ICR21 (*(vuint8 *)(&__IPSBAR[0xD55]))\r
-#define MCF_INTC1_ICR22 (*(vuint8 *)(&__IPSBAR[0xD56]))\r
-#define MCF_INTC1_ICR23 (*(vuint8 *)(&__IPSBAR[0xD57]))\r
-#define MCF_INTC1_ICR24 (*(vuint8 *)(&__IPSBAR[0xD58]))\r
-#define MCF_INTC1_ICR25 (*(vuint8 *)(&__IPSBAR[0xD59]))\r
-#define MCF_INTC1_ICR26 (*(vuint8 *)(&__IPSBAR[0xD5A]))\r
-#define MCF_INTC1_ICR27 (*(vuint8 *)(&__IPSBAR[0xD5B]))\r
-#define MCF_INTC1_ICR28 (*(vuint8 *)(&__IPSBAR[0xD5C]))\r
-#define MCF_INTC1_ICR29 (*(vuint8 *)(&__IPSBAR[0xD5D]))\r
-#define MCF_INTC1_ICR30 (*(vuint8 *)(&__IPSBAR[0xD5E]))\r
-#define MCF_INTC1_ICR31 (*(vuint8 *)(&__IPSBAR[0xD5F]))\r
-#define MCF_INTC1_ICR32 (*(vuint8 *)(&__IPSBAR[0xD60]))\r
-#define MCF_INTC1_ICR33 (*(vuint8 *)(&__IPSBAR[0xD61]))\r
-#define MCF_INTC1_ICR34 (*(vuint8 *)(&__IPSBAR[0xD62]))\r
-#define MCF_INTC1_ICR35 (*(vuint8 *)(&__IPSBAR[0xD63]))\r
-#define MCF_INTC1_ICR36 (*(vuint8 *)(&__IPSBAR[0xD64]))\r
-#define MCF_INTC1_ICR37 (*(vuint8 *)(&__IPSBAR[0xD65]))\r
-#define MCF_INTC1_ICR38 (*(vuint8 *)(&__IPSBAR[0xD66]))\r
-#define MCF_INTC1_ICR39 (*(vuint8 *)(&__IPSBAR[0xD67]))\r
-#define MCF_INTC1_ICR40 (*(vuint8 *)(&__IPSBAR[0xD68]))\r
-#define MCF_INTC1_ICR41 (*(vuint8 *)(&__IPSBAR[0xD69]))\r
-#define MCF_INTC1_ICR42 (*(vuint8 *)(&__IPSBAR[0xD6A]))\r
-#define MCF_INTC1_ICR43 (*(vuint8 *)(&__IPSBAR[0xD6B]))\r
-#define MCF_INTC1_ICR44 (*(vuint8 *)(&__IPSBAR[0xD6C]))\r
-#define MCF_INTC1_ICR45 (*(vuint8 *)(&__IPSBAR[0xD6D]))\r
-#define MCF_INTC1_ICR46 (*(vuint8 *)(&__IPSBAR[0xD6E]))\r
-#define MCF_INTC1_ICR47 (*(vuint8 *)(&__IPSBAR[0xD6F]))\r
-#define MCF_INTC1_ICR48 (*(vuint8 *)(&__IPSBAR[0xD70]))\r
-#define MCF_INTC1_ICR49 (*(vuint8 *)(&__IPSBAR[0xD71]))\r
-#define MCF_INTC1_ICR50 (*(vuint8 *)(&__IPSBAR[0xD72]))\r
-#define MCF_INTC1_ICR51 (*(vuint8 *)(&__IPSBAR[0xD73]))\r
-#define MCF_INTC1_ICR52 (*(vuint8 *)(&__IPSBAR[0xD74]))\r
-#define MCF_INTC1_ICR53 (*(vuint8 *)(&__IPSBAR[0xD75]))\r
-#define MCF_INTC1_ICR54 (*(vuint8 *)(&__IPSBAR[0xD76]))\r
-#define MCF_INTC1_ICR55 (*(vuint8 *)(&__IPSBAR[0xD77]))\r
-#define MCF_INTC1_ICR56 (*(vuint8 *)(&__IPSBAR[0xD78]))\r
-#define MCF_INTC1_ICR57 (*(vuint8 *)(&__IPSBAR[0xD79]))\r
-#define MCF_INTC1_ICR58 (*(vuint8 *)(&__IPSBAR[0xD7A]))\r
-#define MCF_INTC1_ICR59 (*(vuint8 *)(&__IPSBAR[0xD7B]))\r
-#define MCF_INTC1_ICR60 (*(vuint8 *)(&__IPSBAR[0xD7C]))\r
-#define MCF_INTC1_ICR61 (*(vuint8 *)(&__IPSBAR[0xD7D]))\r
-#define MCF_INTC1_ICR62 (*(vuint8 *)(&__IPSBAR[0xD7E]))\r
-#define MCF_INTC1_ICR63 (*(vuint8 *)(&__IPSBAR[0xD7F]))\r
-#define MCF_INTC1_SWIACK (*(vuint8 *)(&__IPSBAR[0xDE0]))\r
-#define MCF_INTC1_L1IACK (*(vuint8 *)(&__IPSBAR[0xDE4]))\r
-#define MCF_INTC1_L2IACK (*(vuint8 *)(&__IPSBAR[0xDE8]))\r
-#define MCF_INTC1_L3IACK (*(vuint8 *)(&__IPSBAR[0xDEC]))\r
-#define MCF_INTC1_L4IACK (*(vuint8 *)(&__IPSBAR[0xDF0]))\r
-#define MCF_INTC1_L5IACK (*(vuint8 *)(&__IPSBAR[0xDF4]))\r
-#define MCF_INTC1_L6IACK (*(vuint8 *)(&__IPSBAR[0xDF8]))\r
-#define MCF_INTC1_L7IACK (*(vuint8 *)(&__IPSBAR[0xDFC]))\r
-#define MCF_INTC1_ICR(x) (*(vuint8 *)(&__IPSBAR[0xD41 + ((x-1)*0x1)]))\r
-#define MCF_INTC1_LIACK(x) (*(vuint8 *)(&__IPSBAR[0xDE4 + ((x-1)*0x4)]))\r
-\r
-#define MCF_INTC_IPRH(x) (*(vuint32*)(&__IPSBAR[0xC00 + ((x)*0x100)]))\r
-#define MCF_INTC_IPRL(x) (*(vuint32*)(&__IPSBAR[0xC04 + ((x)*0x100)]))\r
-#define MCF_INTC_IMRH(x) (*(vuint32*)(&__IPSBAR[0xC08 + ((x)*0x100)]))\r
-#define MCF_INTC_IMRL(x) (*(vuint32*)(&__IPSBAR[0xC0C + ((x)*0x100)]))\r
-#define MCF_INTC_INTFRCH(x) (*(vuint32*)(&__IPSBAR[0xC10 + ((x)*0x100)]))\r
-#define MCF_INTC_INTFRCL(x) (*(vuint32*)(&__IPSBAR[0xC14 + ((x)*0x100)]))\r
-#define MCF_INTC_IRLR(x) (*(vuint8 *)(&__IPSBAR[0xC18 + ((x)*0x100)]))\r
-#define MCF_INTC_IACKLPR(x) (*(vuint8 *)(&__IPSBAR[0xC19 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR01(x) (*(vuint8 *)(&__IPSBAR[0xC41 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR02(x) (*(vuint8 *)(&__IPSBAR[0xC42 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR03(x) (*(vuint8 *)(&__IPSBAR[0xC43 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR04(x) (*(vuint8 *)(&__IPSBAR[0xC44 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR05(x) (*(vuint8 *)(&__IPSBAR[0xC45 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR06(x) (*(vuint8 *)(&__IPSBAR[0xC46 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR07(x) (*(vuint8 *)(&__IPSBAR[0xC47 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR08(x) (*(vuint8 *)(&__IPSBAR[0xC48 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR09(x) (*(vuint8 *)(&__IPSBAR[0xC49 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR10(x) (*(vuint8 *)(&__IPSBAR[0xC4A + ((x)*0x100)]))\r
-#define MCF_INTC_ICR11(x) (*(vuint8 *)(&__IPSBAR[0xC4B + ((x)*0x100)]))\r
-#define MCF_INTC_ICR12(x) (*(vuint8 *)(&__IPSBAR[0xC4C + ((x)*0x100)]))\r
-#define MCF_INTC_ICR13(x) (*(vuint8 *)(&__IPSBAR[0xC4D + ((x)*0x100)]))\r
-#define MCF_INTC_ICR14(x) (*(vuint8 *)(&__IPSBAR[0xC4E + ((x)*0x100)]))\r
-#define MCF_INTC_ICR15(x) (*(vuint8 *)(&__IPSBAR[0xC4F + ((x)*0x100)]))\r
-#define MCF_INTC_ICR16(x) (*(vuint8 *)(&__IPSBAR[0xC50 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR17(x) (*(vuint8 *)(&__IPSBAR[0xC51 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR18(x) (*(vuint8 *)(&__IPSBAR[0xC52 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR19(x) (*(vuint8 *)(&__IPSBAR[0xC53 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR20(x) (*(vuint8 *)(&__IPSBAR[0xC54 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR21(x) (*(vuint8 *)(&__IPSBAR[0xC55 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR22(x) (*(vuint8 *)(&__IPSBAR[0xC56 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR23(x) (*(vuint8 *)(&__IPSBAR[0xC57 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR24(x) (*(vuint8 *)(&__IPSBAR[0xC58 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR25(x) (*(vuint8 *)(&__IPSBAR[0xC59 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR26(x) (*(vuint8 *)(&__IPSBAR[0xC5A + ((x)*0x100)]))\r
-#define MCF_INTC_ICR27(x) (*(vuint8 *)(&__IPSBAR[0xC5B + ((x)*0x100)]))\r
-#define MCF_INTC_ICR28(x) (*(vuint8 *)(&__IPSBAR[0xC5C + ((x)*0x100)]))\r
-#define MCF_INTC_ICR29(x) (*(vuint8 *)(&__IPSBAR[0xC5D + ((x)*0x100)]))\r
-#define MCF_INTC_ICR30(x) (*(vuint8 *)(&__IPSBAR[0xC5E + ((x)*0x100)]))\r
-#define MCF_INTC_ICR31(x) (*(vuint8 *)(&__IPSBAR[0xC5F + ((x)*0x100)]))\r
-#define MCF_INTC_ICR32(x) (*(vuint8 *)(&__IPSBAR[0xC60 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR33(x) (*(vuint8 *)(&__IPSBAR[0xC61 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR34(x) (*(vuint8 *)(&__IPSBAR[0xC62 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR35(x) (*(vuint8 *)(&__IPSBAR[0xC63 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR36(x) (*(vuint8 *)(&__IPSBAR[0xC64 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR37(x) (*(vuint8 *)(&__IPSBAR[0xC65 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR38(x) (*(vuint8 *)(&__IPSBAR[0xC66 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR39(x) (*(vuint8 *)(&__IPSBAR[0xC67 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR40(x) (*(vuint8 *)(&__IPSBAR[0xC68 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR41(x) (*(vuint8 *)(&__IPSBAR[0xC69 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR42(x) (*(vuint8 *)(&__IPSBAR[0xC6A + ((x)*0x100)]))\r
-#define MCF_INTC_ICR43(x) (*(vuint8 *)(&__IPSBAR[0xC6B + ((x)*0x100)]))\r
-#define MCF_INTC_ICR44(x) (*(vuint8 *)(&__IPSBAR[0xC6C + ((x)*0x100)]))\r
-#define MCF_INTC_ICR45(x) (*(vuint8 *)(&__IPSBAR[0xC6D + ((x)*0x100)]))\r
-#define MCF_INTC_ICR46(x) (*(vuint8 *)(&__IPSBAR[0xC6E + ((x)*0x100)]))\r
-#define MCF_INTC_ICR47(x) (*(vuint8 *)(&__IPSBAR[0xC6F + ((x)*0x100)]))\r
-#define MCF_INTC_ICR48(x) (*(vuint8 *)(&__IPSBAR[0xC70 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR49(x) (*(vuint8 *)(&__IPSBAR[0xC71 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR50(x) (*(vuint8 *)(&__IPSBAR[0xC72 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR51(x) (*(vuint8 *)(&__IPSBAR[0xC73 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR52(x) (*(vuint8 *)(&__IPSBAR[0xC74 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR53(x) (*(vuint8 *)(&__IPSBAR[0xC75 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR54(x) (*(vuint8 *)(&__IPSBAR[0xC76 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR55(x) (*(vuint8 *)(&__IPSBAR[0xC77 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR56(x) (*(vuint8 *)(&__IPSBAR[0xC78 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR57(x) (*(vuint8 *)(&__IPSBAR[0xC79 + ((x)*0x100)]))\r
-#define MCF_INTC_ICR58(x) (*(vuint8 *)(&__IPSBAR[0xC7A + ((x)*0x100)]))\r
-#define MCF_INTC_ICR59(x) (*(vuint8 *)(&__IPSBAR[0xC7B + ((x)*0x100)]))\r
-#define MCF_INTC_ICR60(x) (*(vuint8 *)(&__IPSBAR[0xC7C + ((x)*0x100)]))\r
-#define MCF_INTC_ICR61(x) (*(vuint8 *)(&__IPSBAR[0xC7D + ((x)*0x100)]))\r
-#define MCF_INTC_ICR62(x) (*(vuint8 *)(&__IPSBAR[0xC7E + ((x)*0x100)]))\r
-#define MCF_INTC_ICR63(x) (*(vuint8 *)(&__IPSBAR[0xC7F + ((x)*0x100)]))\r
-#define MCF_INTC_SWIACK(x) (*(vuint8 *)(&__IPSBAR[0xCE0 + ((x)*0x100)]))\r
-#define MCF_INTC_L1IACK(x) (*(vuint8 *)(&__IPSBAR[0xCE4 + ((x)*0x100)]))\r
-#define MCF_INTC_L2IACK(x) (*(vuint8 *)(&__IPSBAR[0xCE8 + ((x)*0x100)]))\r
-#define MCF_INTC_L3IACK(x) (*(vuint8 *)(&__IPSBAR[0xCEC + ((x)*0x100)]))\r
-#define MCF_INTC_L4IACK(x) (*(vuint8 *)(&__IPSBAR[0xCF0 + ((x)*0x100)]))\r
-#define MCF_INTC_L5IACK(x) (*(vuint8 *)(&__IPSBAR[0xCF4 + ((x)*0x100)]))\r
-#define MCF_INTC_L6IACK(x) (*(vuint8 *)(&__IPSBAR[0xCF8 + ((x)*0x100)]))\r
-#define MCF_INTC_L7IACK(x) (*(vuint8 *)(&__IPSBAR[0xCFC + ((x)*0x100)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_INTC_IPRH */\r
-#define MCF_INTC_IPRH_INT32 (0x1)\r
-#define MCF_INTC_IPRH_INT33 (0x2)\r
-#define MCF_INTC_IPRH_INT34 (0x4)\r
-#define MCF_INTC_IPRH_INT35 (0x8)\r
-#define MCF_INTC_IPRH_INT36 (0x10)\r
-#define MCF_INTC_IPRH_INT37 (0x20)\r
-#define MCF_INTC_IPRH_INT38 (0x40)\r
-#define MCF_INTC_IPRH_INT39 (0x80)\r
-#define MCF_INTC_IPRH_INT40 (0x100)\r
-#define MCF_INTC_IPRH_INT41 (0x200)\r
-#define MCF_INTC_IPRH_INT42 (0x400)\r
-#define MCF_INTC_IPRH_INT43 (0x800)\r
-#define MCF_INTC_IPRH_INT44 (0x1000)\r
-#define MCF_INTC_IPRH_INT45 (0x2000)\r
-#define MCF_INTC_IPRH_INT46 (0x4000)\r
-#define MCF_INTC_IPRH_INT47 (0x8000)\r
-#define MCF_INTC_IPRH_INT48 (0x10000)\r
-#define MCF_INTC_IPRH_INT49 (0x20000)\r
-#define MCF_INTC_IPRH_INT50 (0x40000)\r
-#define MCF_INTC_IPRH_INT51 (0x80000)\r
-#define MCF_INTC_IPRH_INT52 (0x100000)\r
-#define MCF_INTC_IPRH_INT53 (0x200000)\r
-#define MCF_INTC_IPRH_INT54 (0x400000)\r
-#define MCF_INTC_IPRH_INT55 (0x800000)\r
-#define MCF_INTC_IPRH_INT56 (0x1000000)\r
-#define MCF_INTC_IPRH_INT57 (0x2000000)\r
-#define MCF_INTC_IPRH_INT58 (0x4000000)\r
-#define MCF_INTC_IPRH_INT59 (0x8000000)\r
-#define MCF_INTC_IPRH_INT60 (0x10000000)\r
-#define MCF_INTC_IPRH_INT61 (0x20000000)\r
-#define MCF_INTC_IPRH_INT62 (0x40000000)\r
-#define MCF_INTC_IPRH_INT63 (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_INTC_IPRL */\r
-#define MCF_INTC_IPRL_INT1 (0x2)\r
-#define MCF_INTC_IPRL_INT2 (0x4)\r
-#define MCF_INTC_IPRL_INT3 (0x8)\r
-#define MCF_INTC_IPRL_INT4 (0x10)\r
-#define MCF_INTC_IPRL_INT5 (0x20)\r
-#define MCF_INTC_IPRL_INT6 (0x40)\r
-#define MCF_INTC_IPRL_INT7 (0x80)\r
-#define MCF_INTC_IPRL_INT8 (0x100)\r
-#define MCF_INTC_IPRL_INT9 (0x200)\r
-#define MCF_INTC_IPRL_INT10 (0x400)\r
-#define MCF_INTC_IPRL_INT11 (0x800)\r
-#define MCF_INTC_IPRL_INT12 (0x1000)\r
-#define MCF_INTC_IPRL_INT13 (0x2000)\r
-#define MCF_INTC_IPRL_INT14 (0x4000)\r
-#define MCF_INTC_IPRL_INT15 (0x8000)\r
-#define MCF_INTC_IPRL_INT16 (0x10000)\r
-#define MCF_INTC_IPRL_INT17 (0x20000)\r
-#define MCF_INTC_IPRL_INT18 (0x40000)\r
-#define MCF_INTC_IPRL_INT19 (0x80000)\r
-#define MCF_INTC_IPRL_INT20 (0x100000)\r
-#define MCF_INTC_IPRL_INT21 (0x200000)\r
-#define MCF_INTC_IPRL_INT22 (0x400000)\r
-#define MCF_INTC_IPRL_INT23 (0x800000)\r
-#define MCF_INTC_IPRL_INT24 (0x1000000)\r
-#define MCF_INTC_IPRL_INT25 (0x2000000)\r
-#define MCF_INTC_IPRL_INT26 (0x4000000)\r
-#define MCF_INTC_IPRL_INT27 (0x8000000)\r
-#define MCF_INTC_IPRL_INT28 (0x10000000)\r
-#define MCF_INTC_IPRL_INT29 (0x20000000)\r
-#define MCF_INTC_IPRL_INT30 (0x40000000)\r
-#define MCF_INTC_IPRL_INT31 (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_INTC_IMRH */\r
-#define MCF_INTC_IMRH_INT_MASK32 (0x1)\r
-#define MCF_INTC_IMRH_INT_MASK33 (0x2)\r
-#define MCF_INTC_IMRH_INT_MASK34 (0x4)\r
-#define MCF_INTC_IMRH_INT_MASK35 (0x8)\r
-#define MCF_INTC_IMRH_INT_MASK36 (0x10)\r
-#define MCF_INTC_IMRH_INT_MASK37 (0x20)\r
-#define MCF_INTC_IMRH_INT_MASK38 (0x40)\r
-#define MCF_INTC_IMRH_INT_MASK39 (0x80)\r
-#define MCF_INTC_IMRH_INT_MASK40 (0x100)\r
-#define MCF_INTC_IMRH_INT_MASK41 (0x200)\r
-#define MCF_INTC_IMRH_INT_MASK42 (0x400)\r
-#define MCF_INTC_IMRH_INT_MASK43 (0x800)\r
-#define MCF_INTC_IMRH_INT_MASK44 (0x1000)\r
-#define MCF_INTC_IMRH_INT_MASK45 (0x2000)\r
-#define MCF_INTC_IMRH_INT_MASK46 (0x4000)\r
-#define MCF_INTC_IMRH_INT_MASK47 (0x8000)\r
-#define MCF_INTC_IMRH_INT_MASK48 (0x10000)\r
-#define MCF_INTC_IMRH_INT_MASK49 (0x20000)\r
-#define MCF_INTC_IMRH_INT_MASK50 (0x40000)\r
-#define MCF_INTC_IMRH_INT_MASK51 (0x80000)\r
-#define MCF_INTC_IMRH_INT_MASK52 (0x100000)\r
-#define MCF_INTC_IMRH_INT_MASK53 (0x200000)\r
-#define MCF_INTC_IMRH_INT_MASK54 (0x400000)\r
-#define MCF_INTC_IMRH_INT_MASK55 (0x800000)\r
-#define MCF_INTC_IMRH_INT_MASK56 (0x1000000)\r
-#define MCF_INTC_IMRH_INT_MASK57 (0x2000000)\r
-#define MCF_INTC_IMRH_INT_MASK58 (0x4000000)\r
-#define MCF_INTC_IMRH_INT_MASK59 (0x8000000)\r
-#define MCF_INTC_IMRH_INT_MASK60 (0x10000000)\r
-#define MCF_INTC_IMRH_INT_MASK61 (0x20000000)\r
-#define MCF_INTC_IMRH_INT_MASK62 (0x40000000)\r
-#define MCF_INTC_IMRH_INT_MASK63 (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_INTC_IMRL */\r
-#define MCF_INTC_IMRL_MASKALL (0x1)\r
-#define MCF_INTC_IMRL_INT_MASK1 (0x2)\r
-#define MCF_INTC_IMRL_INT_MASK2 (0x4)\r
-#define MCF_INTC_IMRL_INT_MASK3 (0x8)\r
-#define MCF_INTC_IMRL_INT_MASK4 (0x10)\r
-#define MCF_INTC_IMRL_INT_MASK5 (0x20)\r
-#define MCF_INTC_IMRL_INT_MASK6 (0x40)\r
-#define MCF_INTC_IMRL_INT_MASK7 (0x80)\r
-#define MCF_INTC_IMRL_INT_MASK8 (0x100)\r
-#define MCF_INTC_IMRL_INT_MASK9 (0x200)\r
-#define MCF_INTC_IMRL_INT_MASK10 (0x400)\r
-#define MCF_INTC_IMRL_INT_MASK11 (0x800)\r
-#define MCF_INTC_IMRL_INT_MASK12 (0x1000)\r
-#define MCF_INTC_IMRL_INT_MASK13 (0x2000)\r
-#define MCF_INTC_IMRL_INT_MASK14 (0x4000)\r
-#define MCF_INTC_IMRL_INT_MASK15 (0x8000)\r
-#define MCF_INTC_IMRL_INT_MASK16 (0x10000)\r
-#define MCF_INTC_IMRL_INT_MASK17 (0x20000)\r
-#define MCF_INTC_IMRL_INT_MASK18 (0x40000)\r
-#define MCF_INTC_IMRL_INT_MASK19 (0x80000)\r
-#define MCF_INTC_IMRL_INT_MASK20 (0x100000)\r
-#define MCF_INTC_IMRL_INT_MASK21 (0x200000)\r
-#define MCF_INTC_IMRL_INT_MASK22 (0x400000)\r
-#define MCF_INTC_IMRL_INT_MASK23 (0x800000)\r
-#define MCF_INTC_IMRL_INT_MASK24 (0x1000000)\r
-#define MCF_INTC_IMRL_INT_MASK25 (0x2000000)\r
-#define MCF_INTC_IMRL_INT_MASK26 (0x4000000)\r
-#define MCF_INTC_IMRL_INT_MASK27 (0x8000000)\r
-#define MCF_INTC_IMRL_INT_MASK28 (0x10000000)\r
-#define MCF_INTC_IMRL_INT_MASK29 (0x20000000)\r
-#define MCF_INTC_IMRL_INT_MASK30 (0x40000000)\r
-#define MCF_INTC_IMRL_INT_MASK31 (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_INTC_INTFRCH */\r
-#define MCF_INTC_INTFRCH_INTFRC32 (0x1)\r
-#define MCF_INTC_INTFRCH_INTFRC33 (0x2)\r
-#define MCF_INTC_INTFRCH_INTFRC34 (0x4)\r
-#define MCF_INTC_INTFRCH_INTFRC35 (0x8)\r
-#define MCF_INTC_INTFRCH_INTFRC36 (0x10)\r
-#define MCF_INTC_INTFRCH_INTFRC37 (0x20)\r
-#define MCF_INTC_INTFRCH_INTFRC38 (0x40)\r
-#define MCF_INTC_INTFRCH_INTFRC39 (0x80)\r
-#define MCF_INTC_INTFRCH_INTFRC40 (0x100)\r
-#define MCF_INTC_INTFRCH_INTFRC41 (0x200)\r
-#define MCF_INTC_INTFRCH_INTFRC42 (0x400)\r
-#define MCF_INTC_INTFRCH_INTFRC43 (0x800)\r
-#define MCF_INTC_INTFRCH_INTFRC44 (0x1000)\r
-#define MCF_INTC_INTFRCH_INTFRC45 (0x2000)\r
-#define MCF_INTC_INTFRCH_INTFRC46 (0x4000)\r
-#define MCF_INTC_INTFRCH_INTFRC47 (0x8000)\r
-#define MCF_INTC_INTFRCH_INTFRC48 (0x10000)\r
-#define MCF_INTC_INTFRCH_INTFRC49 (0x20000)\r
-#define MCF_INTC_INTFRCH_INTFRC50 (0x40000)\r
-#define MCF_INTC_INTFRCH_INTFRC51 (0x80000)\r
-#define MCF_INTC_INTFRCH_INTFRC52 (0x100000)\r
-#define MCF_INTC_INTFRCH_INTFRC53 (0x200000)\r
-#define MCF_INTC_INTFRCH_INTFRC54 (0x400000)\r
-#define MCF_INTC_INTFRCH_INTFRC55 (0x800000)\r
-#define MCF_INTC_INTFRCH_INTFRC56 (0x1000000)\r
-#define MCF_INTC_INTFRCH_INTFRC57 (0x2000000)\r
-#define MCF_INTC_INTFRCH_INTFRC58 (0x4000000)\r
-#define MCF_INTC_INTFRCH_INTFRC59 (0x8000000)\r
-#define MCF_INTC_INTFRCH_INTFRC60 (0x10000000)\r
-#define MCF_INTC_INTFRCH_INTFRC61 (0x20000000)\r
-#define MCF_INTC_INTFRCH_INTFRC62 (0x40000000)\r
-#define MCF_INTC_INTFRCH_INTFRC63 (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_INTC_INTFRCL */\r
-#define MCF_INTC_INTFRCL_INTFRC1 (0x2)\r
-#define MCF_INTC_INTFRCL_INTFRC2 (0x4)\r
-#define MCF_INTC_INTFRCL_INTFRC3 (0x8)\r
-#define MCF_INTC_INTFRCL_INTFRC4 (0x10)\r
-#define MCF_INTC_INTFRCL_INTFRC5 (0x20)\r
-#define MCF_INTC_INTFRCL_INTFRC6 (0x40)\r
-#define MCF_INTC_INTFRCL_INTFRC7 (0x80)\r
-#define MCF_INTC_INTFRCL_INTFRC8 (0x100)\r
-#define MCF_INTC_INTFRCL_INTFRC9 (0x200)\r
-#define MCF_INTC_INTFRCL_INTFRC10 (0x400)\r
-#define MCF_INTC_INTFRCL_INTFRC11 (0x800)\r
-#define MCF_INTC_INTFRCL_INTFRC12 (0x1000)\r
-#define MCF_INTC_INTFRCL_INTFRC13 (0x2000)\r
-#define MCF_INTC_INTFRCL_INTFRC14 (0x4000)\r
-#define MCF_INTC_INTFRCL_INTFRC15 (0x8000)\r
-#define MCF_INTC_INTFRCL_INTFRC16 (0x10000)\r
-#define MCF_INTC_INTFRCL_INTFRC17 (0x20000)\r
-#define MCF_INTC_INTFRCL_INTFRC18 (0x40000)\r
-#define MCF_INTC_INTFRCL_INTFRC19 (0x80000)\r
-#define MCF_INTC_INTFRCL_INTFRC20 (0x100000)\r
-#define MCF_INTC_INTFRCL_INTFRC21 (0x200000)\r
-#define MCF_INTC_INTFRCL_INTFRC22 (0x400000)\r
-#define MCF_INTC_INTFRCL_INTFRC23 (0x800000)\r
-#define MCF_INTC_INTFRCL_INTFRC24 (0x1000000)\r
-#define MCF_INTC_INTFRCL_INTFRC25 (0x2000000)\r
-#define MCF_INTC_INTFRCL_INTFRC26 (0x4000000)\r
-#define MCF_INTC_INTFRCL_INTFRC27 (0x8000000)\r
-#define MCF_INTC_INTFRCL_INTFRC28 (0x10000000)\r
-#define MCF_INTC_INTFRCL_INTFRC29 (0x20000000)\r
-#define MCF_INTC_INTFRCL_INTFRC30 (0x40000000)\r
-#define MCF_INTC_INTFRCL_INTFRC31 (0x80000000)\r
-\r
-/* Bit definitions and macros for MCF_INTC_IRLR */\r
-#define MCF_INTC_IRLR_IRQ(x) (((x)&0x7F)<<0x1)\r
-\r
-/* Bit definitions and macros for MCF_INTC_IACKLPR */\r
-#define MCF_INTC_IACKLPR_PRI(x) (((x)&0xF)<<0)\r
-#define MCF_INTC_IACKLPR_LEVEL(x) (((x)&0x7)<<0x4)\r
-\r
-/* Bit definitions and macros for MCF_INTC_ICR */\r
-#define MCF_INTC_ICR_IP(x) (((x)&0x7)<<0)\r
-#define MCF_INTC_ICR_IL(x) (((x)&0x7)<<0x3)\r
-\r
-/* Bit definitions and macros for MCF_INTC_SWIACK */\r
-#define MCF_INTC_SWIACK_VECTOR(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_INTC_LIACK */\r
-#define MCF_INTC_LIACK_VECTOR(x) (((x)&0xFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_INTC_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_PAD_H__\r
-#define __MCF5282_PAD_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Common GPIO Registers\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_PAD_PBCDPAR (*(vuint8 *)(&__IPSBAR[0x100050]))\r
-#define MCF_PAD_PFPAR (*(vuint8 *)(&__IPSBAR[0x100051]))\r
-#define MCF_PAD_PEPAR (*(vuint16*)(&__IPSBAR[0x100052]))\r
-#define MCF_PAD_PJPAR (*(vuint8 *)(&__IPSBAR[0x100054]))\r
-#define MCF_PAD_PSDPAR (*(vuint8 *)(&__IPSBAR[0x100055]))\r
-#define MCF_PAD_PASPAR (*(vuint16*)(&__IPSBAR[0x100056]))\r
-#define MCF_PAD_PEHLPAR (*(vuint8 *)(&__IPSBAR[0x100058]))\r
-#define MCF_PAD_PQSPAR (*(vuint8 *)(&__IPSBAR[0x100059]))\r
-#define MCF_PAD_PTCPAR (*(vuint8 *)(&__IPSBAR[0x10005A]))\r
-#define MCF_PAD_PTDPAR (*(vuint8 *)(&__IPSBAR[0x10005B]))\r
-#define MCF_PAD_PUAPAR (*(vuint8 *)(&__IPSBAR[0x10005C]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_PAD_PBCDPAR */\r
-#define MCF_PAD_PBCDPAR_PCDPA (0x40)\r
-#define MCF_PAD_PBCDPAR_PBPA (0x80)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PFPAR */\r
-#define MCF_PAD_PFPAR_PFPA5 (0x20)\r
-#define MCF_PAD_PFPAR_PFPA6 (0x40)\r
-#define MCF_PAD_PFPAR_PFPA7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PEPAR */\r
-#define MCF_PAD_PEPAR_PEPA0(x) (((x)&0x3)<<0)\r
-#define MCF_PAD_PEPAR_PEPA0_GPIO (0)\r
-#define MCF_PAD_PEPAR_PEPA0_SYNCB (0x2)\r
-#define MCF_PAD_PEPAR_PEPA0_TIP (0x3)\r
-#define MCF_PAD_PEPAR_PEPA1(x) (((x)&0x3)<<0x2)\r
-#define MCF_PAD_PEPAR_PEPA1_GPIO (0)\r
-#define MCF_PAD_PEPAR_PEPA1_SYNCA (0x8)\r
-#define MCF_PAD_PEPAR_PEPA1_TS (0xC)\r
-#define MCF_PAD_PEPAR_PEPA2 (0x10)\r
-#define MCF_PAD_PEPAR_PEPA3 (0x40)\r
-#define MCF_PAD_PEPAR_PEPA4 (0x100)\r
-#define MCF_PAD_PEPAR_PEPA5 (0x400)\r
-#define MCF_PAD_PEPAR_PEPA6 (0x1000)\r
-#define MCF_PAD_PEPAR_PEPA7 (0x4000)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PJPAR */\r
-#define MCF_PAD_PJPAR_PJPA0 (0x1)\r
-#define MCF_PAD_PJPAR_PJPA1 (0x2)\r
-#define MCF_PAD_PJPAR_PJPA2 (0x4)\r
-#define MCF_PAD_PJPAR_PJPA3 (0x8)\r
-#define MCF_PAD_PJPAR_PJPA4 (0x10)\r
-#define MCF_PAD_PJPAR_PJPA5 (0x20)\r
-#define MCF_PAD_PJPAR_PJPA6 (0x40)\r
-#define MCF_PAD_PJPAR_PJPA7 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PSDPAR */\r
-#define MCF_PAD_PSDPAR_PSDPA (0x80)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PASPAR */\r
-#define MCF_PAD_PASPAR_PASPA0(x) (((x)&0x3)<<0)\r
-#define MCF_PAD_PASPAR_PASPA0_GPIO (0)\r
-#define MCF_PAD_PASPAR_PASPA0_UTXD2 (0x2)\r
-#define MCF_PAD_PASPAR_PASPA0_SCL (0x3)\r
-#define MCF_PAD_PASPAR_PASPA1(x) (((x)&0x3)<<0x2)\r
-#define MCF_PAD_PASPAR_PASPA1_GPIO (0)\r
-#define MCF_PAD_PASPAR_PASPA1_URXD2 (0x8)\r
-#define MCF_PAD_PASPAR_PASPA1_SDA (0xC)\r
-#define MCF_PAD_PASPAR_PASPA2(x) (((x)&0x3)<<0x4)\r
-#define MCF_PAD_PASPAR_PASPA2_GPIO (0)\r
-#define MCF_PAD_PASPAR_PASPA2_UTXD2 (0x20)\r
-#define MCF_PAD_PASPAR_PASPA2_CANTX (0x30)\r
-#define MCF_PAD_PASPAR_PASPA3(x) (((x)&0x3)<<0x6)\r
-#define MCF_PAD_PASPAR_PASPA3_GPIO (0)\r
-#define MCF_PAD_PASPAR_PASPA3_URXD2 (0x80)\r
-#define MCF_PAD_PASPAR_PASPA3_CANRX (0xC0)\r
-#define MCF_PAD_PASPAR_PASPA4(x) (((x)&0x3)<<0x8)\r
-#define MCF_PAD_PASPAR_PASPA4_GPIO (0)\r
-#define MCF_PAD_PASPAR_PASPA4_UTXD2 (0x200)\r
-#define MCF_PAD_PASPAR_PASPA4_EMDC (0x300)\r
-#define MCF_PAD_PASPAR_PASPA5(x) (((x)&0x3)<<0xA)\r
-#define MCF_PAD_PASPAR_PASPA5_GPIO (0)\r
-#define MCF_PAD_PASPAR_PASPA5_URXD2 (0x800)\r
-#define MCF_PAD_PASPAR_PASPA5_EMDIO (0xC00)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PEHLPAR */\r
-#define MCF_PAD_PEHLPAR_PELPA (0x40)\r
-#define MCF_PAD_PEHLPAR_PEHPA (0x80)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PQSPAR */\r
-#define MCF_PAD_PQSPAR_PQSPA0 (0x1)\r
-#define MCF_PAD_PQSPAR_PQSPA1 (0x2)\r
-#define MCF_PAD_PQSPAR_PQSPA2 (0x4)\r
-#define MCF_PAD_PQSPAR_PQSPA3 (0x8)\r
-#define MCF_PAD_PQSPAR_PQSPA4 (0x10)\r
-#define MCF_PAD_PQSPAR_PQSPA5 (0x20)\r
-#define MCF_PAD_PQSPAR_PQSPA6 (0x40)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PTCPAR */\r
-#define MCF_PAD_PTCPAR_PTCPA0(x) (((x)&0x3)<<0)\r
-#define MCF_PAD_PTCPAR_PTCPA0_GPIO (0)\r
-#define MCF_PAD_PTCPAR_PTCPA0_UCTS0 (0x1)\r
-#define MCF_PAD_PTCPAR_PTCPA0_UCTS1 (0x2)\r
-#define MCF_PAD_PTCPAR_PTCPA0_TOUT2 (0x3)\r
-#define MCF_PAD_PTCPAR_PTCPA1(x) (((x)&0x3)<<0x2)\r
-#define MCF_PAD_PTCPAR_PTCPA1_GPIO (0)\r
-#define MCF_PAD_PTCPAR_PTCPA1_UCTS0 (0x4)\r
-#define MCF_PAD_PTCPAR_PTCPA1_UCTS1 (0x8)\r
-#define MCF_PAD_PTCPAR_PTCPA1_TIN2 (0xC)\r
-#define MCF_PAD_PTCPAR_PTCPA2(x) (((x)&0x3)<<0x4)\r
-#define MCF_PAD_PTCPAR_PTCPA2_GPIO (0)\r
-#define MCF_PAD_PTCPAR_PTCPA2_URTS0 (0x10)\r
-#define MCF_PAD_PTCPAR_PTCPA2_URTS1 (0x20)\r
-#define MCF_PAD_PTCPAR_PTCPA2_TOUT3 (0x30)\r
-#define MCF_PAD_PTCPAR_PTCPA3(x) (((x)&0x3)<<0x6)\r
-#define MCF_PAD_PTCPAR_PTCPA3_GPIO (0)\r
-#define MCF_PAD_PTCPAR_PTCPA3_URTS0 (0x40)\r
-#define MCF_PAD_PTCPAR_PTCPA3_URTS1 (0x80)\r
-#define MCF_PAD_PTCPAR_PTCPA3_TIN3 (0xC0)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PTDPAR */\r
-#define MCF_PAD_PTDPAR_PTDPA0(x) (((x)&0x3)<<0)\r
-#define MCF_PAD_PTDPAR_PTDPA0_GPIO (0)\r
-#define MCF_PAD_PTDPAR_PTDPA0_UCTS0 (0x1)\r
-#define MCF_PAD_PTDPAR_PTDPA0_UCTS1 (0x2)\r
-#define MCF_PAD_PTDPAR_PTDPA0_TOUT0 (0x3)\r
-#define MCF_PAD_PTDPAR_PTDPA1(x) (((x)&0x3)<<0x2)\r
-#define MCF_PAD_PTDPAR_PTDPA2_GPIO (0)\r
-#define MCF_PAD_PTDPAR_PTDPA2_UCTS0 (0x4)\r
-#define MCF_PAD_PTDPAR_PTDPA2_UCTS1 (0x8)\r
-#define MCF_PAD_PTDPAR_PTDPA2_TIN0 (0xC)\r
-#define MCF_PAD_PTDPAR_PTDPA2(x) (((x)&0x3)<<0x4)\r
-#define MCF_PAD_PTDPAR_PTDPA2_URTS0 (0x10)\r
-#define MCF_PAD_PTDPAR_PTDPA2_URTS1 (0x20)\r
-#define MCF_PAD_PTDPAR_PTDPA2_TOUT1 (0x30)\r
-#define MCF_PAD_PTDPAR_PTDPA3(x) (((x)&0x3)<<0x6)\r
-#define MCF_PAD_PTDPAR_PTDPA3_GPIO (0)\r
-#define MCF_PAD_PTDPAR_PTDPA3_URTS0 (0x40)\r
-#define MCF_PAD_PTDPAR_PTDPA3_URTS1 (0x80)\r
-#define MCF_PAD_PTDPAR_PTDPA3_TIN1 (0xC0)\r
-\r
-/* Bit definitions and macros for MCF_PAD_PUAPAR */\r
-#define MCF_PAD_PUAPAR_PUAPA0 (0x1)\r
-#define MCF_PAD_PUAPAR_PUAPA1 (0x2)\r
-#define MCF_PAD_PUAPAR_PUAPA2 (0x4)\r
-#define MCF_PAD_PUAPAR_PUAPA3 (0x8)\r
-\r
-\r
-#endif /* __MCF5282_PAD_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_PIT_H__\r
-#define __MCF5282_PIT_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Programmable Interrupt Timer (PIT)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_PIT0_PCSR (*(vuint16*)(&__IPSBAR[0x150000]))\r
-#define MCF_PIT0_PMR (*(vuint16*)(&__IPSBAR[0x150002]))\r
-#define MCF_PIT0_PCNTR (*(vuint16*)(&__IPSBAR[0x150004]))\r
-\r
-#define MCF_PIT1_PCSR (*(vuint16*)(&__IPSBAR[0x160000]))\r
-#define MCF_PIT1_PMR (*(vuint16*)(&__IPSBAR[0x160002]))\r
-#define MCF_PIT1_PCNTR (*(vuint16*)(&__IPSBAR[0x160004]))\r
-\r
-#define MCF_PIT2_PCSR (*(vuint16*)(&__IPSBAR[0x170000]))\r
-#define MCF_PIT2_PMR (*(vuint16*)(&__IPSBAR[0x170002]))\r
-#define MCF_PIT2_PCNTR (*(vuint16*)(&__IPSBAR[0x170004]))\r
-\r
-#define MCF_PIT3_PCSR (*(vuint16*)(&__IPSBAR[0x180000]))\r
-#define MCF_PIT3_PMR (*(vuint16*)(&__IPSBAR[0x180002]))\r
-#define MCF_PIT3_PCNTR (*(vuint16*)(&__IPSBAR[0x180004]))\r
-\r
-#define MCF_PIT_PCSR(x) (*(vuint16*)(&__IPSBAR[0x150000 + ((x)*0x10000)]))\r
-#define MCF_PIT_PMR(x) (*(vuint16*)(&__IPSBAR[0x150002 + ((x)*0x10000)]))\r
-#define MCF_PIT_PCNTR(x) (*(vuint16*)(&__IPSBAR[0x150004 + ((x)*0x10000)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_PIT_PCSR */\r
-#define MCF_PIT_PCSR_EN (0x1)\r
-#define MCF_PIT_PCSR_RLD (0x2)\r
-#define MCF_PIT_PCSR_PIF (0x4)\r
-#define MCF_PIT_PCSR_PIE (0x8)\r
-#define MCF_PIT_PCSR_OVW (0x10)\r
-#define MCF_PIT_PCSR_HALTED (0x20)\r
-#define MCF_PIT_PCSR_DOZE (0x40)\r
-#define MCF_PIT_PCSR_PRE(x) (((x)&0xF)<<0x8)\r
-\r
-/* Bit definitions and macros for MCF_PIT_PMR */\r
-#define MCF_PIT_PMR_PM(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_PIT_PCNTR */\r
-#define MCF_PIT_PCNTR_PC(x) (((x)&0xFFFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_PIT_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_PMM_H__\r
-#define __MCF5282_PMM_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Power Management (PMM)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_PMM_LPICR (*(vuint8 *)(&__IPSBAR[0x12]))\r
-#define MCF_PMM_LPCR (*(vuint8 *)(&__IPSBAR[0x110007]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_PMM_LPICR */\r
-#define MCF_PMM_LPICR_XLPM_IPL(x) (((x)&0x7)<<0x4)\r
-#define MCF_PMM_LPICR_ENBSTOP (0x80)\r
-\r
-/* Bit definitions and macros for MCF_PMM_LPCR */\r
-#define MCF_PMM_LPCR_LVDSE (0x2)\r
-#define MCF_PMM_LPCR_STPMD(x) (((x)&0x3)<<0x3)\r
-#define MCF_PMM_LPCR_STPMD_SYS_DISABLED (0)\r
-#define MCF_PMM_LPCR_STPMD_SYS_CLKOUT_DISABLED (0x8)\r
-#define MCF_PMM_LPCR_STPMD_ONLY_OSC_ENABLED (0x10)\r
-#define MCF_PMM_LPCR_STPMD_ALL_DISABLED (0x18)\r
-#define MCF_PMM_LPCR_LPMD(x) (((x)&0x3)<<0x6)\r
-#define MCF_PMM_LPCR_LPMD_RUN (0)\r
-#define MCF_PMM_LPCR_LPMD_DOZE (0x40)\r
-#define MCF_PMM_LPCR_LPMD_WAIT (0x80)\r
-#define MCF_PMM_LPCR_LPMD_STOP (0xC0)\r
-\r
-\r
-#endif /* __MCF5282_PMM_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_QADC_H__\r
-#define __MCF5282_QADC_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Queued Analog-to-Digital Converter (QADC)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_QADC_QADCMCR (*(vuint16*)(&__IPSBAR[0x190000]))\r
-#define MCF_QADC_PORTQA (*(vuint8 *)(&__IPSBAR[0x190006]))\r
-#define MCF_QADC_PORTQB (*(vuint8 *)(&__IPSBAR[0x190007]))\r
-#define MCF_QADC_DDRQA (*(vuint8 *)(&__IPSBAR[0x190008]))\r
-#define MCF_QADC_DDRQB (*(vuint8 *)(&__IPSBAR[0x190009]))\r
-#define MCF_QADC_QACR0 (*(vuint16*)(&__IPSBAR[0x19000A]))\r
-#define MCF_QADC_QACR1 (*(vuint16*)(&__IPSBAR[0x19000C]))\r
-#define MCF_QADC_QACR2 (*(vuint16*)(&__IPSBAR[0x19000E]))\r
-#define MCF_QADC_QASR0 (*(vuint16*)(&__IPSBAR[0x190010]))\r
-#define MCF_QADC_QASR1 (*(vuint16*)(&__IPSBAR[0x190012]))\r
-\r
-/* Other macros */\r
-#define MCF_QADC_CCW(x) (*(vuint16*)(&__IPSBAR[0x190200 + (x*2)]))\r
-#define MCF_QADC_CCW_CHAN(x) (((x)&0x3F)<<0)\r
-#define MCF_QADC_CCW_IST(x) (((x)&0x3)<<0x6)\r
-#define MCF_QADC_CCW_IST_QCLK2 (0)\r
-#define MCF_QADC_CCW_IST_QCLK4 (0x40)\r
-#define MCF_QADC_CCW_IST_QCLK8 (0x80)\r
-#define MCF_QADC_CCW_IST_QCLK16 (0xC0)\r
-#define MCF_QADC_CCW_BYP (0x100)\r
-#define MCF_QADC_CCW_P (0x200)\r
-#define MCF_QADC_RJURR(x) (*(vuint16*)(&__IPSBAR[0x190280 + (x*2)]))\r
-#define MCF_QADC_LJSRR(x) (*(vuint16*)(&__IPSBAR[0x190300 + (x*2)]))\r
-#define MCF_QADC_LJURR(x) (*(vuint16*)(&__IPSBAR[0x190380 + (x*2)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_QADC_QADCMCR */\r
-#define MCF_QADC_QADCMCR_SUPV (0x80)\r
-#define MCF_QADC_QADCMCR_QDBG (0x4000)\r
-#define MCF_QADC_QADCMCR_QSTOP (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QADC_PORTQA */\r
-#define MCF_QADC_PORTQA_PQA0 (0x1)\r
-#define MCF_QADC_PORTQA_PQA1 (0x2)\r
-#define MCF_QADC_PORTQA_PQA2 (0x8)\r
-#define MCF_QADC_PORTQA_PQA3 (0x10)\r
-\r
-/* Bit definitions and macros for MCF_QADC_PORTQB */\r
-#define MCF_QADC_PORTQB_PQB0 (0x1)\r
-#define MCF_QADC_PORTQB_PQB1 (0x2)\r
-#define MCF_QADC_PORTQB_PQB2 (0x4)\r
-#define MCF_QADC_PORTQB_PQB3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_QADC_DDRQA */\r
-#define MCF_QADC_DDRQA_DDQA0 (0x1)\r
-#define MCF_QADC_DDRQA_DDQA1 (0x2)\r
-#define MCF_QADC_DDRQA_DDQA2 (0x8)\r
-#define MCF_QADC_DDRQA_DDQA3 (0x10)\r
-\r
-/* Bit definitions and macros for MCF_QADC_DDRQB */\r
-#define MCF_QADC_DDRQB_DDQB0 (0x1)\r
-#define MCF_QADC_DDRQB_DDQB1 (0x2)\r
-#define MCF_QADC_DDRQB_DDQB2 (0x4)\r
-#define MCF_QADC_DDRQB_DDQB3 (0x8)\r
-\r
-/* Bit definitions and macros for MCF_QADC_QACR0 */\r
-#define MCF_QADC_QACR0_QPR(x) (((x)&0x7F)<<0)\r
-#define MCF_QADC_QACR0_TRG (0x1000)\r
-#define MCF_QADC_QACR0_MUX (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QADC_QACR1 */\r
-#define MCF_QADC_QACR1_MQ1(x) (((x)&0x1F)<<0x8)\r
-#define MCF_QADC_QACR1_SSE1 (0x2000)\r
-#define MCF_QADC_QACR1_PIE1 (0x4000)\r
-#define MCF_QADC_QACR1_CIE1 (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QADC_QACR2 */\r
-#define MCF_QADC_QACR2_BQ2(x) (((x)&0x7F)<<0)\r
-#define MCF_QADC_QACR2_RESUME (0x80)\r
-#define MCF_QADC_QACR2_MQ2(x) (((x)&0x1F)<<0x8)\r
-#define MCF_QADC_QACR2_SSE2 (0x2000)\r
-#define MCF_QADC_QACR2_PIE2 (0x4000)\r
-#define MCF_QADC_QACR2_CIE2 (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QADC_QASR0 */\r
-#define MCF_QADC_QASR0_CWP(x) (((x)&0x3F)<<0)\r
-#define MCF_QADC_QASR0_QS(x) (((x)&0xF)<<0x6)\r
-#define MCF_QADC_QASR0_TOR2 (0x400)\r
-#define MCF_QADC_QASR0_TOR1 (0x800)\r
-#define MCF_QADC_QASR0_PF2 (0x1000)\r
-#define MCF_QADC_QASR0_CF2 (0x2000)\r
-#define MCF_QADC_QASR0_PF1 (0x4000)\r
-#define MCF_QADC_QASR0_CF1 (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QADC_QASR1 */\r
-#define MCF_QADC_QASR1_CWPQ2(x) (((x)&0x3F)<<0)\r
-#define MCF_QADC_QASR1_CWPQ1(x) (((x)&0x3F)<<0x8)\r
-\r
-\r
-#endif /* __MCF5282_QADC_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_QSPI_H__\r
-#define __MCF5282_QSPI_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Queued Serial Peripheral Interface (QSPI)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_QSPI_QMR (*(vuint16*)(&__IPSBAR[0x340]))\r
-#define MCF_QSPI_QDLYR (*(vuint16*)(&__IPSBAR[0x344]))\r
-#define MCF_QSPI_QWR (*(vuint16*)(&__IPSBAR[0x348]))\r
-#define MCF_QSPI_QIR (*(vuint16*)(&__IPSBAR[0x34C]))\r
-#define MCF_QSPI_QAR (*(vuint16*)(&__IPSBAR[0x350]))\r
-#define MCF_QSPI_QDR (*(vuint16*)(&__IPSBAR[0x354]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_QSPI_QMR */\r
-#define MCF_QSPI_QMR_BAUD(x) (((x)&0xFF)<<0)\r
-#define MCF_QSPI_QMR_CPHA (0x100)\r
-#define MCF_QSPI_QMR_CPOL (0x200)\r
-#define MCF_QSPI_QMR_BITS(x) (((x)&0xF)<<0xA)\r
-#define MCF_QSPI_QMR_DOHIE (0x4000)\r
-#define MCF_QSPI_QMR_MSTR (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QSPI_QDLYR */\r
-#define MCF_QSPI_QDLYR_DTL(x) (((x)&0xFF)<<0)\r
-#define MCF_QSPI_QDLYR_QCD(x) (((x)&0x7F)<<0x8)\r
-#define MCF_QSPI_QDLYR_SPE (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QSPI_QWR */\r
-#define MCF_QSPI_QWR_NEWQP(x) (((x)&0xF)<<0)\r
-#define MCF_QSPI_QWR_CPTQP(x) (((x)&0xF)<<0x4)\r
-#define MCF_QSPI_QWR_ENDQP(x) (((x)&0xF)<<0x8)\r
-#define MCF_QSPI_QWR_CSIV (0x1000)\r
-#define MCF_QSPI_QWR_WRTO (0x2000)\r
-#define MCF_QSPI_QWR_WREN (0x4000)\r
-#define MCF_QSPI_QWR_HALT (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QSPI_QIR */\r
-#define MCF_QSPI_QIR_SPIF (0x1)\r
-#define MCF_QSPI_QIR_ABRT (0x4)\r
-#define MCF_QSPI_QIR_WCEF (0x8)\r
-#define MCF_QSPI_QIR_SPIFE (0x100)\r
-#define MCF_QSPI_QIR_ABRTE (0x400)\r
-#define MCF_QSPI_QIR_WCEFE (0x800)\r
-#define MCF_QSPI_QIR_ABRTL (0x1000)\r
-#define MCF_QSPI_QIR_ABRTB (0x4000)\r
-#define MCF_QSPI_QIR_WCEFB (0x8000)\r
-\r
-/* Bit definitions and macros for MCF_QSPI_QAR */\r
-#define MCF_QSPI_QAR_ADDR(x) (((x)&0x3F)<<0)\r
-#define MCF_QSPI_QAR_TRANS (0)\r
-#define MCF_QSPI_QAR_RECV (0x10)\r
-#define MCF_QSPI_QAR_CMD (0x20)\r
-\r
-/* Bit definitions and macros for MCF_QSPI_QDR */\r
-#define MCF_QSPI_QDR_DATA(x) (((x)&0xFFFF)<<0)\r
-#define MCF_QSPI_QDR_CONT (0x8000)\r
-#define MCF_QSPI_QDR_BITSE (0x4000)\r
-#define MCF_QSPI_QDR_DT (0x2000)\r
-#define MCF_QSPI_QDR_DSCK (0x1000)\r
-#define MCF_QSPI_QDR_QSPI_CS3 (0x800)\r
-#define MCF_QSPI_QDR_QSPI_CS2 (0x400)\r
-#define MCF_QSPI_QDR_QSPI_CS1 (0x200)\r
-#define MCF_QSPI_QDR_QSPI_CS0 (0x100)\r
-\r
-\r
-#endif /* __MCF5282_QSPI_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_RCM_H__\r
-#define __MCF5282_RCM_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Reset Controller Module (RCM)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_RCM_RCR (*(vuint8 *)(&__IPSBAR[0x110000]))\r
-#define MCF_RCM_RSR (*(vuint8 *)(&__IPSBAR[0x110001]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_RCM_RCR */\r
-#define MCF_RCM_RCR_LVDE (0x1)\r
-#define MCF_RCM_RCR_LVDRE (0x4)\r
-#define MCF_RCM_RCR_LVDIE (0x8)\r
-#define MCF_RCM_RCR_LVDF (0x10)\r
-#define MCF_RCM_RCR_FRCRSTOUT (0x40)\r
-#define MCF_RCM_RCR_SOFTRST (0x80)\r
-\r
-/* Bit definitions and macros for MCF_RCM_RSR */\r
-#define MCF_RCM_RSR_LOL (0x1)\r
-#define MCF_RCM_RSR_LOC (0x2)\r
-#define MCF_RCM_RSR_EXT (0x4)\r
-#define MCF_RCM_RSR_POR (0x8)\r
-#define MCF_RCM_RSR_WDR (0x10)\r
-#define MCF_RCM_RSR_SOFT (0x20)\r
-#define MCF_RCM_RSR_LVD (0x40)\r
-\r
-\r
-#endif /* __MCF5282_RCM_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_SCM_H__\r
-#define __MCF5282_SCM_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* System Control Module (SCM)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_SCM_RAMBAR (*(vuint32*)(&__IPSBAR[0x8]))\r
-#define MCF_SCM_CRSR (*(vuint8 *)(&__IPSBAR[0x10]))\r
-#define MCF_SCM_CWCR (*(vuint8 *)(&__IPSBAR[0x11]))\r
-#define MCF_SCM_CWSR (*(vuint8 *)(&__IPSBAR[0x13]))\r
-#define MCF_SCM_DMAREQC (*(vuint32*)(&__IPSBAR[0x14]))\r
-#define MCF_SCM_MPARK (*(vuint32*)(&__IPSBAR[0x1C]))\r
-#define MCF_SCM_MPR (*(vuint8 *)(&__IPSBAR[0x20]))\r
-#define MCF_SCM_PACR0 (*(vuint8 *)(&__IPSBAR[0x24]))\r
-#define MCF_SCM_PACR1 (*(vuint8 *)(&__IPSBAR[0x25]))\r
-#define MCF_SCM_PACR2 (*(vuint8 *)(&__IPSBAR[0x26]))\r
-#define MCF_SCM_PACR3 (*(vuint8 *)(&__IPSBAR[0x27]))\r
-#define MCF_SCM_PACR4 (*(vuint8 *)(&__IPSBAR[0x28]))\r
-#define MCF_SCM_PACR5 (*(vuint8 *)(&__IPSBAR[0x2A]))\r
-#define MCF_SCM_PACR6 (*(vuint8 *)(&__IPSBAR[0x2B]))\r
-#define MCF_SCM_PACR7 (*(vuint8 *)(&__IPSBAR[0x2C]))\r
-#define MCF_SCM_PACR8 (*(vuint8 *)(&__IPSBAR[0x2E]))\r
-#define MCF_SCM_GPACR0 (*(vuint8 *)(&__IPSBAR[0x30]))\r
-#define MCF_SCM_GPACR1 (*(vuint8 *)(&__IPSBAR[0x31]))\r
-#define MCF_SCM_GPACR(x) (*(vuint8 *)(&__IPSBAR[0x30 + ((x)*0x1)]))\r
-\r
-/* Other macros */\r
-#define MCF_SCM_IPSBAR (*(vuint32*)(&__IPSBAR[0x0]))\r
-#define MCF_SCM_IPSBAR_V (0x1)\r
-#define MCF_SCM_IPSBAR_BA(x) ((x)&0xC0000000)\r
-\r
-\r
-/* Bit definitions and macros for MCF_SCM_RAMBAR */\r
-#define MCF_SCM_RAMBAR_BDE (0x200)\r
-#define MCF_SCM_RAMBAR_BA(x) ((x)&0xFFFF0000)\r
-\r
-/* Bit definitions and macros for MCF_SCM_CRSR */\r
-#define MCF_SCM_CRSR_CWDR (0x20)\r
-#define MCF_SCM_CRSR_EXT (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_CWCR */\r
-#define MCF_SCM_CWCR_CWTIF (0x1)\r
-#define MCF_SCM_CWCR_CWTAVAL (0x2)\r
-#define MCF_SCM_CWCR_CWTA (0x4)\r
-#define MCF_SCM_CWCR_CWT(x) (((x)&0x7)<<0x3)\r
-#define MCF_SCM_CWCR_CWT_2_9 (0)\r
-#define MCF_SCM_CWCR_CWT_2_11 (0x8)\r
-#define MCF_SCM_CWCR_CWT_2_13 (0x10)\r
-#define MCF_SCM_CWCR_CWT_2_15 (0x18)\r
-#define MCF_SCM_CWCR_CWT_2_19 (0x20)\r
-#define MCF_SCM_CWCR_CWT_2_23 (0x28)\r
-#define MCF_SCM_CWCR_CWT_2_27 (0x30)\r
-#define MCF_SCM_CWCR_CWT_2_31 (0x38)\r
-#define MCF_SCM_CWCR_CWRI (0x40)\r
-#define MCF_SCM_CWCR_CWE (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_CWSR */\r
-#define MCF_SCM_CWSR_CWSR(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_SCM_DMAREQC */\r
-#define MCF_SCM_DMAREQC_DMAC0(x) (((x)&0xF)<<0)\r
-#define MCF_SCM_DMAREQC_DMAC1(x) (((x)&0xF)<<0x4)\r
-#define MCF_SCM_DMAREQC_DMAC2(x) (((x)&0xF)<<0x8)\r
-#define MCF_SCM_DMAREQC_DMAC3(x) (((x)&0xF)<<0xC)\r
-\r
-/* Bit definitions and macros for MCF_SCM_MPARK */\r
-#define MCF_SCM_MPARK_LCKOUT_TIME(x) (((x)&0xF)<<0x8)\r
-#define MCF_SCM_MPARK_PRKLAST (0x1000)\r
-#define MCF_SCM_MPARK_TIMEOUT (0x2000)\r
-#define MCF_SCM_MPARK_FIXED (0x4000)\r
-#define MCF_SCM_MPARK_M1_PRTY(x) (((x)&0x3)<<0x10)\r
-#define MCF_SCM_MPARK_M0_PRTY(x) (((x)&0x3)<<0x12)\r
-#define MCF_SCM_MPARK_M2_PRTY(x) (((x)&0x3)<<0x14)\r
-#define MCF_SCM_MPARK_M3_PRTY(x) (((x)&0x3)<<0x16)\r
-#define MCF_SCM_MPARK_BCR24BIT (0x1000000)\r
-#define MCF_SCM_MPARK_M2_P_EN (0x2000000)\r
-\r
-/* Bit definitions and macros for MCF_SCM_MPR */\r
-#define MCF_SCM_MPR_MPR(x) (((x)&0xF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR0 */\r
-#define MCF_SCM_PACR0_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR0_LOCK0 (0x8)\r
-#define MCF_SCM_PACR0_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR0_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR1 */\r
-#define MCF_SCM_PACR1_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR1_LOCK0 (0x8)\r
-#define MCF_SCM_PACR1_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR1_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR2 */\r
-#define MCF_SCM_PACR2_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR2_LOCK0 (0x8)\r
-#define MCF_SCM_PACR2_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR2_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR3 */\r
-#define MCF_SCM_PACR3_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR3_LOCK0 (0x8)\r
-#define MCF_SCM_PACR3_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR3_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR4 */\r
-#define MCF_SCM_PACR4_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR4_LOCK0 (0x8)\r
-#define MCF_SCM_PACR4_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR4_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR5 */\r
-#define MCF_SCM_PACR5_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR5_LOCK0 (0x8)\r
-#define MCF_SCM_PACR5_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR5_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR6 */\r
-#define MCF_SCM_PACR6_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR6_LOCK0 (0x8)\r
-#define MCF_SCM_PACR6_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR6_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR7 */\r
-#define MCF_SCM_PACR7_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR7_LOCK0 (0x8)\r
-#define MCF_SCM_PACR7_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR7_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_PACR8 */\r
-#define MCF_SCM_PACR8_ACCESS_CTRL0(x) (((x)&0x7)<<0)\r
-#define MCF_SCM_PACR8_LOCK0 (0x8)\r
-#define MCF_SCM_PACR8_ACCESS_CTRL1(x) (((x)&0x7)<<0x4)\r
-#define MCF_SCM_PACR8_LOCK1 (0x80)\r
-\r
-/* Bit definitions and macros for MCF_SCM_GPACR */\r
-#define MCF_SCM_GPACR_ACCESS_CTRL(x) (((x)&0xF)<<0)\r
-#define MCF_SCM_GPACR_LOCK (0x80)\r
-\r
-\r
-#endif /* __MCF5282_SCM_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_SDRAMC_H__\r
-#define __MCF5282_SDRAMC_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Synchronous DRAM Controller (SDRAMC)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_SDRAMC_DCR (*(vuint16*)(&__IPSBAR[0x40]))\r
-#define MCF_SDRAMC_DACR0 (*(vuint32*)(&__IPSBAR[0x48]))\r
-#define MCF_SDRAMC_DMR0 (*(vuint32*)(&__IPSBAR[0x4C]))\r
-#define MCF_SDRAMC_DACR1 (*(vuint32*)(&__IPSBAR[0x50]))\r
-#define MCF_SDRAMC_DMR1 (*(vuint32*)(&__IPSBAR[0x54]))\r
-#define MCF_SDRAMC_DACR(x) (*(vuint32*)(&__IPSBAR[0x48 + ((x)*0x8)]))\r
-#define MCF_SDRAMC_DMR(x) (*(vuint32*)(&__IPSBAR[0x4C + ((x)*0x8)]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_SDRAMC_DCR */\r
-#define MCF_SDRAMC_DCR_RC(x) (((x)&0x1FF)<<0)\r
-#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x3)<<0x9)\r
-#define MCF_SDRAMC_DCR_RTIM_3 (0)\r
-#define MCF_SDRAMC_DCR_RTIM_6 (0x200)\r
-#define MCF_SDRAMC_DCR_RTIM_9 (0x400)\r
-#define MCF_SDRAMC_DCR_IS (0x800)\r
-#define MCF_SDRAMC_DCR_COC (0x1000)\r
-#define MCF_SDRAMC_DCR_NAM (0x2000)\r
-\r
-/* Bit definitions and macros for MCF_SDRAMC_DACR */\r
-#define MCF_SDRAMC_DACR_IP (0x8)\r
-#define MCF_SDRAMC_DACR_PS(x) (((x)&0x3)<<0x4)\r
-#define MCF_SDRAMC_DACR_PS_32 (0)\r
-#define MCF_SDRAMC_DACR_PS_8 (0x10)\r
-#define MCF_SDRAMC_DACR_PS_16 (0x20)\r
-#define MCF_SDRAMC_DACR_IMRS (0x40)\r
-#define MCF_SDRAMC_DACR_CBM(x) (((x)&0x7)<<0x8)\r
-#define MCF_SDRAMC_DACR_CASL(x) (((x)&0x3)<<0xC)\r
-#define MCF_SDRAMC_DACR_RE (0x8000)\r
-#define MCF_SDRAMC_DACR_BA(x) ((x)&0xFFFC0000)\r
-#define MCF_SDRAMC_DACR_CASL_1 (0)\r
-#define MCF_SDRAMC_DACR_CASL_2 (0x1000)\r
-#define MCF_SDRAMC_DACR_CASL_3 (0x2000)\r
-\r
-/* Bit definitions and macros for MCF_SDRAMC_DMR */\r
-#define MCF_SDRAMC_DMR_V (0x1)\r
-#define MCF_SDRAMC_DMR_UD (0x2)\r
-#define MCF_SDRAMC_DMR_UC (0x4)\r
-#define MCF_SDRAMC_DMR_SD (0x8)\r
-#define MCF_SDRAMC_DMR_SC (0x10)\r
-#define MCF_SDRAMC_DMR_AM (0x20)\r
-#define MCF_SDRAMC_DMR_CI (0x40)\r
-#define MCF_SDRAMC_DMR_WP (0x100)\r
-#define MCF_SDRAMC_DMR_BAM(x) (((x)&0x3FFF)<<0x12)\r
-#define MCF_SDRAMC_DMR_BAM_4G (0xFFFC0000)\r
-#define MCF_SDRAMC_DMR_BAM_2G (0x7FFC0000)\r
-#define MCF_SDRAMC_DMR_BAM_1G (0x3FFC0000)\r
-#define MCF_SDRAMC_DMR_BAM_1024M (0x3FFC0000)\r
-#define MCF_SDRAMC_DMR_BAM_512M (0x1FFC0000)\r
-#define MCF_SDRAMC_DMR_BAM_256M (0xFFC0000)\r
-#define MCF_SDRAMC_DMR_BAM_128M (0x7FC0000)\r
-#define MCF_SDRAMC_DMR_BAM_64M (0x3FC0000)\r
-#define MCF_SDRAMC_DMR_BAM_32M (0x1FC0000)\r
-#define MCF_SDRAMC_DMR_BAM_16M (0xFC0000)\r
-#define MCF_SDRAMC_DMR_BAM_8M (0x7C0000)\r
-#define MCF_SDRAMC_DMR_BAM_4M (0x3C0000)\r
-#define MCF_SDRAMC_DMR_BAM_2M (0x1C0000)\r
-#define MCF_SDRAMC_DMR_BAM_1M (0xC0000)\r
-#define MCF_SDRAMC_DMR_BAM_1024K (0xC0000)\r
-#define MCF_SDRAMC_DMR_BAM_512K (0x40000)\r
-#define MCF_SDRAMC_DMR_BAM_256K (0)\r
-\r
-\r
-#endif /* __MCF5282_SDRAMC_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_UART_H__\r
-#define __MCF5282_UART_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Universal Asynchronous Receiver Transmitter (UART)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_UART0_UMR1 (*(vuint8 *)(&__IPSBAR[0x200]))\r
-#define MCF_UART0_UMR2 (*(vuint8 *)(&__IPSBAR[0x200]))\r
-#define MCF_UART0_USR (*(vuint8 *)(&__IPSBAR[0x204]))\r
-#define MCF_UART0_UCSR (*(vuint8 *)(&__IPSBAR[0x204]))\r
-#define MCF_UART0_UCR (*(vuint8 *)(&__IPSBAR[0x208]))\r
-#define MCF_UART0_URB (*(vuint8 *)(&__IPSBAR[0x20C]))\r
-#define MCF_UART0_UTB (*(vuint8 *)(&__IPSBAR[0x20C]))\r
-#define MCF_UART0_UIPCR (*(vuint8 *)(&__IPSBAR[0x210]))\r
-#define MCF_UART0_UACR (*(vuint8 *)(&__IPSBAR[0x210]))\r
-#define MCF_UART0_UIMR (*(vuint8 *)(&__IPSBAR[0x214]))\r
-#define MCF_UART0_UISR (*(vuint8 *)(&__IPSBAR[0x214]))\r
-#define MCF_UART0_UBG1 (*(vuint8 *)(&__IPSBAR[0x218]))\r
-#define MCF_UART0_UBG2 (*(vuint8 *)(&__IPSBAR[0x21C]))\r
-#define MCF_UART0_UIP (*(vuint8 *)(&__IPSBAR[0x234]))\r
-#define MCF_UART0_UOP1 (*(vuint8 *)(&__IPSBAR[0x238]))\r
-#define MCF_UART0_UOP0 (*(vuint8 *)(&__IPSBAR[0x23C]))\r
-\r
-#define MCF_UART1_UMR1 (*(vuint8 *)(&__IPSBAR[0x240]))\r
-#define MCF_UART1_UMR2 (*(vuint8 *)(&__IPSBAR[0x240]))\r
-#define MCF_UART1_USR (*(vuint8 *)(&__IPSBAR[0x244]))\r
-#define MCF_UART1_UCSR (*(vuint8 *)(&__IPSBAR[0x244]))\r
-#define MCF_UART1_UCR (*(vuint8 *)(&__IPSBAR[0x248]))\r
-#define MCF_UART1_URB (*(vuint8 *)(&__IPSBAR[0x24C]))\r
-#define MCF_UART1_UTB (*(vuint8 *)(&__IPSBAR[0x24C]))\r
-#define MCF_UART1_UIPCR (*(vuint8 *)(&__IPSBAR[0x250]))\r
-#define MCF_UART1_UACR (*(vuint8 *)(&__IPSBAR[0x250]))\r
-#define MCF_UART1_UIMR (*(vuint8 *)(&__IPSBAR[0x254]))\r
-#define MCF_UART1_UISR (*(vuint8 *)(&__IPSBAR[0x254]))\r
-#define MCF_UART1_UBG1 (*(vuint8 *)(&__IPSBAR[0x258]))\r
-#define MCF_UART1_UBG2 (*(vuint8 *)(&__IPSBAR[0x25C]))\r
-#define MCF_UART1_UIP (*(vuint8 *)(&__IPSBAR[0x274]))\r
-#define MCF_UART1_UOP1 (*(vuint8 *)(&__IPSBAR[0x278]))\r
-#define MCF_UART1_UOP0 (*(vuint8 *)(&__IPSBAR[0x27C]))\r
-\r
-#define MCF_UART2_UMR1 (*(vuint8 *)(&__IPSBAR[0x280]))\r
-#define MCF_UART2_UMR2 (*(vuint8 *)(&__IPSBAR[0x280]))\r
-#define MCF_UART2_USR (*(vuint8 *)(&__IPSBAR[0x284]))\r
-#define MCF_UART2_UCSR (*(vuint8 *)(&__IPSBAR[0x284]))\r
-#define MCF_UART2_UCR (*(vuint8 *)(&__IPSBAR[0x288]))\r
-#define MCF_UART2_URB (*(vuint8 *)(&__IPSBAR[0x28C]))\r
-#define MCF_UART2_UTB (*(vuint8 *)(&__IPSBAR[0x28C]))\r
-#define MCF_UART2_UIPCR (*(vuint8 *)(&__IPSBAR[0x290]))\r
-#define MCF_UART2_UACR (*(vuint8 *)(&__IPSBAR[0x290]))\r
-#define MCF_UART2_UIMR (*(vuint8 *)(&__IPSBAR[0x294]))\r
-#define MCF_UART2_UISR (*(vuint8 *)(&__IPSBAR[0x294]))\r
-#define MCF_UART2_UBG1 (*(vuint8 *)(&__IPSBAR[0x298]))\r
-#define MCF_UART2_UBG2 (*(vuint8 *)(&__IPSBAR[0x29C]))\r
-#define MCF_UART2_UIP (*(vuint8 *)(&__IPSBAR[0x2B4]))\r
-#define MCF_UART2_UOP1 (*(vuint8 *)(&__IPSBAR[0x2B8]))\r
-#define MCF_UART2_UOP0 (*(vuint8 *)(&__IPSBAR[0x2BC]))\r
-\r
-#define MCF_UART_UMR(x) (*(vuint8 *)(&__IPSBAR[0x200 + ((x)*0x40)]))\r
-#define MCF_UART_USR(x) (*(vuint8 *)(&__IPSBAR[0x204 + ((x)*0x40)]))\r
-#define MCF_UART_UCSR(x) (*(vuint8 *)(&__IPSBAR[0x204 + ((x)*0x40)]))\r
-#define MCF_UART_UCR(x) (*(vuint8 *)(&__IPSBAR[0x208 + ((x)*0x40)]))\r
-#define MCF_UART_URB(x) (*(vuint8 *)(&__IPSBAR[0x20C + ((x)*0x40)]))\r
-#define MCF_UART_UTB(x) (*(vuint8 *)(&__IPSBAR[0x20C + ((x)*0x40)]))\r
-#define MCF_UART_UIPCR(x) (*(vuint8 *)(&__IPSBAR[0x210 + ((x)*0x40)]))\r
-#define MCF_UART_UACR(x) (*(vuint8 *)(&__IPSBAR[0x210 + ((x)*0x40)]))\r
-#define MCF_UART_UIMR(x) (*(vuint8 *)(&__IPSBAR[0x214 + ((x)*0x40)]))\r
-#define MCF_UART_UISR(x) (*(vuint8 *)(&__IPSBAR[0x214 + ((x)*0x40)]))\r
-#define MCF_UART_UBG1(x) (*(vuint8 *)(&__IPSBAR[0x218 + ((x)*0x40)]))\r
-#define MCF_UART_UBG2(x) (*(vuint8 *)(&__IPSBAR[0x21C + ((x)*0x40)]))\r
-#define MCF_UART_UIP(x) (*(vuint8 *)(&__IPSBAR[0x234 + ((x)*0x40)]))\r
-#define MCF_UART_UOP1(x) (*(vuint8 *)(&__IPSBAR[0x238 + ((x)*0x40)]))\r
-#define MCF_UART_UOP0(x) (*(vuint8 *)(&__IPSBAR[0x23C + ((x)*0x40)]))\r
-\r
-/* Bit definitions and macros for MCF_UART_UMR */\r
-#define MCF_UART_UMR_BC(x) (((x)&0x3)<<0)\r
-#define MCF_UART_UMR_BC_5 (0)\r
-#define MCF_UART_UMR_BC_6 (0x1)\r
-#define MCF_UART_UMR_BC_7 (0x2)\r
-#define MCF_UART_UMR_BC_8 (0x3)\r
-#define MCF_UART_UMR_PT (0x4)\r
-#define MCF_UART_UMR_PM(x) (((x)&0x3)<<0x3)\r
-#define MCF_UART_UMR_ERR (0x20)\r
-#define MCF_UART_UMR_RXIRQ (0x40)\r
-#define MCF_UART_UMR_RXRTS (0x80)\r
-#define MCF_UART_UMR_PM_MULTI_ADDR (0x1C)\r
-#define MCF_UART_UMR_PM_MULTI_DATA (0x18)\r
-#define MCF_UART_UMR_PM_NONE (0x10)\r
-#define MCF_UART_UMR_PM_FORCE_HI (0xC)\r
-#define MCF_UART_UMR_PM_FORCE_LO (0x8)\r
-#define MCF_UART_UMR_PM_ODD (0x4)\r
-#define MCF_UART_UMR_PM_EVEN (0)\r
-#define MCF_UART_UMR_SB(x) (((x)&0xF)<<0)\r
-#define MCF_UART_UMR_SB_STOP_BITS_1 (0x7)\r
-#define MCF_UART_UMR_SB_STOP_BITS_15 (0x8)\r
-#define MCF_UART_UMR_SB_STOP_BITS_2 (0xF)\r
-#define MCF_UART_UMR_TXCTS (0x10)\r
-#define MCF_UART_UMR_TXRTS (0x20)\r
-#define MCF_UART_UMR_CM(x) (((x)&0x3)<<0x6)\r
-#define MCF_UART_UMR_CM_NORMAL (0)\r
-#define MCF_UART_UMR_CM_ECHO (0x40)\r
-#define MCF_UART_UMR_CM_LOCAL_LOOP (0x80)\r
-#define MCF_UART_UMR_CM_REMOTE_LOOP (0xC0)\r
-\r
-/* Bit definitions and macros for MCF_UART_USR */\r
-#define MCF_UART_USR_RXRDY (0x1)\r
-#define MCF_UART_USR_FFULL (0x2)\r
-#define MCF_UART_USR_TXRDY (0x4)\r
-#define MCF_UART_USR_TXEMP (0x8)\r
-#define MCF_UART_USR_OE (0x10)\r
-#define MCF_UART_USR_PE (0x20)\r
-#define MCF_UART_USR_FE (0x40)\r
-#define MCF_UART_USR_RB (0x80)\r
-\r
-/* Bit definitions and macros for MCF_UART_UCSR */\r
-#define MCF_UART_UCSR_TCS(x) (((x)&0xF)<<0)\r
-#define MCF_UART_UCSR_TCS_SYS_CLK (0xD)\r
-#define MCF_UART_UCSR_TCS_CTM16 (0xE)\r
-#define MCF_UART_UCSR_TCS_CTM (0xF)\r
-#define MCF_UART_UCSR_RCS(x) (((x)&0xF)<<0x4)\r
-#define MCF_UART_UCSR_RCS_SYS_CLK (0xD0)\r
-#define MCF_UART_UCSR_RCS_CTM16 (0xE0)\r
-#define MCF_UART_UCSR_RCS_CTM (0xF0)\r
-\r
-/* Bit definitions and macros for MCF_UART_UCR */\r
-#define MCF_UART_UCR_RC(x) (((x)&0x3)<<0)\r
-#define MCF_UART_UCR_RX_ENABLED (0x1)\r
-#define MCF_UART_UCR_RX_DISABLED (0x2)\r
-#define MCF_UART_UCR_TC(x) (((x)&0x3)<<0x2)\r
-#define MCF_UART_UCR_TX_ENABLED (0x4)\r
-#define MCF_UART_UCR_TX_DISABLED (0x8)\r
-#define MCF_UART_UCR_MISC(x) (((x)&0x7)<<0x4)\r
-#define MCF_UART_UCR_NONE (0)\r
-#define MCF_UART_UCR_RESET_MR (0x10)\r
-#define MCF_UART_UCR_RESET_RX (0x20)\r
-#define MCF_UART_UCR_RESET_TX (0x30)\r
-#define MCF_UART_UCR_RESET_ERROR (0x40)\r
-#define MCF_UART_UCR_RESET_BKCHGINT (0x50)\r
-#define MCF_UART_UCR_START_BREAK (0x60)\r
-#define MCF_UART_UCR_STOP_BREAK (0x70)\r
-\r
-/* Bit definitions and macros for MCF_UART_URB */\r
-#define MCF_UART_URB_RB(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_UART_UTB */\r
-#define MCF_UART_UTB_TB(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_UART_UIPCR */\r
-#define MCF_UART_UIPCR_CTS (0x1)\r
-#define MCF_UART_UIPCR_COS (0x10)\r
-\r
-/* Bit definitions and macros for MCF_UART_UACR */\r
-#define MCF_UART_UACR_IEC (0x1)\r
-\r
-/* Bit definitions and macros for MCF_UART_UIMR */\r
-#define MCF_UART_UIMR_TXRDY (0x1)\r
-#define MCF_UART_UIMR_FFULL_RXRDY (0x2)\r
-#define MCF_UART_UIMR_DB (0x4)\r
-#define MCF_UART_UIMR_COS (0x80)\r
-\r
-/* Bit definitions and macros for MCF_UART_UISR */\r
-#define MCF_UART_UISR_TXRDY (0x1)\r
-#define MCF_UART_UISR_FFULL_RXRDY (0x2)\r
-#define MCF_UART_UISR_DB (0x4)\r
-#define MCF_UART_UISR_COS (0x80)\r
-\r
-/* Bit definitions and macros for MCF_UART_UBG1 */\r
-#define MCF_UART_UBG1_Divider_MSB(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_UART_UBG2 */\r
-#define MCF_UART_UBG2_Divider_LSB(x) (((x)&0xFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_UART_UIP */\r
-#define MCF_UART_UIP_CTS (0x1)\r
-\r
-/* Bit definitions and macros for MCF_UART_UOP1 */\r
-#define MCF_UART_UOP1_RTS (0x1)\r
-\r
-/* Bit definitions and macros for MCF_UART_UOP0 */\r
-#define MCF_UART_UOP0_RTS (0x1)\r
-\r
-\r
-#endif /* __MCF5282_UART_H__ */\r
+++ /dev/null
-/* Coldfire C Header File\r
- * Copyright Freescale Semiconductor Inc\r
- * All rights reserved.\r
- *\r
- * 2007/03/19 Revision: 0.9\r
- */\r
-\r
-#ifndef __MCF5282_WTM_H__\r
-#define __MCF5282_WTM_H__\r
-\r
-\r
-/*********************************************************************\r
-*\r
-* Watchdog Timer Module (WTM)\r
-*\r
-*********************************************************************/\r
-\r
-/* Register read/write macros */\r
-#define MCF_WTM_WCR (*(vuint16*)(&__IPSBAR[0x140000]))\r
-#define MCF_WTM_WMR (*(vuint16*)(&__IPSBAR[0x140002]))\r
-#define MCF_WTM_WCNTR (*(vuint16*)(&__IPSBAR[0x140004]))\r
-#define MCF_WTM_WSR (*(vuint16*)(&__IPSBAR[0x140006]))\r
-\r
-\r
-/* Bit definitions and macros for MCF_WTM_WCR */\r
-#define MCF_WTM_WCR_EN (0x1)\r
-#define MCF_WTM_WCR_HALTED (0x2)\r
-#define MCF_WTM_WCR_DOZE (0x4)\r
-#define MCF_WTM_WCR_WAIT (0x8)\r
-\r
-/* Bit definitions and macros for MCF_WTM_WMR */\r
-#define MCF_WTM_WMR_WM(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_WTM_WCNTR */\r
-#define MCF_WTM_WCNTR_WC(x) (((x)&0xFFFF)<<0)\r
-\r
-/* Bit definitions and macros for MCF_WTM_WSR */\r
-#define MCF_WTM_WSR_WS(x) (((x)&0xFFFF)<<0)\r
-\r
-\r
-#endif /* __MCF5282_WTM_H__ */\r
+++ /dev/null
-RM := rm -rf\r
-\r
-# Set the optimisation level - this should be set to 0, 1, 2, 3 or s (s for size).\r
-OPTIM=s\r
-\r
-###############################################################################\r
-# List the directories that contain files to be built.\r
-###############################################################################\r
-\r
-# These two directories contain the FreeRTOS.org kernel source files.\r
-FREERTOS_SOURCE_DIR=./../../../Source\r
-PORT_SOURCE_DIR=./../../../Source/portable/GCC/ColdFire_V2\r
-\r
-# This directory contains the standard demo files that get included in every\r
-# FreeRTOS.org demo. They define tasks that demonstrate the API usage and \r
-# test the FreeRTOS.org port.\r
-COMMON_DEMO_SOURCE_DIR=./../../Common/Minimal\r
-\r
-# The lwIP stack source files.\r
-LWIP_ROOT_DIR=./../../Common/ethernet/lwIP_130\r
-\r
-VPATH= $(FREERTOS_SOURCE_DIR) : \\r
- $(PORT_SOURCE_DIR) : \\r
- $(COMMON_DEMO_SOURCE_DIR) : \\r
- $(FREERTOS_SOURCE_DIR)/portable/MemMang : \\r
- . : \\r
- ./ParTest : \\r
- ./serial\r
-\r
-\r
-###############################################################################\r
-# Define a few constants to be used during the build.\r
-###############################################################################\r
-\r
-OUTPUT_DIR=./bin\r
-CPU=528x\r
-LINKER_SCRIPT=m5282evb-dram_code-rambar_data-hosted.ld\r
-OUTPUT_FILENAME=RTOSDemo.elf\r
-CC=m68k-elf-gcc\r
-AS=m68K-elf-as\r
-\r
-\r
-###############################################################################\r
-# List the files to include in the build. These files will be located from the\r
-# VPATH defined above.\r
-###############################################################################\r
-\r
-# The FreeRTOS.org source files.\r
-FreeRTOS_OBJS= $(OUTPUT_DIR)/portasm.o \\r
- $(OUTPUT_DIR)/port.o \\r
- $(OUTPUT_DIR)/list.o \\r
- $(OUTPUT_DIR)/tasks.o \\r
- $(OUTPUT_DIR)/queue.o \\r
- $(OUTPUT_DIR)/heap_2.o\r
-\r
-# The demo app source files.\r
-Demo_OBJS= $(OUTPUT_DIR)/main.o \\r
- $(OUTPUT_DIR)/serial.o \\r
- $(OUTPUT_DIR)/comtest.o \\r
- $(OUTPUT_DIR)/flash.o \\r
- $(OUTPUT_DIR)/ParTest.o \\r
- $(OUTPUT_DIR)/BlockQ.o \\r
- $(OUTPUT_DIR)/death.o \\r
- $(OUTPUT_DIR)/integer.o \\r
- $(OUTPUT_DIR)/PollQ.o \\r
- $(OUTPUT_DIR)/semtest.o \\r
- $(OUTPUT_DIR)/GenQTest.o \\r
- $(OUTPUT_DIR)/QPeek.o \\r
- $(OUTPUT_DIR)/recmutex.o \\r
- $(OUTPUT_DIR)/IntQueueTimer.o \\r
- $(OUTPUT_DIR)/IntQueue.o \\r
- $(OUTPUT_DIR)/FreeRTOS_Tick_Setup.o\r
-\r
-OBJS = $(FreeRTOS_OBJS) $(Demo_OBJS)\r
- \r
-C_DEPS = $(OBJS:.o=.d)\r
-\r
-INCLUDE_PATHS= -I"$(FREERTOS_SOURCE_DIR)/include" \\r
- -I"include" \\r
- -I"$(COMMON_DEMO_SOURCE_DIR)/../include" \\r
- -I"$(PORT_SOURCE_DIR)" \\r
- -I./MCF5282 \\r
- -I.\r
-\r
-CFLAGS= $(INCLUDE_PATHS) \\r
- -D COLDFIRE_V2_GCC \\r
- -O$(OPTIM) \\r
- -fno-strict-aliasing \\r
- -g3 \\r
- -Wall \\r
- -Wextra \\r
- -c \\r
- -ffunction-sections \\r
- -fdata-sections \\r
- -fmessage-length=0 \\r
- -funsigned-char \\r
- -Wextra \\r
- -mcpu=$(CPU) \\r
- -MMD \\r
- -MP \\r
- -MF"$(@:%.o=%.d)" \\r
- -MT"$(@:%.o=%.d)"\r
-\r
-ASFLAGS= -m528x \\r
- -g3 \\r
- --register-prefix-optional \\r
- --bitwise-or\r
-\r
-LIBS=\r
-\r
-# Add inputs and outputs from these tool invocations to the build variables \r
-\r
-# All Target\r
-all: $(OUTPUT_DIR)/$(OUTPUT_FILENAME)\r
-\r
-# Tool invocations \r
-$(OUTPUT_DIR)/$(OUTPUT_FILENAME): $(OBJS)\r
- $(CC) -nostartfiles --gc-sections -Xlinker -Map=$(OUTPUT_DIR)/output.map -mcpu=$(CPU) -T $(LINKER_SCRIPT) -o"$(OUTPUT_DIR)/$(OUTPUT_FILENAME)" $(OBJS) $(USER_OBJS) $(LIBS)\r
-\r
-$(OUTPUT_DIR)/%.o: %.c Makefile\r
- $(CC) $(CFLAGS) -o"$@" "$<"\r
-\r
-$(OUTPUT_DIR)/%.o: %.S\r
- $(AS) $(ASFLAGS) -o"$@" "$<"\r
-\r
-# Other Targets\r
-clean:\r
- -$(RM) $(OBJS) $(C_DEPS) $(EXECUTABLES) $(OUTPUT_DIR)/$(OUTPUT_FILENAME)\r
- -@echo ' '\r
-\r
-#\r
-# The rule to create the target directory\r
-#\r
-$(OUTPUT_DIR):\r
- @mkdir $(OUTPUT_DIR)\r
-\r
-\r
-.PHONY: all clean dependents\r
-.SECONDARY: post-build\r
-\r
--include $(wildcard $(OUTPUT_DIR)/*.d) __dummy__\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-/*\r
- Changes from V2.5.2\r
-\r
- + All LED's are turned off to start.\r
-*/\r
-\r
-\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "partest.h"\r
-\r
-#define partstNUM_LEDs 4\r
-\r
-#define LED0_POS 0x01\r
-#define LED1_POS 0x04\r
-#define LED2_POS 0x01\r
-#define LED3_POS 0x04\r
-\r
-static const unsigned char ucLEDDefinitions[ partstNUM_LEDs ] = { LED0_POS, LED1_POS, LED2_POS, LED3_POS };\r
-\r
-/*-----------------------------------------------------------\r
- * Simple parallel port IO routines.\r
- *-----------------------------------------------------------*/\r
-\r
-void vParTestInitialise( void )\r
-{\r
- /* Set the LEDs to outputs. */\r
- MCF_GPIO_DDRTD |= ( LED0_POS | LED1_POS );\r
- MCF_GPIO_DDRTC |= ( LED2_POS | LED3_POS );\r
-\r
- /* Turn LEDs off. */\r
- MCF_GPIO_SETTC |= ( LED0_POS | LED1_POS );\r
- MCF_GPIO_SETTD |= ( LED2_POS | LED3_POS );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
-{\r
- if( uxLED < 2 )\r
- {\r
- if( xValue != 0 )\r
- {\r
- taskENTER_CRITICAL();\r
- MCF_GPIO_PORTTD |= ucLEDDefinitions[ uxLED ];\r
- taskEXIT_CRITICAL();\r
- }\r
- else\r
- {\r
- taskENTER_CRITICAL();\r
- MCF_GPIO_PORTTD &= ~ucLEDDefinitions[ uxLED ];\r
- taskEXIT_CRITICAL();\r
- }\r
- }\r
- else if( uxLED < 4 )\r
- {\r
- if( xValue != 0 )\r
- {\r
- taskENTER_CRITICAL();\r
- MCF_GPIO_PORTTC |= ucLEDDefinitions[ uxLED ];\r
- taskEXIT_CRITICAL();\r
- }\r
- else\r
- {\r
- taskENTER_CRITICAL();\r
- MCF_GPIO_PORTTC &= ~ucLEDDefinitions[ uxLED ];\r
- taskEXIT_CRITICAL();\r
- }\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
-{\r
- if( uxLED < 2 )\r
- {\r
- taskENTER_CRITICAL();\r
- {\r
- if( ( MCF_GPIO_PORTTD & ucLEDDefinitions[ uxLED ] ) == ( unsigned char ) 0 )\r
- {\r
- MCF_GPIO_PORTTD |= ucLEDDefinitions[ uxLED ];\r
- }\r
- else\r
- {\r
- MCF_GPIO_PORTTD &= ~ucLEDDefinitions[ uxLED ];\r
- }\r
- }\r
- taskEXIT_CRITICAL();\r
- }\r
- else if( uxLED < 4 )\r
- {\r
- taskENTER_CRITICAL();\r
- {\r
- if( ( MCF_GPIO_PORTTC & ucLEDDefinitions[ uxLED ] ) == ( unsigned char ) 0 )\r
- {\r
- MCF_GPIO_PORTTC |= ucLEDDefinitions[ uxLED ];\r
- }\r
- else\r
- {\r
- MCF_GPIO_PORTTC &= ~ucLEDDefinitions[ uxLED ];\r
- }\r
- }\r
- taskEXIT_CRITICAL();\r
- }\r
-}\r
-\r
+++ /dev/null
-/* Linker script for m5282evb
- *
- * Version:Sourcery G++ Lite 4.2-125
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- * Copyright 2007, 2008 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-OUTPUT_ARCH(m68k)
-ENTRY(_start)
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lcs3 -lcs3hosted -lcs3coldfire)
-
-MEMORY
-{
- ram (rwx) : ORIGIN = 0x00000000, LENGTH = 16M
- rom (rx) : ORIGIN = 0xFFE00000, LENGTH = 2M
- rombar (rx) : ORIGIN = 0xf0000000, LENGTH = 512K
- rambar (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
- ipsbar (rw) : ORIGIN = 0x40000000, LENGTH = 0x20000000
-}
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
- */
-EXTERN(__cs3_reset_m5282evb)
-INCLUDE coldfire-names.inc
-EXTERN(__cs3_interrupt_vector_coldfire)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-/* force exit to be picked up in a hosted or os environment */
-EXTERN(exit atexit)
-
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-
- .text :
- {
- CREATE_OBJECT_SYMBOLS
- __cs3_region_start_ram = .;
- *(.cs3.region-head.ram)
- ASSERT (. == __cs3_region_start_ram, ".cs3.region-head.ram not permitted");
- __cs3_interrupt_vector = __cs3_interrupt_vector_coldfire;
- *(.cs3.interrupt_vector)
- /* Make sure we pulled in an interrupt vector. */
- ASSERT (. != __cs3_interrupt_vector_coldfire, "No interrupt vector");
-
- PROVIDE(__cs3_reset_m5282evb = _start);
- __cs3_reset = __cs3_reset_m5282evb;
- *(.cs3.reset)
-
- *(.text .text.* .gnu.linkonce.t.*)
-
- . = ALIGN(0x4);
- KEEP (*crtbegin.o(.jcr))
- KEEP (*(EXCLUDE_FILE (*crtend.o) .jcr))
- KEEP (*crtend.o(.jcr))
-
- . = ALIGN(0x4);
- *(.gcc_except_table .gcc_except_table.*)
- } >ram
- .eh_frame_hdr : ALIGN (4)
- {
- KEEP (*(.eh_frame_hdr))
- } >ram
- .eh_frame : ALIGN (4)
- {
- KEEP (*(.eh_frame))
- } >ram
- .rodata : ALIGN (4)
- {
- *(.rodata .rodata.* .gnu.linkonce.r.*)
-
- . = ALIGN(4);
- _init = .;
- LONG (0x4e560000) /* linkw %fp,#0 */
- KEEP(*(.init))
- SHORT (0x4e5e) /* unlk %fp */
- SHORT (0x4e75) /* rts */
-
- . = ALIGN(4);
- __preinit_array_start = .;
- KEEP (*(.preinit_array))
- __preinit_array_end = .;
-
- . = ALIGN(4);
- __init_array_start = .;
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array))
- __init_array_end = .;
-
- . = ALIGN(4);
- _fini = .;
- LONG (0x4e560000) /* linkw %fp,#0 */
- KEEP(*(.fini))
- SHORT (0x4e5e) /* unlk %fp */
- SHORT (0x4e75) /* rts */
-
- . = ALIGN(4);
- __fini_array_start = .;
- KEEP (*(.fini_array))
- KEEP (*(SORT(.fini_array.*)))
- __fini_array_end = .;
-
- . = ALIGN(0x4);
- KEEP (*crtbegin.o(.ctors))
- KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*crtend.o(.ctors))
-
- . = ALIGN(0x4);
- KEEP (*crtbegin.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*crtend.o(.dtors))
-
- *(.lit)
-
- . = ALIGN(4);
- __cs3_regions = .;
- LONG (0)
- LONG (__cs3_region_init_ram)
- LONG (__cs3_region_start_ram)
- LONG (__cs3_region_init_size_ram)
- LONG (__cs3_region_zero_size_ram)
- LONG (0)
- LONG (__cs3_region_init_rombar)
- LONG (__cs3_region_start_rombar)
- LONG (__cs3_region_init_size_rombar)
- LONG (__cs3_region_zero_size_rombar)
- LONG (0)
- LONG (__cs3_region_init_rambar)
- LONG (__cs3_region_start_rambar)
- LONG (__cs3_region_init_size_rambar)
- LONG (__cs3_region_zero_size_rambar)
- __cs3_regions_end = .;
-
- . = ALIGN (8);
- . = ALIGN (8);
- _etext = .;
- } >ram
-
- .cs3.rom : ALIGN (8)
- {
- __cs3_region_start_rom = .;
- *(.cs3.region-head.rom)
- *(.rom)
- . = ALIGN (8);
- } >rom
- .cs3.rom.bss :
- {
- *(.rom.b)
- . = ALIGN (8);
- } >rom
- /* __cs3_region_end_rom is deprecated */
- __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
- __cs3_region_size_rom = LENGTH(rom);
- __cs3_region_init_rom = LOADADDR (.cs3.rom);
- __cs3_region_init_size_rom = LOADADDR (.cs3.rom.bss) - LOADADDR (.cs3.rom);
- __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);
-
- .cs3.rombar : ALIGN (8)
- {
- __cs3_region_start_rombar = .;
- *(.cs3.region-head.rombar)
- *(.rombar)
- . = ALIGN (8);
- } >rombar
- .cs3.rombar.bss :
- {
- *(.rombar.b)
- . = ALIGN (8);
- } >rombar
- /* __cs3_region_end_rombar is deprecated */
- __cs3_region_end_rombar = __cs3_region_start_rombar + LENGTH(rombar);
- __cs3_region_size_rombar = LENGTH(rombar);
- __cs3_region_init_rombar = LOADADDR (.cs3.rombar);
- __cs3_region_init_size_rombar = LOADADDR (.cs3.rombar.bss) - LOADADDR (.cs3.rombar);
- __cs3_region_zero_size_rombar = SIZEOF(.cs3.rombar.bss);
-
- .cs3.rambar : ALIGN (8)
- {
- __cs3_region_start_rambar = .;
- *(.cs3.region-head.rambar)
- *(.rambar)
- . = ALIGN (8);
- } >rambar
- .cs3.rambar.bss :
- {
- *(.rambar.b)
- . = ALIGN (8);
- } >rambar
- /* __cs3_region_end_rambar is deprecated */
- __cs3_region_end_rambar = __cs3_region_start_rambar + LENGTH(rambar);
- __cs3_region_size_rambar = LENGTH(rambar);
- __cs3_region_init_rambar = LOADADDR (.cs3.rambar);
- __cs3_region_init_size_rambar = LOADADDR (.cs3.rambar.bss) - LOADADDR (.cs3.rambar);
- __cs3_region_zero_size_rambar = SIZEOF(.cs3.rambar.bss);
-
- .cs3.ipsbar :
- {
- __cs3_region_start_ipsbar = .;
- *(.cs3.region-head.ipsbar)
- . = ALIGN (8);
- } >ipsbar
- /* __cs3_region_end_ipsbar is deprecated */
- __cs3_region_end_ipsbar = __cs3_region_start_ipsbar + LENGTH(ipsbar);
- __cs3_region_size_ipsbar = LENGTH(ipsbar);
-
- .data : ALIGN (8)
- {
-
- *(.got.plt) *(.got)
- *(.shdata)
- *(.data .data.* .gnu.linkonce.d.*)
- . = ALIGN (8);
- *(.ram)
- _edata = .;
- } >rambar
- .bss :
- {
- *(.shbss)
- *(.bss .bss.* .gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN (8);
- *(.ram.b)
- _end = .;
- __end = .;
- } >rambar
- /* __cs3_region_end_ram is deprecated */
- __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
- __cs3_region_size_ram = LENGTH(ram);
- __cs3_region_init_ram = LOADADDR (.text);
- __cs3_region_init_size_ram = _edata - ADDR (.text);
- __cs3_region_zero_size_ram = _end - _edata;
-
- .stab 0 (NOLOAD) : { *(.stab) }
- .stabstr 0 (NOLOAD) : { *(.stabstr) }
- /* DWARF debug sections.
- * Symbols in the DWARF debugging sections are relative to the beginning
- * of the section so we begin them at 0. */
- /* DWARF 1 */
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- /* GNU DWARF 1 extensions */
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- /* DWARF 1.1 and DWARF 2 */
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- /* DWARF 2 */
- .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- /* SGI/MIPS DWARF 2 extensions */
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
-}
+++ /dev/null
-/* Linker script for m5282evb
- *
- * Version:Sourcery G++ Lite 4.2-125
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- * Copyright 2007, 2008 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-OUTPUT_ARCH(m68k)
-ENTRY(_start)
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3coldfire)
-
-MEMORY
-{
- ram (rwx) : ORIGIN = 0x00000000, LENGTH = 16M
- rom (rx) : ORIGIN = 0xFFE00000, LENGTH = 2M
- rombar (rx) : ORIGIN = 0xf0000000, LENGTH = 512K
- rambar (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
- ipsbar (rw) : ORIGIN = 0x40000000, LENGTH = 0x20000000
-}
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
- */
-EXTERN(__cs3_reset_m5282evb)
-INCLUDE coldfire-names.inc
-EXTERN(__cs3_interrupt_vector_coldfire)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-
- .text :
- {
- CREATE_OBJECT_SYMBOLS
- __cs3_region_start_ram = .;
- *(.cs3.region-head.ram)
- ASSERT (. == __cs3_region_start_ram, ".cs3.region-head.ram not permitted");
- __cs3_interrupt_vector = __cs3_interrupt_vector_coldfire;
- *(.cs3.interrupt_vector)
- /* Make sure we pulled in an interrupt vector. */
- ASSERT (. != __cs3_interrupt_vector_coldfire, "No interrupt vector");
-
- PROVIDE(__cs3_reset_m5282evb = _start);
- __cs3_reset = __cs3_reset_m5282evb;
- *(.cs3.reset)
-
- *(.text .text.* .gnu.linkonce.t.*)
-
- . = ALIGN(0x4);
- KEEP (*crtbegin.o(.jcr))
- KEEP (*(EXCLUDE_FILE (*crtend.o) .jcr))
- KEEP (*crtend.o(.jcr))
-
- . = ALIGN(0x4);
- *(.gcc_except_table .gcc_except_table.*)
- } >ram
- .eh_frame_hdr : ALIGN (4)
- {
- KEEP (*(.eh_frame_hdr))
- } >ram
- .eh_frame : ALIGN (4)
- {
- KEEP (*(.eh_frame))
- } >ram
- .rodata : ALIGN (4)
- {
- *(.rodata .rodata.* .gnu.linkonce.r.*)
-
- . = ALIGN(4);
- _init = .;
- LONG (0x4e560000) /* linkw %fp,#0 */
- KEEP(*(.init))
- SHORT (0x4e5e) /* unlk %fp */
- SHORT (0x4e75) /* rts */
-
- . = ALIGN(4);
- __preinit_array_start = .;
- KEEP (*(.preinit_array))
- __preinit_array_end = .;
-
- . = ALIGN(4);
- __init_array_start = .;
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array))
- __init_array_end = .;
-
- . = ALIGN(4);
- _fini = .;
- LONG (0x4e560000) /* linkw %fp,#0 */
- KEEP(*(.fini))
- SHORT (0x4e5e) /* unlk %fp */
- SHORT (0x4e75) /* rts */
-
- . = ALIGN(4);
- __fini_array_start = .;
- KEEP (*(.fini_array))
- KEEP (*(SORT(.fini_array.*)))
- __fini_array_end = .;
-
- . = ALIGN(0x4);
- KEEP (*crtbegin.o(.ctors))
- KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*crtend.o(.ctors))
-
- . = ALIGN(0x4);
- KEEP (*crtbegin.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*crtend.o(.dtors))
-
- *(.lit)
-
- . = ALIGN(4);
- __cs3_regions = .;
- LONG (0)
- LONG (__cs3_region_init_ram)
- LONG (__cs3_region_start_ram)
- LONG (__cs3_region_init_size_ram)
- LONG (__cs3_region_zero_size_ram)
- LONG (0)
- LONG (__cs3_region_init_rombar)
- LONG (__cs3_region_start_rombar)
- LONG (__cs3_region_init_size_rombar)
- LONG (__cs3_region_zero_size_rombar)
- LONG (0)
- LONG (__cs3_region_init_rambar)
- LONG (__cs3_region_start_rambar)
- LONG (__cs3_region_init_size_rambar)
- LONG (__cs3_region_zero_size_rambar)
- __cs3_regions_end = .;
-
- . = ALIGN (8);
- . = ALIGN (8);
- _etext = .;
- } >ram
-
- .cs3.rom : ALIGN (8)
- {
- __cs3_region_start_rom = .;
- *(.cs3.region-head.rom)
- *(.rom)
- . = ALIGN (8);
- } >rom
- .cs3.rom.bss :
- {
- *(.rom.b)
- . = ALIGN (8);
- } >rom
- /* __cs3_region_end_rom is deprecated */
- __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
- __cs3_region_size_rom = LENGTH(rom);
- __cs3_region_init_rom = LOADADDR (.cs3.rom);
- __cs3_region_init_size_rom = LOADADDR (.cs3.rom.bss) - LOADADDR (.cs3.rom);
- __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);
-
- .cs3.rombar : ALIGN (8)
- {
- __cs3_region_start_rombar = .;
- *(.cs3.region-head.rombar)
- *(.rombar)
- . = ALIGN (8);
- } >rombar
- .cs3.rombar.bss :
- {
- *(.rombar.b)
- . = ALIGN (8);
- } >rombar
- /* __cs3_region_end_rombar is deprecated */
- __cs3_region_end_rombar = __cs3_region_start_rombar + LENGTH(rombar);
- __cs3_region_size_rombar = LENGTH(rombar);
- __cs3_region_init_rombar = LOADADDR (.cs3.rombar);
- __cs3_region_init_size_rombar = LOADADDR (.cs3.rombar.bss) - LOADADDR (.cs3.rombar);
- __cs3_region_zero_size_rombar = SIZEOF(.cs3.rombar.bss);
-
- .cs3.rambar : ALIGN (8)
- {
- __cs3_region_start_rambar = .;
- *(.cs3.region-head.rambar)
- *(.rambar)
- . = ALIGN (8);
- } >rambar
- .cs3.rambar.bss :
- {
- *(.rambar.b)
- . = ALIGN (8);
- } >rambar
- /* __cs3_region_end_rambar is deprecated */
- __cs3_region_end_rambar = __cs3_region_start_rambar + LENGTH(rambar);
- __cs3_region_size_rambar = LENGTH(rambar);
- __cs3_region_init_rambar = LOADADDR (.cs3.rambar);
- __cs3_region_init_size_rambar = LOADADDR (.cs3.rambar.bss) - LOADADDR (.cs3.rambar);
- __cs3_region_zero_size_rambar = SIZEOF(.cs3.rambar.bss);
-
- .cs3.ipsbar :
- {
- __cs3_region_start_ipsbar = .;
- *(.cs3.region-head.ipsbar)
- . = ALIGN (8);
- } >ipsbar
- /* __cs3_region_end_ipsbar is deprecated */
- __cs3_region_end_ipsbar = __cs3_region_start_ipsbar + LENGTH(ipsbar);
- __cs3_region_size_ipsbar = LENGTH(ipsbar);
-
- .data : ALIGN (8)
- {
-
- *(.got.plt) *(.got)
- *(.shdata)
- *(.data .data.* .gnu.linkonce.d.*)
- . = ALIGN (8);
- *(.ram)
- _edata = .;
- } >ram
- .bss :
- {
- *(.shbss)
- *(.bss .bss.* .gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN (8);
- *(.ram.b)
- _end = .;
- __end = .;
- } >ram
- /* __cs3_region_end_ram is deprecated */
- __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
- __cs3_region_size_ram = LENGTH(ram);
- __cs3_region_init_ram = LOADADDR (.text);
- __cs3_region_init_size_ram = _edata - ADDR (.text);
- __cs3_region_zero_size_ram = _end - _edata;
-
- .stab 0 (NOLOAD) : { *(.stab) }
- .stabstr 0 (NOLOAD) : { *(.stabstr) }
- /* DWARF debug sections.
- * Symbols in the DWARF debugging sections are relative to the beginning
- * of the section so we begin them at 0. */
- /* DWARF 1 */
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- /* GNU DWARF 1 extensions */
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- /* DWARF 1.1 and DWARF 2 */
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- /* DWARF 2 */
- .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- /* SGI/MIPS DWARF 2 extensions */
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
-}
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-\r
-/*\r
- * Creates all the demo application tasks, then starts the scheduler. The WEB\r
- * documentation provides more details of the standard demo application tasks.\r
- * In addition to the standard demo tasks, the following tasks and tests are\r
- * defined and/or created within this file:\r
- *\r
- * "Check" task - This only executes every five seconds but has a high priority\r
- * to ensure it gets processor time. Its main function is to check that all the\r
- * standard demo tasks are still operational. While no errors have been\r
- * discovered the check task will toggle an LED every 5 seconds - the toggle\r
- * rate increasing to 500ms being a visual indication that at least one task has\r
- * reported unexpected behaviour.\r
- *\r
- * "Reg test" tasks - These fill the registers with known values, then check\r
- * that each register still contains its expected value. Each task uses\r
- * different values. The tasks run with very low priority so get preempted very\r
- * frequently. A register containing an unexpected value is indicative of an\r
- * error in the context switching mechanism.\r
- *\r
- */\r
-\r
-/* Standard includes. */\r
-#include <stdio.h>\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "queue.h"\r
-#include "semphr.h"\r
-\r
-/* Demo app includes. */\r
-#include "BlockQ.h"\r
-#include "death.h"\r
-#include "integer.h"\r
-#include "flash.h"\r
-#include "partest.h"\r
-#include "semtest.h"\r
-#include "PollQ.h"\r
-#include "GenQTest.h"\r
-#include "QPeek.h"\r
-#include "recmutex.h"\r
-#include "IntQueue.h"\r
-#include "comtest2.h"\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The time between cycles of the 'check' functionality - as described at the\r
-top of this file. */\r
-#define mainNO_ERROR_PERIOD ( ( TickType_t ) 5000 / portTICK_PERIOD_MS )\r
-\r
-/* The rate at which the LED controlled by the 'check' task will flash should an\r
-error have been detected. */\r
-#define mainERROR_PERIOD ( ( TickType_t ) 500 / portTICK_PERIOD_MS )\r
-\r
-/* The LED controlled by the 'check' task. */\r
-#define mainCHECK_LED ( 3 )\r
-\r
-/* ComTest constants - there is no free LED for the comtest tasks. */\r
-#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 19200 )\r
-#define mainCOM_TEST_LED ( 5 )\r
-\r
-/* Task priorities. */\r
-#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
-#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
-#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-\r
-/*\r
- * Configure the hardware for the demo.\r
- */\r
-static void prvSetupHardware( void );\r
-\r
-/*\r
- * Implements the 'check' task functionality as described at the top of this\r
- * file.\r
- */\r
-static void prvCheckTask( void *pvParameters );\r
-\r
-/*\r
- * Implement the 'Reg test' functionality as described at the top of this file.\r
- */\r
-static void vRegTest1Task( void *pvParameters );\r
-static void vRegTest2Task( void *pvParameters );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Counters used to detect errors within the reg test tasks. */\r
-static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-int main( void )\r
-{\r
- /* Setup the hardware ready for this demo. */\r
- prvSetupHardware();\r
-\r
- /* Start the standard demo tasks. */\r
- vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
- vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
- vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
- vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
- vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
- vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
- vStartQueuePeekTasks();\r
- vStartRecursiveMutexTasks();\r
- vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
- vStartInterruptQueueTasks();\r
-\r
- /* Start the reg test tasks - defined in this file. */\r
- xTaskCreate( vRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
- xTaskCreate( vRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
-\r
- /* Create the check task. */\r
- xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
-\r
- /* The suicide tasks must be created last as they need to know how many\r
- tasks were running prior to their creation in order to ascertain whether\r
- or not the correct/expected number of tasks are running at any given time. */\r
- vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
-\r
- /* Start the scheduler. */\r
- vTaskStartScheduler();\r
-\r
- /* Will only get here if there was insufficient memory to create the idle\r
- task. */\r
- for( ;; );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvCheckTask( void *pvParameters )\r
-{\r
-unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
-TickType_t xLastExecutionTime;\r
-\r
- ( void ) pvParameters;\r
-\r
- /* Initialise the variable used to control our iteration rate prior to\r
- its first use. */\r
- xLastExecutionTime = xTaskGetTickCount();\r
-\r
- for( ;; )\r
- {\r
- /* Wait until it is time to run the tests again. */\r
- vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
-\r
- /* Has an error been found in any task? */\r
- if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x01UL;\r
- }\r
-\r
- if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x02UL;\r
- }\r
-\r
- if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x04UL;\r
- }\r
-\r
- if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x20UL;\r
- }\r
-\r
- if( xArePollingQueuesStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x40UL;\r
- }\r
-\r
- if( xIsCreateTaskStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x80UL;\r
- }\r
-\r
- if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x100UL;\r
- }\r
-\r
- if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x200UL;\r
- }\r
-\r
- if( xAreComTestTasksStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x400UL;\r
- }\r
-\r
- if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
- {\r
- ulError |= 0x800UL;\r
- }\r
-\r
- if( ulLastRegTest1Count == ulRegTest1Counter )\r
- {\r
- ulError |= 0x1000UL;\r
- }\r
-\r
- if( ulLastRegTest2Count == ulRegTest2Counter )\r
- {\r
- ulError |= 0x1000UL;\r
- }\r
-\r
- ulLastRegTest1Count = ulRegTest1Counter;\r
- ulLastRegTest2Count = ulRegTest2Counter;\r
-\r
- /* If an error has been found then increase our cycle rate, and in so\r
- going increase the rate at which the check task LED toggles. */\r
- if( ulError != 0 )\r
- {\r
- ulTicksToWait = mainERROR_PERIOD;\r
- }\r
-\r
- /* Toggle the LED each iteration. */\r
- vParTestToggleLED( mainCHECK_LED );\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void prvSetupHardware( void )\r
-{\r
-extern void mcf5xxx_wr_cacr( unsigned long );\r
-\r
- portDISABLE_INTERRUPTS();\r
-\r
- /* Enable the cache. */\r
- mcf5xxx_wr_cacr( MCF5XXX_CACR_CENB | MCF5XXX_CACR_CINV | MCF5XXX_CACR_DISD | MCF5XXX_CACR_CEIB | MCF5XXX_CACR_CLNF_00 );\r
- asm volatile( "NOP" ); /* As per errata. */\r
-\r
- /* Multiply 8Mhz reference crystal by 8 to achieve system clock of 64Mhz. */\r
- MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD( 2 );\r
-\r
- /* Wait for PLL to lock. */\r
- while( !( MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK ) )\r
- {\r
- __asm__ volatile ( "NOP" );\r
- }\r
-\r
- /* Setup the port used to toggle LEDs. */\r
- vParTestInitialise();\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vApplicationStackOverflowHook( TaskHandle_t *pxTask, signed char *pcTaskName )\r
-{\r
- /* This will get called if a stack overflow is detected during the context\r
- switch. Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
- problems within nested interrupts, but only do this for debug purposes as\r
- it will increase the context switch time. */\r
-\r
- ( void ) pxTask;\r
- ( void ) pcTaskName;\r
-\r
- for( ;; );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void vRegTest1Task( void *pvParameters )\r
-{\r
- /* Sanity check - did we receive the parameter expected? */\r
- if( pvParameters != &ulRegTest1Counter )\r
- {\r
- /* Change here so the check task can detect that an error occurred. */\r
- for( ;; );\r
- }\r
-\r
- /* Set all the registers to known values, then check that each retains its\r
- expected value - as described at the top of this file. If an error is\r
- found then the loop counter will no longer be incremented allowing the check\r
- task to recognise the error. */\r
- asm volatile ( "reg_test_1_start: \n\t"\r
- " moveq #1, %d0 \n\t"\r
- " moveq #2, %d1 \n\t"\r
- " moveq #3, %d2 \n\t"\r
- " moveq #4, %d3 \n\t"\r
- " moveq #5, %d4 \n\t"\r
- " moveq #6, %d5 \n\t"\r
- " moveq #7, %d6 \n\t"\r
- " moveq #8, %d7 \n\t"\r
- " move #9, %a0 \n\t"\r
- " move #10, %a1 \n\t"\r
- " move #11, %a2 \n\t"\r
- " move #12, %a3 \n\t"\r
- " move #13, %a4 \n\t"\r
- " move #14, %a5 \n\t"\r
- " move #15, %a6 \n\t"\r
- " \n\t"\r
- " cmpi.l #1, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " cmpi.l #2, %d1 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " cmpi.l #3, %d2 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " cmpi.l #4, %d3 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " cmpi.l #5, %d4 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " cmpi.l #6, %d5 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " cmpi.l #7, %d6 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " cmpi.l #8, %d7 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " move %a0, %d0 \n\t"\r
- " cmpi.l #9, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " move %a1, %d0 \n\t"\r
- " cmpi.l #10, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " move %a2, %d0 \n\t"\r
- " cmpi.l #11, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " move %a3, %d0 \n\t"\r
- " cmpi.l #12, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " move %a4, %d0 \n\t"\r
- " cmpi.l #13, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " move %a5, %d0 \n\t"\r
- " cmpi.l #14, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " move %a6, %d0 \n\t"\r
- " cmpi.l #15, %d0 \n\t"\r
- " bne reg_test_1_error \n\t"\r
- " movel ulRegTest1Counter, %d0 \n\t"\r
- " addql #1, %d0 \n\t"\r
- " movel %d0, ulRegTest1Counter \n\t"\r
- " bra reg_test_1_start \n\t"\r
- "reg_test_1_error: \n\t"\r
- " bra reg_test_1_error \n\t"\r
- );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void vRegTest2Task( void *pvParameters )\r
-{\r
- /* Sanity check - did we receive the parameter expected? */\r
- if( pvParameters != &ulRegTest2Counter )\r
- {\r
- /* Change here so the check task can detect that an error occurred. */\r
- for( ;; );\r
- }\r
-\r
- /* Set all the registers to known values, then check that each retains its\r
- expected value - as described at the top of this file. If an error is\r
- found then the loop counter will no longer be incremented allowing the check\r
- task to recognise the error. */\r
- asm volatile ( "reg_test_2_start: \n\t"\r
- " moveq #10, %d0 \n\t"\r
- " moveq #20, %d1 \n\t"\r
- " moveq #30, %d2 \n\t"\r
- " moveq #40, %d3 \n\t"\r
- " moveq #50, %d4 \n\t"\r
- " moveq #60, %d5 \n\t"\r
- " moveq #70, %d6 \n\t"\r
- " moveq #80, %d7 \n\t"\r
- " move #90, %a0 \n\t"\r
- " move #100, %a1 \n\t"\r
- " move #110, %a2 \n\t"\r
- " move #120, %a3 \n\t"\r
- " move #130, %a4 \n\t"\r
- " move #140, %a5 \n\t"\r
- " move #150, %a6 \n\t"\r
- " \n\t"\r
- " cmpi.l #10, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " cmpi.l #20, %d1 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " cmpi.l #30, %d2 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " cmpi.l #40, %d3 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " cmpi.l #50, %d4 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " cmpi.l #60, %d5 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " cmpi.l #70, %d6 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " cmpi.l #80, %d7 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " move %a0, %d0 \n\t"\r
- " cmpi.l #90, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " move %a1, %d0 \n\t"\r
- " cmpi.l #100, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " move %a2, %d0 \n\t"\r
- " cmpi.l #110, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " move %a3, %d0 \n\t"\r
- " cmpi.l #120, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " move %a4, %d0 \n\t"\r
- " cmpi.l #130, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " move %a5, %d0 \n\t"\r
- " cmpi.l #140, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " move %a6, %d0 \n\t"\r
- " cmpi.l #150, %d0 \n\t"\r
- " bne reg_test_2_error \n\t"\r
- " movel ulRegTest1Counter, %d0 \n\t"\r
- " addql #1, %d0 \n\t"\r
- " movel %d0, ulRegTest2Counter \n\t"\r
- " bra reg_test_2_start \n\t"\r
- "reg_test_2_error: \n\t"\r
- " bra reg_test_2_error \n\t"\r
- );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
+++ /dev/null
-/*\r
- FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
-\r
-\r
-/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.\r
-\r
-NOTE: This driver is primarily to test the scheduler functionality. It does\r
-not effectively use the buffers or DMA and is therefore not intended to be\r
-an example of an efficient driver. */\r
-\r
-/* Standard include file. */\r
-#include <stdlib.h>\r
-\r
-/* Scheduler include files. */\r
-#include "FreeRTOS.h"\r
-#include "queue.h"\r
-#include "task.h"\r
-\r
-/* Demo app include files. */\r
-#include "serial.h"\r
-\r
-/* Hardware definitions. */\r
-#define serNO_PARITY ( ( unsigned char ) 0x02 << 3 )\r
-#define ser8DATA_BITS ( ( unsigned char ) 0x03 )\r
-#define ser1STOP_BIT ( ( unsigned char ) 0x07 )\r
-#define serSYSTEM_CLOCK ( ( unsigned char ) 0xdd )\r
-#define serTX_OUTPUT ( ( unsigned char ) 0x04 )\r
-#define serRX_INPUT ( ( unsigned char ) 0x08 )\r
-#define serTX_ENABLE ( ( unsigned char ) 0x04 )\r
-#define serRX_ENABLE ( ( unsigned char ) 0x01 )\r
-#define serTX_INT ( ( unsigned char ) 0x01 )\r
-#define serRX_INT ( ( unsigned char ) 0x02 )\r
-\r
-\r
-/* The queues used to communicate between tasks and ISR's. */\r
-static QueueHandle_t xRxedChars;\r
-static QueueHandle_t xCharsForTx;\r
-\r
-/* Flag used to indicate the tx status. */\r
-static portBASE_TYPE xTxHasEnded = pdTRUE;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The UART interrupt handler. */\r
-void __attribute__( ( interrupt ) ) __cs3_isr_interrupt_78( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
-{\r
-const unsigned long ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );\r
-\r
- /* Create the queues used by the com test task. */\r
- xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
- xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
-\r
- xTxHasEnded = pdTRUE;\r
-\r
- /* Set the pins to UART mode. */\r
- MCF_PAD_PUAPAR |= ( serTX_OUTPUT | serRX_INPUT );\r
-\r
- /* Reset the peripheral. */\r
- MCF_UART1_UCR = MCF_UART_UCR_RESET_RX;\r
- MCF_UART1_UCR = MCF_UART_UCR_RESET_TX;\r
- MCF_UART1_UCR = MCF_UART_UCR_RESET_ERROR;\r
- MCF_UART1_UCR = MCF_UART_UCR_RESET_BKCHGINT;\r
- MCF_UART1_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;\r
-\r
- /* Configure the UART. */\r
- MCF_UART1_UMR1 = serNO_PARITY | ser8DATA_BITS;\r
- MCF_UART1_UMR2 = ser1STOP_BIT;\r
- MCF_UART1_UCSR = serSYSTEM_CLOCK;\r
-\r
- MCF_UART1_UBG1 = ( unsigned char ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );\r
- MCF_UART1_UBG2 = ( unsigned char ) ( ulBaudRateDivisor & 0xffUL );\r
-\r
- /* Turn it on. */\r
- MCF_UART1_UCR = serTX_ENABLE | serRX_ENABLE;\r
-\r
- /* Configure the interrupt controller. Run the UARTs above the kernel\r
- interrupt priority for demo purposes. */\r
- MCF_INTC0_ICR14 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 ) << 3 );\r
- MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK14 | 0x01 );\r
-\r
- /* The Tx interrupt is not enabled until there is data to send. */\r
- MCF_UART1_UIMR = serRX_INT;\r
-\r
- /* Only a single port is implemented so we don't need to return anything. */\r
- return NULL;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )\r
-{\r
- /* Only one port is supported. */\r
- ( void ) pxPort;\r
-\r
- /* Get the next character from the buffer. Return false if no characters\r
- are available or arrive before xBlockTime expires. */\r
- if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
- {\r
- return pdTRUE;\r
- }\r
- else\r
- {\r
- return pdFALSE;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )\r
-{\r
- /* Only one port is supported. */\r
- ( void ) pxPort;\r
-\r
- /* Return false if after the block time there is no room on the Tx queue. */\r
- if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
- {\r
- return pdFAIL;\r
- }\r
-\r
- /* A critical section should not be required as xTxHasEnded will not be\r
- written to by the ISR if it is already 0 (is this correct?). */\r
- if( xTxHasEnded != pdFALSE )\r
- {\r
- xTxHasEnded = pdFALSE;\r
- MCF_UART1_UIMR = serRX_INT | serTX_INT;\r
- }\r
-\r
- return pdPASS;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vSerialClose( xComPortHandle xPort )\r
-{\r
- ( void ) xPort;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void __cs3_isr_interrupt_78( void )\r
-{\r
-unsigned char ucChar;\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;\r
-\r
- while( xDoneSomething != pdFALSE )\r
- {\r
- xDoneSomething = pdFALSE;\r
-\r
- /* Does the tx buffer contain space? */\r
- if( ( MCF_UART1_USR & MCF_UART_USR_TXRDY ) != 0x00 )\r
- {\r
- /* Are there any characters queued to be sent? */\r
- if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
- {\r
- /* Send the next char. */\r
- MCF_UART1_UTB = ucChar;\r
- xDoneSomething = pdTRUE;\r
- }\r
- else\r
- {\r
- /* Turn off the Tx interrupt until such time as another character\r
- is being transmitted. */\r
- MCF_UART1_UIMR = serRX_INT;\r
- xTxHasEnded = pdTRUE;\r
- }\r
- }\r
-\r
- if( MCF_UART1_USR & MCF_UART_USR_RXRDY )\r
- {\r
- ucChar = MCF_UART1_URB;\r
- xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );\r
- xDoneSomething = pdTRUE;\r
- }\r
- }\r
-\r
- portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
-}\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
--- /dev/null
+If you need the demo that used to be in this directory then download FreeRTOS V8.2.3\r
+from http://sourceforge.net/projects/freertos/files/FreeRTOS/\r
+\r
* priority task while it holds the inherited high priority. Once the mutex\r
* is returned the task with the inherited priority returns to its original\r
* low priority, and is therefore immediately preempted by first the high\r
- * priority task and then the medium prioroity task before it can continue.\r
+ * priority task and then the medium priority task before it can continue.\r
*/\r
static void prvLowPriorityMutexTask( void *pvParameters );\r
static void prvMediumPriorityMutexTask( void *pvParameters );\r
/* The variable that is guarded by the mutex in the mutex demo tasks. */\r
static volatile uint32_t ulGuardedVariable = 0;\r
\r
-/* Handles used in the mutext test to suspend and resume the high and medium\r
+/* Handles used in the mutex test to suspend and resume the high and medium\r
priority mutex test tasks. */\r
static TaskHandle_t xHighPriorityMutexTask, xMediumPriorityMutexTask;\r
\r
QueueHandle_t xQueue;\r
SemaphoreHandle_t xMutex;\r
\r
-\r
/* Create the queue that we are going to use for the\r
prvSendFrontAndBackTest demo. */\r
xQueue = xQueueCreate( genqQUEUE_LENGTH, sizeof( uint32_t ) );\r
debuggers to locate queues and has no purpose if a kernel aware debugger\r
is not being used. The call to vQueueAddToRegistry() will be removed\r
by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is\r
- defined to be less than 1. */\r
+ defined to be less than 1. First check a name is not returned before the\r
+ queue has been added. */\r
+ configASSERT( pcQueueGetQueueName( xQueue ) == NULL );\r
+ \r
+ /* Then add the queue to the registry, and check its name is returned\r
+ correctly. */\r
+ vQueueAddToRegistry( xQueue, "Gen_Queue_Test" );\r
+ configASSERT( strcmp( pcQueueGetQueueName( xQueue ), "Gen_Queue_Test" ) == 0 );\r
+ \r
+ /* Then, for test purposes, remove the queue from the registry again, check\r
+ NULL is returned for its name, before adding back and leaving it. */\r
+ vQueueUnregisterQueue( xQueue );\r
+ configASSERT( pcQueueGetQueueName( xQueue ) == NULL );\r
vQueueAddToRegistry( xQueue, "Gen_Queue_Test" );\r
+ configASSERT( strcmp( pcQueueGetQueueName( xQueue ), "Gen_Queue_Test" ) == 0 );\r
\r
/* Create the demo task and pass it the queue just created. We are\r
passing the queue handle by value so it does not matter that it is\r
* hardware setup and FreeRTOS hook functions.\r
*\r
*******************************************************************************\r
- * -NOTE- The Win32 port is a simulation (or is that emulation?) only! Do not\r
- * expect to get real time behaviour from the Win32 port or this demo\r
- * application. It is provided as a convenient development and demonstration\r
- * test bed only. This was tested using Windows XP on a dual core laptop.\r
- *\r
- * Windows will not be running the FreeRTOS simulator threads continuously, so\r
- * the timing information in the FreeRTOS+Trace logs have no meaningful units.\r
- * See the documentation page for the Windows simulator for an explanation of\r
- * the slow timing:\r
+ * NOTE: Windows will not be running the FreeRTOS demo threads continuously, so\r
+ * do not expect to get real time behaviour from the FreeRTOS Windows port, or\r
+ * this demo application. Also, the timing information in the FreeRTOS+Trace\r
+ * logs have no meaningful units. See the documentation page for the Windows\r
+ * port for further information:\r
* http://www.freertos.org/FreeRTOS-Windows-Simulator-Emulator-for-Visual-Studio-and-Eclipse-MingW.html\r
- * - READ THE WEB DOCUMENTATION FOR THIS PORT FOR MORE INFORMATION ON USING IT -\r
- *******************************************************************************\r
*\r
+ * This demo was created using Windows XP on a dual core laptop, and has since\r
+ * been maintained using Windows 7 on a quad core laptop.\r
+ *\r
+ *******************************************************************************\r
*/\r
\r
/* Standard includes. */\r
#include "FreeRTOS.h"\r
#include "task.h"\r
\r
-/* This project provides two demo applications. A simple blinky style project,\r
-and a more comprehensive test and demo application. The\r
+/* This project provides two demo applications. A simple blinky style demo\r
+application, and a more comprehensive test and demo application. The\r
mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is used to select between the two.\r
-The simply blinky demo is implemented and described in main_blinky.c. The more\r
-comprehensive test and demo application is implemented and described in\r
-main_full.c. */\r
-#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0\r
+\r
+If mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is 1 then the blinky demo will be built.\r
+The blinky demo is implemented and described in main_blinky.c.\r
+\r
+If mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is not 1 then the comprehensive test and\r
+demo application will be built. The comprehensive test and demo application is\r
+implemented and described in main_full.c. */\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1\r
\r
/* This demo uses heap_5.c, and these constants define the sizes of the regions\r
-that make up the total heap. This is only done to provide an example of heap_5\r
-being used as this demo could easily create one large heap region instead of\r
-multiple smaller heap regions - in which case heap_4.c would be the more\r
-appropriate choice. */\r
+that make up the total heap. heap_5 is only used for test and example purposes\r
+as this demo could easily create one large heap region instead of multiple\r
+smaller heap regions - in which case heap_4.c would be the more appropriate\r
+choice. See http://www.freertos.org/a00111.html for an explanation. */\r
#define mainREGION_1_SIZE 4001\r
#define mainREGION_2_SIZE 18105\r
#define mainREGION_3_SIZE 1807\r
\r
+/*-----------------------------------------------------------*/\r
+\r
/*\r
* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
* main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.\r
extern void main_full( void );\r
\r
/*\r
- * Some of the RTOS hook (callback) functions only need special processing when\r
- * the full demo is being used. The simply blinky demo has no special\r
- * requirements, so these functions are called from the hook functions defined\r
- * in this file, but are defined in main_full.c.\r
+ * Only the comprehensive demo uses application hook (callback) functions. See\r
+ * http://www.freertos.org/a00016.html for more information.\r
*/\r
void vFullDemoTickHookFunction( void );\r
void vFullDemoIdleFunction( void );\r
\r
/*\r
- * This demo uses heap_5.c, so start by defining some heap regions. This is\r
- * only done to provide an example as this demo could easily create one large\r
- * heap region instead of multiple smaller heap regions - in which case heap_4.c\r
- * would be the more appropriate choice. No initialisation is required when\r
- * heap_4.c is used.\r
+ * This demo uses heap_5.c, so start by defining some heap regions. It is not\r
+ * necessary for this demo to use heap_5, as it could define one large heap\r
+ * region. Heap_5 is only used for test and example purposes. See\r
+ * http://www.freertos.org/a00111.html for an explanation.\r
*/\r
static void prvInitialiseHeap( void );\r
\r
/*\r
- * Prototypes for the standard FreeRTOS callback/hook functions implemented\r
- * within this file.\r
+ * Prototypes for the standard FreeRTOS application hook (callback) functions\r
+ * implemented within this file. See http://www.freertos.org/a00016.html .\r
*/\r
void vApplicationMallocFailedHook( void );\r
void vApplicationIdleHook( void );\r
static void prvSaveTraceFile( void );\r
\r
/* The user trace event posted to the trace recording on each tick interrupt.\r
-Note tick events will not appear in the trace recording with regular period\r
-because this project runs in a Windows simulator, and does not therefore\r
-exhibit deterministic behaviour. */\r
+Note: This project runs under Windows, and Windows will not be executing the\r
+RTOS threads continuously. Therefore tick events will not appear with a regular\r
+interval within the the trace recording. */\r
traceLabel xTickTraceUserEvent;\r
static portBASE_TYPE xTraceRunning = pdTRUE;\r
\r
\r
int main( void )\r
{\r
- /* This demo uses heap_5.c, so start by defining some heap regions. This\r
- is only done to provide an example as this demo could easily create one\r
- large heap region instead of multiple smaller heap regions - in which case\r
- heap_4.c would be the more appropriate choice. No initialisation is\r
- required when heap_4.c is used. */\r
+ /* This demo uses heap_5.c, so start by defining some heap regions. heap_5\r
+ is only used for test and example reasons. Heap_4 is more appropriate. See\r
+ http://www.freertos.org/a00111.html for an explanation. */\r
prvInitialiseHeap();\r
\r
/* Initialise the trace recorder and create the label used to post user\r
- events to the trace recording on each tick interrupt. */\r
+ events to the trace recording on each tick interrupt. Use of the trace\r
+ recorder is optional. See http://www.FreeRTOS.org/trace for more\r
+ information. */\r
vTraceInitTraceData();\r
xTickTraceUserEvent = xTraceOpenLabel( "tick" );\r
\r
- /* Start the trace recording - the recording is written to a file if\r
- configASSERT() is called. */\r
- printf( "\r\nTrace started.\r\nThe trace will be dumped to disk if a call to configASSERT() fails.\r\n" );\r
- printf( "Uncomment the call to kbhit() in this file to also dump trace with a key press.\r\n" );\r
- uiTraceStart();\r
-\r
/* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top\r
of this file. */\r
#if ( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 )\r
}\r
#else\r
{\r
+ /* Start the trace recording - the recording is written to a file if\r
+ configASSERT() is called. */\r
+ printf( "\r\nTrace started.\r\nThe trace will be dumped to disk if a call to configASSERT() fails.\r\n" );\r
+ printf( "Uncomment the call to kbhit() in this file to also dump trace with a key press.\r\n" );\r
+ uiTraceStart();\r
+\r
main_full();\r
}\r
#endif\r
function that will get called if a call to pvPortMalloc() fails.\r
pvPortMalloc() is called internally by the kernel whenever a task, queue,\r
timer or semaphore is created. It is also called by various parts of the\r
- demo application. If heap_1.c or heap_2.c are used, then the size of the\r
- heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in\r
- FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used\r
- to query the size of free heap space that remains (although it does not\r
- provide information on how the remaining heap might be fragmented). */\r
+ demo application. If heap_1.c, heap_2.c or heap_4.c is being used, then the\r
+ size of the heap available to pvPortMalloc() is defined by\r
+ configTOTAL_HEAP_SIZE in FreeRTOSConfig.h, and the xPortGetFreeHeapSize()\r
+ API function can be used to query the size of free heap space that remains\r
+ (although it does not provide information on how the remaining heap might be\r
+ fragmented). See http://www.freertos.org/a00111.html for more\r
+ information. */\r
vAssertCalled( __LINE__, __FILE__ );\r
}\r
/*-----------------------------------------------------------*/\r
to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle\r
task. It is essential that code added to this hook function never attempts\r
to block in any way (for example, call xQueueReceive() with a block time\r
- specified, or call vTaskDelay()). If the application makes use of the\r
- vTaskDelete() API function (as this demo application does) then it is also\r
- important that vApplicationIdleHook() is permitted to return to its calling\r
- function, because it is the responsibility of the idle task to clean up\r
- memory allocated by the kernel to any task that has since been deleted. */\r
+ specified, or call vTaskDelay()). If application tasks make use of the\r
+ vTaskDelete() API function to delete themselves then it is also important\r
+ that vApplicationIdleHook() is permitted to return to its calling function,\r
+ because it is the responsibility of the idle task to clean up memory\r
+ allocated by the kernel to any task that has since deleted itself. */\r
\r
/* Uncomment the following code to allow the trace to be stopped with any\r
key press. The code is commented out by default as the kbhit() function\r
\r
/* Run time stack overflow checking is performed if\r
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook\r
- function is called if a stack overflow is detected. */\r
+ function is called if a stack overflow is detected. This function is\r
+ provided as an example only as stack overflow checking does not function\r
+ when running the FreeRTOS Windows port. */\r
vAssertCalled( __LINE__, __FILE__ );\r
}\r
/*-----------------------------------------------------------*/\r
}\r
#endif /* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY */\r
\r
- /* Write a user event to the trace log.\r
- Note tick events will not appear in the trace recording with regular period\r
- because this project runs in a Windows simulator, and does not therefore\r
- exhibit deterministic behaviour. Windows will run the simulator in\r
- bursts. */\r
+ /* Write a user event to the trace log. Note: This project runs under\r
+ Windows, and Windows will not be executing the RTOS threads continuously.\r
+ Therefore tick events will not appear with a regular interval within the the\r
+ trace recording. */\r
vTraceUserEvent( xTickTraceUserEvent );\r
}\r
/*-----------------------------------------------------------*/\r
static portBASE_TYPE xPrinted = pdFALSE;\r
volatile uint32_t ulSetToNonZeroInDebuggerToContinue = 0;\r
\r
+ /* Called if an assertion passed to configASSERT() fails. See\r
+ http://www.freertos.org/a00110.html#configASSERT for more information. */\r
+\r
/* Parameters are not used. */\r
( void ) ulLine;\r
( void ) pcFileName;\r
\r
static void prvInitialiseHeap( void )\r
{\r
-/* This demo uses heap_5.c, so start by defining some heap regions. This is\r
-only done to provide an example as this demo could easily create one large heap\r
-region instead of multiple smaller heap regions - in which case heap_4.c would\r
-be the more appropriate choice. No initialisation is required when heap_4.c is\r
-used. The xHeapRegions structure requires the regions to be defined in order,\r
-so this just creates one big array, then populates the structure with offsets\r
-into the array - with gaps in between and messy alignment just for test\r
+/* The Windows demo could create one large heap region, in which case it would\r
+be appropriate to use heap_4. However, purely for demonstration purposes,\r
+heap_5 is used instead, so start by defining some heap regions. No\r
+initialisation is required when any other heap implementation is used. See\r
+http://www.freertos.org/a00111.html for more information.\r
+\r
+The xHeapRegions structure requires the regions to be defined in start address\r
+order, so this just creates one big array, then populates the structure with\r
+offsets into the array - with gaps in between and messy alignment just for test\r
purposes. */\r
static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];\r
volatile uint32_t ulAdditionalOffset = 19; /* Just to prevent 'condition is always true' warnings in configASSERT(). */\r
*/\r
\r
/******************************************************************************\r
- * NOTE 1: Do not expect to get real time behaviour from the Win32 port or this\r
- * demo application. It is provided as a convenient development and\r
- * demonstration test bed only. Windows will not be running the FreeRTOS\r
- * threads continuously, so the timing information in the FreeRTOS+Trace logs\r
- * have no meaningful units. See the documentation page for the Windows\r
- * simulator for further explanation:\r
+ * NOTE: Windows will not be running the FreeRTOS demo threads continuously, so\r
+ * do not expect to get real time behaviour from the FreeRTOS Windows port, or\r
+ * this demo application. Also, the timing information in the FreeRTOS+Trace\r
+ * logs have no meaningful units. See the documentation page for the Windows\r
+ * port for further information:\r
* http://www.freertos.org/FreeRTOS-Windows-Simulator-Emulator-for-Visual-Studio-and-Eclipse-MingW.html\r
- * - READ THE WEB DOCUMENTATION FOR THIS PORT FOR MORE INFORMATION ON USING IT -\r
*\r
* NOTE 2: This project provides two demo applications. A simple blinky style\r
* project, and a more comprehensive test and demo application. The\r
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
- * in main.c. This file implements the simply blinky style version.\r
+ * in main.c. This file implements the simply blinky version. Console output\r
+ * is used in place of the normal LED toggling.\r
*\r
* NOTE 3: This file only contains the source code that is specific to the\r
* basic demo. Generic functions, such FreeRTOS hook functions, are defined\r
*\r
* The Queue Send Task:\r
* The queue send task is implemented by the prvQueueSendTask() function in\r
- * this file. It uses vTaskDelayUntil() to create a period task that sends the\r
- * value 100 to the queue every 200 milliseconds (please read the notes above\r
- * regarding the accuracy of timing under Windows).\r
+ * this file. It uses vTaskDelayUntil() to create a periodic task that sends\r
+ * the value 100 to the queue every 200 milliseconds (please read the notes\r
+ * above regarding the accuracy of timing under Windows).\r
*\r
* The Queue Send Software Timer:\r
* The timer is a one-shot timer that is reset by a key press. The timer's\r
* in this file. prvQueueReceiveTask() waits for data to arrive on the queue.\r
* When data is received, the task checks the value of the data, then outputs a\r
* message to indicate if the data came from the queue send task or the queue\r
- * send software timer. As the queue send task writes to the queue every 200ms,\r
- * the queue receive task will print a message indicating that it received data\r
- * from the queue send task every 200ms. The queue receive task will print a\r
- * message indicating that it received data from the queue send software timer\r
- * 2 seconds after a key was last pressed.\r
+ * send software timer.\r
+ *\r
+ * Expected Behaviour:\r
+ * - The queue send task writes to the queue every 200ms, so every 200ms the\r
+ * queue receive task will output a message indicating that data was received\r
+ * on the queue from the queue send task.\r
+ * - The queue send software timer has a period of two seconds, and is reset\r
+ * each time a key is pressed. So if two seconds expire without a key being\r
+ * pressed then the queue receive task will output a message indicating that\r
+ * data was received on the queue from the queue send software timer.\r
+ *\r
+ * NOTE: Console input and output relies on Windows system calls, which can\r
+ * interfere with the execution of the FreeRTOS Windows port. This demo only\r
+ * uses Windows system call occasionally. Heavier use of Windows system calls\r
+ * can crash the port.\r
*/\r
\r
/* Standard includes. */\r
#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
\r
/* The rate at which data is sent to the queue. The times are converted from\r
-milliseconds to ticks by the pdMS_TO_TICKS() macro where they are used. */\r
-#define mainTASK_SEND_FREQUENCY_MS 200\r
-#define mainTIMER_SEND_FREQUENCY_MS 2000\r
+milliseconds to ticks using the pdMS_TO_TICKS() macro. */\r
+#define mainTASK_SEND_FREQUENCY_MS pdMS_TO_TICKS( 200UL )\r
+#define mainTIMER_SEND_FREQUENCY_MS pdMS_TO_TICKS( 2000UL )\r
\r
-/* The number of items the queue can hold. */\r
+/* The number of items the queue can hold at once. */\r
#define mainQUEUE_LENGTH ( 2 )\r
\r
-/* Values passed to the two tasks just to check the task parameter\r
-functionality. */\r
-#define mainQUEUE_SEND_PARAMETER ( 0x1111UL )\r
-#define mainQUEUE_RECEIVE_PARAMETER ( 0x22UL )\r
-\r
/* The values sent to the queue receive task from the queue send task and the\r
queue send software timer respectively. */\r
#define mainVALUE_SENT_FROM_TASK ( 100UL )\r
\r
/*-----------------------------------------------------------*/\r
\r
+/*** SEE THE COMMENTS AT THE TOP OF THIS FILE ***/\r
void main_blinky( void )\r
{\r
-const TickType_t xTimerPeriod = pdMS_TO_TICKS( mainTIMER_SEND_FREQUENCY_MS );\r
+const TickType_t xTimerPeriod = mainTIMER_SEND_FREQUENCY_MS;\r
\r
/* Create the queue. */\r
- xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );\r
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );\r
\r
if( xQueue != NULL )\r
{\r
/* Start the two tasks as described in the comments at the top of this\r
file. */\r
- xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */\r
- "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
- configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */\r
- ( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */\r
- mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */\r
- NULL ); /* The task handle is not required, so NULL is passed. */\r
+ xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */\r
+ "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
+ configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */\r
+ NULL, /* The parameter passed to the task - not used in this simple case. */\r
+ mainQUEUE_RECEIVE_TASK_PRIORITY,/* The priority assigned to the task. */\r
+ NULL ); /* The task handle is not required, so NULL is passed. */\r
\r
- xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
+ xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
\r
/* Create the software timer, but don't start it yet. */\r
xTimer = xTimerCreate( "Timer", /* The text name assigned to the software timer - for debug only as it is not used by the kernel. */\r
static void prvQueueSendTask( void *pvParameters )\r
{\r
TickType_t xNextWakeTime;\r
-const TickType_t xBlockTime = pdMS_TO_TICKS( mainTASK_SEND_FREQUENCY_MS );\r
+const TickType_t xBlockTime = mainTASK_SEND_FREQUENCY_MS;\r
const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TASK;\r
\r
- /* Remove compiler warning in the case that configASSERT() is not\r
- defined. */\r
+ /* Prevent the compiler warning about the unused parameter. */\r
( void ) pvParameters;\r
\r
- /* Check the task parameter is as expected. */\r
- configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );\r
-\r
/* Initialise xNextWakeTime - this only needs to be done once. */\r
xNextWakeTime = xTaskGetTickCount();\r
\r
for( ;; )\r
{\r
/* Place this task in the blocked state until it is time to run again.\r
- The block time is specified in ticks, the constant used converts ticks\r
- to ms. While in the Blocked state this task will not consume any CPU\r
- time. */\r
+ The block time is specified in ticks, pdMS_TO_TICKS() was used to\r
+ convert a time specified in milliseconds into a time specified in ticks.\r
+ While in the Blocked state this task will not consume any CPU time. */\r
vTaskDelayUntil( &xNextWakeTime, xBlockTime );\r
\r
/* Send to the queue - causing the queue receive task to unblock and\r
- toggle the LED. 0 is used as the block time so the sending operation\r
+ write to the console. 0 is used as the block time so the send operation\r
will not block - it shouldn't need to block as the queue should always\r
have at least one space at this point in the code. */\r
xQueueSend( xQueue, &ulValueToSend, 0U );\r
{\r
const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TIMER;\r
\r
+ /* This is the software timer callback function. The software timer has a\r
+ period of two seconds and is reset each time a key is pressed. This\r
+ callback function will execute if the timer expires, which will only happen\r
+ if a key is not pressed for two seconds. */\r
+\r
/* Avoid compiler warnings resulting from the unused parameter. */\r
( void ) xTimerHandle;\r
\r
\r
static void prvQueueReceiveTask( void *pvParameters )\r
{\r
-unsigned long ulReceivedValue;\r
+uint32_t ulReceivedValue;\r
\r
- /* Remove compiler warning in the case that configASSERT() is not\r
- defined. */\r
+ /* Prevent the compiler warning about the unused parameter. */\r
( void ) pvParameters;\r
\r
- /* Check the task parameter is as expected. */\r
- configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );\r
-\r
for( ;; )\r
{\r
/* Wait until something arrives in the queue - this task will block\r
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
- FreeRTOSConfig.h. */\r
+ FreeRTOSConfig.h. It will not use any CPU time while it is in the\r
+ Blocked state. */\r
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
\r
/* To get here something must have been received from the queue, but\r
- is it the expected value? Normally calling printf() from a task is not\r
+ is it an expected value? Normally calling printf() from a task is not\r
a good idea. Here there is lots of stack space and only one task is\r
- using console IO so it is ok. */\r
+ using console IO so it is ok. However, note the comments at the top of\r
+ this file about the risks of making Windows system calls (such as \r
+ console output) from a FreeRTOS task. */\r
if( ulReceivedValue == mainVALUE_SENT_FROM_TASK )\r
{\r
printf( "Message received from task\r\n" );\r
\r
/*\r
*******************************************************************************\r
- * NOTE 1: Do not expect to get real time behaviour from the Win32 port or this\r
- * demo application. It is provided as a convenient development and\r
- * demonstration test bed only. Windows will not be running the FreeRTOS\r
- * threads continuously, so the timing information in the FreeRTOS+Trace logs\r
- * have no meaningful units. See the documentation page for the Windows\r
- * simulator for further explanation:\r
+ * NOTE: Windows will not be running the FreeRTOS demo threads continuously, so\r
+ * do not expect to get real time behaviour from the FreeRTOS Windows port, or\r
+ * this demo application. Also, the timing information in the FreeRTOS+Trace\r
+ * logs have no meaningful units. See the documentation page for the Windows\r
+ * port for further information:\r
* http://www.freertos.org/FreeRTOS-Windows-Simulator-Emulator-for-Visual-Studio-and-Eclipse-MingW.html\r
- * - READ THE WEB DOCUMENTATION FOR THIS PORT FOR MORE INFORMATION ON USING IT -\r
*\r
* NOTE 2: This project provides two demo applications. A simple blinky style\r
* project, and a more comprehensive test and demo application. The\r
* "Check" task - This only executes every five seconds but has a high priority\r
* to ensure it gets processor time. Its main function is to check that all the\r
* standard demo tasks are still operational. While no errors have been\r
- * discovered the check task will print out "OK" and the current simulated tick\r
- * time. If an error is discovered in the execution of a task then the check\r
- * task will print out an appropriate error message.\r
+ * discovered the check task will print out "No Errors" along with some system\r
+ * status information. If an error is discovered in the execution of a task \r
+ * then the check task will print out an appropriate error message.\r
*\r
*/\r
\r
/*-----------------------------------------------------------*/\r
\r
/* The variable into which error messages are latched. */\r
-static char *pcStatusMessage = "OK";\r
+static char *pcStatusMessage = "No errors";\r
\r
/* This semaphore is created purely to test using the vSemaphoreDelete() and\r
semaphore tracing API functions. It has no other purpose. */\r
static void prvCheckTask( void *pvParameters )\r
{\r
TickType_t xNextWakeTime;\r
-const TickType_t xCycleFrequency = 2500 / portTICK_PERIOD_MS;\r
+const TickType_t xCycleFrequency = pdMS_TO_TICKS( 2500UL );\r
\r
/* Just to remove compiler warning. */\r
( void ) pvParameters;\r
\r
/* This is the only task that uses stdout so its ok to call printf()\r
directly. */\r
- printf( "%s - %d\r\n", pcStatusMessage, xTaskGetTickCount() );\r
+ printf( "%s - tick count %d - free heap %d - min free heap %d\r\n", pcStatusMessage,\r
+ xTaskGetTickCount(),\r
+ xPortGetFreeHeapSize(),\r
+ xPortGetMinimumEverFreeHeapSize() );\r
}\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Exercise heap_5 a bit. The malloc failed hook will trap failed\r
allocations so there is no need to test here. */\r
- pvAllocated = pvPortMalloc( ( rand() % 100 ) + 1 );\r
+ pvAllocated = pvPortMalloc( ( rand() % 500 ) + 1 );\r
vPortFree( pvAllocated );\r
}\r
/*-----------------------------------------------------------*/\r
#if ( configQUEUE_REGISTRY_SIZE < 1 )\r
#define vQueueAddToRegistry( xQueue, pcName )\r
#define vQueueUnregisterQueue( xQueue )\r
+ #define pcQueueGetQueueName( xQueue )\r
#endif\r
\r
#ifndef portPOINTER_SIZE_TYPE\r
* stores a pointer to the string - so the string must be persistent (global or\r
* preferably in ROM/Flash), not on the stack.\r
*/\r
-#if configQUEUE_REGISTRY_SIZE > 0\r
+#if( configQUEUE_REGISTRY_SIZE > 0 )\r
void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
#endif\r
\r
*\r
* @param xQueue The handle of the queue being removed from the registry.\r
*/\r
-#if configQUEUE_REGISTRY_SIZE > 0\r
+#if( configQUEUE_REGISTRY_SIZE > 0 )\r
void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
+/*\r
+ * The registry is provided as a means for kernel aware debuggers to\r
+ * locate queues, semaphores and mutexes. Call pcQueueGetQueueName() to look\r
+ * up and return the name of a queue in the queue registry from the queue's\r
+ * handle.\r
+ *\r
+ * @param xQueue The handle of the queue the name of which will be returned.\r
+ * @return If the queue is in the registry then a pointer to the name of the\r
+ * queue is returned. If the queue is not in the registry then NULL is\r
+ * returned.\r
+ */\r
+#if( configQUEUE_REGISTRY_SIZE > 0 )\r
+ const char *pcQueueGetQueueName( QueueHandle_t xQueue );\r
+#endif\r
+\r
/*\r
* Generic version of the queue creation function, which is in turn called by\r
* any queue, semaphore or mutex creation function or macro.\r
#endif /* configQUEUE_REGISTRY_SIZE */\r
/*-----------------------------------------------------------*/\r
\r
+#if ( configQUEUE_REGISTRY_SIZE > 0 )\r
+\r
+ const char *pcQueueGetQueueName( QueueHandle_t xQueue )\r
+ {\r
+ UBaseType_t ux;\r
+ const char *pcReturn = NULL;\r
+\r
+ /* Note there is nothing here to protect against another task adding or\r
+ removing entries from the registry while it is being searched. */\r
+ for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )\r
+ {\r
+ if( xQueueRegistry[ ux ].xHandle == xQueue )\r
+ {\r
+ pcReturn = xQueueRegistry[ ux ].pcQueueName;\r
+ break;\r
+ }\r
+ else\r
+ {\r
+ mtCOVERAGE_TEST_MARKER();\r
+ }\r
+ }\r
+\r
+ return pcReturn;\r
+ }\r
+\r
+#endif /* configQUEUE_REGISTRY_SIZE */\r
+/*-----------------------------------------------------------*/\r
+\r
#if ( configQUEUE_REGISTRY_SIZE > 0 )\r
\r
void vQueueUnregisterQueue( QueueHandle_t xQueue )\r
{\r
/* Set the name to NULL to show that this slot if free again. */\r
xQueueRegistry[ ux ].pcQueueName = NULL;\r
+\r
+ /* Set the handle to NULL to ensure the same queue handle cannot\r
+ appear in the registry twice if it is added, removed, then\r
+ added again. */\r
+ xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;\r
break;\r
}\r
else\r
#if ( INCLUDE_vTaskDelete == 1 )\r
\r
PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */\r
- PRIVILEGED_DATA static volatile UBaseType_t uxTasksDeleted = ( UBaseType_t ) 0U;\r
+ PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;\r
\r
#endif\r
\r
being deleted. */\r
pxTCB = prvGetTCBFromHandle( xTaskToDelete );\r
\r
- /* Remove task from the ready list and place in the termination list.\r
- This will stop the task from be scheduled. The idle task will check\r
- the termination list and free up any memory allocated by the\r
- scheduler for the TCB and stack. */\r
+ /* Remove task from the ready list. */\r
if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
taskRESET_READY_PRIORITY( pxTCB->uxPriority );\r
mtCOVERAGE_TEST_MARKER();\r
}\r
\r
- vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) );\r
-\r
- /* Increment the ucTasksDeleted variable so the idle task knows\r
- there is a task that has been deleted and that it should therefore\r
- check the xTasksWaitingTermination list. */\r
- ++uxTasksDeleted;\r
+ if( pxTCB == pxCurrentTCB )\r
+ {\r
+ /* A task is deleting itself. This cannot complete within the\r
+ task itself, as a context switch to another task is required.\r
+ Place the task in the termination list. The idle task will\r
+ check the termination list and free up any memory allocated by\r
+ the scheduler for the TCB and stack of the deleted task. */\r
+ vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) );\r
+\r
+ /* Increment the ucTasksDeleted variable so the idle task knows\r
+ there is a task that has been deleted and that it should therefore\r
+ check the xTasksWaitingTermination list. */\r
+ ++uxDeletedTasksWaitingCleanUp;\r
+ }\r
+ else\r
+ {\r
+ --uxCurrentNumberOfTasks;\r
+ prvDeleteTCB( pxTCB );\r
+ }\r
\r
- /* Increment the uxTaskNumberVariable also so kernel aware debuggers\r
- can detect that the task lists need re-generating. */\r
+ /* Increment the uxTaskNumber also so kernel aware debuggers can\r
+ detect that the task lists need re-generating. */\r
uxTaskNumber++;\r
\r
traceTASK_DELETE( pxTCB );\r
#endif\r
\r
#if ( INCLUDE_vTaskDelete == 1 )\r
- else if( pxStateList == &xTasksWaitingTermination )\r
+ else if( ( pxStateList == &xTasksWaitingTermination ) || ( pxStateList == NULL ) )\r
{\r
/* The task being queried is referenced from the deleted\r
- tasks list. */\r
+ tasks list, or it is not referenced from any lists at \r
+ all. */\r
eReturn = eDeleted;\r
}\r
#endif\r
\r
/* ucTasksDeleted is used to prevent vTaskSuspendAll() being called\r
too often in the idle task. */\r
- while( uxTasksDeleted > ( UBaseType_t ) 0U )\r
+ while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )\r
{\r
vTaskSuspendAll();\r
{\r
pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );\r
( void ) uxListRemove( &( pxTCB->xGenericListItem ) );\r
--uxCurrentNumberOfTasks;\r
- --uxTasksDeleted;\r
+ --uxDeletedTasksWaitingCleanUp;\r
}\r
taskEXIT_CRITICAL();\r
\r
}\r
}\r
}\r
- #endif /* vTaskDelete */\r
+ #endif /* INCLUDE_vTaskDelete */\r
}\r
/*-----------------------------------------------------------*/\r
\r
projects / freertos / commitdiff