\r
\r
/* Lists for ready and blocked co-routines. --------------------*/\r
-static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */\r
-static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */\r
-static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */\r
-static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */\r
-static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */\r
-static xList xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */\r
+static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */\r
+static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */\r
+static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */\r
+static List_t * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */\r
+static List_t * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */\r
+static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */\r
\r
/* Other file private variables. --------------------------------*/\r
-corCRCB * pxCurrentCoRoutine = NULL;\r
-static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0;\r
-static portTickType xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;\r
+CRCB_t * pxCurrentCoRoutine = NULL;\r
+static UBaseType_t uxTopCoRoutineReadyPriority = 0;\r
+static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;\r
\r
/* The initial state of the co-routine when it is created. */\r
#define corINITIAL_STATE ( 0 )\r
{ \\r
uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \\r
} \\r
- vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \\r
+ vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \\r
}\r
\r
/*\r
\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex )\r
+BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex )\r
{\r
-signed portBASE_TYPE xReturn;\r
-corCRCB *pxCoRoutine;\r
+BaseType_t xReturn;\r
+CRCB_t *pxCoRoutine;\r
\r
/* Allocate the memory that will store the co-routine control block. */\r
- pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) );\r
+ pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );\r
if( pxCoRoutine )\r
{\r
/* If pxCurrentCoRoutine is NULL then this is the first co-routine to\r
vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );\r
vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );\r
\r
- /* Set the co-routine control block as a link back from the xListItem.\r
+ /* Set the co-routine control block as a link back from the ListItem_t.\r
This is so we can get back to the containing CRCB from a generic item\r
in a list. */\r
listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );\r
listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );\r
\r
/* Event lists are always in priority order. */\r
- listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( portTickType ) configMAX_CO_ROUTINE_PRIORITIES - ( portTickType ) uxPriority ) );\r
+ listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) );\r
\r
/* Now the co-routine has been initialised it can be added to the ready\r
list at the correct priority. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList )\r
+void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList )\r
{\r
-portTickType xTimeToWake;\r
+TickType_t xTimeToWake;\r
\r
/* Calculate the time to wake - this may overflow but this is\r
not a problem. */\r
/* We must remove ourselves from the ready list before adding\r
ourselves to the blocked list as the same list item is used for\r
both lists. */\r
- ( void ) uxListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );\r
+ ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );\r
\r
/* The list item will be inserted in wake time order. */\r
listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake );\r
{\r
/* Wake time has overflowed. Place this item in the\r
overflow list. */\r
- vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );\r
+ vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );\r
}\r
else\r
{\r
/* The wake time has not overflowed, so we can use the\r
current block list. */\r
- vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );\r
+ vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );\r
}\r
\r
if( pxEventList )\r
the ready lists itself. */\r
while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )\r
{\r
- corCRCB *pxUnblockedCRCB;\r
+ CRCB_t *pxUnblockedCRCB;\r
\r
/* The pending ready list can be accessed by an ISR. */\r
portDISABLE_INTERRUPTS();\r
{\r
- pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) );\r
+ pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) );\r
( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );\r
}\r
portENABLE_INTERRUPTS();\r
\r
static void prvCheckDelayedList( void )\r
{\r
-corCRCB *pxCRCB;\r
+CRCB_t *pxCRCB;\r
\r
xPassedTicks = xTaskGetTickCount() - xLastTickCount;\r
while( xPassedTicks )\r
/* If the tick count has overflowed we need to swap the ready lists. */\r
if( xCoRoutineTickCount == 0 )\r
{\r
- xList * pxTemp;\r
+ List_t * pxTemp;\r
\r
/* Tick count has overflowed so we need to swap the delay lists. If there are\r
any items in pxDelayedCoRoutineList here then there is an error! */\r
/* See if this tick has made a timeout expire. */\r
while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE )\r
{\r
- pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );\r
+ pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );\r
\r
if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) )\r
{\r
\r
static void prvInitialiseCoRoutineLists( void )\r
{\r
-unsigned portBASE_TYPE uxPriority;\r
+UBaseType_t uxPriority;\r
\r
for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ )\r
{\r
- vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );\r
+ vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );\r
}\r
\r
- vListInitialise( ( xList * ) &xDelayedCoRoutineList1 );\r
- vListInitialise( ( xList * ) &xDelayedCoRoutineList2 );\r
- vListInitialise( ( xList * ) &xPendingReadyCoRoutineList );\r
+ vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 );\r
+ vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 );\r
+ vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList );\r
\r
/* Start with pxDelayedCoRoutineList using list1 and the\r
pxOverflowDelayedCoRoutineList using list2. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList )\r
+BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList )\r
{\r
-corCRCB *pxUnblockedCRCB;\r
-signed portBASE_TYPE xReturn;\r
+CRCB_t *pxUnblockedCRCB;\r
+BaseType_t xReturn;\r
\r
/* This function is called from within an interrupt. It can only access\r
event lists and the pending ready list. This function assumes that a\r
check has already been made to ensure pxEventList is not empty. */\r
- pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );\r
+ pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );\r
( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );\r
- vListInsertEnd( ( xList * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );\r
+ vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );\r
\r
if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority )\r
{\r
#define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL\r
#endif\r
\r
-typedef struct EventBitsDefinition\r
+typedef struct EVENT_GROUP_DEFINITION\r
{\r
- xEventBitsType uxEventBits;\r
- xList xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */\r
-} xEVENT_BITS;\r
-\r
-/* Used internally only. */\r
-typedef struct EVENT_GROUP_CALLBACK_PARAMTERS\r
-{\r
- xEventGroupHandle xTargetEventGroup;\r
- xEventBitsType xBitsToSet;\r
-} xEventGroupCallbackParameters;\r
+ EventBits_t uxEventBits;\r
+ List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */\r
+} EventGroup_t;\r
\r
/*-----------------------------------------------------------*/\r
\r
* wait condition is met if any of the bits set in uxBitsToWait for are also set\r
* in uxCurrentEventBits.\r
*/\r
-static portBASE_TYPE prvTestWaitCondition( const xEventBitsType uxCurrentEventBits, const xEventBitsType uxBitsToWaitFor, const portBASE_TYPE xWaitForAllBits );\r
+static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits );\r
\r
/*-----------------------------------------------------------*/\r
\r
-xEventGroupHandle xEventGroupCreate( void )\r
+EventGroupHandle_t xEventGroupCreate( void )\r
{\r
-xEVENT_BITS *pxEventBits;\r
+EventGroup_t *pxEventBits;\r
\r
- pxEventBits = pvPortMalloc( sizeof( xEVENT_BITS ) );\r
+ pxEventBits = pvPortMalloc( sizeof( EventGroup_t ) );\r
if( pxEventBits != NULL )\r
{\r
pxEventBits->uxEventBits = 0;\r
traceEVENT_GROUP_CREATE_FAILED();\r
}\r
\r
- return ( xEventGroupHandle ) pxEventBits;\r
+ return ( EventGroupHandle_t ) pxEventBits;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-xEventBitsType xEventGroupSync( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToSet, const xEventBitsType uxBitsToWaitFor, portTickType xTicksToWait )\r
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait )\r
{\r
-xEventBitsType uxOriginalBitValue, uxReturn;\r
-xEVENT_BITS *pxEventBits = ( xEVENT_BITS * ) xEventGroup;\r
-portBASE_TYPE xAlreadyYielded;\r
+EventBits_t uxOriginalBitValue, uxReturn;\r
+EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;\r
+BaseType_t xAlreadyYielded;\r
\r
configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );\r
configASSERT( uxBitsToWaitFor != 0 );\r
}\r
else\r
{\r
- if( xTicksToWait != ( portTickType ) 0 )\r
+ if( xTicksToWait != ( TickType_t ) 0 )\r
{\r
/* Store the bits that the calling task is waiting for in the\r
task's event list item so the kernel knows when a match is\r
}\r
xAlreadyYielded = xTaskResumeAll();\r
\r
- if( xTicksToWait != ( portTickType ) 0 )\r
+ if( xTicksToWait != ( TickType_t ) 0 )\r
{\r
if( xAlreadyYielded == pdFALSE )\r
{\r
event list item, and they should now be retrieved then cleared. */\r
uxReturn = uxTaskResetEventItemValue();\r
\r
- if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( xEventBitsType ) 0 )\r
+ if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )\r
{\r
/* The task timed out, just return the current event bit value. */\r
taskENTER_CRITICAL();\r
}\r
/*-----------------------------------------------------------*/\r
\r
-xEventBitsType xEventGroupWaitBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToWaitFor, const portBASE_TYPE xClearOnExit, const portBASE_TYPE xWaitForAllBits, portTickType xTicksToWait )\r
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait )\r
{\r
-xEVENT_BITS *pxEventBits = ( xEVENT_BITS * ) xEventGroup;\r
-xEventBitsType uxReturn, uxControlBits = 0;\r
-portBASE_TYPE xWaitConditionMet, xAlreadyYielded;\r
+EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;\r
+EventBits_t uxReturn, uxControlBits = 0;\r
+BaseType_t xWaitConditionMet, xAlreadyYielded;\r
\r
/* Check the user is not attempting to wait on the bits used by the kernel\r
itself, and that at least one bit is being requested. */\r
\r
vTaskSuspendAll();\r
{\r
- const xEventBitsType uxCurrentEventBits = pxEventBits->uxEventBits;\r
+ const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits;\r
\r
traceEVENT_GROUP_WAIT_BITS_START( xEventGroup, uxBitsToWaitFor );\r
\r
/* The wait condition has already been met so there is no need to\r
block. */\r
uxReturn = uxCurrentEventBits;\r
- xTicksToWait = ( portTickType ) 0;\r
+ xTicksToWait = ( TickType_t ) 0;\r
\r
/* Clear the wait bits if requested to do so. */\r
if( xClearOnExit != pdFALSE )\r
mtCOVERAGE_TEST_MARKER();\r
}\r
}\r
- else if( xTicksToWait == ( portTickType ) 0 )\r
+ else if( xTicksToWait == ( TickType_t ) 0 )\r
{\r
/* The wait condition has not been met, but no block time was\r
specified, so just return the current value. */\r
}\r
xAlreadyYielded = xTaskResumeAll();\r
\r
- if( xTicksToWait != ( portTickType ) 0 )\r
+ if( xTicksToWait != ( TickType_t ) 0 )\r
{\r
if( xAlreadyYielded == pdFALSE )\r
{\r
event list item, and they should now be retrieved then cleared. */\r
uxReturn = uxTaskResetEventItemValue();\r
\r
- if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( xEventBitsType ) 0 )\r
+ if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )\r
{\r
taskENTER_CRITICAL();\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-xEventBitsType xEventGroupClearBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToClear )\r
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear )\r
{\r
-xEVENT_BITS *pxEventBits = ( xEVENT_BITS * ) xEventGroup;\r
-xEventBitsType uxReturn;\r
+EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;\r
+EventBits_t uxReturn;\r
\r
/* Check the user is not attempting to clear the bits used by the kernel\r
itself. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-xEventBitsType xEventGroupSetBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToSet )\r
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet )\r
{\r
-xListItem *pxListItem, *pxNext;\r
-xListItem const *pxListEnd;\r
-xList *pxList;\r
-xEventBitsType uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits;\r
-xEVENT_BITS *pxEventBits = ( xEVENT_BITS * ) xEventGroup;\r
-portBASE_TYPE xMatchFound = pdFALSE;\r
+ListItem_t *pxListItem, *pxNext;\r
+ListItem_t const *pxListEnd;\r
+List_t *pxList;\r
+EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits;\r
+EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;\r
+BaseType_t xMatchFound = pdFALSE;\r
\r
/* Check the user is not attempting to set the bits used by the kernel\r
itself. */\r
uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES;\r
uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES;\r
\r
- if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( xEventBitsType ) 0 )\r
+ if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 )\r
{\r
/* Just looking for single bit being set. */\r
- if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( xEventBitsType ) 0 )\r
+ if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 )\r
{\r
xMatchFound = pdTRUE;\r
}\r
if( xMatchFound != pdFALSE )\r
{\r
/* The bits match. Should the bits be cleared on exit? */\r
- if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( xEventBitsType ) 0 )\r
+ if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 )\r
{\r
uxBitsToClear |= uxBitsWaitedFor;\r
}\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vEventGroupDelete( xEventGroupHandle xEventGroup )\r
+void vEventGroupDelete( EventGroupHandle_t xEventGroup )\r
{\r
-xEVENT_BITS *pxEventBits = ( xEVENT_BITS * ) xEventGroup;\r
-const xList *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );\r
+EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;\r
+const List_t *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );\r
\r
vTaskSuspendAll();\r
{\r
traceEVENT_GROUP_DELETE( xEventGroup );\r
\r
- while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( unsigned portBASE_TYPE ) 0 )\r
+ while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 )\r
{\r
/* Unblock the task, returning 0 as the event list is being deleted\r
and cannot therefore have any bits set. */\r
- configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( xListItem * ) &( pxTasksWaitingForBits->xListEnd ) );\r
- ( void ) xTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, ( portTickType ) eventUNBLOCKED_DUE_TO_BIT_SET );\r
+ configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) );\r
+ ( void ) xTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, ( TickType_t ) eventUNBLOCKED_DUE_TO_BIT_SET );\r
}\r
\r
vPortFree( pxEventBits );\r
\r
/* For internal use only - execute a 'set bits' command that was pended from\r
an interrupt. */\r
-void vEventGroupSetBitsCallback( void *pvEventGroup, const unsigned long ulBitsToSet )\r
+void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet )\r
{\r
- ( void ) xEventGroupSetBits( pvEventGroup, ( xEventBitsType ) ulBitsToSet );\r
+ ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static portBASE_TYPE prvTestWaitCondition( const xEventBitsType uxCurrentEventBits, const xEventBitsType uxBitsToWaitFor, const portBASE_TYPE xWaitForAllBits )\r
+static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits )\r
{\r
-portBASE_TYPE xWaitConditionMet = pdFALSE;\r
+BaseType_t xWaitConditionMet = pdFALSE;\r
\r
if( xWaitForAllBits == pdFALSE )\r
{\r
/* Task only has to wait for one bit within uxBitsToWaitFor to be\r
set. Is one already set? */\r
- if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( xEventBitsType ) 0 )\r
+ if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 )\r
{\r
xWaitConditionMet = pdTRUE;\r
}\r
* Include the generic headers required for the FreeRTOS port being used.\r
*/\r
#include <stddef.h>\r
+#include <stdint.h>\r
\r
/* Basic FreeRTOS definitions. */\r
#include "projdefs.h"\r
\r
/* Defines the prototype to which the application task hook function must\r
conform. */\r
-typedef portBASE_TYPE (*pdTASK_HOOK_CODE)( void * );\r
+typedef BaseType_t (*pdTASK_HOOK_CODE)( void * );\r
\r
-/* The type that holds event bits always matches portTickType - therefore the\r
+/* The type that holds event bits always matches TickType_t - therefore the\r
number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,\r
32 bits if set to 0. */\r
-typedef portTickType xEventBitsType;\r
+typedef TickType_t EventBits_t;\r
\r
/*\r
* Check all the required application specific macros have been defined.\r
#endif\r
\r
#ifndef portPOINTER_SIZE_TYPE\r
- #define portPOINTER_SIZE_TYPE unsigned long\r
+ #define portPOINTER_SIZE_TYPE uint32_t\r
#endif\r
\r
/* Remove any unused trace macros. */\r
#endif\r
\r
#ifndef portPRIVILEGE_BIT\r
- #define portPRIVILEGE_BIT ( ( unsigned portBASE_TYPE ) 0x00 )\r
+ #define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 )\r
#endif\r
\r
#ifndef portYIELD_WITHIN_API\r
#define mtCOVERAGE_TEST_MARKER()\r
#endif\r
\r
-/* For backward compatability. */\r
+/* For backward compatibility. */\r
#define eTaskStateGet eTaskGetState\r
+#define portTickType TickType_t\r
+#define xTaskHandle TaskHandle_t\r
+#define xQueueHandle QueueHandle_t\r
+#define xSemaphoreHandle SemaphoreHandle_t\r
+#define xQueueSetHandle QueueSetHandle_t\r
+#define xQueueSetMemberHandle QueueSetMember_t\r
+#define xTimeoutType TimeOut_t\r
+#define xMemoryRegion MemoryRegion_t\r
+#define xTaskParameters TaskParameters_t\r
+#define xTaskStatusType TaskStatus_t\r
+#define xTimerHandle TimerHandle_t\r
+#define xCoRoutineHandle CoRoutineHandle_t\r
\r
#endif /* INC_FREERTOS_H */\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
/* Is the currently saved stack pointer within the stack limit? */ \\r
if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \\r
{ \\r
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
+ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
} \\r
}\r
\r
/* Is the currently saved stack pointer within the stack limit? */ \\r
if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \\r
{ \\r
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
+ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
} \\r
}\r
\r
\r
#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )\r
\r
- #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \\r
- { \\r
- static const unsigned char ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \\r
- \\r
- \\r
- /* Has the extremity of the task stack ever been written over? */ \\r
- if( memcmp( ( void * ) pxCurrentTCB->pxStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \\r
- { \\r
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
- } \\r
+ #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \\r
+ { \\r
+ static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \\r
+ \\r
+ \\r
+ /* Has the extremity of the task stack ever been written over? */ \\r
+ if( memcmp( ( void * ) pxCurrentTCB->pxStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \\r
+ { \\r
+ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
+ } \\r
}\r
\r
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */\r
\r
#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )\r
\r
- #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \\r
- { \\r
- char *pcEndOfStack = ( char * ) pxCurrentTCB->pxEndOfStack; \\r
- static const unsigned char ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \\r
- \\r
- \\r
- pcEndOfStack -= sizeof( ucExpectedStackBytes ); \\r
- \\r
- /* Has the extremity of the task stack ever been written over? */ \\r
- if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \\r
- { \\r
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
- } \\r
+ #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \\r
+ { \\r
+ int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \\r
+ static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \\r
+ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \\r
+ \\r
+ \\r
+ pcEndOfStack -= sizeof( ucExpectedStackBytes ); \\r
+ \\r
+ /* Has the extremity of the task stack ever been written over? */ \\r
+ if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \\r
+ { \\r
+ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \\r
+ } \\r
}\r
\r
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
/* Used to hide the implementation of the co-routine control block. The\r
control block structure however has to be included in the header due to\r
the macro implementation of the co-routine functionality. */\r
-typedef void * xCoRoutineHandle;\r
+typedef void * CoRoutineHandle_t;\r
\r
/* Defines the prototype to which co-routine functions must conform. */\r
-typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE );\r
+typedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t );\r
\r
typedef struct corCoRoutineControlBlock\r
{\r
- crCOROUTINE_CODE pxCoRoutineFunction;\r
- xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */\r
- xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */\r
- unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */\r
- unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */\r
- unsigned short uxState; /*< Used internally by the co-routine implementation. */\r
-} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */\r
+ crCOROUTINE_CODE pxCoRoutineFunction;\r
+ ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */\r
+ ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */\r
+ UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */\r
+ UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */\r
+ uint16_t uxState; /*< Used internally by the co-routine implementation. */\r
+} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */\r
\r
/**\r
* croutine. h\r
*<pre>\r
- portBASE_TYPE xCoRoutineCreate(\r
+ BaseType_t xCoRoutineCreate(\r
crCOROUTINE_CODE pxCoRoutineCode,\r
- unsigned portBASE_TYPE uxPriority,\r
- unsigned portBASE_TYPE uxIndex\r
+ UBaseType_t uxPriority,\r
+ UBaseType_t uxIndex\r
);</pre>\r
*\r
* Create a new co-routine and add it to the list of co-routines that are\r
* Example usage:\r
<pre>\r
// Co-routine to be created.\r
- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
// Variables in co-routines must be declared static if they must maintain value across a blocking call.\r
// This may not be necessary for const variables.\r
static const char cLedToFlash[ 2 ] = { 5, 6 };\r
- static const portTickType uxFlashRates[ 2 ] = { 200, 400 };\r
+ static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };\r
\r
// Must start every co-routine with a call to crSTART();\r
crSTART( xHandle );\r
// This co-routine just delays for a fixed period, then toggles\r
// an LED. Two co-routines are created using this function, so\r
// the uxIndex parameter is used to tell the co-routine which\r
- // LED to flash and how long to delay. This assumes xQueue has\r
+ // LED to flash and how int32_t to delay. This assumes xQueue has\r
// already been created.\r
vParTestToggleLED( cLedToFlash[ uxIndex ] );\r
crDELAY( xHandle, uxFlashRates[ uxIndex ] );\r
// Function that creates two co-routines.\r
void vOtherFunction( void )\r
{\r
- unsigned char ucParameterToPass;\r
- xTaskHandle xHandle;\r
- \r
+ uint8_t ucParameterToPass;\r
+ TaskHandle_t xHandle;\r
+\r
// Create two co-routines at priority 0. The first is given index 0\r
// so (from the code above) toggles LED 5 every 200 ticks. The second\r
// is given index 1 so toggles LED 6 every 400 ticks.\r
* \defgroup xCoRoutineCreate xCoRoutineCreate\r
* \ingroup Tasks\r
*/\r
-signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex );\r
+BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex );\r
\r
\r
/**\r
/**\r
* croutine. h\r
* <pre>\r
- crSTART( xCoRoutineHandle xHandle );</pre>\r
+ crSTART( CoRoutineHandle_t xHandle );</pre>\r
*\r
* This macro MUST always be called at the start of a co-routine function.\r
*\r
* Example usage:\r
<pre>\r
// Co-routine to be created.\r
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
// Variables in co-routines must be declared static if they must maintain value across a blocking call.\r
- static long ulAVariable;\r
+ static int32_t ulAVariable;\r
\r
// Must start every co-routine with a call to crSTART();\r
crSTART( xHandle );\r
* \defgroup crSTART crSTART\r
* \ingroup Tasks\r
*/\r
-#define crSTART( pxCRCB ) switch( ( ( corCRCB * )( pxCRCB ) )->uxState ) { case 0:\r
+#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0:\r
\r
/**\r
* croutine. h\r
* Example usage:\r
<pre>\r
// Co-routine to be created.\r
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
// Variables in co-routines must be declared static if they must maintain value across a blocking call.\r
- static long ulAVariable;\r
+ static int32_t ulAVariable;\r
\r
// Must start every co-routine with a call to crSTART();\r
crSTART( xHandle );\r
* These macros are intended for internal use by the co-routine implementation\r
* only. The macros should not be used directly by application writers.\r
*/\r
-#define crSET_STATE0( xHandle ) ( ( corCRCB * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2):\r
-#define crSET_STATE1( xHandle ) ( ( corCRCB * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1):\r
+#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2):\r
+#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1):\r
\r
/**\r
* croutine. h\r
*<pre>\r
- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );</pre>\r
+ crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );</pre>\r
*\r
* Delay a co-routine for a fixed period of time.\r
*\r
* Example usage:\r
<pre>\r
// Co-routine to be created.\r
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
// Variables in co-routines must be declared static if they must maintain value across a blocking call.\r
// This may not be necessary for const variables.\r
/**\r
* <pre>\r
crQUEUE_SEND(\r
- xCoRoutineHandle xHandle,\r
- xQueueHandle pxQueue,\r
+ CoRoutineHandle_t xHandle,\r
+ QueueHandle_t pxQueue,\r
void *pvItemToQueue,\r
- portTickType xTicksToWait,\r
- portBASE_TYPE *pxResult\r
+ TickType_t xTicksToWait,\r
+ BaseType_t *pxResult\r
)</pre>\r
*\r
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine\r
<pre>\r
// Co-routine function that blocks for a fixed period then posts a number onto\r
// a queue.\r
- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
// Variables in co-routines must be declared static if they must maintain value across a blocking call.\r
- static portBASE_TYPE xNumberToPost = 0;\r
- static portBASE_TYPE xResult;\r
+ static BaseType_t xNumberToPost = 0;\r
+ static BaseType_t xResult;\r
\r
// Co-routines must begin with a call to crSTART().\r
crSTART( xHandle );\r
* croutine. h\r
* <pre>\r
crQUEUE_RECEIVE(\r
- xCoRoutineHandle xHandle,\r
- xQueueHandle pxQueue,\r
+ CoRoutineHandle_t xHandle,\r
+ QueueHandle_t pxQueue,\r
void *pvBuffer,\r
- portTickType xTicksToWait,\r
- portBASE_TYPE *pxResult\r
+ TickType_t xTicksToWait,\r
+ BaseType_t *pxResult\r
)</pre>\r
*\r
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine\r
<pre>\r
// A co-routine receives the number of an LED to flash from a queue. It\r
// blocks on the queue until the number is received.\r
- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
// Variables in co-routines must be declared static if they must maintain value across a blocking call.\r
- static portBASE_TYPE xResult;\r
- static unsigned portBASE_TYPE uxLEDToFlash;\r
+ static BaseType_t xResult;\r
+ static UBaseType_t uxLEDToFlash;\r
\r
// All co-routines must start with a call to crSTART().\r
crSTART( xHandle );\r
* croutine. h\r
* <pre>\r
crQUEUE_SEND_FROM_ISR(\r
- xQueueHandle pxQueue,\r
+ QueueHandle_t pxQueue,\r
void *pvItemToQueue,\r
- portBASE_TYPE xCoRoutinePreviouslyWoken\r
+ BaseType_t xCoRoutinePreviouslyWoken\r
)</pre>\r
*\r
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the\r
* Example usage:\r
<pre>\r
// A co-routine that blocks on a queue waiting for characters to be received.\r
- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
char cRxedChar;\r
- portBASE_TYPE xResult;\r
+ BaseType_t xResult;\r
\r
// All co-routines must start with a call to crSTART().\r
crSTART( xHandle );\r
void vUART_ISR( void )\r
{\r
char cRxedChar;\r
- portBASE_TYPE xCRWokenByPost = pdFALSE;\r
+ BaseType_t xCRWokenByPost = pdFALSE;\r
\r
// We loop around reading characters until there are none left in the UART.\r
while( UART_RX_REG_NOT_EMPTY() )\r
* croutine. h\r
* <pre>\r
crQUEUE_SEND_FROM_ISR(\r
- xQueueHandle pxQueue,\r
+ QueueHandle_t pxQueue,\r
void *pvBuffer,\r
- portBASE_TYPE * pxCoRoutineWoken\r
+ BaseType_t * pxCoRoutineWoken\r
)</pre>\r
*\r
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the\r
<pre>\r
// A co-routine that posts a character to a queue then blocks for a fixed\r
// period. The character is incremented each time.\r
- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )\r
+ static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\r
{\r
// cChar holds its value while this co-routine is blocked and must therefore\r
// be declared static.\r
static char cCharToTx = 'a';\r
- portBASE_TYPE xResult;\r
+ BaseType_t xResult;\r
\r
// All co-routines must start with a call to crSTART().\r
crSTART( xHandle );\r
void vUART_ISR( void )\r
{\r
char cCharToTx;\r
- portBASE_TYPE xCRWokenByPost = pdFALSE;\r
+ BaseType_t xCRWokenByPost = pdFALSE;\r
\r
while( UART_TX_REG_EMPTY() )\r
{\r
* Removes the current co-routine from its ready list and places it in the\r
* appropriate delayed list.\r
*/\r
-void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList );\r
+void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList );\r
\r
/*\r
* This function is intended for internal use by the queue implementation only.\r
* Removes the highest priority co-routine from the event list and places it in\r
* the pending ready list.\r
*/\r
-signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList );\r
+BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList );\r
\r
#ifdef __cplusplus\r
}\r
* event_groups.h\r
*\r
* Type by which event groups are referenced. For example, a call to\r
- * xEventGroupCreate() returns an xEventGroupHandle variable that can then\r
+ * xEventGroupCreate() returns an EventGroupHandle_t variable that can then\r
* be used as a parameter to other event group functions.\r
*\r
- * \defgroup xEventGroupHandle xEventGroupHandle\r
+ * \defgroup EventGroupHandle_t EventGroupHandle_t\r
* \ingroup EventGroup\r
*/\r
-typedef void * xEventGroupHandle;\r
+typedef void * EventGroupHandle_t;\r
\r
/**\r
* event_groups.h\r
*<pre>\r
- xEventGroupHandle xEventGroupCreate( void );\r
+ EventGroupHandle_t xEventGroupCreate( void );\r
</pre>\r
*\r
* Create a new event group. This function cannot be called from an interrupt.\r
* on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If\r
* configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit\r
* 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has\r
- * 24 usable bits (bit 0 to bit 23). The xEventBitsType type is used to store\r
+ * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store\r
* event bits within an event group.\r
*\r
* @return If the event group was created then a handle to the event group is\r
* Example usage:\r
<pre>\r
// Declare a variable to hold the created event group.\r
- xEventGroupHandle xCreatedEventGroup;\r
+ EventGroupHandle_t xCreatedEventGroup;\r
\r
// Attempt to create the event group.\r
xCreatedEventGroup = xEventGroupCreate();\r
* \defgroup xEventGroupCreate xEventGroupCreate\r
* \ingroup EventGroup\r
*/\r
-xEventGroupHandle xEventGroupCreate( void ) PRIVILEGED_FUNCTION;\r
+EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* event_groups.h\r
*<pre>\r
- xEventBitsType xEventGroupWaitBits( xEventGroupHandle xEventGroup,\r
- const xEventBitsType uxBitsToWaitFor,\r
- const portBASE_TYPE xClearOnExit,\r
- const portBASE_TYPE xWaitForAllBits,\r
- const portTickType xTicksToWait );\r
+ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,\r
+ const EventBits_t uxBitsToWaitFor,\r
+ const BaseType_t xClearOnExit,\r
+ const BaseType_t xWaitForAllBits,\r
+ const TickType_t xTicksToWait );\r
</pre>\r
*\r
* [Potentially] block to wait for one or more bits to be set within a\r
#define BIT_0 ( 1 << 0 )\r
#define BIT_4 ( 1 << 4 )\r
\r
- void aFunction( xEventGroupHandle xEventGroup )\r
+ void aFunction( EventGroupHandle_t xEventGroup )\r
{\r
- xEventBitsType uxBits;\r
- const portTickType xTicksToWait = 100 / portTICK_RATE_MS;\r
+ EventBits_t uxBits;\r
+ const TickType_t xTicksToWait = 100 / portTICK_RATE_MS;\r
\r
// Wait a maximum of 100ms for either bit 0 or bit 4 to be set within\r
// the event group. Clear the bits before exiting.\r
* \defgroup xEventGroupWaitBits xEventGroupWaitBits\r
* \ingroup EventGroup\r
*/\r
-xEventBitsType xEventGroupWaitBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToWaitFor, const portBASE_TYPE xClearOnExit, const portBASE_TYPE xWaitForAllBits, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;\r
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* event_groups.h\r
*<pre>\r
- xEventBitsType xEventGroupClearBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToClear );\r
+ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );\r
</pre>\r
*\r
* Clear bits within an event group. This function cannot be called from an\r
#define BIT_0 ( 1 << 0 )\r
#define BIT_4 ( 1 << 4 )\r
\r
- void aFunction( xEventGroupHandle xEventGroup )\r
+ void aFunction( EventGroupHandle_t xEventGroup )\r
{\r
- xEventBitsType uxBits;\r
+ EventBits_t uxBits;\r
\r
// Clear bit 0 and bit 4 in xEventGroup.\r
uxBits = xEventGroupClearBits(\r
* \defgroup xEventGroupClearBits xEventGroupClearBits\r
* \ingroup EventGroup\r
*/\r
-xEventBitsType xEventGroupClearBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToClear ) PRIVILEGED_FUNCTION;\r
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* event_groups.h\r
*<pre>\r
- xEventBitsType xEventGroupSetBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToSet );\r
+ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );\r
</pre>\r
*\r
* Set bits within an event group.\r
#define BIT_0 ( 1 << 0 )\r
#define BIT_4 ( 1 << 4 )\r
\r
- void aFunction( xEventGroupHandle xEventGroup )\r
+ void aFunction( EventGroupHandle_t xEventGroup )\r
{\r
- xEventBitsType uxBits;\r
+ EventBits_t uxBits;\r
\r
// Set bit 0 and bit 4 in xEventGroup.\r
uxBits = xEventGroupSetBits(\r
* \defgroup xEventGroupSetBits xEventGroupSetBits\r
* \ingroup EventGroup\r
*/\r
-xEventBitsType xEventGroupSetBits( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToSet ) PRIVILEGED_FUNCTION;\r
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* event_groups.h\r
*<pre>\r
- xEventBitsType xEventGroupSetBitsFromISR( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToSet, portBASE_TYPE *pxHigherPriorityTaskWoken );\r
+ EventBits_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );\r
</pre>\r
*\r
* A version of xEventGroupSetBits() that can be called from an interrupt.\r
\r
// An event group which it is assumed has already been created by a call to\r
// xEventGroupCreate().\r
- xEventGroupHandle xEventGroup;\r
+ EventGroupHandle_t xEventGroup;\r
\r
void anInterruptHandler( void )\r
{\r
- portBASE_TYPE xHigherPriorityTaskWoken;\r
+ BaseType_t xHigherPriorityTaskWoken;\r
\r
// xHigherPriorityTaskWoken must be initialised to pdFALSE.\r
xHigherPriorityTaskWoken = pdFALSE;\r
* \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR\r
* \ingroup EventGroup\r
*/\r
-#define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendCallbackFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( unsigned long ) uxBitsToSet, pxHigherPriorityTaskWoken )\r
+#define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendCallbackFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )\r
\r
/**\r
* event_groups.h\r
*<pre>\r
- xEventBitsType xEventGroupSync( xEventGroupHandle xEventGroup,\r
- const xEventBitsType uxBitsToSet,\r
- const xEventBitsType uxBitsToWaitFor,\r
- portTickType xTicksToWait );\r
+ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,\r
+ const EventBits_t uxBitsToSet,\r
+ const EventBits_t uxBitsToWaitFor,\r
+ TickType_t xTicksToWait );\r
</pre>\r
*\r
* Atomically set bits within an event group, then wait for a combination of\r
\r
// Use an event group to synchronise three tasks. It is assumed this event\r
// group has already been created elsewhere.\r
- xEventGroupHandle xEventBits;\r
+ EventGroupHandle_t xEventBits;\r
\r
void vTask0( void *pvParameters )\r
{\r
- xEventBitsType uxReturn;\r
- portTickType xTicksToWait = 100 / portTICK_RATE_MS;\r
+ EventBits_t uxReturn;\r
+ TickType_t xTicksToWait = 100 / portTICK_RATE_MS;\r
\r
for( ;; )\r
{\r
* \defgroup xEventGroupSync xEventGroupSync\r
* \ingroup EventGroup\r
*/\r
-xEventBitsType xEventGroupSync( xEventGroupHandle xEventGroup, const xEventBitsType uxBitsToSet, const xEventBitsType uxBitsToWaitFor, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;\r
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\r
\r
\r
/**\r
* event_groups.h\r
*<pre>\r
- xEventBitsType xEventGroupGetBits( xEventGroupHandle xEventGroup );\r
+ EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );\r
</pre>\r
*\r
* Returns the current value of the bits in an event group. This function\r
/**\r
* event_groups.h\r
*<pre>\r
- void xEventGroupDelete( xEventGroupHandle xEventGroup );\r
+ void xEventGroupDelete( EventGroupHandle_t xEventGroup );\r
</pre>\r
*\r
* Delete an event group that was previously created by a call to\r
*\r
* @param xEventGroup The event group being deleted.\r
*/\r
-void vEventGroupDelete( xEventGroupHandle xEventGroup );\r
+void vEventGroupDelete( EventGroupHandle_t xEventGroup );\r
\r
/* For internal use only. */\r
-void vEventGroupSetBitsCallback( void *pvEventGroup, const unsigned long ulBitsToSet );\r
+void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet );\r
\r
\r
#ifdef __cplusplus\r
* heavily for the schedulers needs, it is also available for use by\r
* application code.\r
*\r
- * xLists can only store pointers to xListItems. Each xListItem contains a\r
+ * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a\r
* numeric value (xItemValue). Most of the time the lists are sorted in\r
* descending item value order.\r
*\r
*/\r
struct xLIST_ITEM\r
{\r
- configLIST_VOLATILE portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */\r
- struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next xListItem in the list. */\r
- struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;/*< Pointer to the previous xListItem in the list. */\r
- void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */\r
- void * configLIST_VOLATILE pvContainer; /*< Pointer to the list in which this list item is placed (if any). */\r
+ configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */\r
+ struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */\r
+ struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */\r
+ void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */\r
+ void * configLIST_VOLATILE pvContainer; /*< Pointer to the list in which this list item is placed (if any). */\r
};\r
-typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */\r
+typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */\r
\r
struct xMINI_LIST_ITEM\r
{\r
- configLIST_VOLATILE portTickType xItemValue;\r
+ configLIST_VOLATILE TickType_t xItemValue;\r
struct xLIST_ITEM * configLIST_VOLATILE pxNext;\r
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;\r
};\r
-typedef struct xMINI_LIST_ITEM xMiniListItem;\r
+typedef struct xMINI_LIST_ITEM MiniListItem_t;\r
\r
/*\r
* Definition of the type of queue used by the scheduler.\r
*/\r
typedef struct xLIST\r
{\r
- configLIST_VOLATILE unsigned portBASE_TYPE uxNumberOfItems;\r
- xListItem * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */\r
- xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */\r
-} xList;\r
+ configLIST_VOLATILE UBaseType_t uxNumberOfItems;\r
+ ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */\r
+ MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */\r
+} List_t;\r
\r
/*\r
* Access macro to set the owner of a list item. The owner of a list item\r
* \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER\r
* \ingroup LinkedList\r
*/\r
-#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner )\r
+#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner )\r
\r
/*\r
* Access macro to set the value of the list item. In most cases the value is\r
* \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE\r
* \ingroup LinkedList\r
*/\r
-#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) )\r
+#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) )\r
\r
/*\r
* Access macro to retrieve the value of the list item. The value can\r
* \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE\r
* \ingroup LinkedList\r
*/\r
-#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue )\r
+#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue )\r
\r
/*\r
* Access macro to retrieve the value of the list item at the head of a given\r
* \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE\r
* \ingroup LinkedList\r
*/\r
-#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue )\r
+#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue )\r
\r
/*\r
* Return the list item at the head of the list.\r
* \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY\r
* \ingroup LinkedList\r
*/\r
-#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext )\r
+#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext )\r
\r
/*\r
* Return the list item at the head of the list.\r
* \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY\r
* \ingroup LinkedList\r
*/\r
-#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )\r
+#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )\r
\r
/*\r
* Return the list item that marks the end of the list\r
* \page listGET_END_MARKER listGET_END_MARKER\r
* \ingroup LinkedList\r
*/\r
-#define listGET_END_MARKER( pxList ) ( ( xListItem const * ) ( &( ( pxList )->xListEnd ) ) )\r
+#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )\r
\r
/*\r
* Access macro to determine if a list contains any items. The macro will\r
* \page listLIST_IS_EMPTY listLIST_IS_EMPTY\r
* \ingroup LinkedList\r
*/\r
-#define listLIST_IS_EMPTY( pxList ) ( ( portBASE_TYPE ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) )\r
+#define listLIST_IS_EMPTY( pxList ) ( ( BaseType_t ) ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) )\r
\r
/*\r
* Access macro to return the number of items in the list.\r
*/\r
-#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems )\r
+#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems )\r
\r
/*\r
* Access function to obtain the owner of the next entry in a list.\r
*/\r
#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \\r
{ \\r
-xList * const pxConstList = ( pxList ); \\r
+List_t * const pxConstList = ( pxList ); \\r
/* Increment the index to the next item and return the item, ensuring */ \\r
/* we don't return the marker used at the end of the list. */ \\r
( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \\r
* @param pxListItem The list item we want to know if is in the list.\r
* @return pdTRUE if the list item is in the list, otherwise pdFALSE.\r
*/\r
-#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( portBASE_TYPE ) ( ( pxListItem )->pvContainer == ( void * ) ( pxList ) ) )\r
+#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( BaseType_t ) ( ( pxListItem )->pvContainer == ( void * ) ( pxList ) ) )\r
\r
/*\r
* Return the list a list item is contained within (referenced from).\r
*\r
* @param pxListItem The list item being queried.\r
- * @return A pointer to the xList object that references the pxListItem\r
+ * @return A pointer to the List_t object that references the pxListItem\r
*/\r
#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pvContainer )\r
\r
* \page vListInitialise vListInitialise\r
* \ingroup LinkedList\r
*/\r
-void vListInitialise( xList * const pxList );\r
+void vListInitialise( List_t * const pxList );\r
\r
/*\r
* Must be called before a list item is used. This sets the list container to\r
* \page vListInitialiseItem vListInitialiseItem\r
* \ingroup LinkedList\r
*/\r
-void vListInitialiseItem( xListItem * const pxItem );\r
+void vListInitialiseItem( ListItem_t * const pxItem );\r
\r
/*\r
* Insert a list item into a list. The item will be inserted into the list in\r
* \page vListInsert vListInsert\r
* \ingroup LinkedList\r
*/\r
-void vListInsert( xList * const pxList, xListItem * const pxNewListItem );\r
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem );\r
\r
/*\r
* Insert a list item into a list. The item will be inserted in a position\r
* \page vListInsertEnd vListInsertEnd\r
* \ingroup LinkedList\r
*/\r
-void vListInsertEnd( xList * const pxList, xListItem * const pxNewListItem );\r
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem );\r
\r
/*\r
* Remove an item from a list. The list item has a pointer to the list that\r
* \page uxListRemove uxListRemove\r
* \ingroup LinkedList\r
*/\r
-unsigned portBASE_TYPE uxListRemove( xListItem * const pxItemToRemove );\r
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove );\r
\r
#ifdef __cplusplus\r
}\r
#ifndef PORTABLE_H\r
#define PORTABLE_H\r
\r
-/* Include the macro file relevant to the port being used. */\r
-\r
+/* Include the macro file relevant to the port being used.\r
+NOTE: The following definitions are *DEPRECATED* as it is preferred to instead\r
+just add the path to the correct portmacro.h header file to the compiler's\r
+include path. */\r
#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT\r
#include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"\r
typedef void ( __interrupt __far *pxISR )();\r
*\r
*/\r
#if( portUSING_MPU_WRAPPERS == 1 )\r
- portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged ) PRIVILEGED_FUNCTION;\r
+ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;\r
#else\r
- portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;\r
+ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
/*\r
* Setup the hardware ready for the scheduler to take control. This generally\r
* sets up a tick interrupt and sets timers for the correct tick frequency.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void ) PRIVILEGED_FUNCTION;\r
+BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Undo any hardware/ISR setup that was performed by xPortStartScheduler() so\r
*/\r
#if( portUSING_MPU_WRAPPERS == 1 )\r
struct xMEMORY_REGION;\r
- void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth ) PRIVILEGED_FUNCTION;\r
+ void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint16_t usStackDepth ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
#ifdef __cplusplus\r
\r
/* Defines the prototype to which callback functions called from the RTOS/timer\r
daemon task must conform. */\r
-typedef void (*pdAPPLICATION_CALLBACK_CODE)( void *, unsigned long );\r
+typedef void (*pdAPPLICATION_CALLBACK_CODE)( void *, uint32_t );\r
\r
-#define pdFALSE ( ( portBASE_TYPE ) 0 )\r
-#define pdTRUE ( ( portBASE_TYPE ) 1 )\r
+#define pdFALSE ( ( BaseType_t ) 0 )\r
+#define pdTRUE ( ( BaseType_t ) 1 )\r
\r
-#define pdPASS ( pdTRUE )\r
-#define pdFAIL ( pdFALSE )\r
-#define errQUEUE_EMPTY ( ( portBASE_TYPE ) 0 )\r
-#define errQUEUE_FULL ( ( portBASE_TYPE ) 0 )\r
+#define pdPASS ( pdTRUE )\r
+#define pdFAIL ( pdFALSE )\r
+#define errQUEUE_EMPTY ( ( BaseType_t ) 0 )\r
+#define errQUEUE_FULL ( ( BaseType_t ) 0 )\r
\r
/* Error definitions. */\r
#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 )\r
\r
/**\r
* Type by which queues are referenced. For example, a call to xQueueCreate()\r
- * returns an xQueueHandle variable that can then be used as a parameter to\r
+ * returns an QueueHandle_t variable that can then be used as a parameter to\r
* xQueueSend(), xQueueReceive(), etc.\r
*/\r
-typedef void * xQueueHandle;\r
+typedef void * QueueHandle_t;\r
\r
/**\r
* Type by which queue sets are referenced. For example, a call to\r
* xQueueCreateSet() returns an xQueueSet variable that can then be used as a\r
* parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.\r
*/\r
-typedef void * xQueueSetHandle;\r
+typedef void * QueueSetHandle_t;\r
\r
/**\r
* Queue sets can contain both queues and semaphores, so the\r
- * xQueueSetMemberHandle is defined as a type to be used where a parameter or\r
- * return value can be either an xQueueHandle or an xSemaphoreHandle.\r
+ * QueueSetMember_t is defined as a type to be used where a parameter or\r
+ * return value can be either an QueueHandle_t or an SemaphoreHandle_t.\r
*/\r
-typedef void * xQueueSetMemberHandle;\r
+typedef void * QueueSetMember_t;\r
\r
/* For internal use only. */\r
-#define queueSEND_TO_BACK ( ( portBASE_TYPE ) 0 )\r
-#define queueSEND_TO_FRONT ( ( portBASE_TYPE ) 1 )\r
-#define queueOVERWRITE ( ( portBASE_TYPE ) 2 )\r
+#define queueSEND_TO_BACK ( ( BaseType_t ) 0 )\r
+#define queueSEND_TO_FRONT ( ( BaseType_t ) 1 )\r
+#define queueOVERWRITE ( ( BaseType_t ) 2 )\r
\r
/* For internal use only. These definitions *must* match those in queue.c. */\r
-#define queueQUEUE_TYPE_BASE ( ( unsigned char ) 0U )\r
-#define queueQUEUE_TYPE_SET ( ( unsigned char ) 0U )\r
-#define queueQUEUE_TYPE_MUTEX ( ( unsigned char ) 1U )\r
-#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( unsigned char ) 2U )\r
-#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( unsigned char ) 3U )\r
-#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( unsigned char ) 4U )\r
+#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U )\r
+#define queueQUEUE_TYPE_SET ( ( uint8_t ) 0U )\r
+#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U )\r
+#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U )\r
+#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U )\r
+#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U )\r
\r
/**\r
* queue. h\r
* <pre>\r
- xQueueHandle xQueueCreate(\r
- unsigned portBASE_TYPE uxQueueLength,\r
- unsigned portBASE_TYPE uxItemSize\r
+ QueueHandle_t xQueueCreate(\r
+ UBaseType_t uxQueueLength,\r
+ UBaseType_t uxItemSize\r
);\r
* </pre>\r
*\r
\r
void vATask( void *pvParameters )\r
{\r
- xQueueHandle xQueue1, xQueue2;\r
+ QueueHandle_t xQueue1, xQueue2;\r
\r
- // Create a queue capable of containing 10 unsigned long values.\r
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );\r
+ // Create a queue capable of containing 10 uint32_t values.\r
+ xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\r
if( xQueue1 == 0 )\r
{\r
// Queue was not created and must not be used.\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueSendToToFront(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueSendToToFront(\r
+ QueueHandle_t xQueue,\r
const void * pvItemToQueue,\r
- portTickType xTicksToWait\r
+ TickType_t xTicksToWait\r
);\r
* </pre>\r
*\r
char ucData[ 20 ];\r
} xMessage;\r
\r
- unsigned long ulVar = 10UL;\r
+ uint32_t ulVar = 10UL;\r
\r
void vATask( void *pvParameters )\r
{\r
- xQueueHandle xQueue1, xQueue2;\r
+ QueueHandle_t xQueue1, xQueue2;\r
struct AMessage *pxMessage;\r
\r
- // Create a queue capable of containing 10 unsigned long values.\r
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );\r
+ // Create a queue capable of containing 10 uint32_t values.\r
+ xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\r
\r
// Create a queue capable of containing 10 pointers to AMessage structures.\r
// These should be passed by pointer as they contain a lot of data.\r
\r
if( xQueue1 != 0 )\r
{\r
- // Send an unsigned long. Wait for 10 ticks for space to become\r
+ // Send an uint32_t. Wait for 10 ticks for space to become\r
// available if necessary.\r
- if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )\r
+ if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )\r
{\r
// Failed to post the message, even after 10 ticks.\r
}\r
// Send a pointer to a struct AMessage object. Don't block if the\r
// queue is already full.\r
pxMessage = & xMessage;\r
- xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );\r
+ xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );\r
}\r
\r
// ... Rest of task code.\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueSendToBack(\r
- xQueueHandle xQueue,\r
- const void * pvItemToQueue,\r
- portTickType xTicksToWait\r
+ BaseType_t xQueueSendToBack(\r
+ QueueHandle_t xQueue,\r
+ const void *pvItemToQueue,\r
+ TickType_t xTicksToWait\r
);\r
* </pre>\r
*\r
char ucData[ 20 ];\r
} xMessage;\r
\r
- unsigned long ulVar = 10UL;\r
+ uint32_t ulVar = 10UL;\r
\r
void vATask( void *pvParameters )\r
{\r
- xQueueHandle xQueue1, xQueue2;\r
+ QueueHandle_t xQueue1, xQueue2;\r
struct AMessage *pxMessage;\r
\r
- // Create a queue capable of containing 10 unsigned long values.\r
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );\r
+ // Create a queue capable of containing 10 uint32_t values.\r
+ xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\r
\r
// Create a queue capable of containing 10 pointers to AMessage structures.\r
// These should be passed by pointer as they contain a lot of data.\r
\r
if( xQueue1 != 0 )\r
{\r
- // Send an unsigned long. Wait for 10 ticks for space to become\r
+ // Send an uint32_t. Wait for 10 ticks for space to become\r
// available if necessary.\r
- if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )\r
+ if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )\r
{\r
// Failed to post the message, even after 10 ticks.\r
}\r
// Send a pointer to a struct AMessage object. Don't block if the\r
// queue is already full.\r
pxMessage = & xMessage;\r
- xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );\r
+ xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );\r
}\r
\r
// ... Rest of task code.\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueSend(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueSend(\r
+ QueueHandle_t xQueue,\r
const void * pvItemToQueue,\r
- portTickType xTicksToWait\r
+ TickType_t xTicksToWait\r
);\r
* </pre>\r
*\r
char ucData[ 20 ];\r
} xMessage;\r
\r
- unsigned long ulVar = 10UL;\r
+ uint32_t ulVar = 10UL;\r
\r
void vATask( void *pvParameters )\r
{\r
- xQueueHandle xQueue1, xQueue2;\r
+ QueueHandle_t xQueue1, xQueue2;\r
struct AMessage *pxMessage;\r
\r
- // Create a queue capable of containing 10 unsigned long values.\r
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );\r
+ // Create a queue capable of containing 10 uint32_t values.\r
+ xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\r
\r
// Create a queue capable of containing 10 pointers to AMessage structures.\r
// These should be passed by pointer as they contain a lot of data.\r
\r
if( xQueue1 != 0 )\r
{\r
- // Send an unsigned long. Wait for 10 ticks for space to become\r
+ // Send an uint32_t. Wait for 10 ticks for space to become\r
// available if necessary.\r
- if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )\r
+ if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )\r
{\r
// Failed to post the message, even after 10 ticks.\r
}\r
// Send a pointer to a struct AMessage object. Don't block if the\r
// queue is already full.\r
pxMessage = & xMessage;\r
- xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );\r
+ xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );\r
}\r
\r
// ... Rest of task code.\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueOverwrite(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueOverwrite(\r
+ QueueHandle_t xQueue,\r
const void * pvItemToQueue\r
);\r
* </pre>\r
\r
void vFunction( void *pvParameters )\r
{\r
- xQueueHandle xQueue;\r
- unsigned long ulVarToSend, ulValReceived;\r
+ QueueHandle_t xQueue;\r
+ uint32_t ulVarToSend, ulValReceived;\r
\r
- // Create a queue to hold one unsigned long value. It is strongly\r
+ // Create a queue to hold one uint32_t value. It is strongly\r
// recommended *not* to use xQueueOverwrite() on queues that can\r
// contain more than one value, and doing so will trigger an assertion\r
// if configASSERT() is defined.\r
- xQueue = xQueueCreate( 1, sizeof( unsigned long ) );\r
+ xQueue = xQueueCreate( 1, sizeof( uint32_t ) );\r
\r
// Write the value 10 to the queue using xQueueOverwrite().\r
ulVarToSend = 10;\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueGenericSend(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueGenericSend(\r
+ QueueHandle_t xQueue,\r
const void * pvItemToQueue,\r
- portTickType xTicksToWait\r
- portBASE_TYPE xCopyPosition\r
+ TickType_t xTicksToWait\r
+ BaseType_t xCopyPosition\r
);\r
* </pre>\r
*\r
char ucData[ 20 ];\r
} xMessage;\r
\r
- unsigned long ulVar = 10UL;\r
+ uint32_t ulVar = 10UL;\r
\r
void vATask( void *pvParameters )\r
{\r
- xQueueHandle xQueue1, xQueue2;\r
+ QueueHandle_t xQueue1, xQueue2;\r
struct AMessage *pxMessage;\r
\r
- // Create a queue capable of containing 10 unsigned long values.\r
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );\r
+ // Create a queue capable of containing 10 uint32_t values.\r
+ xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\r
\r
// Create a queue capable of containing 10 pointers to AMessage structures.\r
// These should be passed by pointer as they contain a lot of data.\r
\r
if( xQueue1 != 0 )\r
{\r
- // Send an unsigned long. Wait for 10 ticks for space to become\r
+ // Send an uint32_t. Wait for 10 ticks for space to become\r
// available if necessary.\r
- if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10, queueSEND_TO_BACK ) != pdPASS )\r
+ if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )\r
{\r
// Failed to post the message, even after 10 ticks.\r
}\r
// Send a pointer to a struct AMessage object. Don't block if the\r
// queue is already full.\r
pxMessage = & xMessage;\r
- xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0, queueSEND_TO_BACK );\r
+ xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );\r
}\r
\r
// ... Rest of task code.\r
* \defgroup xQueueSend xQueueSend\r
* \ingroup QueueManagement\r
*/\r
-signed portBASE_TYPE xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, const portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueuePeek(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueuePeek(\r
+ QueueHandle_t xQueue,\r
void *pvBuffer,\r
- portTickType xTicksToWait\r
+ TickType_t xTicksToWait\r
);</pre>\r
*\r
* This is a macro that calls the xQueueGenericReceive() function.\r
char ucData[ 20 ];\r
} xMessage;\r
\r
- xQueueHandle xQueue;\r
+ QueueHandle_t xQueue;\r
\r
// Task to create a queue and post a value.\r
void vATask( void *pvParameters )\r
// Send a pointer to a struct AMessage object. Don't block if the\r
// queue is already full.\r
pxMessage = & xMessage;\r
- xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );\r
+ xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );\r
\r
// ... Rest of task code.\r
}\r
{\r
// Peek a message on the created queue. Block for 10 ticks if a\r
// message is not immediately available.\r
- if( xQueuePeek( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )\r
+ if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )\r
{\r
// pcRxedMessage now points to the struct AMessage variable posted\r
// by vATask, but the item still remains on the queue.\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueuePeekFromISR(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueuePeekFromISR(\r
+ QueueHandle_t xQueue,\r
void *pvBuffer,\r
);</pre>\r
*\r
* \defgroup xQueuePeekFromISR xQueuePeekFromISR\r
* \ingroup QueueManagement\r
*/\r
-signed portBASE_TYPE xQueuePeekFromISR( xQueueHandle xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueReceive(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueReceive(\r
+ QueueHandle_t xQueue,\r
void *pvBuffer,\r
- portTickType xTicksToWait\r
+ TickType_t xTicksToWait\r
);</pre>\r
*\r
* This is a macro that calls the xQueueGenericReceive() function.\r
char ucData[ 20 ];\r
} xMessage;\r
\r
- xQueueHandle xQueue;\r
+ QueueHandle_t xQueue;\r
\r
// Task to create a queue and post a value.\r
void vATask( void *pvParameters )\r
// Send a pointer to a struct AMessage object. Don't block if the\r
// queue is already full.\r
pxMessage = & xMessage;\r
- xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );\r
+ xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );\r
\r
// ... Rest of task code.\r
}\r
{\r
// Receive a message on the created queue. Block for 10 ticks if a\r
// message is not immediately available.\r
- if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )\r
+ if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )\r
{\r
// pcRxedMessage now points to the struct AMessage variable posted\r
// by vATask.\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueGenericReceive(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueGenericReceive(\r
+ QueueHandle_t xQueue,\r
void *pvBuffer,\r
- portTickType xTicksToWait\r
- portBASE_TYPE xJustPeek\r
+ TickType_t xTicksToWait\r
+ BaseType_t xJustPeek\r
);</pre>\r
*\r
* It is preferred that the macro xQueueReceive() be used rather than calling\r
char ucData[ 20 ];\r
} xMessage;\r
\r
- xQueueHandle xQueue;\r
+ QueueHandle_t xQueue;\r
\r
// Task to create a queue and post a value.\r
void vATask( void *pvParameters )\r
// Send a pointer to a struct AMessage object. Don't block if the\r
// queue is already full.\r
pxMessage = & xMessage;\r
- xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );\r
+ xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );\r
\r
// ... Rest of task code.\r
}\r
{\r
// Receive a message on the created queue. Block for 10 ticks if a\r
// message is not immediately available.\r
- if( xQueueGenericReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )\r
+ if( xQueueGenericReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )\r
{\r
// pcRxedMessage now points to the struct AMessage variable posted\r
// by vATask.\r
* \defgroup xQueueReceive xQueueReceive\r
* \ingroup QueueManagement\r
*/\r
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle xQueue, void * const pvBuffer, portTickType xTicksToWait, const portBASE_TYPE xJustPeek ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeek ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* queue. h\r
- * <pre>unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue );</pre>\r
+ * <pre>UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );</pre>\r
*\r
* Return the number of messages stored in a queue.\r
*\r
* \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting\r
* \ingroup QueueManagement\r
*/\r
-unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* queue. h\r
- * <pre>unsigned portBASE_TYPE uxQueueSpacesAvailable( const xQueueHandle xQueue );</pre>\r
+ * <pre>UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );</pre>\r
*\r
* Return the number of free spaces available in a queue. This is equal to the\r
* number of items that can be sent to the queue before the queue becomes full\r
* \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting\r
* \ingroup QueueManagement\r
*/\r
-unsigned portBASE_TYPE uxQueueSpacesAvailable( const xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* queue. h\r
- * <pre>void vQueueDelete( xQueueHandle xQueue );</pre>\r
+ * <pre>void vQueueDelete( QueueHandle_t xQueue );</pre>\r
*\r
* Delete a queue - freeing all the memory allocated for storing of items\r
* placed on the queue.\r
* \defgroup vQueueDelete vQueueDelete\r
* \ingroup QueueManagement\r
*/\r
-void vQueueDelete( xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
+void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueSendToFrontFromISR(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueSendToFrontFromISR(\r
+ QueueHandle_t xQueue,\r
const void *pvItemToQueue,\r
- portBASE_TYPE *pxHigherPriorityTaskWoken\r
+ BaseType_t *pxHigherPriorityTaskWoken\r
);\r
</pre>\r
*\r
void vBufferISR( void )\r
{\r
char cIn;\r
- portBASE_TYPE xHigherPrioritTaskWoken;\r
+ BaseType_t xHigherPrioritTaskWoken;\r
\r
// We have not woken a task at the start of the ISR.\r
xHigherPriorityTaskWoken = pdFALSE;\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueSendToBackFromISR(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueSendToBackFromISR(\r
+ QueueHandle_t xQueue,\r
const void *pvItemToQueue,\r
- portBASE_TYPE *pxHigherPriorityTaskWoken\r
+ BaseType_t *pxHigherPriorityTaskWoken\r
);\r
</pre>\r
*\r
void vBufferISR( void )\r
{\r
char cIn;\r
- portBASE_TYPE xHigherPriorityTaskWoken;\r
+ BaseType_t xHigherPriorityTaskWoken;\r
\r
// We have not woken a task at the start of the ISR.\r
xHigherPriorityTaskWoken = pdFALSE;\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueOverwriteFromISR(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueOverwriteFromISR(\r
+ QueueHandle_t xQueue,\r
const void * pvItemToQueue,\r
- portBASE_TYPE *pxHigherPriorityTaskWoken\r
+ BaseType_t *pxHigherPriorityTaskWoken\r
);\r
* </pre>\r
*\r
* Example usage:\r
<pre>\r
\r
- xQueueHandle xQueue;\r
+ QueueHandle_t xQueue;\r
\r
void vFunction( void *pvParameters )\r
{\r
- // Create a queue to hold one unsigned long value. It is strongly\r
+ // Create a queue to hold one uint32_t value. It is strongly\r
// recommended *not* to use xQueueOverwriteFromISR() on queues that can\r
// contain more than one value, and doing so will trigger an assertion\r
// if configASSERT() is defined.\r
- xQueue = xQueueCreate( 1, sizeof( unsigned long ) );\r
+ xQueue = xQueueCreate( 1, sizeof( uint32_t ) );\r
}\r
\r
void vAnInterruptHandler( void )\r
{\r
// xHigherPriorityTaskWoken must be set to pdFALSE before it is used.\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
-unsigned long ulVarToSend, ulValReceived;\r
+BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
+uint32_t ulVarToSend, ulValReceived;\r
\r
// Write the value 10 to the queue using xQueueOverwriteFromISR().\r
ulVarToSend = 10;\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueSendFromISR(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueSendFromISR(\r
+ QueueHandle_t xQueue,\r
const void *pvItemToQueue,\r
- portBASE_TYPE *pxHigherPriorityTaskWoken\r
+ BaseType_t *pxHigherPriorityTaskWoken\r
);\r
</pre>\r
*\r
void vBufferISR( void )\r
{\r
char cIn;\r
- portBASE_TYPE xHigherPriorityTaskWoken;\r
+ BaseType_t xHigherPriorityTaskWoken;\r
\r
// We have not woken a task at the start of the ISR.\r
xHigherPriorityTaskWoken = pdFALSE;\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueGenericSendFromISR(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueGenericSendFromISR(\r
+ QueueHandle_t xQueue,\r
const void *pvItemToQueue,\r
- portBASE_TYPE *pxHigherPriorityTaskWoken,\r
- portBASE_TYPE xCopyPosition\r
+ BaseType_t *pxHigherPriorityTaskWoken,\r
+ BaseType_t xCopyPosition\r
);\r
</pre>\r
*\r
void vBufferISR( void )\r
{\r
char cIn;\r
- portBASE_TYPE xHigherPriorityTaskWokenByPost;\r
+ BaseType_t xHigherPriorityTaskWokenByPost;\r
\r
// We have not woken a task at the start of the ISR.\r
xHigherPriorityTaskWokenByPost = pdFALSE;\r
* \defgroup xQueueSendFromISR xQueueSendFromISR\r
* \ingroup QueueManagement\r
*/\r
-signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle xQueue, const void * const pvItemToQueue, signed portBASE_TYPE * const pxHigherPriorityTaskWoken, const portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* queue. h\r
* <pre>\r
- portBASE_TYPE xQueueReceiveFromISR(\r
- xQueueHandle xQueue,\r
+ BaseType_t xQueueReceiveFromISR(\r
+ QueueHandle_t xQueue,\r
void *pvBuffer,\r
- portBASE_TYPE *pxTaskWoken\r
+ BaseType_t *pxTaskWoken\r
);\r
* </pre>\r
*\r
* Example usage:\r
<pre>\r
\r
- xQueueHandle xQueue;\r
+ QueueHandle_t xQueue;\r
\r
// Function to create a queue and post some values.\r
void vAFunction( void *pvParameters )\r
{\r
char cValueToPost;\r
- const portTickType xBlockTime = ( portTickType )0xff;\r
+ const TickType_t xBlockTime = ( TickType_t )0xff;\r
\r
// Create a queue capable of containing 10 characters.\r
xQueue = xQueueCreate( 10, sizeof( char ) );\r
// ISR that outputs all the characters received on the queue.\r
void vISR_Routine( void )\r
{\r
- portBASE_TYPE xTaskWokenByReceive = pdFALSE;\r
+ BaseType_t xTaskWokenByReceive = pdFALSE;\r
char cRxedChar;\r
\r
while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )\r
* \defgroup xQueueReceiveFromISR xQueueReceiveFromISR\r
* \ingroup QueueManagement\r
*/\r
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle xQueue, void * const pvBuffer, signed portBASE_TYPE * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Utilities to query queues that are safe to use from an ISR. These utilities\r
* should be used only from witin an ISR, or within a critical section.\r
*/\r
-signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
-signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
-unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
\r
\r
/*\r
* responsiveness to gain execution speed, whereas the fully featured API\r
* sacrifices execution speed to ensure better interrupt responsiveness.\r
*/\r
-signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
-signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle xQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
+BaseType_t xQueueAltGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );\r
+BaseType_t xQueueAltGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );\r
#define xQueueAltSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )\r
#define xQueueAltSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )\r
#define xQueueAltReceive( xQueue, pvBuffer, xTicksToWait ) xQueueAltGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdFALSE )\r
* should not be called directly from application code. Instead use the macro\r
* wrappers defined within croutine.h.\r
*/\r
-signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle xQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken );\r
-signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle xQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken );\r
-signed portBASE_TYPE xQueueCRSend( xQueueHandle xQueue, const void *pvItemToQueue, portTickType xTicksToWait );\r
-signed portBASE_TYPE xQueueCRReceive( xQueueHandle xQueue, void *pvBuffer, portTickType xTicksToWait );\r
+BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken );\r
+BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxTaskWoken );\r
+BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait );\r
+BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait );\r
\r
/*\r
* For internal use only. Use xSemaphoreCreateMutex(),\r
* xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling\r
* these functions directly.\r
*/\r
-xQueueHandle xQueueCreateMutex( const unsigned char ucQueueType ) PRIVILEGED_FUNCTION;\r
-xQueueHandle xQueueCreateCountingSemaphore( const unsigned portBASE_TYPE uxMaxCount, const unsigned portBASE_TYPE uxInitialCount ) PRIVILEGED_FUNCTION;\r
-void* xQueueGetMutexHolder( xQueueHandle xSemaphore ) PRIVILEGED_FUNCTION;\r
+QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\r
+QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;\r
+void* xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* For internal use only. Use xSemaphoreTakeMutexRecursive() or\r
* xSemaphoreGiveMutexRecursive() instead of calling these functions directly.\r
*/\r
-portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime ) PRIVILEGED_FUNCTION;\r
-portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle pxMutex ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Reset a queue back to its original empty state. pdPASS is returned if the\r
* preferably in ROM/Flash), not on the stack.\r
*/\r
#if configQUEUE_REGISTRY_SIZE > 0\r
- void vQueueAddToRegistry( xQueueHandle xQueue, char *pcName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ void vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
#endif\r
\r
/*\r
* @param xQueue The handle of the queue being removed from the registry.\r
*/\r
#if configQUEUE_REGISTRY_SIZE > 0\r
- void vQueueUnregisterQueue( xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
+ void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
/*\r
* Generic version of the queue creation function, which is in turn called by\r
* any queue, semaphore or mutex creation function or macro.\r
*/\r
-xQueueHandle xQueueGenericCreate( const unsigned portBASE_TYPE uxQueueLength, const unsigned portBASE_TYPE uxItemSize, const unsigned char ucQueueType ) PRIVILEGED_FUNCTION;\r
+QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Queue sets provide a mechanism to allow a task to block (pend) on a read\r
* @return If the queue set is created successfully then a handle to the created\r
* queue set is returned. Otherwise NULL is returned.\r
*/\r
-xQueueSetHandle xQueueCreateSet( const unsigned portBASE_TYPE uxEventQueueLength ) PRIVILEGED_FUNCTION;\r
+QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Adds a queue or semaphore to a queue set that was previously created by a\r
* a call to xQueueSelectFromSet() has first returned a handle to that set member.\r
*\r
* @param xQueueOrSemaphore The handle of the queue or semaphore being added to\r
- * the queue set (cast to an xQueueSetMemberHandle type).\r
+ * the queue set (cast to an QueueSetMember_t type).\r
*\r
* @param xQueueSet The handle of the queue set to which the queue or semaphore\r
* is being added.\r
* queue set because it is already a member of a different queue set then pdFAIL\r
* is returned.\r
*/\r
-portBASE_TYPE xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueAddToSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Removes a queue or semaphore from a queue set. A queue or semaphore can only\r
* function.\r
*\r
* @param xQueueOrSemaphore The handle of the queue or semaphore being removed\r
- * from the queue set (cast to an xQueueSetMemberHandle type).\r
+ * from the queue set (cast to an QueueSetMember_t type).\r
*\r
* @param xQueueSet The handle of the queue set in which the queue or semaphore\r
* is included.\r
* then pdPASS is returned. If the queue was not in the queue set, or the\r
* queue (or semaphore) was not empty, then pdFAIL is returned.\r
*/\r
-portBASE_TYPE xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueRemoveFromSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* xQueueSelectFromSet() selects from the members of a queue set a queue or\r
* operation.\r
*\r
* @return xQueueSelectFromSet() will return the handle of a queue (cast to\r
- * a xQueueSetMemberHandle type) contained in the queue set that contains data,\r
- * or the handle of a semaphore (cast to a xQueueSetMemberHandle type) contained\r
+ * a QueueSetMember_t type) contained in the queue set that contains data,\r
+ * or the handle of a semaphore (cast to a QueueSetMember_t type) contained\r
* in the queue set that is available, or NULL if no such queue or semaphore\r
* exists before before the specified block time expires.\r
*/\r
-xQueueSetMemberHandle xQueueSelectFromSet( xQueueSetHandle xQueueSet, const portTickType xBlockTimeTicks ) PRIVILEGED_FUNCTION;\r
+QueueSetMember_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xBlockTimeTicks ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* A version of xQueueSelectFromSet() that can be used from an ISR.\r
*/\r
-xQueueSetMemberHandle xQueueSelectFromSetFromISR( xQueueSetHandle xQueueSet ) PRIVILEGED_FUNCTION;\r
+QueueSetMember_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;\r
\r
/* Not public API functions. */\r
-void vQueueWaitForMessageRestricted( xQueueHandle xQueue, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;\r
-portBASE_TYPE xQueueGenericReset( xQueueHandle xQueue, portBASE_TYPE xNewQueue ) PRIVILEGED_FUNCTION;\r
-void vQueueSetQueueNumber( xQueueHandle xQueue, unsigned portBASE_TYPE uxQueueNumber ) PRIVILEGED_FUNCTION;\r
-unsigned portBASE_TYPE uxQueueGetQueueNumber( xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
-unsigned char ucQueueGetQueueType( xQueueHandle xQueue ) PRIVILEGED_FUNCTION;\r
+void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\r
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;\r
+void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
+uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\r
\r
\r
#ifdef __cplusplus\r
\r
#include "queue.h"\r
\r
-typedef xQueueHandle xSemaphoreHandle;\r
+typedef QueueHandle_t SemaphoreHandle_t;\r
\r
-#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned char ) 1U )\r
-#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned char ) 0U )\r
-#define semGIVE_BLOCK_TIME ( ( portTickType ) 0U )\r
+#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( uint8_t ) 1U )\r
+#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( uint8_t ) 0U )\r
+#define semGIVE_BLOCK_TIME ( ( TickType_t ) 0U )\r
\r
\r
/**\r
* semphr. h\r
- * <pre>vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )</pre>\r
+ * <pre>vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )</pre>\r
*\r
* This old vSemaphoreCreateBinary() macro is now deprecated in favour of the\r
* xSemaphoreCreateBinary() function. Note that binary semaphores created using\r
* semaphore does not use a priority inheritance mechanism. For an alternative\r
* that does use priority inheritance see xSemaphoreCreateMutex().\r
*\r
- * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle.\r
+ * @param xSemaphore Handle to the created semaphore. Should be of type SemaphoreHandle_t.\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xSemaphore = NULL;\r
+ SemaphoreHandle_t xSemaphore = NULL;\r
\r
void vATask( void * pvParameters )\r
{\r
* \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary\r
* \ingroup Semaphores\r
*/\r
-#define vSemaphoreCreateBinary( xSemaphore ) \\r
- { \\r
- ( xSemaphore ) = xQueueGenericCreate( ( unsigned portBASE_TYPE ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \\r
- if( ( xSemaphore ) != NULL ) \\r
- { \\r
- ( void ) xSemaphoreGive( ( xSemaphore ) ); \\r
- } \\r
+#define vSemaphoreCreateBinary( xSemaphore ) \\r
+ { \\r
+ ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \\r
+ if( ( xSemaphore ) != NULL ) \\r
+ { \\r
+ ( void ) xSemaphoreGive( ( xSemaphore ) ); \\r
+ } \\r
}\r
\r
/**\r
* semphr. h\r
- * <pre>xSemaphoreHandle xSemaphoreCreateBinary( void )</pre>\r
+ * <pre>SemaphoreHandle_t xSemaphoreCreateBinary( void )</pre>\r
*\r
* The old vSemaphoreCreateBinary() macro is now deprecated in favour of this\r
* xSemaphoreCreateBinary() function. Note that binary semaphores created using\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xSemaphore = NULL;\r
+ SemaphoreHandle_t xSemaphore = NULL;\r
\r
void vATask( void * pvParameters )\r
{\r
* \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreCreateBinary() xQueueGenericCreate( ( unsigned portBASE_TYPE ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )\r
+#define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )\r
\r
/**\r
* semphr. h\r
* <pre>xSemaphoreTake(\r
- * xSemaphoreHandle xSemaphore,\r
- * portTickType xBlockTime\r
+ * SemaphoreHandle_t xSemaphore,\r
+ * TickType_t xBlockTime\r
* )</pre>\r
*\r
* <i>Macro</i> to obtain a semaphore. The semaphore must have previously been\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xSemaphore = NULL;\r
+ SemaphoreHandle_t xSemaphore = NULL;\r
\r
// A task that creates a semaphore.\r
void vATask( void * pvParameters )\r
{\r
// See if we can obtain the semaphore. If the semaphore is not available\r
// wait 10 ticks to see if it becomes free.\r
- if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )\r
+ if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )\r
{\r
// We were able to obtain the semaphore and can now access the\r
// shared resource.\r
* \defgroup xSemaphoreTake xSemaphoreTake\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueGenericReceive( ( xQueueHandle ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE )\r
+#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueGenericReceive( ( QueueHandle_t ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE )\r
\r
/**\r
* semphr. h\r
* xSemaphoreTakeRecursive(\r
- * xSemaphoreHandle xMutex,\r
- * portTickType xBlockTime\r
+ * SemaphoreHandle_t xMutex,\r
+ * TickType_t xBlockTime\r
* )\r
*\r
* <i>Macro</i> to recursively obtain, or 'take', a mutex type semaphore.\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xMutex = NULL;\r
+ SemaphoreHandle_t xMutex = NULL;\r
\r
// A task that creates a mutex.\r
void vATask( void * pvParameters )\r
{\r
// See if we can obtain the mutex. If the mutex is not available\r
// wait 10 ticks to see if it becomes free.\r
- if( xSemaphoreTakeRecursive( xSemaphore, ( portTickType ) 10 ) == pdTRUE )\r
+ if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )\r
{\r
// We were able to obtain the mutex and can now access the\r
// shared resource.\r
// code these would not be just sequential calls as this would make\r
// no sense. Instead the calls are likely to be buried inside\r
// a more complex call structure.\r
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );\r
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );\r
+ xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\r
+ xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\r
\r
// The mutex has now been 'taken' three times, so will not be\r
// available to another task until it has also been given back\r
* responsiveness to gain execution speed, whereas the fully featured API\r
* sacrifices execution speed to ensure better interrupt responsiveness.\r
*/\r
-#define xSemaphoreAltTake( xSemaphore, xBlockTime ) xQueueAltGenericReceive( ( xQueueHandle ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE )\r
+#define xSemaphoreAltTake( xSemaphore, xBlockTime ) xQueueAltGenericReceive( ( QueueHandle_t ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE )\r
\r
/**\r
* semphr. h\r
- * <pre>xSemaphoreGive( xSemaphoreHandle xSemaphore )</pre>\r
+ * <pre>xSemaphoreGive( SemaphoreHandle_t xSemaphore )</pre>\r
*\r
* <i>Macro</i> to release a semaphore. The semaphore must have previously been\r
* created with a call to vSemaphoreCreateBinary(), xSemaphoreCreateMutex() or\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xSemaphore = NULL;\r
+ SemaphoreHandle_t xSemaphore = NULL;\r
\r
void vATask( void * pvParameters )\r
{\r
\r
// Obtain the semaphore - don't block if the semaphore is not\r
// immediately available.\r
- if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )\r
+ if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )\r
{\r
// We now have the semaphore and can access the shared resource.\r
\r
* \defgroup xSemaphoreGive xSemaphoreGive\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( xQueueHandle ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )\r
+#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )\r
\r
/**\r
* semphr. h\r
- * <pre>xSemaphoreGiveRecursive( xSemaphoreHandle xMutex )</pre>\r
+ * <pre>xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )</pre>\r
*\r
* <i>Macro</i> to recursively release, or 'give', a mutex type semaphore.\r
* The mutex must have previously been created using a call to\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xMutex = NULL;\r
+ SemaphoreHandle_t xMutex = NULL;\r
\r
// A task that creates a mutex.\r
void vATask( void * pvParameters )\r
{\r
// See if we can obtain the mutex. If the mutex is not available\r
// wait 10 ticks to see if it becomes free.\r
- if( xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 ) == pdTRUE )\r
+ if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )\r
{\r
// We were able to obtain the mutex and can now access the\r
// shared resource.\r
// code these would not be just sequential calls as this would make\r
// no sense. Instead the calls are likely to be buried inside\r
// a more complex call structure.\r
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );\r
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );\r
+ xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\r
+ xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\r
\r
// The mutex has now been 'taken' three times, so will not be\r
// available to another task until it has also been given back\r
* responsiveness to gain execution speed, whereas the fully featured API\r
* sacrifices execution speed to ensure better interrupt responsiveness.\r
*/\r
-#define xSemaphoreAltGive( xSemaphore ) xQueueAltGenericSend( ( xQueueHandle ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )\r
+#define xSemaphoreAltGive( xSemaphore ) xQueueAltGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )\r
\r
/**\r
* semphr. h\r
* <pre>\r
xSemaphoreGiveFromISR(\r
- xSemaphoreHandle xSemaphore,\r
- signed portBASE_TYPE *pxHigherPriorityTaskWoken\r
+ SemaphoreHandle_t xSemaphore,\r
+ BaseType_t *pxHigherPriorityTaskWoken\r
)</pre>\r
*\r
* <i>Macro</i> to release a semaphore. The semaphore must have previously been\r
<pre>\r
\#define LONG_TIME 0xffff\r
\#define TICKS_TO_WAIT 10\r
- xSemaphoreHandle xSemaphore = NULL;\r
+ SemaphoreHandle_t xSemaphore = NULL;\r
\r
// Repetitive task.\r
void vATask( void * pvParameters )\r
// Timer ISR\r
void vTimerISR( void * pvParameters )\r
{\r
- static unsigned char ucLocalTickCount = 0;\r
- static signed portBASE_TYPE xHigherPriorityTaskWoken;\r
+ static uint8_t ucLocalTickCount = 0;\r
+ static BaseType_t xHigherPriorityTaskWoken;\r
\r
// A timer tick has occurred.\r
\r
* \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR\r
* \ingroup Semaphores\r
*/\r
-#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueueHandle ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )\r
+#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )\r
\r
/**\r
* semphr. h\r
* <pre>\r
xSemaphoreTakeFromISR(\r
- xSemaphoreHandle xSemaphore,\r
- signed portBASE_TYPE *pxHigherPriorityTaskWoken\r
+ SemaphoreHandle_t xSemaphore,\r
+ BaseType_t *pxHigherPriorityTaskWoken\r
)</pre>\r
*\r
* <i>Macro</i> to take a semaphore from an ISR. The semaphore must have\r
* @return pdTRUE if the semaphore was successfully taken, otherwise\r
* pdFALSE\r
*/\r
-#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueReceiveFromISR( ( xQueueHandle ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )\r
+#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )\r
\r
/**\r
* semphr. h\r
- * <pre>xSemaphoreHandle xSemaphoreCreateMutex( void )</pre>\r
+ * <pre>SemaphoreHandle_t xSemaphoreCreateMutex( void )</pre>\r
*\r
* <i>Macro</i> that implements a mutex semaphore by using the existing queue\r
* mechanism.\r
* service routines.\r
*\r
* @return xSemaphore Handle to the created mutex semaphore. Should be of type\r
- * xSemaphoreHandle.\r
+ * SemaphoreHandle_t.\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xSemaphore;\r
+ SemaphoreHandle_t xSemaphore;\r
\r
void vATask( void * pvParameters )\r
{\r
\r
/**\r
* semphr. h\r
- * <pre>xSemaphoreHandle xSemaphoreCreateRecursiveMutex( void )</pre>\r
+ * <pre>SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )</pre>\r
*\r
* <i>Macro</i> that implements a recursive mutex by using the existing queue\r
* mechanism.\r
* service routines.\r
*\r
* @return xSemaphore Handle to the created mutex semaphore. Should be of type\r
- * xSemaphoreHandle.\r
+ * SemaphoreHandle_t.\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xSemaphore;\r
+ SemaphoreHandle_t xSemaphore;\r
\r
void vATask( void * pvParameters )\r
{\r
\r
/**\r
* semphr. h\r
- * <pre>xSemaphoreHandle xSemaphoreCreateCounting( unsigned portBASE_TYPE uxMaxCount, unsigned portBASE_TYPE uxInitialCount )</pre>\r
+ * <pre>SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )</pre>\r
*\r
* <i>Macro</i> that creates a counting semaphore by using the existing\r
* queue mechanism.\r
*\r
* Example usage:\r
<pre>\r
- xSemaphoreHandle xSemaphore;\r
+ SemaphoreHandle_t xSemaphore;\r
\r
void vATask( void * pvParameters )\r
{\r
- xSemaphoreHandle xSemaphore = NULL;\r
+ SemaphoreHandle_t xSemaphore = NULL;\r
\r
// Semaphore cannot be used before a call to xSemaphoreCreateCounting().\r
// The max value to which the semaphore can count should be 10, and the\r
\r
/**\r
* semphr. h\r
- * <pre>void vSemaphoreDelete( xSemaphoreHandle xSemaphore );</pre>\r
+ * <pre>void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );</pre>\r
*\r
* Delete a semaphore. This function must be used with care. For example,\r
* do not delete a mutex type semaphore if the mutex is held by a task.\r
* \defgroup vSemaphoreDelete vSemaphoreDelete\r
* \ingroup Semaphores\r
*/\r
-#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( xQueueHandle ) ( xSemaphore ) )\r
+#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )\r
\r
/**\r
* semphr.h\r
- * <pre>xTaskHandle xSemaphoreGetMutexHolder( xSemaphoreHandle xMutex );</pre>\r
+ * <pre>TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );</pre>\r
*\r
* If xMutex is indeed a mutex type semaphore, return the current mutex holder.\r
* If xMutex is not a mutex type semaphore, or the mutex is available (not held\r
* task. h\r
*\r
* Type by which tasks are referenced. For example, a call to xTaskCreate\r
- * returns (via a pointer parameter) an xTaskHandle variable that can then\r
+ * returns (via a pointer parameter) an TaskHandle_t variable that can then\r
* be used as a parameter to vTaskDelete to delete the task.\r
*\r
- * \defgroup xTaskHandle xTaskHandle\r
+ * \defgroup TaskHandle_t TaskHandle_t\r
* \ingroup Tasks\r
*/\r
-typedef void * xTaskHandle;\r
+typedef void * TaskHandle_t;\r
\r
/* Task states returned by eTaskGetState. */\r
typedef enum\r
*/\r
typedef struct xTIME_OUT\r
{\r
- portBASE_TYPE xOverflowCount;\r
- portTickType xTimeOnEntering;\r
-} xTimeOutType;\r
+ BaseType_t xOverflowCount;\r
+ TickType_t xTimeOnEntering;\r
+} TimeOut_t;\r
\r
/*\r
* Defines the memory ranges allocated to the task when an MPU is used.\r
typedef struct xMEMORY_REGION\r
{\r
void *pvBaseAddress;\r
- unsigned long ulLengthInBytes;\r
- unsigned long ulParameters;\r
-} xMemoryRegion;\r
+ uint32_t ulLengthInBytes;\r
+ uint32_t ulParameters;\r
+} MemoryRegion_t;\r
\r
/*\r
* Parameters required to create an MPU protected task.\r
{\r
pdTASK_CODE pvTaskCode;\r
const char * const pcName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
- unsigned short usStackDepth;\r
+ uint16_t usStackDepth;\r
void *pvParameters;\r
- unsigned portBASE_TYPE uxPriority;\r
- portSTACK_TYPE *puxStackBuffer;\r
- xMemoryRegion xRegions[ portNUM_CONFIGURABLE_REGIONS ];\r
-} xTaskParameters;\r
+ UBaseType_t uxPriority;\r
+ StackType_t *puxStackBuffer;\r
+ MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];\r
+} TaskParameters_t;\r
\r
/* Used with the uxTaskGetSystemState() function to return the state of each task\r
in the system. */\r
typedef struct xTASK_STATUS\r
{\r
- xTaskHandle xHandle; /* The handle of the task to which the rest of the information in the structure relates. */\r
- const char *pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
- unsigned portBASE_TYPE xTaskNumber; /* A number unique to the task. */\r
- eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */\r
- unsigned portBASE_TYPE uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */\r
- unsigned portBASE_TYPE uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */\r
- unsigned long ulRunTimeCounter; /* The total run time allocated to the task so far, as defined by the run time stats clock. See http://www.freertos.org/rtos-run-time-stats.html. Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */\r
- unsigned short usStackHighWaterMark; /* The minimum amount of stack space that has remained for the task since the task was created. The closer this value is to zero the closer the task has come to overflowing its stack. */\r
-} xTaskStatusType;\r
+ TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */\r
+ const char *pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ UBaseType_t xTaskNumber; /* A number unique to the task. */\r
+ eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */\r
+ UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */\r
+ UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */\r
+ uint32_t ulRunTimeCounter; /* The total run time allocated to the task so far, as defined by the run time stats clock. See http://www.freertos.org/rtos-run-time-stats.html. Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */\r
+ uint16_t usStackHighWaterMark; /* The minimum amount of stack space that has remained for the task since the task was created. The closer this value is to zero the closer the task has come to overflowing its stack. */\r
+} TaskStatus_t;\r
\r
/* Possible return values for eTaskConfirmSleepModeStatus(). */\r
typedef enum\r
*\r
* \ingroup TaskUtils\r
*/\r
-#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0U )\r
+#define tskIDLE_PRIORITY ( ( UBaseType_t ) 0U )\r
\r
/**\r
* task. h\r
/* Definitions returned by xTaskGetSchedulerState(). taskSCHEDULER_SUSPENDED is\r
0 to generate more optimal code when configASSERT() is defined as the constant\r
is used in assert() statements. */\r
-#define taskSCHEDULER_SUSPENDED ( ( portBASE_TYPE ) 0 )\r
-#define taskSCHEDULER_NOT_STARTED ( ( portBASE_TYPE ) 1 )\r
-#define taskSCHEDULER_RUNNING ( ( portBASE_TYPE ) 2 )\r
+#define taskSCHEDULER_SUSPENDED ( ( BaseType_t ) 0 )\r
+#define taskSCHEDULER_NOT_STARTED ( ( BaseType_t ) 1 )\r
+#define taskSCHEDULER_RUNNING ( ( BaseType_t ) 2 )\r
\r
\r
/*-----------------------------------------------------------\r
/**\r
* task. h\r
*<pre>\r
- portBASE_TYPE xTaskCreate(\r
+ BaseType_t xTaskCreate(\r
pdTASK_CODE pvTaskCode,\r
const char * const pcName,\r
- unsigned short usStackDepth,\r
+ uint16_t usStackDepth,\r
void *pvParameters,\r
- unsigned portBASE_TYPE uxPriority,\r
- xTaskHandle *pvCreatedTask\r
+ UBaseType_t uxPriority,\r
+ TaskHandle_t *pvCreatedTask\r
);</pre>\r
*\r
* Create a new task and add it to the list of tasks that are ready to run.\r
// Function that creates a task.\r
void vOtherFunction( void )\r
{\r
- static unsigned char ucParameterToPass;\r
- xTaskHandle xHandle = NULL;\r
+ static uint8_t ucParameterToPass;\r
+ TaskHandle_t xHandle = NULL;\r
\r
// Create the task, storing the handle. Note that the passed parameter ucParameterToPass\r
// must exist for the lifetime of the task, so in this case is declared static. If it was just an\r
/**\r
* task. h\r
*<pre>\r
- portBASE_TYPE xTaskCreateRestricted( xTaskParameters *pxTaskDefinition, xTaskHandle *pxCreatedTask );</pre>\r
+ BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );</pre>\r
*\r
* xTaskCreateRestricted() should only be used in systems that include an MPU\r
* implementation.\r
*\r
* Example usage:\r
<pre>\r
-// Create an xTaskParameters structure that defines the task to be created.\r
-static const xTaskParameters xCheckTaskParameters =\r
+// Create an TaskParameters_t structure that defines the task to be created.\r
+static const TaskParameters_t xCheckTaskParameters =\r
{\r
vATask, // pvTaskCode - the function that implements the task.\r
"ATask", // pcName - just a text name for the task to assist debugging.\r
\r
int main( void )\r
{\r
-xTaskHandle xHandle;\r
+TaskHandle_t xHandle;\r
\r
// Create a task from the const structure defined above. The task handle\r
// is requested (the second parameter is not NULL) but in this case just for\r
/**\r
* task. h\r
*<pre>\r
- void vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const pxRegions );</pre>\r
+ void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );</pre>\r
*\r
* Memory regions are assigned to a restricted task when the task is created by\r
* a call to xTaskCreateRestricted(). These regions can be redefined using\r
*\r
* @param xTask The handle of the task being updated.\r
*\r
- * @param xRegions A pointer to an xMemoryRegion structure that contains the\r
+ * @param xRegions A pointer to an MemoryRegion_t structure that contains the\r
* new memory region definitions.\r
*\r
* Example usage:\r
<pre>\r
-// Define an array of xMemoryRegion structures that configures an MPU region\r
+// Define an array of MemoryRegion_t structures that configures an MPU region\r
// allowing read/write access for 1024 bytes starting at the beginning of the\r
// ucOneKByte array. The other two of the maximum 3 definable regions are\r
// unused so set to zero.\r
-static const xMemoryRegion xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =\r
+static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =\r
{\r
// Base address Length Parameters\r
{ ucOneKByte, 1024, portMPU_REGION_READ_WRITE },\r
* \defgroup xTaskCreateRestricted xTaskCreateRestricted\r
* \ingroup Tasks\r
*/\r
-void vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const pxRegions ) PRIVILEGED_FUNCTION;\r
+void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>void vTaskDelete( xTaskHandle xTask );</pre>\r
+ * <pre>void vTaskDelete( TaskHandle_t xTask );</pre>\r
*\r
* INCLUDE_vTaskDelete must be defined as 1 for this function to be available.\r
* See the configuration section for more information.\r
<pre>\r
void vOtherFunction( void )\r
{\r
- xTaskHandle xHandle;\r
+ TaskHandle_t xHandle;\r
\r
// Create the task, storing the handle.\r
xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\r
* \defgroup vTaskDelete vTaskDelete\r
* \ingroup Tasks\r
*/\r
-void vTaskDelete( xTaskHandle xTaskToDelete ) PRIVILEGED_FUNCTION;\r
+void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;\r
\r
/*-----------------------------------------------------------\r
* TASK CONTROL API\r
\r
/**\r
* task. h\r
- * <pre>void vTaskDelay( const portTickType xTicksToDelay );</pre>\r
+ * <pre>void vTaskDelay( const TickType_t xTicksToDelay );</pre>\r
*\r
* Delay a task for a given number of ticks. The actual time that the\r
* task remains blocked depends on the tick rate. The constant\r
void vTaskFunction( void * pvParameters )\r
{\r
// Block for 500ms.\r
- const portTickType xDelay = 500 / portTICK_RATE_MS;\r
+ const TickType_t xDelay = 500 / portTICK_RATE_MS;\r
\r
for( ;; )\r
{\r
* \defgroup vTaskDelay vTaskDelay\r
* \ingroup TaskCtrl\r
*/\r
-void vTaskDelay( const portTickType xTicksToDelay ) PRIVILEGED_FUNCTION;\r
+void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>void vTaskDelayUntil( portTickType *pxPreviousWakeTime, const portTickType xTimeIncrement );</pre>\r
+ * <pre>void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );</pre>\r
*\r
* INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available.\r
* See the configuration section for more information.\r
// Perform an action every 10 ticks.\r
void vTaskFunction( void * pvParameters )\r
{\r
- portTickType xLastWakeTime;\r
- const portTickType xFrequency = 10;\r
+ TickType_t xLastWakeTime;\r
+ const TickType_t xFrequency = 10;\r
\r
// Initialise the xLastWakeTime variable with the current time.\r
xLastWakeTime = xTaskGetTickCount ();\r
* \defgroup vTaskDelayUntil vTaskDelayUntil\r
* \ingroup TaskCtrl\r
*/\r
-void vTaskDelayUntil( portTickType * const pxPreviousWakeTime, const portTickType xTimeIncrement ) PRIVILEGED_FUNCTION;\r
+void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle xTask );</pre>\r
+ * <pre>UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask );</pre>\r
*\r
* INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available.\r
* See the configuration section for more information.\r
<pre>\r
void vAFunction( void )\r
{\r
- xTaskHandle xHandle;\r
+ TaskHandle_t xHandle;\r
\r
// Create a task, storing the handle.\r
xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\r
* \defgroup uxTaskPriorityGet uxTaskPriorityGet\r
* \ingroup TaskCtrl\r
*/\r
-unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle xTask ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>eTaskState eTaskGetState( xTaskHandle xTask );</pre>\r
+ * <pre>eTaskState eTaskGetState( TaskHandle_t xTask );</pre>\r
*\r
* INCLUDE_eTaskGetState must be defined as 1 for this function to be available.\r
* See the configuration section for more information.\r
* state of the task might change between the function being called, and the\r
* functions return value being tested by the calling task.\r
*/\r
-eTaskState eTaskGetState( xTaskHandle xTask ) PRIVILEGED_FUNCTION;\r
+eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>void vTaskPrioritySet( xTaskHandle xTask, unsigned portBASE_TYPE uxNewPriority );</pre>\r
+ * <pre>void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );</pre>\r
*\r
* INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.\r
* See the configuration section for more information.\r
<pre>\r
void vAFunction( void )\r
{\r
- xTaskHandle xHandle;\r
+ TaskHandle_t xHandle;\r
\r
// Create a task, storing the handle.\r
xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\r
* \defgroup vTaskPrioritySet vTaskPrioritySet\r
* \ingroup TaskCtrl\r
*/\r
-void vTaskPrioritySet( xTaskHandle xTask, unsigned portBASE_TYPE uxNewPriority ) PRIVILEGED_FUNCTION;\r
+void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>void vTaskSuspend( xTaskHandle xTaskToSuspend );</pre>\r
+ * <pre>void vTaskSuspend( TaskHandle_t xTaskToSuspend );</pre>\r
*\r
* INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.\r
* See the configuration section for more information.\r
<pre>\r
void vAFunction( void )\r
{\r
- xTaskHandle xHandle;\r
+ TaskHandle_t xHandle;\r
\r
// Create a task, storing the handle.\r
xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\r
* \defgroup vTaskSuspend vTaskSuspend\r
* \ingroup TaskCtrl\r
*/\r
-void vTaskSuspend( xTaskHandle xTaskToSuspend ) PRIVILEGED_FUNCTION;\r
+void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>void vTaskResume( xTaskHandle xTaskToResume );</pre>\r
+ * <pre>void vTaskResume( TaskHandle_t xTaskToResume );</pre>\r
*\r
* INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.\r
* See the configuration section for more information.\r
<pre>\r
void vAFunction( void )\r
{\r
- xTaskHandle xHandle;\r
+ TaskHandle_t xHandle;\r
\r
// Create a task, storing the handle.\r
xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\r
* \defgroup vTaskResume vTaskResume\r
* \ingroup TaskCtrl\r
*/\r
-void vTaskResume( xTaskHandle xTaskToResume ) PRIVILEGED_FUNCTION;\r
+void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>void xTaskResumeFromISR( xTaskHandle xTaskToResume );</pre>\r
+ * <pre>void xTaskResumeFromISR( TaskHandle_t xTaskToResume );</pre>\r
*\r
* INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be\r
* available. See the configuration section for more information.\r
* \defgroup vTaskResumeFromISR vTaskResumeFromISR\r
* \ingroup TaskCtrl\r
*/\r
-portBASE_TYPE xTaskResumeFromISR( xTaskHandle xTaskToResume ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;\r
\r
/*-----------------------------------------------------------\r
* SCHEDULER CONTROL\r
\r
/**\r
* task. h\r
- * <pre>char xTaskResumeAll( void );</pre>\r
+ * <pre>BaseType_t xTaskResumeAll( void );</pre>\r
*\r
* Resumes scheduler activity after it was suspended by a call to\r
* vTaskSuspendAll().\r
* \defgroup xTaskResumeAll xTaskResumeAll\r
* \ingroup SchedulerControl\r
*/\r
-signed portBASE_TYPE xTaskResumeAll( void ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <pre>signed portBASE_TYPE xTaskIsTaskSuspended( const xTaskHandle xTask );</pre>\r
+ * <pre>BaseType_t xTaskIsTaskSuspended( const TaskHandle_t xTask );</pre>\r
*\r
* Utility task that simply returns pdTRUE if the task referenced by xTask is\r
* currently in the Suspended state, or pdFALSE if the task referenced by xTask\r
* is in any other state.\r
*\r
*/\r
-signed portBASE_TYPE xTaskIsTaskSuspended( const xTaskHandle xTask ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskIsTaskSuspended( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\r
\r
/*-----------------------------------------------------------\r
* TASK UTILITIES\r
\r
/**\r
* task. h\r
- * <PRE>portTickType xTaskGetTickCount( void );</PRE>\r
+ * <PRE>TickType_t xTaskGetTickCount( void );</PRE>\r
*\r
* @return The count of ticks since vTaskStartScheduler was called.\r
*\r
* \defgroup xTaskGetTickCount xTaskGetTickCount\r
* \ingroup TaskUtils\r
*/\r
-portTickType xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;\r
+TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <PRE>portTickType xTaskGetTickCountFromISR( void );</PRE>\r
+ * <PRE>TickType_t xTaskGetTickCountFromISR( void );</PRE>\r
*\r
* @return The count of ticks since vTaskStartScheduler was called.\r
*\r
* This is a version of xTaskGetTickCount() that is safe to be called from an\r
- * ISR - provided that portTickType is the natural word size of the\r
+ * ISR - provided that TickType_t is the natural word size of the\r
* microcontroller being used or interrupt nesting is either not supported or\r
* not being used.\r
*\r
* \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR\r
* \ingroup TaskUtils\r
*/\r
-portTickType xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;\r
+TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <PRE>unsigned short uxTaskGetNumberOfTasks( void );</PRE>\r
+ * <PRE>uint16_t uxTaskGetNumberOfTasks( void );</PRE>\r
*\r
* @return The number of tasks that the real time kernel is currently managing.\r
* This includes all ready, blocked and suspended tasks. A task that\r
* \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks\r
* \ingroup TaskUtils\r
*/\r
-unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task. h\r
- * <PRE>char *pcTaskGetTaskName( xTaskHandle xTaskToQuery );</PRE>\r
+ * <PRE>char *pcTaskGetTaskName( TaskHandle_t xTaskToQuery );</PRE>\r
*\r
* @return The text (human readable) name of the task referenced by the handle\r
* xTaskToQuery. A task can query its own name by either passing in its own\r
* \defgroup pcTaskGetTaskName pcTaskGetTaskName\r
* \ingroup TaskUtils\r
*/\r
-char *pcTaskGetTaskName( xTaskHandle xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+char *pcTaskGetTaskName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
\r
/**\r
* task.h\r
- * <PRE>unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask );</PRE>\r
+ * <PRE>UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );</PRE>\r
*\r
* INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for\r
* this function to be available.\r
* actual spaces on the stack rather than bytes) since the task referenced by\r
* xTask was created.\r
*/\r
-unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\r
\r
/* When using trace macros it is sometimes necessary to include task.h before\r
FreeRTOS.h. When this is done pdTASK_HOOK_CODE will not yet have been defined,\r
#if configUSE_APPLICATION_TASK_TAG == 1\r
/**\r
* task.h\r
- * <pre>void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction );</pre>\r
+ * <pre>void vTaskSetApplicationTaskTag( TaskHandle_t xTask, pdTASK_HOOK_CODE pxHookFunction );</pre>\r
*\r
* Sets pxHookFunction to be the task hook function used by the task xTask.\r
* Passing xTask as NULL has the effect of setting the calling tasks hook\r
* function.\r
*/\r
- void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction ) PRIVILEGED_FUNCTION;\r
+ void vTaskSetApplicationTaskTag( TaskHandle_t xTask, pdTASK_HOOK_CODE pxHookFunction ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* task.h\r
- * <pre>void xTaskGetApplicationTaskTag( xTaskHandle xTask );</pre>\r
+ * <pre>void xTaskGetApplicationTaskTag( TaskHandle_t xTask );</pre>\r
*\r
* Returns the pxHookFunction value assigned to the task xTask.\r
*/\r
- pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( xTaskHandle xTask ) PRIVILEGED_FUNCTION;\r
+ pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\r
#endif /* configUSE_APPLICATION_TASK_TAG ==1 */\r
#endif /* ifdef configUSE_APPLICATION_TASK_TAG */\r
\r
/**\r
* task.h\r
- * <pre>portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );</pre>\r
+ * <pre>BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );</pre>\r
*\r
* Calls the hook function associated with xTask. Passing xTask as NULL has\r
* the effect of calling the Running tasks (the calling task) hook function.\r
* wants. The return value is the value returned by the task hook function\r
* registered by the user.\r
*/\r
-portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) PRIVILEGED_FUNCTION;\r
\r
/**\r
* xTaskGetIdleTaskHandle() is only available if\r
* Simply returns the handle of the idle task. It is not valid to call\r
* xTaskGetIdleTaskHandle() before the scheduler has been started.\r
*/\r
-xTaskHandle xTaskGetIdleTaskHandle( void );\r
+TaskHandle_t xTaskGetIdleTaskHandle( void );\r
\r
/**\r
* configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for\r
* uxTaskGetSystemState() to be available.\r
*\r
- * uxTaskGetSystemState() populates an xTaskStatusType structure for each task in\r
- * the system. xTaskStatusType structures contain, among other things, members\r
+ * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in\r
+ * the system. TaskStatus_t structures contain, among other things, members\r
* for the task handle, task name, task priority, task state, and total amount\r
- * of run time consumed by the task. See the xTaskStatusType structure\r
+ * of run time consumed by the task. See the TaskStatus_t structure\r
* definition in this file for the full member list.\r
*\r
* NOTE: This function is intended for debugging use only as its use results in\r
* the scheduler remaining suspended for an extended period.\r
*\r
- * @param pxTaskStatusArray A pointer to an array of xTaskStatusType structures.\r
- * The array must contain at least one xTaskStatusType structure for each task\r
+ * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures.\r
+ * The array must contain at least one TaskStatus_t structure for each task\r
* that is under the control of the RTOS. The number of tasks under the control\r
* of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function.\r
*\r
* @param uxArraySize The size of the array pointed to by the pxTaskStatusArray\r
* parameter. The size is specified as the number of indexes in the array, or\r
- * the number of xTaskStatusType structures contained in the array, not by the\r
+ * the number of TaskStatus_t structures contained in the array, not by the\r
* number of bytes in the array.\r
*\r
* @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in\r
* http://www.freertos.org/rtos-run-time-stats.html) since the target booted.\r
* pulTotalRunTime can be set to NULL to omit the total run time information.\r
*\r
- * @return The number of xTaskStatusType structures that were populated by\r
+ * @return The number of TaskStatus_t structures that were populated by\r
* uxTaskGetSystemState(). This should equal the number returned by the\r
* uxTaskGetNumberOfTasks() API function, but will be zero if the value passed\r
* in the uxArraySize parameter was too small.\r
// The human readable table is written to pcWriteBuffer\r
void vTaskGetRunTimeStats( char *pcWriteBuffer )\r
{\r
- xTaskStatusType *pxTaskStatusArray;\r
- volatile unsigned portBASE_TYPE uxArraySize, x;\r
- unsigned long ulTotalRunTime, ulStatsAsPercentage;\r
+ TaskStatus_t *pxTaskStatusArray;\r
+ volatile UBaseType_t uxArraySize, x;\r
+ uint32_t ulTotalRunTime, ulStatsAsPercentage;\r
\r
// Make sure the write buffer does not contain a string.\r
*pcWriteBuffer = 0x00;\r
// function is executing.\r
uxArraySize = uxTaskGetNumberOfTasks();\r
\r
- // Allocate a xTaskStatusType structure for each task. An array could be\r
+ // Allocate a TaskStatus_t structure for each task. An array could be\r
// allocated statically at compile time.\r
- pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( xTaskStatusType ) );\r
+ pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );\r
\r
if( pxTaskStatusArray != NULL )\r
{\r
}\r
</pre>\r
*/\r
-unsigned portBASE_TYPE uxTaskGetSystemState( xTaskStatusType * const pxTaskStatusArray, const unsigned portBASE_TYPE uxArraySize, unsigned long * const pulTotalRunTime );\r
+UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime );\r
\r
/**\r
* task. h\r
* + Time slicing is in use and there is a task of equal priority to the\r
* currently running task.\r
*/\r
-portBASE_TYPE xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN\r
* portTICK_RATE_MS can be used to convert kernel ticks into a real time\r
* period.\r
*/\r
-void vTaskPlaceOnEventList( xList * const pxEventList, const portTickType xTicksToWait ) PRIVILEGED_FUNCTION;\r
-void vTaskPlaceOnUnorderedEventList( xList * pxEventList, const portTickType xItemValue, const portTickType xTicksToWait ) PRIVILEGED_FUNCTION;\r
+void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\r
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN\r
* indefinitely, whereas vTaskPlaceOnEventList() does.\r
*\r
*/\r
-void vTaskPlaceOnEventListRestricted( xList * const pxEventList, const portTickType xTicksToWait ) PRIVILEGED_FUNCTION;\r
+void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN\r
* @return pdTRUE if the task being removed has a higher priority than the task\r
* making the call, otherwise pdFALSE.\r
*/\r
-signed portBASE_TYPE xTaskRemoveFromEventList( const xList * const pxEventList ) PRIVILEGED_FUNCTION;\r
-signed portBASE_TYPE xTaskRemoveFromUnorderedEventList( xListItem * pxEventListItem, const portTickType xItemValue ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY\r
* THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE. THEY ARE USED BY\r
* THE EVENT BITS MODULE.\r
*/\r
-portTickType uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;\r
+TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Return the handle of the calling task.\r
*/\r
-xTaskHandle xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;\r
+TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Capture the current time status for future reference.\r
*/\r
-void vTaskSetTimeOutState( xTimeOutType * const pxTimeOut ) PRIVILEGED_FUNCTION;\r
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Compare the time status now with that previously captured to see if the\r
* timeout has expired.\r
*/\r
-portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType * const pxTimeOut, portTickType * const pxTicksToWait ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Shortcut used by the queue implementation to prevent unnecessary call to\r
* Returns the scheduler state as taskSCHEDULER_RUNNING,\r
* taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.\r
*/\r
-portBASE_TYPE xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Raises the priority of the mutex holder to that of the calling task should\r
* the mutex holder have a priority less than the calling task.\r
*/\r
-void vTaskPriorityInherit( xTaskHandle const pxMutexHolder ) PRIVILEGED_FUNCTION;\r
+void vTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Set the priority of a task back to its proper priority in the case that it\r
* inherited a higher priority while it was holding a semaphore.\r
*/\r
-void vTaskPriorityDisinherit( xTaskHandle const pxMutexHolder ) PRIVILEGED_FUNCTION;\r
+void vTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Generic version of the task creation function which is in turn called by the\r
* xTaskCreate() and xTaskCreateRestricted() macros.\r
*/\r
-signed portBASE_TYPE xTaskGenericCreate( pdTASK_CODE pxTaskCode, const char * const pcName, const unsigned short usStackDepth, void * const pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle * const pxCreatedTask, portSTACK_TYPE * const puxStackBuffer, const xMemoryRegion * const xRegions ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+BaseType_t xTaskGenericCreate( pdTASK_CODE pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, StackType_t * const puxStackBuffer, const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
\r
/*\r
* Get the uxTCBNumber assigned to the task referenced by the xTask parameter.\r
*/\r
-unsigned portBASE_TYPE uxTaskGetTaskNumber( xTaskHandle xTask ) PRIVILEGED_FUNCTION;\r
+UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Set the uxTaskNumber of the task referenced by the xTask parameter to\r
* uxHandle.\r
*/\r
-void vTaskSetTaskNumber( xTaskHandle xTask, const unsigned portBASE_TYPE uxHandle ) PRIVILEGED_FUNCTION;\r
+void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Only available when configUSE_TICKLESS_IDLE is set to 1.\r
* to date with the actual execution time by being skipped forward by a time\r
* equal to the idle period.\r
*/\r
-void vTaskStepTick( const portTickType xTicksToJump ) PRIVILEGED_FUNCTION;\r
+void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Only avilable when configUSE_TICKLESS_IDLE is set to 1.\r
/* IDs for commands that can be sent/received on the timer queue. These are to\r
be used solely through the macros that make up the public software timer API,\r
as defined below. */\r
-#define tmrCOMMAND_EXECUTE_CALLBACK ( ( portBASE_TYPE ) -1 )\r
-#define tmrCOMMAND_START ( ( portBASE_TYPE ) 0 )\r
-#define tmrCOMMAND_STOP ( ( portBASE_TYPE ) 1 )\r
-#define tmrCOMMAND_CHANGE_PERIOD ( ( portBASE_TYPE ) 2 )\r
-#define tmrCOMMAND_DELETE ( ( portBASE_TYPE ) 3 )\r
+#define tmrCOMMAND_EXECUTE_CALLBACK ( ( BaseType_t ) -1 )\r
+#define tmrCOMMAND_START ( ( BaseType_t ) 0 )\r
+#define tmrCOMMAND_STOP ( ( BaseType_t ) 1 )\r
+#define tmrCOMMAND_CHANGE_PERIOD ( ( BaseType_t ) 2 )\r
+#define tmrCOMMAND_DELETE ( ( BaseType_t ) 3 )\r
\r
/**\r
* Type by which software timers are referenced. For example, a call to\r
- * xTimerCreate() returns an xTimerHandle variable that can then be used to\r
+ * xTimerCreate() returns an TimerHandle_t variable that can then be used to\r
* reference the subject timer in calls to other software timer API functions\r
* (for example, xTimerStart(), xTimerReset(), etc.).\r
*/\r
-typedef void * xTimerHandle;\r
+typedef void * TimerHandle_t;\r
\r
/* Define the prototype to which timer callback functions must conform. */\r
-typedef void (*tmrTIMER_CALLBACK)( xTimerHandle xTimer );\r
+typedef void (*tmrTIMER_CALLBACK)( TimerHandle_t xTimer );\r
\r
/**\r
- * xTimerHandle xTimerCreate( const char * const pcTimerName,\r
- * portTickType xTimerPeriodInTicks,\r
- * unsigned portBASE_TYPE uxAutoReload,\r
+ * TimerHandle_t xTimerCreate( const char * const pcTimerName,\r
+ * TickType_t xTimerPeriodInTicks,\r
+ * UBaseType_t uxAutoReload,\r
* void * pvTimerID,\r
* tmrTIMER_CALLBACK pxCallbackFunction );\r
*\r
*\r
* Timers are created in the dormant state. The xTimerStart(), xTimerReset(),\r
* xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and\r
- * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the\r
- * active state.\r
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a\r
+ * timer into the active state.\r
*\r
* @param pcTimerName A text name that is assigned to the timer. This is done\r
- * purely to assist debugging. The kernel itself only ever references a timer by\r
- * its handle, and never by its name.\r
+ * purely to assist debugging. The kernel itself only ever references a timer\r
+ * by its handle, and never by its name.\r
*\r
- * @param xTimerPeriodInTicks The timer period. The time is defined in tick periods so\r
- * the constant portTICK_RATE_MS can be used to convert a time that has been\r
- * specified in milliseconds. For example, if the timer must expire after 100\r
- * ticks, then xTimerPeriodInTicks should be set to 100. Alternatively, if the timer\r
- * must expire after 500ms, then xPeriod can be set to ( 500 / portTICK_RATE_MS )\r
- * provided configTICK_RATE_HZ is less than or equal to 1000.\r
+ * @param xTimerPeriodInTicks The timer period. The time is defined in tick\r
+ * periods so the constant portTICK_RATE_MS can be used to convert a time that\r
+ * has been specified in milliseconds. For example, if the timer must expire\r
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.\r
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set\r
+ * to ( 500 / portTICK_RATE_MS ) provided configTICK_RATE_HZ is less than or\r
+ * equal to 1000.\r
*\r
* @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will\r
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter. If\r
- * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and\r
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.\r
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and\r
* enter the dormant state after it expires.\r
*\r
* @param pvTimerID An identifier that is assigned to the timer being created.\r
*\r
* @param pxCallbackFunction The function to call when the timer expires.\r
* Callback functions must have the prototype defined by tmrTIMER_CALLBACK,\r
- * which is "void vCallbackFunction( xTimerHandle xTimer );".\r
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".\r
*\r
* @return If the timer is successfully created then a handle to the newly\r
* created timer is returned. If the timer cannot be created (because either\r
* #define NUM_TIMERS 5\r
*\r
* // An array to hold handles to the created timers.\r
- * xTimerHandle xTimers[ NUM_TIMERS ];\r
+ * TimerHandle_t xTimers[ NUM_TIMERS ];\r
*\r
* // An array to hold a count of the number of times each timer expires.\r
- * long lExpireCounters[ NUM_TIMERS ] = { 0 };\r
+ * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };\r
*\r
* // Define a callback function that will be used by multiple timer instances.\r
* // The callback function does nothing but count the number of times the\r
* // associated timer expires, and stop the timer once the timer has expired\r
* // 10 times.\r
- * void vTimerCallback( xTimerHandle pxTimer )\r
+ * void vTimerCallback( TimerHandle_t pxTimer )\r
* {\r
- * long lArrayIndex;\r
- * const long xMaxExpiryCountBeforeStopping = 10;\r
+ * int32_t lArrayIndex;\r
+ * const int32_t xMaxExpiryCountBeforeStopping = 10;\r
*\r
* // Optionally do something if the pxTimer parameter is NULL.\r
* configASSERT( pxTimer );\r
*\r
* // Which timer expired?\r
- * lArrayIndex = ( long ) pvTimerGetTimerID( pxTimer );\r
+ * lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );\r
*\r
* // Increment the number of times that pxTimer has expired.\r
* lExpireCounters[ lArrayIndex ] += 1;\r
*\r
* void main( void )\r
* {\r
- * long x;\r
+ * int32_t x;\r
*\r
* // Create then start some timers. Starting the timers before the scheduler\r
* // has been started means the timers will start running immediately that\r
* // the scheduler starts.\r
* for( x = 0; x < NUM_TIMERS; x++ )\r
* {\r
- * xTimers[ x ] = xTimerCreate( "Timer", // Just a text name, not used by the kernel.\r
- * ( 100 * x ), // The timer period in ticks.\r
- * pdTRUE, // The timers will auto-reload themselves when they expire.\r
- * ( void * ) x, // Assign each timer a unique id equal to its array index.\r
- * vTimerCallback // Each timer calls the same callback when it expires.\r
+ * xTimers[ x ] = xTimerCreate( "Timer", // Just a text name, not used by the kernel.\r
+ * ( 100 * x ), // The timer period in ticks.\r
+ * pdTRUE, // The timers will auto-reload themselves when they expire.\r
+ * ( void * ) x, // Assign each timer a unique id equal to its array index.\r
+ * vTimerCallback // Each timer calls the same callback when it expires.\r
* );\r
*\r
* if( xTimers[ x ] == NULL )\r
* }\r
* @endverbatim\r
*/\r
-xTimerHandle xTimerCreate( const char * const pcTimerName, const portTickType xTimerPeriodInTicks, const unsigned portBASE_TYPE uxAutoReload, void * const pvTimerID, tmrTIMER_CALLBACK pxCallbackFunction ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+TimerHandle_t xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, tmrTIMER_CALLBACK pxCallbackFunction ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
\r
/**\r
- * void *pvTimerGetTimerID( xTimerHandle xTimer );\r
+ * void *pvTimerGetTimerID( TimerHandle_t xTimer );\r
*\r
* Returns the ID assigned to the timer.\r
*\r
*\r
* See the xTimerCreate() API function example usage scenario.\r
*/\r
-void *pvTimerGetTimerID( xTimerHandle xTimer ) PRIVILEGED_FUNCTION;\r
+void *pvTimerGetTimerID( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;\r
\r
/**\r
- * portBASE_TYPE xTimerIsTimerActive( xTimerHandle xTimer );\r
+ * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );\r
*\r
* Queries a timer to see if it is active or dormant.\r
*\r
* Example usage:\r
* @verbatim\r
* // This function assumes xTimer has already been created.\r
- * void vAFunction( xTimerHandle xTimer )\r
+ * void vAFunction( TimerHandle_t xTimer )\r
* {\r
* if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"\r
* {\r
* }\r
* @endverbatim\r
*/\r
-portBASE_TYPE xTimerIsTimerActive( xTimerHandle xTimer ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;\r
\r
/**\r
- * xTaskHandle xTimerGetTimerDaemonTaskHandle( void );\r
+ * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );\r
*\r
* xTimerGetTimerDaemonTaskHandle() is only available if\r
* INCLUDE_xTimerGetTimerDaemonTaskHandle is set to 1 in FreeRTOSConfig.h.\r
* Simply returns the handle of the timer service/daemon task. It it not valid\r
* to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.\r
*/\r
-xTaskHandle xTimerGetTimerDaemonTaskHandle( void );\r
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );\r
\r
/**\r
- * portBASE_TYPE xTimerStart( xTimerHandle xTimer, portTickType xBlockTime );\r
+ * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xBlockTime );\r
*\r
* Timer functionality is provided by a timer service/daemon task. Many of the\r
* public FreeRTOS timer API functions send commands to the timer service task\r
#define xTimerStart( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xBlockTime ) )\r
\r
/**\r
- * portBASE_TYPE xTimerStop( xTimerHandle xTimer, portTickType xBlockTime );\r
+ * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xBlockTime );\r
*\r
* Timer functionality is provided by a timer service/daemon task. Many of the\r
* public FreeRTOS timer API functions send commands to the timer service task\r
#define xTimerStop( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xBlockTime ) )\r
\r
/**\r
- * portBASE_TYPE xTimerChangePeriod( xTimerHandle xTimer,\r
- * portTickType xNewPeriod,\r
- * portTickType xBlockTime );\r
+ * BaseType_t xTimerChangePeriod( TimerHandle_t xTimer,\r
+ * TickType_t xNewPeriod,\r
+ * TickType_t xBlockTime );\r
*\r
* Timer functionality is provided by a timer service/daemon task. Many of the\r
* public FreeRTOS timer API functions send commands to the timer service task\r
* // is deleted. If the timer referenced by xTimer is not active when it is\r
* // called, then the period of the timer is set to 500ms and the timer is\r
* // started.\r
- * void vAFunction( xTimerHandle xTimer )\r
+ * void vAFunction( TimerHandle_t xTimer )\r
* {\r
* if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"\r
* {\r
#define xTimerChangePeriod( xTimer, xNewPeriod, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xBlockTime ) )\r
\r
/**\r
- * portBASE_TYPE xTimerDelete( xTimerHandle xTimer, portTickType xBlockTime );\r
+ * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xBlockTime );\r
*\r
* Timer functionality is provided by a timer service/daemon task. Many of the\r
* public FreeRTOS timer API functions send commands to the timer service task\r
#define xTimerDelete( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xBlockTime ) )\r
\r
/**\r
- * portBASE_TYPE xTimerReset( xTimerHandle xTimer, portTickType xBlockTime );\r
+ * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xBlockTime );\r
*\r
* Timer functionality is provided by a timer service/daemon task. Many of the\r
* public FreeRTOS timer API functions send commands to the timer service task\r
* // without a key being pressed, then the LCD back-light is switched off. In\r
* // this case, the timer is a one-shot timer.\r
*\r
- * xTimerHandle xBacklightTimer = NULL;\r
+ * TimerHandle_t xBacklightTimer = NULL;\r
*\r
* // The callback function assigned to the one-shot timer. In this case the\r
* // parameter is not used.\r
- * void vBacklightTimerCallback( xTimerHandle pxTimer )\r
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )\r
* {\r
* // The timer expired, therefore 5 seconds must have passed since a key\r
* // was pressed. Switch off the LCD back-light.\r
*\r
* void main( void )\r
* {\r
- * long x;\r
+ * int32_t x;\r
*\r
* // Create then start the one-shot timer that is responsible for turning\r
* // the back-light off if no keys are pressed within a 5 second period.\r
#define xTimerReset( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xBlockTime ) )\r
\r
/**\r
- * portBASE_TYPE xTimerStartFromISR( xTimerHandle xTimer,\r
- * portBASE_TYPE *pxHigherPriorityTaskWoken );\r
+ * BaseType_t xTimerStartFromISR( TimerHandle_t xTimer,\r
+ * BaseType_t *pxHigherPriorityTaskWoken );\r
*\r
* A version of xTimerStart() that can be called from an interrupt service\r
* routine.\r
* successfully sent to the timer command queue. When the command is actually\r
* processed will depend on the priority of the timer service/daemon task\r
* relative to other tasks in the system, although the timers expiry time is\r
- * relative to when xTimerStartFromISR() is actually called. The timer service/daemon\r
- * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.\r
+ * relative to when xTimerStartFromISR() is actually called. The timer\r
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY\r
+ * configuration constant.\r
*\r
* Example usage:\r
* @verbatim\r
*\r
* // The callback function assigned to the one-shot timer. In this case the\r
* // parameter is not used.\r
- * void vBacklightTimerCallback( xTimerHandle pxTimer )\r
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )\r
* {\r
* // The timer expired, therefore 5 seconds must have passed since a key\r
* // was pressed. Switch off the LCD back-light.\r
* // The key press interrupt service routine.\r
* void vKeyPressEventInterruptHandler( void )\r
* {\r
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
*\r
* // Ensure the LCD back-light is on, then restart the timer that is\r
* // responsible for turning the back-light off after 5 seconds of\r
#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )\r
\r
/**\r
- * portBASE_TYPE xTimerStopFromISR( xTimerHandle xTimer,\r
- * portBASE_TYPE *pxHigherPriorityTaskWoken );\r
+ * BaseType_t xTimerStopFromISR( TimerHandle_t xTimer,\r
+ * BaseType_t *pxHigherPriorityTaskWoken );\r
*\r
* A version of xTimerStop() that can be called from an interrupt service\r
* routine.\r
* // The interrupt service routine that stops the timer.\r
* void vAnExampleInterruptServiceRoutine( void )\r
* {\r
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
*\r
* // The interrupt has occurred - simply stop the timer.\r
* // xHigherPriorityTaskWoken was set to pdFALSE where it was defined\r
#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0, ( pxHigherPriorityTaskWoken ), 0U )\r
\r
/**\r
- * portBASE_TYPE xTimerChangePeriodFromISR( xTimerHandle xTimer,\r
- * portTickType xNewPeriod,\r
- * portBASE_TYPE *pxHigherPriorityTaskWoken );\r
+ * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,\r
+ * TickType_t xNewPeriod,\r
+ * BaseType_t *pxHigherPriorityTaskWoken );\r
*\r
* A version of xTimerChangePeriod() that can be called from an interrupt\r
* service routine.\r
* // The interrupt service routine that changes the period of xTimer.\r
* void vAnExampleInterruptServiceRoutine( void )\r
* {\r
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
*\r
* // The interrupt has occurred - change the period of xTimer to 500ms.\r
* // xHigherPriorityTaskWoken was set to pdFALSE where it was defined\r
#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )\r
\r
/**\r
- * portBASE_TYPE xTimerResetFromISR( xTimerHandle xTimer,\r
- * portBASE_TYPE *pxHigherPriorityTaskWoken );\r
+ * BaseType_t xTimerResetFromISR( TimerHandle_t xTimer,\r
+ * BaseType_t *pxHigherPriorityTaskWoken );\r
*\r
* A version of xTimerReset() that can be called from an interrupt service\r
* routine.\r
*\r
* // The callback function assigned to the one-shot timer. In this case the\r
* // parameter is not used.\r
- * void vBacklightTimerCallback( xTimerHandle pxTimer )\r
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )\r
* {\r
* // The timer expired, therefore 5 seconds must have passed since a key\r
* // was pressed. Switch off the LCD back-light.\r
* // The key press interrupt service routine.\r
* void vKeyPressEventInterruptHandler( void )\r
* {\r
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
*\r
* // Ensure the LCD back-light is on, then reset the timer that is\r
* // responsible for turning the back-light off after 5 seconds of\r
\r
\r
/**\r
- * portBASE_TYPE xTimerPendCallbackFromISR( pdAPPLICATION_CALLBACK_CODE pvCallbackFunction,\r
+ * BaseType_t xTimerPendCallbackFromISR( pdAPPLICATION_CALLBACK_CODE pvCallbackFunction,\r
* void *pvParameter1,\r
- * unsigned long ulParameter2,\r
- * portBASE_TYPE *pxHigherPriorityTaskWoken );\r
+ * uint32_t ulParameter2,\r
+ * BaseType_t *pxHigherPriorityTaskWoken );\r
*\r
*\r
* Can be used by interrupt service routines to request that a function (the\r
*\r
* // The callback function that will execute in the context of the daemon task.\r
* // Note callback functions must all use this same prototype.\r
- * void vProcessInterface( void *pvParameter1, unsigned long ulParameter2 )\r
+ * void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )\r
* {\r
- * portBASE_TYPE xInterfaceToService;\r
+ * BaseType_t xInterfaceToService;\r
*\r
* // The interface that requires servicing is passed in the second\r
* // parameter. The first parameter is not used in this case.\r
- * xInterfaceToService = ( portBASE_TYPE ) ulParameter2;\r
+ * xInterfaceToService = ( BaseType_t ) ulParameter2;\r
*\r
* // ...Perform the processing here...\r
* }\r
* // An ISR that receives data packets from multiple interfaces\r
* void vAnISR( void )\r
* {\r
- * portBASE_TYPE xInterfaceToService, xHigherPriorityTaskWoken;\r
+ * BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;\r
*\r
* // Query the hardware to determine which interface needs processing.\r
* xInterfaceToService = prvCheckInterfaces();\r
* // service is passed in the second parameter. The first parameter is\r
* // not used in this case.\r
* xHigherPriorityTaskWoken = pdFALSE;\r
- * xTimerPendCallbackFromISR( vProcessInterface, NULL, ( unsigned long ) xInterfaceToService, &xHigherPriorityTaskWoken );\r
+ * xTimerPendCallbackFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );\r
*\r
* // If xHigherPriorityTaskWoken is now set to pdTRUE then a context\r
* // switch should be requested. The macro used is port specific and will\r
* }\r
* @endverbatim\r
*/\r
-portBASE_TYPE xTimerPendCallbackFromISR( pdAPPLICATION_CALLBACK_CODE pvCallbackFunction, void *pvParameter1, unsigned long ulParameter2, portBASE_TYPE *pxHigherPriorityTaskWoken );\r
+BaseType_t xTimerPendCallbackFromISR( pdAPPLICATION_CALLBACK_CODE pvCallbackFunction, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken );\r
\r
/*\r
* Functions beyond this part are not part of the public API and are intended\r
* for use by the kernel only.\r
*/\r
-portBASE_TYPE xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;\r
-portBASE_TYPE xTimerGenericCommand( xTimerHandle xTimer, const portBASE_TYPE xCommandID, const portTickType xOptionalValue, signed portBASE_TYPE * const pxHigherPriorityTaskWoken, const portTickType xBlockTime ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;\r
+BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xBlockTime ) PRIVILEGED_FUNCTION;\r
\r
#ifdef __cplusplus\r
}\r
* PUBLIC LIST API documented in list.h\r
*----------------------------------------------------------*/\r
\r
-void vListInitialise( xList * const pxList )\r
+void vListInitialise( List_t * const pxList )\r
{\r
/* The list structure contains a list item which is used to mark the\r
end of the list. To initialise the list the list end is inserted\r
as the only list entry. */\r
- pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
+ pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
\r
/* The list end value is the highest possible value in the list to\r
ensure it remains at the end of the list. */\r
\r
/* The list end next and previous pointers point to itself so we know\r
when the list is empty. */\r
- pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
- pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
+ pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
+ pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
\r
- pxList->uxNumberOfItems = ( unsigned portBASE_TYPE ) 0U;\r
+ pxList->uxNumberOfItems = ( UBaseType_t ) 0U;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vListInitialiseItem( xListItem * const pxItem )\r
+void vListInitialiseItem( ListItem_t * const pxItem )\r
{\r
/* Make sure the list item is not recorded as being on a list. */\r
pxItem->pvContainer = NULL;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vListInsertEnd( xList * const pxList, xListItem * const pxNewListItem )\r
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )\r
{\r
-xListItem * const pxIndex = pxList->pxIndex;\r
+ListItem_t * const pxIndex = pxList->pxIndex;\r
\r
/* Insert a new list item into pxList, but rather than sort the list,\r
makes the new list item the last item to be removed by a call to\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vListInsert( xList * const pxList, xListItem * const pxNewListItem )\r
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )\r
{\r
-xListItem *pxIterator;\r
-const portTickType xValueOfInsertion = pxNewListItem->xItemValue;\r
+ListItem_t *pxIterator;\r
+const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;\r
\r
/* Insert the new list item into the list, sorted in xItemValue order.\r
\r
4) Using a queue or semaphore before it has been initialised or\r
before the scheduler has been started (are interrupts firing\r
before vTaskStartScheduler() has been called?).\r
- See http://www.freertos.org/FAQHelp.html for more tips.\r
+ See http://www.freertos.org/FAQHelp.html for more tips, and ensure\r
+ configASSERT() is defined! http://www.freertos.org/a00110.html#configASSERT\r
**********************************************************************/\r
\r
- for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
+ for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */\r
{\r
/* There is nothing to do here, we are just iterating to the\r
wanted insertion position. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxListRemove( xListItem * const pxItemToRemove )\r
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )\r
{\r
/* The list item knows which list it is in. Obtain the list from the list\r
item. */\r
-xList * const pxList = ( xList * ) pxItemToRemove->pvContainer;\r
+List_t * const pxList = ( List_t * ) pxItemToRemove->pvContainer;\r
\r
pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;\r
pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;\r
/*lint -e950 Non ANSI reserved words okay in this file only. */\r
\r
#define portTIMER_EOI_TYPE ( 8 )\r
-#define portRESET_PIC() portOUTPUT_WORD( ( unsigned short ) 0xff22, portTIMER_EOI_TYPE )\r
+#define portRESET_PIC() portOUTPUT_WORD( ( uint16_t ) 0xff22, portTIMER_EOI_TYPE )\r
#define portTIMER_INT_NUMBER 0x12\r
\r
-#define portTIMER_1_CONTROL_REGISTER ( ( unsigned short ) 0xff5e )\r
-#define portTIMER_0_CONTROL_REGISTER ( ( unsigned short ) 0xff56 )\r
-#define portTIMER_INTERRUPT_ENABLE ( ( unsigned short ) 0x2000 )\r
+#define portTIMER_1_CONTROL_REGISTER ( ( uint16_t ) 0xff5e )\r
+#define portTIMER_0_CONTROL_REGISTER ( ( uint16_t ) 0xff56 )\r
+#define portTIMER_INTERRUPT_ENABLE ( ( uint16_t ) 0x2000 )\r
\r
/* Setup the hardware to generate the required tick frequency. */\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz );\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz );\r
\r
/* Set the hardware back to the state as per before the scheduler started. */\r
static void prvExitFunction( void );\r
/*lint -e956 File scopes necessary here. */\r
\r
/* Set true when the vectors are set so the scheduler will service the tick. */\r
-static portBASE_TYPE xSchedulerRunning = pdFALSE;\r
+static BaseType_t xSchedulerRunning = pdFALSE;\r
\r
/* Points to the original routine installed on the vector we use for manual\r
context switches. This is then used to restore the original routine during\r
/*lint +e956 */\r
\r
/*-----------------------------------------------------------*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* This is called with interrupts already disabled. */\r
\r
\r
static void prvExitFunction( void )\r
{\r
-const unsigned short usTimerDisable = 0x0000;\r
-unsigned short usTimer0Control;\r
+const uint16_t usTimerDisable = 0x0000;\r
+uint16_t usTimer0Control;\r
\r
/* Interrupts should be disabled here anyway - but no\r
harm in making sure. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz )\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz )\r
{\r
-const unsigned short usMaxCountRegister = 0xff5a;\r
-const unsigned short usTimerPriorityRegister = 0xff32;\r
-const unsigned short usTimerEnable = 0xC000;\r
-const unsigned short usRetrigger = 0x0001;\r
-const unsigned short usTimerHighPriority = 0x0000;\r
-unsigned short usTimer0Control;\r
+const uint16_t usMaxCountRegister = 0xff5a;\r
+const uint16_t usTimerPriorityRegister = 0xff32;\r
+const uint16_t usTimerEnable = 0xC000;\r
+const uint16_t usRetrigger = 0x0001;\r
+const uint16_t usTimerHighPriority = 0x0000;\r
+uint16_t usTimer0Control;\r
\r
/* ( CPU frequency / 4 ) / clock 2 max count [inpw( 0xff62 ) = 7] */\r
\r
-const unsigned long ulClockFrequency = ( unsigned long ) 0x7f31a0UL;\r
+const uint32_t ulClockFrequency = ( uint32_t ) 0x7f31a0UL;\r
\r
-unsigned long ulTimerCount = ulClockFrequency / ulTickRateHz;\r
+uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz;\r
\r
portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerEnable | portTIMER_INTERRUPT_ENABLE | usRetrigger );\r
- portOUTPUT_WORD( usMaxCountRegister, ( unsigned short ) ulTimerCount );\r
+ portOUTPUT_WORD( usMaxCountRegister, ( uint16_t ) ulTimerCount );\r
portOUTPUT_WORD( usTimerPriorityRegister, usTimerHighPriority );\r
\r
/* Stop the DOS tick - don't do this if you want to maintain a TOD clock. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define PORTMACRO_H\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE long\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
+#define portSTACK_TYPE uint16_t\r
#define portBASE_TYPE portSHORT\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
#define portNOP() __asm{ nop }\r
#define portSTACK_GROWTH ( -1 )\r
#define portSWITCH_INT_NUMBER 0x80\r
-#define portYIELD() __asm{ int portSWITCH_INT_NUMBER } \r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 2\r
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */\r
/*-----------------------------------------------------------*/\r
#define portTIMER_INT_NUMBER 0x08\r
\r
/* Setup hardware for required tick interrupt rate. */\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz );\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz );\r
\r
/* Restore hardware to as it was prior to starting the scheduler. */\r
static void prvExitFunction( void );\r
/*lint -e956 File scopes necessary here. */\r
\r
/* Used to signal when to chain to the DOS tick, and when to just clear the PIC ourselves. */\r
-static short sDOSTickCounter;\r
+static int16_t sDOSTickCounter;\r
\r
/* Set true when the vectors are set so the scheduler will service the tick. */\r
-static portBASE_TYPE xSchedulerRunning = pdFALSE; \r
+static BaseType_t xSchedulerRunning = pdFALSE; \r
\r
/* Points to the original routine installed on the vector we use for manual context switches. This is then used to restore the original routine during prvExitFunction(). */\r
static void ( __interrupt __far *pxOldSwitchISR )(); \r
/*lint +e956 */\r
\r
/*-----------------------------------------------------------*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
pxISR pxOriginalTickISR;\r
\r
--sDOSTickCounter;\r
if( sDOSTickCounter <= 0 )\r
{\r
- sDOSTickCounter = ( short ) portTICKS_PER_DOS_TICK;\r
+ sDOSTickCounter = ( int16_t ) portTICKS_PER_DOS_TICK;\r
__asm{ int portSWITCH_INT_NUMBER + 1 }; \r
}\r
else\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz )\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz )\r
{\r
-const unsigned short usPIT_MODE = ( unsigned short ) 0x43;\r
-const unsigned short usPIT0 = ( unsigned short ) 0x40;\r
-const unsigned long ulPIT_CONST = ( unsigned long ) 1193180UL;\r
-const unsigned short us8254_CTR0_MODE3 = ( unsigned short ) 0x36;\r
-unsigned long ulOutput;\r
+const uint16_t usPIT_MODE = ( uint16_t ) 0x43;\r
+const uint16_t usPIT0 = ( uint16_t ) 0x40;\r
+const uint32_t ulPIT_CONST = ( uint32_t ) 1193180UL;\r
+const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;\r
+uint32_t ulOutput;\r
\r
/* Setup the 8245 to tick at the wanted frequency. */\r
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );\r
ulOutput = ulPIT_CONST / ulTickRateHz;\r
- portOUTPUT_BYTE( usPIT0, ( unsigned short )( ulOutput & ( unsigned long ) 0xff ) );\r
+ portOUTPUT_BYTE( usPIT0, ( uint16_t )( ulOutput & ( uint32_t ) 0xff ) );\r
ulOutput >>= 8;\r
- portOUTPUT_BYTE( usPIT0, ( unsigned short ) ( ulOutput & ( unsigned long ) 0xff ) );\r
+ portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) );\r
}\r
/*-----------------------------------------------------------*/\r
\r
static void prvSetTickFrequencyDefault( void )\r
{\r
-const unsigned short usPIT_MODE = ( unsigned short ) 0x43;\r
-const unsigned short usPIT0 = ( unsigned short ) 0x40;\r
-const unsigned short us8254_CTR0_MODE3 = ( unsigned short ) 0x36;\r
+const uint16_t usPIT_MODE = ( uint16_t ) 0x43;\r
+const uint16_t usPIT0 = ( uint16_t ) 0x40;\r
+const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;\r
\r
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );\r
portOUTPUT_BYTE( usPIT0,0 );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define PORTMACRO_H\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE long\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
+#define portSTACK_TYPE uint16_t\r
#define portBASE_TYPE portSHORT\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
#define portNOP() __asm{ nop }\r
#define portSTACK_GROWTH ( -1 )\r
#define portSWITCH_INT_NUMBER 0x80\r
-#define portYIELD() __asm{ int portSWITCH_INT_NUMBER } \r
+#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }\r
#define portDOS_TICK_RATE ( 18.20648 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
-#define portTICKS_PER_DOS_TICK ( ( unsigned portSHORT ) ( ( ( portDOUBLE ) configTICK_RATE_HZ / portDOS_TICK_RATE ) + 0.5 ) )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portTICKS_PER_DOS_TICK ( ( uint16_t ) ( ( ( portDOUBLE ) configTICK_RATE_HZ / portDOS_TICK_RATE ) + 0.5 ) )\r
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */\r
#define portBYTE_ALIGNMENT ( 2 )\r
/*-----------------------------------------------------------*/\r
#ifndef PORT_ASM_H\r
#define PORT_ASM_H\r
\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
extern void vTaskSwitchContext( void );\r
\r
/*\r
/*-----------------------------------------------------------*/\r
\r
/* See header file for description. */\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE DS_Reg = 0;\r
+StackType_t DS_Reg = 0;\r
\r
/* Place a few bytes of known values on the bottom of the stack.\r
This is just useful for debugging. */\r
/* The remaining registers would be pushed on the stack by our context\r
switch function. These are loaded with values simply to make debugging\r
easier. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xAAAA; /* AX */\r
+ *pxTopOfStack = ( StackType_t ) 0xAAAA; /* AX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BX */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xCCCC; /* CX */\r
+ *pxTopOfStack = ( StackType_t ) 0xCCCC; /* CX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDDDD; /* DX */\r
+ *pxTopOfStack = ( StackType_t ) 0xDDDD; /* DX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xEEEE; /* ES */\r
+ *pxTopOfStack = ( StackType_t ) 0xEEEE; /* ES */\r
pxTopOfStack--;\r
\r
/* We need the true data segment. */\r
\r
*pxTopOfStack = DS_Reg; /* DS */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0123; /* SI */\r
+ *pxTopOfStack = ( StackType_t ) 0x0123; /* SI */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDDDD; /* DI */\r
+ *pxTopOfStack = ( StackType_t ) 0xDDDD; /* DI */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BP */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BP */\r
\r
/*lint +e950 +e611 +e923 */\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Count of the critical section nesting depth. */\r
-unsigned portLONG ulCriticalNesting = 9999;\r
+uint32_t ulCriticalNesting = 9999;\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Registers required to configure the RTI. */\r
-#define portRTI_GCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC00 ) )\r
-#define portRTI_TBCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC04 ) )\r
-#define portRTI_COMPCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC0C ) )\r
-#define portRTI_CNT0_FRC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC10 ) )\r
-#define portRTI_CNT0_UC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC14 ) )\r
-#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC18 ) )\r
-#define portRTI_CNT0_COMP0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC50 ) )\r
-#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC54 ) )\r
-#define portRTI_SETINTENA_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC80 ) )\r
-#define portRTI_CLEARINTENA_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC84 ) )\r
-#define portRTI_INTFLAG_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC88 ) )\r
+#define portRTI_GCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )\r
+#define portRTI_TBCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )\r
+#define portRTI_COMPCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )\r
+#define portRTI_CNT0_FRC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )\r
+#define portRTI_CNT0_UC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )\r
+#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )\r
+#define portRTI_CNT0_COMP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )\r
+#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )\r
+#define portRTI_SETINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )\r
+#define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )\r
+#define portRTI_INTFLAG_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )\r
\r
\r
/* Constants required to set up the initial stack of each task. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1F )\r
-#define portINITIAL_FPSCR ( ( portSTACK_TYPE ) 0x00 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0x04 )\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )\r
+#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
\r
/* The number of words on the stack frame between the saved Top Of Stack and\r
R0 (in which the parameters are passed. */\r
\r
/* Saved as part of the task context. Set to pdFALSE if the task does not\r
require an FPU context. */\r
-unsigned long ulTaskHasFPUContext = 0;\r
+uint32_t ulTaskHasFPUContext = 0;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which is the start of the as\r
the task has not executed yet. The offset is added to make the return\r
address appear as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;\r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
\r
#ifdef portPRELOAD_TASK_REGISTERS\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--;\r
}\r
#else\r
#endif\r
\r
/* Function parameters are passed in R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* Set the status register for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );\r
+ *pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )\r
{\r
/* The task will start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler(void)\r
+BaseType_t xPortStartScheduler(void)\r
{\r
/* Start the timer that generates the tick ISR. */\r
prvSetupTimerInterrupt();\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if (configUSE_16_BIT_TICKS == 1)\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY (portTickType) 0xFFFF\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY (TickType_t) 0xFFFF\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY (portTickType) 0xFFFFFFFFF\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY (TickType_t) 0xFFFFFFFFF\r
#endif\r
\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH (-1)\r
-#define portTICK_RATE_MS ((portTickType) 1000 / configTICK_RATE_HZ)\r
+#define portTICK_RATE_MS ((TickType_t) 1000 / configTICK_RATE_HZ)\r
#define portBYTE_ALIGNMENT 8\r
\r
/* Critical section handling. */\r
#pragma SWI_ALIAS( vPortYield, 0 )\r
extern void vPortYield( void );\r
#define portYIELD() vPortYield()\r
-#define portSYS_SSIR1_REG ( * ( ( volatile unsigned long * ) 0xFFFFFFB0 ) )\r
+#define portSYS_SSIR1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFFB0 ) )\r
#define portSYS_SSIR1_SSKEY ( 0x7500UL )\r
#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; asm( " DSB " ); asm( " ISB " ); }\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ){ portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }\r
\r
/* Constants required for hardware setup. The tick ISR runs off the ACLK,\r
not the MCLK. */\r
-#define portACLK_FREQUENCY_HZ ( ( portTickType ) 32768 )\r
-#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )\r
-#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x08 )\r
+#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )\r
+#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )\r
+#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Each task maintains a count of the critical section nesting depth. Each\r
time a critical section is entered the count is incremented. Each time a\r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as this will cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
\r
*\r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned short *pusTopOfStack;\r
-unsigned long *pulTopOfStack, ulTemp;\r
+uint16_t *pusTopOfStack;\r
+uint32_t *pulTopOfStack, ulTemp;\r
\r
/*\r
Place a few bytes of known values on the bottom of the stack.\r
This is just useful for debugging and can be included if required.\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x3333;\r
+ *pxTopOfStack = ( StackType_t ) 0x3333;\r
pxTopOfStack--;\r
*/\r
\r
/* Data types are need either 16 bits or 32 bits depending on the data \r
and code model used. */\r
- if( sizeof( pxCode ) == sizeof( unsigned short ) )\r
+ if( sizeof( pxCode ) == sizeof( uint16_t ) )\r
{\r
- pusTopOfStack = ( unsigned short * ) pxTopOfStack;\r
- ulTemp = ( unsigned long ) pxCode;\r
- *pusTopOfStack = ( unsigned short ) ulTemp;\r
+ pusTopOfStack = ( uint16_t * ) pxTopOfStack;\r
+ ulTemp = ( uint32_t ) pxCode;\r
+ *pusTopOfStack = ( uint16_t ) ulTemp;\r
}\r
else\r
{\r
/* Make room for a 20 bit value stored as a 32 bit value. */\r
- pusTopOfStack = ( unsigned short * ) pxTopOfStack; \r
+ pusTopOfStack = ( uint16_t * ) pxTopOfStack; \r
pusTopOfStack--;\r
- pulTopOfStack = ( unsigned long * ) pusTopOfStack;\r
- *pulTopOfStack = ( unsigned long ) pxCode;\r
+ pulTopOfStack = ( uint32_t * ) pusTopOfStack;\r
+ *pulTopOfStack = ( uint32_t ) pxCode;\r
}\r
\r
pusTopOfStack--;\r
*pusTopOfStack = portFLAGS_INT_ENABLED;\r
- pusTopOfStack -= ( sizeof( portSTACK_TYPE ) / 2 );\r
+ pusTopOfStack -= ( sizeof( StackType_t ) / 2 );\r
\r
/* From here on the size of stacked items depends on the memory model. */\r
- pxTopOfStack = ( portSTACK_TYPE * ) pusTopOfStack;\r
+ pxTopOfStack = ( StackType_t * ) pusTopOfStack;\r
\r
/* Next the general purpose registers. */\r
#ifdef PRELOAD_REGISTER_VALUES\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xffff;\r
+ *pxTopOfStack = ( StackType_t ) 0xffff;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xeeee;\r
+ *pxTopOfStack = ( StackType_t ) 0xeeee;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xdddd;\r
+ *pxTopOfStack = ( StackType_t ) 0xdddd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xbbbb;\r
+ *pxTopOfStack = ( StackType_t ) 0xbbbb;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaa;\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaa;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x9999;\r
+ *pxTopOfStack = ( StackType_t ) 0x9999;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x8888;\r
+ *pxTopOfStack = ( StackType_t ) 0x8888;\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555;\r
+ *pxTopOfStack = ( StackType_t ) 0x5555;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x6666;\r
+ *pxTopOfStack = ( StackType_t ) 0x6666;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555;\r
+ *pxTopOfStack = ( StackType_t ) 0x5555;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x4444;\r
+ *pxTopOfStack = ( StackType_t ) 0x4444;\r
pxTopOfStack--;\r
#else\r
pxTopOfStack -= 3;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack -= 9;\r
#endif\r
\r
/* A variable is used to keep track of the critical section nesting.\r
This variable has to be stored as part of the task context and is\r
initially set to zero. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
be stored in the task control block for the task. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
/* The stack type changes depending on the data model. */\r
#ifdef __LARGE_DATA_MODEL__\r
- #define portSTACK_TYPE unsigned long\r
+ #define portSTACK_TYPE uint32_t\r
#else\r
- #define portSTACK_TYPE unsigned short\r
+ #define portSTACK_TYPE uint16_t\r
#endif\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
#define portDISABLE_INTERRUPTS() _disable_interrupt(); _nop()\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile unsigned short usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile unsigned short usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
-#define portNOP() __no_operation() \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portNOP() __no_operation()\r
/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
\r
extern void vTaskSwitchContext( void );\r
#define portYIELD_FROM_ISR( x ) if( x ) vPortYield()\r
- \r
+\r
void vApplicationSetupTimerInterrupt( void );\r
\r
/* sizeof( int ) != sizeof( long ) so a full printf() library is required if\r
#include "task.h"\r
\r
\r
-#define portINITIAL_FORMAT_VECTOR ( ( portSTACK_TYPE ) 0x4000 )\r
+#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )\r
\r
/* Supervisor mode set. */\r
-#define portINITIAL_STATUS_REGISTER ( ( portSTACK_TYPE ) 0x2000)\r
+#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000)\r
\r
/* The clock prescale into the timer peripheral. */\r
-#define portPRESCALE_VALUE ( ( unsigned char ) 10 )\r
+#define portPRESCALE_VALUE ( ( uint8_t ) 10 )\r
\r
/* The clock frequency into the RTC. */\r
-#define portRTC_CLOCK_HZ ( ( unsigned long ) 1000 )\r
+#define portRTC_CLOCK_HZ ( ( uint32_t ) 1000 )\r
\r
asm void interrupt VectorNumber_VL1swi vPortYieldISR( void );\r
static void prvSetupTimerInterrupt( void );\r
\r
/* Used to keep track of the number of nested calls to taskENTER_CRITICAL(). This\r
will be set to 0 prior to the first task being started. */\r
-static unsigned long ulCriticalNesting = 0x9999UL;\r
+static uint32_t ulCriticalNesting = 0x9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
\r
-unsigned long ulOriginalA5;\r
+uint32_t ulOriginalA5;\r
\r
__asm{ MOVE.L A5, ulOriginalA5 };\r
\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+ *pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
pxTopOfStack--;\r
\r
/* Exception stack frame starts with the return address. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
\r
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0; /*FP*/\r
+ *pxTopOfStack = ( StackType_t ) 0x0; /*FP*/\r
pxTopOfStack -= 14; /* A5 to D0. */\r
\r
/* Parameter in A0. */\r
- *( pxTopOfStack + 8 ) = ( portSTACK_TYPE ) pvParameters;\r
+ *( pxTopOfStack + 8 ) = ( StackType_t ) pvParameters;\r
\r
/* A5 must be maintained as it is resurved by the compiler. */\r
*( pxTopOfStack + 13 ) = ulOriginalA5;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
\r
void vPortYieldHandler( void )\r
{\r
-unsigned long ulSavedInterruptMask;\r
+uint32_t ulSavedInterruptMask;\r
\r
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
\r
void interrupt VectorNumber_Vrtc vPortTickISR( void )\r
{\r
-unsigned long ulSavedInterruptMask;\r
+uint32_t ulSavedInterruptMask;\r
\r
/* Clear the interrupt. */\r
RTCSC |= RTCSC_RTIF_MASK;\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 4\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portLONG ulPortSetIPL( unsigned portLONG );\r
+uint32_t ulPortSetIPL( uint32_t );\r
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )\r
\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
\r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void );\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR( void );\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )\r
\r
#include "task.h"\r
\r
\r
-#define portINITIAL_FORMAT_VECTOR ( ( portSTACK_TYPE ) 0x4000 )\r
+#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )\r
\r
/* Supervisor mode set. */\r
-#define portINITIAL_STATUS_REGISTER ( ( portSTACK_TYPE ) 0x2000)\r
+#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000)\r
\r
/* Used to keep track of the number of nested calls to taskENTER_CRITICAL(). This\r
will be set to 0 prior to the first task being started. */\r
-static unsigned long ulCriticalNesting = 0x9999UL;\r
+static uint32_t ulCriticalNesting = 0x9999UL;\r
\r
\r
#define portSAVE_CONTEXT() \\r
\r
/*-----------------------------------------------------------*/\r
\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+ *pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
pxTopOfStack--;\r
\r
/* Exception stack frame starts with the return address. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
\r
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0; /*FP*/\r
+ *pxTopOfStack = ( StackType_t ) 0x0; /*FP*/\r
pxTopOfStack -= 14; /* A5 to D0. */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
\r
void vPortYieldHandler( void )\r
{\r
-unsigned long ulSavedInterruptMask;\r
+uint32_t ulSavedInterruptMask;\r
\r
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
/* Note this will clear all forced interrupts - this is done for speed. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 4\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
-unsigned portLONG ulPortSetIPL( unsigned portLONG );\r
+uint32_t ulPortSetIPL( uint32_t );\r
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )\r
\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
\r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void );\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR( void );\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )\r
\r
start the scheduler directly because the header file containing the \r
xPortStartScheduler() prototype is part of the common kernel code, and \r
therefore cannot use the CODE_SEG pragma. */\r
- static portBASE_TYPE xBankedStartScheduler( void );\r
+ static BaseType_t xBankedStartScheduler( void );\r
\r
#pragma CODE_SEG DEFAULT\r
\r
depth. Each task maintains it's own critical nesting depth variable so \r
uxCriticalNesting is saved and restored from the task stack during a context\r
switch. */\r
-volatile unsigned portBASE_TYPE uxCriticalNesting = 0xff;\r
+volatile UBaseType_t uxCriticalNesting = 0xff;\r
\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* \r
Place a few bytes of known values on the bottom of the stack.\r
This can be uncommented to provide useful stack markers when debugging.\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11;\r
+ *pxTopOfStack = ( StackType_t ) 0x11;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22;\r
+ *pxTopOfStack = ( StackType_t ) 0x22;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x33;\r
+ *pxTopOfStack = ( StackType_t ) 0x33;\r
pxTopOfStack--;\r
*/\r
\r
\r
\r
/* The address of the task function is placed in the stack byte at a time. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 1 );\r
+ *pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 1 );\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 0 );\r
+ *pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 0 );\r
pxTopOfStack--;\r
\r
/* Next are all the registers that form part of the task context. */\r
\r
/* Y register */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xff;\r
+ *pxTopOfStack = ( StackType_t ) 0xff;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xee;\r
+ *pxTopOfStack = ( StackType_t ) 0xee;\r
pxTopOfStack--;\r
\r
/* X register */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xdd;\r
+ *pxTopOfStack = ( StackType_t ) 0xdd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcc;\r
+ *pxTopOfStack = ( StackType_t ) 0xcc;\r
pxTopOfStack--;\r
\r
/* A register contains parameter high byte. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 0 );\r
+ *pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 0 );\r
pxTopOfStack--;\r
\r
/* B register contains parameter low byte. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 1 );\r
+ *pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );\r
pxTopOfStack--;\r
\r
/* CCR: Note that when the task starts interrupts will be enabled since\r
"I" bit of CCR is cleared */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00;\r
+ *pxTopOfStack = ( StackType_t ) 0x00;\r
pxTopOfStack--;\r
\r
#ifdef BANKED_MODEL\r
/* The page of the task. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ( int ) pxCode );\r
+ *pxTopOfStack = ( StackType_t ) ( ( int ) pxCode );\r
pxTopOfStack--;\r
#endif\r
\r
/* Finally the critical nesting depth is initialised with 0 (not within\r
a critical section). */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00;\r
+ *pxTopOfStack = ( StackType_t ) 0x00;\r
\r
return pxTopOfStack;\r
}\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* xPortStartScheduler() does not start the scheduler directly because \r
the header file containing the xPortStartScheduler() prototype is part \r
\r
#pragma CODE_SEG __NEAR_SEG NON_BANKED\r
\r
-static portBASE_TYPE xBankedStartScheduler( void )\r
+static BaseType_t xBankedStartScheduler( void )\r
{\r
/* Configure the timer that will generate the RTOS tick. Interrupts are\r
disabled when this function is called. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define PORTMACRO_H\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portCHAR\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 1\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portYIELD() __asm( "swi" );\r
#define portNOP() __asm( "nop" );\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
-#define portENABLE_INTERRUPTS() __asm( "cli" ) \r
+#define portENABLE_INTERRUPTS() __asm( "cli" )\r
#define portDISABLE_INTERRUPTS() __asm( "sei" )\r
\r
/*\r
*/\r
#define portENTER_CRITICAL() \\r
{ \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
uxCriticalNesting++; \\r
\r
/*\r
* Interrupts are disabled so we can access the nesting count directly. If the\r
- * nesting is found to be 0 (no nesting) then we are leaving the critical \r
+ * nesting is found to be 0 (no nesting) then we are leaving the critical\r
* section and interrupts can be re-enabled.\r
*/\r
#define portEXIT_CRITICAL() \\r
{ \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
uxCriticalNesting--; \\r
if( uxCriticalNesting == 0 ) \\r
\r
/* Task utilities. */\r
\r
-/* \r
- * These macros are very simple as the processor automatically saves and \r
+/*\r
+ * These macros are very simple as the processor automatically saves and\r
* restores its registers as interrupts are entered and exited. In\r
- * addition to the (automatically stacked) registers we also stack the \r
+ * addition to the (automatically stacked) registers we also stack the\r
* critical nesting count. Each task maintains its own critical nesting\r
* count as it is legitimate for a task to yield from within a critical\r
* section. If the banked memory model is being used then the PPAGE\r
*/\r
\r
#ifdef BANKED_MODEL\r
- /* \r
+ /*\r
* Load the stack pointer for the task, then pull the critical nesting\r
- * count and PPAGE register from the stack. The remains of the \r
+ * count and PPAGE register from the stack. The remains of the\r
* context are restored by the RTI instruction.\r
*/\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldx pxCurrentTCB" ); \\r
__asm( "lds 0, x" ); \\r
__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \\r
}\r
\r
- /* \r
+ /*\r
* By the time this macro is called the processor has already stacked the\r
- * registers. Simply stack the nesting count and PPAGE value, then save \r
+ * registers. Simply stack the nesting count and PPAGE value, then save\r
* the task stack pointer.\r
*/\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \\r
__asm( "psha" ); \\r
}\r
#else\r
\r
- /* \r
+ /*\r
* These macros are as per the BANKED versions above, but without saving\r
* and restoring the PPAGE register.\r
*/\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldx pxCurrentTCB" ); \\r
__asm( "lds 0, x" ); \\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldaa uxCriticalNesting" ); \\r
__asm( "psha" ); \\r
#include "tc.h"\r
\r
/* Constants required to setup the task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )\r
#define portTICK_PRIORITY_6 ( 6 )\r
/*-----------------------------------------------------------*/\r
\r
*\r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The last thing onto the stack is the status register, which is set for\r
system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
#ifdef THUMB_INTERWORK\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-volatile unsigned long ulDummy;\r
+volatile uint32_t ulDummy;\r
\r
/* Enable clock to the tick timer... */\r
AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT;\r
#if configUSE_PREEMPTION == 1\r
{\r
extern void ( vPreemptiveTick )( void );\r
- AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vPreemptiveTick;\r
+ AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( uint32_t ) vPreemptiveTick;\r
}\r
#else // else use cooperative scheduler\r
{\r
extern void ( vNonPreemptiveTick )( void );\r
- AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( unsigned long ) vNonPreemptiveTick;\r
+ AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( uint32_t ) vNonPreemptiveTick;\r
}\r
#endif\r
\r
#include "task.h"\r
\r
/* Constants required to handle interrupts. */\r
-#define portCLEAR_AIC_INTERRUPT ( ( unsigned long ) 0 )\r
+#define portCLEAR_AIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));\r
void vNonPreemptiveTick( void )\r
{ \r
- static volatile unsigned long ulDummy;\r
+ static volatile uint32_t ulDummy;\r
\r
/* Clear tick timer interrupt indication. */\r
ulDummy = portTIMER_REG_BASE_PTR->TC_SR; \r
\r
/* WARNING - Do not use local (stack) variables here. Use globals\r
if you must! */\r
- static volatile unsigned long ulDummy;\r
+ static volatile uint32_t ulDummy;\r
\r
/* Clear tick timer interrupt indication. */\r
ulDummy = portTIMER_REG_BASE_PTR->TC_SR; \r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
/*\r
Changes from V3.2.3\r
- \r
+\r
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.\r
\r
Changes from V3.2.4\r
\r
- + Removed the use of the %0 parameter within the assembler macros and \r
+ + Removed the use of the %0 parameter within the assembler macros and\r
replaced them with hard coded registers. This will ensure the\r
assembler does not select the link register as the temp register as\r
was occasionally happening previously.\r
Changes from V4.5.0\r
\r
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros\r
- and replaced them with portYIELD_FROM_ISR() macro. Application code \r
+ and replaced them with portYIELD_FROM_ISR() macro. Application code\r
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()\r
macros as per the V4.5.1 demo code.\r
*/\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm volatile ( "SWI 0" )\r
#define portNOP() asm volatile ( "NOP" )\r
*/\r
#define portTIMER_REG_BASE_PTR AT91C_BASE_TC0\r
#define portTIMER_CLK_ENABLE_BIT AT91C_PS_TC0\r
-#define portTIMER_AIC_CHANNEL ( ( unsigned portLONG ) 4 )\r
-/*-----------------------------------------------------------*/ \r
+#define portTIMER_AIC_CHANNEL ( ( uint32_t ) 4 )\r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Set the LR to the task stack. */ \\r
asm volatile ( \\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Push R0 as we are going to use the register. */ \\r
asm volatile ( \\r
\r
/*\r
* The interrupt management utilities can only be called from ARM mode. When\r
- * THUMB_INTERWORK is defined the utilities are defined as functions in \r
- * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not \r
+ * THUMB_INTERWORK is defined the utilities are defined as functions in\r
+ * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not\r
* defined then the utilities are defined as macros here - as per other ports.\r
*/\r
\r
\r
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()\r
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()\r
- \r
+\r
#else\r
\r
#define portDISABLE_INTERRUPTS() \\r
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \\r
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \\r
"LDMIA SP!, {R0} " ) /* Pop R0. */\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
asm volatile ( \\r
"STMDB SP!, {R0} \n\t" /* Push R0. */ \\r
#define portENTER_CRITICAL() vPortEnterCritical();\r
#define portEXIT_CRITICAL() vPortExitCritical();\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_US_SetIrdaFilter (\r
AT91PS_USART pUSART,\r
- unsigned char value\r
+ uint8_t value\r
)\r
{\r
pUSART->US_IF = value;\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_SetAddress (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char address) // \arg new UDP address\r
+ uint8_t address) // \arg new UDP address\r
{\r
pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EnableEp (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_DisableEp (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpStall(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpWrite(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
- unsigned char value) // \arg value to be written in the DPR\r
+ uint8_t endpoint, // \arg endpoint number\r
+ uint8_t value) // \arg value to be written in the DPR\r
{\r
pUDP->UDP_FDR[endpoint] = value;\r
}\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpRead(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_FDR[endpoint];\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpEndOfWr(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpClear(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] &= ~(flag);\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpSet(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] |= flag;\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpStatus(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_CSR[endpoint];\r
}\r
__inline void AT91F_CAN_CfgMessageIDReg (\r
AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox\r
unsigned int id,\r
- unsigned char version)\r
+ uint8_t version)\r
{\r
if(version==0) // IDvA Standard Format\r
CAN_Mailbox->CAN_MB_MID = id<<18;\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_SetCryptoKey (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_InputData (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int indata\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_AES_GetOutputData (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index\r
+ uint8_t index\r
)\r
{\r
return pAES->AES_ODATAxR[index]; \r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_SetInitializationVector (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int initvector\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey1 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey2 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey3 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_InputData (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int indata\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_TDES_GetOutputData (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index\r
+ uint8_t index\r
)\r
{\r
return pTDES->TDES_ODATAxR[index]; \r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetInitializationVector (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int initvector\r
)\r
{\r
#include "AT91SAM7X256.h"\r
\r
/* Constants required to setup the task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )\r
\r
/* Constants required to setup the tick ISR. */\r
-#define portENABLE_TIMER ( ( unsigned char ) 0x01 )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x01 )\r
#define portPRESCALE_VALUE 0x00\r
-#define portINTERRUPT_ON_MATCH ( ( unsigned long ) 0x01 )\r
-#define portRESET_COUNT_ON_MATCH ( ( unsigned long ) 0x02 )\r
+#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )\r
\r
/* Constants required to setup the PIT. */\r
-#define portPIT_CLOCK_DIVISOR ( ( unsigned long ) 16 )\r
+#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )\r
#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )\r
\r
#define portINT_LEVEL_SENSITIVE 0\r
-#define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )\r
-#define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )\r
+#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )\r
+#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )\r
/*-----------------------------------------------------------*/\r
\r
/* Setup the timer to generate the tick interrupts. */\r
*\r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The last thing onto the stack is the status register, which is set for\r
system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
#ifdef THUMB_INTERWORK\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
#include "AT91SAM7X256.h"\r
\r
/* Constants required to handle interrupts. */\r
-#define portTIMER_MATCH_ISR_BIT ( ( unsigned char ) 0x01 )\r
-#define portCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )\r
+#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));\r
void vNonPreemptiveTick( void )\r
{ \r
- unsigned long ulDummy;\r
+ uint32_t ulDummy;\r
\r
/* Increment the tick count - which may wake some tasks but as the\r
preemptive scheduler is not being used any woken task is not given\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
/*\r
Changes from V3.2.3\r
- \r
+\r
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.\r
\r
Changes from V3.2.4\r
\r
- + Removed the use of the %0 parameter within the assembler macros and \r
+ + Removed the use of the %0 parameter within the assembler macros and\r
replaced them with hard coded registers. This will ensure the\r
assembler does not select the link register as the temp register as\r
was occasionally happening previously.\r
Changes from V4.5.0\r
\r
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros\r
- and replaced them with portYIELD_FROM_ISR() macro. Application code \r
+ and replaced them with portYIELD_FROM_ISR() macro. Application code\r
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()\r
macros as per the V4.5.1 demo code.\r
*/\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE portLONG\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portNOP() asm volatile ( "NOP" );\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Set the LR to the task stack. */ \\r
asm volatile ( \\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Push R0 as we are going to use the register. */ \\r
asm volatile ( \\r
\r
/*\r
* The interrupt management utilities can only be called from ARM mode. When\r
- * THUMB_INTERWORK is defined the utilities are defined as functions in \r
- * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not \r
+ * THUMB_INTERWORK is defined the utilities are defined as functions in\r
+ * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not\r
* defined then the utilities are defined as macros here - as per other ports.\r
*/\r
\r
\r
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()\r
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()\r
- \r
+\r
#else\r
\r
#define portDISABLE_INTERRUPTS() \\r
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \\r
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \\r
"LDMIA SP!, {R0} " ) /* Pop R0. */\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
asm volatile ( \\r
"STMDB SP!, {R0} \n\t" /* Push R0. */ \\r
#include "task.h"\r
\r
/* Constants required to setup the task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )\r
\r
/* Constants required to setup the tick ISR. */\r
-#define portENABLE_TIMER ( ( unsigned char ) 0x01 )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x01 )\r
#define portPRESCALE_VALUE 0x00\r
-#define portINTERRUPT_ON_MATCH ( ( unsigned long ) 0x01 )\r
-#define portRESET_COUNT_ON_MATCH ( ( unsigned long ) 0x02 )\r
+#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )\r
\r
/* Constants required to setup the VIC for the tick ISR. */\r
-#define portTIMER_VIC_CHANNEL ( ( unsigned long ) 0x0004 )\r
-#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0010 )\r
-#define portTIMER_VIC_ENABLE ( ( unsigned long ) 0x0020 )\r
+#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )\r
+#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )\r
+#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )\r
\r
/*-----------------------------------------------------------*/\r
\r
*\r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The last thing onto the stack is the status register, which is set for\r
system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned long ulCompareMatch;\r
+uint32_t ulCompareMatch;\r
extern void ( vTickISR )( void );\r
\r
/* A 1ms tick does not require the use of the timer prescale. This is\r
/* The ISR installed depends on whether the preemptive or cooperative\r
scheduler is being used. */\r
\r
- VICVectAddr0 = ( long ) vTickISR;\r
+ VICVectAddr0 = ( int32_t ) vTickISR;\r
VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;\r
\r
/* Start the timer - interrupts are disabled when this function is called\r
#include "FreeRTOS.h"\r
\r
/* Constants required to handle interrupts. */\r
-#define portTIMER_MATCH_ISR_BIT ( ( unsigned char ) 0x01 )\r
-#define portCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )\r
+#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE portLONG\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portNOP() __asm volatile ( "NOP" );\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Set the LR to the task stack. */ \\r
__asm volatile ( \\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Push R0 as we are going to use the register. */ \\r
__asm volatile ( \\r
\r
/*\r
* The interrupt management utilities can only be called from ARM mode. When\r
- * THUMB_INTERWORK is defined the utilities are defined as functions in \r
- * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not \r
+ * THUMB_INTERWORK is defined the utilities are defined as functions in\r
+ * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not\r
* defined then the utilities are defined as macros here - as per other ports.\r
*/\r
\r
\r
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()\r
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()\r
- \r
+\r
#else\r
\r
#define portDISABLE_INTERRUPTS() \\r
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \\r
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \\r
"LDMIA SP!, {R0} " ) /* Pop R0. */\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
__asm volatile ( \\r
"STMDB SP!, {R0} \n\t" /* Push R0. */ \\r
#include "task.h"\r
\r
/* Constants required to setup the task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )\r
\r
/* Constants required to setup the tick ISR. */\r
-#define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x01 )\r
#define portPRESCALE_VALUE 0x00\r
-#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )\r
-#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )\r
+#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )\r
\r
/* Constants required to setup the VIC for the tick ISR. */\r
-#define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )\r
-#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )\r
-#define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )\r
+#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )\r
+#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )\r
+#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )\r
\r
/*-----------------------------------------------------------*/\r
\r
*\r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The last thing onto the stack is the status register, which is set for\r
system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned portLONG ulCompareMatch;\r
+uint32_t ulCompareMatch;\r
\r
PCLKSEL0 = (PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);\r
T0TCR = 2; /* Stop and reset the timer */\r
#if configUSE_PREEMPTION == 1\r
{\r
extern void ( vPreemptiveTick )( void );\r
- VICVectAddr4 = ( portLONG ) vPreemptiveTick;\r
+ VICVectAddr4 = ( int32_t ) vPreemptiveTick;\r
}\r
#else\r
{\r
extern void ( vNonPreemptiveTick )( void );\r
- VICVectAddr4 = ( portLONG ) vNonPreemptiveTick;\r
+ VICVectAddr4 = ( int32_t ) vNonPreemptiveTick;\r
}\r
#endif\r
\r
#include "task.h"\r
\r
/* Constants required to handle interrupts. */\r
-#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )\r
-#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )\r
+#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )\r
-volatile unsigned portLONG ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
/*\r
Changes from V3.2.3\r
- \r
+\r
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.\r
\r
Changes from V3.2.4\r
\r
- + Removed the use of the %0 parameter within the assembler macros and \r
+ + Removed the use of the %0 parameter within the assembler macros and\r
replaced them with hard coded registers. This will ensure the\r
assembler does not select the link register as the temp register as\r
was occasionally happening previously.\r
Changes from V4.5.0\r
\r
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros\r
- and replaced them with portYIELD_FROM_ISR() macro. Application code \r
+ and replaced them with portYIELD_FROM_ISR() macro. Application code\r
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()\r
macros as per the V4.5.1 demo code.\r
*/\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE portLONG\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portNOP() __asm volatile ( "NOP" );\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Set the LR to the task stack. */ \\r
__asm volatile ( \\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Push R0 as we are going to use the register. */ \\r
__asm volatile ( \\r
\r
/*\r
* The interrupt management utilities can only be called from ARM mode. When\r
- * THUMB_INTERWORK is defined the utilities are defined as functions in \r
- * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not \r
+ * THUMB_INTERWORK is defined the utilities are defined as functions in\r
+ * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not\r
* defined then the utilities are defined as macros here - as per other ports.\r
*/\r
\r
\r
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()\r
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()\r
- \r
+\r
#else\r
\r
#define portDISABLE_INTERRUPTS() \\r
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \\r
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \\r
"LDMIA SP!, {R0} " ) /* Pop R0. */\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
__asm volatile ( \\r
"STMDB SP!, {R0} \n\t" /* Push R0. */ \\r
#include "task.h"\r
\r
/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t *) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t *) 0xe000e014 )\r
+#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )\r
+#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )\r
#define portNVIC_SYSTICK_CLK 0x00000004\r
#define portNVIC_SYSTICK_INT 0x00000002\r
#define portNVIC_SYSTICK_ENABLE 0x00000001\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts.\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) portTASK_RETURN_ADDRESS; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11..R4. */\r
\r
return pxTopOfStack;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned long ulSetInterruptMaskFromISR( void )\r
+uint32_t ulSetInterruptMaskFromISR( void )\r
{\r
__asm volatile(\r
" mrs r0, PRIMASK \n"\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vClearInterruptMaskFromISR( unsigned long ulMask )\r
+void vClearInterruptMaskFromISR( uint32_t ulMask )\r
{\r
__asm volatile(\r
" msr PRIMASK, r0 \n"\r
\r
void xPortSysTickHandler( void )\r
{\r
-unsigned long ulPreviousMask;\r
+uint32_t ulPreviousMask;\r
\r
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/* Critical section management. */\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulSetInterruptMaskFromISR( void ) __attribute__((naked));\r
-extern void vClearInterruptMaskFromISR( unsigned long ulMask ) __attribute__((naked));\r
+extern uint32_t ulSetInterruptMaskFromISR( void ) __attribute__((naked));\r
+extern void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__((naked));\r
\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x )\r
#endif\r
\r
/* Constants required to manipulate the core. Registers first... */\r
-#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
-#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )\r
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )\r
/* ...then bits in the registers. */\r
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )\r
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )\r
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )\r
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )\r
\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
\r
/* Constants required to check the validity of an interrupt priority. */\r
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )\r
-#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
-#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )\r
-#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )\r
-#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )\r
+#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )\r
+#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )\r
+#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )\r
+#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )\r
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )\r
#define portPRIGROUP_SHIFT ( 8UL )\r
\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts. The implementation in this\r
* The number of SysTick increments that make up one tick period.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulTimerCountsForOneTick = 0;\r
+ static uint32_t ulTimerCountsForOneTick = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* 24 bit resolution of the SysTick timer.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* power functionality only.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulStoppedTimerCompensation = 0;\r
+ static uint32_t ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
*/\r
#if ( configASSERT_DEFINED == 1 )\r
- static unsigned char ucMaxSysCallPriority = 0;\r
- static unsigned long ulMaxPRIGROUPValue = 0;\r
- static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
+ static uint8_t ucMaxSysCallPriority = 0;\r
+ static uint32_t ulMaxPRIGROUPValue = 0;\r
+ static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
#endif /* configASSERT_DEFINED */\r
\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) portTASK_RETURN_ADDRESS; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
\r
return pxTopOfStack;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.\r
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
\r
#if( configASSERT_DEFINED == 1 )\r
{\r
- volatile unsigned long ulOriginalPriority;\r
- volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
- volatile unsigned char ucMaxPriorityValue;\r
+ volatile uint32_t ulOriginalPriority;\r
+ volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
+ volatile uint8_t ucMaxPriorityValue;\r
\r
/* Determine the maximum priority from which ISR safe FreeRTOS API\r
functions can be called. ISR safe functions are those that end in\r
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
{\r
ulMaxPRIGROUPValue--;\r
- ucMaxPriorityValue <<= ( unsigned char ) 0x01;\r
+ ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
}\r
\r
/* Shift the priority group value back to its position within the AIRCR\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )\r
+__attribute__(( naked )) uint32_t ulPortSetInterruptMask( void )\r
{\r
__asm volatile \\r
( \\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__attribute__(( naked )) void vPortClearInterruptMask( unsigned long ulNewMaskValue )\r
+__attribute__(( naked )) void vPortClearInterruptMask( uint32_t ulNewMaskValue )\r
{\r
__asm volatile \\r
( \\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- __attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ __attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
- portTickType xModifiableIdleTime;\r
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
+ TickType_t xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
\r
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
- unsigned long ulCalculatedLoadValue;\r
+ uint32_t ulCalculatedLoadValue;\r
\r
/* The tick interrupt has already executed, and the SysTick\r
count reloaded with ulReloadValue. Reset the\r
\r
void vPortValidateInterruptPriority( void )\r
{\r
- unsigned long ulCurrentInterrupt;\r
- unsigned char ucCurrentPriority;\r
+ uint32_t ulCurrentInterrupt;\r
+ uint8_t ucCurrentPriority;\r
\r
/* Obtain the number of the currently executing interrupt. */\r
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/* Critical section management. */\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)\r
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()\r
\r
/* Tickless idle/low power functionality. */\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
/*-----------------------------------------------------------*/\r
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
\r
/* Generic helper function. */\r
- __attribute__( ( always_inline ) ) static inline unsigned char ucPortCountLeadingZeros( unsigned long ulBitmap )\r
+ __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )\r
{\r
- unsigned char ucReturn;\r
+ uint8_t ucReturn;\r
\r
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );\r
return ucReturn;\r
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
\r
/* Constants required to access and manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )\r
-#define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )\r
-#define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )\r
+#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )\r
+#define portNVIC_SYSPRI1 ( ( volatile uint32_t * ) 0xe000ed1c )\r
+#define portNVIC_SYS_CTRL_STATE ( ( volatile uint32_t * ) 0xe000ed24 )\r
#define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )\r
\r
/* Constants required to access and manipulate the MPU. */\r
-#define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )\r
-#define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )\r
-#define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )\r
-#define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )\r
+#define portMPU_TYPE ( ( volatile uint32_t * ) 0xe000ed90 )\r
+#define portMPU_REGION_BASE_ADDRESS ( ( volatile uint32_t * ) 0xe000ed9C )\r
+#define portMPU_REGION_ATTRIBUTE ( ( volatile uint32_t * ) 0xe000edA0 )\r
+#define portMPU_CTRL ( ( volatile uint32_t * ) 0xe000ed94 )\r
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */\r
#define portMPU_ENABLE ( 0x01UL )\r
#define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )\r
#define portNVIC_SYSTICK_CLK ( 0x00000004UL )\r
#define portNVIC_SYSTICK_INT ( 0x00000002UL )\r
#define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
-#define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_SVC_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
\r
/* Constants required to set up the initial stack. */\r
#define portINITIAL_XPSR ( 0x01000000 )\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. Note this is not saved as part of the task context as context\r
switches can only occur when uxCriticalNesting is zero. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts.\r
* into. The region size is returned as the value that should be programmed\r
* into the region attribute register for that region.\r
*/\r
-static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
+static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Checks to see if being called from the context of an unprivileged task, and\r
* if so raises the privilege level and returns false - otherwise does nothing\r
* other than return true.\r
*/\r
-static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
+static BaseType_t prvRaisePrivilege( void ) __attribute__(( naked ));\r
\r
/*\r
* Standard FreeRTOS exception handlers.\r
* C portion of the SVC handler. The SVC handler is split between an asm entry\r
* and a C wrapper for simplicity of coding and maintenance.\r
*/\r
-static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
+static void prvSVCHandler( uint32_t *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Prototypes for all the MPU wrappers.\r
*/\r
-signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );\r
-void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );\r
-void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );\r
-void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );\r
-void MPU_vTaskDelay( portTickType xTicksToDelay );\r
-unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );\r
-void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );\r
-eTaskState MPU_eTaskGetState( xTaskHandle pxTask );\r
-void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );\r
-signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );\r
-void MPU_vTaskResume( xTaskHandle pxTaskToResume );\r
+BaseType_t MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions );\r
+void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions );\r
+void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete );\r
+void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement );\r
+void MPU_vTaskDelay( TickType_t xTicksToDelay );\r
+UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask );\r
+void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority );\r
+eTaskState MPU_eTaskGetState( TaskHandle_t pxTask );\r
+void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend );\r
+BaseType_t MPU_xTaskIsTaskSuspended( TaskHandle_t xTask );\r
+void MPU_vTaskResume( TaskHandle_t pxTaskToResume );\r
void MPU_vTaskSuspendAll( void );\r
-signed portBASE_TYPE MPU_xTaskResumeAll( void );\r
-portTickType MPU_xTaskGetTickCount( void );\r
-unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );\r
+BaseType_t MPU_xTaskResumeAll( void );\r
+TickType_t MPU_xTaskGetTickCount( void );\r
+UBaseType_t MPU_uxTaskGetNumberOfTasks( void );\r
void MPU_vTaskList( char *pcWriteBuffer );\r
void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer );\r
-void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );\r
-pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );\r
-portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );\r
-unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
-xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
-portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
-xTaskHandle MPU_xTaskGetIdleTaskHandle( void );\r
-unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime );\r
-xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );\r
-signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
-portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue );\r
-unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
-signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
-xQueueHandle MPU_xQueueCreateMutex( void );\r
-xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );\r
-portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );\r
-portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );\r
-signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
-signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
-void MPU_vQueueAddToRegistry( xQueueHandle xQueue, char *pcName );\r
-void MPU_vQueueDelete( xQueueHandle xQueue );\r
+void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, pdTASK_HOOK_CODE pxTagValue );\r
+pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask );\r
+BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );\r
+UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask );\r
+TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void );\r
+BaseType_t MPU_xTaskGetSchedulerState( void );\r
+TaskHandle_t MPU_xTaskGetIdleTaskHandle( void );\r
+UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime );\r
+QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType );\r
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );\r
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue );\r
+UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue );\r
+BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );\r
+QueueHandle_t MPU_xQueueCreateMutex( void );\r
+QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount );\r
+BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime );\r
+BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex );\r
+BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );\r
+BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );\r
+void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName );\r
+void MPU_vQueueDelete( QueueHandle_t xQueue );\r
void *MPU_pvPortMalloc( size_t xSize );\r
void MPU_vPortFree( void *pv );\r
void MPU_vPortInitialiseBlocks( void );\r
size_t MPU_xPortGetFreeHeapSize( void );\r
-xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength );\r
-xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks );\r
-portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
-portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet );\r
-signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle xQueue, void * const pvBuffer );\r
+QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength );\r
+QueueSetMember_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks );\r
+BaseType_t MPU_xQueueAddToSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );\r
+BaseType_t MPU_xQueueRemoveFromSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );\r
+BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer );\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, BaseType_t xRunPrivileged )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
*pxTopOfStack = 0; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
\r
if( xRunPrivileged == pdTRUE )\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvSVCHandler( unsigned long *pulParam )\r
+static void prvSVCHandler( uint32_t *pulParam )\r
{\r
-unsigned char ucSVCNumber;\r
+uint8_t ucSVCNumber;\r
\r
/* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
xPSR. The first argument (r0) is pulParam[ 0 ]. */\r
- ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
+ ucSVCNumber = ( ( uint8_t * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
switch( ucSVCNumber )\r
{\r
case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See\r
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
\r
void vPortEnterCritical( void )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
portDISABLE_INTERRUPTS();\r
uxCriticalNesting++;\r
\r
void vPortExitCritical( void )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
configASSERT( uxCriticalNesting );\r
uxCriticalNesting--;\r
\r
void xPortSysTickHandler( void )\r
{\r
-unsigned long ulDummy;\r
+uint32_t ulDummy;\r
\r
ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
\r
static void prvSetupMPU( void )\r
{\r
-extern unsigned long __privileged_functions_end__[];\r
-extern unsigned long __FLASH_segment_start__[];\r
-extern unsigned long __FLASH_segment_end__[];\r
-extern unsigned long __privileged_data_start__[];\r
-extern unsigned long __privileged_data_end__[];\r
+extern uint32_t __privileged_functions_end__[];\r
+extern uint32_t __FLASH_segment_start__[];\r
+extern uint32_t __FLASH_segment_end__[];\r
+extern uint32_t __privileged_data_start__[];\r
+extern uint32_t __privileged_data_end__[];\r
\r
/* Check the expected MPU is present. */\r
if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
{\r
/* First setup the entire flash for unprivileged read only access. */\r
- *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
+ *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */\r
( portMPU_REGION_VALID ) |\r
( portUNPRIVILEGED_FLASH_REGION );\r
\r
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |\r
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
- ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
+ ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |\r
( portMPU_REGION_ENABLE );\r
\r
/* Setup the first 16K for privileged only access (even though less\r
than 10K is actually being used). This is where the kernel code is\r
placed. */\r
- *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
+ *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */\r
( portMPU_REGION_VALID ) |\r
( portPRIVILEGED_FLASH_REGION );\r
\r
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
- ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
+ ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |\r
( portMPU_REGION_ENABLE );\r
\r
/* Setup the privileged data RAM region. This is where the kernel data\r
is placed. */\r
- *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
+ *portMPU_REGION_BASE_ADDRESS = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */\r
( portMPU_REGION_VALID ) |\r
( portPRIVILEGED_RAM_REGION );\r
\r
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
- prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
+ prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |\r
( portMPU_REGION_ENABLE );\r
\r
/* By default allow everything to access the general peripherals. The\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
+static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )\r
{\r
-unsigned long ulRegionSize, ulReturnValue = 4;\r
+uint32_t ulRegionSize, ulReturnValue = 4;\r
\r
/* 32 is the smallest region size, 31 is the largest valid value for\r
ulReturnValue. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static portBASE_TYPE prvRaisePrivilege( void )\r
+static BaseType_t prvRaisePrivilege( void )\r
{\r
__asm volatile\r
(\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint16_t usStackDepth )\r
{\r
-extern unsigned long __SRAM_segment_start__[];\r
-extern unsigned long __SRAM_segment_end__[];\r
-extern unsigned long __privileged_data_start__[];\r
-extern unsigned long __privileged_data_end__[];\r
-long lIndex;\r
-unsigned long ul;\r
+extern uint32_t __SRAM_segment_start__[];\r
+extern uint32_t __SRAM_segment_end__[];\r
+extern uint32_t __privileged_data_start__[];\r
+extern uint32_t __privileged_data_end__[];\r
+int32_t lIndex;\r
+uint32_t ul;\r
\r
if( xRegions == NULL )\r
{\r
/* No MPU regions are specified so allow access to all RAM. */\r
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
- ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
+ ( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */\r
( portMPU_REGION_VALID ) |\r
( portSTACK_REGION );\r
\r
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
( portMPU_REGION_READ_WRITE ) |\r
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
- ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
+ ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |\r
( portMPU_REGION_ENABLE );\r
\r
/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
just removed the privileged only parameters. */\r
xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
- ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
+ ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */\r
( portMPU_REGION_VALID ) |\r
( portSTACK_REGION + 1 );\r
\r
xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
- prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
+ prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |\r
( portMPU_REGION_ENABLE );\r
\r
/* Invalidate all other regions. */\r
{\r
/* Define the region that allows access to the stack. */\r
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
- ( ( unsigned long ) pxBottomOfStack ) |\r
+ ( ( uint32_t ) pxBottomOfStack ) |\r
( portMPU_REGION_VALID ) |\r
( portSTACK_REGION ); /* Region number. */\r
\r
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
- ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
+ ( prvGetMPURegionSizeSetting( ( uint32_t ) usStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |\r
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
( portMPU_REGION_ENABLE );\r
}\r
xRegions into the CM3 specific MPU settings that are then\r
stored in xMPUSettings. */\r
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
- ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |\r
+ ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |\r
( portMPU_REGION_VALID ) |\r
( portSTACK_REGION + ul ); /* Region number. */\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
+BaseType_t MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask, StackType_t *puxStackBuffer, const MemoryRegion_t * const xRegions )\r
{\r
-signed portBASE_TYPE xReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
+void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskAllocateMPURegions( xTask, xRegions );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_vTaskDelete == 1 )\r
- void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
+ void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskDelete( pxTaskToDelete );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_vTaskDelayUntil == 1 )\r
- void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
+ void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_vTaskDelay == 1 )\r
- void MPU_vTaskDelay( portTickType xTicksToDelay )\r
+ void MPU_vTaskDelay( TickType_t xTicksToDelay )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskDelay( xTicksToDelay );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_uxTaskPriorityGet == 1 )\r
- unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
+ UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask )\r
{\r
- unsigned portBASE_TYPE uxReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ UBaseType_t uxReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
uxReturn = uxTaskPriorityGet( pxTask );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_vTaskPrioritySet == 1 )\r
- void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
+ void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskPrioritySet( pxTask, uxNewPriority );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_eTaskGetState == 1 )\r
- eTaskState MPU_eTaskGetState( xTaskHandle pxTask )\r
+ eTaskState MPU_eTaskGetState( TaskHandle_t pxTask )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
eTaskState eReturn;\r
\r
eReturn = eTaskGetState( pxTask );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
- xTaskHandle MPU_xTaskGetIdleTaskHandle( void )\r
+ TaskHandle_t MPU_xTaskGetIdleTaskHandle( void )\r
{\r
- xTaskHandle xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ TaskHandle_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskGetIdleTaskHandle();\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
- void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
+ void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskSuspend( pxTaskToSuspend );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
- signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
+ BaseType_t MPU_xTaskIsTaskSuspended( TaskHandle_t xTask )\r
{\r
- signed portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskIsTaskSuspended( xTask );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
- void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
+ void MPU_vTaskResume( TaskHandle_t pxTaskToResume )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskResume( pxTaskToResume );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
\r
void MPU_vTaskSuspendAll( void )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskSuspendAll();\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
+BaseType_t MPU_xTaskResumeAll( void )\r
{\r
-signed portBASE_TYPE xReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskResumeAll();\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portTickType MPU_xTaskGetTickCount( void )\r
+TickType_t MPU_xTaskGetTickCount( void )\r
{\r
-portTickType xReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+TickType_t xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskGetTickCount();\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
+UBaseType_t MPU_uxTaskGetNumberOfTasks( void )\r
{\r
-unsigned portBASE_TYPE uxReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+UBaseType_t uxReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
uxReturn = uxTaskGetNumberOfTasks();\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
void MPU_vTaskList( char *pcWriteBuffer )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskList( pcWriteBuffer );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
#if ( configGENERATE_RUN_TIME_STATS == 1 )\r
void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskGetRunTimeStats( pcWriteBuffer );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
- void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
+ void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, pdTASK_HOOK_CODE pxTagValue )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
- pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
+ pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask )\r
{\r
pdTASK_HOOK_CODE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskGetApplicationTaskTag( xTask );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
- portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
+ BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )\r
{\r
- portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
- unsigned portBASE_TYPE MPU_uxTaskGetSystemState( xTaskStatusType *pxTaskStatusArray, unsigned portBASE_TYPE uxArraySize, unsigned long *pulTotalRunTime )\r
+ UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime )\r
{\r
- unsigned portBASE_TYPE uxReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ UBaseType_t uxReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
- unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
+ UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask )\r
{\r
- unsigned portBASE_TYPE uxReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ UBaseType_t uxReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
- xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
+ TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void )\r
{\r
- xTaskHandle xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ TaskHandle_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskGetCurrentTaskHandle();\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
- portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
+ BaseType_t MPU_xTaskGetSchedulerState( void )\r
{\r
- portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xTaskGetSchedulerState();\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
-xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )\r
+QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType )\r
{\r
-xQueueHandle xReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+QueueHandle_t xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE MPU_xQueueGenericReset( xQueueHandle pxQueue, portBASE_TYPE xNewQueue )\r
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue )\r
{\r
-portBASE_TYPE xReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueGenericReset( pxQueue, xNewQueue );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )\r
{\r
-signed portBASE_TYPE xReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
+UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
-unsigned portBASE_TYPE uxReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
+UBaseType_t uxReturn;\r
\r
uxReturn = uxQueueMessagesWaiting( pxQueue );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+BaseType_t MPU_xQueueGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
-signed portBASE_TYPE xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xReturn;\r
\r
xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE MPU_xQueuePeekFromISR( xQueueHandle pxQueue, void * const pvBuffer )\r
+BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
-signed portBASE_TYPE xReturn;\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xReturn;\r
\r
xReturn = xQueuePeekFromISR( pxQueue, pvBuffer );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_MUTEXES == 1 )\r
- xQueueHandle MPU_xQueueCreateMutex( void )\r
+ QueueHandle_t MPU_xQueueCreateMutex( void )\r
{\r
- xQueueHandle xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ QueueHandle_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if configUSE_COUNTING_SEMAPHORES == 1\r
- xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
+ QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount )\r
{\r
- xQueueHandle xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ QueueHandle_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_MUTEXES == 1 )\r
- portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
+ BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime )\r
{\r
- portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_MUTEXES == 1 )\r
- portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
+ BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex )\r
{\r
- portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueGiveMutexRecursive( xMutex );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
- xQueueSetHandle MPU_xQueueCreateSet( unsigned portBASE_TYPE uxEventQueueLength )\r
+ QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength )\r
{\r
- xQueueSetHandle xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ QueueSetHandle_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueCreateSet( uxEventQueueLength );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
- xQueueSetMemberHandle MPU_xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType xBlockTimeTicks )\r
+ QueueSetMember_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks )\r
{\r
- xQueueSetMemberHandle xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ QueueSetMember_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
- portBASE_TYPE MPU_xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
+ BaseType_t MPU_xQueueAddToSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
{\r
- portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
- portBASE_TYPE MPU_xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
+ BaseType_t MPU_xQueueRemoveFromSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
{\r
- portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if configUSE_ALTERNATIVE_API == 1\r
- signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
+ BaseType_t MPU_xQueueAltGenericSend( QueueHandle_t pxQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )\r
{\r
- signed portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
- xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
+ xReturn = BaseType_t xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
return xReturn;\r
}\r
/*-----------------------------------------------------------*/\r
\r
#if configUSE_ALTERNATIVE_API == 1\r
- signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+ BaseType_t MPU_xQueueAltGenericReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )\r
{\r
- signed portBASE_TYPE xReturn;\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xReturn;\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
portRESET_PRIVILEGE( xRunningPrivileged );\r
/*-----------------------------------------------------------*/\r
\r
#if configQUEUE_REGISTRY_SIZE > 0\r
- void MPU_vQueueAddToRegistry( xQueueHandle xQueue, char *pcName )\r
+ void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, char *pcName )\r
{\r
- portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+ BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vQueueAddToRegistry( xQueue, pcName );\r
\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
-void MPU_vQueueDelete( xQueueHandle xQueue )\r
+void MPU_vQueueDelete( QueueHandle_t xQueue )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vQueueDelete( xQueue );\r
\r
void *MPU_pvPortMalloc( size_t xSize )\r
{\r
void *pvReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
pvReturn = pvPortMalloc( xSize );\r
\r
\r
void MPU_vPortFree( void *pv )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vPortFree( pv );\r
\r
\r
void MPU_vPortInitialiseBlocks( void )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
vPortInitialiseBlocks();\r
\r
size_t MPU_xPortGetFreeHeapSize( void )\r
{\r
size_t xReturn;\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
xReturn = xPortGetFreeHeapSize();\r
\r
\r
void MPU_FunctionName( [parameters ] )\r
{\r
-portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+BaseType_t xRunningPrivileged = prvRaisePrivilege();\r
\r
FunctionName( [parameters ] );\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
\r
typedef struct MPU_REGION_REGISTERS\r
{\r
- unsigned portLONG ulRegionBaseAddress;\r
- unsigned portLONG ulRegionAttribute;\r
+ uint32_t ulRegionBaseAddress;\r
+ uint32_t ulRegionAttribute;\r
} xMPU_REGION_REGISTERS;\r
\r
/* Plus 1 to create space for the stack region. */\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
#define portYIELD() __asm volatile ( " SVC %0 \n" :: "i" (portSVC_YIELD) )\r
#define portYIELD_WITHIN_API() *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET\r
\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
+#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )\r
#define portNVIC_PENDSVSET 0x10000000\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET\r
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
#endif\r
\r
/* Constants required to manipulate the core. Registers first... */\r
-#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
-#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )\r
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )\r
/* ...then bits in the registers. */\r
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )\r
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )\r
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )\r
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )\r
\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
\r
/* Constants required to check the validity of an interrupt priority. */\r
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )\r
-#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
-#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )\r
-#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )\r
-#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )\r
+#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )\r
+#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )\r
+#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )\r
+#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )\r
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )\r
#define portPRIGROUP_SHIFT ( 8UL )\r
\r
/* Constants required to manipulate the VFP. */\r
-#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
+#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */\r
#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )\r
\r
/* Constants required to set up the initial stack. */\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts. The implementation in this\r
* The number of SysTick increments that make up one tick period.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulTimerCountsForOneTick = 0;\r
+ static uint32_t ulTimerCountsForOneTick = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* 24 bit resolution of the SysTick timer.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* power functionality only.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulStoppedTimerCompensation = 0;\r
+ static uint32_t ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
*/\r
#if ( configASSERT_DEFINED == 1 )\r
- static unsigned char ucMaxSysCallPriority = 0;\r
- static unsigned long ulMaxPRIGROUPValue = 0;\r
- static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
+ static uint8_t ucMaxSysCallPriority = 0;\r
+ static uint32_t ulMaxPRIGROUPValue = 0;\r
+ static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
#endif /* configASSERT_DEFINED */\r
\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) portTASK_RETURN_ADDRESS; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */\r
\r
/* Save code space by skipping register initialisation. */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
\r
/* A save method is being used that requires each task to maintain its\r
own exec return value. */\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.\r
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
\r
#if( configASSERT_DEFINED == 1 )\r
{\r
- volatile unsigned long ulOriginalPriority;\r
- volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
- volatile unsigned char ucMaxPriorityValue;\r
+ volatile uint32_t ulOriginalPriority;\r
+ volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
+ volatile uint8_t ucMaxPriorityValue;\r
\r
/* Determine the maximum priority from which ISR safe FreeRTOS API\r
functions can be called. ISR safe functions are those that end in\r
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
{\r
ulMaxPRIGROUPValue--;\r
- ucMaxPriorityValue <<= ( unsigned char ) 0x01;\r
+ ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
}\r
\r
/* Shift the priority group value back to its position within the AIRCR\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__attribute__(( naked )) unsigned long ulPortSetInterruptMask( void )\r
+__attribute__(( naked )) uint32_t ulPortSetInterruptMask( void )\r
{\r
__asm volatile \\r
( \\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__attribute__(( naked )) void vPortClearInterruptMask( unsigned long ulNewMaskValue )\r
+__attribute__(( naked )) void vPortClearInterruptMask( uint32_t ulNewMaskValue )\r
{\r
__asm volatile \\r
( \\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- __attribute__((weak)) void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ __attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
- portTickType xModifiableIdleTime;\r
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
+ TickType_t xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
\r
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
- unsigned long ulCalculatedLoadValue;\r
+ uint32_t ulCalculatedLoadValue;\r
\r
/* The tick interrupt has already executed, and the SysTick\r
count reloaded with ulReloadValue. Reset the\r
\r
void vPortValidateInterruptPriority( void )\r
{\r
- unsigned long ulCurrentInterrupt;\r
- unsigned char ucCurrentPriority;\r
+ uint32_t ulCurrentInterrupt;\r
+ uint8_t ucCurrentPriority;\r
\r
/* Obtain the number of the currently executing interrupt. */\r
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/* Critical section management. */\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)\r
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()\r
\r
/* Tickless idle/low power functionality. */\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
/*-----------------------------------------------------------*/\r
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
\r
/* Generic helper function. */\r
- __attribute__( ( always_inline ) ) static inline unsigned char ucPortCountLeadingZeros( unsigned long ulBitmap )\r
+ __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )\r
{\r
- unsigned char ucReturn;\r
+ uint8_t ucReturn;\r
\r
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );\r
return ucReturn;\r
*----------------------------------------------------------*/\r
\r
/* Start tasks with interrupts enables. */\r
-#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x80 )\r
+#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )\r
\r
/* Hardware constants for timer 1. */\r
-#define portCLEAR_COUNTER_ON_MATCH ( ( unsigned char ) 0x08 )\r
-#define portPRESCALE_64 ( ( unsigned char ) 0x03 )\r
-#define portCLOCK_PRESCALER ( ( unsigned long ) 64 )\r
-#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( unsigned char ) 0x10 )\r
+#define portCLEAR_COUNTER_ON_MATCH ( ( uint8_t ) 0x08 )\r
+#define portPRESCALE_64 ( ( uint8_t ) 0x03 )\r
+#define portCLOCK_PRESCALER ( ( uint32_t ) 64 )\r
+#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( uint8_t ) 0x10 )\r
\r
/*-----------------------------------------------------------*/\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned short usAddress;\r
+uint16_t usAddress;\r
\r
/* Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging. */\r
\r
/* The start of the task code will be popped off the stack last, so place\r
it on first. */\r
- usAddress = ( unsigned short ) pxCode;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ usAddress = ( uint16_t ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
usAddress >>= 8;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
/* Next simulate the stack as if after a call to portSAVE_CONTEXT(). \r
portSAVE_CONTEXT places the flags on the stack immediately after r0\r
to ensure the interrupts get disabled as soon as possible, and so ensuring\r
the stack use is minimal should a context switch interrupt occur. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */\r
pxTopOfStack--;\r
*pxTopOfStack = portFLAGS_INT_ENABLED;\r
pxTopOfStack--;\r
\r
\r
/* Now the remaining registers. The compiler expects R1 to be 0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02; /* R2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03; /* R3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04; /* R4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05; /* R5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06; /* R6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07; /* R7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08; /* R8 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09; /* R9 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10; /* R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11; /* R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12; /* R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x13; /* R13 */\r
+ *pxTopOfStack = ( StackType_t ) 0x13; /* R13 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x14; /* R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R15 */\r
+ *pxTopOfStack = ( StackType_t ) 0x15; /* R15 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R16 */\r
+ *pxTopOfStack = ( StackType_t ) 0x16; /* R16 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R17 */\r
+ *pxTopOfStack = ( StackType_t ) 0x17; /* R17 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R18 */\r
+ *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R19 */\r
+ *pxTopOfStack = ( StackType_t ) 0x19; /* R19 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x20; /* R20 */\r
+ *pxTopOfStack = ( StackType_t ) 0x20; /* R20 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x21; /* R21 */\r
+ *pxTopOfStack = ( StackType_t ) 0x21; /* R21 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* R22 */\r
+ *pxTopOfStack = ( StackType_t ) 0x22; /* R22 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x23; /* R23 */\r
+ *pxTopOfStack = ( StackType_t ) 0x23; /* R23 */\r
pxTopOfStack--;\r
\r
/* Place the parameter on the stack in the expected location. */\r
- usAddress = ( unsigned short ) pvParameters;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ usAddress = ( uint16_t ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
usAddress >>= 8;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x26; /* R26 X */\r
+ *pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x27; /* R27 */\r
+ *pxTopOfStack = ( StackType_t ) 0x27; /* R27 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x28; /* R28 Y */\r
+ *pxTopOfStack = ( StackType_t ) 0x28; /* R28 Y */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x29; /* R29 */\r
+ *pxTopOfStack = ( StackType_t ) 0x29; /* R29 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x30; /* R30 Z */\r
+ *pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x031; /* R31 */\r
+ *pxTopOfStack = ( StackType_t ) 0x031; /* R31 */\r
pxTopOfStack--;\r
\r
/*lint +e950 +e611 +e923 */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. */\r
prvSetupTimerInterrupt();\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned long ulCompareMatch;\r
-unsigned char ucHighByte, ucLowByte;\r
+uint32_t ulCompareMatch;\r
+uint8_t ucHighByte, ucLowByte;\r
\r
/* Using 16bit timer 1 to generate the tick. Correct fuses must be\r
selected for the configCPU_CLOCK_HZ clock. */\r
ulCompareMatch /= portCLOCK_PRESCALER;\r
\r
/* Adjust for correct value. */\r
- ulCompareMatch -= ( unsigned long ) 1;\r
+ ulCompareMatch -= ( uint32_t ) 1;\r
\r
/* Setup compare match value for compare match A. Interrupts are disabled \r
before this is called so we need not worry here. */\r
- ucLowByte = ( unsigned char ) ( ulCompareMatch & ( unsigned long ) 0xff );\r
+ ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );\r
ulCompareMatch >>= 8;\r
- ucHighByte = ( unsigned char ) ( ulCompareMatch & ( unsigned long ) 0xff );\r
+ ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );\r
OCR1AH = ucHighByte;\r
OCR1AL = ucLowByte;\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
/*\r
Changes from V1.2.3\r
\r
- + portCPU_CLOSK_HZ definition changed to 8MHz base 10, previously it \r
+ + portCPU_CLOSK_HZ definition changed to 8MHz base 10, previously it\r
base 16.\r
*/\r
\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portCHAR\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
#define portENTER_CRITICAL() asm volatile ( "in __tmp_reg__, __SREG__" :: ); \\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 1\r
#define portNOP() asm volatile ( "nop" );\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Constants required to setup the task context. */\r
-#define portINITIAL_SR ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )\r
\r
/* Each task maintains its own critical nesting variable. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
#if( configTICK_USE_TC==0 )\r
static void prvScheduleNextTick( void );\r
#if configHEAP_INIT\r
extern void __heap_start__;\r
extern void __heap_end__;\r
- portBASE_TYPE *pxMem;\r
+ BaseType_t *pxMem;\r
#endif\r
\r
/* Load the Exception Vector Base Address in the corresponding system register. */\r
#if configHEAP_INIT\r
\r
/* Initialize the heap used by malloc. */\r
- for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )\r
+ for( pxMem = &__heap_start__; pxMem < ( BaseType_t * )&__heap_end__; )\r
{\r
*pxMem++ = 0xA5A5A5A5;\r
}\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Setup the initial stack of the task. The stack is set exactly as\r
expected by the portRESTORE_CONTEXT() macro. */\r
\r
/* When the task starts, it will expect to find the function parameter in R12. */\r
pxTopOfStack--;\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A; /* R10 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B; /* R11 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters; /* R12 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF; /* R14/LR */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR; /* SR */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF; /* R0 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */\r
+ *pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */\r
+ *pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */\r
+ *pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
#if( configTICK_USE_TC==0 )\r
static void prvScheduleFirstTick(void)\r
{\r
- unsigned long lCycles;\r
+ uint32_t lCycles;\r
\r
lCycles = Get_system_register(AVR32_COUNT);\r
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);\r
\r
__attribute__((__noinline__)) static void prvScheduleNextTick(void)\r
{\r
- unsigned long lCycles, lCount;\r
+ uint32_t lCycles, lCount;\r
\r
lCycles = Get_system_register(AVR32_COMPARE);\r
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);\r
*****************************************************************************/\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
\r
#define TASK_DELAY_MS(x) ( (x) /portTICK_RATE_MS )\r
#define TASK_DELAY_S(x) ( (x)*1000 /portTICK_RATE_MS )\r
#define configTICK_TC_IRQ ATPASTE2(AVR32_TC_IRQ, configTICK_TC_CHANNEL)\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
#define portNOP() {__asm__ __volatile__ ("nop");}\r
/*-----------------------------------------------------------*/\r
*/\r
#define portRESTORE_CONTEXT() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
__asm__ __volatile__ ( \\r
*/\r
#define portSAVE_CONTEXT_OS_INT() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* When we come here */ \\r
*/\r
#define portRESTORE_CONTEXT_OS_INT() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* Check if INT0 or higher were being handled (case where the OS tick interrupted another */ \\r
*/\r
#define portSAVE_CONTEXT_SCALL() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* Warning: the stack layout after SCALL doesn't match the one after an interrupt. */ \\r
*/\r
#define portRESTORE_CONTEXT_SCALL() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* Restore all registers */ \\r
*/\r
#define portENTER_SWITCHING_ISR() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* When we come here */ \\r
*/\r
#define portEXIT_SWITCHING_ISR() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
__asm__ __volatile__ ( \\r
static void prvSetupTimerInterrupt( void );\r
/*-----------------------------------------------------------*/\r
\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Make space on the stack for the context - this leaves a couple of spaces\r
empty. */\r
/* Fill the registers with known values to assist debugging. */\r
pxTopOfStack[ 16 ] = 0;\r
pxTopOfStack[ 15 ] = portINITIAL_PSR;\r
- pxTopOfStack[ 14 ] = ( unsigned long ) pxCode;\r
+ pxTopOfStack[ 14 ] = ( uint32_t ) pxCode;\r
pxTopOfStack[ 13 ] = 0x00000000UL; /* R15. */\r
pxTopOfStack[ 12 ] = 0x00000000UL; /* R14. */\r
pxTopOfStack[ 11 ] = 0x0d0d0d0dUL;\r
pxTopOfStack[ 3 ] = 0x05050505UL;\r
pxTopOfStack[ 2 ] = 0x04040404UL;\r
pxTopOfStack[ 1 ] = 0x03030303UL;\r
- pxTopOfStack[ 0 ] = ( unsigned long ) pvParameters;\r
+ pxTopOfStack[ 0 ] = ( uint32_t ) pvParameters;\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Set-up the timer interrupt. */\r
prvSetupTimerInterrupt();\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
#define portNOP() __asm__ volatile ( "mov r0, r0" )\r
#define portCRITICAL_NESTING_IN_TCB 1\r
#include "FreeRTOS.h"\r
#include "task.h"\r
\r
-#define portINITIAL_FORMAT_VECTOR ( ( portSTACK_TYPE ) 0x4000 )\r
+#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )\r
\r
/* Supervisor mode set. */\r
-#define portINITIAL_STATUS_REGISTER ( ( portSTACK_TYPE ) 0x2000)\r
+#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000)\r
\r
/* Used to keep track of the number of nested calls to taskENTER_CRITICAL(). This\r
will be set to 0 prior to the first task being started. */\r
-static unsigned long ulCriticalNesting = 0x9999UL;\r
+static uint32_t ulCriticalNesting = 0x9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+ *pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
pxTopOfStack--;\r
\r
/* Exception stack frame starts with the return address. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
\r
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0; /*FP*/\r
+ *pxTopOfStack = ( StackType_t ) 0x0; /*FP*/\r
pxTopOfStack -= 14; /* A5 to D0. */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
\r
void vPortYieldHandler( void )\r
{\r
-unsigned long ulSavedInterruptMask;\r
+uint32_t ulSavedInterruptMask;\r
\r
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
/* Note this will clear all forced interrupts - this is done for speed. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 4\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
-unsigned portLONG ulPortSetIPL( unsigned portLONG );\r
+uint32_t ulPortSetIPL( uint32_t );\r
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )\r
\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
\r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void );\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR( void );\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )\r
\r
/*-----------------------------------------------------------*/\r
\r
/* When the task starts interrupts should be enabled. */\r
-#define portINITIAL_CCR ( ( portSTACK_TYPE ) 0x00 )\r
+#define portINITIAL_CCR ( ( StackType_t ) 0x00 )\r
\r
/* Hardware specific constants used to generate the RTOS tick from the TPU. */\r
-#define portCLEAR_ON_TGRA_COMPARE_MATCH ( ( unsigned char ) 0x20 )\r
-#define portCLOCK_DIV_64 ( ( unsigned char ) 0x03 )\r
-#define portCLOCK_DIV ( ( unsigned long ) 64 )\r
-#define portTGRA_INTERRUPT_ENABLE ( ( unsigned char ) 0x01 )\r
-#define portTIMER_CHANNEL ( ( unsigned char ) 0x02 )\r
-#define portMSTP13 ( ( unsigned short ) 0x2000 )\r
+#define portCLEAR_ON_TGRA_COMPARE_MATCH ( ( uint8_t ) 0x20 )\r
+#define portCLOCK_DIV_64 ( ( uint8_t ) 0x03 )\r
+#define portCLOCK_DIV ( ( uint32_t ) 64 )\r
+#define portTGRA_INTERRUPT_ENABLE ( ( uint8_t ) 0x01 )\r
+#define portTIMER_CHANNEL ( ( uint8_t ) 0x02 )\r
+#define portMSTP13 ( ( uint16_t ) 0x2000 )\r
\r
/*\r
* Setup TPU channel one for the RTOS tick at the requested frequency.\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned long ulValue;\r
+uint32_t ulValue;\r
\r
/* This requires an even address. */\r
- ulValue = ( unsigned long ) pxTopOfStack;\r
+ ulValue = ( uint32_t ) pxTopOfStack;\r
if( ulValue & 1UL )\r
{\r
pxTopOfStack = pxTopOfStack - 1;\r
\r
/* The initial stack mimics an interrupt stack. First there is the program\r
counter (24 bits). */\r
- ulValue = ( unsigned long ) pxCode;\r
+ ulValue = ( uint32_t ) pxCode;\r
\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );\r
pxTopOfStack--;\r
ulValue >>= 8UL;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );\r
pxTopOfStack--;\r
ulValue >>= 8UL;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );\r
\r
/* Followed by the CCR. */ \r
pxTopOfStack--;\r
*pxTopOfStack = 0x66;\r
\r
/* ER0 */\r
- ulValue = ( unsigned long ) pvParameters;\r
+ ulValue = ( uint32_t ) pvParameters;\r
\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );\r
pxTopOfStack--;\r
ulValue >>= 8UL;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );\r
pxTopOfStack--;\r
ulValue >>= 8UL;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );\r
pxTopOfStack--;\r
ulValue >>= 8UL;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulValue & 0xff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );\r
\r
/* ER1 */\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void * pxCurrentTCB;\r
\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned long ulCompareMatch = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / portCLOCK_DIV;\r
+const uint32_t ulCompareMatch = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / portCLOCK_DIV;\r
\r
/* Turn the module on. */\r
MSTPCR &= ~portMSTP13;\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portCHAR\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portYIELD() asm volatile( "TRAPA #0" )\r
#define portNOP() asm volatile( "NOP" )\r
/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
\r
-/* Context switch macros. These macros are very simple as the context \r
-is saved simply by selecting the saveall attribute of the context switch \r
+/* Context switch macros. These macros are very simple as the context\r
+is saved simply by selecting the saveall attribute of the context switch\r
interrupt service routines. These macros save and restore the stack\r
pointer to the TCB. */\r
\r
void ATTR_NEAR vPortTickInterrupt( void );\r
\r
/* Function in non-banked memory which actually switches to first task. */\r
-portBASE_TYPE ATTR_NEAR xStartSchedulerNear( void );\r
+BaseType_t ATTR_NEAR xStartSchedulerNear( void );\r
\r
/* Calls to portENTER_CRITICAL() can be nested. When they are nested the \r
critical section should not be left (i.e. interrupts should not be re-enabled)\r
depth. Each task maintains it's own critical nesting depth variable so \r
uxCriticalNesting is saved and restored from the task stack during a context\r
switch. */\r
-volatile unsigned portBASE_TYPE uxCriticalNesting = 0x80; // un-initialized\r
+volatile UBaseType_t uxCriticalNesting = 0x80; // un-initialized\r
\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
\r
\r
\r
\r
/* The address of the task function is placed in the stack byte at a time. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 1 );\r
- *--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 0 );\r
+ *pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 1 );\r
+ *--pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 0 );\r
\r
/* Next are all the registers that form part of the task context. */\r
\r
/* Y register */\r
- *--pxTopOfStack = ( portSTACK_TYPE ) 0xff;\r
- *--pxTopOfStack = ( portSTACK_TYPE ) 0xee;\r
+ *--pxTopOfStack = ( StackType_t ) 0xff;\r
+ *--pxTopOfStack = ( StackType_t ) 0xee;\r
\r
/* X register */\r
- *--pxTopOfStack = ( portSTACK_TYPE ) 0xdd;\r
- *--pxTopOfStack = ( portSTACK_TYPE ) 0xcc;\r
+ *--pxTopOfStack = ( StackType_t ) 0xdd;\r
+ *--pxTopOfStack = ( StackType_t ) 0xcc;\r
\r
/* A register contains parameter high byte. */\r
- *--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 0 );\r
+ *--pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 0 );\r
\r
/* B register contains parameter low byte. */\r
- *--pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 1 );\r
+ *--pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );\r
\r
/* CCR: Note that when the task starts interrupts will be enabled since\r
"I" bit of CCR is cleared */\r
- *--pxTopOfStack = ( portSTACK_TYPE ) 0x80; // keeps Stop disabled (MCU default)\r
+ *--pxTopOfStack = ( StackType_t ) 0x80; // keeps Stop disabled (MCU default)\r
\r
/* tmp softregs used by GCC. Values right now don't matter. */\r
__asm("\n\\r
\r
/* The critical nesting depth is initialised with 0 (meaning not in\r
a critical section). */\r
- *--pxTopOfStack = ( portSTACK_TYPE ) 0x00;\r
+ *--pxTopOfStack = ( StackType_t ) 0x00;\r
\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* xPortStartScheduler() does not start the scheduler directly because \r
the header file containing the xPortStartScheduler() prototype is part \r
Instead it simply calls the locally defined xNearStartScheduler() - \r
which does use the CODE_SEG pragma. */\r
\r
- short register d;\r
+ int16_t register d;\r
__asm ("jmp xStartSchedulerNear ; will never return": "=d"(d));\r
return d;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xStartSchedulerNear( void )\r
+BaseType_t xStartSchedulerNear( void )\r
{\r
/* Configure the timer that will generate the RTOS tick. Interrupts are\r
disabled when this function is called. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portCHAR\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 1\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portYIELD() __asm( "swi" );\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
-#define portENABLE_INTERRUPTS() __asm( "cli" ) \r
+#define portENABLE_INTERRUPTS() __asm( "cli" )\r
#define portDISABLE_INTERRUPTS() __asm( "sei" )\r
\r
/*\r
*/\r
#define portENTER_CRITICAL() \\r
{ \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
uxCriticalNesting++; \\r
\r
/*\r
* Interrupts are disabled so we can access the nesting count directly. If the\r
- * nesting is found to be 0 (no nesting) then we are leaving the critical \r
+ * nesting is found to be 0 (no nesting) then we are leaving the critical\r
* section and interrupts can be re-enabled.\r
*/\r
#define portEXIT_CRITICAL() \\r
{ \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
uxCriticalNesting--; \\r
if( uxCriticalNesting == 0 ) \\r
\r
/* Task utilities. */\r
\r
-/* \r
- * These macros are very simple as the processor automatically saves and \r
+/*\r
+ * These macros are very simple as the processor automatically saves and\r
* restores its registers as interrupts are entered and exited. In\r
- * addition to the (automatically stacked) registers we also stack the \r
+ * addition to the (automatically stacked) registers we also stack the\r
* critical nesting count. Each task maintains its own critical nesting\r
* count as it is legitimate for a task to yield from within a critical\r
* section. If the banked memory model is being used then the PPAGE\r
*/\r
\r
#ifdef BANKED_MODEL\r
- /* \r
+ /*\r
* Load the stack pointer for the task, then pull the critical nesting\r
- * count and PPAGE register from the stack. The remains of the \r
+ * count and PPAGE register from the stack. The remains of the\r
* context are restored by the RTI instruction.\r
*/\r
#define portRESTORE_CONTEXT() \\r
" ); \\r
}\r
\r
- /* \r
+ /*\r
* By the time this macro is called the processor has already stacked the\r
- * registers. Simply stack the nesting count and PPAGE value, then save \r
+ * registers. Simply stack the nesting count and PPAGE value, then save\r
* the task stack pointer.\r
*/\r
#define portSAVE_CONTEXT() \\r
}\r
#else\r
\r
- /* \r
+ /*\r
* These macros are as per the BANKED versions above, but without saving\r
* and restoring the PPAGE register.\r
*/\r
#include "task.h"\r
\r
/* ------------------------ Types ----------------------------------------- */\r
-typedef volatile unsigned long vuint32;\r
-typedef volatile unsigned short vuint16;\r
-typedef volatile unsigned char vuint8;\r
+typedef volatile uint32_t vuint32;\r
+typedef volatile uint16_t vuint16;\r
+typedef volatile uint8_t vuint8;\r
\r
/* ------------------------ Defines --------------------------------------- */\r
#define portVECTOR_TABLE __RAMVEC\r
#define MCF_INTC0_ICRn_IP(x) ( ( ( x ) & 0x07 ) << 0 )\r
#define MCF_INTC0_ICRn_IL(x) ( ( ( x ) & 0x07 ) << 3 )\r
\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
-#define portINITIAL_CRITICAL_NESTING ( ( unsigned long ) 10 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+#define portINITIAL_CRITICAL_NESTING ( ( uint32_t ) 10 )\r
\r
/* ------------------------ Static variables ------------------------------ */\r
-volatile unsigned long ulCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint32_t ulCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
\r
/* ------------------------ Static functions ------------------------------ */\r
#if configUSE_PREEMPTION == 0\r
\r
/* ------------------------ Start implementation -------------------------- */\r
\r
-portSTACK_TYPE *\r
-pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode,\r
+StackType_t *\r
+pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode,\r
void *pvParameters )\r
{\r
/* Place the parameter on the stack in the expected location. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* Place dummy return address on stack. Tasks should never terminate so\r
* we can set this to anything. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0;\r
+ *pxTopOfStack = ( StackType_t ) 0;\r
pxTopOfStack--;\r
\r
/* Create a Motorola Coldfire exception stack frame. First comes the return\r
* address. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
\r
/* Format, fault-status, vector number for exception stack frame. Task\r
*pxTopOfStack = 0;\r
*pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xA6; /* A6 / FP */\r
+ *pxTopOfStack = ( StackType_t ) 0xA6; /* A6 / FP */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xA5; /* A5 */\r
+ *pxTopOfStack = ( StackType_t ) 0xA5; /* A5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xA4; /* A4 */\r
+ *pxTopOfStack = ( StackType_t ) 0xA4; /* A4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xA3; /* A3 */\r
+ *pxTopOfStack = ( StackType_t ) 0xA3; /* A3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xA2; /* A2 */\r
+ *pxTopOfStack = ( StackType_t ) 0xA2; /* A2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xA1; /* A1 */\r
+ *pxTopOfStack = ( StackType_t ) 0xA1; /* A1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xA0; /* A0 */\r
+ *pxTopOfStack = ( StackType_t ) 0xA0; /* A0 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD7; /* D7 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD7; /* D7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD6; /* D6 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD6; /* D6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD5; /* D5 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD5; /* D5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD4; /* D4 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD4; /* D4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD3; /* D3 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD3; /* D3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD2; /* D2 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD2; /* D2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD1; /* D1 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD1; /* D1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xD0; /* D0 */\r
+ *pxTopOfStack = ( StackType_t ) 0xD0; /* D0 */\r
\r
return pxTopOfStack;\r
}\r
}\r
}\r
\r
-portBASE_TYPE\r
+BaseType_t\r
xPortStartScheduler( void )\r
{\r
extern void ( *portVECTOR_TABLE[ ] ) ( );\r
Please ensure to read the configuration and relevant port sections of the\r
online documentation.\r
\r
- http://www.FreeRTOS.org - Documentation, latest information, license and \r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
contact details.\r
\r
- http://www.SafeRTOS.com - A version that is certified for use in safety \r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
critical systems.\r
\r
- http://www.OpenRTOS.com - Commercial support, development, porting, \r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
licensing and training services.\r
*/\r
\r
#define portSTACK_TYPE unsigned int\r
#define portBASE_TYPE int\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
\r
/* ------------------------ Architecture specifics ------------------------ */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
\r
#define portTRAP_YIELD 0 /* Trap 0 */\r
/* ------------------------ Function prototypes --------------------------- */\r
void vPortEnterCritical( void );\r
void vPortExitCritical( void );\r
-int asm_set_ipl( unsigned long int uiNewIPL );\r
+int asm_set_ipl( uint32_t int uiNewIPL );\r
\r
/* ------------------------ Compiler specifics ---------------------------- */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) \\r
\r
/* Constants required for hardware setup. The tick ISR runs off the ACLK, \r
not the MCLK. */\r
-#define portACLK_FREQUENCY_HZ ( ( portTickType ) 32768 )\r
-#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )\r
-#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x08 )\r
+#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )\r
+#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )\r
+#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Most ports implement critical sections by placing the interrupt flags on\r
the stack before disabling interrupts. Exiting the critical section is then\r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as this will cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* \r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* \r
Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging and can be included if required.\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x3333;\r
+ *pxTopOfStack = ( StackType_t ) 0x3333;\r
pxTopOfStack--; \r
*/\r
\r
executing an ISR. We want the stack to look just as if this has happened\r
so place a pointer to the start of the task on the stack first - followed\r
by the flags we want the task to use when it starts up. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
*pxTopOfStack = portFLAGS_INT_ENABLED;\r
pxTopOfStack--;\r
\r
/* Next the general purpose registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x4444;\r
+ *pxTopOfStack = ( StackType_t ) 0x4444;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555;\r
+ *pxTopOfStack = ( StackType_t ) 0x5555;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x6666;\r
+ *pxTopOfStack = ( StackType_t ) 0x6666;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x7777;\r
+ *pxTopOfStack = ( StackType_t ) 0x7777;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x8888;\r
+ *pxTopOfStack = ( StackType_t ) 0x8888;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x9999;\r
+ *pxTopOfStack = ( StackType_t ) 0x9999;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaa;\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaa;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xbbbb;\r
+ *pxTopOfStack = ( StackType_t ) 0xbbbb;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcccc;\r
+ *pxTopOfStack = ( StackType_t ) 0xcccc;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xdddd;\r
+ *pxTopOfStack = ( StackType_t ) 0xdddd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xeeee;\r
+ *pxTopOfStack = ( StackType_t ) 0xeeee;\r
pxTopOfStack--;\r
\r
/* When the task starts is will expect to find the function parameter in\r
R15. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* The code generated by the mspgcc compiler does not maintain separate\r
use the stack as per other ports. Instead a variable is used to keep\r
track of the critical section nesting. This variable has to be stored\r
as part of the task context and is initially set to zero. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
be stored in the task control block for the task. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
this function is called. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
#define portDISABLE_INTERRUPTS() asm volatile ( "DINT" ); asm volatile ( "NOP" )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Hardwware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#include <xtmrctr.h>\r
\r
/* Tasks are started with interrupts enabled. */\r
-#define portINITIAL_MSR_STATE ( ( portSTACK_TYPE ) 0x02 )\r
+#define portINITIAL_MSR_STATE ( ( StackType_t ) 0x02 )\r
\r
/* Tasks are started with a critical section nesting of 0 - however prior\r
to the scheduler being commenced we don't want the critical nesting level\r
/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task \r
maintains it's own count, so this variable is saved as part of the task\r
context. */\r
-volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;\r
+volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE;\r
\r
/* To limit the amount of stack required by each task, this port uses a\r
separate stack for interrupts. */\r
-unsigned long *pulISRStack;\r
+uint32_t *pulISRStack;\r
\r
/*-----------------------------------------------------------*/\r
\r
* \r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
extern void *_SDA2_BASE_, *_SDA_BASE_;\r
-const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;\r
-const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;\r
+const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;\r
+const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;\r
\r
/* Place a few bytes of known values on the bottom of the stack. \r
This is essential for the Microblaze port and these lines must\r
not be omitted. The parameter value will overwrite the \r
0x22222222 value during the function prologue. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22222222;\r
+ *pxTopOfStack = ( StackType_t ) 0x22222222;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x33333333;\r
+ *pxTopOfStack = ( StackType_t ) 0x33333333;\r
pxTopOfStack--; \r
\r
/* First stack an initial value for the critical section nesting. This\r
is initialised to zero as tasks are started with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R0. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* R0. */\r
\r
/* Place an initial value for all the general purpose registers. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulR2; /* R2 - small data area. */\r
+ *pxTopOfStack = ( StackType_t ) ulR2; /* R2 - small data area. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3. */\r
+ *pxTopOfStack = ( StackType_t ) 0x03; /* R3. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4. */\r
+ *pxTopOfStack = ( StackType_t ) 0x04; /* R4. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;/* R5 contains the function call parameters. */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;/* R5 contains the function call parameters. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6. */\r
+ *pxTopOfStack = ( StackType_t ) 0x06; /* R6. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7. */\r
+ *pxTopOfStack = ( StackType_t ) 0x07; /* R7. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8. */\r
+ *pxTopOfStack = ( StackType_t ) 0x08; /* R8. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9. */\r
+ *pxTopOfStack = ( StackType_t ) 0x09; /* R9. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0a; /* R10. */\r
+ *pxTopOfStack = ( StackType_t ) 0x0a; /* R10. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0b; /* R11. */\r
+ *pxTopOfStack = ( StackType_t ) 0x0b; /* R11. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0c; /* R12. */\r
+ *pxTopOfStack = ( StackType_t ) 0x0c; /* R12. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - small data read write area. */\r
+ *pxTopOfStack = ( StackType_t ) ulR13; /* R13 - small data read write area. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14. */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* R14. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0f; /* R15. */\r
+ *pxTopOfStack = ( StackType_t ) 0x0f; /* R15. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16. */\r
+ *pxTopOfStack = ( StackType_t ) 0x10; /* R16. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R17. */\r
+ *pxTopOfStack = ( StackType_t ) 0x11; /* R17. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R18. */\r
+ *pxTopOfStack = ( StackType_t ) 0x12; /* R18. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x13; /* R19. */\r
+ *pxTopOfStack = ( StackType_t ) 0x13; /* R19. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20. */\r
+ *pxTopOfStack = ( StackType_t ) 0x14; /* R20. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R21. */\r
+ *pxTopOfStack = ( StackType_t ) 0x15; /* R21. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R22. */\r
+ *pxTopOfStack = ( StackType_t ) 0x16; /* R22. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R23. */\r
+ *pxTopOfStack = ( StackType_t ) 0x17; /* R23. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R24. */\r
+ *pxTopOfStack = ( StackType_t ) 0x18; /* R24. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R25. */\r
+ *pxTopOfStack = ( StackType_t ) 0x19; /* R25. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1a; /* R26. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1a; /* R26. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1b; /* R27. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1b; /* R27. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1c; /* R28. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1c; /* R28. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1d; /* R29. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1d; /* R29. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1e; /* R30. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1e; /* R30. */\r
pxTopOfStack--;\r
\r
/* The MSR is stacked between R30 and R31. */\r
*pxTopOfStack = portINITIAL_MSR_STATE;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1f; /* R31. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1f; /* R31. */\r
pxTopOfStack--;\r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void ( __FreeRTOS_interrupt_Handler )( void );\r
extern void ( vStartFirstTask )( void );\r
prvSetupTimerInterrupt();\r
\r
/* Allocate the stack to be used by the interrupt handler. */\r
- pulISRStack = ( unsigned long * ) pvPortMalloc( configMINIMAL_STACK_SIZE * sizeof( portSTACK_TYPE ) );\r
+ pulISRStack = ( uint32_t * ) pvPortMalloc( configMINIMAL_STACK_SIZE * sizeof( StackType_t ) );\r
\r
/* Restore the context of the first task that is going to run. */\r
if( pulISRStack != NULL )\r
{\r
/* Fill the ISR stack with a known value to facilitate debugging. */\r
- memset( pulISRStack, portISR_STACK_FILL_VALUE, configMINIMAL_STACK_SIZE * sizeof( portSTACK_TYPE ) );\r
+ memset( pulISRStack, portISR_STACK_FILL_VALUE, configMINIMAL_STACK_SIZE * sizeof( StackType_t ) );\r
pulISRStack += ( configMINIMAL_STACK_SIZE - 1 );\r
\r
/* Kick off the first task. */\r
static void prvSetupTimerInterrupt( void )\r
{\r
XTmrCtr xTimer;\r
-const unsigned long ulCounterValue = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
-unsigned portBASE_TYPE uxMask;\r
+const uint32_t ulCounterValue = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
+UBaseType_t uxMask;\r
\r
/* The OPB timer1 is used to generate the tick. Use the provided library\r
functions to enable the timer and set the tick frequency. */\r
*/\r
void vTaskISRHandler( void )\r
{\r
-static unsigned long ulPending; \r
+static uint32_t ulPending; \r
\r
/* Which interrupts are pending? */\r
ulPending = XIntc_In32( ( XPAR_INTC_SINGLE_BASEADDR + XIN_IVR_OFFSET ) );\r
{\r
static XIntc_VectorTableEntry *pxTablePtr;\r
static XIntc_Config *pxConfig;\r
- static unsigned long ulInterruptMask;\r
+ static uint32_t ulInterruptMask;\r
\r
- ulInterruptMask = ( unsigned long ) 1 << ulPending;\r
+ ulInterruptMask = ( uint32_t ) 1 << ulPending;\r
\r
/* Get the configuration data using the device ID */\r
- pxConfig = &XIntc_ConfigTable[ ( unsigned long ) XPAR_INTC_SINGLE_DEVICE_ID ];\r
+ pxConfig = &XIntc_ConfigTable[ ( uint32_t ) XPAR_INTC_SINGLE_DEVICE_ID ];\r
\r
pxTablePtr = &( pxConfig->HandlerTable[ ulPending ] );\r
if( pxConfig->AckBeforeService & ( ulInterruptMask ) )\r
*/\r
void vTickISR( void *pvBaseAddress )\r
{\r
-unsigned long ulCSR;\r
+uint32_t ulCSR;\r
\r
/* Increment the RTOS tick - this might cause a task to unblock. */\r
if( xTaskIncrementTick() != pdFALSE )\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
void microblaze_disable_interrupts( void );\r
void vPortEnterCritical( void );\r
void vPortExitCritical( void );\r
#define portENTER_CRITICAL() { \\r
- extern unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern UBaseType_t uxCriticalNesting; \\r
microblaze_disable_interrupts(); \\r
uxCriticalNesting++; \\r
}\r
- \r
+\r
#define portEXIT_CRITICAL() { \\r
- extern unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern UBaseType_t uxCriticalNesting; \\r
/* Interrupts are disabled, so we can */ \\r
/* access the variable directly. */ \\r
uxCriticalNesting--; \\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 4\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() asm volatile ( "NOP" )\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* Initialise the interrupt controller instance.\r
*/\r
-static long prvInitialiseInterruptController( void );\r
+static int32_t prvInitialiseInterruptController( void );\r
\r
/* Ensure the interrupt controller instance variable is initialised before it is\r
* used, and that the initialisation only happens once.\r
*/\r
-static long prvEnsureInterruptControllerIsInitialised( void );\r
+static int32_t prvEnsureInterruptControllerIsInitialised( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task\r
maintains its own count, so this variable is saved as part of the task\r
context. */\r
-volatile unsigned portBASE_TYPE uxCriticalNesting = portINITIAL_NESTING_VALUE;\r
+volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE;\r
\r
/* This port uses a separate stack for interrupts. This prevents the stack of\r
every task needing to be large enough to hold an entire interrupt stack on top\r
of the task stack. */\r
-unsigned long *pulISRStack;\r
+uint32_t *pulISRStack;\r
\r
/* If an interrupt requests a context switch, then ulTaskSwitchRequested will\r
get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt\r
an unusual mechanism, but is used for this port because a single interrupt can\r
cause the servicing of multiple peripherals - and it is inefficient to call\r
vTaskSwitchContext() multiple times as each peripheral is serviced. */\r
-volatile unsigned long ulTaskSwitchRequested = 0UL;\r
+volatile uint32_t ulTaskSwitchRequested = 0UL;\r
\r
/* The instance of the interrupt controller used by this port. This is required\r
by the Xilinx library API functions. */\r
*\r
* See the portable.h header file.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
extern void *_SDA2_BASE_, *_SDA_BASE_;\r
-const unsigned long ulR2 = ( unsigned long ) &_SDA2_BASE_;\r
-const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;\r
+const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;\r
+const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;\r
\r
/* Place a few bytes of known values on the bottom of the stack.\r
This is essential for the Microblaze port and these lines must\r
not be omitted. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000;\r
pxTopOfStack--;\r
\r
#if XPAR_MICROBLAZE_0_USE_FPU == 1\r
\r
/* First stack an initial value for the critical section nesting. This\r
is initialised to zero. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00;\r
+ *pxTopOfStack = ( StackType_t ) 0x00;\r
\r
/* R0 is always zero. */\r
/* R1 is the SP. */\r
\r
/* Place an initial value for all the general purpose registers. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulR2; /* R2 - read only small data area. */\r
+ *pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3 - return values and temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4 - return values and temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;/* R5 contains the function call parameters. */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;/* R5 contains the function call parameters. */\r
\r
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */\r
+ *pxTopOfStack = ( StackType_t ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7 - other parameters and temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x07; /* R7 - other parameters and temporaries. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8 - other parameters and temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x08; /* R8 - other parameters and temporaries. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9 - other parameters and temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x09; /* R9 - other parameters and temporaries. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0a; /* R10 - other parameters and temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x0a; /* R10 - other parameters and temporaries. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0b; /* R11 - temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x0b; /* R11 - temporaries. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0c; /* R12 - temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x0c; /* R12 - temporaries. */\r
pxTopOfStack--;\r
#else\r
pxTopOfStack-= 8;\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulR13; /* R13 - read/write small data area. */\r
+ *pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* R14 - return address for interrupt. */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) NULL; /* R15 - return address for subroutine. */\r
+ *pxTopOfStack = ( StackType_t ) NULL; /* R15 - return address for subroutine. */\r
\r
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R16 - return address for trap (debugger). */\r
+ *pxTopOfStack = ( StackType_t ) 0x10; /* R16 - return address for trap (debugger). */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R17 - return address for exceptions, if configured. */\r
+ *pxTopOfStack = ( StackType_t ) 0x11; /* R17 - return address for exceptions, if configured. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */\r
+ *pxTopOfStack = ( StackType_t ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */\r
pxTopOfStack--;\r
#else\r
pxTopOfStack -= 4;\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */\r
\r
#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */\r
+ *pxTopOfStack = ( StackType_t ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R21 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x15; /* R21 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x16; /* R22 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x16; /* R22 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x17; /* R23 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x17; /* R23 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R24 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x18; /* R24 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R25 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x19; /* R25 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */\r
+ *pxTopOfStack = ( StackType_t ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */\r
pxTopOfStack--;\r
#else\r
pxTopOfStack -= 13;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void ( vPortStartFirstTask )( void );\r
-extern unsigned long _stack[];\r
+extern uint32_t _stack[];\r
\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
this function is called.\r
vApplicationSetupTimerInterrupt();\r
\r
/* Reuse the stack from main() as the stack for the interrupts/exceptions. */\r
- pulISRStack = ( unsigned long * ) _stack;\r
+ pulISRStack = ( uint32_t * ) _stack;\r
\r
/* Ensure there is enough space for the functions called from the interrupt\r
service routines to write back into the stack frame of the caller. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortEnableInterrupt( unsigned char ucInterruptID )\r
+void vPortEnableInterrupt( uint8_t ucInterruptID )\r
{\r
-long lReturn;\r
+int32_t lReturn;\r
\r
/* An API function is provided to enable an interrupt in the interrupt\r
controller because the interrupt controller instance variable is private\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortDisableInterrupt( unsigned char ucInterruptID )\r
+void vPortDisableInterrupt( uint8_t ucInterruptID )\r
{\r
-long lReturn;\r
+int32_t lReturn;\r
\r
/* An API function is provided to disable an interrupt in the interrupt\r
controller because the interrupt controller instance variable is private\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
+BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
{\r
-long lReturn;\r
+int32_t lReturn;\r
\r
/* An API function is provided to install an interrupt handler because the\r
interrupt controller instance variable is private to this file. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static long prvEnsureInterruptControllerIsInitialised( void )\r
+static int32_t prvEnsureInterruptControllerIsInitialised( void )\r
{\r
-static long lInterruptControllerInitialised = pdFALSE;\r
-long lReturn;\r
+static int32_t lInterruptControllerInitialised = pdFALSE;\r
+int32_t lReturn;\r
\r
/* Ensure the interrupt controller instance variable is initialised before\r
it is used, and that the initialisation only happens once. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static long prvInitialiseInterruptController( void )\r
+static int32_t prvInitialiseInterruptController( void )\r
{\r
-long lStatus;\r
+int32_t lStatus;\r
\r
lStatus = XIntc_Initialize( &xInterruptControllerInstance, configINTERRUPT_CONTROLLER_TO_USE );\r
\r
\r
/* This variable is set in the exception entry code, before\r
vPortExceptionHandler is called. */\r
-unsigned long *pulStackPointerOnFunctionEntry = NULL;\r
+uint32_t *pulStackPointerOnFunctionEntry = NULL;\r
\r
/* This is the structure that is filled with the MicroBlaze context as it\r
existed immediately prior to the exception occurrence. A pointer to this\r
xRegisterDump.ulR29 = mfgpr( R29 );\r
xRegisterDump.ulR30 = mfgpr( R30 );\r
xRegisterDump.ulR31 = mfgpr( R31 );\r
- xRegisterDump.ulR1_SP = ( ( unsigned long ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;\r
+ xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;\r
xRegisterDump.ulEAR = mfear();\r
xRegisterDump.ulESR = mfesr();\r
xRegisterDump.ulEDR = mfedr();\r
/* Also fill in a string that describes what type of exception this is.\r
The string uses the same ID names as defined in the MicroBlaze standard\r
library exception header files. */\r
- switch( ( unsigned long ) pvExceptionID )\r
+ switch( ( uint32_t ) pvExceptionID )\r
{\r
case XEXC_ID_FSL :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FSL";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL";\r
break;\r
\r
case XEXC_ID_UNALIGNED_ACCESS :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_UNALIGNED_ACCESS";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS";\r
break;\r
\r
case XEXC_ID_ILLEGAL_OPCODE :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_ILLEGAL_OPCODE";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE";\r
break;\r
\r
case XEXC_ID_M_AXI_I_EXCEPTION :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";\r
break;\r
\r
case XEXC_ID_M_AXI_D_EXCEPTION :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";\r
break;\r
\r
case XEXC_ID_DIV_BY_ZERO :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_DIV_BY_ZERO";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO";\r
break;\r
\r
case XEXC_ID_STACK_VIOLATION :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";\r
break;\r
\r
#if XPAR_MICROBLAZE_0_USE_FPU == 1\r
\r
case XEXC_ID_FPU :\r
- xRegisterDump.pcExceptionCause = ( signed char * const ) "XEXC_ID_FPU see ulFSR value";\r
+ xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FPU see ulFSR value";\r
break;\r
\r
#endif /* XPAR_MICROBLAZE_0_USE_FPU */\r
\r
void vPortExceptionsInstallHandlers( void )\r
{\r
-static unsigned long ulHandlersAlreadyInstalled = pdFALSE;\r
+static uint32_t ulHandlersAlreadyInstalled = pdFALSE;\r
\r
if( ulHandlersAlreadyInstalled == pdFALSE )\r
{\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#include <xparameters.h>\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros and functions. */\r
void microblaze_disable_interrupts( void );\r
void vPortEnterCritical( void );\r
void vPortExitCritical( void );\r
#define portENTER_CRITICAL() { \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
microblaze_disable_interrupts(); \\r
uxCriticalNesting++; \\r
}\r
\r
#define portEXIT_CRITICAL() { \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
/* Interrupts are disabled, so we can */ \\r
/* access the variable directly. */ \\r
uxCriticalNesting--; \\r
context, if the flag is not false. This is done to prevent multiple calls to\r
vTaskSwitchContext() being made from a single interrupt, as a single interrupt\r
can result in multiple peripherals being serviced. */\r
-extern volatile unsigned long ulTaskSwitchRequested;\r
+extern volatile uint32_t ulTaskSwitchRequested;\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) ulTaskSwitchRequested = 1\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 4\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() asm volatile ( "NOP" )\r
/*-----------------------------------------------------------*/\r
\r
{\r
/* The following structure members hold the values of the MicroBlaze\r
registers at the time the exception was raised. */\r
- unsigned long ulR1_SP;\r
- unsigned long ulR2_small_data_area;\r
- unsigned long ulR3;\r
- unsigned long ulR4;\r
- unsigned long ulR5;\r
- unsigned long ulR6;\r
- unsigned long ulR7;\r
- unsigned long ulR8;\r
- unsigned long ulR9;\r
- unsigned long ulR10;\r
- unsigned long ulR11;\r
- unsigned long ulR12;\r
- unsigned long ulR13_read_write_small_data_area;\r
- unsigned long ulR14_return_address_from_interrupt;\r
- unsigned long ulR15_return_address_from_subroutine;\r
- unsigned long ulR16_return_address_from_trap;\r
- unsigned long ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */\r
- unsigned long ulR18;\r
- unsigned long ulR19;\r
- unsigned long ulR20;\r
- unsigned long ulR21;\r
- unsigned long ulR22;\r
- unsigned long ulR23;\r
- unsigned long ulR24;\r
- unsigned long ulR25;\r
- unsigned long ulR26;\r
- unsigned long ulR27;\r
- unsigned long ulR28;\r
- unsigned long ulR29;\r
- unsigned long ulR30;\r
- unsigned long ulR31;\r
- unsigned long ulPC;\r
- unsigned long ulESR;\r
- unsigned long ulMSR;\r
- unsigned long ulEAR;\r
- unsigned long ulFSR;\r
- unsigned long ulEDR;\r
+ uint32_t ulR1_SP;\r
+ uint32_t ulR2_small_data_area;\r
+ uint32_t ulR3;\r
+ uint32_t ulR4;\r
+ uint32_t ulR5;\r
+ uint32_t ulR6;\r
+ uint32_t ulR7;\r
+ uint32_t ulR8;\r
+ uint32_t ulR9;\r
+ uint32_t ulR10;\r
+ uint32_t ulR11;\r
+ uint32_t ulR12;\r
+ uint32_t ulR13_read_write_small_data_area;\r
+ uint32_t ulR14_return_address_from_interrupt;\r
+ uint32_t ulR15_return_address_from_subroutine;\r
+ uint32_t ulR16_return_address_from_trap;\r
+ uint32_t ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */\r
+ uint32_t ulR18;\r
+ uint32_t ulR19;\r
+ uint32_t ulR20;\r
+ uint32_t ulR21;\r
+ uint32_t ulR22;\r
+ uint32_t ulR23;\r
+ uint32_t ulR24;\r
+ uint32_t ulR25;\r
+ uint32_t ulR26;\r
+ uint32_t ulR27;\r
+ uint32_t ulR28;\r
+ uint32_t ulR29;\r
+ uint32_t ulR30;\r
+ uint32_t ulR31;\r
+ uint32_t ulPC;\r
+ uint32_t ulESR;\r
+ uint32_t ulMSR;\r
+ uint32_t ulEAR;\r
+ uint32_t ulFSR;\r
+ uint32_t ulEDR;\r
\r
/* A human readable description of the exception cause. The strings used\r
are the same as the #define constant names found in the\r
microblaze_exceptions_i.h header file */\r
- signed char *pcExceptionCause;\r
+ int8_t *pcExceptionCause;\r
\r
/* The human readable name of the task that was running at the time the\r
exception occurred. This is the name that was given to the task when the\r
task was created using the FreeRTOS xTaskCreate() API function. */\r
- signed char *pcCurrentTaskName;\r
+ int8_t *pcCurrentTaskName;\r
\r
/* The handle of the task that was running a the time the exception\r
occurred. */\r
\r
\r
/*\r
- * Installs pxHandler as the interrupt handler for the peripheral specified by \r
+ * Installs pxHandler as the interrupt handler for the peripheral specified by\r
* the ucInterruptID parameter.\r
*\r
* ucInterruptID:\r
- * \r
+ *\r
* The ID of the peripheral that will have pxHandler assigned as its interrupt\r
- * handler. Peripheral IDs are defined in the xparameters.h header file, which \r
- * is itself part of the BSP project. For example, in the official demo \r
- * application for this port, xparameters.h defines the following IDs for the \r
+ * handler. Peripheral IDs are defined in the xparameters.h header file, which\r
+ * is itself part of the BSP project. For example, in the official demo\r
+ * application for this port, xparameters.h defines the following IDs for the\r
* four possible interrupt sources:\r
*\r
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.\r
*\r
*\r
* pxHandler:\r
- * \r
+ *\r
* A pointer to the interrupt handler function itself. This must be a void\r
* function that takes a (void *) parameter.\r
*\r
* the peripheral instance variable, so it can be accessed from inside the\r
* handler function.\r
*\r
- * \r
+ *\r
* pdPASS is returned if the function executes successfully. Any other value\r
* being returned indicates that the function did not execute correctly.\r
*/\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
+BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
\r
\r
/*\r
- * Enables the interrupt, within the interrupt controller, for the peripheral \r
+ * Enables the interrupt, within the interrupt controller, for the peripheral\r
* specified by the ucInterruptID parameter.\r
*\r
* ucInterruptID:\r
- * \r
+ *\r
* The ID of the peripheral that will have its interrupt enabled in the\r
- * interrupt controller. Peripheral IDs are defined in the xparameters.h header \r
- * file, which is itself part of the BSP project. For example, in the official \r
- * demo application for this port, xparameters.h defines the following IDs for \r
+ * interrupt controller. Peripheral IDs are defined in the xparameters.h header\r
+ * file, which is itself part of the BSP project. For example, in the official\r
+ * demo application for this port, xparameters.h defines the following IDs for\r
* the four possible interrupt sources:\r
*\r
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.\r
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.\r
*\r
*/\r
-void vPortEnableInterrupt( unsigned char ucInterruptID );\r
+void vPortEnableInterrupt( uint8_t ucInterruptID );\r
\r
/*\r
- * Disables the interrupt, within the interrupt controller, for the peripheral \r
+ * Disables the interrupt, within the interrupt controller, for the peripheral\r
* specified by the ucInterruptID parameter.\r
*\r
* ucInterruptID:\r
- * \r
+ *\r
* The ID of the peripheral that will have its interrupt disabled in the\r
- * interrupt controller. Peripheral IDs are defined in the xparameters.h header \r
- * file, which is itself part of the BSP project. For example, in the official \r
- * demo application for this port, xparameters.h defines the following IDs for \r
+ * interrupt controller. Peripheral IDs are defined in the xparameters.h header\r
+ * file, which is itself part of the BSP project. For example, in the official\r
+ * demo application for this port, xparameters.h defines the following IDs for\r
* the four possible interrupt sources:\r
*\r
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.\r
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.\r
*\r
*/\r
-void vPortDisableInterrupt( unsigned char ucInterruptID );\r
+void vPortDisableInterrupt( uint8_t ucInterruptID );\r
\r
/*\r
* This is an application defined callback function used to install the tick\r
- * interrupt handler. It is provided as an application callback because the \r
- * kernel will run on lots of different MicroBlaze and FPGA configurations - not \r
- * all of which will have the same timer peripherals defined or available. This \r
- * example uses the AXI Timer 0. If that is available on your hardware platform \r
- * then this example callback implementation should not require modification. \r
- * The name of the interrupt handler that should be installed is vPortTickISR(), \r
+ * interrupt handler. It is provided as an application callback because the\r
+ * kernel will run on lots of different MicroBlaze and FPGA configurations - not\r
+ * all of which will have the same timer peripherals defined or available. This\r
+ * example uses the AXI Timer 0. If that is available on your hardware platform\r
+ * then this example callback implementation should not require modification.\r
+ * The name of the interrupt handler that should be installed is vPortTickISR(),\r
* which the function below declares as an extern.\r
- */ \r
+ */\r
void vApplicationSetupTimerInterrupt( void );\r
\r
-/* \r
+/*\r
* This is an application defined callback function used to clear whichever\r
* interrupt was installed by the the vApplicationSetupTimerInterrupt() callback\r
- * function - in this case the interrupt generated by the AXI timer. It is \r
- * provided as an application callback because the kernel will run on lots of \r
- * different MicroBlaze and FPGA configurations - not all of which will have the \r
- * same timer peripherals defined or available. This example uses the AXI Timer 0. \r
- * If that is available on your hardware platform then this example callback \r
+ * function - in this case the interrupt generated by the AXI timer. It is\r
+ * provided as an application callback because the kernel will run on lots of\r
+ * different MicroBlaze and FPGA configurations - not all of which will have the\r
+ * same timer peripherals defined or available. This example uses the AXI Timer 0.\r
+ * If that is available on your hardware platform then this example callback\r
* implementation should not require modification provided the example definition\r
- * of vApplicationSetupTimerInterrupt() is also not modified. \r
+ * of vApplicationSetupTimerInterrupt() is also not modified.\r
*/\r
void vApplicationClearTimerInterrupt( void );\r
\r
/*\r
* vPortExceptionsInstallHandlers() is only available when the MicroBlaze\r
- * is configured to include exception functionality, and \r
+ * is configured to include exception functionality, and\r
* configINSTALL_EXCEPTION_HANDLERS is set to 1 in FreeRTOSConfig.h.\r
*\r
* vPortExceptionsInstallHandlers() installs the FreeRTOS exception handler\r
- * for every possible exception cause. \r
+ * for every possible exception cause.\r
*\r
* vPortExceptionsInstallHandlers() can be called explicitly from application\r
* code. After that is done, the default FreeRTOS exception handler that will\r
- * have been installed can be replaced for any specific exception cause by using \r
+ * have been installed can be replaced for any specific exception cause by using\r
* the standard Xilinx library function microblaze_register_exception_handler().\r
*\r
- * If vPortExceptionsInstallHandlers() is not called explicitly by the \r
+ * If vPortExceptionsInstallHandlers() is not called explicitly by the\r
* application, it will be called automatically by the kernel the first time\r
- * xPortInstallInterruptHandler() is called. At that time, any exception \r
+ * xPortInstallInterruptHandler() is called. At that time, any exception\r
* handlers that may have already been installed will be replaced.\r
*\r
* See the description of vApplicationExceptionRegisterDump() for information\r
void vPortExceptionsInstallHandlers( void );\r
\r
/*\r
- * The FreeRTOS exception handler fills an xPortRegisterDump structure (defined \r
- * in portmacro.h) with the MicroBlaze context, as it was at the time the \r
+ * The FreeRTOS exception handler fills an xPortRegisterDump structure (defined\r
+ * in portmacro.h) with the MicroBlaze context, as it was at the time the\r
* exception occurred. The exception handler then calls\r
* vApplicationExceptionRegisterDump(), passing in the completed\r
* xPortRegisterDump structure as its parameter.\r
*\r
* The FreeRTOS kernel provides its own implementation of\r
- * vApplicationExceptionRegisterDump(), but the kernel provided implementation \r
- * is declared as being 'weak'. The weak definition allows the application \r
- * writer to provide their own implementation, should they wish to use the \r
+ * vApplicationExceptionRegisterDump(), but the kernel provided implementation\r
+ * is declared as being 'weak'. The weak definition allows the application\r
+ * writer to provide their own implementation, should they wish to use the\r
* register dump information. For example, an implementation could be provided\r
* that wrote the register dump data to a display, or a UART port.\r
*/\r
#include "task.h"\r
\r
/* Interrupts are enabled. */\r
-#define portINITIAL_ESTATUS ( portSTACK_TYPE ) 0x01 \r
+#define portINITIAL_ESTATUS ( StackType_t ) 0x01 \r
\r
/*-----------------------------------------------------------*/\r
\r
\r
/*-----------------------------------------------------------*/\r
\r
-static void prvReadGp( unsigned long *ulValue )\r
+static void prvReadGp( uint32_t *ulValue )\r
{\r
asm( "stw gp, (%0)" :: "r"(ulValue) );\r
}\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{ \r
-portSTACK_TYPE *pxFramePointer = pxTopOfStack - 1;\r
-portSTACK_TYPE xGlobalPointer;\r
+StackType_t *pxFramePointer = pxTopOfStack - 1;\r
+StackType_t xGlobalPointer;\r
\r
prvReadGp( &xGlobalPointer ); \r
\r
*pxTopOfStack = 0xdeadbeef;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxFramePointer; \r
+ *pxTopOfStack = ( StackType_t ) pxFramePointer; \r
pxTopOfStack--;\r
\r
*pxTopOfStack = xGlobalPointer; \r
/* Space for R23 to R16. */\r
pxTopOfStack -= 9;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; \r
+ *pxTopOfStack = ( StackType_t ) pxCode; \r
pxTopOfStack--;\r
\r
*pxTopOfStack = portINITIAL_ESTATUS; \r
/* Space for R15 to R5. */ \r
pxTopOfStack -= 12;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; \r
+ *pxTopOfStack = ( StackType_t ) pvParameters; \r
\r
/* Space for R3 to R1, muldiv and RA. */\r
pxTopOfStack -= 5;\r
/* \r
* See header file for description. \r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#include "sys/alt_irq.h"\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
#define portNOP() asm volatile ( "NOP" )\r
#define portCRITICAL_NESTING_IN_TCB 1\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
extern void vTaskSwitchContext( void );\r
#define portYIELD() asm volatile ( "trap" );\r
* \r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Place a known value at the bottom of the stack for debugging. */\r
*pxTopOfStack = 0xDEADBEEF;\r
pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */\r
\r
/* Parameters in R13. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */\r
+ *pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */\r
pxTopOfStack -= 10;\r
\r
/* Parameters in R3. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* Parameters in R2. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_; /* address of the second small data area */\r
+ *pxTopOfStack = ( StackType_t ) &_SDA2_BASE_; /* address of the second small data area */\r
pxTopOfStack--;\r
\r
/* R1 is the stack pointer so is omitted. */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x00000000UL; /* CTR. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler; /* LR. */\r
+ *pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* LR. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* SRR0. */\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_MSR;/* SRR1. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */\r
+ *pxTopOfStack = ( StackType_t ) vPortEndScheduler;/* Next LR. */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x00000000UL;/* Backchain. */\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
prvSetupTimerInterrupt();\r
XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
+const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
\r
XTime_PITClearInterrupt();\r
XTime_FITClearInterrupt();\r
\r
void vPortISRHandler( void *pvNullDoNotUse )\r
{\r
-unsigned long ulInterruptStatus, ulInterruptMask = 1UL;\r
-portBASE_TYPE xInterruptNumber;\r
+uint32_t ulInterruptStatus, ulInterruptMask = 1UL;\r
+BaseType_t xInterruptNumber;\r
XIntc_Config *pxInterruptController;\r
XIntc_VectorTableEntry *pxTable;\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
+BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
{\r
-portBASE_TYPE xReturn = pdFAIL;\r
+BaseType_t xReturn = pdFAIL;\r
\r
/* This function is defined here so the scope of xInterruptController can\r
remain within this file. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* This port uses the critical nesting count from the TCB rather than\r
maintaining a separate value and then saving this value in the task stack. */\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() asm volatile ( "NOP" )\r
\r
/* There are 32 * 32bit floating point regieters, plus the FPSCR to save. */\r
\r
/* Port specific interrupt handling functions. */\r
void vPortSetupInterruptController( void );\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
+BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
\r
#ifdef __cplusplus\r
}\r
*\r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Place a known value at the bottom of the stack for debugging. */\r
*pxTopOfStack = 0xDEADBEEF;\r
pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */\r
\r
/* Parameters in R13. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */\r
+ *pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */\r
pxTopOfStack -= 10;\r
\r
/* Parameters in R3. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* Parameters in R2. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_; /* address of the second small data area */\r
+ *pxTopOfStack = ( StackType_t ) &_SDA2_BASE_; /* address of the second small data area */\r
pxTopOfStack--;\r
\r
/* R1 is the stack pointer so is omitted. */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x00000000UL; /* CTR. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler; /* LR. */\r
+ *pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* LR. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* SRR0. */\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_MSR;/* SRR1. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */\r
+ *pxTopOfStack = ( StackType_t ) vPortEndScheduler;/* Next LR. */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x00000000UL;/* Backchain. */\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
prvSetupTimerInterrupt();\r
XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned long ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
+const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
\r
XTime_DECClearInterrupt();\r
XTime_FITClearInterrupt();\r
\r
void vPortISRHandler( void *pvNullDoNotUse )\r
{\r
-unsigned long ulInterruptStatus, ulInterruptMask = 1UL;\r
-portBASE_TYPE xInterruptNumber;\r
+uint32_t ulInterruptStatus, ulInterruptMask = 1UL;\r
+BaseType_t xInterruptNumber;\r
XIntc_Config *pxInterruptController;\r
XIntc_VectorTableEntry *pxTable;\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
+BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
{\r
-portBASE_TYPE xReturn = pdFAIL;\r
+BaseType_t xReturn = pdFAIL;\r
\r
/* This function is defined here so the scope of xInterruptController can\r
remain within this file. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* This port uses the critical nesting count from the TCB rather than\r
maintaining a separate value and then saving this value in the task stack. */\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() asm volatile ( "NOP" )\r
\r
/* There are 32 * 32bit floating point regieters, plus the FPSCR to save. */\r
\r
/* Port specific interrupt handling functions. */\r
void vPortSetupInterruptController( void );\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
+BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
\r
#ifdef __cplusplus\r
}\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
PSW is set with U and I set, and PM and IPL clear. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )\r
\r
/* The peripheral clock is divided by this value before being supplying the\r
CMT. */\r
* instruction.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static void prvSleep( portTickType xExpectedIdleTime );\r
+ static void prvSleep( TickType_t xExpectedIdleTime );\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*-----------------------------------------------------------*/\r
extern void *pxCurrentTCB;\r
\r
/* Calculate how many clock increments make up a single tick period. */\r
-static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
+static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
basically how far into the future an interrupt can be generated. Set\r
during initialisation. This is the maximum possible value that the\r
compare match register can hold divided by ulMatchValueForOneTick. */\r
- static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
+ static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
\r
/* Flag set from the tick interrupt to allow the sleep processing to know if\r
sleep mode was exited because of a tick interrupt, or an interrupt\r
compensate for the lost time. The large difference between the divided CMT\r
clock and the CPU clock means it is likely ulStoppedTimerCompensation will\r
equal zero - and be optimised away. */\r
- static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );\r
+ static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );\r
\r
#endif\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Offset to end up on 8 byte boundary. */\r
pxTopOfStack--;\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_PSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
\r
/* When debugging it can be useful if every register is set to a known\r
value. Otherwise code space can be saved by just setting the registers\r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x12345678; /* Accumulator. */\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Use pxCurrentTCB just so it does not get optimised away. */\r
if( pxCurrentTCB != NULL )\r
\r
/* If this is the first tick since exiting tickless mode then the CMT\r
compare match value needs resetting. */\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;\r
}\r
#endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned long ulPortGetIPL( void )\r
+uint32_t ulPortGetIPL( void )\r
{\r
__asm volatile\r
(\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortSetIPL( unsigned long ulNewIPL )\r
+void vPortSetIPL( uint32_t ulNewIPL )\r
{\r
__asm volatile\r
(\r
CMT0.CMCR.BIT.CMIE = 1;\r
\r
/* Set the compare match value. */\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;\r
\r
/* Divide the PCLK. */\r
#if portCLOCK_DIVISOR == 512\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- static void prvSleep( portTickType xExpectedIdleTime )\r
+ static void prvSleep( TickType_t xExpectedIdleTime )\r
{\r
/* Allow the application to define some pre-sleep processing. */\r
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;\r
+ uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;\r
eSleepModeStatus eSleepAction;\r
\r
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */\r
\r
/* Adjust the match value to take into account that the current\r
time slice is already partially complete. */\r
- ulMatchValue -= ( unsigned long ) CMT0.CMCNT;\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ ulMatchValue -= ( uint32_t ) CMT0.CMCNT;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
\r
/* Restart the CMT to count up to the new match value. */\r
CMT0.CMCNT = 0;\r
/* Nothing to do here. */\r
}\r
\r
- ulCurrentCount = ( unsigned long ) CMT0.CMCNT;\r
+ ulCurrentCount = ( uint32_t ) CMT0.CMCNT;\r
\r
if( ulTickFlag != pdFALSE )\r
{\r
exited. Reset the match value with whatever remains of this\r
tick period. */\r
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
\r
/* The tick interrupt handler will already have pended the tick\r
processing in the kernel. As the pending tick will be\r
/* The match value is set to whatever fraction of a single tick\r
period remains. */\r
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
}\r
\r
/* Restart the CMT so it runs up to the match value. The match value\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() __asm volatile( "NOP" )\r
\r
/* Save clobbered register, set ITU SWINR (at address 0x872E0), read the value\r
\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) { portYIELD(); }\r
\r
-/* These macros should not be called directly, but through the \r
-taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is \r
-performed if configASSERT() is defined to ensure an assertion handler does not \r
-inadvertently attempt to lower the IPL when the call to assert was triggered \r
-because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY \r
-when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API \r
-functions are those that end in FromISR. FreeRTOS maintains a separate \r
-interrupt API to ensure API function and interrupt entry is as fast and as \r
+/* These macros should not be called directly, but through the\r
+taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is\r
+performed if configASSERT() is defined to ensure an assertion handler does not\r
+inadvertently attempt to lower the IPL when the call to assert was triggered\r
+because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API\r
+functions are those that end in FromISR. FreeRTOS maintains a separate\r
+interrupt API to ensure API function and interrupt entry is as fast and as\r
simple as possible. */\r
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" )\r
#ifdef configASSERT\r
#define portEXIT_CRITICAL() vTaskExitCritical()\r
\r
/* As this port allows interrupt nesting... */\r
-unsigned long ulPortGetIPL( void ) __attribute__((naked));\r
-void vPortSetIPL( unsigned long ulNewIPL ) __attribute__((naked));\r
+uint32_t ulPortGetIPL( void ) __attribute__((naked));\r
+void vPortSetIPL( uint32_t ulNewIPL ) __attribute__((naked));\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )\r
\r
/* Tickless idle/low power functionality. */\r
#if configUSE_TICKLESS_IDLE == 1\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
#endif\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
PSW is set with U and I set, and PM and IPL clear. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )\r
-#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )\r
+#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )\r
\r
/* These macros allow a critical section to be added around the call to\r
xTaskIncrementTick(), which is only ever called from interrupts at the kernel\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* R0 is not included as it is the stack pointer. */\r
\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_PSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
\r
/* When debugging it can be useful if every register is set to a known\r
value. Otherwise code space can be saved by just setting the registers\r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_FPSW;\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vApplicationSetupTimerInterrupt( void );\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned long ulPortGetIPL( void )\r
+uint32_t ulPortGetIPL( void )\r
{\r
__asm volatile\r
(\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortSetIPL( unsigned long ulNewIPL )\r
+void vPortSetIPL( uint32_t ulNewIPL )\r
{\r
__asm volatile\r
(\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() __asm volatile( "NOP" )\r
\r
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"\r
where portITU_SWINTR is the location of the software interrupt register\r
-(0x000872E0). Don't rely on the assembler to select a register, so instead \r
+(0x000872E0). Don't rely on the assembler to select a register, so instead\r
save and restore clobbered registers manually. */\r
#define portYIELD() \\r
__asm volatile \\r
\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()\r
\r
-/* These macros should not be called directly, but through the \r
-taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is \r
-performed if configASSERT() is defined to ensure an assertion handler does not \r
-inadvertently attempt to lower the IPL when the call to assert was triggered \r
-because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY \r
-when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API \r
-functions are those that end in FromISR. FreeRTOS maintains a separate \r
-interrupt API to ensure API function and interrupt entry is as fast and as \r
+/* These macros should not be called directly, but through the\r
+taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is\r
+performed if configASSERT() is defined to ensure an assertion handler does not\r
+inadvertently attempt to lower the IPL when the call to assert was triggered\r
+because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API\r
+functions are those that end in FromISR. FreeRTOS maintains a separate\r
+interrupt API to ensure API function and interrupt entry is as fast and as\r
simple as possible. */\r
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" )\r
#ifdef configASSERT\r
#define portEXIT_CRITICAL() vTaskExitCritical()\r
\r
/* As this port allows interrupt nesting... */\r
-unsigned long ulPortGetIPL( void ) __attribute__((naked));\r
-void vPortSetIPL( unsigned long ulNewIPL ) __attribute__((naked));\r
+uint32_t ulPortGetIPL( void ) __attribute__((naked));\r
+void vPortSetIPL( uint32_t ulNewIPL ) __attribute__((naked));\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )\r
\r
#include "task.h"\r
\r
/* Constants required to setup the initial stack. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
/* Prescale used on the timer clock when calculating the tick period. */\r
#define portPRESCALE 20\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
#ifdef THUMB_INTERWORK\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortISRStartFirstTask( void );\r
\r
#include "task.h"\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm volatile ( "SWI 0" )\r
#define portNOP() asm volatile ( "NOP" )\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
/*\r
* The interrupt management utilities can only be called from ARM mode. When\r
- * THUMB_INTERWORK is defined the utilities are defined as functions in \r
- * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not \r
+ * THUMB_INTERWORK is defined the utilities are defined as functions in\r
+ * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not\r
* defined then the utilities are defined as macros here - as per other ports.\r
*/\r
\r
\r
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()\r
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()\r
- \r
+\r
#else\r
\r
#define portDISABLE_INTERRUPTS() \\r
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \\r
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \\r
"LDMIA SP!, {R0} " ) /* Pop R0. */\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
asm volatile ( \\r
"STMDB SP!, {R0} \n\t" /* Push R0. */ \\r
\r
#define portENTER_CRITICAL() vPortEnterCritical();\r
#define portEXIT_CRITICAL() vPortExitCritical();\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) \\r
vTaskSwitchContext(); \\r
} \\r
}\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
/*-----------------------------------------------------------*/\r
\r
/* This reference is required by the save/restore context macros. */\r
-extern volatile unsigned long *pxCurrentTCB;\r
+extern volatile uint32_t *pxCurrentTCB;\r
\r
/* Precalculate the compare match value at compile time. */\r
-static const unsigned long ulCompareMatchValue = ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ );\r
+static const uint32_t ulCompareMatchValue = ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ );\r
\r
/*-----------------------------------------------------------*/\r
\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned long *pulUpperCSA = NULL;\r
-unsigned long *pulLowerCSA = NULL;\r
+uint32_t *pulUpperCSA = NULL;\r
+uint32_t *pulLowerCSA = NULL;\r
\r
/* 16 Address Registers (4 Address registers are global), 16 Data\r
Registers, and 3 System Registers.\r
portEXIT_CRITICAL();\r
\r
/* Clear the upper CSA. */\r
- memset( pulUpperCSA, 0, portNUM_WORDS_IN_CSA * sizeof( unsigned long ) );\r
+ memset( pulUpperCSA, 0, portNUM_WORDS_IN_CSA * sizeof( uint32_t ) );\r
\r
/* Upper Context. */\r
- pulUpperCSA[ 2 ] = ( unsigned long )pxTopOfStack; /* A10; Stack Return aka Stack Pointer */\r
+ pulUpperCSA[ 2 ] = ( uint32_t )pxTopOfStack; /* A10; Stack Return aka Stack Pointer */\r
pulUpperCSA[ 1 ] = portSYSTEM_PROGRAM_STATUS_WORD; /* PSW */\r
\r
/* Clear the lower CSA. */\r
- memset( pulLowerCSA, 0, portNUM_WORDS_IN_CSA * sizeof( unsigned long ) );\r
+ memset( pulLowerCSA, 0, portNUM_WORDS_IN_CSA * sizeof( uint32_t ) );\r
\r
/* Lower Context. */\r
- pulLowerCSA[ 8 ] = ( unsigned long ) pvParameters; /* A4; Address Type Parameter Register */\r
- pulLowerCSA[ 1 ] = ( unsigned long ) pxCode; /* A11; Return Address aka RA */\r
+ pulLowerCSA[ 8 ] = ( uint32_t ) pvParameters; /* A4; Address Type Parameter Register */\r
+ pulLowerCSA[ 1 ] = ( uint32_t ) pxCode; /* A11; Return Address aka RA */\r
\r
/* PCXI pointing to the Upper context. */\r
- pulLowerCSA[ 0 ] = ( portINITIAL_PCXI_UPPER_CONTEXT_WORD | ( unsigned long ) portADDRESS_TO_CSA( pulUpperCSA ) );\r
+ pulLowerCSA[ 0 ] = ( portINITIAL_PCXI_UPPER_CONTEXT_WORD | ( uint32_t ) portADDRESS_TO_CSA( pulUpperCSA ) );\r
\r
/* Save the link to the CSA in the top of stack. */\r
- pxTopOfStack = (unsigned long * ) portADDRESS_TO_CSA( pulLowerCSA );\r
+ pxTopOfStack = (uint32_t * ) portADDRESS_TO_CSA( pulLowerCSA );\r
\r
/* DSync to ensure that buffering is not a problem. */\r
_dsync();\r
}\r
/*-----------------------------------------------------------*/\r
\r
-long xPortStartScheduler( void )\r
+int32_t xPortStartScheduler( void )\r
{\r
extern void vTrapInstallHandlers( void );\r
-unsigned long ulMFCR = 0UL;\r
-unsigned long *pulUpperCSA = NULL;\r
-unsigned long *pulLowerCSA = NULL;\r
+uint32_t ulMFCR = 0UL;\r
+uint32_t *pulUpperCSA = NULL;\r
+uint32_t *pulLowerCSA = NULL;\r
\r
/* Interrupts at or below configMAX_SYSCALL_INTERRUPT_PRIORITY are disable\r
when this function is called. */\r
\r
static void prvSystemTickHandler( int iArg )\r
{\r
-unsigned long ulSavedInterruptMask;\r
-unsigned long *pxUpperCSA = NULL;\r
-unsigned long xUpperCSA = 0UL;\r
-extern volatile unsigned long *pxCurrentTCB;\r
-long lYieldRequired;\r
+uint32_t ulSavedInterruptMask;\r
+uint32_t *pxUpperCSA = NULL;\r
+uint32_t xUpperCSA = 0UL;\r
+extern volatile uint32_t *pxCurrentTCB;\r
+int32_t lYieldRequired;\r
\r
/* Just to avoid compiler warnings about unused parameters. */\r
( void ) iArg;\r
* than they can be freed assuming that tasks are being spawned and\r
* deleted frequently.\r
*/\r
-void vPortReclaimCSA( unsigned long *pxTCB )\r
+void vPortReclaimCSA( uint32_t *pxTCB )\r
{\r
-unsigned long pxHeadCSA, pxTailCSA, pxFreeCSA;\r
-unsigned long *pulNextCSA;\r
+uint32_t pxHeadCSA, pxTailCSA, pxFreeCSA;\r
+uint32_t *pulNextCSA;\r
\r
/* A pointer to the first CSA in the list of CSAs consumed by the task is\r
stored in the first element of the tasks TCB structure (where the stack\r
\r
static void prvTrapYield( int iTrapIdentification )\r
{\r
-unsigned long *pxUpperCSA = NULL;\r
-unsigned long xUpperCSA = 0UL;\r
-extern volatile unsigned long *pxCurrentTCB;\r
+uint32_t *pxUpperCSA = NULL;\r
+uint32_t xUpperCSA = 0UL;\r
+extern volatile uint32_t *pxCurrentTCB;\r
\r
switch( iTrapIdentification )\r
{\r
\r
static void prvInterruptYield( int iId )\r
{\r
-unsigned long *pxUpperCSA = NULL;\r
-unsigned long xUpperCSA = 0UL;\r
-extern volatile unsigned long *pxCurrentTCB;\r
+uint32_t *pxUpperCSA = NULL;\r
+uint32_t xUpperCSA = 0UL;\r
+extern volatile uint32_t *pxCurrentTCB;\r
\r
/* Just to remove compiler warnings. */\r
( void ) iId;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned long uxPortSetInterruptMaskFromISR( void )\r
+uint32_t uxPortSetInterruptMaskFromISR( void )\r
{\r
-unsigned long uxReturn = 0UL;\r
+uint32_t uxReturn = 0UL;\r
\r
_disable();\r
uxReturn = _mfcr( $ICR );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*---------------------------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
#define portNOP() __asm volatile( " nop " )\r
#define portCRITICAL_NESTING_IN_TCB 1\r
\r
/*---------------------------------------------------------------------------*/\r
\r
-typedef struct MPU_SETTINGS { unsigned long ulNotUsed; } xMPU_SETTINGS;\r
+typedef struct MPU_SETTINGS { uint32_t ulNotUsed; } xMPU_SETTINGS;\r
\r
/* Define away the instruction from the Restore Context Macro. */\r
#define portPRIVILEGE_BIT 0x0UL\r
/*---------------------------------------------------------------------------*/\r
\r
/* CSA Manipulation. */\r
-#define portCSA_TO_ADDRESS( pCSA ) ( ( unsigned long * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
-#define portADDRESS_TO_CSA( pAddress ) ( ( unsigned long )( ( ( ( (unsigned long)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( unsigned long )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
+#define portCSA_TO_ADDRESS( pCSA ) ( ( uint32_t * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
+#define portADDRESS_TO_CSA( pAddress ) ( ( uint32_t )( ( ( ( (uint32_t)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( uint32_t )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
/*---------------------------------------------------------------------------*/\r
\r
#define portYIELD() _syscall( 0 )\r
\r
/* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
#define portDISABLE_INTERRUPTS() { \\r
- unsigned long ulICR; \\r
+ uint32_t ulICR; \\r
_disable(); \\r
ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \\r
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \\r
\r
/* Clear ICR.CCPN to allow all interrupt priorities. */\r
#define portENABLE_INTERRUPTS() { \\r
- unsigned long ulICR; \\r
+ uint32_t ulICR; \\r
_disable(); \\r
ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \\r
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \\r
\r
/* Set ICR.CCPN to uxSavedMaskValue. */\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedMaskValue ) { \\r
- unsigned long ulICR; \\r
+ uint32_t ulICR; \\r
_disable(); \\r
ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \\r
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \\r
\r
\r
/* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
-extern unsigned long uxPortSetInterruptMaskFromISR( void );\r
+extern uint32_t uxPortSetInterruptMaskFromISR( void );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
\r
/* Pend a priority 1 interrupt, which will take care of the context switch. */\r
* Port specific clean up macro required to free the CSAs that were consumed by\r
* a task that has since been deleted.\r
*/\r
-void vPortReclaimCSA( unsigned long *pxTCB );\r
-#define portCLEAN_UP_TCB( pxTCB ) vPortReclaimCSA( ( unsigned long * ) ( pxTCB ) )\r
+void vPortReclaimCSA( uint32_t *pxTCB );\r
+#define portCLEAN_UP_TCB( pxTCB ) vPortReclaimCSA( ( uint32_t * ) ( pxTCB ) )\r
\r
#ifdef __cplusplus\r
}\r
/*\r
* This reference is required by the Save/Restore Context Macros.\r
*/\r
-extern volatile unsigned long *pxCurrentTCB;\r
+extern volatile uint32_t *pxCurrentTCB;\r
/*-----------------------------------------------------------*/\r
\r
/*\r
\r
/* The critical nesting value is initialised to a non zero value to ensure\r
interrupts don't accidentally become enabled before the scheduler is started. */\r
-#define portINITIAL_CRITICAL_NESTING (( unsigned short ) 10)\r
+#define portINITIAL_CRITICAL_NESTING (( uint16_t ) 10)\r
\r
/* Initial PSW value allocated to a newly created task.\r
* 1100011000000000\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Most ports implement critical sections by placing the interrupt flags on\r
the stack before disabling interrupts. Exiting the critical section is then\r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as this will cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
/*\r
*\r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned long *pulLocal;\r
+uint32_t *pulLocal;\r
\r
#if configMEMORY_MODE == 1\r
{\r
pxTopOfStack--;\r
\r
/* Write in the parameter value. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( unsigned long ) pvParameters;\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( uint32_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* These values are just spacers. The return address of the function\r
would normally be written here. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ *pxTopOfStack = ( StackType_t ) 0xcdcd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ *pxTopOfStack = ( StackType_t ) 0xcdcd;\r
pxTopOfStack--;\r
\r
/* The start address / PSW value is also written in as a 32bit value,\r
pxTopOfStack--;\r
\r
/* Task function start address combined with the PSW. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );\r
pxTopOfStack--;\r
\r
/* An initial value for the AX register. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
}\r
#else\r
pxTopOfStack--;\r
\r
/* Task function start address combined with the PSW. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );\r
pxTopOfStack--;\r
\r
/* The parameter is passed in AX. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
}\r
#endif\r
\r
/* An initial value for the HL register. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
\r
/* CS and ES registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;\r
+ *pxTopOfStack = ( StackType_t ) 0x0F00;\r
pxTopOfStack--;\r
\r
/* Finally the remaining general purpose registers DE and BC */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;\r
+ *pxTopOfStack = ( StackType_t ) 0xDEDE;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;\r
+ *pxTopOfStack = ( StackType_t ) 0xBCBC;\r
pxTopOfStack--;\r
\r
/* Finally the critical section nesting count is set to zero when the task\r
first starts. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
be stored in the task control block for the task. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
this function is called. */\r
TMR05 = 0x0000;\r
\r
/* Set the compare match value according to the tick rate we want. */\r
- TDR05 = ( portTickType ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );\r
+ TDR05 = ( TickType_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );\r
\r
/* Set Timer Array Unit Channel 5 output mode */\r
TOM0 &= ~0x0020;\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned short\r
+#define portSTACK_TYPE uint16_t\r
#define portBASE_TYPE short\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
#if (configUSE_16_BIT_TICKS==1)\r
- typedef unsigned int portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef unsigned int TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned long portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
#define portDISABLE_INTERRUPTS() __asm ( "DI" )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Hardwware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
\r
/* A critical section is exited when the critical section nesting count reaches\r
this value. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
/* In all GICs 255 can be written to the priority mask register to unmask all\r
(but the lowest) interrupt priority. */\r
part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task\r
does not have an FPU context, or any other value if the task does have an FPU\r
context. */\r
-#define portNO_FLOATING_POINT_CONTEXT ( ( portSTACK_TYPE ) 0 )\r
+#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )\r
\r
/* Constants required to setup the initial task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
#define portINTERRUPT_ENABLE_BIT ( 0x80UL )\r
#define portTHUMB_MODE_ADDRESS ( 0x01UL )\r
\r
/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary\r
point is zero. */\r
-#define portBINARY_POINT_BITS ( ( unsigned char ) 0x03 )\r
+#define portBINARY_POINT_BITS ( ( uint8_t ) 0x03 )\r
\r
/* Masks all bits in the APSR other than the mode bits. */\r
#define portAPSR_MODE_BITS_MASK ( 0x1F )\r
a non zero value to ensure interrupts don't inadvertently become unmasked before\r
the scheduler starts. As it is stored as part of the task context it will\r
automatically be set to 0 when the first task is started. */\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then\r
a floating point context must be saved and restored for the task. */\r
-unsigned long ulPortTaskHasFPUContext = pdFALSE;\r
+uint32_t ulPortTaskHasFPUContext = pdFALSE;\r
\r
/* Set to 1 to pend a context switch from an ISR. */\r
-unsigned long ulPortYieldRequired = pdFALSE;\r
+uint32_t ulPortYieldRequired = pdFALSE;\r
\r
/* Counts the interrupt nesting depth. A context switch is only performed if\r
if the nesting depth is 0. */\r
-unsigned long ulPortInterruptNesting = 0UL;\r
+uint32_t ulPortInterruptNesting = 0UL;\r
\r
\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Setup the initial stack of the task. The stack is set exactly as\r
expected by the portRESTORE_CONTEXT() macro.\r
pxTopOfStack--;\r
*pxTopOfStack = NULL;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )\r
{\r
/* The task will start in THUMB mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
pxTopOfStack--;\r
\r
/* Next the return address, which in this case is the start of the task. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
\r
/* Next all the registers other than the stack pointer. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The task will start with a critical nesting count of 0 as interrupts are\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
-unsigned long ulAPSR;\r
+uint32_t ulAPSR;\r
\r
/* Only continue if the CPU is not in User mode. The CPU must be in a\r
Privileged mode for the scheduler to start. */\r
\r
void vPortTaskUsesFPU( void )\r
{\r
-unsigned long ulInitialFPSCR = 0;\r
+uint32_t ulInitialFPSCR = 0;\r
\r
/* A task is registering the fact that it needs an FPU context. Set the\r
FPU flag (which is saved as part of the task context). */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortClearInterruptMask( unsigned long ulNewMaskValue )\r
+void vPortClearInterruptMask( uint32_t ulNewMaskValue )\r
{\r
if( ulNewMaskValue == pdFALSE )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned long ulPortSetInterruptMask( void )\r
+uint32_t ulPortSetInterruptMask( void )\r
{\r
-unsigned long ulReturn;\r
+uint32_t ulReturn;\r
\r
__disable_irq();\r
if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
- #define portSTACK_TYPE unsigned long\r
- #define portBASE_TYPE portLONG\r
- typedef unsigned long portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ #define portSTACK_TYPE uint32_t\r
+ #define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
- #define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+ #define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
\r
/*-----------------------------------------------------------*/\r
/* Called at the end of an ISR that can cause a context switch. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired )\\r
{ \\r
- extern unsigned long ulPortYieldRequired; \\r
+ extern uint32_t ulPortYieldRequired; \\r
\\r
if( xSwitchRequired != pdFALSE ) \\r
{ \\r
\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
- extern unsigned long ulPortSetInterruptMask( void );\r
- extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
+ extern uint32_t ulPortSetInterruptMask( void );\r
+ extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
\r
/* These macros do not globally disable/enable interrupts. They do mask off\r
interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */\r
void vPortTaskUsesFPU( void );\r
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
\r
- #define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
+ #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )\r
\r
/* Architecture specific optimisations. */\r
#define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )\r
\r
#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
-#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
-#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
+#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
\r
#endif /* PORTMACRO_H */\r
\r
#include "task.h"\r
\r
/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t *) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t *) 0xe000e014 )\r
+#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )\r
#define portNVIC_SYSTICK_CLK 0x00000004\r
#define portNVIC_SYSTICK_INT 0x00000002\r
#define portNVIC_SYSTICK_ENABLE 0x00000001\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts.\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11..R4. */\r
\r
return pxTopOfStack;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Make PendSV and SysTick the lowest priority interrupts. */\r
*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
\r
void xPortSysTickHandler( void )\r
{\r
-unsigned long ulPreviousMask;\r
+uint32_t ulPreviousMask;\r
\r
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )\r
+#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )\r
#define portNVIC_PENDSVSET 0x10000000\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET\r
\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulSetInterruptMaskFromISR( void );\r
-extern void vClearInterruptMaskFromISR( unsigned long ulMask );\r
+extern uint32_t ulSetInterruptMaskFromISR( void );\r
+extern void vClearInterruptMaskFromISR( uint32_t ulMask );\r
\r
#define portDISABLE_INTERRUPTS() __asm volatile( "cpsid i" )\r
#define portENABLE_INTERRUPTS() __asm volatile( "cpsie i" )\r
#endif\r
\r
/* Constants required to manipulate the core. Registers first... */\r
-#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
-#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )\r
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )\r
/* ...then bits in the registers. */\r
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )\r
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )\r
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )\r
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )\r
\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
\r
/* Constants required to check the validity of an interrupt priority. */\r
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )\r
-#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
-#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )\r
-#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )\r
-#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )\r
+#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )\r
+#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )\r
+#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )\r
+#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )\r
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )\r
#define portPRIGROUP_SHIFT ( 8UL )\r
\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts. The implementation in this\r
* The number of SysTick increments that make up one tick period.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulTimerCountsForOneTick = 0;\r
+ static uint32_t ulTimerCountsForOneTick = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* 24 bit resolution of the SysTick timer.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* power functionality only.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulStoppedTimerCompensation = 0;\r
+ static uint32_t ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
*/\r
#if ( configASSERT_DEFINED == 1 )\r
- static unsigned char ucMaxSysCallPriority = 0;\r
- static unsigned long ulMaxPRIGROUPValue = 0;\r
- static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
+ static uint8_t ucMaxSysCallPriority = 0;\r
+ static uint32_t ulMaxPRIGROUPValue = 0;\r
+ static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
#endif /* configASSERT_DEFINED */\r
\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
\r
return pxTopOfStack;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
#if( configASSERT_DEFINED == 1 )\r
{\r
- volatile unsigned long ulOriginalPriority;\r
- volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
- volatile unsigned char ucMaxPriorityValue;\r
+ volatile uint32_t ulOriginalPriority;\r
+ volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
+ volatile uint8_t ucMaxPriorityValue;\r
\r
/* Determine the maximum priority from which ISR safe FreeRTOS API\r
functions can be called. ISR safe functions are those that end in\r
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
{\r
ulMaxPRIGROUPValue--;\r
- ucMaxPriorityValue <<= ( unsigned char ) 0x01;\r
+ ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
}\r
\r
/* Shift the priority group value back to its position within the AIRCR\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
- portTickType xModifiableIdleTime;\r
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
+ TickType_t xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
\r
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
- unsigned long ulCalculatedLoadValue;\r
+ uint32_t ulCalculatedLoadValue;\r
\r
/* The tick interrupt has already executed, and the SysTick\r
count reloaded with ulReloadValue. Reset the\r
\r
void vPortValidateInterruptPriority( void )\r
{\r
- unsigned long ulCurrentInterrupt;\r
- unsigned char ucCurrentPriority;\r
+ uint32_t ulCurrentInterrupt;\r
+ uint8_t ucCurrentPriority;\r
\r
/* Obtain the number of the currently executing interrupt. */\r
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
+ typedef uint16_t TickType_t;\r
#define portMAX_DELAY 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
+ typedef uint32_t TickType_t;\r
#define portMAX_DELAY 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04UL ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04UL ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/* Critical section management. */\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMask );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMask );\r
\r
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()\r
#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )\r
\r
/* Tickless idle/low power functionality. */\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
/*-----------------------------------------------------------*/\r
#endif\r
\r
/* Constants required to manipulate the core. Registers first... */\r
-#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
-#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )\r
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )\r
/* ...then bits in the registers. */\r
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )\r
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )\r
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )\r
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )\r
\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
\r
/* Constants required to check the validity of an interrupt priority. */\r
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )\r
-#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
-#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )\r
-#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )\r
-#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )\r
+#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )\r
+#define portMAX_8_BIT_VALUE ( ( int8_t ) 0xff )\r
+#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )\r
+#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )\r
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )\r
#define portPRIGROUP_SHIFT ( 8UL )\r
\r
/* Constants required to manipulate the VFP. */\r
-#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
+#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */\r
#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )\r
\r
/* Constants required to set up the initial stack. */\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts. The implementation in this\r
* The number of SysTick increments that make up one tick period.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulTimerCountsForOneTick = 0;\r
+ static uint32_t ulTimerCountsForOneTick = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* 24 bit resolution of the SysTick timer.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* power functionality only.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulStoppedTimerCompensation = 0;\r
+ static uint32_t ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
*/\r
#if ( configASSERT_DEFINED == 1 )\r
- static unsigned char ucMaxSysCallPriority = 0;\r
- static unsigned long ulMaxPRIGROUPValue = 0;\r
- static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
+ static uint8_t ucMaxSysCallPriority = 0;\r
+ static uint32_t ulMaxPRIGROUPValue = 0;\r
+ static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
#endif /* configASSERT_DEFINED */\r
\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */\r
\r
/* Save code space by skipping register initialisation. */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
\r
/* A save method is being used that requires each task to maintain its\r
own exec return value. */\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
#if( configASSERT_DEFINED == 1 )\r
{\r
- volatile unsigned long ulOriginalPriority;\r
- volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
- volatile unsigned char ucMaxPriorityValue;\r
+ volatile uint32_t ulOriginalPriority;\r
+ volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
+ volatile uint8_t ucMaxPriorityValue;\r
\r
/* Determine the maximum priority from which ISR safe FreeRTOS API\r
functions can be called. ISR safe functions are those that end in\r
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
{\r
ulMaxPRIGROUPValue--;\r
- ucMaxPriorityValue <<= ( unsigned char ) 0x01;\r
+ ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
}\r
\r
/* Shift the priority group value back to its position within the AIRCR\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
- portTickType xModifiableIdleTime;\r
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
+ TickType_t xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
\r
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
- unsigned long ulCalculatedLoadValue;\r
+ uint32_t ulCalculatedLoadValue;\r
\r
/* The tick interrupt has already executed, and the SysTick\r
count reloaded with ulReloadValue. Reset the\r
\r
void vPortValidateInterruptPriority( void )\r
{\r
- unsigned long ulCurrentInterrupt;\r
- unsigned char ucCurrentPriority;\r
+ uint32_t ulCurrentInterrupt;\r
+ uint8_t ucCurrentPriority;\r
\r
/* Obtain the number of the currently executing interrupt. */\r
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/* Critical section management. */\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMask );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMask );\r
\r
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()\r
#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )\r
\r
/* Tickless idle/low power functionality. */\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
\r
*----------------------------------------------------------*/\r
\r
/* Start tasks with interrupts enables. */\r
-#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x80 )\r
+#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )\r
\r
/* Hardware constants for timer 1. */\r
-#define portCLEAR_COUNTER_ON_MATCH ( ( unsigned char ) 0x08 )\r
-#define portPRESCALE_64 ( ( unsigned char ) 0x03 )\r
-#define portCLOCK_PRESCALER ( ( unsigned long ) 64 )\r
-#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( unsigned char ) 0x10 )\r
+#define portCLEAR_COUNTER_ON_MATCH ( ( uint8_t ) 0x08 )\r
+#define portPRESCALE_64 ( ( uint8_t ) 0x03 )\r
+#define portCLOCK_PRESCALER ( ( uint32_t ) 64 )\r
+#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( uint8_t ) 0x10 )\r
\r
/* The number of bytes used on the hardware stack by the task start address. */\r
#define portBYTES_USED_BY_RETURN_ADDRESS ( 2 )\r
\r
/* Stores the critical section nesting. This must not be initialised to 0.\r
It will be initialised when a task starts. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned portBASE_TYPE ) 0 )\r
-unsigned portBASE_TYPE uxCriticalNesting = 0x50;\r
+#define portNO_CRITICAL_NESTING ( ( UBaseType_t ) 0 )\r
+UBaseType_t uxCriticalNesting = 0x50;\r
\r
\r
/*\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned short usAddress;\r
-portSTACK_TYPE *pxTopOfHardwareStack;\r
+uint16_t usAddress;\r
+StackType_t *pxTopOfHardwareStack;\r
\r
/* Place a few bytes of known values on the bottom of the stack.\r
This is just useful for debugging. */\r
\r
The first part of the stack is the hardware stack. Place the start\r
address of the task on the hardware stack. */\r
- usAddress = ( unsigned short ) pxCode;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ usAddress = ( uint16_t ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
usAddress >>= 8;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
\r
portSAVE_CONTEXT places the flags on the stack immediately after r0\r
to ensure the interrupts get disabled as soon as possible, and so ensuring\r
the stack use is minimal should a context switch interrupt occur. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */\r
pxTopOfStack--;\r
*pxTopOfStack = portFLAGS_INT_ENABLED;\r
pxTopOfStack--;\r
/* Next place the address of the hardware stack. This is required so\r
the AVR stack pointer can be restored to point to the hardware stack. */\r
pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS;\r
- usAddress = ( unsigned short ) pxTopOfHardwareStack;\r
+ usAddress = ( uint16_t ) pxTopOfHardwareStack;\r
\r
/* SPL */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
/* SPH */\r
usAddress >>= 8;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
\r
\r
\r
/* Now the remaining registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01; /* R1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02; /* R2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03; /* R3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04; /* R4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05; /* R5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06; /* R6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07; /* R7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08; /* R8 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09; /* R9 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10; /* R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11; /* R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12; /* R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x13; /* R13 */\r
+ *pxTopOfStack = ( StackType_t ) 0x13; /* R13 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x14; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x14; /* R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x15; /* R15 */\r
+ *pxTopOfStack = ( StackType_t ) 0x15; /* R15 */\r
pxTopOfStack--;\r
\r
/* Place the parameter on the stack in the expected location. */\r
- usAddress = ( unsigned short ) pvParameters;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ usAddress = ( uint16_t ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
usAddress >>= 8;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( usAddress & ( unsigned short ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x18; /* R18 */\r
+ *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x19; /* R19 */\r
+ *pxTopOfStack = ( StackType_t ) 0x19; /* R19 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x20; /* R20 */\r
+ *pxTopOfStack = ( StackType_t ) 0x20; /* R20 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x21; /* R21 */\r
+ *pxTopOfStack = ( StackType_t ) 0x21; /* R21 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* R22 */\r
+ *pxTopOfStack = ( StackType_t ) 0x22; /* R22 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x23; /* R23 */\r
+ *pxTopOfStack = ( StackType_t ) 0x23; /* R23 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x24; /* R24 */\r
+ *pxTopOfStack = ( StackType_t ) 0x24; /* R24 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x25; /* R25 */\r
+ *pxTopOfStack = ( StackType_t ) 0x25; /* R25 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x26; /* R26 X */\r
+ *pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x27; /* R27 */\r
+ *pxTopOfStack = ( StackType_t ) 0x27; /* R27 */\r
pxTopOfStack--;\r
\r
/* The Y register is not stored as it is used as the software stack and\r
gets saved into the task control block. */\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x30; /* R30 Z */\r
+ *pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x031; /* R31 */\r
+ *pxTopOfStack = ( StackType_t ) 0x031; /* R31 */\r
\r
pxTopOfStack--;\r
*pxTopOfStack = portNO_CRITICAL_NESTING; /* Critical nesting is zero when the task starts. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. */\r
prvSetupTimerInterrupt();\r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned long ulCompareMatch;\r
-unsigned char ucHighByte, ucLowByte;\r
+uint32_t ulCompareMatch;\r
+uint8_t ucHighByte, ucLowByte;\r
\r
/* Using 16bit timer 1 to generate the tick. Correct fuses must be\r
selected for the configCPU_CLOCK_HZ clock. */\r
ulCompareMatch /= portCLOCK_PRESCALER;\r
\r
/* Adjust for correct value. */\r
- ulCompareMatch -= ( unsigned long ) 1;\r
+ ulCompareMatch -= ( uint32_t ) 1;\r
\r
/* Setup compare match value for compare match A. Interrupts are disabled\r
before this is called so we need not worry here. */\r
- ucLowByte = ( unsigned char ) ( ulCompareMatch & ( unsigned long ) 0xff );\r
+ ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );\r
ulCompareMatch >>= 8;\r
- ucHighByte = ( unsigned char ) ( ulCompareMatch & ( unsigned long ) 0xff );\r
+ ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );\r
OCR1AH = ucHighByte;\r
OCR1AL = ucLowByte;\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portCHAR\r
-#define portBASE_TYPE portCHAR\r
-#define portPOINTER_SIZE_TYPE unsigned short\r
+#define portSTACK_TYPE uint8_t\r
+#define portBASE_TYPE char\r
+#define portPOINTER_SIZE_TYPE uint16_t\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 1\r
#define portNOP() asm( "nop" )\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Constants required to setup the task context. */\r
-#define portINITIAL_SR ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )\r
\r
/* Each task maintains its own critical nesting variable. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
#if( configTICK_USE_TC==0 )\r
static void prvScheduleNextTick( void );\r
{\r
#if configHEAP_INIT\r
#pragma segment = "HEAP"\r
- portBASE_TYPE *pxMem;\r
+ BaseType_t *pxMem;\r
#endif\r
\r
/* Enable exceptions. */\r
#if configHEAP_INIT\r
{\r
/* Initialize the heap used by malloc. */\r
- for( pxMem = __segment_begin( "HEAP" ); pxMem < ( portBASE_TYPE * ) __segment_end( "HEAP" ); )\r
+ for( pxMem = __segment_begin( "HEAP" ); pxMem < ( BaseType_t * ) __segment_end( "HEAP" ); )\r
{\r
*pxMem++ = 0xA5A5A5A5;\r
}\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Setup the initial stack of the task. The stack is set exactly as\r
expected by the portRESTORE_CONTEXT() macro. */\r
\r
/* When the task starts, it will expect to find the function parameter in R12. */\r
pxTopOfStack--;\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A; /* R10 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B; /* R11 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters; /* R12 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF; /* R14/LR */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR; /* SR */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF; /* R0 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */\r
+ *pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */\r
+ *pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */\r
+ *pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. Interrupts are disabled\r
here already. */\r
#if( configTICK_USE_TC==0 )\r
static void prvScheduleFirstTick(void)\r
{\r
- unsigned long lCycles;\r
+ uint32_t lCycles;\r
\r
lCycles = Get_system_register(AVR32_COUNT);\r
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);\r
#pragma optimize = no_inline\r
static void prvScheduleNextTick(void)\r
{\r
- unsigned long lCycles, lCount;\r
+ uint32_t lCycles, lCount;\r
\r
lCycles = Get_system_register(AVR32_COMPARE);\r
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);\r
*****************************************************************************/\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#define TASK_DELAY_MS(x) ( (x) /portTICK_RATE_MS )\r
#define TASK_DELAY_S(x) ( (x)*1000 /portTICK_RATE_MS )\r
#define configTICK_TC_IRQ ATPASTE2(AVR32_TC_IRQ, configTICK_TC_CHANNEL)\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
#define portNOP() {__asm__ __volatile__ ("nop");}\r
/*-----------------------------------------------------------*/\r
*/\r
#define portRESTORE_CONTEXT() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
__asm__ __volatile__ ( \\r
*/\r
#define portSAVE_CONTEXT_OS_INT() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* When we come here */ \\r
*/\r
#define portRESTORE_CONTEXT_OS_INT() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* Check if INT0 or higher were being handled (case where the OS tick interrupted another */ \\r
*/\r
#define portSAVE_CONTEXT_SCALL() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* Warning: the stack layout after SCALL doesn't match the one after an interrupt. */ \\r
*/\r
#define portRESTORE_CONTEXT_SCALL() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* Restore all registers */ \\r
*/\r
#define portENTER_SWITCHING_ISR() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
/* When we come here */ \\r
*/\r
#define portEXIT_SWITCHING_ISR() \\r
{ \\r
- extern volatile unsigned portLONG ulCriticalNesting; \\r
+ extern volatile uint32_t ulCriticalNesting; \\r
extern volatile void *volatile pxCurrentTCB; \\r
\\r
__asm__ __volatile__ ( \\r
* \return The number of bytes read, \c 0 at the end of the file, or\r
* \c _LLIO_ERROR on failure.\r
*/\r
-size_t __read(int handle, unsigned char *buffer, size_t size)\r
+size_t __read(int handle, uint8_t *buffer, size_t size)\r
{\r
int nChars = 0;\r
\r
*\r
* \return The number of bytes written, or \c _LLIO_ERROR on failure.\r
*/\r
-size_t __write(int handle, const unsigned char *buffer, size_t size)\r
+size_t __write(int handle, const uint8_t *buffer, size_t size)\r
{\r
size_t nChars = 0;\r
\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_US_SetIrdaFilter (\r
AT91PS_USART pUSART,\r
- unsigned char value\r
+ uint8_t value\r
)\r
{\r
pUSART->US_IF = value;\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_SetAddress (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char address) // \arg new UDP address\r
+ uint8_t address) // \arg new UDP address\r
{\r
pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpStall(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpWrite(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
- unsigned char value) // \arg value to be written in the DPR\r
+ uint8_t endpoint, // \arg endpoint number\r
+ uint8_t value) // \arg value to be written in the DPR\r
{\r
pUDP->UDP_FDR[endpoint] = value;\r
}\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpRead(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_FDR[endpoint];\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpEndOfWr(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpClear(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] &= ~(flag);\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpSet(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] |= flag;\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpStatus(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_CSR[endpoint];\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_US_SetIrdaFilter (\r
AT91PS_USART pUSART,\r
- unsigned char value\r
+ uint8_t value\r
)\r
{\r
pUSART->US_IF = value;\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_SetAddress (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char address) // \arg new UDP address\r
+ uint8_t address) // \arg new UDP address\r
{\r
pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EnableEp (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_DisableEp (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpStall(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpWrite(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
- unsigned char value) // \arg value to be written in the DPR\r
+ uint8_t endpoint, // \arg endpoint number\r
+ uint8_t value) // \arg value to be written in the DPR\r
{\r
pUDP->UDP_FDR[endpoint] = value;\r
}\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpRead(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_FDR[endpoint];\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpEndOfWr(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpClear(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] &= ~(flag);\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpSet(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] |= flag;\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpStatus(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_CSR[endpoint];\r
}\r
__inline void AT91F_CAN_CfgMessageIDReg (\r
AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox\r
unsigned int id,\r
- unsigned char version)\r
+ uint8_t version)\r
{\r
if(version==0) // IDvA Standard Format\r
CAN_Mailbox->CAN_MB_MID = id<<18;\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_SetCryptoKey (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_InputData (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int indata\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_AES_GetOutputData (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index\r
+ uint8_t index\r
)\r
{\r
return pAES->AES_ODATAxR[index]; \r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_SetInitializationVector (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int initvector\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey1 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey2 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey3 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_InputData (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int indata\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_TDES_GetOutputData (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index\r
+ uint8_t index\r
)\r
{\r
return pTDES->TDES_ODATAxR[index]; \r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetInitializationVector (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int initvector\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_US_SetIrdaFilter (\r
AT91PS_USART pUSART,\r
- unsigned char value\r
+ uint8_t value\r
)\r
{\r
pUSART->US_IF = value;\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_SetAddress (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char address) // \arg new UDP address\r
+ uint8_t address) // \arg new UDP address\r
{\r
pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EnableEp (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_DisableEp (\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpStall(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpWrite(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
- unsigned char value) // \arg value to be written in the DPR\r
+ uint8_t endpoint, // \arg endpoint number\r
+ uint8_t value) // \arg value to be written in the DPR\r
{\r
pUDP->UDP_FDR[endpoint] = value;\r
}\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpRead(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_FDR[endpoint];\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpEndOfWr(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;\r
}\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpClear(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] &= ~(flag);\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_UDP_EpSet(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint, // \arg endpoint number\r
+ uint8_t endpoint, // \arg endpoint number\r
unsigned int flag) // \arg flag to be cleared\r
{\r
pUDP->UDP_CSR[endpoint] |= flag;\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_UDP_EpStatus(\r
AT91PS_UDP pUDP, // \arg pointer to a UDP controller\r
- unsigned char endpoint) // \arg endpoint number\r
+ uint8_t endpoint) // \arg endpoint number\r
{\r
return pUDP->UDP_CSR[endpoint];\r
}\r
__inline void AT91F_CAN_CfgMessageIDReg (\r
AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox\r
unsigned int id,\r
- unsigned char version)\r
+ uint8_t version)\r
{\r
if(version==0) // IDvA Standard Format\r
CAN_Mailbox->CAN_MB_MID = id<<18;\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_SetCryptoKey (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_InputData (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int indata\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_AES_GetOutputData (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index\r
+ uint8_t index\r
)\r
{\r
return pAES->AES_ODATAxR[index]; \r
//*----------------------------------------------------------------------------\r
__inline void AT91F_AES_SetInitializationVector (\r
AT91PS_AES pAES, // pointer to a AES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int initvector\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey1 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey2 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetCryptoKey3 (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int keyword\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_InputData (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int indata\r
)\r
{\r
//*----------------------------------------------------------------------------\r
__inline unsigned int AT91F_TDES_GetOutputData (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index\r
+ uint8_t index\r
)\r
{\r
return pTDES->TDES_ODATAxR[index]; \r
//*----------------------------------------------------------------------------\r
__inline void AT91F_TDES_SetInitializationVector (\r
AT91PS_TDES pTDES, // pointer to a TDES controller\r
- unsigned char index,\r
+ uint8_t index,\r
unsigned int initvector\r
)\r
{\r
#include "task.h"\r
\r
/* Constants required to setup the initial stack. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to setup the PIT. */\r
-#define portPIT_CLOCK_DIVISOR ( ( unsigned long ) 16 )\r
+#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )\r
#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
\r
#define portINT_LEVEL_SENSITIVE 0\r
-#define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )\r
-#define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )\r
+#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )\r
+#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )\r
/*-----------------------------------------------------------*/\r
\r
/* Setup the PIT to generate the tick interrupts. */\r
/* ulCriticalNesting will get set to zero when the first task starts. It\r
cannot be initialised to 0 as this will cause interrupts to be enabled\r
during the kernel initialisation process. */\r
-unsigned long ulCriticalNesting = ( unsigned long ) 9999;\r
+uint32_t ulCriticalNesting = ( uint32_t ) 9999;\r
\r
/*-----------------------------------------------------------*/\r
\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
static __arm __irq void vPortNonPreemptiveTick( void );\r
static __arm __irq void vPortNonPreemptiveTick( void )\r
{\r
- unsigned long ulDummy;\r
+ uint32_t ulDummy;\r
\r
/* Increment the tick count - which may wake some tasks but as the\r
preemptive scheduler is not being used any woken task is not given\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm ( "SWI 0" )\r
#define portNOP() asm ( "NOP" )\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
__arm __interwork void vPortDisableInterruptsFromThumb( void );\r
#define portENABLE_INTERRUPTS() __enable_interrupt()\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) \\r
vTaskSwitchContext(); \\r
} \\r
}\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
/*-----------------------------------------------------------*/\r
\r
/* Constants required to setup the initial stack. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to setup the PIT. */\r
#define port1MHz_IN_Hz ( 1000000ul )\r
#define port1SECOND_IN_uS ( 1000000.0 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
\r
#define portINT_LEVEL_SENSITIVE 0\r
-#define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )\r
-#define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )\r
+#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )\r
+#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )\r
/*-----------------------------------------------------------*/\r
\r
/* Setup the PIT to generate the tick interrupts. */\r
/* ulCriticalNesting will get set to zero when the first task starts. It\r
cannot be initialised to 0 as this will cause interrupts to be enabled\r
during the kernel initialisation process. */\r
-unsigned long ulCriticalNesting = ( unsigned long ) 9999;\r
+uint32_t ulCriticalNesting = ( uint32_t ) 9999;\r
\r
/*-----------------------------------------------------------*/\r
\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
#ifdef THUMB_INTERWORK\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
\r
static __arm void vPortTickISR( void )\r
{\r
-volatile unsigned long ulDummy;\r
+volatile uint32_t ulDummy;\r
\r
/* Increment the tick count - which may wake some tasks but as the\r
preemptive scheduler is not being used any woken task is not given\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned long ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;\r
+const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;\r
\r
/* Setup the PIT for the required frequency. */\r
PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm ( "SWI 0" )\r
#define portNOP() asm ( "NOP" )\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
__arm __interwork void vPortDisableInterruptsFromThumb( void );\r
#define portENABLE_INTERRUPTS() __enable_irq()\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) \\r
vTaskSwitchContext(); \\r
} \\r
}\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#include "task.h"\r
\r
/* Constants required to setup the tick ISR. */\r
-#define portENABLE_TIMER ( ( unsigned char ) 0x01 )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x01 )\r
#define portPRESCALE_VALUE 0x00\r
-#define portINTERRUPT_ON_MATCH ( ( unsigned long ) 0x01 )\r
-#define portRESET_COUNT_ON_MATCH ( ( unsigned long ) 0x02 )\r
+#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )\r
\r
/* Constants required to setup the initial stack. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to setup the PIT. */\r
-#define portPIT_CLOCK_DIVISOR ( ( unsigned long ) 16 )\r
+#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )\r
#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )\r
\r
/* Constants required to handle interrupts. */\r
-#define portTIMER_MATCH_ISR_BIT ( ( unsigned char ) 0x01 )\r
-#define portCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )\r
+#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
\r
#define portINT_LEVEL_SENSITIVE 0\r
-#define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 )\r
-#define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 )\r
+#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )\r
+#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )\r
\r
/* Constants required to setup the VIC for the tick ISR. */\r
-#define portTIMER_VIC_CHANNEL ( ( unsigned long ) 0x0004 )\r
-#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0010 )\r
-#define portTIMER_VIC_ENABLE ( ( unsigned long ) 0x0020 )\r
+#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )\r
+#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )\r
+#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )\r
\r
/*-----------------------------------------------------------*/\r
\r
/* ulCriticalNesting will get set to zero when the first task starts. It\r
cannot be initialised to 0 as this will cause interrupts to be enabled\r
during the kernel initialisation process. */\r
-unsigned long ulCriticalNesting = ( unsigned long ) 9999;\r
+uint32_t ulCriticalNesting = ( uint32_t ) 9999;\r
\r
/*-----------------------------------------------------------*/\r
\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned long ulCompareMatch;\r
+uint32_t ulCompareMatch;\r
\r
/* A 1ms tick does not require the use of the timer prescale. This is\r
defaulted to zero but can be used if necessary. */\r
{ \r
extern void ( vPortPreemptiveTickEntry )( void );\r
\r
- VICVectAddr0 = ( unsigned long ) vPortPreemptiveTickEntry;\r
+ VICVectAddr0 = ( uint32_t ) vPortPreemptiveTickEntry;\r
}\r
#else\r
{\r
extern void ( vNonPreemptiveTick )( void );\r
\r
- VICVectAddr0 = ( long ) vPortNonPreemptiveTick;\r
+ VICVectAddr0 = ( int32_t ) vPortNonPreemptiveTick;\r
}\r
#endif\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm ( "SWI 0" )\r
#define portNOP() asm ( "NOP" )\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
__arm __interwork void vPortDisableInterruptsFromThumb( void );\r
#define portENABLE_INTERRUPTS() __enable_interrupt()\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) \\r
vTaskSwitchContext(); \\r
} \\r
}\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
\r
/* Constants required for hardware setup. The tick ISR runs off the ACLK,\r
not the MCLK. */\r
-#define portACLK_FREQUENCY_HZ ( ( portTickType ) 32768 )\r
-#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )\r
-#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x08 )\r
+#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )\r
+#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )\r
+#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Each task maintains a count of the critical section nesting depth. Each\r
time a critical section is entered the count is incremented. Each time a\r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as this will cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
\r
*\r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/*\r
Place a few bytes of known values on the bottom of the stack.\r
This is just useful for debugging and can be included if required.\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x3333;\r
+ *pxTopOfStack = ( StackType_t ) 0x3333;\r
pxTopOfStack--;\r
*/\r
\r
executing an ISR. We want the stack to look just as if this has happened\r
so place a pointer to the start of the task on the stack first - followed\r
by the flags we want the task to use when it starts up. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
*pxTopOfStack = portFLAGS_INT_ENABLED;\r
pxTopOfStack--;\r
\r
/* Next the general purpose registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x4444;\r
+ *pxTopOfStack = ( StackType_t ) 0x4444;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555;\r
+ *pxTopOfStack = ( StackType_t ) 0x5555;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x6666;\r
+ *pxTopOfStack = ( StackType_t ) 0x6666;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x7777;\r
+ *pxTopOfStack = ( StackType_t ) 0x7777;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x8888;\r
+ *pxTopOfStack = ( StackType_t ) 0x8888;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x9999;\r
+ *pxTopOfStack = ( StackType_t ) 0x9999;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaa;\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaa;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xbbbb;\r
+ *pxTopOfStack = ( StackType_t ) 0xbbbb;\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R15. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xdddd;\r
+ *pxTopOfStack = ( StackType_t ) 0xdddd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xeeee;\r
+ *pxTopOfStack = ( StackType_t ) 0xeeee;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xffff;\r
+ *pxTopOfStack = ( StackType_t ) 0xffff;\r
pxTopOfStack--;\r
\r
/* A variable is used to keep track of the critical section nesting.\r
This variable has to be stored as part of the task context and is\r
initially set to zero. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
be stored in the task control block for the task. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
#define portDISABLE_INTERRUPTS() _DINT(); _NOP()\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
-#define portNOP() \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portNOP()\r
/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
\r
/* Constants required for hardware setup. The tick ISR runs off the ACLK,\r
not the MCLK. */\r
-#define portACLK_FREQUENCY_HZ ( ( portTickType ) 32768 )\r
-#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )\r
-#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x08 )\r
+#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )\r
+#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )\r
+#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Each task maintains a count of the critical section nesting depth. Each\r
time a critical section is entered the count is incremented. Each time a\r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as this will cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
\r
*\r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned short *pusTopOfStack;\r
-unsigned long *pulTopOfStack;\r
+uint16_t *pusTopOfStack;\r
+uint32_t *pulTopOfStack;\r
\r
/*\r
Place a few bytes of known values on the bottom of the stack.\r
This is just useful for debugging and can be included if required.\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x3333;\r
+ *pxTopOfStack = ( StackType_t ) 0x3333;\r
*/\r
\r
- /* portSTACK_TYPE is either 16 bits or 32 bits depending on the data model.\r
+ /* StackType_t is either 16 bits or 32 bits depending on the data model.\r
Some stacked items do not change size depending on the data model so have\r
to be explicitly cast to the correct size so this function will work\r
whichever data model is being used. */\r
- if( sizeof( portSTACK_TYPE ) == sizeof( unsigned short ) )\r
+ if( sizeof( StackType_t ) == sizeof( uint16_t ) )\r
{\r
/* Make room for a 20 bit value stored as a 32 bit value. */\r
- pusTopOfStack = ( unsigned short * ) pxTopOfStack;\r
+ pusTopOfStack = ( uint16_t * ) pxTopOfStack;\r
pusTopOfStack--;\r
- pulTopOfStack = ( unsigned long * ) pusTopOfStack;\r
+ pulTopOfStack = ( uint32_t * ) pusTopOfStack;\r
}\r
else\r
{\r
- pulTopOfStack = ( unsigned long * ) pxTopOfStack;\r
+ pulTopOfStack = ( uint32_t * ) pxTopOfStack;\r
}\r
- *pulTopOfStack = ( unsigned long ) pxCode;\r
+ *pulTopOfStack = ( uint32_t ) pxCode;\r
\r
- pusTopOfStack = ( unsigned short * ) pulTopOfStack;\r
+ pusTopOfStack = ( uint16_t * ) pulTopOfStack;\r
pusTopOfStack--;\r
*pusTopOfStack = portFLAGS_INT_ENABLED;\r
- pusTopOfStack -= ( sizeof( portSTACK_TYPE ) / 2 );\r
+ pusTopOfStack -= ( sizeof( StackType_t ) / 2 );\r
\r
/* From here on the size of stacked items depends on the memory model. */\r
- pxTopOfStack = ( portSTACK_TYPE * ) pusTopOfStack;\r
+ pxTopOfStack = ( StackType_t * ) pusTopOfStack;\r
\r
/* Next the general purpose registers. */\r
#ifdef PRELOAD_REGISTER_VALUES\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xffff;\r
+ *pxTopOfStack = ( StackType_t ) 0xffff;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xeeee;\r
+ *pxTopOfStack = ( StackType_t ) 0xeeee;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xdddd;\r
+ *pxTopOfStack = ( StackType_t ) 0xdddd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xbbbb;\r
+ *pxTopOfStack = ( StackType_t ) 0xbbbb;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaa;\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaa;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x9999;\r
+ *pxTopOfStack = ( StackType_t ) 0x9999;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x8888;\r
+ *pxTopOfStack = ( StackType_t ) 0x8888;\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555;\r
+ *pxTopOfStack = ( StackType_t ) 0x5555;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x6666;\r
+ *pxTopOfStack = ( StackType_t ) 0x6666;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555;\r
+ *pxTopOfStack = ( StackType_t ) 0x5555;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x4444;\r
+ *pxTopOfStack = ( StackType_t ) 0x4444;\r
pxTopOfStack--;\r
#else\r
pxTopOfStack -= 3;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack -= 9;\r
#endif\r
\r
/* A variable is used to keep track of the critical section nesting.\r
This variable has to be stored as part of the task context and is\r
initially set to zero. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
be stored in the task control block for the task. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portBASE_TYPE portSHORT\r
+#define portBASE_TYPE short\r
\r
/* The stack type changes depending on the data model. */\r
#if( __DATA_MODEL__ == __DATA_MODEL_SMALL__ )\r
- #define portSTACK_TYPE unsigned short\r
+ #define portSTACK_TYPE uint16_t\r
#else\r
- #define portSTACK_TYPE unsigned long\r
+ #define portSTACK_TYPE uint32_t\r
#endif\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
#define portDISABLE_INTERRUPTS() _DINT();_NOP()\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile unsigned short usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile unsigned short usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() __no_operation()\r
/*-----------------------------------------------------------*/\r
\r
\r
extern void vTaskSwitchContext( void );\r
#define portYIELD_FROM_ISR( x ) if( x ) vPortYield()\r
- \r
+\r
void vApplicationSetupTimerInterrupt( void );\r
\r
/* sizeof( int ) != sizeof( long ) so a full printf() library is required if\r
\r
/* The critical nesting value is initialised to a non zero value to ensure\r
interrupts don't accidentally become enabled before the scheduler is started. */\r
-#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )\r
+#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )\r
\r
/* Initial PSW value allocated to a newly created task.\r
* 1100011000000000\r
\r
/* The address of the pxCurrentTCB variable, but don't know or need to know its\r
type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Each task maintains a count of the critical section nesting depth. Each time\r
a critical section is entered the count is incremented. Each time a critical\r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as that could cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
\r
/*-----------------------------------------------------------*/\r
\r
*\r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned long *pulLocal;\r
+uint32_t *pulLocal;\r
\r
#if __DATA_MODEL__ == __DATA_MODEL_FAR__\r
{\r
pxTopOfStack--;\r
\r
/* Write in the parameter value. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( unsigned long ) pvParameters;\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( uint32_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* These values are just spacers. The return address of the function\r
would normally be written here. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ *pxTopOfStack = ( StackType_t ) 0xcdcd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ *pxTopOfStack = ( StackType_t ) 0xcdcd;\r
pxTopOfStack--;\r
\r
/* The start address / PSW value is also written in as a 32bit value,\r
pxTopOfStack--;\r
\r
/* Task function start address combined with the PSW. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );\r
pxTopOfStack--;\r
\r
/* An initial value for the AX register. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
}\r
#else\r
pxTopOfStack--;\r
\r
/* Task function start address combined with the PSW. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );\r
pxTopOfStack--;\r
\r
/* The parameter is passed in AX. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
}\r
#endif\r
\r
/* An initial value for the HL register. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
\r
/* CS and ES registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;\r
+ *pxTopOfStack = ( StackType_t ) 0x0F00;\r
pxTopOfStack--;\r
\r
/* The remaining general purpose registers DE and BC */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;\r
+ *pxTopOfStack = ( StackType_t ) 0xDEDE;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;\r
+ *pxTopOfStack = ( StackType_t ) 0xBCBC;\r
pxTopOfStack--;\r
\r
/* Finally the critical section nesting count is set to zero when the task\r
first starts. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING;\r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;\r
\r
/* Return a pointer to the top of the stack that has been generated so it\r
can be stored in the task control block for the task. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
this function is called. */\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned short usClockHz = 15000UL; /* Internal clock. */\r
-const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;\r
+const uint16_t usClockHz = 15000UL; /* Internal clock. */\r
+const uint16_t usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;\r
\r
/* Use the internal 15K clock. */\r
- OSMC = ( unsigned char ) 0x16;\r
+ OSMC = ( uint8_t ) 0x16;\r
\r
#ifdef RTCEN\r
{\r
/* Supply the interval timer clock. */\r
- RTCEN = ( unsigned char ) 1U;\r
+ RTCEN = ( uint8_t ) 1U;\r
\r
/* Disable INTIT interrupt. */\r
- ITMK = ( unsigned char ) 1;\r
+ ITMK = ( uint8_t ) 1;\r
\r
/* Disable ITMC operation. */\r
- ITMC = ( unsigned char ) 0x0000;\r
+ ITMC = ( uint8_t ) 0x0000;\r
\r
/* Clear INIT interrupt. */\r
- ITIF = ( unsigned char ) 0;\r
+ ITIF = ( uint8_t ) 0;\r
\r
/* Set interval and enable interrupt operation. */\r
ITMC = usCompareMatch | 0x8000U;\r
\r
/* Enable INTIT interrupt. */\r
- ITMK = ( unsigned char ) 0;\r
+ ITMK = ( uint8_t ) 0;\r
}\r
#endif\r
\r
#ifdef TMKAEN\r
{\r
/* Supply the interval timer clock. */\r
- TMKAEN = ( unsigned char ) 1U;\r
+ TMKAEN = ( uint8_t ) 1U;\r
\r
/* Disable INTIT interrupt. */\r
- TMKAMK = ( unsigned char ) 1;\r
+ TMKAMK = ( uint8_t ) 1;\r
\r
/* Disable ITMC operation. */\r
- ITMC = ( unsigned char ) 0x0000;\r
+ ITMC = ( uint8_t ) 0x0000;\r
\r
/* Clear INIT interrupt. */\r
- TMKAIF = ( unsigned char ) 0;\r
+ TMKAIF = ( uint8_t ) 0;\r
\r
/* Set interval and enable interrupt operation. */\r
ITMC = usCompareMatch | 0x8000U;\r
\r
/* Enable INTIT interrupt. */\r
- TMKAMK = ( unsigned char ) 0;\r
+ TMKAMK = ( uint8_t ) 0;\r
}\r
#endif\r
}\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned short\r
+#define portSTACK_TYPE uint16_t\r
#define portBASE_TYPE short\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
+\r
#if __DATA_MODEL__ == __DATA_MODEL_FAR__\r
- #define portPOINTER_SIZE_TYPE unsigned long\r
+ #define portPOINTER_SIZE_TYPE uint32_t\r
#else\r
- #define portPOINTER_SIZE_TYPE unsigned short\r
+ #define portPOINTER_SIZE_TYPE uint16_t\r
#endif\r
\r
\r
#if ( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned int portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef unsigned int TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned long portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile unsigned short usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile unsigned short usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Hardwware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
PSW is set with U and I set, and PM and IPL clear. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )\r
\r
/* The peripheral clock is divided by this value before being supplying the\r
CMT. */\r
* instruction.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static void prvSleep( portTickType xExpectedIdleTime );\r
+ static void prvSleep( TickType_t xExpectedIdleTime );\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*-----------------------------------------------------------*/\r
/*-----------------------------------------------------------*/\r
\r
/* Calculate how many clock increments make up a single tick period. */\r
-static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
+static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
basically how far into the future an interrupt can be generated. Set\r
during initialisation. This is the maximum possible value that the\r
compare match register can hold divided by ulMatchValueForOneTick. */\r
- static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
+ static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
\r
/* Flag set from the tick interrupt to allow the sleep processing to know if\r
sleep mode was exited because of a tick interrupt, or an interrupt\r
compensate for the lost time. The large difference between the divided CMT\r
clock and the CPU clock means it is likely ulStoppedTimerCompensation will\r
equal zero - and be optimised away. */\r
- static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );\r
+ static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );\r
\r
#endif\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Offset to end up on 8 byte boundary. */\r
pxTopOfStack--;\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_PSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
\r
/* When debugging it can be useful if every register is set to a known\r
value. Otherwise code space can be saved by just setting the registers\r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x12345678; /* Accumulator. */\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Use pxCurrentTCB just so it does not get optimised away. */\r
if( pxCurrentTCB != NULL )\r
\r
/* If this is the first tick since exiting tickless mode then the CMT\r
compare match value needs resetting. */\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;\r
}\r
#endif\r
}\r
CMT0.CMCR.BIT.CMIE = 1;\r
\r
/* Set the compare match value. */\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;\r
\r
/* Divide the PCLK. */\r
#if portCLOCK_DIVISOR == 512\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- static void prvSleep( portTickType xExpectedIdleTime )\r
+ static void prvSleep( TickType_t xExpectedIdleTime )\r
{\r
/* Allow the application to define some pre-sleep processing. */\r
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;\r
+ uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;\r
eSleepModeStatus eSleepAction;\r
\r
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */\r
\r
/* Adjust the match value to take into account that the current\r
time slice is already partially complete. */\r
- ulMatchValue -= ( unsigned long ) CMT0.CMCNT;\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ ulMatchValue -= ( uint32_t ) CMT0.CMCNT;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
\r
/* Restart the CMT to count up to the new match value. */\r
CMT0.CMCNT = 0;\r
/* Nothing to do here. */\r
}\r
\r
- ulCurrentCount = ( unsigned long ) CMT0.CMCNT;\r
+ ulCurrentCount = ( uint32_t ) CMT0.CMCNT;\r
\r
if( ulTickFlag != pdFALSE )\r
{\r
exited. Reset the match value with whatever remains of this\r
tick period. */\r
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
\r
/* The tick interrupt handler will already have pended the tick\r
processing in the kernel. As the pending tick will be\r
/* The match value is set to whatever fraction of a single tick\r
period remains. */\r
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
}\r
\r
/* Restart the CMT so it runs up to the match value. The match value\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() __no_operation()\r
\r
#define portYIELD() \\r
functions are those that end in FromISR. FreeRTOS maintains a separate\r
interrupt API to ensure API function and interrupt entry is as fast and as\r
simple as possible. */\r
-#define portENABLE_INTERRUPTS() __set_interrupt_level( ( unsigned char ) 0 )\r
+#define portENABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) 0 )\r
#ifdef configASSERT\r
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( __get_interrupt_level() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )\r
- #define portDISABLE_INTERRUPTS() if( __get_interrupt_level() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __set_interrupt_level( ( unsigned char ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+ #define portDISABLE_INTERRUPTS() if( __get_interrupt_level() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#else\r
- #define portDISABLE_INTERRUPTS() __set_interrupt_level( ( unsigned char ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+ #define portDISABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#endif\r
\r
/* Critical nesting counts are stored in the TCB. */\r
\r
/* As this port allows interrupt nesting... */\r
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_level(); portDISABLE_INTERRUPTS()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) __set_interrupt_level( ( unsigned char ) ( uxSavedInterruptStatus ) )\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) __set_interrupt_level( ( uint8_t ) ( uxSavedInterruptStatus ) )\r
\r
/* Tickless idle/low power functionality. */\r
#if configUSE_TICKLESS_IDLE == 1\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
#endif\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
PSW is set with U and I set, and PM and IPL clear. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )\r
-#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )\r
+#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* R0 is not included as it is the stack pointer. */\r
\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_PSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
\r
/* When debugging it can be useful if every register is set to a known\r
value. Otherwise code space can be saved by just setting the registers\r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_FPSW;\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vApplicationSetupTimerInterrupt( void );\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() __no_operation()\r
\r
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"\r
\r
#define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD()\r
\r
-/* These macros should not be called directly, but through the \r
-taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is \r
-performed if configASSERT() is defined to ensure an assertion handler does not \r
-inadvertently attempt to lower the IPL when the call to assert was triggered \r
-because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY \r
-when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API \r
-functions are those that end in FromISR. FreeRTOS maintains a separate \r
-interrupt API to ensure API function and interrupt entry is as fast and as \r
+/* These macros should not be called directly, but through the\r
+taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is\r
+performed if configASSERT() is defined to ensure an assertion handler does not\r
+inadvertently attempt to lower the IPL when the call to assert was triggered\r
+because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API\r
+functions are those that end in FromISR. FreeRTOS maintains a separate\r
+interrupt API to ensure API function and interrupt entry is as fast and as\r
simple as possible. */\r
-#define portENABLE_INTERRUPTS() __set_interrupt_level( ( unsigned char ) 0 )\r
+#define portENABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) 0 )\r
#ifdef configASSERT\r
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( __get_interrupt_level() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )\r
- #define portDISABLE_INTERRUPTS() if( __get_interrupt_level() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __set_interrupt_level( ( unsigned char ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+ #define portDISABLE_INTERRUPTS() if( __get_interrupt_level() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#else\r
- #define portDISABLE_INTERRUPTS() __set_interrupt_level( ( unsigned char ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+ #define portDISABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
#endif\r
\r
/* Critical nesting counts are stored in the TCB. */\r
\r
/* As this port allows interrupt nesting... */\r
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_level(); portDISABLE_INTERRUPTS()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) __set_interrupt_level( ( unsigned char ) ( uxSavedInterruptStatus ) )\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) __set_interrupt_level( ( uint8_t ) ( uxSavedInterruptStatus ) )\r
\r
/*-----------------------------------------------------------*/\r
\r
#include "task.h"\r
\r
/* Constants required to setup the initial stack. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
#define portMICROS_PER_SECOND 1000000\r
\r
/* ulCriticalNesting will get set to zero when the first task starts. It\r
cannot be initialised to 0 as this will cause interrupts to be enabled\r
during the kernel initialisation process. */\r
-unsigned long ulCriticalNesting = ( unsigned long ) 9999;\r
+uint32_t ulCriticalNesting = ( uint32_t ) 9999;\r
\r
/* Tick interrupt routines for cooperative and preemptive operation\r
respectively. The preemptive version is not defined as __irq as it is called\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm ( "SWI 0" )\r
#define portNOP() asm ( "NOP" )\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
__arm __interwork void vPortDisableInterruptsFromThumb( void );\r
#define portENABLE_INTERRUPTS() __enable_interrupt()\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) \\r
vTaskSwitchContext(); \\r
} \\r
}\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* EIC utilities. */\r
-#define portEIC_CICR_ADDR *( ( unsigned portLONG * ) 0xFFFFF804 )\r
-#define portEIC_IPR_ADDR *( ( unsigned portLONG * ) 0xFFFFF840 )\r
+#define portEIC_CICR_ADDR *( ( uint32_t * ) 0xFFFFF804 )\r
+#define portEIC_IPR_ADDR *( ( uint32_t * ) 0xFFFFF840 )\r
#define portCLEAR_EIC() portEIC_IPR_ADDR = 0x01 << portEIC_CICR_ADDR\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
#include "task.h"\r
\r
/* Constants required to setup the initial stack. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
/* Prescale used on the timer clock when calculating the tick period. */\r
#define portPRESCALE 20\r
/* ulCriticalNesting will get set to zero when the first task starts. It\r
cannot be initialised to 0 as this will cause interrupts to be enabled\r
during the kernel initialisation process. */\r
-unsigned long ulCriticalNesting = ( unsigned long ) 9999;\r
+uint32_t ulCriticalNesting = ( uint32_t ) 9999;\r
\r
/* Tick interrupt routines for preemptive operation. */\r
__arm void vPortPreemptiveTick( void );\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
pxTopOfStack--;\r
\r
/* Interrupt flags cannot always be stored on the stack and will\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm ( "SWI 0" )\r
#define portNOP() asm ( "NOP" )\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
__arm __interwork void vPortEnterCritical( void );\r
#define portENABLE_INTERRUPTS() __enable_interrupt()\r
#define portENTER_CRITICAL() vPortEnterCritical()\r
#define portEXIT_CRITICAL() vPortExitCritical()\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) \\r
vTaskSwitchContext(); \\r
} \\r
}\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
\r
/* Constants required to setup the initial stack. */\r
#ifndef _RUN_TASK_IN_ARM_MODE_\r
- #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
+ #define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
#else\r
- #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+ #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
#endif\r
\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
#ifndef abs\r
#define abs(x) ((x)>0 ? (x) : -(x))\r
/* ulCriticalNesting will get set to zero when the first task starts. It\r
cannot be initialised to 0 as this will cause interrupts to be enabled\r
during the kernel initialisation process. */\r
-unsigned long ulCriticalNesting = ( unsigned long ) 9999;\r
+uint32_t ulCriticalNesting = ( uint32_t ) 9999;\r
\r
/* Tick interrupt routines for cooperative and preemptive operation\r
respectively. The preemptive version is not defined as __irq as it is called\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
- portSTACK_TYPE *pxOriginalTOS;\r
+ StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
pxTopOfStack--;\r
\r
/* Interrupt flags cannot always be stored on the stack and will\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
\r
u32 b0;\r
u16 a0;\r
- long err, err_min=n;\r
+ int32_t err, err_min=n;\r
\r
*a = a0 = ((n-1)/65536ul) + 1;\r
*b = b0 = n / *a;\r
for (; *a <= 256; (*a)++)\r
{\r
*b = n / *a;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
if (abs(err) > (*a / 2))\r
{\r
(*b)++;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
}\r
if (abs(err) < abs(err_min))\r
{\r
static void prvSetupTimerInterrupt( void )\r
{\r
WDG_InitTypeDef xWdg;\r
- unsigned short a;\r
- unsigned long n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;\r
+ uint16_t a;\r
+ uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;\r
\r
/* Configure the watchdog as a free running timer that generates a\r
periodic interrupt. */\r
VIC_ITCmd( WDG_ITLine, ENABLE );\r
\r
/* Install the default handlers for both VIC's. */\r
- VIC0->DVAR = ( unsigned long ) prvDefaultHandler;\r
- VIC1->DVAR = ( unsigned long ) prvDefaultHandler;\r
+ VIC0->DVAR = ( uint32_t ) prvDefaultHandler;\r
+ VIC1->DVAR = ( uint32_t ) prvDefaultHandler;\r
\r
WDG_Cmd(ENABLE);\r
}\r
\r
u16 b0;\r
u8 a0;\r
- long err, err_min=n;\r
+ int32_t err, err_min=n;\r
\r
\r
*a = a0 = ((n-1)/256) + 1;\r
for (; *a <= 256; (*a)++)\r
{\r
*b = n / *a;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
if (abs(err) > (*a / 2))\r
{\r
(*b)++;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
}\r
if (abs(err) < abs(err_min))\r
{\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
- unsigned char a;\r
- unsigned short b;\r
- unsigned long n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;\r
+ uint8_t a;\r
+ uint16_t b;\r
+ uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;\r
\r
TIM_InitTypeDef timer;\r
\r
VIC_ITCmd( TIM2_ITLine, ENABLE );\r
\r
/* Install the default handlers for both VIC's. */\r
- VIC0->DVAR = ( unsigned long ) prvDefaultHandler;\r
- VIC1->DVAR = ( unsigned long ) prvDefaultHandler;\r
+ VIC0->DVAR = ( uint32_t ) prvDefaultHandler;\r
+ VIC1->DVAR = ( uint32_t ) prvDefaultHandler;\r
\r
TIM_CounterCmd(TIM2, TIM_CLEAR);\r
TIM_CounterCmd(TIM2, TIM_START);\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portYIELD() asm ( "SWI 0" )\r
#define portNOP() asm ( "NOP" )\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
__arm __interwork void vPortEnterCritical( void );\r
#define portENABLE_INTERRUPTS() __enable_interrupt()\r
\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) \\r
vTaskSwitchContext(); \\r
} \\r
}\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
\r
/* Critical nesting should be initialised to a non zero value so interrupts don't\r
accidentally get enabled before the scheduler is started. */\r
-#define portINITIAL_CRITICAL_NESTING (( portSTACK_TYPE ) 10)\r
+#define portINITIAL_CRITICAL_NESTING (( StackType_t ) 10)\r
\r
/* The PSW value assigned to tasks when they start to run for the first time. */\r
-#define portPSW (( portSTACK_TYPE ) 0x00000000)\r
+#define portPSW (( StackType_t ) 0x00000000)\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Keeps track of the nesting level of critical sections. */\r
-volatile portSTACK_TYPE usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile StackType_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
/* Sets up the timer to generate the tick interrupt. */\r
static void prvSetupTimerInterrupt( void );\r
\r
/*-----------------------------------------------------------*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* Task function start address */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* Task function start address */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */\r
pxTopOfStack--;\r
*pxTopOfStack = portPSW; /* Initial PSW value */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x20202020; /* Initial Value of R20 */\r
+ *pxTopOfStack = ( StackType_t ) 0x20202020; /* Initial Value of R20 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x21212121; /* Initial Value of R21 */\r
+ *pxTopOfStack = ( StackType_t ) 0x21212121; /* Initial Value of R21 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22222222; /* Initial Value of R22 */\r
+ *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R22 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x23232323; /* Initial Value of R23 */\r
+ *pxTopOfStack = ( StackType_t ) 0x23232323; /* Initial Value of R23 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x24242424; /* Initial Value of R24 */\r
+ *pxTopOfStack = ( StackType_t ) 0x24242424; /* Initial Value of R24 */\r
pxTopOfStack--;\r
#if (__DATA_MODEL__ == 0) || (__DATA_MODEL__ == 1)\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x25252525; /* Initial Value of R25 */\r
+ *pxTopOfStack = ( StackType_t ) 0x25252525; /* Initial Value of R25 */\r
pxTopOfStack--;\r
#endif /* configDATA_MODE */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x26262626; /* Initial Value of R26 */\r
+ *pxTopOfStack = ( StackType_t ) 0x26262626; /* Initial Value of R26 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x27272727; /* Initial Value of R27 */\r
+ *pxTopOfStack = ( StackType_t ) 0x27272727; /* Initial Value of R27 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x28282828; /* Initial Value of R28 */\r
+ *pxTopOfStack = ( StackType_t ) 0x28282828; /* Initial Value of R28 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x29292929; /* Initial Value of R29 */\r
+ *pxTopOfStack = ( StackType_t ) 0x29292929; /* Initial Value of R29 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x30303030; /* Initial Value of R30 */\r
+ *pxTopOfStack = ( StackType_t ) 0x30303030; /* Initial Value of R30 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x19191919; /* Initial Value of R19 */\r
+ *pxTopOfStack = ( StackType_t ) 0x19191919; /* Initial Value of R19 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x18181818; /* Initial Value of R18 */\r
+ *pxTopOfStack = ( StackType_t ) 0x18181818; /* Initial Value of R18 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x17171717; /* Initial Value of R17 */\r
+ *pxTopOfStack = ( StackType_t ) 0x17171717; /* Initial Value of R17 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x16161616; /* Initial Value of R16 */\r
+ *pxTopOfStack = ( StackType_t ) 0x16161616; /* Initial Value of R16 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x15151515; /* Initial Value of R15 */\r
+ *pxTopOfStack = ( StackType_t ) 0x15151515; /* Initial Value of R15 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x14141414; /* Initial Value of R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x14141414; /* Initial Value of R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x13131313; /* Initial Value of R13 */\r
+ *pxTopOfStack = ( StackType_t ) 0x13131313; /* Initial Value of R13 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* Initial Value of R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* Initial Value of R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* Initial Value of R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* Initial Value of R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* Initial Value of R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* Initial Value of R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x99999999; /* Initial Value of R09 */\r
+ *pxTopOfStack = ( StackType_t ) 0x99999999; /* Initial Value of R09 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x88888888; /* Initial Value of R08 */\r
+ *pxTopOfStack = ( StackType_t ) 0x88888888; /* Initial Value of R08 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x77777777; /* Initial Value of R07 */\r
+ *pxTopOfStack = ( StackType_t ) 0x77777777; /* Initial Value of R07 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x66666666; /* Initial Value of R06 */\r
+ *pxTopOfStack = ( StackType_t ) 0x66666666; /* Initial Value of R06 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x55555555; /* Initial Value of R05 */\r
+ *pxTopOfStack = ( StackType_t ) 0x55555555; /* Initial Value of R05 */\r
pxTopOfStack--;\r
#if __DATA_MODEL__ == 0 || __DATA_MODEL__ == 1\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x44444444; /* Initial Value of R04 */\r
+ *pxTopOfStack = ( StackType_t ) 0x44444444; /* Initial Value of R04 */\r
pxTopOfStack--;\r
#endif /* configDATA_MODE */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22222222; /* Initial Value of R02 */\r
+ *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R02 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 is expected to hold the function parameter*/\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 is expected to hold the function parameter*/\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/*\r
* Return a pointer to the top of the stack we have generated so this can\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
this function is called. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portSTACK_TYPE unsigned int\r
#define portBASE_TYPE int\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if (configUSE_16_BIT_TICKS==1)\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
#define portDISABLE_INTERRUPTS() __asm ( "DI" )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portBASE_TYPE ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( UBaseType_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile /*unsigned portSHORT*/ portSTACK_TYPE usCriticalNesting; \\r
+extern volatile /*uint16_t*/ portSTACK_TYPE usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile /*unsigned portSHORT*/ portSTACK_TYPE usCriticalNesting; \\r
+extern volatile /*uint16_t*/ portSTACK_TYPE usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Hardwware specifics. */\r
#define portBYTE_ALIGNMENT 4\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
*----------------------------------------------------------*/\r
\r
/* Hardware setup for tick. */\r
-#define portTIMER_FOSC_SCALE ( ( unsigned long ) 4 )\r
+#define portTIMER_FOSC_SCALE ( ( uint32_t ) 4 )\r
\r
/* Initial interrupt enable state for newly created tasks. This value is\r
copied into INTCON when a task switches in for the first time. */\r
area's get used by the compiler for temporary storage, especially when \r
performing mathematical operations, or when using 32bit data types. This\r
constant defines the size of memory area which must be saved. */\r
-#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( unsigned char ) 0x13 )\r
+#define portCOMPILER_MANAGED_MEMORY_SIZE ( ( uint8_t ) 0x13 )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* IO port constants. */\r
-#define portBIT_SET ( ( unsigned char ) 1 )\r
-#define portBIT_CLEAR ( ( unsigned char ) 0 )\r
+#define portBIT_SET ( ( uint8_t ) 1 )\r
+#define portBIT_CLEAR ( ( uint8_t ) 0 )\r
\r
/*\r
* The serial port ISR's are defined in serial.c, but are called from portable\r
_endasm \\r
\\r
/* Store each address from the hardware stack. */ \\r
- while( STKPTR > ( unsigned char ) 0 ) \\r
+ while( STKPTR > ( uint8_t ) 0 ) \\r
{ \\r
_asm \\r
MOVFF TOSL, PREINC1 \\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned long ulAddress;\r
-unsigned char ucBlock;\r
+uint32_t ulAddress;\r
+uint8_t ucBlock;\r
\r
/* Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging. */\r
\r
First store the function parameters. This is where the task will expect to\r
find them when it starts running. */\r
- ulAddress = ( unsigned long ) pvParameters;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ ulAddress = ( uint32_t ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
\r
ulAddress >>= 8;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
\r
/* Next we just leave a space. When a context is saved the stack pointer\r
\r
/* Next are all the registers that form part of the task context. */\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* WREG. */\r
+ *pxTopOfStack = ( StackType_t ) 0x66; /* WREG. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcc; /* Status. */\r
+ *pxTopOfStack = ( StackType_t ) 0xcc; /* Status. */\r
pxTopOfStack++;\r
\r
/* INTCON is saved with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITAL_INTERRUPT_STATE; /* INTCON */\r
+ *pxTopOfStack = ( StackType_t ) portINITAL_INTERRUPT_STATE; /* INTCON */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11; /* BSR. */\r
+ *pxTopOfStack = ( StackType_t ) 0x11; /* BSR. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22; /* FSR2L. */\r
+ *pxTopOfStack = ( StackType_t ) 0x22; /* FSR2L. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x33; /* FSR2H. */\r
+ *pxTopOfStack = ( StackType_t ) 0x33; /* FSR2H. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x44; /* FSR0L. */\r
+ *pxTopOfStack = ( StackType_t ) 0x44; /* FSR0L. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x55; /* FSR0H. */\r
+ *pxTopOfStack = ( StackType_t ) 0x55; /* FSR0H. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x66; /* TABLAT. */\r
+ *pxTopOfStack = ( StackType_t ) 0x66; /* TABLAT. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* TBLPTRU. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* TBLPTRU. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x88; /* TBLPTRUH. */\r
+ *pxTopOfStack = ( StackType_t ) 0x88; /* TBLPTRUH. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x99; /* TBLPTRUL. */\r
+ *pxTopOfStack = ( StackType_t ) 0x99; /* TBLPTRUL. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaa; /* PRODH. */\r
+ *pxTopOfStack = ( StackType_t ) 0xaa; /* PRODH. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xbb; /* PRODL. */\r
+ *pxTopOfStack = ( StackType_t ) 0xbb; /* PRODL. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATU. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* PCLATU. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* PCLATH. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* PCLATH. */\r
pxTopOfStack++;\r
\r
/* Next the .tmpdata and MATH_DATA sections. */\r
for( ucBlock = 0; ucBlock <= portCOMPILER_MANAGED_MEMORY_SIZE; ucBlock++ )\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) ucBlock;\r
+ *pxTopOfStack = ( StackType_t ) ucBlock;\r
*pxTopOfStack++;\r
}\r
\r
/* Store the top of the global data section. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */\r
+ *pxTopOfStack = ( StackType_t ) portCOMPILER_MANAGED_MEMORY_SIZE; /* Low. */\r
pxTopOfStack++;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00; /* High. */\r
+ *pxTopOfStack = ( StackType_t ) 0x00; /* High. */\r
pxTopOfStack++;\r
\r
/* The only function return address so far is the address of the \r
task. */\r
- ulAddress = ( unsigned long ) pxCode;\r
+ ulAddress = ( uint32_t ) pxCode;\r
\r
/* TOS low. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
ulAddress >>= 8;\r
\r
/* TOS high. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
ulAddress >>= 8;\r
\r
/* TOS even higher. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress & ( unsigned long ) 0x00ff );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );\r
pxTopOfStack++;\r
\r
/* Store the number of return addresses on the hardware stack - so far only\r
the address of the task entry point. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 1;\r
+ *pxTopOfStack = ( StackType_t ) 1;\r
pxTopOfStack++;\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup a timer for the tick ISR is using the preemptive scheduler. */\r
prvSetupTimerInterrupt(); \r
*/\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned long ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );\r
-unsigned long ulCompareValue;\r
-unsigned char ucByte;\r
+const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );\r
+uint32_t ulCompareValue;\r
+uint8_t ucByte;\r
\r
/* Interrupts are disabled when this function is called.\r
\r
1.\r
\r
Clear the time count then setup timer. */\r
- TMR1H = ( unsigned char ) 0x00;\r
- TMR1L = ( unsigned char ) 0x00;\r
+ TMR1H = ( uint8_t ) 0x00;\r
+ TMR1L = ( uint8_t ) 0x00;\r
\r
/* Set the compare match value. */\r
ulCompareValue = ulConstCompareValue;\r
- CCPR1L = ( unsigned char ) ( ulCompareValue & ( unsigned long ) 0xff );\r
- ulCompareValue >>= ( unsigned long ) 8;\r
- CCPR1H = ( unsigned char ) ( ulCompareValue & ( unsigned long ) 0xff ); \r
+ CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );\r
+ ulCompareValue >>= ( uint32_t ) 8;\r
+ CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff ); \r
\r
CCP1CONbits.CCP1M0 = portBIT_SET; /*< Compare match mode. */\r
CCP1CONbits.CCP1M1 = portBIT_SET; /*< Compare match mode. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define PORTMACRO_H\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned char\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
#define portBYTE_ALIGNMENT 1\r
#define portGLOBAL_INT_ENABLE_BIT 0x80\r
#define portSTACK_GROWTH 1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
#define portUNUSED_PR_BITS 0x7f\r
\r
/* Records the nesting depth of calls to portENTER_CRITICAL(). */\r
-unsigned portBASE_TYPE uxCriticalNesting = 0xef;\r
+UBaseType_t uxCriticalNesting = 0xef;\r
\r
#if configKERNEL_INTERRUPT_PRIORITY != 1\r
#error If configKERNEL_INTERRUPT_PRIORITY is not 1 then the #32 in the following macros needs changing to equal the portINTERRUPT_BITS value, which is ( configKERNEL_INTERRUPT_PRIORITY << 5 )\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned short usCode;\r
-unsigned portBASE_TYPE i;\r
+uint16_t usCode;\r
+UBaseType_t i;\r
\r
-const portSTACK_TYPE xInitialStack[] =\r
+const StackType_t xInitialStack[] =\r
{\r
0x1111, /* W1 */\r
0x2222, /* W2 */\r
/* Setup the stack as if a yield had occurred.\r
\r
Save the low bytes of the program counter. */\r
- usCode = ( unsigned short ) pxCode;\r
- *pxTopOfStack = ( portSTACK_TYPE ) usCode;\r
+ usCode = ( uint16_t ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) usCode;\r
pxTopOfStack++;\r
\r
/* Save the high byte of the program counter. This will always be zero\r
here as it is passed in a 16bit pointer. If the address is greater than\r
16 bits then the pointer will point to a jump table. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0;\r
+ *pxTopOfStack = ( StackType_t ) 0;\r
pxTopOfStack++;\r
\r
/* Status register with interrupts enabled. */\r
pxTopOfStack++;\r
\r
/* Parameters are passed in W0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack++;\r
\r
- for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( portSTACK_TYPE ) ); i++ )\r
+ for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( StackType_t ) ); i++ )\r
{\r
*pxTopOfStack = xInitialStack[ i ];\r
pxTopOfStack++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup a timer for the tick ISR. */\r
vApplicationSetupTickTimerInterrupt();\r
*/\r
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
{\r
-const unsigned long ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;\r
+const uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;\r
\r
/* Prescale of 8. */\r
T1CON = 0;\r
TMR1 = 0;\r
\r
- PR1 = ( unsigned short ) ulCompareMatch;\r
+ PR1 = ( uint16_t ) ulCompareMatch;\r
\r
/* Setup timer 1 interrupt priority. */\r
IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned short\r
+#define portSTACK_TYPE uint16_t\r
#define portBASE_TYPE short\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH 1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
-#define portINTERRUPT_BITS ( ( unsigned portSHORT ) configKERNEL_INTERRUPT_PRIORITY << ( unsigned portSHORT ) 5 )\r
+#define portINTERRUPT_BITS ( ( uint16_t ) configKERNEL_INTERRUPT_PRIORITY << ( uint16_t ) 5 )\r
\r
-#define portDISABLE_INTERRUPTS() SR |= portINTERRUPT_BITS \r
+#define portDISABLE_INTERRUPTS() SR |= portINTERRUPT_BITS\r
#define portENABLE_INTERRUPTS() SR &= ~portINTERRUPT_BITS\r
\r
/* Note that exiting a critical sectino will set the IPL bits to 0, nomatter\r
the ISR stack. */\r
#define portISR_STACK_FILL_BYTE 0xee\r
\r
- static const unsigned char ucExpectedStackBytes[] = {\r
+ static const uint8_t ucExpectedStackBytes[] = {\r
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
\r
/* Records the interrupt nesting depth. This is initialised to one as it is\r
decremented to 0 when the first task starts. */\r
-volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;\r
+volatile UBaseType_t uxInterruptNesting = 0x01;\r
\r
/* Stores the task stack pointer when a switch is made to use the system stack. */\r
-unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;\r
+UBaseType_t uxSavedTaskStackPointer = 0;\r
\r
/* The stack used by interrupt service routines that cause a context switch. */\r
-portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
+StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
\r
/* The top of stack value ensures there is enough space to store 6 registers on\r
the callers stack, as some functions seem to want to do this. */\r
-const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
+const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Ensure byte alignment is maintained when leaving this function. */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+ *pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
+ *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();\r
+ *pxTopOfStack = (StackType_t) _CP0_GET_CAUSE();\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR;/* CP0_STATUS */\r
+ *pxTopOfStack = (StackType_t) portINITIAL_SR;/* CP0_STATUS */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */\r
+ *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) portTASK_RETURN_ADDRESS; /* ra */\r
+ *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */\r
pxTopOfStack -= 15;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in. */\r
+ *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */\r
pxTopOfStack -= 15;\r
\r
return pxTopOfStack;\r
*/\r
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
{\r
-const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
+const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
\r
T1CON = 0x0000;\r
T1CONbits.TCKPS = portPRESCALE_BITS;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
extern void *pxCurrentTCB;\r
\r
/* Kick off the highest priority task that has been created so far.\r
Its stack location is loaded into uxSavedTaskStackPointer. */\r
- uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;\r
+ uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;\r
vPortStartFirstTask();\r
\r
/* Should never get here as the tasks will now be executing! Call the task\r
\r
void vPortIncrementTick( void )\r
{\r
-unsigned portBASE_TYPE uxSavedStatus;\r
+UBaseType_t uxSavedStatus;\r
\r
uxSavedStatus = uxPortSetInterruptMaskFromISR();\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )\r
+UBaseType_t uxPortSetInterruptMaskFromISR( void )\r
{\r
-unsigned portBASE_TYPE uxSavedStatusRegister;\r
+UBaseType_t uxSavedStatusRegister;\r
\r
__builtin_disable_interrupts();\r
uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )\r
+void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )\r
{\r
_CP0_SET_STATUS( uxSavedStatusRegister );\r
}\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned long portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
#ifdef configASSERT\r
#define portDISABLE_INTERRUPTS() \\r
{ \\r
- unsigned long ulStatus; \\r
+ uint32_t ulStatus; \\r
\\r
/* Mask interrupts at and below the kernel interrupt priority. */ \\r
ulStatus = _CP0_GET_STATUS(); \\r
#else /* configASSERT */\r
#define portDISABLE_INTERRUPTS() \\r
{ \\r
- unsigned long ulStatus; \\r
+ uint32_t ulStatus; \\r
\\r
/* Mask interrupts at and below the kernel interrupt priority. */ \\r
ulStatus = _CP0_GET_STATUS(); \\r
\r
#define portENABLE_INTERRUPTS() \\r
{ \\r
-unsigned long ulStatus; \\r
+uint32_t ulStatus; \\r
\\r
/* Unmask all interrupts. */ \\r
ulStatus = _CP0_GET_STATUS(); \\r
#define portENTER_CRITICAL() vTaskEnterCritical()\r
#define portEXIT_CRITICAL() vTaskExitCritical()\r
\r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR();\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
\r
\r
#define portYIELD() \\r
{ \\r
-unsigned long ulCause; \\r
+uint32_t ulCause; \\r
\\r
/* Trigger software interrupt. */ \\r
ulCause = _CP0_GET_CAUSE(); \\r
the ISR stack. */\r
#define portISR_STACK_FILL_BYTE 0xee\r
\r
- static const unsigned char ucExpectedStackBytes[] = {\r
+ static const uint8_t ucExpectedStackBytes[] = {\r
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
\r
/* Records the interrupt nesting depth. This is initialised to one as it is\r
decremented to 0 when the first task starts. */\r
-volatile unsigned portBASE_TYPE uxInterruptNesting = 0x01;\r
+volatile UBaseType_t uxInterruptNesting = 0x01;\r
\r
/* Stores the task stack pointer when a switch is made to use the system stack. */\r
-unsigned portBASE_TYPE uxSavedTaskStackPointer = 0;\r
+UBaseType_t uxSavedTaskStackPointer = 0;\r
\r
/* The stack used by interrupt service routines that cause a context switch. */\r
-portSTACK_TYPE xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
+StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
\r
/* The top of stack value ensures there is enough space to store 6 registers on\r
the callers stack, as some functions seem to want to do this. */\r
-const portSTACK_TYPE * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
+const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Ensure byte alignment is maintained when leaving this function. */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+ *pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
+ *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) _CP0_GET_CAUSE();\r
+ *pxTopOfStack = (StackType_t) _CP0_GET_CAUSE();\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) portINITIAL_SR;/* CP0_STATUS */\r
+ *pxTopOfStack = (StackType_t) portINITIAL_SR;/* CP0_STATUS */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) pxCode; /* CP0_EPC */\r
+ *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */\r
pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */\r
\r
- *pxTopOfStack = (portSTACK_TYPE) 0x00000000; /* DSPControl */\r
+ *pxTopOfStack = (StackType_t) 0x00000000; /* DSPControl */\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) portTASK_RETURN_ADDRESS; /* ra */\r
+ *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */\r
pxTopOfStack -= 15;\r
\r
- *pxTopOfStack = (portSTACK_TYPE) pvParameters; /* Parameters to pass in. */\r
+ *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */\r
pxTopOfStack -= 15;\r
\r
return pxTopOfStack;\r
*/\r
__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
{\r
-const unsigned long ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
+const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1;\r
\r
T1CON = 0x0000;\r
T1CONbits.TCKPS = portPRESCALE_BITS;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
extern void *pxCurrentTCB;\r
\r
/* Kick off the highest priority task that has been created so far.\r
Its stack location is loaded into uxSavedTaskStackPointer. */\r
- uxSavedTaskStackPointer = *( unsigned portBASE_TYPE * ) pxCurrentTCB;\r
+ uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;\r
vPortStartFirstTask();\r
\r
/* Should never get here as the tasks will now be executing! Call the task\r
\r
void vPortIncrementTick( void )\r
{\r
-unsigned portBASE_TYPE uxSavedStatus;\r
+UBaseType_t uxSavedStatus;\r
\r
uxSavedStatus = uxPortSetInterruptMaskFromISR();\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR( void )\r
+UBaseType_t uxPortSetInterruptMaskFromISR( void )\r
{\r
-unsigned portBASE_TYPE uxSavedStatusRegister;\r
+UBaseType_t uxSavedStatusRegister;\r
\r
__builtin_disable_interrupts();\r
uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE uxSavedStatusRegister )\r
+void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )\r
{\r
_CP0_SET_STATUS( uxSavedStatusRegister );\r
}\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned long portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
#define portIPL_SHIFT ( 10UL )\r
-/* Don't straddle the CEE bit. Interrupts calling FreeRTOS functions should \r
+/* Don't straddle the CEE bit. Interrupts calling FreeRTOS functions should\r
never have higher IPL bits set anyway. */\r
#define portALL_IPL_BITS ( 0x7FUL << portIPL_SHIFT )\r
#define portSW0_BIT ( 0x01 << 8 )\r
#ifdef configASSERT\r
#define portDISABLE_INTERRUPTS() \\r
{ \\r
- unsigned long ulStatus; \\r
+ uint32_t ulStatus; \\r
\\r
/* Mask interrupts at and below the kernel interrupt priority. */ \\r
ulStatus = _CP0_GET_STATUS(); \\r
#else /* configASSERT */\r
#define portDISABLE_INTERRUPTS() \\r
{ \\r
- unsigned long ulStatus; \\r
+ uint32_t ulStatus; \\r
\\r
/* Mask interrupts at and below the kernel interrupt priority. */ \\r
ulStatus = _CP0_GET_STATUS(); \\r
\r
#define portENABLE_INTERRUPTS() \\r
{ \\r
-unsigned long ulStatus; \\r
+uint32_t ulStatus; \\r
\\r
/* Unmask all interrupts. */ \\r
ulStatus = _CP0_GET_STATUS(); \\r
#define portENTER_CRITICAL() vTaskEnterCritical()\r
#define portEXIT_CRITICAL() vTaskExitCritical()\r
\r
-extern unsigned portBASE_TYPE uxPortSetInterruptMaskFromISR();\r
-extern void vPortClearInterruptMaskFromISR( unsigned portBASE_TYPE );\r
+extern UBaseType_t uxPortSetInterruptMaskFromISR();\r
+extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
\r
\r
#define portYIELD() \\r
{ \\r
-unsigned long ulCause; \\r
+uint32_t ulCause; \\r
\\r
/* Trigger software interrupt. */ \\r
ulCause = _CP0_GET_CAUSE(); \\r
#pragma comment(lib, "winmm.lib")\r
#endif\r
\r
-#define portMAX_INTERRUPTS ( ( unsigned long ) sizeof( unsigned long ) * 8UL ) /* The number of bits in an unsigned long. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portMAX_INTERRUPTS ( ( uint32_t ) sizeof( uint32_t ) * 8UL ) /* The number of bits in an uint32_t. */\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
/*\r
* Created as a high priority thread, this function uses a timer to simulate\r
* Interrupt handlers used by the kernel itself. These are executed from the\r
* simulated interrupt handler thread.\r
*/\r
-static unsigned long prvProcessYieldInterrupt( void );\r
-static unsigned long prvProcessTickInterrupt( void );\r
+static uint32_t prvProcessYieldInterrupt( void );\r
+static uint32_t prvProcessTickInterrupt( void );\r
\r
/*\r
* Called when the process exits to let Windows know the high timer resolution\r
\r
/* Simulated interrupts waiting to be processed. This is a bit mask where each\r
bit represents one interrupt, so a maximum of 32 interrupts can be simulated. */\r
-static volatile unsigned long ulPendingInterrupts = 0UL;\r
+static volatile uint32_t ulPendingInterrupts = 0UL;\r
\r
/* An event used to inform the simulated interrupt processing thread (a high\r
priority thread that simulated interrupt processing) that an interrupt is\r
initialisation is probably not critical in this simulated environment as the\r
simulated interrupt handlers do not get created until the FreeRTOS scheduler is\r
started anyway. */\r
-static unsigned long ulCriticalNesting = 9999UL;\r
+static uint32_t ulCriticalNesting = 9999UL;\r
\r
/* Handlers for all the simulated software interrupts. The first two positions\r
are used for the Yield and Tick interrupts so are handled slightly differently,\r
all the other interrupts can be user defined. */\r
-static unsigned long (*ulIsrHandler[ portMAX_INTERRUPTS ])( void ) = { 0 };\r
+static uint32_t (*ulIsrHandler[ portMAX_INTERRUPTS ])( void ) = { 0 };\r
\r
/* Pointer to the TCB of the currently executing task. */\r
extern void *pxCurrentTCB;\r
\r
/* Used to ensure nothing is processed during the startup sequence. */\r
-static portBASE_TYPE xPortRunning = pdFALSE;\r
+static BaseType_t xPortRunning = pdFALSE;\r
\r
/*-----------------------------------------------------------*/\r
\r
static DWORD WINAPI prvSimulatedPeripheralTimer( LPVOID lpParameter )\r
{\r
-portTickType xMinimumWindowsBlockTime;\r
+TickType_t xMinimumWindowsBlockTime;\r
TIMECAPS xTimeCaps;\r
\r
/* Set the timer resolution to the maximum possible. */\r
if( timeGetDevCaps( &xTimeCaps, sizeof( xTimeCaps ) ) == MMSYSERR_NOERROR )\r
{\r
- xMinimumWindowsBlockTime = ( portTickType ) xTimeCaps.wPeriodMin;\r
+ xMinimumWindowsBlockTime = ( TickType_t ) xTimeCaps.wPeriodMin;\r
timeBeginPeriod( xTimeCaps.wPeriodMin );\r
\r
/* Register an exit handler so the timeBeginPeriod() function can be\r
}\r
else\r
{\r
- xMinimumWindowsBlockTime = ( portTickType ) 20;\r
+ xMinimumWindowsBlockTime = ( TickType_t ) 20;\r
}\r
\r
/* Just to prevent compiler warnings. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
xThreadState *pxThreadState = NULL;\r
-signed char *pcTopOfStack = ( char * ) pxTopOfStack;\r
+int8_t *pcTopOfStack = ( int8_t * ) pxTopOfStack;\r
\r
/* In this simulated case a stack is not initialised, but instead a thread\r
is created that will execute the task being created. The thread handles\r
SetThreadPriorityBoost( pxThreadState->pvThread, TRUE );\r
SetThreadPriority( pxThreadState->pvThread, THREAD_PRIORITY_IDLE );\r
\r
- return ( portSTACK_TYPE * ) pxThreadState;\r
+ return ( StackType_t * ) pxThreadState;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
void *pvHandle;\r
-long lSuccess = pdPASS;\r
+int32_t lSuccess = pdPASS;\r
xThreadState *pxThreadState;\r
\r
/* Install the interrupt handlers used by the scheduler itself. */\r
\r
/* Start the highest priority task by obtaining its associated thread\r
state structure, in which is stored the thread handle. */\r
- pxThreadState = ( xThreadState * ) *( ( unsigned long * ) pxCurrentTCB );\r
+ pxThreadState = ( xThreadState * ) *( ( uint32_t * ) pxCurrentTCB );\r
ulCriticalNesting = portNO_CRITICAL_NESTING;\r
\r
/* Bump up the priority of the thread that is going to run, in the\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static unsigned long prvProcessYieldInterrupt( void )\r
+static uint32_t prvProcessYieldInterrupt( void )\r
{\r
return pdTRUE;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static unsigned long prvProcessTickInterrupt( void )\r
+static uint32_t prvProcessTickInterrupt( void )\r
{\r
-unsigned long ulSwitchRequired;\r
+uint32_t ulSwitchRequired;\r
\r
/* Process the tick itself. */\r
configASSERT( xPortRunning );\r
- ulSwitchRequired = ( unsigned long ) xTaskIncrementTick();\r
+ ulSwitchRequired = ( uint32_t ) xTaskIncrementTick();\r
\r
return ulSwitchRequired;\r
}\r
\r
static void prvProcessSimulatedInterrupts( void )\r
{\r
-unsigned long ulSwitchRequired, i;\r
+uint32_t ulSwitchRequired, i;\r
xThreadState *pxThreadState;\r
void *pvObjectList[ 2 ];\r
\r
if( pvOldCurrentTCB != pxCurrentTCB )\r
{\r
/* Suspend the old thread. */\r
- pxThreadState = ( xThreadState *) *( ( unsigned long * ) pvOldCurrentTCB );\r
+ pxThreadState = ( xThreadState *) *( ( uint32_t * ) pvOldCurrentTCB );\r
SuspendThread( pxThreadState->pvThread );\r
\r
/* Obtain the state of the task now selected to enter the\r
Running state. */\r
- pxThreadState = ( xThreadState * ) ( *( unsigned long *) pxCurrentTCB );\r
+ pxThreadState = ( xThreadState * ) ( *( uint32_t *) pxCurrentTCB );\r
ResumeThread( pxThreadState->pvThread );\r
}\r
}\r
void vPortDeleteThread( void *pvTaskToDelete )\r
{\r
xThreadState *pxThreadState;\r
-unsigned long ulErrorCode;\r
+uint32_t ulErrorCode;\r
\r
/* Remove compiler warnings if configASSERT() is not defined. */\r
( void ) ulErrorCode;\r
\r
/* Find the handle of the thread being deleted. */\r
- pxThreadState = ( xThreadState * ) ( *( unsigned long *) pvTaskToDelete );\r
+ pxThreadState = ( xThreadState * ) ( *( uint32_t *) pvTaskToDelete );\r
\r
/* Check that the thread is still valid, it might have been closed by\r
vPortCloseRunningThread() - which will be the case if the task associated\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortCloseRunningThread( void *pvTaskToDelete, volatile portBASE_TYPE *pxPendYield )\r
+void vPortCloseRunningThread( void *pvTaskToDelete, volatile BaseType_t *pxPendYield )\r
{\r
xThreadState *pxThreadState;\r
void *pvThread;\r
-unsigned long ulErrorCode;\r
+uint32_t ulErrorCode;\r
\r
/* Remove compiler warnings if configASSERT() is not defined. */\r
( void ) ulErrorCode;\r
\r
/* Find the handle of the thread being deleted. */\r
- pxThreadState = ( xThreadState * ) ( *( unsigned long *) pvTaskToDelete );\r
+ pxThreadState = ( xThreadState * ) ( *( uint32_t *) pvTaskToDelete );\r
pvThread = pxThreadState->pvThread;\r
\r
/* Raise the Windows priority of the thread to ensure the FreeRTOS scheduler\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortGenerateSimulatedInterrupt( unsigned long ulInterruptNumber )\r
+void vPortGenerateSimulatedInterrupt( uint32_t ulInterruptNumber )\r
{\r
configASSERT( xPortRunning );\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortSetInterruptHandler( unsigned long ulInterruptNumber, unsigned long (*pvHandler)( void ) )\r
+void vPortSetInterruptHandler( uint32_t ulInterruptNumber, uint32_t (*pvHandler)( void ) )\r
{\r
if( ulInterruptNumber < portMAX_INTERRUPTS )\r
{\r
\r
void vPortExitCritical( void )\r
{\r
-long lMutexNeedsReleasing;\r
+int32_t lMutexNeedsReleasing;\r
\r
/* The interrupt event mutex should already be held by this thread as it was\r
obtained on entry to the critical section. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
\r
#define portYIELD() vPortGenerateSimulatedInterrupt( portINTERRUPT_YIELD )\r
\r
-void vPortCloseRunningThread( void *pvTaskToDelete, volatile portBASE_TYPE *pxPendYield );\r
+void vPortCloseRunningThread( void *pvTaskToDelete, volatile BaseType_t *pxPendYield );\r
void vPortDeleteThread( void *pvThreadToDelete );\r
#define portCLEAN_UP_TCB( pxTCB ) vPortDeleteThread( pxTCB )\r
#define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxPendYield ) vPortCloseRunningThread( ( pvTaskToDelete ), ( pxPendYield ) )\r
* Each bit can be used to represent an individual interrupt - with the first\r
* two bits being used for the Yield and Tick interrupts respectively.\r
*/\r
-void vPortGenerateSimulatedInterrupt( unsigned long ulInterruptNumber );\r
+void vPortGenerateSimulatedInterrupt( uint32_t ulInterruptNumber );\r
\r
/*\r
* Install an interrupt handler to be called by the simulated interrupt handler\r
* Interrupt handler functions must return a non-zero value if executing the\r
* handler resulted in a task switch being required.\r
*/\r
-void vPortSetInterruptHandler( unsigned long ulInterruptNumber, unsigned long (*pvHandler)( void ) );\r
+void vPortSetInterruptHandler( uint32_t ulInterruptNumber, uint32_t (*pvHandler)( void ) );\r
\r
#endif\r
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )\r
\r
/* Allocate the memory for the heap. */\r
-static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];\r
+static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];\r
static size_t xNextFreeByte = ( size_t ) 0;\r
\r
/*-----------------------------------------------------------*/\r
void *pvPortMalloc( size_t xWantedSize )\r
{\r
void *pvReturn = NULL;\r
-static unsigned char *pucAlignedHeap = NULL;\r
+static uint8_t *pucAlignedHeap = NULL;\r
\r
/* Ensure that blocks are always aligned to the required number of bytes. */\r
#if portBYTE_ALIGNMENT != 1\r
if( pucAlignedHeap == NULL )\r
{\r
/* Ensure the heap starts on a correctly aligned boundary. */\r
- pucAlignedHeap = ( unsigned char * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
+ pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
}\r
\r
/* Check there is enough room left for the allocation. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
/* A few bytes might be lost to byte aligning the heap start address. */\r
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )\r
\r
-/* \r
+/*\r
* Initialises the heap structures before their first use.\r
*/\r
static void prvHeapInit( void );\r
\r
/* Allocate the memory for the heap. */\r
-static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];\r
+static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];\r
\r
/* Define the linked list structure. This is used to link free blocks in order\r
of their size. */\r
{\r
struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */\r
size_t xBlockSize; /*<< The size of the free block. */\r
-} xBlockLink;\r
+} BlockLink_t;\r
\r
\r
-static const unsigned short heapSTRUCT_SIZE = ( ( sizeof ( xBlockLink ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );\r
+static const uint16_t heapSTRUCT_SIZE = ( ( sizeof ( BlockLink_t ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );\r
#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )\r
\r
/* Create a couple of list links to mark the start and end of the list. */\r
-static xBlockLink xStart, xEnd;\r
+static BlockLink_t xStart, xEnd;\r
\r
/* Keeps track of the number of free bytes remaining, but says nothing about\r
fragmentation. */\r
*/\r
#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \\r
{ \\r
-xBlockLink *pxIterator; \\r
+BlockLink_t *pxIterator; \\r
size_t xBlockSize; \\r
\\r
xBlockSize = pxBlockToInsert->xBlockSize; \\r
\r
void *pvPortMalloc( size_t xWantedSize )\r
{\r
-xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink;\r
-static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE;\r
+BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;\r
+static BaseType_t xHeapHasBeenInitialised = pdFALSE;\r
void *pvReturn = NULL;\r
\r
vTaskSuspendAll();\r
xHeapHasBeenInitialised = pdTRUE;\r
}\r
\r
- /* The wanted size is increased so it can contain a xBlockLink\r
+ /* The wanted size is increased so it can contain a BlockLink_t\r
structure in addition to the requested amount of bytes. */\r
if( xWantedSize > 0 )\r
{\r
/* If we found the end marker then a block of adequate size was not found. */\r
if( pxBlock != &xEnd )\r
{\r
- /* Return the memory space - jumping over the xBlockLink structure\r
+ /* Return the memory space - jumping over the BlockLink_t structure\r
at its start. */\r
- pvReturn = ( void * ) ( ( ( unsigned char * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );\r
+ pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );\r
\r
/* This block is being returned for use so must be taken out of the\r
list of free blocks. */\r
/* This block is to be split into two. Create a new block\r
following the number of bytes requested. The void cast is\r
used to prevent byte alignment warnings from the compiler. */\r
- pxNewBlockLink = ( void * ) ( ( ( unsigned char * ) pxBlock ) + xWantedSize );\r
+ pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );\r
\r
/* Calculate the sizes of two blocks split from the single\r
block. */\r
xFreeBytesRemaining -= pxBlock->xBlockSize;\r
}\r
}\r
- \r
+\r
traceMALLOC( pvReturn, xWantedSize );\r
}\r
xTaskResumeAll();\r
\r
void vPortFree( void *pv )\r
{\r
-unsigned char *puc = ( unsigned char * ) pv;\r
-xBlockLink *pxLink;\r
+uint8_t *puc = ( uint8_t * ) pv;\r
+BlockLink_t *pxLink;\r
\r
if( pv != NULL )\r
{\r
- /* The memory being freed will have an xBlockLink structure immediately\r
+ /* The memory being freed will have an BlockLink_t structure immediately\r
before it. */\r
puc -= heapSTRUCT_SIZE;\r
\r
- /* This unexpected casting is to keep some compilers from issuing \r
+ /* This unexpected casting is to keep some compilers from issuing\r
byte alignment warnings. */\r
pxLink = ( void * ) puc;\r
\r
vTaskSuspendAll();\r
{\r
/* Add this block to the list of free blocks. */\r
- prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) );\r
+ prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );\r
xFreeBytesRemaining += pxLink->xBlockSize;\r
traceFREE( pv, pxLink->xBlockSize );\r
}\r
\r
static void prvHeapInit( void )\r
{\r
-xBlockLink *pxFirstFreeBlock;\r
-unsigned char *pucAlignedHeap;\r
+BlockLink_t *pxFirstFreeBlock;\r
+uint8_t *pucAlignedHeap;\r
\r
/* Ensure the heap starts on a correctly aligned boundary. */\r
- pucAlignedHeap = ( unsigned char * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
+ pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
\r
/* xStart is used to hold a pointer to the first item in the list of free\r
blocks. The void cast is used to prevent compiler warnings. */\r
#define heapADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )\r
\r
/* Allocate the memory for the heap. */\r
-static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];\r
+static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];\r
\r
/* Define the linked list structure. This is used to link free blocks in order\r
of their memory address. */\r
{\r
struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */\r
size_t xBlockSize; /*<< The size of the free block. */\r
-} xBlockLink;\r
+} BlockLink_t;\r
\r
/*-----------------------------------------------------------*/\r
\r
* the block in front it and/or the block behind it if the memory blocks are\r
* adjacent to each other.\r
*/\r
-static void prvInsertBlockIntoFreeList( xBlockLink *pxBlockToInsert );\r
+static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );\r
\r
/*\r
* Called automatically to setup the required heap structures the first time\r
\r
/* The size of the structure placed at the beginning of each allocated memory\r
block must by correctly byte aligned. */\r
-static const unsigned short heapSTRUCT_SIZE = ( ( sizeof ( xBlockLink ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );\r
+static const uint16_t heapSTRUCT_SIZE = ( ( sizeof ( BlockLink_t ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );\r
\r
/* Ensure the pxEnd pointer will end up on the correct byte alignment. */\r
static const size_t xTotalHeapSize = ( ( size_t ) heapADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );\r
\r
/* Create a couple of list links to mark the start and end of the list. */\r
-static xBlockLink xStart, *pxEnd = NULL;\r
+static BlockLink_t xStart, *pxEnd = NULL;\r
\r
/* Keeps track of the number of free bytes remaining, but says nothing about\r
fragmentation. */\r
static size_t xMinimumEverFreeBytesRemaining = ( ( size_t ) heapADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );\r
\r
/* Gets set to the top bit of an size_t type. When this bit in the xBlockSize\r
-member of an xBlockLink structure is set then the block belongs to the\r
+member of an BlockLink_t structure is set then the block belongs to the\r
application. When the bit is free the block is still part of the free heap\r
space. */\r
static size_t xBlockAllocatedBit = 0;\r
\r
void *pvPortMalloc( size_t xWantedSize )\r
{\r
-xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink;\r
+BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;\r
void *pvReturn = NULL;\r
\r
vTaskSuspendAll();\r
}\r
\r
/* Check the requested block size is not so large that the top bit is\r
- set. The top bit of the block size member of the xBlockLink structure\r
+ set. The top bit of the block size member of the BlockLink_t structure\r
is used to determine who owns the block - the application or the\r
kernel, so it must be free. */\r
if( ( xWantedSize & xBlockAllocatedBit ) == 0 )\r
{\r
- /* The wanted size is increased so it can contain a xBlockLink\r
+ /* The wanted size is increased so it can contain a BlockLink_t\r
structure in addition to the requested amount of bytes. */\r
if( xWantedSize > 0 )\r
{\r
if( pxBlock != pxEnd )\r
{\r
/* Return the memory space pointed to - jumping over the\r
- xBlockLink structure at its start. */\r
- pvReturn = ( void * ) ( ( ( unsigned char * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );\r
+ BlockLink_t structure at its start. */\r
+ pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );\r
\r
/* This block is being returned for use so must be taken out\r
of the list of free blocks. */\r
block following the number of bytes requested. The void\r
cast is used to prevent byte alignment warnings from the\r
compiler. */\r
- pxNewBlockLink = ( void * ) ( ( ( unsigned char * ) pxBlock ) + xWantedSize );\r
+ pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );\r
\r
/* Calculate the sizes of two blocks split from the\r
single block. */\r
\r
void vPortFree( void *pv )\r
{\r
-unsigned char *puc = ( unsigned char * ) pv;\r
-xBlockLink *pxLink;\r
+uint8_t *puc = ( uint8_t * ) pv;\r
+BlockLink_t *pxLink;\r
\r
if( pv != NULL )\r
{\r
- /* The memory being freed will have an xBlockLink structure immediately\r
+ /* The memory being freed will have an BlockLink_t structure immediately\r
before it. */\r
puc -= heapSTRUCT_SIZE;\r
\r
{\r
/* Add this block to the list of free blocks. */\r
xFreeBytesRemaining += pxLink->xBlockSize;\r
- prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) );\r
+ prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );\r
traceFREE( pv, pxLink->xBlockSize );\r
}\r
xTaskResumeAll();\r
\r
static void prvHeapInit( void )\r
{\r
-xBlockLink *pxFirstFreeBlock;\r
-unsigned char *pucHeapEnd, *pucAlignedHeap;\r
+BlockLink_t *pxFirstFreeBlock;\r
+uint8_t *pucHeapEnd, *pucAlignedHeap;\r
\r
/* Ensure the heap starts on a correctly aligned boundary. */\r
- pucAlignedHeap = ( unsigned char * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
+ pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );\r
\r
/* xStart is used to hold a pointer to the first item in the list of free\r
blocks. The void cast is used to prevent compiler warnings. */\r
pucHeapEnd = pucAlignedHeap + xTotalHeapSize;\r
pucHeapEnd -= heapSTRUCT_SIZE;\r
pxEnd = ( void * ) pucHeapEnd;\r
- configASSERT( ( ( ( unsigned long ) pxEnd ) & ( ( unsigned long ) portBYTE_ALIGNMENT_MASK ) ) == 0UL );\r
+ configASSERT( ( ( ( uint32_t ) pxEnd ) & ( ( uint32_t ) portBYTE_ALIGNMENT_MASK ) ) == 0UL );\r
pxEnd->xBlockSize = 0;\r
pxEnd->pxNextFreeBlock = NULL;\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvInsertBlockIntoFreeList( xBlockLink *pxBlockToInsert )\r
+static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )\r
{\r
-xBlockLink *pxIterator;\r
-unsigned char *puc;\r
+BlockLink_t *pxIterator;\r
+uint8_t *puc;\r
\r
/* Iterate through the list until a block is found that has a higher address\r
than the block being inserted. */\r
\r
/* Do the block being inserted, and the block it is being inserted after\r
make a contiguous block of memory? */\r
- puc = ( unsigned char * ) pxIterator;\r
- if( ( puc + pxIterator->xBlockSize ) == ( unsigned char * ) pxBlockToInsert )\r
+ puc = ( uint8_t * ) pxIterator;\r
+ if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )\r
{\r
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;\r
pxBlockToInsert = pxIterator;\r
\r
/* Do the block being inserted, and the block it is being inserted before\r
make a contiguous block of memory? */\r
- puc = ( unsigned char * ) pxBlockToInsert;\r
- if( ( puc + pxBlockToInsert->xBlockSize ) == ( unsigned char * ) pxIterator->pxNextFreeBlock )\r
+ puc = ( uint8_t * ) pxBlockToInsert;\r
+ if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )\r
{\r
if( pxIterator->pxNextFreeBlock != pxEnd )\r
{\r
#include "portasm.h"\r
\r
/* The timer increments every four clocks, hence the divide by 4. */\r
-#define portTIMER_COMPARE ( unsigned short ) ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / ( unsigned long ) 4 )\r
+#define portTIMER_COMPARE ( uint16_t ) ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / ( uint32_t ) 4 )\r
\r
/* From the RDC data sheet. */\r
-#define portENABLE_TIMER_AND_INTERRUPT ( unsigned short ) 0xe001\r
+#define portENABLE_TIMER_AND_INTERRUPT ( uint16_t ) 0xe001\r
\r
/* Interrupt control. */\r
#define portEIO_REGISTER 0xff22\r
\r
/*-----------------------------------------------------------*/\r
/* See header file for description. */\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE DS_Reg = 0;\r
+StackType_t DS_Reg = 0;\r
\r
/* Place a few bytes of known values on the bottom of the stack.\r
This is just useful for debugging. */\r
/* The remaining registers would be pushed on the stack by our context\r
switch function. These are loaded with values simply to make debugging\r
easier. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xAAAA; /* AX */\r
+ *pxTopOfStack = ( StackType_t ) 0xAAAA; /* AX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BX */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xCCCC; /* CX */\r
+ *pxTopOfStack = ( StackType_t ) 0xCCCC; /* CX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDDDD; /* DX */\r
+ *pxTopOfStack = ( StackType_t ) 0xDDDD; /* DX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xEEEE; /* ES */\r
+ *pxTopOfStack = ( StackType_t ) 0xEEEE; /* ES */\r
pxTopOfStack--;\r
\r
/* We need the true data segment. */\r
\r
*pxTopOfStack = DS_Reg; /* DS */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0123; /* SI */\r
+ *pxTopOfStack = ( StackType_t ) 0x0123; /* SI */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDDDD; /* DI */\r
+ *pxTopOfStack = ( StackType_t ) 0xDDDD; /* DI */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BP */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BP */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* This is called with interrupts already disabled. */\r
\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned short usTimerACompare = portTIMER_COMPARE, usTimerAMode = portENABLE_TIMER_AND_INTERRUPT;\r
-const unsigned short usT2_IRQ = 0x13;\r
+const uint16_t usTimerACompare = portTIMER_COMPARE, usTimerAMode = portENABLE_TIMER_AND_INTERRUPT;\r
+const uint16_t usT2_IRQ = 0x13;\r
\r
/* Configure the timer, the dummy handler is used here as the init\r
function leaves interrupts enabled. */\r
1 tab == 4 spaces!\r
*/\r
\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
extern void vTaskSwitchContext( void );\r
\r
/*\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE long\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
#define portNOP() __asm{ nop }\r
#define portSTACK_GROWTH ( -1 )\r
#define portSWITCH_INT_NUMBER 0x80\r
-#define portYIELD() __asm{ int portSWITCH_INT_NUMBER } \r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 2\r
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */\r
/*-----------------------------------------------------------*/\r
#define portTIMER_COMPARE ( configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 4UL ) )\r
\r
/* From the RDC data sheet. */\r
-#define portENABLE_TIMER_AND_INTERRUPT ( unsigned short ) 0xe00b\r
-#define portENABLE_TIMER ( unsigned short ) 0xC001\r
+#define portENABLE_TIMER_AND_INTERRUPT ( uint16_t ) 0xe00b\r
+#define portENABLE_TIMER ( uint16_t ) 0xC001\r
\r
/* Interrupt control. */\r
#define portEIO_REGISTER 0xff22\r
\r
/*-----------------------------------------------------------*/\r
/* See header file for description. */\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE DS_Reg = 0;\r
+StackType_t DS_Reg = 0;\r
\r
/* We need the true data segment. */\r
__asm{ MOV DS_Reg, DS };\r
/* The remaining registers would be pushed on the stack by our context\r
switch function. These are loaded with values simply to make debugging\r
easier. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xAAAA; /* AX */\r
+ *pxTopOfStack = ( StackType_t ) 0xAAAA; /* AX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BX */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xCCCC; /* CX */\r
+ *pxTopOfStack = ( StackType_t ) 0xCCCC; /* CX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDDDD; /* DX */\r
+ *pxTopOfStack = ( StackType_t ) 0xDDDD; /* DX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xEEEE; /* ES */\r
+ *pxTopOfStack = ( StackType_t ) 0xEEEE; /* ES */\r
pxTopOfStack--;\r
\r
*pxTopOfStack = DS_Reg; /* DS */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0123; /* SI */\r
+ *pxTopOfStack = ( StackType_t ) 0x0123; /* SI */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDDDD; /* DI */\r
+ *pxTopOfStack = ( StackType_t ) 0xDDDD; /* DI */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BP */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BP */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* This is called with interrupts already disabled. */\r
\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-const unsigned long ulCompareValue = portTIMER_COMPARE;\r
-unsigned short usTimerCompare;\r
+const uint32_t ulCompareValue = portTIMER_COMPARE;\r
+uint16_t usTimerCompare;\r
\r
- usTimerCompare = ( unsigned short ) ( ulCompareValue >> 4 );\r
+ usTimerCompare = ( uint16_t ) ( ulCompareValue >> 4 );\r
t2_init( portENABLE_TIMER, portPRESCALE_VALUE, NULL );\r
\r
#if( configUSE_PREEMPTION == 1 )\r
#ifndef PORT_ASM_H\r
#define PORT_ASM_H\r
\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
extern void vTaskSwitchContext( void );\r
\r
/*\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE long\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
\r
typedef void ( __interrupt __far *pxISR )();\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
#define portNOP() __asm{ nop }\r
#define portSTACK_GROWTH ( -1 )\r
#define portSWITCH_INT_NUMBER 0x80\r
-#define portYIELD() __asm{ int portSWITCH_INT_NUMBER } \r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 2\r
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */\r
/*-----------------------------------------------------------*/\r
#include "task.h"\r
\r
/* Constants required to setup the initial task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )\r
\r
/* Constants required to setup the tick ISR. */\r
-#define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x01 )\r
#define portPRESCALE_VALUE 0x00\r
-#define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )\r
-#define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )\r
+#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )\r
+#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )\r
\r
/* Constants required to setup the VIC for the tick ISR. */\r
-#define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )\r
-#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )\r
-#define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )\r
+#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )\r
+#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )\r
+#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )\r
\r
/* Constants required to handle interrupts. */\r
-#define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )\r
-#define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )\r
+#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )\r
+#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )\r
\r
/*-----------------------------------------------------------*/\r
\r
track of the critical section nesting. This variable has to be stored\r
as part of the task context and must be initialised to a non zero value. */\r
\r
-#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )\r
-volatile unsigned portLONG ulCriticalNesting = 9999UL;\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
/* Setup the initial stack of the task. The stack is set exactly as \r
expected by the portRESTORE_CONTEXT() macro.\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The last thing onto the stack is the status register, which is set for\r
system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )\r
{\r
/* We want the task to start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Start the timer that generates the tick ISR. */\r
prvSetupTimerInterrupt();\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned portLONG ulCompareMatch;\r
+uint32_t ulCompareMatch;\r
\r
/* A 1ms tick does not require the use of the timer prescale. This is\r
defaulted to zero but can be used if necessary. */\r
scheduler is being used. */\r
#if configUSE_PREEMPTION == 1\r
{ \r
- VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;\r
+ VICVectAddr0 = ( uint32_t ) vPreemptiveTick;\r
}\r
#else\r
{\r
- VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick;\r
+ VICVectAddr0 = ( uint32_t ) vNonPreemptiveTick;\r
}\r
#endif\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
\r
* is required from an ISR.\r
*----------------------------------------------------------*/\r
\r
-/* If a switch is required then we just need to call */ \r
+/* If a switch is required then we just need to call */\r
/* vTaskSwitchContext() as the context has already been */\r
/* saved. */\r
\r
/* Critical section management. */\r
\r
/*\r
- ****************************************************************** \r
+ ******************************************************************\r
* We don't need to worry about whether we're in ARM or\r
- * THUMB mode with the Keil Real View compiler when enabling \r
- * or disabling interrupts as the compiler's intrinsic functions \r
+ * THUMB mode with the Keil Real View compiler when enabling\r
+ * or disabling interrupts as the compiler's intrinsic functions\r
* take care of that for us.\r
*******************************************************************\r
*/\r
-#define portDISABLE_INTERRUPTS() __disable_irq() \r
+#define portDISABLE_INTERRUPTS() __disable_irq()\r
#define portENABLE_INTERRUPTS() __enable_irq()\r
\r
\r
* The code generated by the Keil compiler does not maintain separate\r
* stack and frame pointers. The portENTER_CRITICAL macro cannot therefore\r
* use the stack as per other ports. Instead a variable is used to keep\r
- * track of the critical section nesting. This necessitates the use of a \r
+ * track of the critical section nesting. This necessitates the use of a\r
* function in place of the macro.\r
*----------------------------------------------------------*/\r
\r
\r
#define portENTER_CRITICAL() vPortEnterCritical();\r
#define portEXIT_CRITICAL() vPortExitCritical();\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Compiler specifics. */\r
#define inline\r
#define register\r
#define portNOP() __asm{ NOP }\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
\r
/* A critical section is exited when the critical section nesting count reaches\r
this value. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
/* In all GICs 255 can be written to the priority mask register to unmask all\r
(but the lowest) interrupt priority. */\r
part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task\r
does not have an FPU context, or any other value if the task does have an FPU\r
context. */\r
-#define portNO_FLOATING_POINT_CONTEXT ( ( portSTACK_TYPE ) 0 )\r
+#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )\r
\r
/* Interrupt controller access addresses. */\r
#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )\r
#define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )\r
#define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )\r
#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
-#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
-#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
+#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint8_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
\r
/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary\r
point is zero. */\r
-#define portBINARY_POINT_BITS ( ( unsigned char ) 0x03 )\r
+#define portBINARY_POINT_BITS ( ( uint8_t ) 0x03 )\r
\r
/* Constants required to setup the initial task context. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
#define portINTERRUPT_ENABLE_BIT ( 0x80UL )\r
#define portTHUMB_MODE_ADDRESS ( 0x01UL )\r
\r
a non zero value to ensure interrupts don't inadvertently become unmasked before\r
the scheduler starts. As it is stored as part of the task context it will\r
automatically be set to 0 when the first task is started. */\r
-volatile unsigned long ulCriticalNesting = 9999UL;\r
+volatile uint32_t ulCriticalNesting = 9999UL;\r
\r
/* Used to pass constants into the ASM code. The address at which variables are\r
placed is the constant value so indirect loads in the asm code are not\r
required. */\r
-unsigned long ulICCIAR __attribute__( ( at( portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ) ) );\r
-unsigned long ulICCEOIR __attribute__( ( at( portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ) ) );\r
-unsigned long ulICCPMR __attribute__( ( at( portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ) ) );\r
-unsigned long ulAsmAPIPriorityMask __attribute__( ( at( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) ) );\r
+uint32_t ulICCIAR __attribute__( ( at( portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ) ) );\r
+uint32_t ulICCEOIR __attribute__( ( at( portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ) ) );\r
+uint32_t ulICCPMR __attribute__( ( at( portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ) ) );\r
+uint32_t ulAsmAPIPriorityMask __attribute__( ( at( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) ) );\r
\r
/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then\r
a floating point context must be saved and restored for the task. */\r
-unsigned long ulPortTaskHasFPUContext = pdFALSE;\r
+uint32_t ulPortTaskHasFPUContext = pdFALSE;\r
\r
/* Set to 1 to pend a context switch from an ISR. */\r
-unsigned long ulPortYieldRequired = pdFALSE;\r
+uint32_t ulPortYieldRequired = pdFALSE;\r
\r
/* Counts the interrupt nesting depth. A context switch is only performed if\r
if the nesting depth is 0. */\r
-unsigned long ulPortInterruptNesting = 0UL;\r
+uint32_t ulPortInterruptNesting = 0UL;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Setup the initial stack of the task. The stack is set exactly as\r
expected by the portRESTORE_CONTEXT() macro.\r
pxTopOfStack--;\r
*pxTopOfStack = NULL;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
\r
- if( ( ( unsigned long ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )\r
+ if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )\r
{\r
/* The task will start in THUMB mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
pxTopOfStack--;\r
\r
/* Next the return address, which in this case is the start of the task. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
\r
/* Next all the registers other than the stack pointer. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The task will start with a critical nesting count of 0 as interrupts are\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
-unsigned long ulAPSR;\r
+uint32_t ulAPSR;\r
\r
/* Only continue if the CPU is not in User mode. The CPU must be in a\r
Privileged mode for the scheduler to start. */\r
\r
void vPortTaskUsesFPU( void )\r
{\r
-unsigned long ulInitialFPSCR = 0;\r
+uint32_t ulInitialFPSCR = 0;\r
\r
/* A task is registering the fact that it needs an FPU context. Set the\r
FPU flag (which is saved as part of the task context). */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vPortClearInterruptMask( unsigned long ulNewMaskValue )\r
+void vPortClearInterruptMask( uint32_t ulNewMaskValue )\r
{\r
if( ulNewMaskValue == pdFALSE )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned long ulPortSetInterruptMask( void )\r
+uint32_t ulPortSetInterruptMask( void )\r
{\r
-unsigned long ulReturn;\r
+uint32_t ulReturn;\r
\r
__disable_irq();\r
if( portICCPMR_PRIORITY_MASK_REGISTER == ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
-#define portBASE_TYPE portLONG\r
+#define portSTACK_TYPE uint32_t\r
+#define portBASE_TYPE long\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned short portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned long portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
\r
/*-----------------------------------------------------------*/\r
/* Called at the end of an ISR that can cause a context switch. */\r
#define portEND_SWITCHING_ISR( xSwitchRequired )\\r
{ \\r
-extern unsigned long ulPortYieldRequired; \\r
+extern uint32_t ulPortYieldRequired; \\r
\\r
if( xSwitchRequired != pdFALSE ) \\r
{ \\r
\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
\r
/* These macros do not globally disable/enable interrupts. They do mask off\r
interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */\r
void vPortTaskUsesFPU( void );\r
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
\r
-#define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
+#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )\r
\r
/* Architecture specific optimisations. */\r
#include "task.h"\r
\r
/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t *) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t *) 0xe000e014 )\r
+#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )\r
+#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )\r
#define portNVIC_SYSTICK_CLK 0x00000004\r
#define portNVIC_SYSTICK_INT 0x00000002\r
#define portNVIC_SYSTICK_ENABLE 0x00000001\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts.\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11..R4. */\r
\r
return pxTopOfStack;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm unsigned long ulSetInterruptMaskFromISR( void )\r
+__asm uint32_t ulSetInterruptMaskFromISR( void )\r
{\r
mrs r0, PRIMASK\r
cpsid i\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm void vClearInterruptMaskFromISR( unsigned long ulMask )\r
+__asm void vClearInterruptMaskFromISR( uint32_t ulMask )\r
{\r
msr PRIMASK, r0\r
bx lr\r
\r
void xPortSysTickHandler( void )\r
{\r
-unsigned long ulPreviousMask;\r
+uint32_t ulPreviousMask;\r
\r
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/* Critical section management. */\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
-extern unsigned long ulSetInterruptMaskFromISR( void );\r
-extern void vClearInterruptMaskFromISR( unsigned long ulMask );\r
+extern uint32_t ulSetInterruptMaskFromISR( void );\r
+extern void vClearInterruptMaskFromISR( uint32_t ulMask );\r
\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x )\r
#endif\r
\r
/* Constants required to manipulate the core. Registers first... */\r
-#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
-#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )\r
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )\r
/* ...then bits in the registers. */\r
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )\r
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )\r
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )\r
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )\r
\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
\r
/* Constants required to check the validity of an interrupt priority. */\r
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )\r
-#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
-#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )\r
-#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )\r
-#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )\r
+#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )\r
+#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )\r
+#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )\r
+#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )\r
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )\r
#define portPRIGROUP_SHIFT ( 8UL )\r
\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts. The implementation in this\r
* The number of SysTick increments that make up one tick period.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulTimerCountsForOneTick = 0;\r
+ static uint32_t ulTimerCountsForOneTick = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* 24 bit resolution of the SysTick timer.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* power functionality only.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulStoppedTimerCompensation = 0;\r
+ static uint32_t ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
*/\r
#if ( configASSERT_DEFINED == 1 )\r
- static unsigned char ucMaxSysCallPriority = 0;\r
- static unsigned long ulMaxPRIGROUPValue = 0;\r
- static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16;\r
+ static uint8_t ucMaxSysCallPriority = 0;\r
+ static uint32_t ulMaxPRIGROUPValue = 0;\r
+ static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;\r
#endif /* configASSERT_DEFINED */\r
\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */\r
\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
\r
return pxTopOfStack;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
#if( configASSERT_DEFINED == 1 )\r
{\r
- volatile unsigned long ulOriginalPriority;\r
- volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
- volatile unsigned char ucMaxPriorityValue;\r
+ volatile uint32_t ulOriginalPriority;\r
+ volatile int8_t * const pcFirstUserPriorityRegister = ( int8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
+ volatile uint8_t ucMaxPriorityValue;\r
\r
/* Determine the maximum priority from which ISR safe FreeRTOS API\r
functions can be called. ISR safe functions are those that end in\r
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
{\r
ulMaxPRIGROUPValue--;\r
- ucMaxPriorityValue <<= ( unsigned char ) 0x01;\r
+ ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
}\r
\r
/* Shift the priority group value back to its position within the AIRCR\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
- portTickType xModifiableIdleTime;\r
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
+ TickType_t xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
\r
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
- unsigned long ulCalculatedLoadValue;\r
+ uint32_t ulCalculatedLoadValue;\r
\r
/* The tick interrupt has already executed, and the SysTick\r
count reloaded with ulReloadValue. Reset the\r
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */\r
/*-----------------------------------------------------------*/\r
\r
-__asm unsigned long ulPortSetInterruptMask( void )\r
+__asm uint32_t ulPortSetInterruptMask( void )\r
{\r
PRESERVE8\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm void vPortClearInterruptMask( unsigned long ulNewMask )\r
+__asm void vPortClearInterruptMask( uint32_t ulNewMask )\r
{\r
PRESERVE8\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm unsigned long vPortGetIPSR( void )\r
+__asm uint32_t vPortGetIPSR( void )\r
{\r
PRESERVE8\r
\r
\r
void vPortValidateInterruptPriority( void )\r
{\r
- unsigned long ulCurrentInterrupt;\r
- unsigned char ucCurrentPriority;\r
+ uint32_t ulCurrentInterrupt;\r
+ uint8_t ucCurrentPriority;\r
\r
/* Obtain the number of the currently executing interrupt. */\r
ulCurrentInterrupt = vPortGetIPSR();\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMask );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMask );\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
\r
\r
/* Tickless idle/low power functionality. */\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
/*-----------------------------------------------------------*/\r
#endif\r
\r
/* Constants required to manipulate the core. Registers first... */\r
-#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )\r
-#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )\r
-#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )\r
-#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )\r
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )\r
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )\r
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )\r
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )\r
/* ...then bits in the registers. */\r
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )\r
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )\r
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )\r
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )\r
\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
\r
/* Constants required to check the validity of an interrupt priority. */\r
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )\r
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )\r
-#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
-#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )\r
-#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )\r
-#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )\r
+#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )\r
+#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )\r
+#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )\r
+#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )\r
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )\r
#define portPRIGROUP_SHIFT ( 8UL )\r
\r
/* Constants required to manipulate the VFP. */\r
-#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
+#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */\r
#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )\r
\r
/* Constants required to set up the initial stack. */\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;\r
\r
/*\r
* Setup the timer to generate the tick interrupts. The implementation in this\r
* The number of SysTick increments that make up one tick period.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulTimerCountsForOneTick = 0;\r
+ static uint32_t ulTimerCountsForOneTick = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* 24 bit resolution of the SysTick timer.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long xMaximumPossibleSuppressedTicks = 0;\r
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* power functionality only.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static unsigned long ulStoppedTimerCompensation = 0;\r
+ static uint32_t ulStoppedTimerCompensation = 0;\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*\r
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
*/\r
#if ( configASSERT_DEFINED == 1 )\r
- static unsigned char ucMaxSysCallPriority = 0;\r
- static unsigned long ulMaxPRIGROUPValue = 0;\r
- static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16;\r
+ static uint8_t ucMaxSysCallPriority = 0;\r
+ static uint32_t ulMaxPRIGROUPValue = 0;\r
+ static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;\r
#endif /* configASSERT_DEFINED */\r
\r
/*-----------------------------------------------------------*/\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */\r
\r
/* Save code space by skipping register initialisation. */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
\r
/* A save method is being used that requires each task to maintain its\r
own exec return value. */\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
#if( configASSERT_DEFINED == 1 )\r
{\r
- volatile unsigned long ulOriginalPriority;\r
- volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
- volatile unsigned char ucMaxPriorityValue;\r
+ volatile uint32_t ulOriginalPriority;\r
+ volatile int8_t * const pcFirstUserPriorityRegister = ( int8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
+ volatile uint8_t ucMaxPriorityValue;\r
\r
/* Determine the maximum priority from which ISR safe FreeRTOS API\r
functions can be called. ISR safe functions are those that end in\r
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
{\r
ulMaxPRIGROUPValue--;\r
- ucMaxPriorityValue <<= ( unsigned char ) 0x01;\r
+ ucMaxPriorityValue <<= ( uint8_t ) 0x01;\r
}\r
\r
/* Shift the priority group value back to its position within the AIRCR\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
- portTickType xModifiableIdleTime;\r
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;\r
+ TickType_t xModifiableIdleTime;\r
\r
/* Make sure the SysTick reload value does not overflow the counter. */\r
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )\r
\r
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )\r
{\r
- unsigned long ulCalculatedLoadValue;\r
+ uint32_t ulCalculatedLoadValue;\r
\r
/* The tick interrupt has already executed, and the SysTick\r
count reloaded with ulReloadValue. Reset the\r
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */\r
/*-----------------------------------------------------------*/\r
\r
-__asm unsigned long ulPortSetInterruptMask( void )\r
+__asm uint32_t ulPortSetInterruptMask( void )\r
{\r
PRESERVE8\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm void vPortClearInterruptMask( unsigned long ulNewMask )\r
+__asm void vPortClearInterruptMask( uint32_t ulNewMask )\r
{\r
PRESERVE8\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-__asm unsigned long vPortGetIPSR( void )\r
+__asm uint32_t vPortGetIPSR( void )\r
{\r
PRESERVE8\r
\r
\r
void vPortValidateInterruptPriority( void )\r
{\r
- unsigned long ulCurrentInterrupt;\r
- unsigned char ucCurrentPriority;\r
+ uint32_t ulCurrentInterrupt;\r
+ uint8_t ucCurrentPriority;\r
\r
/* Obtain the number of the currently executing interrupt. */\r
ulCurrentInterrupt = vPortGetIPSR();\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
#define portYIELD() vPortYield()\r
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMask );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMask );\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
\r
\r
/* Tickless idle/low power functionality. */\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
PSW is set with U and I set, and PM and IPL clear. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )\r
\r
/* The peripheral clock is divided by this value before being supplying the\r
CMT. */\r
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,\r
and therefore installed in the vector table, when the FreeRTOS code is built\r
as a library. */\r
-extern portBASE_TYPE vSoftwareInterruptEntry;\r
-const portBASE_TYPE * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;\r
+extern BaseType_t vSoftwareInterruptEntry;\r
+const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;\r
\r
/*-----------------------------------------------------------*/\r
\r
* instruction.\r
*/\r
#if configUSE_TICKLESS_IDLE == 1\r
- static void prvSleep( portTickType xExpectedIdleTime );\r
+ static void prvSleep( TickType_t xExpectedIdleTime );\r
#endif /* configUSE_TICKLESS_IDLE */\r
\r
/*-----------------------------------------------------------*/\r
/*-----------------------------------------------------------*/\r
\r
/* Calculate how many clock increments make up a single tick period. */\r
-static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
+static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
basically how far into the future an interrupt can be generated. Set\r
during initialisation. This is the maximum possible value that the\r
compare match register can hold divided by ulMatchValueForOneTick. */\r
- static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
+ static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );\r
\r
/* Flag set from the tick interrupt to allow the sleep processing to know if\r
sleep mode was exited because of a tick interrupt, or an interrupt\r
compensate for the lost time. The large difference between the divided CMT\r
clock and the CPU clock means it is likely ulStoppedTimerCompensation will\r
equal zero - and be optimised away. */\r
- static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );\r
+ static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );\r
\r
#endif\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Offset to end up on 8 byte boundary. */\r
pxTopOfStack--;\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_PSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
\r
/* When debugging it can be useful if every register is set to a known\r
value. Otherwise code space can be saved by just setting the registers\r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x12345678; /* Accumulator. */\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Use pxCurrentTCB just so it does not get optimised away. */\r
if( pxCurrentTCB != NULL )\r
\r
/* If this is the first tick since exiting tickless mode then the CMT\r
compare match value needs resetting. */\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;\r
}\r
#endif\r
}\r
CMT0.CMCR.BIT.CMIE = 1;\r
\r
/* Set the compare match value. */\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;\r
\r
/* Divide the PCLK. */\r
#if portCLOCK_DIVISOR == 512\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- static void prvSleep( portTickType xExpectedIdleTime )\r
+ static void prvSleep( TickType_t xExpectedIdleTime )\r
{\r
/* Allow the application to define some pre-sleep processing. */\r
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );\r
\r
#if configUSE_TICKLESS_IDLE == 1\r
\r
- void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )\r
+ void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
- unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;\r
+ uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;\r
eSleepModeStatus eSleepAction;\r
\r
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */\r
\r
/* Adjust the match value to take into account that the current\r
time slice is already partially complete. */\r
- ulMatchValue -= ( unsigned long ) CMT0.CMCNT;\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ ulMatchValue -= ( uint32_t ) CMT0.CMCNT;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
\r
/* Restart the CMT to count up to the new match value. */\r
CMT0.CMCNT = 0;\r
/* Nothing to do here. */\r
}\r
\r
- ulCurrentCount = ( unsigned long ) CMT0.CMCNT;\r
+ ulCurrentCount = ( uint32_t ) CMT0.CMCNT;\r
\r
if( ulTickFlag != pdFALSE )\r
{\r
exited. Reset the match value with whatever remains of this\r
tick period. */\r
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
\r
/* The tick interrupt handler will already have pended the tick\r
processing in the kernel. As the pending tick will be\r
/* The match value is set to whatever fraction of a single tick\r
period remains. */\r
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );\r
- CMT0.CMCOR = ( unsigned short ) ulMatchValue;\r
+ CMT0.CMCOR = ( uint16_t ) ulMatchValue;\r
}\r
\r
/* Restart the CMT so it runs up to the match value. The match value\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() nop()\r
\r
#pragma inline_asm vPortYield\r
#define portYIELD() vPortYield()\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) { portYIELD(); }\r
\r
-/* These macros should not be called directly, but through the \r
-taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is \r
-performed if configASSERT() is defined to ensure an assertion handler does not \r
-inadvertently attempt to lower the IPL when the call to assert was triggered \r
-because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY \r
-when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API \r
-functions are those that end in FromISR. FreeRTOS maintains a separate \r
-interrupt API to ensure API function and interrupt entry is as fast and as \r
+/* These macros should not be called directly, but through the\r
+taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is\r
+performed if configASSERT() is defined to ensure an assertion handler does not\r
+inadvertently attempt to lower the IPL when the call to assert was triggered\r
+because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API\r
+functions are those that end in FromISR. FreeRTOS maintains a separate\r
+interrupt API to ensure API function and interrupt entry is as fast and as\r
simple as possible. */\r
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )\r
#ifdef configASSERT\r
/* Tickless idle/low power functionality. */\r
#if configUSE_TICKLESS_IDLE == 1\r
#ifndef portSUPPRESS_TICKS_AND_SLEEP\r
- extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );\r
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
#endif\r
#endif\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
PSW is set with U and I set, and PM and IPL clear. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )\r
\r
/*-----------------------------------------------------------*/\r
\r
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,\r
and therefore installed in the vector table, when the FreeRTOS code is built\r
as a library. */\r
-extern portBASE_TYPE vSoftwareInterruptEntry;\r
-const portBASE_TYPE * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;\r
+extern BaseType_t vSoftwareInterruptEntry;\r
+const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Offset to end up on 8 byte boundary. */\r
pxTopOfStack--;\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_PSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
\r
/* When debugging it can be useful if every register is set to a known\r
value. Otherwise code space can be saved by just setting the registers\r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
pxTopOfStack--;\r
*pxTopOfStack = 0x12345678; /* Accumulator. */\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vApplicationSetupTimerInterrupt( void );\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#include "machine.h"\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() nop()\r
\r
#pragma inline_asm vPortYield\r
#define portYIELD() vPortYield()\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()\r
\r
-/* These macros should not be called directly, but through the \r
-taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is \r
-performed if configASSERT() is defined to ensure an assertion handler does not \r
-inadvertently attempt to lower the IPL when the call to assert was triggered \r
-because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY \r
-when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API \r
-functions are those that end in FromISR. FreeRTOS maintains a separate \r
-interrupt API to ensure API function and interrupt entry is as fast and as \r
+/* These macros should not be called directly, but through the\r
+taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is\r
+performed if configASSERT() is defined to ensure an assertion handler does not\r
+inadvertently attempt to lower the IPL when the call to assert was triggered\r
+because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API\r
+functions are those that end in FromISR. FreeRTOS maintains a separate\r
+interrupt API to ensure API function and interrupt entry is as fast and as\r
simple as possible. */\r
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )\r
#ifdef configASSERT\r
\r
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
PSW is set with U and I set, and PM and IPL clear. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )\r
-#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )\r
+#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )\r
\r
/*-----------------------------------------------------------*/\r
\r
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,\r
and therefore installed in the vector table, when the FreeRTOS code is built\r
as a library. */\r
-extern portBASE_TYPE vSoftwareInterruptEntry;\r
-const portBASE_TYPE * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;\r
+extern BaseType_t vSoftwareInterruptEntry;\r
+const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* R0 is not included as it is the stack pointer. */\r
\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_PSW;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
\r
/* When debugging it can be useful if every register is set to a known\r
value. Otherwise code space can be saved by just setting the registers\r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
pxTopOfStack--;\r
*pxTopOfStack = portINITIAL_FPSW;\r
pxTopOfStack--;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vApplicationSetupTimerInterrupt( void );\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() nop()\r
\r
\r
#define portYIELD() vPortYield()\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()\r
\r
-/* These macros should not be called directly, but through the \r
-taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is \r
-performed if configASSERT() is defined to ensure an assertion handler does not \r
-inadvertently attempt to lower the IPL when the call to assert was triggered \r
-because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY \r
-when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API \r
-functions are those that end in FromISR. FreeRTOS maintains a separate \r
-interrupt API to ensure API function and interrupt entry is as fast and as \r
+/* These macros should not be called directly, but through the\r
+taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is\r
+performed if configASSERT() is defined to ensure an assertion handler does not\r
+inadvertently attempt to lower the IPL when the call to assert was triggered\r
+because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API\r
+functions are those that end in FromISR. FreeRTOS maintains a separate\r
+interrupt API to ensure API function and interrupt entry is as fast and as\r
simple as possible. */\r
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )\r
#ifdef configASSERT\r
/*\r
* Obtains the current GBR value - defined in portasm.src.\r
*/\r
-extern unsigned long ulPortGetGBR( void );\r
+extern uint32_t ulPortGetGBR( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Mark the end of the stack - used for debugging only and can be removed. */\r
*pxTopOfStack = 0x11111111UL;\r
pxTopOfStack--;\r
\r
/* PC. */\r
- *pxTopOfStack = ( unsigned long ) pxCode;\r
+ *pxTopOfStack = ( uint32_t ) pxCode;\r
pxTopOfStack--;\r
\r
/* PR. */\r
pxTopOfStack--;\r
\r
/* R4. */\r
- *pxTopOfStack = ( unsigned long ) pvParameters;\r
+ *pxTopOfStack = ( uint32_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* R3. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vApplicationSetupTimerInterrupt( void );\r
\r
\r
void vPortYield( void )\r
{\r
-long lInterruptMask;\r
+int32_t lInterruptMask;\r
\r
/* Ensure the yield trap runs at the same priority as the other interrupts\r
that can cause a context switch. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortUsesFloatingPoint( xTaskHandle xTask )\r
+BaseType_t xPortUsesFloatingPoint( TaskHandle_t xTask )\r
{\r
-unsigned long *pulFlopBuffer;\r
-portBASE_TYPE xReturn;\r
+uint32_t *pulFlopBuffer;\r
+BaseType_t xReturn;\r
extern void * volatile pxCurrentTCB;\r
\r
/* This function tells the kernel that the task referenced by xTask is\r
subject task - so pxCurrentTCB is the task handle. */\r
if( xTask == NULL )\r
{\r
- xTask = ( xTaskHandle ) pxCurrentTCB;\r
+ xTask = ( TaskHandle_t ) pxCurrentTCB;\r
}\r
\r
/* Allocate a buffer large enough to hold all the flop registers. */\r
- pulFlopBuffer = ( unsigned long * ) pvPortMalloc( portFLOP_STORAGE_SIZE );\r
+ pulFlopBuffer = ( uint32_t * ) pvPortMalloc( portFLOP_STORAGE_SIZE );\r
\r
if( pulFlopBuffer != NULL )\r
{\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 8\r
#define portSTACK_GROWTH -1\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() nop()\r
#define portSTART_SCHEDULER_TRAP_NO ( 32 )\r
#define portYIELD_TRAP_NO ( 33 )\r
extern void vTaskSwitchContext( void );\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) vTaskSwitchContext()\r
\r
-/* \r
- * This function tells the kernel that the task referenced by xTask is going to \r
- * use the floating point registers and therefore requires the floating point \r
- * registers saved as part of its context. \r
+/*\r
+ * This function tells the kernel that the task referenced by xTask is going to\r
+ * use the floating point registers and therefore requires the floating point\r
+ * registers saved as part of its context.\r
*/\r
-portBASE_TYPE xPortUsesFloatingPoint( void* xTask );\r
+BaseType_t xPortUsesFloatingPoint( void* xTask );\r
\r
/*\r
* The flop save and restore functions are defined in portasm.src and called by\r
- * the trace "task switched in" and "trace task switched out" macros. \r
+ * the trace "task switched in" and "trace task switched out" macros.\r
*/\r
void vPortSaveFlopRegisters( void *pulBuffer );\r
void vPortRestoreFlopRegisters( void *pulBuffer );\r
\r
/*\r
- * pxTaskTag is used to point to the buffer into which the floating point \r
+ * pxTaskTag is used to point to the buffer into which the floating point\r
* context should be saved. If pxTaskTag is NULL then the task does not use\r
* a floating point context.\r
*/\r
\r
/* Constants required for hardware setup. The tick ISR runs off the ACLK, \r
not the MCLK. */\r
-#define portACLK_FREQUENCY_HZ ( ( portTickType ) 32768 )\r
-#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )\r
-#define portFLAGS_INT_ENABLED ( ( portSTACK_TYPE ) 0x08 )\r
+#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )\r
+#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )\r
+#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Each task maintains a count of the critical section nesting depth. Each \r
time a critical section is entered the count is incremented. Each time a \r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as this will cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
\r
* \r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* \r
Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging and can be included if required.\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x3333;\r
+ *pxTopOfStack = ( StackType_t ) 0x3333;\r
pxTopOfStack--; \r
*/\r
\r
executing an ISR. We want the stack to look just as if this has happened\r
so place a pointer to the start of the task on the stack first - followed\r
by the flags we want the task to use when it starts up. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) pxCode;\r
pxTopOfStack--;\r
*pxTopOfStack = portFLAGS_INT_ENABLED;\r
pxTopOfStack--;\r
\r
/* Next the general purpose registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x4444;\r
+ *pxTopOfStack = ( StackType_t ) 0x4444;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555;\r
+ *pxTopOfStack = ( StackType_t ) 0x5555;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x6666;\r
+ *pxTopOfStack = ( StackType_t ) 0x6666;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x7777;\r
+ *pxTopOfStack = ( StackType_t ) 0x7777;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x8888;\r
+ *pxTopOfStack = ( StackType_t ) 0x8888;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x9999;\r
+ *pxTopOfStack = ( StackType_t ) 0x9999;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaa;\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaa;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xbbbb;\r
+ *pxTopOfStack = ( StackType_t ) 0xbbbb;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcccc;\r
+ *pxTopOfStack = ( StackType_t ) 0xcccc;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xdddd;\r
+ *pxTopOfStack = ( StackType_t ) 0xdddd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xeeee;\r
+ *pxTopOfStack = ( StackType_t ) 0xeeee;\r
pxTopOfStack--;\r
\r
/* When the task starts is will expect to find the function parameter in\r
R15. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* A variable is used to keep track of the critical section nesting. \r
This variable has to be stored as part of the task context and is \r
initially set to zero. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
be stored in the task control block for the task. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define PORTMACRO_H\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros. */\r
#define portDISABLE_INTERRUPTS() _DINT(); _NOP()\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section control macros. */\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portSHORT ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
\\r
\r
#define portEXIT_CRITICAL() \\r
{ \\r
-extern volatile unsigned portSHORT usCriticalNesting; \\r
+extern volatile uint16_t usCriticalNesting; \\r
\\r
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \\r
{ \\r
/* Task utilities. */\r
\r
/*\r
- * Manual context switch called by portYIELD or taskYIELD. \r
+ * Manual context switch called by portYIELD or taskYIELD.\r
*/\r
-extern void vPortYield( void ); \r
+extern void vPortYield( void );\r
#define portYIELD() vPortYield()\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 2\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
-#define portNOP() \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portNOP()\r
/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#include "task.h"\r
\r
/* Constants required to setup timer 2 to produce the RTOS tick. */\r
-#define portCLOCK_DIVISOR ( ( unsigned long ) 12 )\r
-#define portMAX_TIMER_VALUE ( ( unsigned long ) 0xffff )\r
-#define portENABLE_TIMER ( ( unsigned char ) 0x04 )\r
-#define portTIMER_2_INTERRUPT_ENABLE ( ( unsigned char ) 0x20 )\r
+#define portCLOCK_DIVISOR ( ( uint32_t ) 12 )\r
+#define portMAX_TIMER_VALUE ( ( uint32_t ) 0xffff )\r
+#define portENABLE_TIMER ( ( uint8_t ) 0x04 )\r
+#define portTIMER_2_INTERRUPT_ENABLE ( ( uint8_t ) 0x20 )\r
\r
/* The value used in the IE register when a task first starts. */\r
-#define portGLOBAL_INTERRUPT_BIT ( ( portSTACK_TYPE ) 0x80 )\r
+#define portGLOBAL_INTERRUPT_BIT ( ( StackType_t ) 0x80 )\r
\r
/* The value used in the PSW register when a task first starts. */\r
-#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00 )\r
+#define portINITIAL_PSW ( ( StackType_t ) 0x00 )\r
\r
/* Macro to clear the timer 2 interrupt flag. */\r
#define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;\r
\r
/* Used during a context switch to store the size of the stack being copied\r
to or from XRAM. */\r
-data static unsigned char ucStackBytes;\r
+data static uint8_t ucStackBytes;\r
\r
/* Used during a context switch to point to the next byte in XRAM from/to which\r
a RAM byte is to be copied. */\r
-xdata static portSTACK_TYPE * data pxXRAMStack;\r
+xdata static StackType_t * data pxXRAMStack;\r
\r
/* Used during a context switch to point to the next byte in RAM from/to which\r
an XRAM byte is to be copied. */\r
-data static portSTACK_TYPE * data pxRAMStack;\r
+data static StackType_t * data pxRAMStack;\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/*\r
* Setup the hardware to generate an interrupt off timer 2 at the required \r
/* pxCurrentTCB points to a TCB which itself points to the location into \\r
which the first stack byte should be copied. Set pxXRAMStack to point \\r
to the location into which the first stack byte is to be copied. */ \\r
- pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \\r
+ pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \\r
\\r
/* Set pxRAMStack to point to the first byte to be coped from the stack. */ \\r
- pxRAMStack = ( data portSTACK_TYPE * data ) configSTACK_START; \\r
+ pxRAMStack = ( data StackType_t * data ) configSTACK_START; \\r
\\r
/* Calculate the size of the stack we are about to copy from the current \\r
stack pointer value. */ \\r
{ \\r
/* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \\r
copy the data back out of XRAM and into the stack. */ \\r
- pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \\r
- pxRAMStack = ( data portSTACK_TYPE * data ) ( configSTACK_START - 1 ); \\r
+ pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \\r
+ pxRAMStack = ( data StackType_t * data ) ( configSTACK_START - 1 ); \\r
\\r
/* The first value stored in XRAM was the size of the stack - i.e. the \\r
number of bytes we need to copy back. */ \\r
} while( ucStackBytes ); \\r
\\r
/* Restore the stack pointer ready to use the restored stack. */ \\r
- SP = ( unsigned char ) pxRAMStack; \\r
+ SP = ( uint8_t ) pxRAMStack; \\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* \r
* See header file for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned long ulAddress;\r
-portSTACK_TYPE *pxStartOfStack;\r
+uint32_t ulAddress;\r
+StackType_t *pxStartOfStack;\r
\r
/* Leave space to write the size of the stack as the first byte. */\r
pxStartOfStack = pxTopOfStack;\r
ISR. \r
\r
The return address that would have been pushed by the MCU. */\r
- ulAddress = ( unsigned long ) pxCode;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress;\r
+ ulAddress = ( uint32_t ) pxCode;\r
+ *pxTopOfStack = ( StackType_t ) ulAddress;\r
ulAddress >>= 8;\r
pxTopOfStack++;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress );\r
+ *pxTopOfStack = ( StackType_t ) ( ulAddress );\r
pxTopOfStack++;\r
\r
/* Next all the registers will have been pushed by portSAVE_CONTEXT(). */\r
\r
/* The function parameters will be passed in the DPTR and B register as\r
a three byte generic pointer is used. */\r
- ulAddress = ( unsigned long ) pvParameters;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPL */\r
+ ulAddress = ( uint32_t ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */\r
ulAddress >>= 8;\r
*pxTopOfStack++;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPH */\r
+ *pxTopOfStack = ( StackType_t ) ulAddress; /* DPH */\r
ulAddress >>= 8;\r
pxTopOfStack++;\r
- *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* b */\r
+ *pxTopOfStack = ( StackType_t ) ulAddress; /* b */\r
pxTopOfStack++;\r
\r
/* The remaining registers are straight forward. */\r
the stack size byte as part of the stack size count.\r
\r
Finally we place the stack size at the beginning. */\r
- *pxStartOfStack = ( portSTACK_TYPE ) ( pxTopOfStack - pxStartOfStack );\r
+ *pxStartOfStack = ( StackType_t ) ( pxTopOfStack - pxStartOfStack );\r
\r
/* Unlike most ports, we return the start of the stack as this is where the\r
size of the stack is stored. */\r
/* \r
* See header file for description. \r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup timer 2 to generate the RTOS tick. */\r
prvSetupTimerInterrupt(); \r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
-unsigned char ucOriginalSFRPage;\r
+uint8_t ucOriginalSFRPage;\r
\r
/* Constants calculated to give the required timer capture values. */\r
-const unsigned long ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;\r
-const unsigned long ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;\r
-const unsigned long ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;\r
-const unsigned char ucLowCaptureByte = ( unsigned char ) ( ulCaptureValue & ( unsigned long ) 0xff );\r
-const unsigned char ucHighCaptureByte = ( unsigned char ) ( ulCaptureValue >> ( unsigned long ) 8 );\r
+const uint32_t ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;\r
+const uint32_t ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;\r
+const uint32_t ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;\r
+const uint8_t ucLowCaptureByte = ( uint8_t ) ( ulCaptureValue & ( uint32_t ) 0xff );\r
+const uint8_t ucHighCaptureByte = ( uint8_t ) ( ulCaptureValue >> ( uint32_t ) 8 );\r
\r
/* NOTE: This uses a timer only present on 8052 architecture. */\r
\r
SFRPAGE = 0;\r
\r
/* TMR2CF can be left in its default state. */ \r
- TMR2CF = ( unsigned char ) 0;\r
+ TMR2CF = ( uint8_t ) 0;\r
\r
/* Setup the overflow reload value. */\r
RCAP2L = ucLowCaptureByte;\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE float\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portCHAR\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
#define portENTER_CRITICAL() _asm \\r
\r
#define portDISABLE_INTERRUPTS() EA = 0;\r
#define portENABLE_INTERRUPTS() EA = 1;\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 1\r
#define portSTACK_GROWTH ( 1 )\r
-#define portTICK_RATE_MS ( ( unsigned portLONG ) 1000 / configTICK_RATE_HZ ) \r
-/*-----------------------------------------------------------*/ \r
+#define portTICK_RATE_MS ( ( uint32_t ) 1000 / configTICK_RATE_HZ )\r
+/*-----------------------------------------------------------*/\r
\r
/* Task utilities. */\r
void vPortYield( void ) _naked;\r
#define portYIELD() vPortYield();\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
#define portNOP() _asm \\r
nop \\r
_endasm;\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Task function macros as described on the FreeRTOS.org WEB site. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/*-----------------------------------------------------------*/\r
\r
* \r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging. */\r
/* This is a redundant push to the stack, it may be required if \r
in some implementations of the compiler the parameter to the task \r
is passed on to the stack rather than in R4 register. */\r
- *pxTopOfStack = (portSTACK_TYPE)(pvParameters);\r
+ *pxTopOfStack = (StackType_t)(pvParameters);\r
pxTopOfStack--; \r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* RP */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000; /* RP */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00007777; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00007777; /* R7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00006666; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00006666; /* R6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00005555; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00005555; /* R5 */\r
pxTopOfStack--;\r
\r
/* In the current implementation of the compiler the first \r
parameter to the task (or function) is passed via R4 parameter \r
to the task, hence the pvParameters pointer is copied into the R4 \r
register. See compiler manual section 4.6.2 for more information. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) (pvParameters); /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) (pvParameters); /* R4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00003333; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00003333; /* R3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00002222; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00002222; /* R2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00001111; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00001111; /* R1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000001; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000001; /* R0 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0000EEEE; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x0000EEEE; /* R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0000DDDD; /* R13 */\r
+ *pxTopOfStack = ( StackType_t ) 0x0000DDDD; /* R13 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0000CCCC; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x0000CCCC; /* R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0000BBBB; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x0000BBBB; /* R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0000AAAA; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x0000AAAA; /* R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00009999; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00009999; /* R9 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00008888; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00008888; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11110000; /* MDH */\r
+ *pxTopOfStack = ( StackType_t ) 0x11110000; /* MDH */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x22220000; /* MDL */\r
+ *pxTopOfStack = ( StackType_t ) 0x22220000; /* MDL */\r
pxTopOfStack--;\r
\r
/* The start of the task code. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
\r
/* PS - User Mode, USP, ILM=31, Interrupts enabled */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x001F0030; /* PS */\r
+ *pxTopOfStack = ( StackType_t ) 0x001F0030; /* PS */\r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. */\r
prvSetupTimerInterrupt();\r
static void prvSetupTimerInterrupt( void )\r
{\r
/* The peripheral clock divided by 32 is used by the timer. */\r
-const unsigned short usReloadValue = ( unsigned short ) ( ( ( configPER_CLOCK_HZ / configTICK_RATE_HZ ) / 32UL ) - 1UL );\r
+const uint16_t usReloadValue = ( uint16_t ) ( ( ( configPER_CLOCK_HZ / configTICK_RATE_HZ ) / 32UL ) - 1UL );\r
\r
/* Setup RLT0 to generate a tick interrupt. */\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#include <stddef.h>\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section management. */\r
#if configKERNEL_INTERRUPT_PRIORITY != 30\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
#define portNOP() __asm( " nop " );\r
/*-----------------------------------------------------------*/\r
/* \r
* Get current value of DPR and ADB registers \r
*/\r
-portSTACK_TYPE xGet_DPR_ADB_bank( void ); \r
+StackType_t xGet_DPR_ADB_bank( void ); \r
\r
/* \r
* Get current value of DTB and PCB registers \r
*/\r
-portSTACK_TYPE xGet_DTB_PCB_bank( void );\r
+StackType_t xGet_DTB_PCB_bank( void );\r
\r
/*\r
* Sets up the periodic ISR used for the RTOS tick. This uses RLT0, but\r
* We require the address of the pxCurrentTCB variable, but don't want to know\r
* any details of its type. \r
*/\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/*-----------------------------------------------------------*/\r
\r
* \r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging. */\r
bits. */ \r
#if( ( configMEMMODEL == portCOMPACT ) || ( configMEMMODEL == portLARGE ) )\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ( unsigned long ) ( pvParameters ) >> 16 );\r
+ *pxTopOfStack = ( StackType_t ) ( ( uint32_t ) ( pvParameters ) >> 16 );\r
pxTopOfStack--; \r
}\r
#endif\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( pvParameters );\r
+ *pxTopOfStack = ( StackType_t ) ( pvParameters );\r
pxTopOfStack--; \r
\r
/* This is redundant push to the stack. This is required in order to introduce \r
the task stack. */\r
#if( ( configMEMMODEL == portMEDIUM ) || ( configMEMMODEL == portLARGE ) )\r
{\r
- *pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( long ) ( pxCode ) >> 16 ) & 0xff ); \r
+ *pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( int32_t ) ( pxCode ) >> 16 ) & 0xff ); \r
pxTopOfStack--; \r
}\r
#endif\r
\r
/* This is redundant push to the stack. This is required in order to introduce \r
an offset so the task correctly accesses the parameter passed on the task stack. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( pxCode );\r
+ *pxTopOfStack = ( StackType_t ) ( pxCode );\r
pxTopOfStack--; \r
\r
/* PS - User Mode, ILM=7, RB=0, Interrupts enabled,USP */\r
pxTopOfStack--; \r
\r
/* PC */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( pxCode ); \r
+ *pxTopOfStack = ( StackType_t ) ( pxCode ); \r
pxTopOfStack--; \r
\r
/* DTB | PCB */\r
along with PC to indicate the start address of the function. */\r
#if( ( configMEMMODEL == portMEDIUM ) || ( configMEMMODEL == portLARGE ) )\r
{\r
- *pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( long ) ( pxCode ) >> 16 ) & 0xff );\r
+ *pxTopOfStack = ( xGet_DTB_PCB_bank() & 0xff00 ) | ( ( ( int32_t ) ( pxCode ) >> 16 ) & 0xff );\r
pxTopOfStack--; \r
}\r
#endif\r
pxTopOfStack--;\r
\r
/* AL */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x9999; \r
+ *pxTopOfStack = ( StackType_t ) 0x9999; \r
pxTopOfStack--;\r
\r
/* AH */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xAAAA; \r
+ *pxTopOfStack = ( StackType_t ) 0xAAAA; \r
pxTopOfStack--;\r
\r
/* Next the general purpose registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x7777; /* RW7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x7777; /* RW7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x6666; /* RW6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x6666; /* RW6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x5555; /* RW5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x5555; /* RW5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x4444; /* RW4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x4444; /* RW4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x3333; /* RW3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x3333; /* RW3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222; /* RW2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x2222; /* RW2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111; /* RW1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x1111; /* RW1 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x8888; /* RW0 */\r
+ *pxTopOfStack = ( StackType_t ) 0x8888; /* RW0 */\r
\r
return pxTopOfStack;\r
}\r
static void prvSetupRLT0Interrupt( void )\r
{\r
/* The peripheral clock divided by 16 is used by the timer. */\r
-const unsigned short usReloadValue = ( unsigned short ) ( ( ( configCLKP1_CLOCK_HZ / configTICK_RATE_HZ ) / 16UL ) - 1UL );\r
+const uint16_t usReloadValue = ( uint16_t ) ( ( ( configCLKP1_CLOCK_HZ / configTICK_RATE_HZ ) / 16UL ) - 1UL );\r
\r
/* set reload value = 34999+1, TICK Interrupt after 10 ms @ 56MHz of CLKP1 */\r
TMRLR0 = usReloadValue; \r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. */\r
prvSetupRLT0Interrupt();\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
#if configKERNEL_INTERRUPT_PRIORITY != 6\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 2\r
#define portNOP() __asm( " NOP " );\r
/*-----------------------------------------------------------*/\r
#include "task.h"\r
\r
/* Constants required to manipulate the NVIC. */\r
-#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )\r
-#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )\r
-#define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )\r
+#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )\r
#define portNVIC_SYSTICK_CLK 0x00000004\r
#define portNVIC_SYSTICK_INT 0x00000002\r
#define portNVIC_SYSTICK_ENABLE 0x00000001\r
-#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
-#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
+#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
+#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
\r
/* Constants required to manipulate the VFP. */\r
-#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
+#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */\r
#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )\r
\r
/* Constants required to set up the initial stack. */\r
\r
/* The priority used by the kernel is assigned to a variable to make access\r
from inline assembler easier. */\r
-const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
+const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
\r
/* Each task maintains its own interrupt status in the critical nesting\r
variable. */\r
-static unsigned long ulCriticalNesting = 0xaaaaaaaaUL;\r
+static uint32_t ulCriticalNesting = 0xaaaaaaaaUL;\r
\r
/*\r
* Setup the timer to generate the tick interrupts.\r
\r
/* This exists purely to allow the const to be used from within the\r
port_asm.asm assembly file. */\r
-const unsigned long ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;\r
+const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
/* Simulate the stack frame as it would be created by a context switch\r
interrupt. */\r
\r
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) portTASK_RETURN_ADDRESS; /* LR */\r
+ *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */\r
\r
/* Save code space by skipping register initialisation. */\r
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
\r
/* A save method is being used that requires each task to maintain its\r
own exec return value. */\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.\r
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */\r
\r
void SysTick_Handler( void )\r
{\r
-unsigned long ulDummy;\r
+uint32_t ulDummy;\r
\r
ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL ( ( volatile unsigned long * ) 0xe000ed04 )\r
+#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )\r
#define portNVIC_PENDSVSET 0x10000000\r
#define portYIELD() vPortYield()\r
\r
*/\r
#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )\r
\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMask );\r
+extern uint32_t ulPortSetInterruptMask( void );\r
+extern void vPortClearInterruptMask( uint32_t ulNewMask );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )\r
\r
/*\r
* Set the compare match value.\r
*/\r
- CCPR1H = ( unsigned char ) ( ( portTIMER_COMPARE_VALUE >> 8 ) & 0xff );\r
- CCPR1L = ( unsigned char ) ( portTIMER_COMPARE_VALUE & 0xff );\r
+ CCPR1H = ( uint8_t ) ( ( portTIMER_COMPARE_VALUE >> 8 ) & 0xff );\r
+ CCPR1L = ( uint8_t ) ( portTIMER_COMPARE_VALUE & 0xff );\r
\r
/*\r
* Set Compare Special Event Trigger Mode\r
/*\r
* Clear the time count\r
*/\r
- TMR1H = ( unsigned char ) 0x00;\r
- TMR1L = ( unsigned char ) 0x00;\r
+ TMR1H = ( uint8_t ) 0x00;\r
+ TMR1L = ( uint8_t ) 0x00;\r
\r
/*\r
* Setup the timer\r
* We require the address of the pxCurrentTCB variable, but don't want to\r
* know any details of its type.\r
*/\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/*\r
* Define minimal-stack constants\r
#define portSTACK_MINIMAL_CALLRETURN_DEPTH ( 10 )\r
#define portSTACK_OTHER_BYTES ( 20 )\r
\r
-unsigned short usCalcMinStackSize = 0;\r
+uint16_t usCalcMinStackSize = 0;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* We initialise ucCriticalNesting to the middle value an \r
- * unsigned char can contain. This way portENTER_CRITICAL()\r
+ * uint8_t can contain. This way portENTER_CRITICAL()\r
* and portEXIT_CRITICAL() can be called without interrupts\r
* being enabled before the scheduler starts.\r
*/\r
-register unsigned char ucCriticalNesting = 0x7F;\r
+register uint8_t ucCriticalNesting = 0x7F;\r
\r
/*-----------------------------------------------------------*/\r
\r
* Initialise the stack of a new task.\r
* See portSAVE_CONTEXT macro for description. \r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-unsigned char ucScratch;\r
+uint8_t ucScratch;\r
/*\r
* Get the size of the RAMarea in page 0 used by the compiler\r
* We do this here already to avoid W-register conflicts.\r
* First store the function parameters. This is where the task expects\r
* to find them when it starts running.\r
*/\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) ( (( unsigned short ) pvParameters >> 8) & 0x00ff );\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) ( ( unsigned short ) pvParameters & 0x00ff );\r
+ *pxTopOfStack-- = ( StackType_t ) ( (( uint16_t ) pvParameters >> 8) & 0x00ff );\r
+ *pxTopOfStack-- = ( StackType_t ) ( ( uint16_t ) pvParameters & 0x00ff );\r
\r
/*\r
* Next are all the registers that form part of the task context.\r
*/\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x11; /* STATUS. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x22; /* WREG. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x33; /* BSR. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x44; /* PRODH. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x55; /* PRODL. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x66; /* FSR0H. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x77; /* FSR0L. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x88; /* FSR1H. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x99; /* FSR1L. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xAA; /* TABLAT. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x11; /* STATUS. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x22; /* WREG. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x33; /* BSR. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x44; /* PRODH. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x55; /* PRODL. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x66; /* FSR0H. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x77; /* FSR0L. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x88; /* FSR1H. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x99; /* FSR1L. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xAA; /* TABLAT. */\r
#if _ROMSIZE > 0x8000\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0x00; /* TBLPTRU. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0x00; /* TBLPTRU. */\r
#endif\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xCC; /* TBLPTRH. */\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDD; /* TBLPTRL. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xCC; /* TBLPTRH. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xDD; /* TBLPTRL. */\r
#if _ROMSIZE > 0x8000\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xEE; /* PCLATU. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xEE; /* PCLATU. */\r
#endif\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF; /* PCLATH. */\r
+ *pxTopOfStack-- = ( StackType_t ) 0xFF; /* PCLATH. */\r
\r
/*\r
* Next the compiler's scratchspace.\r
*/\r
while(ucScratch-- > 0)\r
{\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0;\r
+ *pxTopOfStack-- = ( StackType_t ) 0;\r
}\r
\r
/*\r
* functionpointers to point above 64kB in ROM.\r
*/\r
#if _ROMSIZE > 0x8000\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 0;\r
+ *pxTopOfStack-- = ( StackType_t ) 0;\r
#endif\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) ( ( ( unsigned short ) pxCode >> 8 ) & 0x00ff );\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) ( ( unsigned short ) pxCode & 0x00ff );\r
+ *pxTopOfStack-- = ( StackType_t ) ( ( ( uint16_t ) pxCode >> 8 ) & 0x00ff );\r
+ *pxTopOfStack-- = ( StackType_t ) ( ( uint16_t ) pxCode & 0x00ff );\r
\r
/*\r
* Store the number of return addresses on the hardware stack.\r
* So far only the address of the task entry point.\r
*/\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) 1;\r
+ *pxTopOfStack-- = ( StackType_t ) 1;\r
\r
/*\r
* The code generated by wizC does not maintain separate\r
* track of the critical section nesting. This variable has to be stored\r
* as part of the task context and is initially set to zero.\r
*/\r
- *pxTopOfStack-- = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack-- = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
return pxTopOfStack;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned short usPortCALCULATE_MINIMAL_STACK_SIZE( void )\r
+uint16_t usPortCALCULATE_MINIMAL_STACK_SIZE( void )\r
{\r
/*\r
* Fetch the size of compiler's scratchspace.\r
\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void portSetupTick( void );\r
\r
\r
/*-----------------------------------------------------------*/\r
\r
-void *pvPortMalloc( unsigned short usWantedSize )\r
+void *pvPortMalloc( uint16_t usWantedSize )\r
{\r
void *pvReturn;\r
\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
1 tab == 4 spaces!\r
*/\r
\r
-/* \r
+/*\r
Changes from V3.0.0\r
\r
Changes from V3.0.1\r
#define portDOUBLE portFLOAT\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned char\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) ( 0xFFFF )\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) ( 0xFFFF )\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) ( 0xFFFFFFFF )\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFF )\r
#endif\r
\r
#define portBYTE_ALIGNMENT 1\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- * Constant used for context switch macro when we require the interrupt \r
+ * Constant used for context switch macro when we require the interrupt\r
* enable state to be forced when the interrupted task is switched back in.\r
*/\r
#define portINTERRUPTS_FORCED (0x01)\r
\r
/*\r
- * Constant used for context switch macro when we require the interrupt \r
+ * Constant used for context switch macro when we require the interrupt\r
* enable state to be unchanged when the interrupted task is switched back in.\r
*/\r
#define portINTERRUPTS_UNCHANGED (0x00)\r
{ \\r
bGIE=0; \\r
} while(bGIE) // MicroChip recommends this check!\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
do \\r
{ \\r
bGIE=1; \\r
} while(0)\r
\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/*\r
* Critical section macros.\r
*/\r
-extern unsigned portCHAR ucCriticalNesting;\r
+extern uint8_t ucCriticalNesting;\r
\r
-#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portCHAR ) 0 )\r
+#define portNO_CRITICAL_SECTION_NESTING ( ( uint8_t ) 0 )\r
\r
#define portENTER_CRITICAL() \\r
do \\r
* portMINIMAL_STACK_SIZE. Some input to this calculation is\r
* compiletime determined, other input is port-defined (see port.c)\r
*/\r
-extern unsigned portSHORT usPortCALCULATE_MINIMAL_STACK_SIZE( void );\r
-extern unsigned portSHORT usCalcMinStackSize;\r
+extern uint16_t usPortCALCULATE_MINIMAL_STACK_SIZE( void );\r
+extern uint16_t usCalcMinStackSize;\r
\r
#define portMINIMAL_STACK_SIZE \\r
((usCalcMinStackSize == 0) \\r
* Macro's that pushes all the registers that make up the context of a task onto\r
* the stack, then saves the new top of stack into the TCB. TOSU and TBLPTRU\r
* are only saved/restored on devices with more than 64kB (32k Words) ROM.\r
- * \r
+ *\r
* The stackpointer is helt by WizC in FSR2 and points to the first free byte.\r
* WizC uses a "downgrowing" stack. There is no framepointer.\r
*\r
* We keep track of the interruptstatus using ucCriticalNesting. When this\r
* value equals zero, interrupts have to be enabled upon exit from the\r
* portRESTORE_CONTEXT macro.\r
- * \r
- * If this is called from an ISR then the interrupt enable bits must have been \r
+ *\r
+ * If this is called from an ISR then the interrupt enable bits must have been\r
* set for the ISR to ever get called. Therefore we want to save\r
* ucCriticalNesting with value zero. This means the interrupts will again be\r
* re-enabled when the interrupted task is switched back in.\r
\r
/*-----------------------------------------------------------*/\r
\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
\r
/*-----------------------------------------------------------*/\r
\r
/*lint -e950 Non ANSI reserved words okay in this file only. */\r
\r
#define portTIMER_EOI_TYPE ( 8 )\r
-#define portRESET_PIC() portOUTPUT_WORD( ( unsigned short ) 0xff22, portTIMER_EOI_TYPE )\r
+#define portRESET_PIC() portOUTPUT_WORD( ( uint16_t ) 0xff22, portTIMER_EOI_TYPE )\r
#define portTIMER_INT_NUMBER 0x12\r
\r
-#define portTIMER_1_CONTROL_REGISTER ( ( unsigned short ) 0xff5e )\r
-#define portTIMER_0_CONTROL_REGISTER ( ( unsigned short ) 0xff56 )\r
-#define portTIMER_INTERRUPT_ENABLE ( ( unsigned short ) 0x2000 )\r
+#define portTIMER_1_CONTROL_REGISTER ( ( uint16_t ) 0xff5e )\r
+#define portTIMER_0_CONTROL_REGISTER ( ( uint16_t ) 0xff56 )\r
+#define portTIMER_INTERRUPT_ENABLE ( ( uint16_t ) 0x2000 )\r
\r
/* Setup the hardware to generate the required tick frequency. */\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz );\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz );\r
\r
/* Set the hardware back to the state as per before the scheduler started. */\r
static void prvExitFunction( void );\r
/*lint -e956 File scopes necessary here. */\r
\r
/* Set true when the vectors are set so the scheduler will service the tick. */\r
-static short sSchedulerRunning = pdFALSE;\r
+static int16_t sSchedulerRunning = pdFALSE;\r
\r
/* Points to the original routine installed on the vector we use for manual context switches. This is then used to restore the original routine during prvExitFunction(). */\r
static void ( __interrupt __far *pxOldSwitchISR )();\r
/*lint +e956 */\r
\r
/*-----------------------------------------------------------*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* This is called with interrupts already disabled. */\r
\r
\r
static void prvExitFunction( void )\r
{\r
-const unsigned short usTimerDisable = 0x0000;\r
-unsigned short usTimer0Control;\r
+const uint16_t usTimerDisable = 0x0000;\r
+uint16_t usTimer0Control;\r
\r
/* Interrupts should be disabled here anyway - but no \r
harm in making sure. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz )\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz )\r
{\r
-const unsigned short usMaxCountRegister = 0xff5a;\r
-const unsigned short usTimerPriorityRegister = 0xff32;\r
-const unsigned short usTimerEnable = 0xC000;\r
-const unsigned short usRetrigger = 0x0001;\r
-const unsigned short usTimerHighPriority = 0x0000;\r
-unsigned short usTimer0Control;\r
+const uint16_t usMaxCountRegister = 0xff5a;\r
+const uint16_t usTimerPriorityRegister = 0xff32;\r
+const uint16_t usTimerEnable = 0xC000;\r
+const uint16_t usRetrigger = 0x0001;\r
+const uint16_t usTimerHighPriority = 0x0000;\r
+uint16_t usTimer0Control;\r
\r
/* ( CPU frequency / 4 ) / clock 2 max count [inpw( 0xff62 ) = 7] */\r
\r
-const unsigned long ulClockFrequency = 0x7f31a0;\r
+const uint32_t ulClockFrequency = 0x7f31a0;\r
\r
-unsigned long ulTimerCount = ulClockFrequency / ulTickRateHz;\r
+uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz;\r
\r
portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerEnable | portTIMER_INTERRUPT_ENABLE | usRetrigger );\r
- portOUTPUT_WORD( usMaxCountRegister, ( unsigned short ) ulTimerCount );\r
+ portOUTPUT_WORD( usMaxCountRegister, ( uint16_t ) ulTimerCount );\r
portOUTPUT_WORD( usTimerPriorityRegister, usTimerHighPriority );\r
\r
/* Stop the DOS tick - don't do this if you want to maintain a TOD clock. */\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE long\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
#define portSWITCH_INT_NUMBER 0x80\r
-#define portYIELD() __asm{ int portSWITCH_INT_NUMBER } \r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 2\r
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */\r
#define portNOP() __asm{ nop }\r
#define portTIMER_INT_NUMBER 0x08\r
\r
/* Setup hardware for required tick interrupt rate. */\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz );\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz );\r
\r
/* Restore hardware to as it was prior to starting the scheduler. */\r
static void prvExitFunction( void );\r
/*lint -e956 File scopes necessary here. */\r
\r
/* Used to signal when to chain to the DOS tick, and when to just clear the PIC ourselves. */\r
-static short sDOSTickCounter; \r
+static int16_t sDOSTickCounter; \r
\r
/* Set true when the vectors are set so the scheduler will service the tick. */\r
-static short sSchedulerRunning = pdFALSE; \r
+static int16_t sSchedulerRunning = pdFALSE; \r
\r
/* Points to the original routine installed on the vector we use for manual context switches. This is then used to restore the original routine during prvExitFunction(). */\r
static void ( __interrupt __far *pxOldSwitchISR )(); \r
/*lint +e956 */\r
\r
/*-----------------------------------------------------------*/\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
pxISR pxOriginalTickISR;\r
\r
--sDOSTickCounter;\r
if( sDOSTickCounter <= 0 )\r
{\r
- sDOSTickCounter = ( short ) portTICKS_PER_DOS_TICK;\r
+ sDOSTickCounter = ( int16_t ) portTICKS_PER_DOS_TICK;\r
__asm{ int portSWITCH_INT_NUMBER + 1 }; \r
}\r
else\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvSetTickFrequency( unsigned long ulTickRateHz )\r
+static void prvSetTickFrequency( uint32_t ulTickRateHz )\r
{\r
-const unsigned short usPIT_MODE = ( unsigned short ) 0x43;\r
-const unsigned short usPIT0 = ( unsigned short ) 0x40;\r
-const unsigned long ulPIT_CONST = ( unsigned long ) 1193180;\r
-const unsigned short us8254_CTR0_MODE3 = ( unsigned short ) 0x36;\r
-unsigned long ulOutput;\r
+const uint16_t usPIT_MODE = ( uint16_t ) 0x43;\r
+const uint16_t usPIT0 = ( uint16_t ) 0x40;\r
+const uint32_t ulPIT_CONST = ( uint32_t ) 1193180;\r
+const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;\r
+uint32_t ulOutput;\r
\r
/* Setup the 8245 to tick at the wanted frequency. */\r
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );\r
ulOutput = ulPIT_CONST / ulTickRateHz;\r
\r
- portOUTPUT_BYTE( usPIT0, ( unsigned short )( ulOutput & ( unsigned long ) 0xff ) );\r
+ portOUTPUT_BYTE( usPIT0, ( uint16_t )( ulOutput & ( uint32_t ) 0xff ) );\r
ulOutput >>= 8;\r
- portOUTPUT_BYTE( usPIT0, ( unsigned short ) ( ulOutput & ( unsigned long ) 0xff ) );\r
+ portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) );\r
}\r
/*-----------------------------------------------------------*/\r
\r
static void prvSetTickFrequencyDefault( void )\r
{\r
-const unsigned short usPIT_MODE = ( unsigned short ) 0x43;\r
-const unsigned short usPIT0 = ( unsigned short ) 0x40;\r
-const unsigned short us8254_CTR0_MODE3 = ( unsigned short ) 0x36;\r
+const uint16_t usPIT_MODE = ( uint16_t ) 0x43;\r
+const uint16_t usPIT0 = ( uint16_t ) 0x40;\r
+const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;\r
\r
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );\r
portOUTPUT_BYTE( usPIT0,0 );\r
/*\r
- FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT int\r
-#define portSTACK_TYPE unsigned portSHORT\r
-#define portBASE_TYPE portSHORT\r
+#define portSTACK_TYPE uint16_t\r
+#define portBASE_TYPE short\r
+\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef short BaseType_t;\r
+typedef unsigned short UBaseType_t;\r
+\r
\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
#pragma aux portLOCAL_ENTER_CRITICAL = "pushf" \\r
"cli";\r
#define portENTER_CRITICAL() portLOCAL_ENTER_CRITICAL()\r
- \r
+\r
void portEXIT_CRITICAL( void );\r
#pragma aux portEXIT_CRITICAL = "popf";\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
#define portSWITCH_INT_NUMBER 0x80\r
-#define portYIELD() __asm{ int portSWITCH_INT_NUMBER } \r
+#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }\r
#define portDOS_TICK_RATE ( 18.20648 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
-#define portTICKS_PER_DOS_TICK ( ( unsigned portSHORT ) ( ( ( portDOUBLE ) configTICK_RATE_HZ / portDOS_TICK_RATE ) + 0.5 ) )\r
+#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
+#define portTICKS_PER_DOS_TICK ( ( uint16_t ) ( ( ( portDOUBLE ) configTICK_RATE_HZ / portDOS_TICK_RATE ) + 0.5 ) )\r
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */\r
#define portBYTE_ALIGNMENT ( 2 )\r
/*-----------------------------------------------------------*/\r
1 tab == 4 spaces!\r
*/\r
\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
extern void vTaskSwitchContext( void );\r
\r
/* \r
/*-----------------------------------------------------------*/\r
\r
/* See header file for description. */\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE DS_Reg = 0, *pxOriginalSP;\r
+StackType_t DS_Reg = 0, *pxOriginalSP;\r
\r
/* Place a few bytes of known values on the bottom of the stack. \r
This is just useful for debugging. */\r
easier. */\r
*pxTopOfStack = FP_OFF( pvParameters ); /* AX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xCCCC; /* CX */\r
+ *pxTopOfStack = ( StackType_t ) 0xCCCC; /* CX */\r
pxTopOfStack--;\r
*pxTopOfStack = FP_SEG( pvParameters ); /* DX */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BX */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BX */\r
pxTopOfStack--;\r
*pxTopOfStack = FP_OFF( pxOriginalSP ); /* SP */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBBBB; /* BP */\r
+ *pxTopOfStack = ( StackType_t ) 0xBBBB; /* BP */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0123; /* SI */\r
+ *pxTopOfStack = ( StackType_t ) 0x0123; /* SI */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDDDD; /* DI */\r
+ *pxTopOfStack = ( StackType_t ) 0xDDDD; /* DI */\r
\r
/* We need the true data segment. */\r
__asm{ MOV DS_Reg, DS };\r
*pxTopOfStack = DS_Reg; /* DS */\r
\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xEEEE; /* ES */\r
+ *pxTopOfStack = ( StackType_t ) 0xEEEE; /* ES */\r
\r
/* The AX register is pushed again twice - don't know why. */\r
pxTopOfStack--;\r
\r
\r
/* Constants used with the cRxLock and xTxLock structure members. */\r
-#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 )\r
-#define queueLOCKED_UNMODIFIED ( ( signed portBASE_TYPE ) 0 )\r
+#define queueUNLOCKED ( ( BaseType_t ) -1 )\r
+#define queueLOCKED_UNMODIFIED ( ( BaseType_t ) 0 )\r
\r
-/* When the xQUEUE structure is used to represent a base queue its pcHead and\r
+/* When the Queue_t structure is used to represent a base queue its pcHead and\r
pcTail members are used as pointers into the queue storage area. When the\r
-xQUEUE structure is used to represent a mutex pcHead and pcTail pointers are\r
+Queue_t structure is used to represent a mutex pcHead and pcTail pointers are\r
not necessary, and the pcHead pointer is set to NULL to indicate that the\r
pcTail pointer actually points to the mutex holder (if any). Map alternative\r
names to the pcHead and pcTail structure members to ensure the readability of\r
\r
/* Semaphores do not actually store or copy data, so have an item size of\r
zero. */\r
-#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portBASE_TYPE ) 0 )\r
-#define queueMUTEX_GIVE_BLOCK_TIME ( ( portTickType ) 0U )\r
+#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 )\r
+#define queueMUTEX_GIVE_BLOCK_TIME ( ( TickType_t ) 0U )\r
\r
#if( configUSE_PREEMPTION == 0 )\r
/* If the cooperative scheduler is being used then a yield should not be\r
*/\r
typedef struct QueueDefinition\r
{\r
- signed char *pcHead; /*< Points to the beginning of the queue storage area. */\r
- signed char *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */\r
- signed char *pcWriteTo; /*< Points to the free next place in the storage area. */\r
+ int8_t *pcHead; /*< Points to the beginning of the queue storage area. */\r
+ int8_t *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */\r
+ int8_t *pcWriteTo; /*< Points to the free next place in the storage area. */\r
\r
- union /* Use of a union is an exception to the coding standard to ensure two mutually exclusive structure members don't appear simultaneously (wasting RAM). */\r
+ union /* Use of a union is an exception to the coding standard to ensure two mutually exclusive structure members don't appear simultaneously (wasting RAM). */\r
{\r
- signed char *pcReadFrom; /*< Points to the last place that a queued item was read from when the structure is used as a queue. */\r
- unsigned portBASE_TYPE uxRecursiveCallCount;/*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */\r
+ int8_t *pcReadFrom; /*< Points to the last place that a queued item was read from when the structure is used as a queue. */\r
+ UBaseType_t uxRecursiveCallCount;/*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */\r
} u;\r
\r
- xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */\r
- xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */\r
+ List_t xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */\r
+ List_t xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */\r
\r
- volatile unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */\r
- unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */\r
- unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */\r
+ volatile UBaseType_t uxMessagesWaiting;/*< The number of items currently in the queue. */\r
+ UBaseType_t uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */\r
+ UBaseType_t uxItemSize; /*< The size of each items that the queue will hold. */\r
\r
- volatile signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
- volatile signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
+ volatile BaseType_t xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
+ volatile BaseType_t xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
- unsigned portBASE_TYPE uxQueueNumber;\r
- unsigned char ucQueueType;\r
+ UBaseType_t uxQueueNumber;\r
+ uint8_t ucQueueType;\r
#endif\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
struct QueueDefinition *pxQueueSetContainer;\r
#endif\r
\r
-} xQUEUE;\r
+} Queue_t;\r
/*-----------------------------------------------------------*/\r
\r
/*\r
typedef struct QUEUE_REGISTRY_ITEM\r
{\r
char *pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
- xQueueHandle xHandle;\r
- } xQueueRegistryItem;\r
+ QueueHandle_t xHandle;\r
+ } QueueRegistryItem_t;\r
\r
- /* The queue registry is simply an array of xQueueRegistryItem structures.\r
+ /* The queue registry is simply an array of QueueRegistryItem_t structures.\r
The pcQueueName member of a structure being NULL is indicative of the\r
array position being vacant. */\r
- xQueueRegistryItem xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];\r
+ QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];\r
\r
#endif /* configQUEUE_REGISTRY_SIZE */\r
\r
* to indicate that a task may require unblocking. When the queue in unlocked\r
* these lock counts are inspected, and the appropriate action taken.\r
*/\r
-static void prvUnlockQueue( xQUEUE * const pxQueue ) PRIVILEGED_FUNCTION;\r
+static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Uses a critical section to determine if there is any data in a queue.\r
*\r
* @return pdTRUE if the queue contains no items, otherwise pdFALSE.\r
*/\r
-static signed portBASE_TYPE prvIsQueueEmpty( const xQUEUE *pxQueue ) PRIVILEGED_FUNCTION;\r
+static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Uses a critical section to determine if there is any space in a queue.\r
*\r
* @return pdTRUE if there is no space, otherwise pdFALSE;\r
*/\r
-static signed portBASE_TYPE prvIsQueueFull( const xQUEUE *pxQueue ) PRIVILEGED_FUNCTION;\r
+static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Copies an item into the queue, either at the front of the queue or the\r
* back of the queue.\r
*/\r
-static void prvCopyDataToQueue( xQUEUE * const pxQueue, const void *pvItemToQueue, const portBASE_TYPE xPosition ) PRIVILEGED_FUNCTION;\r
+static void prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Copies an item out of a queue.\r
*/\r
-static void prvCopyDataFromQueue( xQUEUE * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;\r
+static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
/*\r
* Checks to see if a queue is a member of a queue set, and if so, notifies\r
* the queue set that the queue contains data.\r
*/\r
- static portBASE_TYPE prvNotifyQueueSetContainer( const xQUEUE * const pxQueue, const portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION;\r
+ static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;\r
#endif\r
\r
/*-----------------------------------------------------------*/\r
taskEXIT_CRITICAL()\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xQueueGenericReset( xQueueHandle xQueue, portBASE_TYPE xNewQueue )\r
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )\r
{\r
-xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
\r
taskENTER_CRITICAL();\r
{\r
pxQueue->pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize );\r
- pxQueue->uxMessagesWaiting = ( unsigned portBASE_TYPE ) 0U;\r
+ pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;\r
pxQueue->pcWriteTo = pxQueue->pcHead;\r
- pxQueue->u.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - ( unsigned portBASE_TYPE ) 1U ) * pxQueue->uxItemSize );\r
+ pxQueue->u.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - ( UBaseType_t ) 1U ) * pxQueue->uxItemSize );\r
pxQueue->xRxLock = queueUNLOCKED;\r
pxQueue->xTxLock = queueUNLOCKED;\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-xQueueHandle xQueueGenericCreate( const unsigned portBASE_TYPE uxQueueLength, const unsigned portBASE_TYPE uxItemSize, const unsigned char ucQueueType )\r
+QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )\r
{\r
-xQUEUE *pxNewQueue;\r
+Queue_t *pxNewQueue;\r
size_t xQueueSizeInBytes;\r
-xQueueHandle xReturn = NULL;\r
+QueueHandle_t xReturn = NULL;\r
\r
/* Remove compiler warnings about unused parameters should\r
configUSE_TRACE_FACILITY not be set to 1. */\r
( void ) ucQueueType;\r
\r
/* Allocate the new queue structure. */\r
- if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxQueueLength > ( UBaseType_t ) 0 )\r
{\r
- pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) );\r
+ pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) );\r
if( pxNewQueue != NULL )\r
{\r
/* Create the list of pointers to queue items. The queue is one byte\r
longer than asked for to make wrap checking easier/faster. */\r
xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
\r
- pxNewQueue->pcHead = ( signed char * ) pvPortMalloc( xQueueSizeInBytes );\r
+ pxNewQueue->pcHead = ( int8_t * ) pvPortMalloc( xQueueSizeInBytes );\r
if( pxNewQueue->pcHead != NULL )\r
{\r
/* Initialise the queue members as described above where the\r
\r
#if ( configUSE_MUTEXES == 1 )\r
\r
- xQueueHandle xQueueCreateMutex( const unsigned char ucQueueType )\r
+ QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )\r
{\r
- xQUEUE *pxNewQueue;\r
+ Queue_t *pxNewQueue;\r
\r
/* Prevent compiler warnings about unused parameters if\r
configUSE_TRACE_FACILITY does not equal 1. */\r
( void ) ucQueueType;\r
\r
/* Allocate the new queue structure. */\r
- pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) );\r
+ pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) );\r
if( pxNewQueue != NULL )\r
{\r
/* Information required for priority inheritance. */\r
/* Each mutex has a length of 1 (like a binary semaphore) and\r
an item size of 0 as nothing is actually copied into or out\r
of the mutex. */\r
- pxNewQueue->uxMessagesWaiting = ( unsigned portBASE_TYPE ) 0U;\r
- pxNewQueue->uxLength = ( unsigned portBASE_TYPE ) 1U;\r
- pxNewQueue->uxItemSize = ( unsigned portBASE_TYPE ) 0U;\r
+ pxNewQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;\r
+ pxNewQueue->uxLength = ( UBaseType_t ) 1U;\r
+ pxNewQueue->uxItemSize = ( UBaseType_t ) 0U;\r
pxNewQueue->xRxLock = queueUNLOCKED;\r
pxNewQueue->xTxLock = queueUNLOCKED;\r
\r
traceCREATE_MUTEX( pxNewQueue );\r
\r
/* Start with the semaphore in the expected state. */\r
- ( void ) xQueueGenericSend( pxNewQueue, NULL, ( portTickType ) 0U, queueSEND_TO_BACK );\r
+ ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );\r
}\r
else\r
{\r
\r
#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )\r
\r
- void* xQueueGetMutexHolder( xQueueHandle xSemaphore )\r
+ void* xQueueGetMutexHolder( QueueHandle_t xSemaphore )\r
{\r
void *pxReturn;\r
\r
following critical section exiting and the function returning. */\r
taskENTER_CRITICAL();\r
{\r
- if( ( ( xQUEUE * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )\r
+ if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )\r
{\r
- pxReturn = ( void * ) ( ( xQUEUE * ) xSemaphore )->pxMutexHolder;\r
+ pxReturn = ( void * ) ( ( Queue_t * ) xSemaphore )->pxMutexHolder;\r
}\r
else\r
{\r
\r
#if ( configUSE_RECURSIVE_MUTEXES == 1 )\r
\r
- portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
+ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )\r
{\r
- portBASE_TYPE xReturn;\r
- xQUEUE * const pxMutex = ( xQUEUE * ) xMutex;\r
+ BaseType_t xReturn;\r
+ Queue_t * const pxMutex = ( Queue_t * ) xMutex;\r
\r
configASSERT( pxMutex );\r
\r
this is the only condition we are interested in it does not matter if\r
pxMutexHolder is accessed simultaneously by another task. Therefore no\r
mutual exclusion is required to test the pxMutexHolder variable. */\r
- if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Not a redundant cast as xTaskHandle is a typedef. */\r
+ if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Not a redundant cast as TaskHandle_t is a typedef. */\r
{\r
traceGIVE_MUTEX_RECURSIVE( pxMutex );\r
\r
( pxMutex->u.uxRecursiveCallCount )--;\r
\r
/* Have we unwound the call count? */\r
- if( pxMutex->u.uxRecursiveCallCount == ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxMutex->u.uxRecursiveCallCount == ( UBaseType_t ) 0 )\r
{\r
/* Return the mutex. This will automatically unblock any other\r
task that might be waiting to access the mutex. */\r
\r
#if ( configUSE_RECURSIVE_MUTEXES == 1 )\r
\r
- portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
+ BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime )\r
{\r
- portBASE_TYPE xReturn;\r
- xQUEUE * const pxMutex = ( xQUEUE * ) xMutex;\r
+ BaseType_t xReturn;\r
+ Queue_t * const pxMutex = ( Queue_t * ) xMutex;\r
\r
configASSERT( pxMutex );\r
\r
\r
traceTAKE_MUTEX_RECURSIVE( pxMutex );\r
\r
- if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Cast is not redundant as xTaskHandle is a typedef. */\r
+ if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */\r
{\r
( pxMutex->u.uxRecursiveCallCount )++;\r
xReturn = pdPASS;\r
\r
#if ( configUSE_COUNTING_SEMAPHORES == 1 )\r
\r
- xQueueHandle xQueueCreateCountingSemaphore( const unsigned portBASE_TYPE uxMaxCount, const unsigned portBASE_TYPE uxInitialCount )\r
+ QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )\r
{\r
- xQueueHandle xHandle;\r
+ QueueHandle_t xHandle;\r
\r
configASSERT( uxMaxCount != 0 );\r
configASSERT( uxInitialCount <= uxMaxCount );\r
\r
if( xHandle != NULL )\r
{\r
- ( ( xQUEUE * ) xHandle )->uxMessagesWaiting = uxInitialCount;\r
+ ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;\r
\r
traceCREATE_COUNTING_SEMAPHORE();\r
}\r
#endif /* configUSE_COUNTING_SEMAPHORES */\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, const portBASE_TYPE xCopyPosition )\r
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )\r
{\r
-signed portBASE_TYPE xEntryTimeSet = pdFALSE;\r
-xTimeOutType xTimeOut;\r
-xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+BaseType_t xEntryTimeSet = pdFALSE;\r
+TimeOut_t xTimeOut;\r
+Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );\r
+ configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );\r
configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );\r
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )\r
{\r
}\r
else\r
{\r
- if( xTicksToWait == ( portTickType ) 0 )\r
+ if( xTicksToWait == ( TickType_t ) 0 )\r
{\r
/* The queue was full and no block time is specified (or\r
the block time has expired) so leave now. */\r
\r
#if ( configUSE_ALTERNATIVE_API == 1 )\r
\r
- signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
+ BaseType_t xQueueAltGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition )\r
{\r
- signed portBASE_TYPE xEntryTimeSet = pdFALSE;\r
- xTimeOutType xTimeOut;\r
- xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+ BaseType_t xEntryTimeSet = pdFALSE;\r
+ TimeOut_t xTimeOut;\r
+ Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );\r
+ configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );\r
\r
for( ;; )\r
{\r
}\r
else\r
{\r
- if( xTicksToWait == ( portTickType ) 0 )\r
+ if( xTicksToWait == ( TickType_t ) 0 )\r
{\r
taskEXIT_CRITICAL();\r
return errQUEUE_FULL;\r
\r
#if ( configUSE_ALTERNATIVE_API == 1 )\r
\r
- signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle xQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+ BaseType_t xQueueAltGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking )\r
{\r
- signed portBASE_TYPE xEntryTimeSet = pdFALSE;\r
- xTimeOutType xTimeOut;\r
- signed char *pcOriginalReadPosition;\r
- xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+ BaseType_t xEntryTimeSet = pdFALSE;\r
+ TimeOut_t xTimeOut;\r
+ int8_t *pcOriginalReadPosition;\r
+ Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );\r
+ configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );\r
\r
for( ;; )\r
{\r
taskENTER_CRITICAL();\r
{\r
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )\r
{\r
/* Remember our read position in case we are just peeking. */\r
pcOriginalReadPosition = pxQueue->u.pcReadFrom;\r
{\r
/* Record the information required to implement\r
priority inheritance should it become necessary. */\r
- pxQueue->pxMutexHolder = ( signed char * ) xTaskGetCurrentTaskHandle();\r
+ pxQueue->pxMutexHolder = ( int8_t * ) xTaskGetCurrentTaskHandle();\r
}\r
else\r
{\r
}\r
else\r
{\r
- if( xTicksToWait == ( portTickType ) 0 )\r
+ if( xTicksToWait == ( TickType_t ) 0 )\r
{\r
taskEXIT_CRITICAL();\r
traceQUEUE_RECEIVE_FAILED( pxQueue );\r
#endif /* configUSE_ALTERNATIVE_API */\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle xQueue, const void * const pvItemToQueue, signed portBASE_TYPE * const pxHigherPriorityTaskWoken, const portBASE_TYPE xCopyPosition )\r
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )\r
{\r
-signed portBASE_TYPE xReturn;\r
-unsigned portBASE_TYPE uxSavedInterruptStatus;\r
-xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+BaseType_t xReturn;\r
+UBaseType_t uxSavedInterruptStatus;\r
+Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );\r
+ configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );\r
configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );\r
\r
/* RTOS ports that support interrupt nesting have the concept of a maximum\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle xQueue, void * const pvBuffer, portTickType xTicksToWait, const portBASE_TYPE xJustPeeking )\r
+BaseType_t xQueueGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, const BaseType_t xJustPeeking )\r
{\r
-signed portBASE_TYPE xEntryTimeSet = pdFALSE;\r
-xTimeOutType xTimeOut;\r
-signed char *pcOriginalReadPosition;\r
-xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+BaseType_t xEntryTimeSet = pdFALSE;\r
+TimeOut_t xTimeOut;\r
+int8_t *pcOriginalReadPosition;\r
+Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );\r
+ configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );\r
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )\r
{\r
configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );\r
{\r
/* Is there data in the queue now? To be running we must be\r
the highest priority task wanting to access the queue. */\r
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )\r
{\r
/* Remember the read position in case the queue is only being\r
peeked. */\r
{\r
/* Record the information required to implement\r
priority inheritance should it become necessary. */\r
- pxQueue->pxMutexHolder = ( signed char * ) xTaskGetCurrentTaskHandle(); /*lint !e961 Cast is not redundant as xTaskHandle is a typedef. */\r
+ pxQueue->pxMutexHolder = ( int8_t * ) xTaskGetCurrentTaskHandle(); /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */\r
}\r
else\r
{\r
}\r
else\r
{\r
- if( xTicksToWait == ( portTickType ) 0 )\r
+ if( xTicksToWait == ( TickType_t ) 0 )\r
{\r
/* The queue was empty and no block time is specified (or\r
the block time has expired) so leave now. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle xQueue, void * const pvBuffer, signed portBASE_TYPE * const pxHigherPriorityTaskWoken )\r
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )\r
{\r
-signed portBASE_TYPE xReturn;\r
-unsigned portBASE_TYPE uxSavedInterruptStatus;\r
-xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+BaseType_t xReturn;\r
+UBaseType_t uxSavedInterruptStatus;\r
+Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );\r
+ configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );\r
\r
/* RTOS ports that support interrupt nesting have the concept of a maximum\r
system call (or maximum API call) interrupt priority. Interrupts that are\r
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
/* Cannot block in an ISR, so check there is data available. */\r
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )\r
{\r
traceQUEUE_RECEIVE_FROM_ISR( pxQueue );\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xQueuePeekFromISR( xQueueHandle xQueue, void * const pvBuffer )\r
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer )\r
{\r
-signed portBASE_TYPE xReturn;\r
-unsigned portBASE_TYPE uxSavedInterruptStatus;\r
-signed char *pcOriginalReadPosition;\r
-xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+BaseType_t xReturn;\r
+UBaseType_t uxSavedInterruptStatus;\r
+int8_t *pcOriginalReadPosition;\r
+Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );\r
+ configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );\r
\r
/* RTOS ports that support interrupt nesting have the concept of a maximum\r
system call (or maximum API call) interrupt priority. Interrupts that are\r
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();\r
{\r
/* Cannot block in an ISR, so check there is data available. */\r
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )\r
{\r
traceQUEUE_PEEK_FROM_ISR( pxQueue );\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue )\r
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )\r
{\r
-unsigned portBASE_TYPE uxReturn;\r
+UBaseType_t uxReturn;\r
\r
configASSERT( xQueue );\r
\r
taskENTER_CRITICAL();\r
{\r
- uxReturn = ( ( xQUEUE * ) xQueue )->uxMessagesWaiting;\r
+ uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;\r
}\r
taskEXIT_CRITICAL();\r
\r
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxQueueSpacesAvailable( const xQueueHandle xQueue )\r
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue )\r
{\r
-unsigned portBASE_TYPE uxReturn;\r
-xQUEUE *pxQueue;\r
+UBaseType_t uxReturn;\r
+Queue_t *pxQueue;\r
\r
- pxQueue = ( xQUEUE * ) xQueue;\r
+ pxQueue = ( Queue_t * ) xQueue;\r
configASSERT( pxQueue );\r
\r
taskENTER_CRITICAL();\r
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle xQueue )\r
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )\r
{\r
-unsigned portBASE_TYPE uxReturn;\r
+UBaseType_t uxReturn;\r
\r
configASSERT( xQueue );\r
\r
- uxReturn = ( ( xQUEUE * ) xQueue )->uxMessagesWaiting;\r
+ uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;\r
\r
return uxReturn;\r
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */\r
/*-----------------------------------------------------------*/\r
\r
-void vQueueDelete( xQueueHandle xQueue )\r
+void vQueueDelete( QueueHandle_t xQueue )\r
{\r
-xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
configASSERT( pxQueue );\r
\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- unsigned portBASE_TYPE uxQueueGetQueueNumber( xQueueHandle xQueue )\r
+ UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue )\r
{\r
- return ( ( xQUEUE * ) xQueue )->uxQueueNumber;\r
+ return ( ( Queue_t * ) xQueue )->uxQueueNumber;\r
}\r
\r
#endif /* configUSE_TRACE_FACILITY */\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- void vQueueSetQueueNumber( xQueueHandle xQueue, unsigned portBASE_TYPE uxQueueNumber )\r
+ void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber )\r
{\r
- ( ( xQUEUE * ) xQueue )->uxQueueNumber = uxQueueNumber;\r
+ ( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber;\r
}\r
\r
#endif /* configUSE_TRACE_FACILITY */\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- unsigned char ucQueueGetQueueType( xQueueHandle xQueue )\r
+ uint8_t ucQueueGetQueueType( QueueHandle_t xQueue )\r
{\r
- return ( ( xQUEUE * ) xQueue )->ucQueueType;\r
+ return ( ( Queue_t * ) xQueue )->ucQueueType;\r
}\r
\r
#endif /* configUSE_TRACE_FACILITY */\r
/*-----------------------------------------------------------*/\r
\r
-static void prvCopyDataToQueue( xQUEUE * const pxQueue, const void *pvItemToQueue, const portBASE_TYPE xPosition )\r
+static void prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )\r
{\r
- if( pxQueue->uxItemSize == ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )\r
{\r
#if ( configUSE_MUTEXES == 1 )\r
{\r
\r
if( xPosition == queueOVERWRITE )\r
{\r
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )\r
{\r
/* An item is not being added but overwritten, so subtract\r
one from the recorded number of items in the queue so when\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvCopyDataFromQueue( xQUEUE * const pxQueue, void * const pvBuffer )\r
+static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )\r
{\r
if( pxQueue->uxQueueType != queueQUEUE_IS_MUTEX )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvUnlockQueue( xQUEUE * const pxQueue )\r
+static void prvUnlockQueue( Queue_t * const pxQueue )\r
{\r
/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static signed portBASE_TYPE prvIsQueueEmpty( const xQUEUE *pxQueue )\r
+static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )\r
{\r
-signed portBASE_TYPE xReturn;\r
+BaseType_t xReturn;\r
\r
taskENTER_CRITICAL();\r
{\r
- if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )\r
{\r
xReturn = pdTRUE;\r
}\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle xQueue )\r
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue )\r
{\r
-signed portBASE_TYPE xReturn;\r
+BaseType_t xReturn;\r
\r
configASSERT( xQueue );\r
- if( ( ( xQUEUE * ) xQueue )->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 )\r
+ if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( UBaseType_t ) 0 )\r
{\r
xReturn = pdTRUE;\r
}\r
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */\r
/*-----------------------------------------------------------*/\r
\r
-static signed portBASE_TYPE prvIsQueueFull( const xQUEUE *pxQueue )\r
+static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )\r
{\r
-signed portBASE_TYPE xReturn;\r
+BaseType_t xReturn;\r
\r
taskENTER_CRITICAL();\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle xQueue )\r
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue )\r
{\r
-signed portBASE_TYPE xReturn;\r
+BaseType_t xReturn;\r
\r
configASSERT( xQueue );\r
- if( ( ( xQUEUE * ) xQueue )->uxMessagesWaiting == ( ( xQUEUE * ) xQueue )->uxLength )\r
+ if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( ( Queue_t * ) xQueue )->uxLength )\r
{\r
xReturn = pdTRUE;\r
}\r
\r
#if ( configUSE_CO_ROUTINES == 1 )\r
\r
- signed portBASE_TYPE xQueueCRSend( xQueueHandle xQueue, const void *pvItemToQueue, portTickType xTicksToWait )\r
+ BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait )\r
{\r
- signed portBASE_TYPE xReturn;\r
- xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+ BaseType_t xReturn;\r
+ Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
/* If the queue is already full we may have to block. A critical section\r
is required to prevent an interrupt removing something from the queue\r
{\r
/* The queue is full - do we want to block or just leave without\r
posting? */\r
- if( xTicksToWait > ( portTickType ) 0 )\r
+ if( xTicksToWait > ( TickType_t ) 0 )\r
{\r
/* As this is called from a coroutine we cannot block directly, but\r
return indicating that we need to block. */\r
\r
#if ( configUSE_CO_ROUTINES == 1 )\r
\r
- signed portBASE_TYPE xQueueCRReceive( xQueueHandle xQueue, void *pvBuffer, portTickType xTicksToWait )\r
+ BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait )\r
{\r
- signed portBASE_TYPE xReturn;\r
- xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+ BaseType_t xReturn;\r
+ Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
/* If the queue is already empty we may have to block. A critical section\r
is required to prevent an interrupt adding something to the queue\r
between the check to see if the queue is empty and blocking on the queue. */\r
portDISABLE_INTERRUPTS();\r
{\r
- if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )\r
{\r
/* There are no messages in the queue, do we want to block or just\r
leave with nothing? */\r
- if( xTicksToWait > ( portTickType ) 0 )\r
+ if( xTicksToWait > ( TickType_t ) 0 )\r
{\r
/* As this is a co-routine we cannot block directly, but return\r
indicating that we need to block. */\r
\r
portDISABLE_INTERRUPTS();\r
{\r
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )\r
{\r
/* Data is available from the queue. */\r
pxQueue->u.pcReadFrom += pxQueue->uxItemSize;\r
\r
#if ( configUSE_CO_ROUTINES == 1 )\r
\r
- signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle xQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken )\r
+ BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken )\r
{\r
- xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+ Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
/* Cannot block within an ISR so if there is no space on the queue then\r
exit without doing anything. */\r
\r
#if ( configUSE_CO_ROUTINES == 1 )\r
\r
- signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle xQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken )\r
+ BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxCoRoutineWoken )\r
{\r
- signed portBASE_TYPE xReturn;\r
- xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+ BaseType_t xReturn;\r
+ Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
/* We cannot block from an ISR, so check there is data available. If\r
not then just leave without doing anything. */\r
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )\r
+ if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )\r
{\r
/* Copy the data from the queue. */\r
pxQueue->u.pcReadFrom += pxQueue->uxItemSize;\r
\r
#if ( configQUEUE_REGISTRY_SIZE > 0 )\r
\r
- void vQueueAddToRegistry( xQueueHandle xQueue, char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ void vQueueAddToRegistry( QueueHandle_t xQueue, char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
{\r
- unsigned portBASE_TYPE ux;\r
+ UBaseType_t ux;\r
\r
/* See if there is an empty space in the registry. A NULL name denotes\r
a free slot. */\r
- for( ux = ( unsigned portBASE_TYPE ) 0U; ux < ( unsigned portBASE_TYPE ) configQUEUE_REGISTRY_SIZE; ux++ )\r
+ for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )\r
{\r
if( xQueueRegistry[ ux ].pcQueueName == NULL )\r
{\r
\r
#if ( configQUEUE_REGISTRY_SIZE > 0 )\r
\r
- void vQueueUnregisterQueue( xQueueHandle xQueue )\r
+ void vQueueUnregisterQueue( QueueHandle_t xQueue )\r
{\r
- unsigned portBASE_TYPE ux;\r
+ UBaseType_t ux;\r
\r
/* See if the handle of the queue being unregistered in actually in the\r
registry. */\r
- for( ux = ( unsigned portBASE_TYPE ) 0U; ux < ( unsigned portBASE_TYPE ) configQUEUE_REGISTRY_SIZE; ux++ )\r
+ for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )\r
{\r
if( xQueueRegistry[ ux ].xHandle == xQueue )\r
{\r
\r
#if ( configUSE_TIMERS == 1 )\r
\r
- void vQueueWaitForMessageRestricted( xQueueHandle xQueue, portTickType xTicksToWait )\r
+ void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait )\r
{\r
- xQUEUE * const pxQueue = ( xQUEUE * ) xQueue;\r
+ Queue_t * const pxQueue = ( Queue_t * ) xQueue;\r
\r
/* This function should not be called by application code hence the\r
'Restricted' in its name. It is not part of the public API. It is\r
the queue is locked, and the calling task blocks on the queue, then the\r
calling task will be immediately unblocked when the queue is unlocked. */\r
prvLockQueue( pxQueue );\r
- if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0U )\r
+ if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )\r
{\r
/* There is nothing in the queue, block for the specified period. */\r
vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
\r
- xQueueSetHandle xQueueCreateSet( const unsigned portBASE_TYPE uxEventQueueLength )\r
+ QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )\r
{\r
- xQueueSetHandle pxQueue;\r
+ QueueSetHandle_t pxQueue;\r
\r
- pxQueue = xQueueGenericCreate( uxEventQueueLength, sizeof( xQUEUE * ), queueQUEUE_TYPE_SET );\r
+ pxQueue = xQueueGenericCreate( uxEventQueueLength, sizeof( Queue_t * ), queueQUEUE_TYPE_SET );\r
\r
return pxQueue;\r
}\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
\r
- portBASE_TYPE xQueueAddToSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
+ BaseType_t xQueueAddToSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
{\r
- portBASE_TYPE xReturn;\r
+ BaseType_t xReturn;\r
\r
- if( ( ( xQUEUE * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )\r
+ if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )\r
{\r
/* Cannot add a queue/semaphore to more than one queue set. */\r
xReturn = pdFAIL;\r
}\r
- else if( ( ( xQUEUE * ) xQueueOrSemaphore )->uxMessagesWaiting != ( unsigned portBASE_TYPE ) 0 )\r
+ else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 )\r
{\r
/* Cannot add a queue/semaphore to a queue set if there are already\r
items in the queue/semaphore. */\r
{\r
taskENTER_CRITICAL();\r
{\r
- ( ( xQUEUE * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;\r
+ ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;\r
}\r
taskEXIT_CRITICAL();\r
xReturn = pdPASS;\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
\r
- portBASE_TYPE xQueueRemoveFromSet( xQueueSetMemberHandle xQueueOrSemaphore, xQueueSetHandle xQueueSet )\r
+ BaseType_t xQueueRemoveFromSet( QueueSetMember_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )\r
{\r
- portBASE_TYPE xReturn;\r
- xQUEUE * const pxQueueOrSemaphore = ( xQUEUE * ) xQueueOrSemaphore;\r
+ BaseType_t xReturn;\r
+ Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore;\r
\r
if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet )\r
{\r
/* The queue was not a member of the set. */\r
xReturn = pdFAIL;\r
}\r
- else if( pxQueueOrSemaphore->uxMessagesWaiting != ( unsigned portBASE_TYPE ) 0 )\r
+ else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 )\r
{\r
/* It is dangerous to remove a queue from a set when the queue is\r
not empty because the queue set will still hold pending events for\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
\r
- xQueueSetMemberHandle xQueueSelectFromSet( xQueueSetHandle xQueueSet, portTickType const xBlockTimeTicks )\r
+ QueueSetMember_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t const xBlockTimeTicks )\r
{\r
- xQueueSetMemberHandle xReturn = NULL;\r
+ QueueSetMember_t xReturn = NULL;\r
\r
- ( void ) xQueueGenericReceive( ( xQueueHandle ) xQueueSet, &xReturn, xBlockTimeTicks, pdFALSE ); /*lint !e961 Casting from one typedef to another is not redundant. */\r
+ ( void ) xQueueGenericReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xBlockTimeTicks, pdFALSE ); /*lint !e961 Casting from one typedef to another is not redundant. */\r
return xReturn;\r
}\r
\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
\r
- xQueueSetMemberHandle xQueueSelectFromSetFromISR( xQueueSetHandle xQueueSet )\r
+ QueueSetMember_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet )\r
{\r
- xQueueSetMemberHandle xReturn = NULL;\r
+ QueueSetMember_t xReturn = NULL;\r
\r
- ( void ) xQueueReceiveFromISR( ( xQueueHandle ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */\r
+ ( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */\r
return xReturn;\r
}\r
\r
\r
#if ( configUSE_QUEUE_SETS == 1 )\r
\r
- static portBASE_TYPE prvNotifyQueueSetContainer( const xQUEUE * const pxQueue, const portBASE_TYPE xCopyPosition )\r
+ static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition )\r
{\r
- xQUEUE *pxQueueSetContainer = pxQueue->pxQueueSetContainer;\r
- portBASE_TYPE xReturn = pdFALSE;\r
+ Queue_t *pxQueueSetContainer = pxQueue->pxQueueSetContainer;\r
+ BaseType_t xReturn = pdFALSE;\r
\r
configASSERT( pxQueueSetContainer );\r
configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength );\r
*/\r
typedef struct tskTaskControlBlock\r
{\r
- volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */\r
+ volatile StackType_t *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */\r
\r
#if ( portUSING_MPU_WRAPPERS == 1 )\r
- xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer. THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */\r
+ xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer. THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */\r
#endif\r
\r
- xListItem xGenericListItem; /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */\r
- xListItem xEventListItem; /*< Used to reference a task from an event list. */\r
- unsigned portBASE_TYPE uxPriority; /*< The priority of the task. 0 is the lowest priority. */\r
- portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */\r
- char pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ ListItem_t xGenericListItem; /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */\r
+ ListItem_t xEventListItem; /*< Used to reference a task from an event list. */\r
+ UBaseType_t uxPriority; /*< The priority of the task. 0 is the lowest priority. */\r
+ StackType_t *pxStack; /*< Points to the start of the stack. */\r
+ char pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
\r
#if ( portSTACK_GROWTH > 0 )\r
- portSTACK_TYPE *pxEndOfStack; /*< Points to the end of the stack on architectures where the stack grows up from low memory. */\r
+ StackType_t *pxEndOfStack; /*< Points to the end of the stack on architectures where the stack grows up from low memory. */\r
#endif\r
\r
#if ( portCRITICAL_NESTING_IN_TCB == 1 )\r
- unsigned portBASE_TYPE uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */\r
+ UBaseType_t uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */\r
#endif\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
- unsigned portBASE_TYPE uxTCBNumber; /*< Stores a number that increments each time a TCB is created. It allows debuggers to determine when a task has been deleted and then recreated. */\r
- unsigned portBASE_TYPE uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */\r
+ UBaseType_t uxTCBNumber; /*< Stores a number that increments each time a TCB is created. It allows debuggers to determine when a task has been deleted and then recreated. */\r
+ UBaseType_t uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */\r
#endif\r
\r
#if ( configUSE_MUTEXES == 1 )\r
- unsigned portBASE_TYPE uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */\r
+ UBaseType_t uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */\r
#endif\r
\r
#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
#endif\r
\r
#if ( configGENERATE_RUN_TIME_STATS == 1 )\r
- unsigned long ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */\r
+ uint32_t ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */\r
#endif\r
\r
#if ( configUSE_NEWLIB_REENTRANT == 1 )\r
newlib and must provide system-wide implementations of the necessary\r
stubs. Be warned that (at the time of writing) the current newlib design\r
implements a system-wide malloc() that must be provided with locks. */\r
- struct _reent xNewLib_reent;\r
+ struct _reent xNewLib_reent;\r
#endif\r
\r
-} tskTCB;\r
+} TCB_t;\r
\r
/*\r
* Some kernel aware debuggers require the data the debugger needs access to to\r
/*lint -e956 A manual analysis and inspection has been used to determine which\r
static variables must be declared volatile. */\r
\r
-PRIVILEGED_DATA tskTCB * volatile pxCurrentTCB = NULL;\r
+PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;\r
\r
/* Lists for ready and blocked tasks. --------------------*/\r
-PRIVILEGED_DATA static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */\r
-PRIVILEGED_DATA static xList xDelayedTaskList1; /*< Delayed tasks. */\r
-PRIVILEGED_DATA static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */\r
-PRIVILEGED_DATA static xList * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */\r
-PRIVILEGED_DATA static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */\r
-PRIVILEGED_DATA static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready list when the scheduler is resumed. */\r
+PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */\r
+PRIVILEGED_DATA static List_t xDelayedTaskList1; /*< Delayed tasks. */\r
+PRIVILEGED_DATA static List_t xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */\r
+PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */\r
+PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */\r
+PRIVILEGED_DATA static List_t xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready list when the scheduler is resumed. */\r
\r
#if ( INCLUDE_vTaskDelete == 1 )\r
\r
- PRIVILEGED_DATA static xList xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */\r
- PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0U;\r
+ PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */\r
+ PRIVILEGED_DATA static volatile UBaseType_t uxTasksDeleted = ( UBaseType_t ) 0U;\r
\r
#endif\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
\r
- PRIVILEGED_DATA static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */\r
+ PRIVILEGED_DATA static List_t xSuspendedTaskList; /*< Tasks that are currently suspended. */\r
\r
#endif\r
\r
#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
\r
- PRIVILEGED_DATA static xTaskHandle xIdleTaskHandle = NULL; /*< Holds the handle of the idle task. The idle task is created automatically when the scheduler is started. */\r
+ PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = NULL; /*< Holds the handle of the idle task. The idle task is created automatically when the scheduler is started. */\r
\r
#endif\r
\r
/* Other file private variables. --------------------------------*/\r
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0U;\r
-PRIVILEGED_DATA static volatile portTickType xTickCount = ( portTickType ) 0U;\r
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY;\r
-PRIVILEGED_DATA static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE;\r
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE;\r
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxPendedTicks = ( unsigned portBASE_TYPE ) 0U;\r
-PRIVILEGED_DATA static volatile portBASE_TYPE xYieldPending = pdFALSE;\r
-PRIVILEGED_DATA static volatile portBASE_TYPE xNumOfOverflows = ( portBASE_TYPE ) 0;\r
-PRIVILEGED_DATA static unsigned portBASE_TYPE uxTaskNumber = ( unsigned portBASE_TYPE ) 0U;\r
-PRIVILEGED_DATA static volatile portTickType xNextTaskUnblockTime = portMAX_DELAY;\r
+PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks = ( UBaseType_t ) 0U;\r
+PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) 0U;\r
+PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY;\r
+PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE;\r
+PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended = ( UBaseType_t ) pdFALSE;\r
+PRIVILEGED_DATA static volatile UBaseType_t uxPendedTicks = ( UBaseType_t ) 0U;\r
+PRIVILEGED_DATA static volatile BaseType_t xYieldPending = pdFALSE;\r
+PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0;\r
+PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U;\r
+PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = portMAX_DELAY;\r
\r
#if ( configGENERATE_RUN_TIME_STATS == 1 )\r
\r
- PRIVILEGED_DATA static unsigned long ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */\r
- PRIVILEGED_DATA static unsigned long ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */\r
+ PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */\r
+ PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */\r
\r
#endif\r
\r
\r
/* uxTopReadyPriority holds the priority of the highest priority ready\r
state task. */\r
- #define taskRECORD_READY_PRIORITY( uxPriority ) \\r
- { \\r
- if( ( uxPriority ) > uxTopReadyPriority ) \\r
- { \\r
- uxTopReadyPriority = ( uxPriority ); \\r
- } \\r
+ #define taskRECORD_READY_PRIORITY( uxPriority ) \\r
+ { \\r
+ if( ( uxPriority ) > uxTopReadyPriority ) \\r
+ { \\r
+ uxTopReadyPriority = ( uxPriority ); \\r
+ } \\r
} /* taskRECORD_READY_PRIORITY */\r
\r
/*-----------------------------------------------------------*/\r
\r
- #define taskSELECT_HIGHEST_PRIORITY_TASK() \\r
- { \\r
- /* Find the highest priority queue that contains ready tasks. */ \\r
- while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) \\r
- { \\r
- configASSERT( uxTopReadyPriority ); \\r
- --uxTopReadyPriority; \\r
- } \\r
- \\r
- /* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of \\r
- the same priority get an equal share of the processor time. */ \\r
- listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); \\r
+ #define taskSELECT_HIGHEST_PRIORITY_TASK() \\r
+ { \\r
+ /* Find the highest priority queue that contains ready tasks. */ \\r
+ while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) ) \\r
+ { \\r
+ configASSERT( uxTopReadyPriority ); \\r
+ --uxTopReadyPriority; \\r
+ } \\r
+ \\r
+ /* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of \\r
+ the same priority get an equal share of the processor time. */ \\r
+ listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) ); \\r
} /* taskSELECT_HIGHEST_PRIORITY_TASK */\r
\r
/*-----------------------------------------------------------*/\r
\r
#define taskSELECT_HIGHEST_PRIORITY_TASK() \\r
{ \\r
- unsigned portBASE_TYPE uxTopPriority; \\r
+ UBaseType_t uxTopPriority; \\r
\\r
/* Find the highest priority queue that contains ready tasks. */ \\r
portGET_HIGHEST_PRIORITY( uxTopPriority, uxTopReadyPriority ); \\r
count overflows. */\r
#define taskSWITCH_DELAYED_LISTS() \\r
{ \\r
- xList *pxTemp; \\r
+ List_t *pxTemp; \\r
\\r
/* The delayed tasks list should be empty when the lists are switched. */ \\r
configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) ); \\r
* Place the task represented by pxTCB into the appropriate ready list for\r
* the task. It is inserted at the end of the list.\r
*/\r
-#define prvAddTaskToReadyList( pxTCB ) \\r
- traceMOVED_TASK_TO_READY_STATE( pxTCB ) \\r
- taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority ); \\r
+#define prvAddTaskToReadyList( pxTCB ) \\r
+ traceMOVED_TASK_TO_READY_STATE( pxTCB ) \\r
+ taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority ); \\r
vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xGenericListItem ) )\r
/*-----------------------------------------------------------*/\r
\r
/*\r
- * Several functions take an xTaskHandle parameter that can optionally be NULL,\r
+ * Several functions take an TaskHandle_t parameter that can optionally be NULL,\r
* where NULL is used to indicate that the handle of the currently executing\r
* task should be used in place of the parameter. This macro simply checks to\r
* see if the parameter is NULL and returns a pointer to the appropriate TCB.\r
*/\r
-#define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) ( pxHandle ) )\r
+#define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? ( TCB_t * ) pxCurrentTCB : ( TCB_t * ) ( pxHandle ) )\r
\r
/* The item value of the event list item is normally used to hold the priority\r
of the task to which it belongs (coded to allow it to be held in reverse\r
\r
/* Callback function prototypes. --------------------------*/\r
#if configCHECK_FOR_STACK_OVERFLOW > 0\r
- extern void vApplicationStackOverflowHook( xTaskHandle xTask, char *pcTaskName );\r
+ extern void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName );\r
#endif\r
\r
#if configUSE_TICK_HOOK > 0\r
* Utility to ready a TCB for a given task. Mainly just copies the parameters\r
* into the TCB structure.\r
*/\r
-static void prvInitialiseTCBVariables( tskTCB * const pxTCB, const char * const pcName, unsigned portBASE_TYPE uxPriority, const xMemoryRegion * const xRegions, const unsigned short usStackDepth ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+static void prvInitialiseTCBVariables( TCB_t * const pxTCB, const char * const pcName, UBaseType_t uxPriority, const MemoryRegion_t * const xRegions, const uint16_t usStackDepth ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
\r
/*\r
* Utility to ready all the lists used by the scheduler. This is called\r
*/\r
#if ( INCLUDE_vTaskDelete == 1 )\r
\r
- static void prvDeleteTCB( tskTCB *pxTCB ) PRIVILEGED_FUNCTION;\r
+ static void prvDeleteTCB( TCB_t *pxTCB ) PRIVILEGED_FUNCTION;\r
\r
#endif\r
\r
* The currently executing task is entering the Blocked state. Add the task to\r
* either the current or the overflow delayed task list.\r
*/\r
-static void prvAddCurrentTaskToDelayedList( const portTickType xTimeToWake ) PRIVILEGED_FUNCTION;\r
+static void prvAddCurrentTaskToDelayedList( const TickType_t xTimeToWake ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* Allocates memory from the heap for a TCB and associated stack. Checks the\r
* allocation was successful.\r
*/\r
-static tskTCB *prvAllocateTCBAndStack( const unsigned short usStackDepth, portSTACK_TYPE * const puxStackBuffer ) PRIVILEGED_FUNCTION;\r
+static TCB_t *prvAllocateTCBAndStack( const uint16_t usStackDepth, StackType_t * const puxStackBuffer ) PRIVILEGED_FUNCTION;\r
\r
/*\r
- * Fills an xTaskStatusType structure with information on each task that is\r
+ * Fills an TaskStatus_t structure with information on each task that is\r
* referenced from the pxList list (which may be a ready list, a delayed list,\r
* a suspended list, etc.).\r
*\r
*/\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- static unsigned portBASE_TYPE prvListTaskWithinSingleList( xTaskStatusType *pxTaskStatusArray, xList *pxList, eTaskState eState ) PRIVILEGED_FUNCTION;\r
+ static UBaseType_t prvListTaskWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState ) PRIVILEGED_FUNCTION;\r
\r
#endif\r
\r
*/\r
#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )\r
\r
- static unsigned short prvTaskCheckFreeStackSpace( const unsigned char * pucStackByte ) PRIVILEGED_FUNCTION;\r
+ static uint16_t prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte ) PRIVILEGED_FUNCTION;\r
\r
#endif\r
\r
*/\r
#if ( configUSE_TICKLESS_IDLE != 0 )\r
\r
- static portTickType prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;\r
+ static TickType_t prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;\r
\r
#endif\r
\r
\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xTaskGenericCreate( pdTASK_CODE pxTaskCode, const char * const pcName, const unsigned short usStackDepth, void * const pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle * const pxCreatedTask, portSTACK_TYPE * const puxStackBuffer, const xMemoryRegion * const xRegions ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+BaseType_t xTaskGenericCreate( pdTASK_CODE pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, StackType_t * const puxStackBuffer, const MemoryRegion_t * const xRegions ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
{\r
-signed portBASE_TYPE xReturn;\r
-tskTCB * pxNewTCB;\r
+BaseType_t xReturn;\r
+TCB_t * pxNewTCB;\r
\r
configASSERT( pxTaskCode );\r
configASSERT( ( ( uxPriority & ( ~portPRIVILEGE_BIT ) ) < configMAX_PRIORITIES ) );\r
\r
if( pxNewTCB != NULL )\r
{\r
- portSTACK_TYPE *pxTopOfStack;\r
+ StackType_t *pxTopOfStack;\r
\r
#if( portUSING_MPU_WRAPPERS == 1 )\r
/* Should the task be created in privileged mode? */\r
- portBASE_TYPE xRunPrivileged;\r
+ BaseType_t xRunPrivileged;\r
if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )\r
{\r
xRunPrivileged = pdTRUE;\r
required by the port. */\r
#if( portSTACK_GROWTH < 0 )\r
{\r
- pxTopOfStack = pxNewTCB->pxStack + ( usStackDepth - ( unsigned short ) 1 );\r
- pxTopOfStack = ( portSTACK_TYPE * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) ); /*lint !e923 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. */\r
+ pxTopOfStack = pxNewTCB->pxStack + ( usStackDepth - ( uint16_t ) 1 );\r
+ pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) ); /*lint !e923 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. */\r
\r
/* Check the alignment of the calculated top of stack is correct. */\r
- configASSERT( ( ( ( unsigned long ) pxTopOfStack & ( unsigned long ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
+ configASSERT( ( ( ( uint32_t ) pxTopOfStack & ( uint32_t ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
}\r
#else /* portSTACK_GROWTH */\r
{\r
pxTopOfStack = pxNewTCB->pxStack;\r
\r
/* Check the alignment of the stack buffer is correct. */\r
- configASSERT( ( ( ( unsigned long ) pxNewTCB->pxStack & ( unsigned long ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
+ configASSERT( ( ( ( uint32_t ) pxNewTCB->pxStack & ( uint32_t ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );\r
\r
/* If we want to use stack checking on architectures that use\r
a positive stack growth direction then we also need to store the\r
/* Pass the TCB out - in an anonymous way. The calling function/\r
task can use this as a handle to delete the task later if\r
required.*/\r
- *pxCreatedTask = ( xTaskHandle ) pxNewTCB;\r
+ *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;\r
}\r
else\r
{\r
the suspended state - make this the current task. */\r
pxCurrentTCB = pxNewTCB;\r
\r
- if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 )\r
+ if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )\r
{\r
/* This is the first task to be created so do the preliminary\r
initialisation required. We will not recover if this call\r
\r
#if ( INCLUDE_vTaskDelete == 1 )\r
\r
- void vTaskDelete( xTaskHandle xTaskToDelete )\r
+ void vTaskDelete( TaskHandle_t xTaskToDelete )\r
{\r
- tskTCB *pxTCB;\r
+ TCB_t *pxTCB;\r
\r
taskENTER_CRITICAL();\r
{\r
This will stop the task from be scheduled. The idle task will check\r
the termination list and free up any memory allocated by the\r
scheduler for the TCB and stack. */\r
- if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
taskRESET_READY_PRIORITY( pxTCB->uxPriority );\r
}\r
\r
#if ( INCLUDE_vTaskDelayUntil == 1 )\r
\r
- void vTaskDelayUntil( portTickType * const pxPreviousWakeTime, const portTickType xTimeIncrement )\r
+ void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement )\r
{\r
- portTickType xTimeToWake;\r
- portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE;\r
+ TickType_t xTimeToWake;\r
+ BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;\r
\r
configASSERT( pxPreviousWakeTime );\r
configASSERT( ( xTimeIncrement > 0U ) );\r
{\r
/* Minor optimisation. The tick count cannot change in this\r
block. */\r
- const portTickType xConstTickCount = xTickCount;\r
+ const TickType_t xConstTickCount = xTickCount;\r
\r
/* Generate the tick time at which the task wants to wake. */\r
xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;\r
/* We must remove ourselves from the ready list before adding\r
ourselves to the blocked list as the same list item is used for\r
both lists. */\r
- if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
/* The current task must be in a ready list, so there is\r
no need to check, and the port reset macro can be called\r
\r
#if ( INCLUDE_vTaskDelay == 1 )\r
\r
- void vTaskDelay( const portTickType xTicksToDelay )\r
+ void vTaskDelay( const TickType_t xTicksToDelay )\r
{\r
- portTickType xTimeToWake;\r
- signed portBASE_TYPE xAlreadyYielded = pdFALSE;\r
+ TickType_t xTimeToWake;\r
+ BaseType_t xAlreadyYielded = pdFALSE;\r
\r
\r
/* A delay time of zero just forces a reschedule. */\r
- if( xTicksToDelay > ( portTickType ) 0U )\r
+ if( xTicksToDelay > ( TickType_t ) 0U )\r
{\r
configASSERT( uxSchedulerSuspended == 0 );\r
vTaskSuspendAll();\r
/* We must remove ourselves from the ready list before adding\r
ourselves to the blocked list as the same list item is used for\r
both lists. */\r
- if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
/* The current task must be in a ready list, so there is\r
no need to check, and the port reset macro can be called\r
\r
#if ( INCLUDE_eTaskGetState == 1 )\r
\r
- eTaskState eTaskGetState( xTaskHandle xTask )\r
+ eTaskState eTaskGetState( TaskHandle_t xTask )\r
{\r
eTaskState eReturn;\r
- xList *pxStateList;\r
- const tskTCB * const pxTCB = ( tskTCB * ) xTask;\r
+ List_t *pxStateList;\r
+ const TCB_t * const pxTCB = ( TCB_t * ) xTask;\r
\r
configASSERT( pxTCB );\r
\r
{\r
taskENTER_CRITICAL();\r
{\r
- pxStateList = ( xList * ) listLIST_ITEM_CONTAINER( &( pxTCB->xGenericListItem ) );\r
+ pxStateList = ( List_t * ) listLIST_ITEM_CONTAINER( &( pxTCB->xGenericListItem ) );\r
}\r
taskEXIT_CRITICAL();\r
\r
\r
#if ( INCLUDE_uxTaskPriorityGet == 1 )\r
\r
- unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle xTask )\r
+ UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask )\r
{\r
- tskTCB *pxTCB;\r
- unsigned portBASE_TYPE uxReturn;\r
+ TCB_t *pxTCB;\r
+ UBaseType_t uxReturn;\r
\r
taskENTER_CRITICAL();\r
{\r
\r
#if ( INCLUDE_vTaskPrioritySet == 1 )\r
\r
- void vTaskPrioritySet( xTaskHandle xTask, unsigned portBASE_TYPE uxNewPriority )\r
+ void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority )\r
{\r
- tskTCB *pxTCB;\r
- unsigned portBASE_TYPE uxCurrentBasePriority, uxPriorityUsedOnEntry;\r
- portBASE_TYPE xYieldRequired = pdFALSE;\r
+ TCB_t *pxTCB;\r
+ UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry;\r
+ BaseType_t xYieldRequired = pdFALSE;\r
\r
configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) );\r
\r
/* Ensure the new priority is valid. */\r
- if( uxNewPriority >= ( unsigned portBASE_TYPE ) configMAX_PRIORITIES )\r
+ if( uxNewPriority >= ( UBaseType_t ) configMAX_PRIORITIES )\r
{\r
- uxNewPriority = ( unsigned portBASE_TYPE ) configMAX_PRIORITIES - ( unsigned portBASE_TYPE ) 1U;\r
+ uxNewPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;\r
}\r
else\r
{\r
being used for anything else. */\r
if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )\r
{\r
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( portTickType ) configMAX_PRIORITIES - ( portTickType ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
}\r
else\r
{\r
/* The task is currently in its ready list - remove before adding\r
it to it's new ready list. As we are in a critical section we\r
can do this even if the scheduler is suspended. */\r
- if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
/* It is known that the task is in its ready list so\r
there is no need to check again and the port level\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
\r
- void vTaskSuspend( xTaskHandle xTaskToSuspend )\r
+ void vTaskSuspend( TaskHandle_t xTaskToSuspend )\r
{\r
- tskTCB *pxTCB;\r
+ TCB_t *pxTCB;\r
\r
taskENTER_CRITICAL();\r
{\r
\r
/* Remove task from the ready/delayed list and place in the\r
suspended list. */\r
- if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
taskRESET_READY_PRIORITY( pxTCB->uxPriority );\r
}\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
\r
- signed portBASE_TYPE xTaskIsTaskSuspended( const xTaskHandle xTask )\r
+ BaseType_t xTaskIsTaskSuspended( const TaskHandle_t xTask )\r
{\r
- signed portBASE_TYPE xReturn = pdFALSE;\r
- const tskTCB * const pxTCB = ( tskTCB * ) xTask;\r
+ BaseType_t xReturn = pdFALSE;\r
+ const TCB_t * const pxTCB = ( TCB_t * ) xTask;\r
\r
/* It does not make sense to check if the calling task is suspended. */\r
configASSERT( xTask );\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
\r
- void vTaskResume( xTaskHandle xTaskToResume )\r
+ void vTaskResume( TaskHandle_t xTaskToResume )\r
{\r
- tskTCB * const pxTCB = ( tskTCB * ) xTaskToResume;\r
+ TCB_t * const pxTCB = ( TCB_t * ) xTaskToResume;\r
\r
/* It does not make sense to resume the calling task. */\r
configASSERT( xTaskToResume );\r
\r
#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) )\r
\r
- portBASE_TYPE xTaskResumeFromISR( xTaskHandle xTaskToResume )\r
+ BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume )\r
{\r
- portBASE_TYPE xYieldRequired = pdFALSE;\r
- tskTCB * const pxTCB = ( tskTCB * ) xTaskToResume;\r
- unsigned portBASE_TYPE uxSavedInterruptStatus;\r
+ BaseType_t xYieldRequired = pdFALSE;\r
+ TCB_t * const pxTCB = ( TCB_t * ) xTaskToResume;\r
+ UBaseType_t uxSavedInterruptStatus;\r
\r
configASSERT( xTaskToResume );\r
\r
{\r
traceTASK_RESUME_FROM_ISR( pxTCB );\r
\r
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )\r
+ if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )\r
{\r
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )\r
{\r
\r
void vTaskStartScheduler( void )\r
{\r
-portBASE_TYPE xReturn;\r
+BaseType_t xReturn;\r
\r
/* Add the idle task at the lowest priority. */\r
#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
#endif /* configUSE_NEWLIB_REENTRANT */\r
\r
xSchedulerRunning = pdTRUE;\r
- xTickCount = ( portTickType ) 0U;\r
+ xTickCount = ( TickType_t ) 0U;\r
\r
/* If configGENERATE_RUN_TIME_STATS is defined then the following\r
macro must be defined to configure the timer/counter used to generate\r
void vTaskSuspendAll( void )\r
{\r
/* A critical section is not required as the variable is of type\r
- portBASE_TYPE. Please read Richard Barry's reply in the following link to a\r
+ BaseType_t. Please read Richard Barry's reply in the following link to a\r
post in the FreeRTOS support forum before reporting this as a bug! -\r
http://goo.gl/wu4acr */\r
++uxSchedulerSuspended;\r
\r
#if ( configUSE_TICKLESS_IDLE != 0 )\r
\r
- static portTickType prvGetExpectedIdleTime( void )\r
+ static TickType_t prvGetExpectedIdleTime( void )\r
{\r
- portTickType xReturn;\r
+ TickType_t xReturn;\r
\r
if( pxCurrentTCB->uxPriority > tskIDLE_PRIORITY )\r
{\r
#endif /* configUSE_TICKLESS_IDLE */\r
/*----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xTaskResumeAll( void )\r
+BaseType_t xTaskResumeAll( void )\r
{\r
-tskTCB *pxTCB;\r
-portBASE_TYPE xAlreadyYielded = pdFALSE;\r
+TCB_t *pxTCB;\r
+BaseType_t xAlreadyYielded = pdFALSE;\r
\r
/* If uxSchedulerSuspended is zero then this function does not match a\r
previous call to vTaskSuspendAll(). */\r
{\r
--uxSchedulerSuspended;\r
\r
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )\r
+ if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )\r
{\r
- if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0U )\r
+ if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )\r
{\r
/* Move any readied tasks from the pending list into the\r
appropriate ready list. */\r
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )\r
{\r
- pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );\r
+ pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );\r
( void ) uxListRemove( &( pxTCB->xEventListItem ) );\r
( void ) uxListRemove( &( pxTCB->xGenericListItem ) );\r
prvAddTaskToReadyList( pxTCB );\r
they should be processed now. This ensures the tick count does\r
not slip, and that any delayed tasks are resumed at the correct\r
time. */\r
- if( uxPendedTicks > ( unsigned portBASE_TYPE ) 0U )\r
+ if( uxPendedTicks > ( UBaseType_t ) 0U )\r
{\r
- while( uxPendedTicks > ( unsigned portBASE_TYPE ) 0U )\r
+ while( uxPendedTicks > ( UBaseType_t ) 0U )\r
{\r
if( xTaskIncrementTick() != pdFALSE )\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portTickType xTaskGetTickCount( void )\r
+TickType_t xTaskGetTickCount( void )\r
{\r
-portTickType xTicks;\r
+TickType_t xTicks;\r
\r
/* Critical section required if running on a 16 bit processor. */\r
taskENTER_CRITICAL();\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portTickType xTaskGetTickCountFromISR( void )\r
+TickType_t xTaskGetTickCountFromISR( void )\r
{\r
-portTickType xReturn;\r
-unsigned portBASE_TYPE uxSavedInterruptStatus;\r
+TickType_t xReturn;\r
+UBaseType_t uxSavedInterruptStatus;\r
\r
/* RTOS ports that support interrupt nesting have the concept of a maximum\r
system call (or maximum API call) interrupt priority. Interrupts that are\r
}\r
/*-----------------------------------------------------------*/\r
\r
-unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void )\r
+UBaseType_t uxTaskGetNumberOfTasks( void )\r
{\r
/* A critical section is not required because the variables are of type\r
- portBASE_TYPE. */\r
+ BaseType_t. */\r
return uxCurrentNumberOfTasks;\r
}\r
/*-----------------------------------------------------------*/\r
\r
#if ( INCLUDE_pcTaskGetTaskName == 1 )\r
\r
- char *pcTaskGetTaskName( xTaskHandle xTaskToQuery )\r
+ char *pcTaskGetTaskName( TaskHandle_t xTaskToQuery )\r
{\r
- tskTCB *pxTCB;\r
+ TCB_t *pxTCB;\r
\r
/* If null is passed in here then the name of the calling task is being queried. */\r
pxTCB = prvGetTCBFromHandle( xTaskToQuery );\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- unsigned portBASE_TYPE uxTaskGetSystemState( xTaskStatusType * const pxTaskStatusArray, const unsigned portBASE_TYPE uxArraySize, unsigned long * const pulTotalRunTime )\r
+ UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime )\r
{\r
- unsigned portBASE_TYPE uxTask = 0, uxQueue = configMAX_PRIORITIES;\r
+ UBaseType_t uxTask = 0, uxQueue = configMAX_PRIORITIES;\r
\r
vTaskSuspendAll();\r
{\r
/* Is there a space in the array for each task in the system? */\r
if( uxArraySize >= uxCurrentNumberOfTasks )\r
{\r
- /* Fill in an xTaskStatusType structure with information on each\r
+ /* Fill in an TaskStatus_t structure with information on each\r
task in the Ready state. */\r
do\r
{\r
uxQueue--;\r
uxTask += prvListTaskWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &( pxReadyTasksLists[ uxQueue ] ), eReady );\r
\r
- } while( uxQueue > ( unsigned portBASE_TYPE ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ } while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
\r
- /* Fill in an xTaskStatusType structure with information on each\r
+ /* Fill in an TaskStatus_t structure with information on each\r
task in the Blocked state. */\r
- uxTask += prvListTaskWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( xList * ) pxDelayedTaskList, eBlocked );\r
- uxTask += prvListTaskWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( xList * ) pxOverflowDelayedTaskList, eBlocked );\r
+ uxTask += prvListTaskWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxDelayedTaskList, eBlocked );\r
+ uxTask += prvListTaskWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxOverflowDelayedTaskList, eBlocked );\r
\r
#if( INCLUDE_vTaskDelete == 1 )\r
{\r
- /* Fill in an xTaskStatusType structure with information on\r
+ /* Fill in an TaskStatus_t structure with information on\r
each task that has been deleted but not yet cleaned up. */\r
uxTask += prvListTaskWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xTasksWaitingTermination, eDeleted );\r
}\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
{\r
- /* Fill in an xTaskStatusType structure with information on\r
+ /* Fill in an TaskStatus_t structure with information on\r
each task in the Suspended state. */\r
uxTask += prvListTaskWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xSuspendedTaskList, eSuspended );\r
}\r
\r
#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )\r
\r
- xTaskHandle xTaskGetIdleTaskHandle( void )\r
+ TaskHandle_t xTaskGetIdleTaskHandle( void )\r
{\r
/* If xTaskGetIdleTaskHandle() is called before the scheduler has been\r
started, then xIdleTaskHandle will be NULL. */\r
1. */\r
#if ( configUSE_TICKLESS_IDLE != 0 )\r
\r
- void vTaskStepTick( const portTickType xTicksToJump )\r
+ void vTaskStepTick( const TickType_t xTicksToJump )\r
{\r
/* Correct the tick count value after a period during which the tick\r
was suppressed. Note this does *not* call the tick hook function for\r
#endif /* configUSE_TICKLESS_IDLE */\r
/*----------------------------------------------------------*/\r
\r
-portBASE_TYPE xTaskIncrementTick( void )\r
+BaseType_t xTaskIncrementTick( void )\r
{\r
-tskTCB * pxTCB;\r
-portTickType xItemValue;\r
-portBASE_TYPE xSwitchRequired = pdFALSE;\r
+TCB_t * pxTCB;\r
+TickType_t xItemValue;\r
+BaseType_t xSwitchRequired = pdFALSE;\r
\r
/* Called by the portable layer each time a tick interrupt occurs.\r
Increments the tick then checks to see if the new tick value will cause any\r
tasks to be unblocked. */\r
traceTASK_INCREMENT_TICK( xTickCount );\r
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )\r
+ if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )\r
{\r
/* Increment the RTOS tick, switching the delayed and overflowed\r
delayed lists if it wraps to 0. */\r
{\r
/* Minor optimisation. The tick count cannot change in this\r
block. */\r
- const portTickType xConstTickCount = xTickCount;\r
+ const TickType_t xConstTickCount = xTickCount;\r
\r
- if( xConstTickCount == ( portTickType ) 0U )\r
+ if( xConstTickCount == ( TickType_t ) 0U )\r
{\r
taskSWITCH_DELAYED_LISTS();\r
}\r
item at the head of the delayed list. This is the time\r
at which the task at the head of the delayed list must\r
be removed from the Blocked state. */\r
- pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );\r
+ pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );\r
xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) );\r
\r
if( xConstTickCount < xItemValue )\r
writer has not explicitly turned time slicing off. */\r
#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )\r
{\r
- if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( unsigned portBASE_TYPE ) 1 )\r
+ if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )\r
{\r
xSwitchRequired = pdTRUE;\r
}\r
{\r
/* Guard against the tick hook being called when the pended tick\r
count is being unwound (when the scheduler is being unlocked). */\r
- if( uxPendedTicks == ( unsigned portBASE_TYPE ) 0U )\r
+ if( uxPendedTicks == ( UBaseType_t ) 0U )\r
{\r
vApplicationTickHook();\r
}\r
\r
#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
\r
- void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction )\r
+ void vTaskSetApplicationTaskTag( TaskHandle_t xTask, pdTASK_HOOK_CODE pxHookFunction )\r
{\r
- tskTCB *xTCB;\r
+ TCB_t *xTCB;\r
\r
/* If xTask is NULL then it is the task hook of the calling task that is\r
getting set. */\r
if( xTask == NULL )\r
{\r
- xTCB = ( tskTCB * ) pxCurrentTCB;\r
+ xTCB = ( TCB_t * ) pxCurrentTCB;\r
}\r
else\r
{\r
- xTCB = ( tskTCB * ) xTask;\r
+ xTCB = ( TCB_t * ) xTask;\r
}\r
\r
/* Save the hook function in the TCB. A critical section is required as\r
\r
#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
\r
- pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
+ pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( TaskHandle_t xTask )\r
{\r
- tskTCB *xTCB;\r
+ TCB_t *xTCB;\r
pdTASK_HOOK_CODE xReturn;\r
\r
/* If xTask is NULL then we are setting our own task hook. */\r
if( xTask == NULL )\r
{\r
- xTCB = ( tskTCB * ) pxCurrentTCB;\r
+ xTCB = ( TCB_t * ) pxCurrentTCB;\r
}\r
else\r
{\r
- xTCB = ( tskTCB * ) xTask;\r
+ xTCB = ( TCB_t * ) xTask;\r
}\r
\r
/* Save the hook function in the TCB. A critical section is required as\r
\r
#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
\r
- portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
+ BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )\r
{\r
- tskTCB *xTCB;\r
- portBASE_TYPE xReturn;\r
+ TCB_t *xTCB;\r
+ BaseType_t xReturn;\r
\r
/* If xTask is NULL then we are calling our own task hook. */\r
if( xTask == NULL )\r
{\r
- xTCB = ( tskTCB * ) pxCurrentTCB;\r
+ xTCB = ( TCB_t * ) pxCurrentTCB;\r
}\r
else\r
{\r
- xTCB = ( tskTCB * ) xTask;\r
+ xTCB = ( TCB_t * ) xTask;\r
}\r
\r
if( xTCB->pxTaskTag != NULL )\r
\r
void vTaskSwitchContext( void )\r
{\r
- if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE )\r
+ if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )\r
{\r
/* The scheduler is currently suspended - do not allow a context\r
switch. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vTaskPlaceOnEventList( xList * const pxEventList, const portTickType xTicksToWait )\r
+void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )\r
{\r
-portTickType xTimeToWake;\r
+TickType_t xTimeToWake;\r
\r
configASSERT( pxEventList );\r
\r
/* We must remove ourselves from the ready list before adding ourselves\r
to the blocked list as the same list item is used for both lists. We have\r
exclusive access to the ready lists as the scheduler is locked. */\r
- if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
/* The current task must be in a ready list, so there is no need to\r
check, and the port reset macro can be called directly. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vTaskPlaceOnUnorderedEventList( xList * pxEventList, const portTickType xItemValue, const portTickType xTicksToWait )\r
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait )\r
{\r
-portTickType xTimeToWake;\r
+TickType_t xTimeToWake;\r
\r
configASSERT( pxEventList );\r
\r
/* The task must be removed from the ready list before it is added to the\r
blocked list. Exclusive access can be assured to the ready list as the\r
scheduler is locked. */\r
- if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
/* The current task must be in a ready list, so there is no need to\r
check, and the port reset macro can be called directly. */\r
\r
#if configUSE_TIMERS == 1\r
\r
- void vTaskPlaceOnEventListRestricted( xList * const pxEventList, const portTickType xTicksToWait )\r
+ void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, const TickType_t xTicksToWait )\r
{\r
- portTickType xTimeToWake;\r
+ TickType_t xTimeToWake;\r
\r
configASSERT( pxEventList );\r
\r
/* We must remove this task from the ready list before adding it to the\r
blocked list as the same list item is used for both lists. This\r
function is called form a critical section. */\r
- if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxCurrentTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
/* The current task must be in a ready list, so there is no need to\r
check, and the port reset macro can be called directly. */\r
#endif /* configUSE_TIMERS */\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xTaskRemoveFromEventList( const xList * const pxEventList )\r
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )\r
{\r
-tskTCB *pxUnblockedTCB;\r
-portBASE_TYPE xReturn;\r
+TCB_t *pxUnblockedTCB;\r
+BaseType_t xReturn;\r
\r
/* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE\r
SCHEDULER SUSPENDED. It can also be called from within an ISR. */\r
\r
This function assumes that a check has already been made to ensure that\r
pxEventList is not empty. */\r
- pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );\r
+ pxUnblockedTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );\r
configASSERT( pxUnblockedTCB );\r
( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );\r
\r
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )\r
+ if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )\r
{\r
( void ) uxListRemove( &( pxUnblockedTCB->xGenericListItem ) );\r
prvAddTaskToReadyList( pxUnblockedTCB );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xTaskRemoveFromUnorderedEventList( xListItem * pxEventListItem, const portTickType xItemValue )\r
+BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue )\r
{\r
-tskTCB *pxUnblockedTCB;\r
-portBASE_TYPE xReturn;\r
+TCB_t *pxUnblockedTCB;\r
+BaseType_t xReturn;\r
\r
/* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE\r
SCHEDULER SUSPENDED. It can also be called from within an ISR. */\r
\r
/* Remove the TCB from the delayed list, and add it to the ready list. */\r
\r
- pxUnblockedTCB = ( tskTCB * ) listGET_LIST_ITEM_OWNER( pxEventListItem );\r
+ pxUnblockedTCB = ( TCB_t * ) listGET_LIST_ITEM_OWNER( pxEventListItem );\r
configASSERT( pxUnblockedTCB );\r
( void ) uxListRemove( pxEventListItem );\r
\r
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )\r
+ if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )\r
{\r
( void ) uxListRemove( &( pxUnblockedTCB->xGenericListItem ) );\r
prvAddTaskToReadyList( pxUnblockedTCB );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vTaskSetTimeOutState( xTimeOutType * const pxTimeOut )\r
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )\r
{\r
configASSERT( pxTimeOut );\r
pxTimeOut->xOverflowCount = xNumOfOverflows;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType * const pxTimeOut, portTickType * const pxTicksToWait )\r
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )\r
{\r
-portBASE_TYPE xReturn;\r
+BaseType_t xReturn;\r
\r
configASSERT( pxTimeOut );\r
configASSERT( pxTicksToWait );\r
taskENTER_CRITICAL();\r
{\r
/* Minor optimisation. The tick count cannot change in this block. */\r
- const portTickType xConstTickCount = xTickCount;\r
+ const TickType_t xConstTickCount = xTickCount;\r
\r
#if ( INCLUDE_vTaskSuspend == 1 )\r
/* If INCLUDE_vTaskSuspend is set to 1 and the block time specified is\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- unsigned portBASE_TYPE uxTaskGetTaskNumber( xTaskHandle xTask )\r
+ UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask )\r
{\r
- unsigned portBASE_TYPE uxReturn;\r
- tskTCB *pxTCB;\r
+ UBaseType_t uxReturn;\r
+ TCB_t *pxTCB;\r
\r
if( xTask != NULL )\r
{\r
- pxTCB = ( tskTCB * ) xTask;\r
+ pxTCB = ( TCB_t * ) xTask;\r
uxReturn = pxTCB->uxTaskNumber;\r
}\r
else\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- void vTaskSetTaskNumber( xTaskHandle xTask, const unsigned portBASE_TYPE uxHandle )\r
+ void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle )\r
{\r
- tskTCB *pxTCB;\r
+ TCB_t *pxTCB;\r
\r
if( xTask != NULL )\r
{\r
- pxTCB = ( tskTCB * ) xTask;\r
+ pxTCB = ( TCB_t * ) xTask;\r
pxTCB->uxTaskNumber = uxHandle;\r
}\r
}\r
the list, and an occasional incorrect value will not matter. If\r
the ready list at the idle priority contains more than one task\r
then a task other than the idle task is ready to execute. */\r
- if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 )\r
+ if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )\r
{\r
taskYIELD();\r
}\r
configUSE_TICKLESS_IDLE to be set to a value other than 1. */\r
#if ( configUSE_TICKLESS_IDLE != 0 )\r
{\r
- portTickType xExpectedIdleTime;\r
+ TickType_t xExpectedIdleTime;\r
\r
/* It is not desirable to suspend then resume the scheduler on\r
each iteration of the idle task. Therefore, a preliminary\r
#if configUSE_TIMERS == 0\r
{\r
/* The idle task exists in addition to the application tasks. */\r
- const unsigned portBASE_TYPE uxNonApplicationTasks = 1;\r
+ const UBaseType_t uxNonApplicationTasks = 1;\r
\r
/* If timers are not being used and all the tasks are in the\r
suspended list (which might mean they have an infinite block\r
#endif /* configUSE_TICKLESS_IDLE */\r
/*-----------------------------------------------------------*/\r
\r
-static void prvInitialiseTCBVariables( tskTCB * const pxTCB, const char * const pcName, unsigned portBASE_TYPE uxPriority, const xMemoryRegion * const xRegions, const unsigned short usStackDepth ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+static void prvInitialiseTCBVariables( TCB_t * const pxTCB, const char * const pcName, UBaseType_t uxPriority, const MemoryRegion_t * const xRegions, const uint16_t usStackDepth ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
{\r
-unsigned portBASE_TYPE x;\r
+UBaseType_t x;\r
\r
/* Store the task name in the TCB. */\r
- for( x = ( unsigned portBASE_TYPE ) 0; x < ( unsigned portBASE_TYPE ) configMAX_TASK_NAME_LEN; x++ )\r
+ for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )\r
{\r
pxTCB->pcTaskName[ x ] = pcName[ x ];\r
\r
\r
/* This is used as an array index so must ensure it's not too large. First\r
remove the privilege bit if one is present. */\r
- if( uxPriority >= ( unsigned portBASE_TYPE ) configMAX_PRIORITIES )\r
+ if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )\r
{\r
- uxPriority = ( unsigned portBASE_TYPE ) configMAX_PRIORITIES - ( unsigned portBASE_TYPE ) 1U;\r
+ uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;\r
}\r
else\r
{\r
vListInitialiseItem( &( pxTCB->xGenericListItem ) );\r
vListInitialiseItem( &( pxTCB->xEventListItem ) );\r
\r
- /* Set the pxTCB as a link back from the xListItem. This is so we can get\r
+ /* Set the pxTCB as a link back from the ListItem_t. This is so we can get\r
back to the containing TCB from a generic item in a list. */\r
listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB );\r
\r
/* Event lists are always in priority order. */\r
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( portTickType ) configMAX_PRIORITIES - ( portTickType ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB );\r
\r
#if ( portCRITICAL_NESTING_IN_TCB == 1 )\r
{\r
- pxTCB->uxCriticalNesting = ( unsigned portBASE_TYPE ) 0U;\r
+ pxTCB->uxCriticalNesting = ( UBaseType_t ) 0U;\r
}\r
#endif /* portCRITICAL_NESTING_IN_TCB */\r
\r
\r
#if ( portUSING_MPU_WRAPPERS == 1 )\r
\r
- void vTaskAllocateMPURegions( xTaskHandle xTaskToModify, const xMemoryRegion * const xRegions )\r
+ void vTaskAllocateMPURegions( TaskHandle_t xTaskToModify, const MemoryRegion_t * const xRegions )\r
{\r
- tskTCB *pxTCB;\r
+ TCB_t *pxTCB;\r
\r
/* If null is passed in here then we are deleting ourselves. */\r
pxTCB = prvGetTCBFromHandle( xTaskToModify );\r
\r
static void prvInitialiseTaskLists( void )\r
{\r
-unsigned portBASE_TYPE uxPriority;\r
+UBaseType_t uxPriority;\r
\r
- for( uxPriority = ( unsigned portBASE_TYPE ) 0U; uxPriority < ( unsigned portBASE_TYPE ) configMAX_PRIORITIES; uxPriority++ )\r
+ for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )\r
{\r
vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );\r
}\r
{\r
#if ( INCLUDE_vTaskDelete == 1 )\r
{\r
- portBASE_TYPE xListIsEmpty;\r
+ BaseType_t xListIsEmpty;\r
\r
/* ucTasksDeleted is used to prevent vTaskSuspendAll() being called\r
too often in the idle task. */\r
- while( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0U )\r
+ while( uxTasksDeleted > ( UBaseType_t ) 0U )\r
{\r
vTaskSuspendAll();\r
xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination );\r
\r
if( xListIsEmpty == pdFALSE )\r
{\r
- tskTCB *pxTCB;\r
+ TCB_t *pxTCB;\r
\r
taskENTER_CRITICAL();\r
{\r
- pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );\r
+ pxTCB = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );\r
( void ) uxListRemove( &( pxTCB->xGenericListItem ) );\r
--uxCurrentNumberOfTasks;\r
--uxTasksDeleted;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvAddCurrentTaskToDelayedList( const portTickType xTimeToWake )\r
+static void prvAddCurrentTaskToDelayedList( const TickType_t xTimeToWake )\r
{\r
/* The list item will be inserted in wake time order. */\r
listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static tskTCB *prvAllocateTCBAndStack( const unsigned short usStackDepth, portSTACK_TYPE * const puxStackBuffer )\r
+static TCB_t *prvAllocateTCBAndStack( const uint16_t usStackDepth, StackType_t * const puxStackBuffer )\r
{\r
-tskTCB *pxNewTCB;\r
+TCB_t *pxNewTCB;\r
\r
/* Allocate space for the TCB. Where the memory comes from depends on\r
the implementation of the port malloc function. */\r
- pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) );\r
+ pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );\r
\r
if( pxNewTCB != NULL )\r
{\r
/* Allocate space for the stack used by the task being created.\r
The base of the stack memory stored in the TCB so the task can\r
be deleted later if required. */\r
- pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMallocAligned( ( ( ( size_t ) usStackDepth ) * sizeof( portSTACK_TYPE ) ), puxStackBuffer ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ pxNewTCB->pxStack = ( StackType_t * ) pvPortMallocAligned( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ), puxStackBuffer ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
\r
if( pxNewTCB->pxStack == NULL )\r
{\r
#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )\r
{\r
/* Just to help debugging. */\r
- ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) usStackDepth * sizeof( portSTACK_TYPE ) );\r
+ ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) usStackDepth * sizeof( StackType_t ) );\r
}\r
#endif /* ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) ) */\r
}\r
\r
#if ( configUSE_TRACE_FACILITY == 1 )\r
\r
- static unsigned portBASE_TYPE prvListTaskWithinSingleList( xTaskStatusType *pxTaskStatusArray, xList *pxList, eTaskState eState )\r
+ static UBaseType_t prvListTaskWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState )\r
{\r
- volatile tskTCB *pxNextTCB, *pxFirstTCB;\r
- unsigned portBASE_TYPE uxTask = 0;\r
+ volatile TCB_t *pxNextTCB, *pxFirstTCB;\r
+ UBaseType_t uxTask = 0;\r
\r
- if( listCURRENT_LIST_LENGTH( pxList ) > ( unsigned portBASE_TYPE ) 0 )\r
+ if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )\r
{\r
listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );\r
\r
- /* Populate an xTaskStatusType structure within the\r
+ /* Populate an TaskStatus_t structure within the\r
pxTaskStatusArray array for each task that is referenced from\r
- pxList. See the definition of xTaskStatusType in task.h for the\r
- meaning of each xTaskStatusType structure member. */\r
+ pxList. See the definition of TaskStatus_t in task.h for the\r
+ meaning of each TaskStatus_t structure member. */\r
do\r
{\r
listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );\r
\r
- pxTaskStatusArray[ uxTask ].xHandle = ( xTaskHandle ) pxNextTCB;\r
+ pxTaskStatusArray[ uxTask ].xHandle = ( TaskHandle_t ) pxNextTCB;\r
pxTaskStatusArray[ uxTask ].pcTaskName = ( const char * ) &( pxNextTCB->pcTaskName [ 0 ] );\r
pxTaskStatusArray[ uxTask ].xTaskNumber = pxNextTCB->uxTCBNumber;\r
pxTaskStatusArray[ uxTask ].eCurrentState = eState;\r
\r
#if ( portSTACK_GROWTH > 0 )\r
{\r
- pxTaskStatusArray[ uxTask ].usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( unsigned char * ) pxNextTCB->pxEndOfStack );\r
+ pxTaskStatusArray[ uxTask ].usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxNextTCB->pxEndOfStack );\r
}\r
#else\r
{\r
- pxTaskStatusArray[ uxTask ].usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( unsigned char * ) pxNextTCB->pxStack );\r
+ pxTaskStatusArray[ uxTask ].usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxNextTCB->pxStack );\r
}\r
#endif\r
\r
\r
#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )\r
\r
- static unsigned short prvTaskCheckFreeStackSpace( const unsigned char * pucStackByte )\r
+ static uint16_t prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte )\r
{\r
- unsigned long ulCount = 0U;\r
+ uint32_t ulCount = 0U;\r
\r
while( *pucStackByte == tskSTACK_FILL_BYTE )\r
{\r
ulCount++;\r
}\r
\r
- ulCount /= ( unsigned long ) sizeof( portSTACK_TYPE );\r
+ ulCount /= ( uint32_t ) sizeof( StackType_t );\r
\r
- return ( unsigned short ) ulCount;\r
+ return ( uint16_t ) ulCount;\r
}\r
\r
#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) ) */\r
\r
#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
\r
- unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
+ UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask )\r
{\r
- tskTCB *pxTCB;\r
- unsigned char *pucEndOfStack;\r
- unsigned portBASE_TYPE uxReturn;\r
+ TCB_t *pxTCB;\r
+ uint8_t *pucEndOfStack;\r
+ UBaseType_t uxReturn;\r
\r
pxTCB = prvGetTCBFromHandle( xTask );\r
\r
#if portSTACK_GROWTH < 0\r
{\r
- pucEndOfStack = ( unsigned char * ) pxTCB->pxStack;\r
+ pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;\r
}\r
#else\r
{\r
- pucEndOfStack = ( unsigned char * ) pxTCB->pxEndOfStack;\r
+ pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;\r
}\r
#endif\r
\r
- uxReturn = ( unsigned portBASE_TYPE ) prvTaskCheckFreeStackSpace( pucEndOfStack );\r
+ uxReturn = ( UBaseType_t ) prvTaskCheckFreeStackSpace( pucEndOfStack );\r
\r
return uxReturn;\r
}\r
\r
#if ( INCLUDE_vTaskDelete == 1 )\r
\r
- static void prvDeleteTCB( tskTCB *pxTCB )\r
+ static void prvDeleteTCB( TCB_t *pxTCB )\r
{\r
/* This call is required specifically for the TriCore port. It must be\r
above the vPortFree() calls. The call is also used by ports/demos that\r
\r
static void prvResetNextTaskUnblockTime( void )\r
{\r
-tskTCB *pxTCB;\r
+TCB_t *pxTCB;\r
\r
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )\r
{\r
the item at the head of the delayed list. This is the time at\r
which the task at the head of the delayed list should be removed\r
from the Blocked state. */\r
- ( pxTCB ) = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );\r
+ ( pxTCB ) = ( TCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );\r
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xGenericListItem ) );\r
}\r
}\r
\r
#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )\r
\r
- xTaskHandle xTaskGetCurrentTaskHandle( void )\r
+ TaskHandle_t xTaskGetCurrentTaskHandle( void )\r
{\r
- xTaskHandle xReturn;\r
+ TaskHandle_t xReturn;\r
\r
/* A critical section is not required as this is not called from\r
an interrupt and the current TCB will always be the same for any\r
\r
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )\r
\r
- portBASE_TYPE xTaskGetSchedulerState( void )\r
+ BaseType_t xTaskGetSchedulerState( void )\r
{\r
- portBASE_TYPE xReturn;\r
+ BaseType_t xReturn;\r
\r
if( xSchedulerRunning == pdFALSE )\r
{\r
}\r
else\r
{\r
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )\r
+ if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )\r
{\r
xReturn = taskSCHEDULER_RUNNING;\r
}\r
\r
#if ( configUSE_MUTEXES == 1 )\r
\r
- void vTaskPriorityInherit( xTaskHandle const pxMutexHolder )\r
+ void vTaskPriorityInherit( TaskHandle_t const pxMutexHolder )\r
{\r
- tskTCB * const pxTCB = ( tskTCB * ) pxMutexHolder;\r
+ TCB_t * const pxTCB = ( TCB_t * ) pxMutexHolder;\r
\r
/* If the mutex was given back by an interrupt while the queue was\r
locked then the mutex holder might now be NULL. */\r
not being used for anything else. */\r
if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )\r
{\r
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( portTickType ) configMAX_PRIORITIES - ( portTickType ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
}\r
else\r
{\r
be moved into a new list. */\r
if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ) != pdFALSE )\r
{\r
- if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
taskRESET_READY_PRIORITY( pxTCB->uxPriority );\r
}\r
\r
#if ( configUSE_MUTEXES == 1 )\r
\r
- void vTaskPriorityDisinherit( xTaskHandle const pxMutexHolder )\r
+ void vTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )\r
{\r
- tskTCB * const pxTCB = ( tskTCB * ) pxMutexHolder;\r
+ TCB_t * const pxTCB = ( TCB_t * ) pxMutexHolder;\r
\r
if( pxMutexHolder != NULL )\r
{\r
{\r
/* We must be the running task to be able to give the mutex back.\r
Remove ourselves from the ready list we currently appear in. */\r
- if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( unsigned portBASE_TYPE ) 0 )\r
+ if( uxListRemove( &( pxTCB->xGenericListItem ) ) == ( UBaseType_t ) 0 )\r
{\r
taskRESET_READY_PRIORITY( pxTCB->uxPriority );\r
}\r
being used for anything else. */\r
if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )\r
{\r
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( portTickType ) configMAX_PRIORITIES - ( portTickType ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
}\r
else\r
{\r
\r
void vTaskList( char * pcWriteBuffer )\r
{\r
- xTaskStatusType *pxTaskStatusArray;\r
- volatile unsigned portBASE_TYPE uxArraySize, x;\r
+ TaskStatus_t *pxTaskStatusArray;\r
+ volatile UBaseType_t uxArraySize, x;\r
char cStatus;\r
\r
/*\r
uxArraySize = uxCurrentNumberOfTasks;\r
\r
/* Allocate an array index for each task. */\r
- pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( xTaskStatusType ) );\r
+ pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );\r
\r
if( pxTaskStatusArray != NULL )\r
{\r
\r
void vTaskGetRunTimeStats( char *pcWriteBuffer )\r
{\r
- xTaskStatusType *pxTaskStatusArray;\r
- volatile unsigned portBASE_TYPE uxArraySize, x;\r
- unsigned long ulTotalTime, ulStatsAsPercentage;\r
+ TaskStatus_t *pxTaskStatusArray;\r
+ volatile UBaseType_t uxArraySize, x;\r
+ uint32_t ulTotalTime, ulStatsAsPercentage;\r
\r
/*\r
* PLEASE NOTE:\r
uxArraySize = uxCurrentNumberOfTasks;\r
\r
/* Allocate an array index for each task. */\r
- pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( xTaskStatusType ) );\r
+ pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );\r
\r
if( pxTaskStatusArray != NULL )\r
{\r
#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) ) */\r
/*-----------------------------------------------------------*/\r
\r
-portTickType uxTaskResetEventItemValue( void )\r
+TickType_t uxTaskResetEventItemValue( void )\r
{\r
-portTickType uxReturn;\r
+TickType_t uxReturn;\r
\r
uxReturn = listGET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ) );\r
\r
/* Reset the event list item to its normal value - so it can be used with\r
queues and semaphores. */\r
- listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( portTickType ) configMAX_PRIORITIES - ( portTickType ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
+ listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */\r
\r
return uxReturn;\r
}\r
#if ( configUSE_TIMERS == 1 )\r
\r
/* Misc definitions. */\r
-#define tmrNO_DELAY ( portTickType ) 0U\r
+#define tmrNO_DELAY ( TickType_t ) 0U\r
\r
/* The definition of the timers themselves. */\r
typedef struct tmrTimerControl\r
{\r
- const char *pcTimerName; /*<< Text name. This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
- xListItem xTimerListItem; /*<< Standard linked list item as used by all kernel features for event management. */\r
- portTickType xTimerPeriodInTicks;/*<< How quickly and often the timer expires. */\r
- unsigned portBASE_TYPE uxAutoReload; /*<< Set to pdTRUE if the timer should be automatically restarted once expired. Set to pdFALSE if the timer is, in effect, a one-shot timer. */\r
- void *pvTimerID; /*<< An ID to identify the timer. This allows the timer to be identified when the same callback is used for multiple timers. */\r
- tmrTIMER_CALLBACK pxCallbackFunction; /*<< The function that will be called when the timer expires. */\r
-} xTIMER;\r
+ const char *pcTimerName; /*<< Text name. This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+ ListItem_t xTimerListItem; /*<< Standard linked list item as used by all kernel features for event management. */\r
+ TickType_t xTimerPeriodInTicks;/*<< How quickly and often the timer expires. */\r
+ UBaseType_t uxAutoReload; /*<< Set to pdTRUE if the timer should be automatically restarted once expired. Set to pdFALSE if the timer is, in effect, a one-shot timer. */\r
+ void *pvTimerID; /*<< An ID to identify the timer. This allows the timer to be identified when the same callback is used for multiple timers. */\r
+ tmrTIMER_CALLBACK pxCallbackFunction; /*<< The function that will be called when the timer expires. */\r
+} Timer_t;\r
\r
/* The definition of messages that can be sent and received on the timer queue.\r
Two types of message can be queued - messages that manipulate a software timer,\r
and xCallbackParametersType respectively. */\r
typedef struct tmrTimerParameters\r
{\r
- portTickType xMessageValue; /*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */\r
- xTIMER * pxTimer; /*<< The timer to which the command will be applied. */\r
-} xTimerParametersType;\r
+ TickType_t xMessageValue; /*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */\r
+ Timer_t * pxTimer; /*<< The timer to which the command will be applied. */\r
+} TimerParameter_t;\r
\r
\r
typedef struct tmrCallbackParameters\r
{\r
pdAPPLICATION_CALLBACK_CODE pxCallbackFunction; /* << The callback function to execute. */\r
void *pvParameter1; /* << The value that will be used as the callback functions first parameter. */\r
- unsigned long ulParameter2; /* << The value that will be used as the callback functions second parameter. */\r
-} xCallbackParametersType;\r
+ uint32_t ulParameter2; /* << The value that will be used as the callback functions second parameter. */\r
+} CallbackParameters_t;\r
\r
/* The structure that contains the two message types, along with an identifier\r
that is used to determine which message type is valid. */\r
typedef struct tmrTimerQueueMessage\r
{\r
- portBASE_TYPE xMessageID; /*<< The command being sent to the timer service task. */\r
+ BaseType_t xMessageID; /*<< The command being sent to the timer service task. */\r
union\r
{\r
- xTimerParametersType xTimerParameters;\r
+ TimerParameter_t xTimerParameters;\r
\r
/* Don't include xCallbackParameters if it is not going to be used as\r
it makes the structure (and therefore the timer queue) larger. */\r
#if ( INCLUDE_xTimerPendCallbackFromISR == 1 )\r
- xCallbackParametersType xCallbackParameters;\r
+ CallbackParameters_t xCallbackParameters;\r
#endif /* INCLUDE_xTimerPendCallbackFromISR */\r
} u;\r
-} xDAEMON_TASK_MESSAGE;\r
+} DaemonTaskMessage_t;\r
\r
/*lint -e956 A manual analysis and inspection has been used to determine which\r
static variables must be declared volatile. */\r
/* The list in which active timers are stored. Timers are referenced in expire\r
time order, with the nearest expiry time at the front of the list. Only the\r
timer service task is allowed to access these lists. */\r
-PRIVILEGED_DATA static xList xActiveTimerList1;\r
-PRIVILEGED_DATA static xList xActiveTimerList2;\r
-PRIVILEGED_DATA static xList *pxCurrentTimerList;\r
-PRIVILEGED_DATA static xList *pxOverflowTimerList;\r
+PRIVILEGED_DATA static List_t xActiveTimerList1;\r
+PRIVILEGED_DATA static List_t xActiveTimerList2;\r
+PRIVILEGED_DATA static List_t *pxCurrentTimerList;\r
+PRIVILEGED_DATA static List_t *pxOverflowTimerList;\r
\r
/* A queue that is used to send commands to the timer service task. */\r
-PRIVILEGED_DATA static xQueueHandle xTimerQueue = NULL;\r
+PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;\r
\r
#if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )\r
\r
- PRIVILEGED_DATA static xTaskHandle xTimerTaskHandle = NULL;\r
+ PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;\r
\r
#endif\r
\r
* Insert the timer into either xActiveTimerList1, or xActiveTimerList2,\r
* depending on if the expire time causes a timer counter overflow.\r
*/\r
-static portBASE_TYPE prvInsertTimerInActiveList( xTIMER * const pxTimer, const portTickType xNextExpiryTime, const portTickType xTimeNow, const portTickType xCommandTime ) PRIVILEGED_FUNCTION;\r
+static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* An active timer has reached its expire time. Reload the timer if it is an\r
* auto reload timer, then call its callback.\r
*/\r
-static void prvProcessExpiredTimer( const portTickType xNextExpireTime, const portTickType xTimeNow ) PRIVILEGED_FUNCTION;\r
+static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* The tick count has overflowed. Switch the timer lists after ensuring the\r
* Obtain the current tick count, setting *pxTimerListsWereSwitched to pdTRUE\r
* if a tick count overflow occurred since prvSampleTimeNow() was last called.\r
*/\r
-static portTickType prvSampleTimeNow( portBASE_TYPE * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;\r
+static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* If the timer list contains any active timers then return the expire time of\r
* timer list does not contain any timers then return 0 and set *pxListWasEmpty\r
* to pdTRUE.\r
*/\r
-static portTickType prvGetNextExpireTime( portBASE_TYPE * const pxListWasEmpty ) PRIVILEGED_FUNCTION;\r
+static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIVILEGED_FUNCTION;\r
\r
/*\r
* If a timer has expired, process it. Otherwise, block the timer service task\r
* until either a timer does expire or a command is received.\r
*/\r
-static void prvProcessTimerOrBlockTask( const portTickType xNextExpireTime, const portBASE_TYPE xListWasEmpty ) PRIVILEGED_FUNCTION;\r
+static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, const BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;\r
\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xTimerCreateTimerTask( void )\r
+BaseType_t xTimerCreateTimerTask( void )\r
{\r
-portBASE_TYPE xReturn = pdFAIL;\r
+BaseType_t xReturn = pdFAIL;\r
\r
/* This function is called when the scheduler is started if\r
configUSE_TIMERS is set to 1. Check that the infrastructure used by the\r
{\r
/* Create the timer task, storing its handle in xTimerTaskHandle so\r
it can be returned by the xTimerGetTimerDaemonTaskHandle() function. */\r
- xReturn = xTaskCreate( prvTimerTask, "Tmr Svc", ( unsigned short ) configTIMER_TASK_STACK_DEPTH, NULL, ( ( unsigned portBASE_TYPE ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, &xTimerTaskHandle );\r
+ xReturn = xTaskCreate( prvTimerTask, "Tmr Svc", ( uint16_t ) configTIMER_TASK_STACK_DEPTH, NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, &xTimerTaskHandle );\r
}\r
#else\r
{\r
/* Create the timer task without storing its handle. */\r
- xReturn = xTaskCreate( prvTimerTask, "Tmr Svc", ( unsigned short ) configTIMER_TASK_STACK_DEPTH, NULL, ( ( unsigned portBASE_TYPE ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, NULL);\r
+ xReturn = xTaskCreate( prvTimerTask, "Tmr Svc", ( uint16_t ) configTIMER_TASK_STACK_DEPTH, NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, NULL);\r
}\r
#endif\r
}\r
}\r
/*-----------------------------------------------------------*/\r
\r
-xTimerHandle xTimerCreate( const char * const pcTimerName, const portTickType xTimerPeriodInTicks, const unsigned portBASE_TYPE uxAutoReload, void * const pvTimerID, tmrTIMER_CALLBACK pxCallbackFunction ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
+TimerHandle_t xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, tmrTIMER_CALLBACK pxCallbackFunction ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\r
{\r
-xTIMER *pxNewTimer;\r
+Timer_t *pxNewTimer;\r
\r
/* Allocate the timer structure. */\r
- if( xTimerPeriodInTicks == ( portTickType ) 0U )\r
+ if( xTimerPeriodInTicks == ( TickType_t ) 0U )\r
{\r
pxNewTimer = NULL;\r
}\r
else\r
{\r
- pxNewTimer = ( xTIMER * ) pvPortMalloc( sizeof( xTIMER ) );\r
+ pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) );\r
if( pxNewTimer != NULL )\r
{\r
/* Ensure the infrastructure used by the timer service task has been\r
/* 0 is not a valid value for xTimerPeriodInTicks. */\r
configASSERT( ( xTimerPeriodInTicks > 0 ) );\r
\r
- return ( xTimerHandle ) pxNewTimer;\r
+ return ( TimerHandle_t ) pxNewTimer;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xTimerGenericCommand( xTimerHandle xTimer, const portBASE_TYPE xCommandID, const portTickType xOptionalValue, signed portBASE_TYPE * const pxHigherPriorityTaskWoken, const portTickType xBlockTime )\r
+BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xBlockTime )\r
{\r
-portBASE_TYPE xReturn = pdFAIL;\r
-xDAEMON_TASK_MESSAGE xMessage;\r
+BaseType_t xReturn = pdFAIL;\r
+DaemonTaskMessage_t xMessage;\r
\r
/* Send a message to the timer service task to perform a particular action\r
on a particular timer definition. */\r
/* Send a command to the timer service task to start the xTimer timer. */\r
xMessage.xMessageID = xCommandID;\r
xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;\r
- xMessage.u.xTimerParameters.pxTimer = ( xTIMER * ) xTimer;\r
+ xMessage.u.xTimerParameters.pxTimer = ( Timer_t * ) xTimer;\r
\r
if( pxHigherPriorityTaskWoken == NULL )\r
{\r
\r
#if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )\r
\r
- xTaskHandle xTimerGetTimerDaemonTaskHandle( void )\r
+ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )\r
{\r
/* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been\r
started, then xTimerTaskHandle will be NULL. */\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
-static void prvProcessExpiredTimer( const portTickType xNextExpireTime, const portTickType xTimeNow )\r
+static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )\r
{\r
-portBASE_TYPE xResult;\r
-xTIMER * const pxTimer = ( xTIMER * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );\r
+BaseType_t xResult;\r
+Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );\r
\r
/* Remove the timer from the list of active timers. A check has already\r
been performed to ensure the list is not empty. */\r
\r
/* If the timer is an auto reload timer then calculate the next\r
expiry time and re-insert the timer in the list of active timers. */\r
- if( pxTimer->uxAutoReload == ( unsigned portBASE_TYPE ) pdTRUE )\r
+ if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )\r
{\r
/* The timer is inserted into a list using a time relative to anything\r
other than the current time. It will therefore be inserted into the\r
}\r
\r
/* Call the timer callback. */\r
- pxTimer->pxCallbackFunction( ( xTimerHandle ) pxTimer );\r
+ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );\r
}\r
/*-----------------------------------------------------------*/\r
\r
static void prvTimerTask( void *pvParameters )\r
{\r
-portTickType xNextExpireTime;\r
-portBASE_TYPE xListWasEmpty;\r
+TickType_t xNextExpireTime;\r
+BaseType_t xListWasEmpty;\r
\r
/* Just to avoid compiler warnings. */\r
( void ) pvParameters;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvProcessTimerOrBlockTask( const portTickType xNextExpireTime, const portBASE_TYPE xListWasEmpty )\r
+static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, const BaseType_t xListWasEmpty )\r
{\r
-portTickType xTimeNow;\r
-portBASE_TYPE xTimerListsWereSwitched;\r
+TickType_t xTimeNow;\r
+BaseType_t xTimerListsWereSwitched;\r
\r
vTaskSuspendAll();\r
{\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static portTickType prvGetNextExpireTime( portBASE_TYPE * const pxListWasEmpty )\r
+static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )\r
{\r
-portTickType xNextExpireTime;\r
+TickType_t xNextExpireTime;\r
\r
/* Timers are listed in expiry time order, with the head of the list\r
referencing the task that will expire first. Obtain the time at which\r
else\r
{\r
/* Ensure the task unblocks when the tick count rolls over. */\r
- xNextExpireTime = ( portTickType ) 0U;\r
+ xNextExpireTime = ( TickType_t ) 0U;\r
}\r
\r
return xNextExpireTime;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static portTickType prvSampleTimeNow( portBASE_TYPE * const pxTimerListsWereSwitched )\r
+static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )\r
{\r
-portTickType xTimeNow;\r
-PRIVILEGED_DATA static portTickType xLastTime = ( portTickType ) 0U; /*lint !e956 Variable is only accessible to one task. */\r
+TickType_t xTimeNow;\r
+PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */\r
\r
xTimeNow = xTaskGetTickCount();\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static portBASE_TYPE prvInsertTimerInActiveList( xTIMER * const pxTimer, const portTickType xNextExpiryTime, const portTickType xTimeNow, const portTickType xCommandTime )\r
+static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )\r
{\r
-portBASE_TYPE xProcessTimerNow = pdFALSE;\r
+BaseType_t xProcessTimerNow = pdFALSE;\r
\r
listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );\r
listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );\r
\r
static void prvProcessReceivedCommands( void )\r
{\r
-xDAEMON_TASK_MESSAGE xMessage;\r
-xTIMER *pxTimer;\r
-portBASE_TYPE xTimerListsWereSwitched, xResult;\r
-portTickType xTimeNow;\r
+DaemonTaskMessage_t xMessage;\r
+Timer_t *pxTimer;\r
+BaseType_t xTimerListsWereSwitched, xResult;\r
+TickType_t xTimeNow;\r
\r
while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */\r
{\r
{\r
if( xMessage.xMessageID == tmrCOMMAND_EXECUTE_CALLBACK )\r
{\r
- const xCallbackParametersType * const pxCallback = &( xMessage.u.xCallbackParameters );\r
+ const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );\r
\r
/* The timer uses the xCallbackParameters member to request a\r
callback be executed. Check the callback is not NULL. */\r
{\r
/* The timer expired before it was added to the active\r
timer list. Process it now. */\r
- pxTimer->pxCallbackFunction( ( xTimerHandle ) pxTimer );\r
+ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );\r
traceTIMER_EXPIRED( pxTimer );\r
\r
- if( pxTimer->uxAutoReload == ( unsigned portBASE_TYPE ) pdTRUE )\r
+ if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )\r
{\r
xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );\r
configASSERT( xResult );\r
\r
static void prvSwitchTimerLists( void )\r
{\r
-portTickType xNextExpireTime, xReloadTime;\r
-xList *pxTemp;\r
-xTIMER *pxTimer;\r
-portBASE_TYPE xResult;\r
+TickType_t xNextExpireTime, xReloadTime;\r
+List_t *pxTemp;\r
+Timer_t *pxTimer;\r
+BaseType_t xResult;\r
\r
/* The tick count has overflowed. The timer lists must be switched.\r
If there are any timers still referenced from the current timer list\r
xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );\r
\r
/* Remove the timer from the list. */\r
- pxTimer = ( xTIMER * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );\r
+ pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );\r
( void ) uxListRemove( &( pxTimer->xTimerListItem ) );\r
traceTIMER_EXPIRED( pxTimer );\r
\r
/* Execute its callback, then send a command to restart the timer if\r
it is an auto-reload timer. It cannot be restarted here as the lists\r
have not yet been switched. */\r
- pxTimer->pxCallbackFunction( ( xTimerHandle ) pxTimer );\r
+ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );\r
\r
- if( pxTimer->uxAutoReload == ( unsigned portBASE_TYPE ) pdTRUE )\r
+ if( pxTimer->uxAutoReload == ( UBaseType_t ) pdTRUE )\r
{\r
/* Calculate the reload value, and if the reload value results in\r
the timer going into the same timer list then it has already expired\r
vListInitialise( &xActiveTimerList2 );\r
pxCurrentTimerList = &xActiveTimerList1;\r
pxOverflowTimerList = &xActiveTimerList2;\r
- xTimerQueue = xQueueCreate( ( unsigned portBASE_TYPE ) configTIMER_QUEUE_LENGTH, sizeof( xDAEMON_TASK_MESSAGE ) );\r
+ xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );\r
configASSERT( xTimerQueue );\r
\r
#if ( configQUEUE_REGISTRY_SIZE > 0 )\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xTimerIsTimerActive( xTimerHandle xTimer )\r
+BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )\r
{\r
-portBASE_TYPE xTimerIsInActiveList;\r
-xTIMER *pxTimer = ( xTIMER * ) xTimer;\r
+BaseType_t xTimerIsInActiveList;\r
+Timer_t *pxTimer = ( Timer_t * ) xTimer;\r
\r
/* Is the timer in the list of active timers? */\r
taskENTER_CRITICAL();\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void *pvTimerGetTimerID( const xTimerHandle xTimer )\r
+void *pvTimerGetTimerID( const TimerHandle_t xTimer )\r
{\r
-xTIMER * const pxTimer = ( xTIMER * ) xTimer;\r
+Timer_t * const pxTimer = ( Timer_t * ) xTimer;\r
\r
return pxTimer->pvTimerID;\r
}\r
\r
#if( INCLUDE_xTimerPendCallbackFromISR == 1 )\r
\r
- portBASE_TYPE xTimerPendCallbackFromISR( pdAPPLICATION_CALLBACK_CODE pvCallbackFunction, void *pvParameter1, unsigned long ulParameter2, portBASE_TYPE *pxHigherPriorityTaskWoken )\r
+ BaseType_t xTimerPendCallbackFromISR( pdAPPLICATION_CALLBACK_CODE pvCallbackFunction, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken )\r
{\r
- xDAEMON_TASK_MESSAGE xMessage;\r
- portBASE_TYPE xReturn;\r
+ DaemonTaskMessage_t xMessage;\r
+ BaseType_t xReturn;\r
\r
/* Complete the message with the function parameters and post it to the\r
daemon task. */\r
projects / freertos / commitdiff