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7 years agoaarch64: provide virt2phys command
Matthias Welwarsky [Thu, 6 Oct 2016 13:05:53 +0000 (15:05 +0200)]
aarch64: provide virt2phys command

Use AT commands to translate virtual to physical addresses based on
current MMU configuration.

Change-Id: I1bbd7d674c435541b617b17022fa9f7f0f01bdab
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: slightly simplify breakpoint set function
Matthias Welwarsky [Mon, 26 Sep 2016 09:44:25 +0000 (11:44 +0200)]
aarch64: slightly simplify breakpoint set function

Set HDE bit through helper function instead of manual mem_ap access.

Change-Id: I68c157870f3f3c47a875d425ade6e975d8075424
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: remove bogus os_border calculation
Matthias Welwarsky [Mon, 26 Sep 2016 09:08:11 +0000 (11:08 +0200)]
aarch64: remove bogus os_border calculation

The artificial "os_border" doesn't exist in aarch64 state and is wrong
for aarch32 state as well. Remove it.

Change-Id: I7c673a1404b03aa78dbd505e115fa3a93f7ca05f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: armv8 cache functions update
Matthias Welwarsky [Thu, 22 Sep 2016 19:29:42 +0000 (21:29 +0200)]
aarch64: armv8 cache functions update

Update cache identification to match functionality present in
armv7a_cache.c

Change-Id: I2dc4bee80f5a22b8728334d40331c183d1406f27
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: refactor armv8 dpm
Matthias Welwarsky [Thu, 22 Sep 2016 19:16:31 +0000 (21:16 +0200)]
aarch64: refactor armv8 dpm

Move all DPM related functions from aarch64.c to armv8_dpm.c.

Change-Id: I43404ff5db414ae898787a523d3219e5bee44889
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: add basic Aarch32 support
Matthias Welwarsky [Thu, 15 Sep 2016 07:13:51 +0000 (09:13 +0200)]
aarch64: add basic Aarch32 support

Add database for common, equivalent opcodes for Aarch32 and
Aarch64 execution states

Revisit all functions that access Aarch64 specific registers
or use Aarch64 opcodes and rewrite them to act depending on
current state of the core.

Add core register access functions for Aarch32 state

Add function to determine the core execution state without
reading DSPSR.

Change-Id: I345e9f6d682fb4ba454e4b1d16bb5e1b27570691
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: update smp halt and resume to better facilitate CTI
Matthias Welwarsky [Thu, 29 Sep 2016 12:06:42 +0000 (14:06 +0200)]
aarch64: update smp halt and resume to better facilitate CTI

Set up CTI so that halt and resume requests get routed to all PEs in the
SMP group.

Change-Id: Ie92cfd3fe54632e5fdc049a6bf5b24b99451a8c9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: add cache handling when setting/deleting soft breakpoints
Matthias Welwarsky [Tue, 20 Sep 2016 09:29:39 +0000 (11:29 +0200)]
aarch64: add cache handling when setting/deleting soft breakpoints

Flush D-Cache before, flush D-Cache and invalidate I-Cache after
modifying the breakpoint location.

Change-Id: Id2e2f4f2545c062de7e27275f66857357496d4ae
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: add cache handling functions
Matthias Welwarsky [Tue, 20 Sep 2016 09:16:30 +0000 (11:16 +0200)]
aarch64: add cache handling functions

For now only D-Cache flush (Clean&Invalidate) and I-Cache
invalidate are implemented. That's enough for software breakpoints.

Change-Id: I8e96d645a230b51e3490403f4564e59ba6a76cf3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: disable interrupts when stepping [WIP]
Matthias Welwarsky [Mon, 19 Sep 2016 15:04:03 +0000 (17:04 +0200)]
aarch64: disable interrupts when stepping [WIP]

On live hardware, interrupts will happen while the core is
held for stepping. The next step will most of the time execute an
interrupt service instead of the next line of code, which is not
what you expect. Disable interrupts through DSCR before resuming
for a step, and re-enable them again after the step happened.

This should be made configurable, like on cortex_a target.

Change-Id: I94d8ffb58cf7579dedb66bc756b7eb6828b6e8e4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: use correct instruction for software breakpoints
Matthias Welwarsky [Fri, 16 Sep 2016 11:46:08 +0000 (13:46 +0200)]
aarch64: use correct instruction for software breakpoints

External debuggers need to use HLT, not BRK. HLT generates a halting
debug event while BRK generates a debug exception for self-hosted
debugging.

Change-Id: I24024b83668107f73a14cc75d951134917269e5c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: report the correct reason for halting after singlestep
Matthias Welwarsky [Fri, 16 Sep 2016 10:55:17 +0000 (12:55 +0200)]
aarch64: report the correct reason for halting after singlestep

Don't report breakpoint as debug reason when halt is due to a
single-step event.

Change-Id: Ie6c3ca1e5427c73eb726a038301b6a29a47d1217
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix register list
Matthias Welwarsky [Fri, 16 Sep 2016 08:12:00 +0000 (10:12 +0200)]
aarch64: fix register list

According to gdb documentation, a register "cpsr" is expected if
aarch64 features are announced. Also, the value buffer must be
capable of holding a 64bit value (8 byte, not 4)

Change-Id: I7aec4e84fa87eadb26797acd0d16c988b9852616
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix duplication of register cache
Matthias Welwarsky [Thu, 15 Sep 2016 15:17:05 +0000 (17:17 +0200)]
aarch64: fix duplication of register cache

Change-Id: Ib4422e39171f19eea3f0b5a86f9dccdbb7044265
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: remove code for AHB-AP support
Matthias Welwarsky [Thu, 15 Sep 2016 08:19:42 +0000 (10:19 +0200)]
aarch64: remove code for AHB-AP support

Reduce complexity of memory access functions, anyway there are no ARMv8
platforms that actually contain an AHB-AP at all. while at it, fix
virt-to-phys function signatures to expect target_addr_t.

Change-Id: I55a369686f42993988b6323e5a77f38de12530a9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix stepping from address
Matthias Welwarsky [Thu, 15 Sep 2016 07:14:31 +0000 (09:14 +0200)]
aarch64: fix stepping from address

The step command optionally carries a resume address. In this case,
stepping should start not at the current PC, but at the given address.

Change-Id: Id5792a3745f470cf29efa90c63d65f33d36f6b25
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: remove references to armv7-r
Matthias Welwarsky [Thu, 1 Sep 2016 20:27:28 +0000 (22:27 +0200)]
aarch64: remove references to armv7-r

aarch64 target doesn't support the -r profile anyway.

Change-Id: Iaa470ed9f95ea495ab1bafdf401f55a1ebcefddf
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix armv8_set_core_reg when destination is cpsr
Matthias Welwarsky [Fri, 16 Sep 2016 13:36:09 +0000 (15:36 +0200)]
aarch64: fix armv8_set_core_reg when destination is cpsr

When armv8_set_core_reg is used to set the value of
the CPSR, also update the internal architecture state.

Change-Id: I5f6a2be6fde8d91ec3352d8ba23c4aa90eb02977
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: unify armv7-a and armv8 debug entry decoding
Matthias Welwarsky [Fri, 16 Sep 2016 13:34:21 +0000 (15:34 +0200)]
aarch64: unify armv7-a and armv8 debug entry decoding

Make DSCR_RUN_MODE() usable for armv8 and arm7 debug

Change-Id: Ib3ba3000d5b6aa03e590f3ca4969e677474eb12c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: use correct A64 instructions for cache handling
Matthias Welwarsky [Fri, 16 Sep 2016 13:31:29 +0000 (15:31 +0200)]
aarch64: use correct A64 instructions for cache handling

Replace A32 MCR with proper A64 MSR opcodes

Change-Id: I64a60b17a58a26b199d2d1b2d5d91098e0c8cbd0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix first examination
Matthias Welwarsky [Fri, 16 Sep 2016 13:26:49 +0000 (15:26 +0200)]
aarch64: fix first examination

properly decode debug capabilities, remove superfluous register
accesses.

Change-Id: I2cca699b515262dd2a508d7be97826eb17b9c607
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: correct display for aarch64 state
Matthias Welwarsky [Fri, 16 Sep 2016 13:23:27 +0000 (15:23 +0200)]
aarch64: correct display for aarch64 state

Aarch64 state has different PSTATE and exception level model.
Correct the printout e.g. in poll command.

Change-Id: I1820fd1836c7076ae0aa405fa335fd1a14a2e5b3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: use symbolic constant for register count
Matthias Welwarsky [Fri, 16 Sep 2016 13:22:14 +0000 (15:22 +0200)]
aarch64: use symbolic constant for register count

Aarch64 has 34 registers, but use ARMV8_LAST_REG instead of
raw integer constant.

Change-Id: I86481899ade74f27fc90eff9f367d444c03e535e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: remove armv7-a virt-to-phys code
Matthias Welwarsky [Fri, 16 Sep 2016 13:18:47 +0000 (15:18 +0200)]
aarch64: remove armv7-a virt-to-phys code

Page table layout in aarch64 is very different from armv7-a layout.
Remove the incorrect handling, to be replaced correct armv8 code in a
later patch

Change-Id: I64c728a72a24f9f4177726ccc07a02a8ca0d56ce
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: clear breakpoint value register on removal
Matthias Welwarsky [Fri, 16 Sep 2016 13:17:41 +0000 (15:17 +0200)]
aarch64: clear breakpoint value register on removal

Not only null control but also value of the breakpoint when it is
removed.

Change-Id: Id99c7e3644729c64e563f1fa8b0577f350be6a98
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: correct breakpoint register offset
Matthias Welwarsky [Fri, 16 Sep 2016 13:16:19 +0000 (15:16 +0200)]
aarch64: correct breakpoint register offset

armv8 breakpoint register spacing is 16, not 4 as in armv7-a

Change-Id: I0d49d06878a0c9dab35cde478064e5366f01a8e0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix cache identification
Matthias Welwarsky [Fri, 16 Sep 2016 09:49:57 +0000 (11:49 +0200)]
aarch64: fix cache identification

Use correct instructions to access CLIDR, CSSELR and CCSIDR.

Change-Id: I319b96c03a44fdb59fcb18a00f816f6af0261f0a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix reading of translation table registers
Matthias Welwarsky [Fri, 16 Sep 2016 09:43:27 +0000 (11:43 +0200)]
aarch64: fix reading of translation table registers

Correctly access and parse aarch64 ttbcr.

Change-Id: I1b1652791a6b5200f58033925286292d838e8410
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix entry into debug state
Matthias Welwarsky [Fri, 16 Sep 2016 09:34:03 +0000 (11:34 +0200)]
aarch64: fix entry into debug state

- armv8 EDSCR has no ITR_EN bit, ITR is always enabled. Writes to this
  bit are ignored but we should not do them anyway
- use dpmv8 function to report the reason for debug entry
- WFAR is a 64bit register

Change-Id: I07b81ecf105ceb7c3ae2f764bb408eb973c1d1de
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: use symbolic opcodes instead of hex values
Matthias Welwarsky [Fri, 16 Sep 2016 09:15:15 +0000 (11:15 +0200)]
aarch64: use symbolic opcodes instead of hex values

Use opcode definitions from armv8_opcodes.h where appropriate

Change-Id: Iead33fb8e62eb2dd2419ef8932f7d46c087f51a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix accesses to SCTLR_ELn register
Matthias Welwarsky [Fri, 16 Sep 2016 09:10:55 +0000 (11:10 +0200)]
aarch64: fix accesses to SCTLR_ELn register

The system control register has several instances, depending on the
exception level. Make sure to access always access the correct one.

Change-Id: I9e867f4dbd9625762042f20ed905064ea4e3270f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix error recovery in aarch64_dpm_prepare
Matthias Welwarsky [Fri, 16 Sep 2016 09:06:42 +0000 (11:06 +0200)]
aarch64: fix error recovery in aarch64_dpm_prepare

Flush DTRRX with a dummy read if it's full, clear sticky errors
by writing CSE bit to EDRCR register.

Change-Id: Ia42ae9d3859ba6cbe892d48584e21acdd4e25c84
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: formalize use of CTI in halt and resume
Matthias Welwarsky [Fri, 16 Sep 2016 09:02:36 +0000 (11:02 +0200)]
aarch64: formalize use of CTI in halt and resume

Use configured CTI base address instead of hardcoded value, if
available.
Use symbolic constants instead of raw hex offsets.
Trim halt and resume code to what is actually necessary.

Change-Id: I4997c2bcca7cebf5ad78859a6a12abe8639594ed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix context and hybrid hardware breakpoints
Matthias Welwarsky [Sat, 17 Sep 2016 19:43:15 +0000 (21:43 +0200)]
aarch64: fix context and hybrid hardware breakpoints

Fix 64bit address setting
Fix register spacing (16 instead of 4)
Set HMC bit for all but linked context match breakpoints,
where the bit is ignored anyway

Change-Id: I48428f39154a6fe5fadc075ca918d1500a0bb241
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: deconflict debug register names
Matthias Welwarsky [Sat, 17 Sep 2016 19:11:38 +0000 (21:11 +0200)]
aarch64: deconflict debug register names

CPUDBG_ -> CPUV8_DBG_ for armv8 debug registers.

Change-Id: I3d24cc209309fa9bbeb5c3e6c88a572383c9360e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: Implement MA mode for bulk memory reads and writes
Matthias Welwarsky [Thu, 15 Sep 2016 10:12:25 +0000 (12:12 +0200)]
aarch64: Implement MA mode for bulk memory reads and writes

- 64bit addresses are supported
- Aarch32 state is supported

Change-Id: I8c37fa166954d09195d08c6963b8017194e350f5
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: make DCC read/write functions operate on struct armv8_common
Matthias Welwarsky [Thu, 1 Sep 2016 19:14:46 +0000 (21:14 +0200)]
aarch64: make DCC read/write functions operate on struct armv8_common

Change the signature of aarch64_(read|write)_dcc[_64] to take a
"struct armv8_common *" as the context to operate on. No functional
change.

Change-Id: Ie501113f65ea22aff2eee173ec717f6908a63494
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: introduce dpm extension for ARMv8
Matthias Welwarsky [Sat, 3 Sep 2016 21:20:58 +0000 (23:20 +0200)]
aarch64: introduce dpm extension for ARMv8

Add or move ARMv8 related dpm function to their own source module

Change-Id: Id93d50be0b8635bd40ddb2a74fe8746ff840d736
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agotarget: add -ctibase config option in addition to -dbgbase
Matthias Welwarsky [Sat, 3 Sep 2016 15:12:18 +0000 (17:12 +0200)]
target: add -ctibase config option in addition to -dbgbase

Some vendors don't fully populate the ROM table, e.g. BCM2357 (used in
Raspberry Pi 3) doesn't list CTI, however it is mandatory for halting
an ARMv8 core and therefore it's always present (and required),
regardless of the ROM table listing it or not.

Change-Id: Ia18a4f1b5b931ccd19805b188ebf737c837c6b54
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: fix reading of MPIDR
Matthias Welwarsky [Sat, 3 Sep 2016 14:35:59 +0000 (16:35 +0200)]
aarch64: fix reading of MPIDR

read MPIDR register through correct MSR instruction.

Change-Id: I7e2d00c2871191c4168b177a7a809443b0db4c82
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: add symbolic definitions for armv8 opcodes
Matthias Welwarsky [Fri, 2 Sep 2016 08:38:08 +0000 (10:38 +0200)]
aarch64: add symbolic definitions for armv8 opcodes

To replace hexadecimal constants with descriptive names and increase
flexibility.

Change-Id: I6f7b6f045866ed8b9360f54b640ecdb307eebc51
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: Correct target state for hardware step
David Ung [Mon, 20 Apr 2015 20:14:43 +0000 (13:14 -0700)]
aarch64: Correct target state for hardware step

When using hardware step for doing stepping, the existing DSCR records
the event as external debug request.  This will generate a SIGINT event
to GDB and causes it to stop the stepping process.
For aarch64, read DESR to check if the event is a hardware step and set
state to DBG_REASON_SINGLESTEP.
With this patch, GDB can now do source level stepping.

Change-Id: I1d06f819578c74b3ac17376c67f882adddea1f52
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: Enable resuming with address
David Ung [Thu, 23 Apr 2015 21:49:01 +0000 (14:49 -0700)]
aarch64: Enable resuming with address

Enable resuming to an address.

Change-Id: I29c7d3b56f6cbf8b3cd02c93733fc96f45000af3
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: Add instruction stepping support using hardware step
pierre Kuo [Thu, 23 Apr 2015 21:44:27 +0000 (14:44 -0700)]
aarch64: Add instruction stepping support using hardware step

Use AARCH64's hardware step event to do stepping.

Change-Id: I2d029ceeadd381913d0c3355c8787b11dacff7f7
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: Enable halting debug mode on breakpoint set
David Ung [Thu, 23 Apr 2015 20:22:13 +0000 (13:22 -0700)]
aarch64: Enable halting debug mode on breakpoint set

Ensure that we allow halting debug mode after setting breakpoint

Change-Id: I6f0d7a4a4775a93c133fb1ec31dfe3324d9f7395
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: Add hardware breakpoint support
pierre Kuo [Tue, 17 Mar 2015 19:44:04 +0000 (12:44 -0700)]
aarch64: Add hardware breakpoint support

Enable the use of hardware breakpoint on AARCH64.

Change-Id: I59caaa6d92ac60278af8938625b1790a1787372f
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoaarch64: Add ARMv8 AARCH64 support files
David Ung [Fri, 16 Jan 2015 01:22:20 +0000 (17:22 -0800)]
aarch64: Add ARMv8 AARCH64 support files

Add new AARCH64 target and ARMv8 support files.
This is an instantiation from the cortex_a files but modified to support
64bit ARMv8. Not all features are complete, notably breakpts and single
stepping are not yet implemented.
Currently it lets you halt of the processors, resume, dump cpu
registers,
read/write memory and getting a stack trace with gdb.

> halt
invalid mode value encountered 5
target state: halted
unrecognized psr mode: 0x5
target halted in ARM state due to debug-request, current mode:
UNRECOGNIZED
cpsr: 0x600001c5 pc: 0x00093528
MMU: disabled, D-Cache: disabled, I-Cache: disabled

> targets
    TargetName         Type       Endian TapName            State
--  ------------------ ---------- ------ ------------------ ------------
 0* cpu0               aarch64    little cpu.dap            halted

> reg
===== arm v8 registers
(0) r0 (/64): 0x00000000FFFFFFED (dirty)
(1) r1 (/64): 0x00000000F76E4000
(2) r2 (/64): 0x0000000000000000
(3) r3 (/64): 0x0000000000010000
(4) r4 (/64): 0xFFFFFFC06E2939E1
(5) r5 (/64): 0x0000000000000018
(6) r6 (/64): 0x003A699CFB3C8480
(7) r7 (/64): 0x0000000053555555
(8) r8 (/64): 0x00FFFFFFFFFFFFFF
(9) r9 (/64): 0x000000001FFEF992
(10) r10 (/64): 0x0000000000000001
(11) r11 (/64): 0x0000000000000000
(12) r12 (/64): 0x00000000000000F0
(13) r13 (/64): 0x00000000EFDFEAC8
(14) r14 (/64): 0x00000000F6DDA659
(15) r15 (/64): 0x0000000000000000
(16) r16 (/64): 0xFFFFFFC0000F9094
(17) r17 (/64): 0x0000000000000000
(18) r18 (/64): 0x0000000000000000
(19) r19 (/64): 0xFFFFFFC00087C000
(20) r20 (/64): 0x0000000000000002
(21) r21 (/64): 0xFFFFFFC000867C28
(22) r22 (/64): 0xFFFFFFC000916A52
(23) r23 (/64): 0xFFFFFFC00116D8B0
(24) r24 (/64): 0xFFFFFFC000774A0C
(25) r25 (/64): 0x000000008007B000
(26) r26 (/64): 0x000000008007D000
(27) r27 (/64): 0xFFFFFFC000080450
(28) r28 (/64): 0x0000004080000000
(29) r29 (/64): 0xFFFFFFC00087FF20
(30) r30 (/64): 0xFFFFFFC000085114
(31) sp (/64): 0xFFFFFFC00087FF20
(32) pc (/64): 0xFFFFFFC000093528
(33) xPSR (/64): 0x00000000600001C5

And from gdb

(gdb) bt
 #0  cpu_do_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/mm/proc.S:87
 #1  0xffffffc000085114 in arch_cpu_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/kernel/process.c:107
 #2  0x0000000000000000 in ?? ()

Change-Id: Iccb1d15c7d8ace7b9e811dac3c9757ced4d0f618
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoarm_dpm: Add 64bit register handling.
David Ung [Sat, 17 Jan 2015 02:04:06 +0000 (18:04 -0800)]
arm_dpm: Add 64bit register handling.

Add various function to read/write ARMv8 registers.

Change-Id: I16f2829bdd0e87b050a51e414ff675d5c21bcbae
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoarm_dpm: Add new state ARM_STATE_AARCH64
David Ung [Fri, 3 Apr 2015 23:55:59 +0000 (16:55 -0700)]
arm_dpm: Add new state ARM_STATE_AARCH64

Add new enum ARM_STATE_AARCH64 to the list of possible states.

Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoserver: Allow 64 address to be send over GBD server
David Ung [Sat, 17 Jan 2015 01:22:00 +0000 (17:22 -0800)]
server: Allow 64 address to be send over GBD server

Accept 64 bit addresses from GDB read memory packet.
Also allow breakpoint/stepping addresses to take 64bit values.

Change-Id: I9bf7b44affe24839cf30897c55ad17fdd29edf14
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agotarget: Add 64-bit target address support
Dongxue Zhang [Mon, 23 Sep 2013 08:27:03 +0000 (16:27 +0800)]
target: Add 64-bit target address support

Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.

In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.

Don't silently change gdb formatting here, leave that to later.

Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.

Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.

Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
7 years agoRestore normal development cycle
Paul Fertser [Sun, 22 Jan 2017 21:46:51 +0000 (00:46 +0300)]
Restore normal development cycle

Signed-off-by: Paul Fertser <fercerpav@gmail.com>
7 years agoThe openocd-0.10.0 release v0.10.0
Paul Fertser [Sun, 22 Jan 2017 20:31:28 +0000 (23:31 +0300)]
The openocd-0.10.0 release

Signed-off-by: Paul Fertser <fercerpav@gmail.com>
7 years agoNEWS: last pre-release changes
Paul Fertser [Sun, 22 Jan 2017 13:01:15 +0000 (16:01 +0300)]
NEWS: last pre-release changes

Change-Id: I93203717f9096880298c10efebf05d59f888f34b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3954
Tested-by: jenkins
7 years agoarm_dpm: avoid duplicating the register cache
Matthias Welwarsky [Thu, 19 Jan 2017 15:57:04 +0000 (16:57 +0100)]
arm_dpm: avoid duplicating the register cache

This bug was already attempted to fix in an earlier patch but
merging the "defer-examine" feature caused a regression, which this patch
tries to fix again.

Change-Id: Ie1ad1516f0d7f130d44e003d6c29dcc1a02a82ca
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3951
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoRestore -dev suffix
Paul Fertser [Sun, 15 Jan 2017 16:11:27 +0000 (19:11 +0300)]
Restore -dev suffix

Signed-off-by: Paul Fertser <fercerpav@gmail.com>
7 years agoThe openocd-0.10.0-rc2 release candidate v0.10.0-rc2
Paul Fertser [Sun, 15 Jan 2017 15:26:52 +0000 (18:26 +0300)]
The openocd-0.10.0-rc2 release candidate

Signed-off-by: Paul Fertser <fercerpav@gmail.com>
7 years agoNEWS: mention SWO capture facility of the new J-Link driver
Paul Fertser [Sun, 15 Jan 2017 11:22:50 +0000 (14:22 +0300)]
NEWS: mention SWO capture facility of the new J-Link driver

Change-Id: I4fc150584f3f0c5df5c39ae512125b42893331f0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3948
Tested-by: jenkins
7 years agojtag: core: report TRST and SRST as asserted only when they really are
Paul Fertser [Sat, 7 Jan 2017 18:51:32 +0000 (21:51 +0300)]
jtag: core: report TRST and SRST as asserted only when they really are

When SRST is never enabled, the global jtag_srst variable is left at its
initial state, that is, -1, and it does _not_ mean SRST is currently
asserted. Same about TRST.

Fixes "reset halt" in cases when srst_pulls_trst but srst usage is not
enabled.

Change-Id: I8d2e9120479de4cfbf5561033926c9ef945eecc9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
7 years agoflash/nor: fix doc/help and range test for flash protect
Tomas Vanek [Thu, 22 Dec 2016 20:47:20 +0000 (21:47 +0100)]
flash/nor: fix doc/help and range test for flash protect

Commit 77a1c01ccbb1150ffe749a7373cf6c4dc15ecad0 introduced infrastructure
for utilizing protection blocks of different size than erase sector.
Parts of doc/help kept reading 'sector' instead of 'protection block'.
flash_driver_protect() parameter range testing did not switched
to bank->num_prot_blocks.
This change fixes it.

Change-Id: Iec301761190a1a1bcc4cb005a519b9e5e4fede51
Reported-by: Mark Odell <mark@odell.ws>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3917
Tested-by: jenkins
Reviewed-by: Mark Odell <mrfirmware@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agotcl at91samdXX.cfg: partially revert change 3722
Tomas Vanek [Sat, 7 Jan 2017 16:04:30 +0000 (17:04 +0100)]
tcl at91samdXX.cfg: partially revert change 3722

Commit 25d7ba19c9e70cf5b912f660cf6aaa93d9ca120f introduced a problem
with 'reset halt' due to setting srst_pulls_trst:

Error: cortex_m.c:595 cortex_m_halt(): can't request a halt while
  in reset if nSRST pulls nTRST

Sorry, I don't know why I overlooked it when I tested #3722.

Change-Id: I41e9473dd91a86d93cf3e78b1fbbdfe1dd188d83
Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3942
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
7 years agoadi_v5_jtag: make sure SSTICKYERR is cleared after a POR
Matthias Welwarsky [Thu, 12 Jan 2017 16:06:12 +0000 (17:06 +0100)]
adi_v5_jtag: make sure SSTICKYERR is cleared after a POR

Don't terminate the transaction end-check early if debug power-loss
was detected, without clearing SSTICKYERR.

Change-Id: I83b6a4a20523eea42e48a15297f972a730aa21a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3947
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agodoc: Improve ftdi driver section
Andreas Fritiofson [Mon, 2 Jan 2017 23:18:34 +0000 (00:18 +0100)]
doc: Improve ftdi driver section

Fix typo and a sentence that sounds strange since the ft2232 driver
was removed.

Add documentation for the SWD signal usage.

Remove the text mentioning a default VID:PID which doesn't exist.

Change-Id: I27eba571f2f7c46bdb6ae623ab285595018e99d9
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3935
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agohelper,rtos,server: Restore missing warning flags
Andreas Fritiofson [Tue, 27 Dec 2016 00:47:23 +0000 (01:47 +0100)]
helper,rtos,server: Restore missing warning flags

These libraries override the used CFLAGS without adding the
defaults. This didn't have any effect until change
http://openocd.zylin.com/3870 (ef4c139). Restore by adding
AM_CLAGS to the per-target CFLAGS.

Interestingly, automake seems to clear the CFLAGS for the target
even if the override variable is only mentioned within a non-active
conditional branch, such as the IS_MINGW for the affected libraries.

Change-Id: I805206865e59e3fa33a7ea3c0d3472e51219351c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3927
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agojtag: drivers: build usb_blaster only if enabled
Paul Fertser [Sun, 25 Dec 2016 17:24:57 +0000 (20:24 +0300)]
jtag: drivers: build usb_blaster only if enabled

Fix build failure when libusb dev files are not available and
so usb_blaster is disabled.

Change-Id: I4cda7df689cdb4b62b733cbbab813241cf561e29
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3920
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
7 years agolibjaylink: Update to 0.1.0 release
Marc Schink [Thu, 29 Dec 2016 18:59:07 +0000 (19:59 +0100)]
libjaylink: Update to 0.1.0 release

Change-Id: I5a905ccda346c09187f7f8e8229ae71d3353128f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3946
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoRestore -dev suffix
Paul Fertser [Sun, 25 Dec 2016 15:12:22 +0000 (18:12 +0300)]
Restore -dev suffix

Signed-off-by: Paul Fertser <fercerpav@gmail.com>
7 years agoThe openocd-0.10.0-rc1 release candidate v0.10.0-rc1
Paul Fertser [Sun, 25 Dec 2016 14:17:07 +0000 (17:17 +0300)]
The openocd-0.10.0-rc1 release candidate

Signed-off-by: Paul Fertser <fercerpav@gmail.com>
7 years agoNEWS: prepare for new release
Paul Fertser [Fri, 4 Nov 2016 10:53:58 +0000 (13:53 +0300)]
NEWS: prepare for new release

Change-Id: I141ff17f6dcab7e164a19c91b975ddd455d26dbc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3854
Tested-by: jenkins
7 years agodoc: fix underfull and overfull boxes
Paul Fertser [Sun, 25 Dec 2016 11:15:23 +0000 (14:15 +0300)]
doc: fix underfull and overfull boxes

This is needed to generate PDF user manual without typesetting
artifacts.

Change-Id: Ibcbd804dac2b9415459327f53f6fad0dc38fa5c6
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3919
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
7 years agodoc: add a cross-reference to GDB threading commands
Paul Fertser [Wed, 20 Jul 2016 18:24:31 +0000 (21:24 +0300)]
doc: add a cross-reference to GDB threading commands

Change-Id: If4766ba0053fc94cd47495e442fcf288241af218
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3557
Tested-by: jenkins
7 years agotarget: armv7a: remove unused level_num field from armv7a_cachesize
Paul Fertser [Tue, 29 Nov 2016 18:14:15 +0000 (21:14 +0300)]
target: armv7a: remove unused level_num field from armv7a_cachesize

This was never used and produces warnings on some systems.

Change-Id: I48d2c5b79890bb2d70c5fae95278b8eb62743398
Reported-by: Tommy Murphy <tm1234@users.sf.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3891
Tested-by: jenkins
7 years agotcl: target: imx5{1,3}: remove bogus tapenable command
Paul Fertser [Wed, 30 Nov 2016 09:51:35 +0000 (12:51 +0300)]
tcl: target: imx5{1,3}: remove bogus tapenable command

This seems to be a leftover from borrowing from omap3* configs. Since
SJC is not enabling or disabling the DAP tap, and the tap is always
available, the extra tapenable command causes warnings on startup
(can't enable what's already enabled).

Change-Id: I7514436d565aa5b91876dbdab547956f36dcab77
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3892
Tested-by: jenkins
7 years agotarget: cortex_a: fix segfault when SPSR is not properly handled
Paul Fertser [Mon, 12 Dec 2016 08:50:17 +0000 (11:50 +0300)]
target: cortex_a: fix segfault when SPSR is not properly handled

OpenOCD doesn't (yet) know how to handle HYP mode properly so spsr
register is not getting initialised when OpenOCD connects to a target
stopped in this mode.

Reported on IRC by thinkfat and nearffxx.

Change-Id: I4bda9ba0c582c8e9cacefe708cc4a3d947151f84
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3906
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
7 years agoREADME: fix a typo
Paul Fertser [Sat, 10 Dec 2016 08:02:52 +0000 (11:02 +0300)]
README: fix a typo

Change-Id: I1ad1ba001f8fad0fffa9b6bd5b21dd58be4f6181
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3902
Tested-by: jenkins
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
7 years agoSearch for scripts relative to the executable on all(?) platforms
Andreas Fritiofson [Sat, 19 Nov 2016 20:43:22 +0000 (21:43 +0100)]
Search for scripts relative to the executable on all(?) platforms

Add a helper to hide the platform-dependent method to get a
canonical, absolute, /-separated path to the executable.

Use this and the relative path from BINDIR to PKGDATADIR to
construct a search path that finds the scripts even if the
installation dir is moved, as long as the structure below $prefix
is maintained.

This method should fully support all the tricks you can to with
autotools to customize the installed layout such as overriding the
default directories at configure-time and overriding the configured
directories at build-time.

The exe path detection methods are combined from
http://openocd.zylin.com/3388 by Rick Foos and
http://openocd.zylin.com/3537 by Steven Stallion, as well as tips
found all over internet.

Change-Id: Ifc9cc9dd0bf52fbd67b1b0f2383318cda0c422c4
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Steven Stallion <sstallion@gmail.com>
Reviewed-on: http://openocd.zylin.com/3889
Tested-by: jenkins
Reviewed-by: Rick Foos <rfoos@solengtech.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agojimtcl: update to 0.77, the current version, enable only specific modules
Paul Fertser [Tue, 16 Aug 2016 06:52:28 +0000 (09:52 +0300)]
jimtcl: update to 0.77, the current version, enable only specific modules

This is needed to fix build on aarch64 to get updated config.guess.

Because some newer JimTcl modules that get enabled are failing to
build on some of the platforms OpenOCD supports, enable only a
fixed set that shouldn't cause any issues.

We also disable running Jim Tcl tests on distcheck because they never
worked (before 85358e479e5bbf295a5aaf743f3c29a5e1a4fd1c Jim commit)
but didn't break Jenkins build; with newer version they're getting run
and fail due to limited permissions for filesystem and networking
operations.

Change-Id: I0b6c6a00bf2cf0902bbb01c9c0224fe93c74ac94
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3700
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
7 years agocontrib: udev: modify rules for users physically in front of machine (TAG+="uaccess")
Jiri Kastner [Fri, 5 Jun 2015 13:45:49 +0000 (15:45 +0200)]
contrib: udev: modify rules for users physically in front of machine (TAG+="uaccess")

Modern desktop systems with systemd recommend this way to give users
access to devices. We change permissions to sane value along the way.

See e.g. https://lists.debian.org/debian-devel-announce/2016/11/msg00008.html

We also change the filename to put it in order with 71-seat.rules, 60
is default for dh_installudev so pick that as a reasonable value.

Change-Id: I15f6fb1b6be853ac097d0ca91955609f9e5eb9cf
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/2804
Tested-by: jenkins
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
7 years agojtag: drivers: ulink: fix uninitialised variable warning
Paul Fertser [Tue, 13 Dec 2016 07:44:51 +0000 (10:44 +0300)]
jtag: drivers: ulink: fix uninitialised variable warning

This prevents clean build when --enable-verbose-jtag-io is used.

Change-Id: I5c9e6968cfa425b1f6f92f59156b6ae38cb9af18
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3907
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
7 years agoboard: add configuration for freescale twr-vf65gs10 system module
Matthias Welwarsky [Mon, 25 Jul 2016 12:43:35 +0000 (14:43 +0200)]
board: add configuration for freescale twr-vf65gs10 system module

This patch contains configuration for the twr-vf65gs10 system module
of the Freescale (NXP) tower system. It provides support for both the
CMSIS-DAP available via USB and the Cortex+ETM connector
on J5. The configuration also contains DDR and clock init code
hooked into the reset-init event handler.

Change-Id: I68303e0038e137dcadc57525e662428769fb69f2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3564
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agostm32l0.cfg: Add examine-end event like on other STM32 targets.
Uwe Bonnes [Mon, 14 Nov 2016 18:20:36 +0000 (19:20 +0100)]
stm32l0.cfg: Add examine-end event like on other STM32 targets.

Enable debug in standby/stop/sleep.
Stop watchdogs during halt.

Change-Id: I8383a191cd897118bd88bf78528d05943f3a368e
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3882
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: Fail on enabling sysfsgpio on non-linux OS
Andreas Fritiofson [Fri, 18 Nov 2016 20:49:44 +0000 (21:49 +0100)]
configure: Fail on enabling sysfsgpio on non-linux OS

Change-Id: I5036d8eca6a6e6ed47e3b9ff78bc3a3bf34491fb
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3888
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoDeprecate ZY1000, ioutils and oocd_trace
Andreas Fritiofson [Fri, 18 Nov 2016 20:21:10 +0000 (21:21 +0100)]
Deprecate ZY1000, ioutils and oocd_trace

These have not been maintained for a very long time so I say it's
time we remove them.

Change-Id: Ic091978d734be09347e271736df0f7f7f9095243
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3885
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: De-duplicate code in AC_CHECK_HEADERS
Andreas Fritiofson [Fri, 18 Nov 2016 19:56:18 +0000 (20:56 +0100)]
configure: De-duplicate code in AC_CHECK_HEADERS

Combine all checks that have the same required includes.

Change-Id: I9b4567766e037922c2ffb737f32e9c12af43bf0e
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3884
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoConvert to non-recursive make
Andreas Fritiofson [Sun, 6 Nov 2016 19:19:26 +0000 (20:19 +0100)]
Convert to non-recursive make

Change-Id: I11f8bc8553957e2ff083c09e72e16881e4d3bb6f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3865
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: Consolidate platform defines
Andreas Fritiofson [Sun, 6 Nov 2016 15:50:22 +0000 (16:50 +0100)]
configure: Consolidate platform defines

Change-Id: Iebc775baadeeb5e963fb48c0a9e8d87d26d9035a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3863
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: Don't set user variables
Andreas Fritiofson [Sun, 6 Nov 2016 14:49:35 +0000 (15:49 +0100)]
configure: Don't set user variables

CFLAGS is a user variable and shouldn't be set in either
configure.ac or Makefile.am because that makes it impossible to
override compiler flags at configure or make time.

AC_SUBST the default warning flags into AM_CFLAGS instead, which
is emitted before CFLAGS on the compiler command line.

Do the same thing with a mingw-specific flag as well.

Change-Id: I6ac3a3c8b7e0abf6f0e60ea239b549d68ea6d370
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3870
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: Add USE_* conditionals for hidapi and libjaylink
Andreas Fritiofson [Sun, 6 Nov 2016 11:48:52 +0000 (12:48 +0100)]
configure: Add USE_* conditionals for hidapi and libjaylink

For consistency with other libs.

Change-Id: Id37329a00db5ab668f4c2c9ce53d2c41976649b1
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3869
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: Use same case for libjaylink as for other libs
Andreas Fritiofson [Sun, 6 Nov 2016 11:48:02 +0000 (12:48 +0100)]
configure: Use same case for libjaylink as for other libs

Change-Id: I60d91a0543d9b8c580254cdc5f04b2e60209b98b
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3868
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agotarget: LS1_SAP: fix "declaration of 'read' shadows a global" warning
Paul Fertser [Sun, 13 Nov 2016 12:02:55 +0000 (15:02 +0300)]
target: LS1_SAP: fix "declaration of 'read' shadows a global" warning

Change-Id: I7070193819cc134f9fe1427c20a11160ec415ccb
Reported-by: Jens Bauer <jens-lists@gpio.dk>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3877
Tested-by: jenkins
7 years agotarget: Replace malloc+manual zeroing with calloc
Andreas Fritiofson [Sat, 13 Aug 2016 08:42:30 +0000 (10:42 +0200)]
target: Replace malloc+manual zeroing with calloc

Change-Id: I3c782c34b59cb36b8ca1d36e9c804c67bae5cb45
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3667
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: Replace shell constructs with M4sh macros
Andreas Fritiofson [Tue, 16 Feb 2016 22:26:58 +0000 (23:26 +0100)]
configure: Replace shell constructs with M4sh macros

AS_IF and AS_CASE should be used instead of if and case to properly
handle macros in conditional branches.

Also guard all tests against empty variables and embedded spaces which
makes it possible to remove some variable defaults.

Change-Id: Ib675177690d406a80ee98dd5d105296a7cdc7b8a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3669
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agojlink: Output libjaylink version
Marc Schink [Fri, 18 Nov 2016 16:27:16 +0000 (17:27 +0100)]
jlink: Output libjaylink version

Output the package version of libjaylink to ease debugging.

Change-Id: I3b9da6d046d140ba850056c98e67bed22c885ee0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3887
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agolibjaylink: Update to latest master branch
Marc Schink [Wed, 16 Nov 2016 13:21:52 +0000 (14:21 +0100)]
libjaylink: Update to latest master branch

The changes since the last update are mainly related to the build
system, preparations and cleanups for the upcoming release.

If there are no bugs reported, this will be the last update before the
libjaylink 0.1.0 release.

Change-Id: I4cec9bb61159f6153690aaf39c1d12ba0baacf9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3886
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agojlink: Add EMUCOM support
Marc Schink [Wed, 30 Sep 2015 16:58:19 +0000 (18:58 +0200)]
jlink: Add EMUCOM support

EMUCOM is a way to communicate with a J-Link device via so called
channels. A channel can either be read or written in a single
operation.

Beside the reserved channels for SEGGER, there are channels available to
implement vendor and/or device specific functionalities. For example,
EMUCOM is used on many starter and development kits from Silicon Labs to
access power measurements and various other information and settings.

Change-Id: I6094109c043b34aed4a40ceabe71f30ff896bf1d
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3794
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoflash/nor/efm32: Support flash size smaller than 32k
kevin [Mon, 17 Oct 2016 11:46:26 +0000 (12:46 +0100)]
flash/nor/efm32: Support flash size smaller than 32k

The current implementation fails on devices with less than 32k of
flash (such as several devices in the Zero Gecko family) because
the 'assert' assumes (incorrectly) that the number of flash banks
will always be >= 32.

This change ensures that at least one word of lock bits is always read
in order to support devices with less than 32k of flash.

Signed-off-by: Kevlar Harness <software@klystron.com>
Change-Id: I59febe2cb690c893a5057a5f72918e146cf2afe4
Reviewed-on: http://openocd.zylin.com/3806
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoxscale: Move debug handler to contrib/loaders
Andreas Fritiofson [Wed, 2 Nov 2016 21:34:42 +0000 (22:34 +0100)]
xscale: Move debug handler to contrib/loaders

Avoid special rules to generate array at compile time by shipping
the generated file. Convert to Makefile build like the other
loaders.

Change-Id: I5a05edddcfaff3d395086cd3aa33120f8a7aa9dc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3864
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agocortex_a: fix reset for SWD transport
Matthias Welwarsky [Thu, 10 Nov 2016 19:33:02 +0000 (20:33 +0100)]
cortex_a: fix reset for SWD transport

Change b0698501b0e789091e9f9f1427b32af304888769 fixed
reset for i.MX6 and TI Sitara SoCs but broke reset for
cortex-a targets that use SWD. This patch is a work-
around that forces asserting SRST when SWD is used.

Change-Id: I7e39f2a469b9b4b2b74ad48ba49f2eeb58528921
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3641
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoRemove build date from banner for releases
Andreas Fritiofson [Fri, 4 Nov 2016 20:44:19 +0000 (21:44 +0100)]
Remove build date from banner for releases

In support for reproducible builds, see
https://wiki.debian.org/ReproducibleBuilds

Fixes Debian bug #834316.

Change-Id: Id81ec72a87bf6dd99abfd2a0ae074658111bc9a3
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3866
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
7 years agoconfigure: Remove unused BUILD_BITQ and BUILD_BITBANG define
Andreas Fritiofson [Tue, 16 Feb 2016 22:19:28 +0000 (23:19 +0100)]
configure: Remove unused BUILD_BITQ and BUILD_BITBANG define

Change-Id: Ibfb5e414dd77d2ce4b835007722eb18da3820f3a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3668
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>