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2019-05-13	rtel	Added additional xMessageBufferSpacesAvailable() (plural...	commit \| commitdiff \| tree
2019-05-11	rtel	Update version number ready for next release.	commit \| commitdiff \| tree
2019-05-10	rtel	Removing obsolete code and files only.	commit \| commitdiff \| tree
2019-05-10	rtel	Add M7/M4 AMP demo.	commit \| commitdiff \| tree
2019-04-29	rtel	Basic 64-bit RISC-V port now functional. RISC-V port...	commit \| commitdiff \| tree
2019-04-25	rtel	Added portMEMORY_BARRIER() implemented as __asm volatile...	commit \| commitdiff \| tree
2019-04-21	rtel	Added portMEMORY_BARRIER() implemented as __asm volatile...	commit \| commitdiff \| tree
2019-04-17	rtel	Fix potential memory leak in the Win32 FreeRTOS+TCP...	commit \| commitdiff \| tree
2019-03-08	rtel	Correcting spelling mistakes in comments only.	commit \| commitdiff \| tree
2019-03-08	rtel	Prepare the RISC-V port layer for addition of 64-bit...	commit \| commitdiff \| tree
2019-02-21	rtel	Update version number in +TCP code.	commit \| commitdiff \| tree
2019-02-20	rtel	Add instructions on building the Cortex-M33 secure...	commit \| commitdiff \| tree
2019-02-19	rtel	Update the common demo death.c to use the updated macro...	commit \| commitdiff \| tree
2019-02-17	rtel	Update version number in readiness for V10.2.0 release.	commit \| commitdiff \| tree
2019-02-16	rtel	Replace the pdf RISC-V documentation with links to...	commit \| commitdiff \| tree
2019-02-16	rtel	Fix bug in core_cm3.c atomic macros.	commit \| commitdiff \| tree
2019-02-12	rtel	Add Dornerworks attribution to makefiles that build...	commit \| commitdiff \| tree
2019-02-11	rtel	Add makefiles that build the FreedomStudio project...	commit \| commitdiff \| tree
2019-02-08	rtel	Ensure eTaskGetState() is brought in automatically...	commit \| commitdiff \| tree
2019-01-21	rtel	Add xTaskGetIdleRunTimeCounter() API function to return...	commit \| commitdiff \| tree
2019-01-07	rtel	Update main.c() for the WIN32-MingW project so the...	commit \| commitdiff \| tree
2018-12-31	rtel	Update the pin mux setup on the Vega board demo to...	commit \| commitdiff \| tree
2018-12-31	rtel	Move the 'generic' version of freertos_risc_v_chip_specific_...	commit \| commitdiff \| tree
2018-12-30	rtel	Re-org of RISC-V file structure and naming step 2.	commit \| commitdiff \| tree
2018-12-30	rtel	Re-org of RISC-V file structure and naming step 1.	commit \| commitdiff \| tree
2018-12-30	rtel	Create folder to hold RISC-V chip specific extensions.	commit \| commitdiff \| tree
2018-12-30	rtel	Update RSIC-V port layer after testing saving and receiving...	commit \| commitdiff \| tree
2018-12-30	rtel	Move the RISC-V pxPortInitialiseStack() implementation...	commit \| commitdiff \| tree
2018-12-28	rtel	Correct accidental deletion in GenQTest.c.	commit \| commitdiff \| tree
2018-12-28	rtel	Allow the size of the stack used by many of the standard...	commit \| commitdiff \| tree
2018-12-27	rtel	Update the Freedom Studio RISC-V project so the gdbinit...	commit \| commitdiff \| tree
2018-12-27	rtel	Update Freedom Studio RISC-V demo for the latest GCC...	commit \| commitdiff \| tree
2018-12-24	rtel	Retarget Softconsole RISC-V demo from IGLOO2 to Renode...	commit \| commitdiff \| tree
2018-12-24	rtel	Rename directories in the RISC-V port.	commit \| commitdiff \| tree
2018-12-19	rtel	Backup Microsemi Renode project before adding a build...	commit \| commitdiff \| tree
2018-12-17	rtel	Add vTimerSetReloadMode() calls to the code coverage...	commit \| commitdiff \| tree
2018-12-17	rtel	Update the the MPU simulator project to exercise the...	commit \| commitdiff \| tree
2018-12-17	rtel	Remove "FromISR' functions from the list of functions...	commit \| commitdiff \| tree
2018-12-17	rtel	Update RISC-V_IGLOO2_Creative_SoftConsole demo to make...	commit \| commitdiff \| tree
2018-12-16	rtel	Rework RISC-V portASM.S to make it easier to add in...	commit \| commitdiff \| tree
2018-12-16	rtel	Save changes to the RISC-V port layer before making...	commit \| commitdiff \| tree
2018-12-10	rtel	Microsemi RISC-V project:	commit \| commitdiff \| tree
2018-12-10	rtel	Backup checkin of MiFive demo running in ReNode emulator.	commit \| commitdiff \| tree
2018-12-04	rtel	Backup check in of the Microsemi IGLOO2 Creative Board...	commit \| commitdiff \| tree
2018-12-04	rtel	Backup checking of the Freedom Studio RISC-V project...	commit \| commitdiff \| tree
2018-12-04	rtel	Update RISC-V port to use a separate interrupt stack.	commit \| commitdiff \| tree
2018-11-28	rtel	Some efficiency improvements in Risc-V port.	commit \| commitdiff \| tree
2018-11-24	rtel	First task running in RISC-V-Qemu-sifive_e-FreedomStudio...	commit \| commitdiff \| tree
2018-11-24	rtel	Add kernel code to the RISC-V-Qemu-sifive_e-FreedomStudio...	commit \| commitdiff \| tree
2018-11-24	rtel	Add a starting point for a Freedom Studio Risc V project.	commit \| commitdiff \| tree
2018-11-20	rtel	Provide each Risc V task with an initial mstatus register...	commit \| commitdiff \| tree
2018-11-19	rtel	Update Risc-V port to use environment call in place...	commit \| commitdiff \| tree
2018-11-06	rtel	Continue work on Risc V port.	commit \| commitdiff \| tree
2018-11-05	rtel	Update xTaskRemoveFromEventList() so when tickless...	commit \| commitdiff \| tree
2018-10-24	rtel	Update the method used to detect if a timer is active...	commit \| commitdiff \| tree
2018-10-08	rtel	Add xTaskGetApplicationTaskTagFromISR(), which is an...	commit \| commitdiff \| tree
2018-09-30	rtel	Added uxTaskGetStackHighWaterMark2(), which is the...	commit \| commitdiff \| tree
2018-09-27	rtel	RISC-V tasks now context switching to each other using...	commit \| commitdiff \| tree
2018-09-23	rtel	Add trap handler to RISC-V port so there is no dependency...	commit \| commitdiff \| tree
2018-09-12	rtel	RISC-V:	commit \| commitdiff \| tree
2018-09-10	rtel	RISC-V work in progress:	commit \| commitdiff \| tree
2018-09-07	rtel	Minor synching - no functional changes.	commit \| commitdiff \| tree
2018-09-07	rtel	Very minor formatting changes, and remove legacy link...	commit \| commitdiff \| tree
2018-09-07	rtel	Update version numbers ready for release.	commit \| commitdiff \| tree
2018-09-06	rtel	Update trace configuration files for the updated trace...	commit \| commitdiff \| tree
2018-09-06	rtel	Update trace recorder code to the latest.	commit \| commitdiff \| tree
2018-09-01	rtel	Two minor updates in the comments to fix html formatting...	commit \| commitdiff \| tree
2018-08-30	rtel	Fix mixed tabs and spaces in the latest TCP patches.	commit \| commitdiff \| tree
2018-08-29	rtel	Case unused return values for memset and memcpy to...	commit \| commitdiff \| tree
2018-08-28	rtel	Minor updates to fix issues with the Segger kernel...	commit \| commitdiff \| tree
2018-08-28	rtel	Fix build issues in the FreeRTOS_Plus_TCP_Minimal_Windows_Si...	commit \| commitdiff \| tree
2018-08-27	rtel	Changes required for the IAR StateViewer plug-in to...	commit \| commitdiff \| tree
2018-08-27	rtel	Move some variables from function scope back to being...	commit \| commitdiff \| tree
2018-08-23	rtel	FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it...	commit \| commitdiff \| tree
2018-08-22	rtel	Update copyright date ready for tagging V10.1.0.	commit \| commitdiff \| tree
2018-08-22	rtel	Fix some build issues in older kernel demo projects.	commit \| commitdiff \| tree
2018-08-21	rtel	Update version numbers in preparation for a new release.	commit \| commitdiff \| tree
2018-08-21	rtel	Update demo project for Tensilita - work in progres..	commit \| commitdiff \| tree
2018-08-20	rtel	Only include the static definition of freertos_tasks_c_addit...	commit \| commitdiff \| tree
2018-07-07	rtel	Update RISC-V project to used official port stubs in...	commit \| commitdiff \| tree
2018-07-07	rtel	Add stubs for official RISC-V RV32 port.	commit \| commitdiff \| tree
2018-07-02	rtel	Update trace recorder code.	commit \| commitdiff \| tree
2018-07-02	rtel	Update stream buffer tests to try resetting a statically...	commit \| commitdiff \| tree
2018-06-20	rtel	Fix issues whereby vStreamBufferReset() clobbered the...	commit \| commitdiff \| tree
2018-06-20	rtel	Add starting point for IGLOO2 RISV-V demo project.	commit \| commitdiff \| tree
2018-06-20	rtel	Small change to the directory name in which the RISC...	commit \| commitdiff \| tree
2018-06-20	rtel	Add RISCV port layer.	commit \| commitdiff \| tree
2018-06-15	rtel	Remove period from the URL that links to the web page...	commit \| commitdiff \| tree
2018-06-13	rtel	Sync with TCP version from AWS, including:	commit \| commitdiff \| tree
2018-06-13	rtel	Add the option to specify a stack size in the standard...	commit \| commitdiff \| tree
2018-06-11	rtel	Fix misra violations in queue.c by introducing a union...	commit \| commitdiff \| tree
2018-06-11	rtel	TimerHandle_t is now type safe instead of void *.	commit \| commitdiff \| tree
2018-06-11	rtel	Continue updating to MISRA 2012 from 2004 - currently...	commit \| commitdiff \| tree
2018-06-04	rtel	Remove casts from EventGroupHandle_t to EventGroup_t...	commit \| commitdiff \| tree
2018-06-03	rtel	First pass at updating from MISRA 2004 to MISRA 2012:	commit \| commitdiff \| tree
2018-05-17	rtel	Minor updates to comments only.	commit \| commitdiff \| tree
2018-05-07	rtel	Update definition of StaticTimer_t so its size is correct...	commit \| commitdiff \| tree
2018-05-04	rtel	Previously the MPSoC Cortex-A53 demo was updated to...	commit \| commitdiff \| tree
2018-05-02	rtel	Update Zynq, MPSoc Cortex-A53 and MPSoc Cortex-R5 demo...	commit \| commitdiff \| tree
2018-04-29	rtel	xTaskGenericNotify() now sets xYieldPending to pdTRUE...	commit \| commitdiff \| tree
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