]> git.sur5r.net Git - freertos/commitdiff
Add "is inside interrupt" function to MPU ports.
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 7 Feb 2020 01:56:25 +0000 (01:56 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 7 Feb 2020 01:56:25 +0000 (01:56 +0000)
Make clock setup functions weak symbols in ARMv8-M ports.
Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2819 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

52 files changed:
FreeRTOS/Source/portable/ARMv8M/non_secure/port.c
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
FreeRTOS/Source/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h
FreeRTOS/Source/portable/ARMv8M/non_secure/portasm.h
FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c
FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c
FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h
FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h
FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c
FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h
FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h
FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c
FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c
FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h
FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h
FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h
FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h
FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c
FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h
FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s
FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h
FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h
FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s
FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h
FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c
FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h
FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s
FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h
FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h
FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s
FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h
FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s
Upgrading to FreeRTOS V10.3.0.url [new file with mode: 0644]

index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index e57ce9db1c9395c03dc6074632d36e8d7366bac3..f94dcd3476a905da5a359e2fb9d13708e22c7afa 100644 (file)
@@ -201,7 +201,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
@@ -213,7 +213,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
index bebd9f6b0ab6faa5df16530609d6ac92de4338d7..a7357013763b4ad29e34d42b2a1ac9f5d5e7db08 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index 95ad2f2fc4f978a376c24337d20a426ef1d4a219..8dee923e3a757d87e23dc1d403bf06cc73987336 100644 (file)
@@ -196,7 +196,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
@@ -208,7 +208,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
index bebd9f6b0ab6faa5df16530609d6ac92de4338d7..a7357013763b4ad29e34d42b2a1ac9f5d5e7db08 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index dfec22deef178cee401d152054f4c427596ee9c0..2aadacc799b839366e36c713ad047ed894093d81 100644 (file)
@@ -176,24 +176,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       mrs r0, PRIMASK                                                                 \n"\r
-       "       cpsid i                                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
-       ::: "memory"\r
+       "       mrs r0, basepri                                                                 \n" /* r0 = basepri. Return original basepri value. */\r
+       "       mov r1, %0                                                                              \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       msr basepri, r1                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
+       :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       msr PRIMASK, r0                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
+       "       msr basepri, r0                                                                 \n" /* basepri = ulMask. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
        ::: "memory"\r
        );\r
 }\r
@@ -266,9 +271,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        #endif /* configENABLE_MPU */\r
        "                                                                                                       \n"\r
        " select_next_task:                                                                     \n"\r
-       "       cpsid i                                                                                 \n"\r
+       "       mov r0, %0                                                                              \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
+       "       msr basepri, r0                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
        "       bl vTaskSwitchContext                                                   \n"\r
-       "       cpsie i                                                                                 \n"\r
+       "       mov r0, #0                                                                              \n" /* r0 = 0. */\r
+       "       msr basepri, r0                                                                 \n" /* Enable interrupts. */\r
        "                                                                                                       \n"\r
        "       ldr r2, pxCurrentTCBConst                                               \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
        "       ldr r3, [r2]                                                                    \n" /* Read pxCurrentTCB. */\r
@@ -352,6 +361,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        "xRNRConst: .word 0xe000ed98                                            \n"\r
        "xRBARConst: .word 0xe000ed9c                                           \n"\r
        #endif /* configENABLE_MPU */\r
+       :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
index 90d9bc27473d6501f4fa0ad1133f73d523cb51fb..5ac934cd80d88d107619796d4e75665eec56b36b 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )                         vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index b6f1bbcef95a21a9c508bc764e7121ddb5d1e7a0..dc5179fb3502a7eb7eef59a003668aa79f09ae60 100644 (file)
@@ -171,24 +171,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       mrs r0, PRIMASK                                                                 \n"\r
-       "       cpsid i                                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
-       ::: "memory"\r
+       "       mrs r0, basepri                                                                 \n" /* r0 = basepri. Return original basepri value. */\r
+       "       mov r1, %0                                                                              \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       msr basepri, r1                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
+       :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       msr PRIMASK, r0                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
+       "       msr basepri, r0                                                                 \n" /* basepri = ulMask. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
        ::: "memory"\r
        );\r
 }\r
@@ -221,9 +226,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        "       ldr r1, [r2]                                                                    \n" /* Read pxCurrentTCB. */\r
        "       str r0, [r1]                                                                    \n" /* Save the new top of stack in TCB. */\r
        "                                                                                                       \n"\r
-       "       cpsid i                                                                                 \n"\r
+       "       mov r0, %0                                                                              \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
+       "       msr basepri, r0                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
        "       bl vTaskSwitchContext                                                   \n"\r
-       "       cpsie i                                                                                 \n"\r
+       "       mov r0, #0                                                                              \n" /* r0 = 0. */\r
+       "       msr basepri, r0                                                                 \n" /* Enable interrupts. */\r
        "                                                                                                       \n"\r
        "       ldr r2, pxCurrentTCBConst                                               \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
        "       ldr r1, [r2]                                                                    \n" /* Read pxCurrentTCB. */\r
@@ -284,6 +293,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        "xRNRConst: .word 0xe000ed98                                            \n"\r
        "xRBARConst: .word 0xe000ed9c                                           \n"\r
        #endif /* configENABLE_MPU */\r
+       :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
index 90d9bc27473d6501f4fa0ad1133f73d523cb51fb..c582ecfb361b7f75b92acb37b2e6121796e88aff 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index 36872fabf8bc512e028dc81993dd037f6eba66fa..8ac94fd33157327f1d119723362ab76cedc0dfef 100644 (file)
@@ -38,8 +38,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
        PUBLIC vPortFreeSecureContext\r
@@ -181,13 +181,13 @@ vStartFirstTask:
        svc 2                                                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
+ulSetInterruptMask:\r
        mrs r0, PRIMASK\r
        cpsid i\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
+vClearInterruptMask:\r
        msr PRIMASK, r0\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
index 38a5c7255474bca075d19f4000708e3633e9e4ce..14cb37f863b108bb047e21cb9a0c2fe60971fc67 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index b84c35685eba017d15b9f1c15beb1e1a00ac9895..d6a8cb844981a2905f617a943a697d01fd78243c 100644 (file)
@@ -34,8 +34,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
 \r
@@ -169,13 +169,13 @@ vStartFirstTask:
        nop\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
+ulSetInterruptMask:\r
        mrs r0, PRIMASK\r
        cpsid i\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
+vClearInterruptMask:\r
        msr PRIMASK, r0\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
index 38a5c7255474bca075d19f4000708e3633e9e4ce..14cb37f863b108bb047e21cb9a0c2fe60971fc67 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index 8d9bcc9cf86dd95b92dd7aec37559faf0b7bfe15..e3b590be98207b3bd000f7cd624dff81d33afb64 100644 (file)
  *\r
  * 1 tab == 4 spaces!\r
  */\r
+/* Including FreeRTOSConfig.h here will cause build errors if the header file\r
+contains code not understood by the assembler - for example the 'extern' keyword.\r
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so\r
+the code is included in C files but excluded by the preprocessor in assembly\r
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */\r
+#include "FreeRTOSConfig.h"\r
 \r
        EXTERN pxCurrentTCB\r
        EXTERN xSecureContext\r
@@ -38,8 +44,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
        PUBLIC vPortFreeSecureContext\r
@@ -156,15 +162,20 @@ vStartFirstTask:
        svc 2                                                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
-       mrs r0, PRIMASK\r
-       cpsid i\r
-       bx lr\r
+ulSetInterruptMask:\r
+       mrs r0, basepri                                                 /* r0 = basepri. Return original basepri value. */\r
+       mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+       msr basepri, r1                                                 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
-       msr PRIMASK, r0\r
-       bx lr\r
+vClearInterruptMask:\r
+       msr basepri, r0                                                 /* basepri = ulMask. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
 PendSV_Handler:\r
@@ -227,9 +238,13 @@ PendSV_Handler:
        #endif /* configENABLE_MPU */\r
 \r
        select_next_task:\r
-               cpsid i\r
+               mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+               msr basepri, r0                                         /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+               dsb\r
+               isb\r
                bl vTaskSwitchContext\r
-               cpsie i\r
+               mov r0, #0                                                      /* r0 = 0. */\r
+               msr basepri, r0                                         /* Enable interrupts. */\r
 \r
                ldr r2, =pxCurrentTCB                           /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
                ldr r3, [r2]                                            /* Read pxCurrentTCB. */\r
index 9ccdfc2a7c3f669bacfad760fcfdbaf87b236a53..c5fb74b6dd032ee12b8ebb3d041af33d52600ab3 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index 31623f2f202f32b0847ad49474221613818e9ecd..aa65b946f5601a793c159a0643f1332bb27d683a 100644 (file)
  *\r
  * 1 tab == 4 spaces!\r
  */\r
+/* Including FreeRTOSConfig.h here will cause build errors if the header file\r
+contains code not understood by the assembler - for example the 'extern' keyword.\r
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so\r
+the code is included in C files but excluded by the preprocessor in assembly\r
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */\r
+#include "FreeRTOSConfig.h"\r
 \r
        EXTERN pxCurrentTCB\r
        EXTERN vTaskSwitchContext\r
@@ -34,8 +40,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
 /*-----------------------------------------------------------*/\r
@@ -142,15 +148,20 @@ vStartFirstTask:
        svc 2                                                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
-       mrs r0, PRIMASK\r
-       cpsid i\r
-       bx lr\r
+ulSetInterruptMask:\r
+       mrs r0, basepri                                                 /* r0 = basepri. Return original basepri value. */\r
+       mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+       msr basepri, r1                                                 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
-       msr PRIMASK, r0\r
-       bx lr\r
+vClearInterruptMask:\r
+       msr basepri, r0                                                 /* basepri = ulMask. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
 PendSV_Handler:\r
@@ -175,9 +186,13 @@ PendSV_Handler:
        ldr r1, [r2]                                                    /* Read pxCurrentTCB. */\r
        str r0, [r1]                                                    /* Save the new top of stack in TCB. */\r
 \r
-       cpsid i\r
+       mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+       msr basepri, r0                                                 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       dsb\r
+       isb\r
        bl vTaskSwitchContext\r
-       cpsie i\r
+       mov r0, #0                                                              /* r0 = 0. */\r
+       msr basepri, r0                                                 /* Enable interrupts. */\r
 \r
        ldr r2, =pxCurrentTCB                                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
        ldr r1, [r2]                                                    /* Read pxCurrentTCB. */\r
index 9ccdfc2a7c3f669bacfad760fcfdbaf87b236a53..c5fb74b6dd032ee12b8ebb3d041af33d52600ab3 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index e57ce9db1c9395c03dc6074632d36e8d7366bac3..f94dcd3476a905da5a359e2fb9d13708e22c7afa 100644 (file)
@@ -201,7 +201,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
@@ -213,7 +213,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index bebd9f6b0ab6faa5df16530609d6ac92de4338d7..a7357013763b4ad29e34d42b2a1ac9f5d5e7db08 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index 95ad2f2fc4f978a376c24337d20a426ef1d4a219..8dee923e3a757d87e23dc1d403bf06cc73987336 100644 (file)
@@ -196,7 +196,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
@@ -208,7 +208,7 @@ uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGE
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index bebd9f6b0ab6faa5df16530609d6ac92de4338d7..a7357013763b4ad29e34d42b2a1ac9f5d5e7db08 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index dfec22deef178cee401d152054f4c427596ee9c0..2aadacc799b839366e36c713ad047ed894093d81 100644 (file)
@@ -176,24 +176,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       mrs r0, PRIMASK                                                                 \n"\r
-       "       cpsid i                                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
-       ::: "memory"\r
+       "       mrs r0, basepri                                                                 \n" /* r0 = basepri. Return original basepri value. */\r
+       "       mov r1, %0                                                                              \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       msr basepri, r1                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
+       :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       msr PRIMASK, r0                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
+       "       msr basepri, r0                                                                 \n" /* basepri = ulMask. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
        ::: "memory"\r
        );\r
 }\r
@@ -266,9 +271,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        #endif /* configENABLE_MPU */\r
        "                                                                                                       \n"\r
        " select_next_task:                                                                     \n"\r
-       "       cpsid i                                                                                 \n"\r
+       "       mov r0, %0                                                                              \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
+       "       msr basepri, r0                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
        "       bl vTaskSwitchContext                                                   \n"\r
-       "       cpsie i                                                                                 \n"\r
+       "       mov r0, #0                                                                              \n" /* r0 = 0. */\r
+       "       msr basepri, r0                                                                 \n" /* Enable interrupts. */\r
        "                                                                                                       \n"\r
        "       ldr r2, pxCurrentTCBConst                                               \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
        "       ldr r3, [r2]                                                                    \n" /* Read pxCurrentTCB. */\r
@@ -352,6 +361,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        "xRNRConst: .word 0xe000ed98                                            \n"\r
        "xRBARConst: .word 0xe000ed9c                                           \n"\r
        #endif /* configENABLE_MPU */\r
+       :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index 90d9bc27473d6501f4fa0ad1133f73d523cb51fb..5ac934cd80d88d107619796d4e75665eec56b36b 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )                         vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index b6f1bbcef95a21a9c508bc764e7121ddb5d1e7a0..dc5179fb3502a7eb7eef59a003668aa79f09ae60 100644 (file)
@@ -171,24 +171,29 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       mrs r0, PRIMASK                                                                 \n"\r
-       "       cpsid i                                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
-       ::: "memory"\r
+       "       mrs r0, basepri                                                                 \n" /* r0 = basepri. Return original basepri value. */\r
+       "       mov r1, %0                                                                              \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       msr basepri, r1                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
+       :: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vClearInterruptMaskFromISR( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */\r
 {\r
        __asm volatile\r
        (\r
-       "       msr PRIMASK, r0                                                                 \n"\r
-       "       bx lr                                                                                   \n"\r
+       "       msr basepri, r0                                                                 \n" /* basepri = ulMask. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
+       "       bx lr                                                                                   \n" /* Return. */\r
        ::: "memory"\r
        );\r
 }\r
@@ -221,9 +226,13 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        "       ldr r1, [r2]                                                                    \n" /* Read pxCurrentTCB. */\r
        "       str r0, [r1]                                                                    \n" /* Save the new top of stack in TCB. */\r
        "                                                                                                       \n"\r
-       "       cpsid i                                                                                 \n"\r
+       "       mov r0, %0                                                                              \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
+       "       msr basepri, r0                                                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       "       dsb                                                                                             \n"\r
+       "       isb                                                                                             \n"\r
        "       bl vTaskSwitchContext                                                   \n"\r
-       "       cpsie i                                                                                 \n"\r
+       "       mov r0, #0                                                                              \n" /* r0 = 0. */\r
+       "       msr basepri, r0                                                                 \n" /* Enable interrupts. */\r
        "                                                                                                       \n"\r
        "       ldr r2, pxCurrentTCBConst                                               \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
        "       ldr r1, [r2]                                                                    \n" /* Read pxCurrentTCB. */\r
@@ -284,6 +293,7 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
        "xRNRConst: .word 0xe000ed98                                            \n"\r
        "xRBARConst: .word 0xe000ed9c                                           \n"\r
        #endif /* configENABLE_MPU */\r
+       :: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
        );\r
 }\r
 /*-----------------------------------------------------------*/\r
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index 90d9bc27473d6501f4fa0ad1133f73d523cb51fb..c582ecfb361b7f75b92acb37b2e6121796e88aff 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index 36872fabf8bc512e028dc81993dd037f6eba66fa..8ac94fd33157327f1d119723362ab76cedc0dfef 100644 (file)
@@ -38,8 +38,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
        PUBLIC vPortFreeSecureContext\r
@@ -181,13 +181,13 @@ vStartFirstTask:
        svc 2                                                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
+ulSetInterruptMask:\r
        mrs r0, PRIMASK\r
        cpsid i\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
+vClearInterruptMask:\r
        msr PRIMASK, r0\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
index 38a5c7255474bca075d19f4000708e3633e9e4ce..14cb37f863b108bb047e21cb9a0c2fe60971fc67 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index b84c35685eba017d15b9f1c15beb1e1a00ac9895..d6a8cb844981a2905f617a943a697d01fd78243c 100644 (file)
@@ -34,8 +34,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
 \r
@@ -169,13 +169,13 @@ vStartFirstTask:
        nop\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
+ulSetInterruptMask:\r
        mrs r0, PRIMASK\r
        cpsid i\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
+vClearInterruptMask:\r
        msr PRIMASK, r0\r
        bx lr\r
 /*-----------------------------------------------------------*/\r
index 38a5c7255474bca075d19f4000708e3633e9e4ce..14cb37f863b108bb047e21cb9a0c2fe60971fc67 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,8 +219,8 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
 #define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
 #define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index 8d9bcc9cf86dd95b92dd7aec37559faf0b7bfe15..a134120f05122ecfc9c2ad6be779fd3fb0014efb 100644 (file)
  * 1 tab == 4 spaces!\r
  */\r
 \r
+/* Including FreeRTOSConfig.h here will cause build errors if the header file\r
+contains code not understood by the assembler - for example the 'extern' keyword.\r
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so\r
+the code is included in C files but excluded by the preprocessor in assembly\r
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */\r
+#include "FreeRTOSConfig.h"\r
+\r
        EXTERN pxCurrentTCB\r
        EXTERN xSecureContext\r
        EXTERN vTaskSwitchContext\r
@@ -38,8 +45,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
        PUBLIC vPortFreeSecureContext\r
@@ -156,15 +163,20 @@ vStartFirstTask:
        svc 2                                                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
-       mrs r0, PRIMASK\r
-       cpsid i\r
-       bx lr\r
+ulSetInterruptMask:\r
+       mrs r0, basepri                                                 /* r0 = basepri. Return original basepri value. */\r
+       mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+       msr basepri, r1                                                 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
-       msr PRIMASK, r0\r
-       bx lr\r
+vClearInterruptMask:\r
+       msr basepri, r0                                                 /* basepri = ulMask. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
 PendSV_Handler:\r
@@ -227,9 +239,13 @@ PendSV_Handler:
        #endif /* configENABLE_MPU */\r
 \r
        select_next_task:\r
-               cpsid i\r
+               mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+               msr basepri, r0                                         /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+               dsb\r
+               isb\r
                bl vTaskSwitchContext\r
-               cpsie i\r
+               mov r0, #0                                                      /* r0 = 0. */\r
+               msr basepri, r0                                         /* Enable interrupts. */\r
 \r
                ldr r2, =pxCurrentTCB                           /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
                ldr r3, [r2]                                            /* Read pxCurrentTCB. */\r
index 9ccdfc2a7c3f669bacfad760fcfdbaf87b236a53..c5fb74b6dd032ee12b8ebb3d041af33d52600ab3 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index b0394fb43de7c013d8a456119c87db5021a8cba1..6ffab561ff8ea320abbb1c3839b38e2cc4e649e7 100644 (file)
 #define portNO_SECURE_CONTEXT                          0\r
 /*-----------------------------------------------------------*/\r
 \r
-/**\r
- * @brief Setup the timer to generate the tick interrupts.\r
- */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
-\r
 /**\r
  * @brief Used to catch tasks that attempt to return from their implementing\r
  * function.\r
@@ -282,6 +277,22 @@ static void prvTaskExitError( void );
        static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;\r
 #endif /* configENABLE_FPU */\r
 \r
+/**\r
+ * @brief Setup the timer to generate the tick interrupts.\r
+ *\r
+ * The implementation in this file is weak to allow application writers to\r
+ * change the timer used to generate the tick interrupt.\r
+ */\r
+void vPortSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+\r
+/**\r
+ * @brief Checks whether the current execution context is interrupt.\r
+ *\r
+ * @return pdTRUE if the current execution context is interrupt, pdFALSE\r
+ * otherwise.\r
+ */\r
+BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 /**\r
  * @brief Yield the processor.\r
  */\r
@@ -323,7 +334,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
 #endif /* configENABLE_TRUSTZONE */\r
 /*-----------------------------------------------------------*/\r
 \r
-static void prvSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */\r
 {\r
        /* Stop and reset the SysTick. */\r
        *( portNVIC_SYSTICK_CTRL ) = 0UL;\r
@@ -773,7 +784,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
 \r
        /* Start the timer that generates the tick ISR. Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vPortSetupTimerInterrupt();\r
 \r
        /* Initialize the critical nesting count ready for the first task. */\r
        ulCriticalNesting = 0;\r
@@ -897,3 +908,26 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
        }\r
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+       /* Obtain the number of the currently executing interrupt. Interrupt Program\r
+        * Status Register (IPSR) holds the exception number of the currently-executing\r
+        * exception or zero for Thread mode.*/\r
+       __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+       if( ulCurrentInterrupt == 0 )\r
+       {\r
+               xReturn = pdFALSE;\r
+       }\r
+       else\r
+       {\r
+               xReturn = pdTRUE;\r
+       }\r
+\r
+       return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/
\ No newline at end of file
index 6314e96585d61184a8e929839309777e2ef38957..8fc58eab26ecfb050291512edfe90e3f27a98511 100644 (file)
@@ -78,12 +78,12 @@ void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
 /**\r
  * @brief Disables interrupts.\r
  */\r
-uint32_t ulSetInterruptMaskFromISR( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief Enables interrupts.\r
  */\r
-void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
+void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 \r
 /**\r
  * @brief PendSV Exception handler.\r
index 31623f2f202f32b0847ad49474221613818e9ecd..e7c888e7c01ac00d42fbd22f5c483fbb1c3e34c4 100644 (file)
  * 1 tab == 4 spaces!\r
  */\r
 \r
+/* Including FreeRTOSConfig.h here will cause build errors if the header file\r
+contains code not understood by the assembler - for example the 'extern' keyword.\r
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so\r
+the code is included in C files but excluded by the preprocessor in assembly\r
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */\r
+#include "FreeRTOSConfig.h"\r
+\r
        EXTERN pxCurrentTCB\r
        EXTERN vTaskSwitchContext\r
        EXTERN vPortSVCHandler_C\r
@@ -34,8 +41,8 @@
        PUBLIC vRestoreContextOfFirstTask\r
        PUBLIC vRaisePrivilege\r
        PUBLIC vStartFirstTask\r
-       PUBLIC ulSetInterruptMaskFromISR\r
-       PUBLIC vClearInterruptMaskFromISR\r
+       PUBLIC ulSetInterruptMask\r
+       PUBLIC vClearInterruptMask\r
        PUBLIC PendSV_Handler\r
        PUBLIC SVC_Handler\r
 /*-----------------------------------------------------------*/\r
@@ -142,15 +149,20 @@ vStartFirstTask:
        svc 2                                                                   /* System call to start the first task. portSVC_START_SCHEDULER = 2. */\r
 /*-----------------------------------------------------------*/\r
 \r
-ulSetInterruptMaskFromISR:\r
-       mrs r0, PRIMASK\r
-       cpsid i\r
-       bx lr\r
+ulSetInterruptMask:\r
+       mrs r0, basepri                                                 /* r0 = basepri. Return original basepri value. */\r
+       mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+       msr basepri, r1                                                 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
-vClearInterruptMaskFromISR:\r
-       msr PRIMASK, r0\r
-       bx lr\r
+vClearInterruptMask:\r
+       msr basepri, r0                                                 /* basepri = ulMask. */\r
+       dsb\r
+       isb\r
+       bx lr                                                                   /* Return. */\r
 /*-----------------------------------------------------------*/\r
 \r
 PendSV_Handler:\r
@@ -175,9 +187,13 @@ PendSV_Handler:
        ldr r1, [r2]                                                    /* Read pxCurrentTCB. */\r
        str r0, [r1]                                                    /* Save the new top of stack in TCB. */\r
 \r
-       cpsid i\r
+       mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+       msr basepri, r0                                                 /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
+       dsb\r
+       isb\r
        bl vTaskSwitchContext\r
-       cpsie i\r
+       mov r0, #0                                                              /* r0 = 0. */\r
+       msr basepri, r0                                                 /* Enable interrupts. */\r
 \r
        ldr r2, =pxCurrentTCB                                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */\r
        ldr r1, [r2]                                                    /* Read pxCurrentTCB. */\r
index 9ccdfc2a7c3f669bacfad760fcfdbaf87b236a53..c5fb74b6dd032ee12b8ebb3d041af33d52600ab3 100644 (file)
@@ -103,13 +103,15 @@ typedef unsigned long                                                                             UBaseType_t;
 /**\r
  * @brief Extern declarations.\r
  */\r
+extern BaseType_t xPortIsInsideInterrupt( void );\r
+\r
 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;\r
 \r
-extern uint32_t ulSetInterruptMaskFromISR( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
-extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
+extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;\r
 \r
 #if( configENABLE_TRUSTZONE == 1 )\r
        extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */\r
@@ -217,10 +219,10 @@ typedef struct MPU_SETTINGS
 /**\r
  * @brief Critical section management.\r
  */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMaskFromISR()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMaskFromISR( x )\r
-#define portDISABLE_INTERRUPTS()                                                       __asm volatile ( " cpsid i " ::: "memory" )\r
-#define portENABLE_INTERRUPTS()                                                                __asm volatile ( " cpsie i " ::: "memory" )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()                                      ulSetInterruptMask()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)                           vClearInterruptMask( x )\r
+#define portDISABLE_INTERRUPTS()                                                       ulSetInterruptMask()\r
+#define portENABLE_INTERRUPTS()                                                                vClearInterruptMask( 0 )\r
 #define portENTER_CRITICAL()                                                           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                                                    vPortExitCritical()\r
 /*-----------------------------------------------------------*/\r
index 1c0db8da7a9def4ad751497e13a9e78b70a959a6..d223de62b9df2d21b46260bc3edd6e31b9a0191c 100644 (file)
  *\r
  * 1 tab == 4 spaces!\r
  */\r
-\r
+/* Including FreeRTOSConfig.h here will cause build errors if the header file\r
+contains code not understood by the assembler - for example the 'extern' keyword.\r
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so\r
+the code is included in C files but excluded by the preprocessor in assembly\r
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */\r
 #include <FreeRTOSConfig.h>\r
 \r
        RSEG    CODE:CODE(2)\r
diff --git a/Upgrading to FreeRTOS V10.3.0.url b/Upgrading to FreeRTOS V10.3.0.url
new file mode 100644 (file)
index 0000000..a30f018
--- /dev/null
@@ -0,0 +1,5 @@
+[{000214A0-0000-0000-C000-000000000046}]\r
+Prop3=19,11\r
+[InternetShortcut]\r
+IDList=\r
+URL=https://www.freertos.org/FreeRTOS-V10.3.x.html\r