rtel [Wed, 24 Jun 2015 15:10:03 +0000 (15:10 +0000)]
Microblaze: Add a port optimised task selection implementation to the Microblaze port.
Windows port: Add code to ensure Windows threads are truely suspended before resuming another thread.
Typo correction to the task notification standard demo task.
Correct case of some include file names to fix build issues on Linux.
rtel [Wed, 20 May 2015 15:46:40 +0000 (15:46 +0000)]
Kernel changes to improve power saving:
+ The timer task now blocks indefinitely if there are no timers active, allowing eTaskConfirmSleepModeStatus to return eNoTasksWaitingTimeout when configUSE_TIMERS is set to 1.
+ The next unblock time is calculated automatically after a task unblocks when waiting for a notification, allowing deep sleep to be entered earlier.
Change some data types in heap_4.c to allow it to be used on hardware that has 16-bit pointers without generating compiler warnings.
Add a small data model configuration to the MSP43FR5969 IAR demo.
Correct some code comments in the SAMA5D4 demo.
Rename /Demo/MSP430FR5969_LaunchPad to /Demo/MSP430X_MSP430FR5969_LaunchPad for consistency with other MSP430 demo directory names.
Fixed typos in comments repeated in multiple source files.
Update TimerDemo.c to test the new vTimerSetTimerID() function.
Update WinPCap NetworkInterface.c for FreeRTOS+UDP to correctly store a pointer to the network buffer structure at the beginning of the network buffer.
Add the errno definitions used by FreeRTOS+TCP and FreeRTOS+FAT into FreeRTOS's projdefs.h.
Remove redundant global definition vPortInstallFreeRTOSVectorTable from the GCC ARM_CA9 portASM.S file.
Ensure correct sequence of start up sequence when the Windows port is used on multi-core Windows machines by starting one thread in the suspended state.
Move initialisation of xNextTaskUnblockTime to the function that starts the scheduler, rather than from where the variable is declared - this fixes a compiler warning in newer IAR compilers.
Fix "elif (SELECTED_PORT == PORT_MICROCHIP_PIC32MX || PORT_MICROCHIP_PIC32MZ)" in the FreeRTOS+Trace trcHardwarePort.h header file.
rtel [Tue, 24 Mar 2015 15:24:49 +0000 (15:24 +0000)]
Final V8.2.1 release ready for tagging:
+ Added MSP432 (ARM Cortex-M4F MSP430!) demos for IAR, Keil and CCS.
+ Renamed directory containing demo for STM32F7 ARM Cortex-M7.
+ Renamed directory containing demo for SAMV71 ARM Cortex-M7.
+ Introduced xTaskNotifyAndQuery().
rtel [Sat, 21 Mar 2015 14:01:43 +0000 (14:01 +0000)]
Kernel changes:
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0.
New ports:
Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices.
Added Cortex-M4F port layer for CCS.
New demo applications:
Added demo application for STM32F7.
Added demo application for SAMv71.
rtel [Wed, 4 Mar 2015 17:45:18 +0000 (17:45 +0000)]
Kernel code:
+ Added mtCOVERAGE_TEST_DELAY() macro to facilitate getting better code coverage during testing.
+ Update prvNotifyQueueSetContainer() so it does not call xTaskRemoveFromEventList() if it is called from an interrupt, and the queue is locked.
rtel [Wed, 11 Feb 2015 15:41:30 +0000 (15:41 +0000)]
Kernel updates:
+ Added vTimerSetTimerID() to compliment vTimerGetTimerID(). Now the timer ID can be used as timer local storage.
+ Updated comments and added some additional assert() calls.
Win32 port:
+ Some changes to allow easier 64-bit builds
PIC24/dsPIC port:
+ Added NOP after disable interrupt instruction.
rtel [Thu, 15 Jan 2015 21:37:32 +0000 (21:37 +0000)]
Demo app changes:
Add a "query heap" command to the standard sample CLI commands.
Remove casting from configMAX_PRIORITIES setting in Win32 simulator demos as it was preventing a clean build.
Source code changes.
General tidy up and addition of assert points.
rtel [Sun, 21 Dec 2014 10:26:36 +0000 (10:26 +0000)]
Kernel changes:
+ Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement).
+ GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement).
Demo changes:
Change the [very basic] FreeRTOS+UDP SAM4E driver to use task notifications rather than a semaphore (execution time now 55% what it was in FreeRTOS V8.1.2!).
Robustness improvements to IntQueue.c standard demo task.h.
Added the latest standard demo tasks, reg test tasks and int q tasks to the SAM4E demo.
rtel [Fri, 19 Dec 2014 16:27:56 +0000 (16:27 +0000)]
Kernel changes:
+ Do not attempt to free the stack of a deleted task if the stack was statically allocated.
+ Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions.
Microblase port:
+Change occurrences of #if XPAR_MICROBLAZE_0_USE_FPU == 1 to #if XPAR_MICROBLAZE_0_USE_FPU != 0 as the value can also be 2 or 3.
Demo app modifications:
+ Update Zynq project to use the 2014.4 tools and add in tests for the new task notification feature.
+ Update SAM4S project to include tests for the new task notification feature.
rtel [Thu, 18 Dec 2014 11:02:15 +0000 (11:02 +0000)]
+ Update demos that use FreeRTOS+Trace to work with the latest trace recorder library.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
rtel [Mon, 15 Dec 2014 14:13:03 +0000 (14:13 +0000)]
+ New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros.
+ Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h.
+ Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked.
+ Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos.
+ Update trace recorder code, and some demos to use the new version (more to do).
+ Introduce uxTaskPriorityGetFromISR().
+ Minor typo corrections.
+ Update MingW simulator demo to match the MSVC simulator demo.
rtel [Wed, 15 Oct 2014 21:01:31 +0000 (21:01 +0000)]
Core kernel code:
Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c.
Kernel port code:
- Slight change to the Cortex-A GIC-less port to move all non portable code to the application level.
SAMA5D4 demo project:
- Update the Atmel provided library to V1.1.
- Create a DDR build configuration.
- Ensure interrupts are all edge sensitive.
- Update the regtest code to use all 32 flop registers.
rtel [Thu, 9 Oct 2014 15:42:43 +0000 (15:42 +0000)]
Demo projects only:
+ Remove some #warnings messages from the Cycle 5 - which were left in the code as reminders of tests that were not yet completed but are now.
rtel [Wed, 8 Oct 2014 20:31:14 +0000 (20:31 +0000)]
Core kernel files:
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction. The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap. This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.
Demo application:
+ Add demo for SAMA5D4 using IAR.
Core kernel code:
+ Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt.
Demo applications:
+ Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR().
+ Ensure the MMU is turned on in the RZ IAR demo. It was already on in the RZ ARM demo.
Demo tasks only, with the aim of improving test coverage:
+ Split out the code that uses a mutex from an interrupt from GenQTest.c and add to new common demo task IntSemTest.c.
Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition.
rtel [Sat, 16 Aug 2014 14:29:39 +0000 (14:29 +0000)]
Demo application related:
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.
Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.
Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
rtel [Mon, 4 Aug 2014 07:53:20 +0000 (07:53 +0000)]
Common demo tasks:
- Add additional tests to GenQTest.c to test the updated priority inheritance mechanism.
- Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases.
SAMA5D3 Xplained IAR demo:
- Remove space being allocated for stacks that are not used.
- Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked.
- Reduce both the allocated heap size and the stack allocated to each task.
- Enable I cache.
rtel [Sun, 3 Aug 2014 18:37:58 +0000 (18:37 +0000)]
Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
Continue working on the GIC-less Cortex-A5 port for IAR:
- Add in the assert when a task attempts to exit its implementing function without deleting itself.
- Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register).
- Attempt to make code more generic by using definitions for additional register addresses.
Carry on working on SAMA5D3 demo:
- Add full interrupt nesting tests.
- Add additional critical section/context switching tests.
- Set interrupt priorities so everything can run at once without any software watchdog errors.
- Re-enable interrupts in each IRQ handler.
- Add in run-time stats.
Make the parameters to vPortDefineHeapRegions() const.
Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated).
Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0.
Simply some of the alignment calculations in heap_4.c to match those used in heap_5.c.
Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time].
Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started.
rtel [Mon, 16 Jun 2014 13:07:01 +0000 (13:07 +0000)]
Update timer demo in PIC32MZ demo to remove multiple extern definition created by adding in the macro that checks non ISR safe functions are not called from ISRs.
rtel [Mon, 16 Jun 2014 12:51:35 +0000 (12:51 +0000)]
Default the definition of portASSERT_IF_IN_ISR() to nothing if it is not defined.
Helper updates to allow a count of the number of mutexes held to be added.
Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics.
Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR.
rtel [Sun, 15 Jun 2014 09:24:08 +0000 (09:24 +0000)]
Add code to assert() if non ISR safe API function is called from ISR in Tasking CM4F ports - plus fix bug where the max syscall interrupt priority was used incorrectly in the Tasking CM4F port.
rtel [Mon, 9 Jun 2014 19:35:08 +0000 (19:35 +0000)]
Move the Zynq's lwIP example from the Full demo into its own configuration as having the lwIP tasks at a high priority made the self checking test tasks report failures, while having the lwIP tasks at a low priority slugged the throughput.
rtel [Wed, 4 Jun 2014 09:17:14 +0000 (09:17 +0000)]
Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.
Update RXv2 GCC port to match RXv2 Renesas port.
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